Semiconductor device and method for manufacturing semiconductor device

Abstract

To suppress the expansion of stacking faults in SiC semiconductor devices when current is applied.SOLUTION: A semiconductor device 10 has a substrate 12 made of silicon carbide and a semiconductor layer of a first conductivity type provided on a first surface 12a of the substrate 12. A highly concentrated hydrogen region 40 with a hydrogen concentration exceeding 1015 / cm3 over a thickness of 1 μm or more is formed by irradiation with hydrogen ions. At least a portion of the highly concentrated hydrogen region 40 is formed in the semiconductor layer of the first conductivity type.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] Silicon carbide (SiC) is attracting attention as a material for use in next-generation power semiconductor devices. For example, an epitaxial layer is formed on a SiC substrate, and a transistor structure is formed within the epitaxial layer. It is known that in SiC semiconductor devices, injected carriers are trapped in stacking faults in the epitaxial layer when a current is applied, reducing the stacking fault energy and leading to the expansion of stacking faults. The expansion of stacking faults is considered a problem because it leads to an increase in forward voltage.

[0003] To suppress the expansion of stacking faults, a technique has been proposed in which protons are irradiated into the epitaxial layer to generate lifetime killers, thereby promoting the recombination of injected carriers before they are trapped by stacking faults. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2019-102493 Summary of the Invention [Problem to be solved by the invention]

[0005] When attempting to suppress the expansion of stacking faults by generating lifetime killers, it is necessary to generate lifetime killers over a wide area in the depth direction to promote sufficient carrier recombination, which requires increasing the thickness of the epitaxial layer or irradiating a wide area with protons in the depth direction, leading to increased manufacturing costs.

[0006] An exemplary object of an embodiment of the present invention is to provide a technique for suppressing the expansion of stacking faults in a SiC semiconductor device when a current is applied. [Means for solving the problem]

[0007] A method for manufacturing a semiconductor device according to an embodiment of the present invention includes irradiating a semiconductor device including a substrate made of silicon carbide and a semiconductor layer of a first conductivity type on a first surface of the substrate with hydrogen ions to form a semiconductor layer having a hydrogen concentration of 10 or more over a thickness of 1 μm or more. 15 / cm 3 forming a high-concentration hydrogen region exceeding 1000 mV, at least a portion of which is formed in a semiconductor layer of a first conductivity type.

[0008] Another aspect of the present invention is a semiconductor device. The semiconductor device includes a substrate made of silicon carbide, a semiconductor layer of a first conductivity type provided on the substrate, and a semiconductor layer having a hydrogen concentration of 10 or more over a thickness of 1 μm or more. 15 / cm 3 and a high-concentration hydrogen region exceeding 1000 kJ / cm. At least a portion of the high-concentration hydrogen region is formed in the semiconductor layer of the first conductivity type.

[0009] Any combination of the above components or mutual substitution of the components or expressions of the present invention between methods, devices, systems, etc. are also valid aspects of the present invention. [Effects of the Invention]

[0010] According to an embodiment of the present invention, it is possible to suppress the expansion of stacking faults in a SiC semiconductor device when a current is applied. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a cross-sectional view schematically illustrating a configuration example of a semiconductor device according to an embodiment. [Figure 2] 10 is a graph showing an example of the hydrogen concentration of a semiconductor device after hydrogen ion irradiation. [Figure 3] 1 is a table showing the thickness of a high-hydrogen-concentration region and the presence or absence of expansion of stacking faults in comparative examples and examples. [Figure 4] FIG. 10 is a diagram schematically illustrating another example of the position where a high-concentration hydrogen region is formed. [Figure 5] 1A to 1C are cross-sectional views schematically showing a manufacturing process of a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views schematically showing a manufacturing process of a semiconductor device. [Figure 7] 1A to 1C are cross-sectional views schematically showing a manufacturing process of a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views schematically showing a manufacturing process of a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views schematically showing a manufacturing process of a semiconductor device. [Figure 10] 1A to 1C are cross-sectional views schematically showing a manufacturing process of a semiconductor device. [Figure 11] 1A to 1C are cross-sectional views schematically showing a manufacturing process of a semiconductor device. [Figure 12] 1 is a flowchart illustrating an example of a method for manufacturing a semiconductor device according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments for carrying out the present invention will be described in detail. Note that the configurations described below are examples and do not limit the scope of the present invention in any way. Furthermore, in the description of the drawings, the same elements are given the same reference numerals, and duplicate explanations will be omitted as appropriate. Furthermore, in the drawings referred to in the following description, the size and thickness of each component are for the convenience of explanation and do not necessarily represent the actual dimensions or ratios.

[0013] An outline of the present embodiment will be described. The present embodiment relates to a SiC semiconductor device including a substrate made of silicon carbide (SiC) and a semiconductor layer of a first conductivity type provided on a first surface of the substrate. In such a SiC semiconductor device, stacking faults present near the interface between the substrate and the semiconductor layer expand when a current is applied, which leads to an increase in forward voltage.

[0014] In this embodiment, hydrogen ions are irradiated near the interface between the substrate and the semiconductor layer to fix hydrogen to the partial dislocations that border the stacking faults, thereby suppressing the expansion of the stacking faults when a current is applied. Fixing hydrogen to the partial dislocations can prevent injected carriers from being trapped in the stacking faults, thereby suppressing a decrease in stacking fault energy.

[0015] According to the findings of the present inventors, the hydrogen concentration is increased to 10 15 / cm 3 By forming a high-concentration hydrogen region exceeding 1 μm in thickness, it is possible to fix a sufficient amount of hydrogen to the partial dislocations that border stacking faults near the interface between the substrate and the semiconductor layer, thereby effectively suppressing the expansion of stacking faults.

[0016] 1 is a cross-sectional view schematically illustrating an example of the configuration of a semiconductor device 10 according to an embodiment. The semiconductor device 10 is a SiC semiconductor device and a metal oxide semiconductor field effect transistor (MOSFET). The semiconductor device 10 includes a substrate 12, a buffer layer 14, a drift layer 16, a base region 18, a source region 20, a base contact region 22, a gate insulating film 24, a gate electrode 26, an interlayer insulating film 28, a source electrode 30, and a drain electrode 32.

[0017] The substrate 12 is a SiC substrate made of silicon carbide (SiC) of a first conductivity type (e.g., n-type) or a second conductivity type (e.g., p-type). The substrate 12 is, for example, an n-type SiC substrate, and is doped with, for example, nitrogen (N) as an n-type impurity. The impurity concentration of the first conductivity type or the second conductivity type of the substrate 12 is 1.0×10 18 / cm 3 For example, 2.0 × 10 18 / cm 3 Over 5.0 x 10 19 / cm 3 The substrate 12 has a first surface 12a and a second surface 12b opposite to the first surface 12a. The first surface 12a is, for example, a (0001) Si surface.

[0018] The buffer layer 14 is a first conductivity type SiC semiconductor layer epitaxially grown on the first surface 12a of the substrate 12. The buffer layer 14 is, for example, an n-type SiC layer, and is doped with, for example, nitrogen (N) as an n-type impurity. The impurity concentration of the first conductivity type in the buffer layer 14 is lower than the impurity concentration of the first conductivity type or the second conductivity type in the substrate 12, and higher than the impurity concentration of the first conductivity type in the drift layer 16. The impurity concentration of the first conductivity type in the buffer layer 14 is, for example, 1.0×10 16 / cm 3 Over 1.0 x 10 18 / cm 3 The thickness of the buffer layer 14 is not less than 1.0 μm and not more than 5.0 μm, for example not less than 1.5 μm and not more than 3.0 μm, for example 2.0 μm.

[0019] The drift layer 16 is a first conductivity type SiC semiconductor layer epitaxially grown on the buffer layer 14. The drift layer 16 is, for example, an n-type SiC layer, and is doped with, for example, nitrogen (N) as an n-type impurity. The first conductivity type impurity concentration of the drift layer 16 is lower than the first conductivity type impurity concentration of the buffer layer 14. The first conductivity type impurity concentration of the drift layer 16 is, for example, 1.0×10 15 / cm 3 Over 1.0 x 10 17 / cm 3 The thickness of the drift layer 16 is greater than the thickness of the buffer layer 14. The thickness of the drift layer 16 is not less than 5.0 μm and not more than 50 μm, for example not less than 7.5 μm and not more than 15 μm, for example 10 μm.

[0020] The base region 18 is a second conductivity type SiC semiconductor region provided on the drift layer 16. The base region 18 is, for example, p-type and is doped with, for example, aluminum (Al) as a p-type impurity. The base region 18 is formed, for example, by irradiating the drift layer 16 with impurity ions of the second conductivity type. The impurity concentration of the second conductivity type in the base region 18 is higher than the impurity concentration of the first conductivity type in the drift layer 16. The impurity concentration of the second conductivity type in the base region 18 is, for example, 1.0×10 16 / cm 3 Over 1.0 x 10 18 / cm 3 The following is the result.

[0021] The source region 20 is a first conductivity type SiC semiconductor region provided on the base region 18. The source region 20 is provided adjacent to the gate insulating film 24. The source region 20 is, for example, n-type, and is doped with, for example, nitrogen (N) as an n-type impurity. The source region 20 is formed, for example, by irradiating the drift layer 16 with impurity ions of the first conductivity type. The impurity concentration of the first conductivity type in the source region 20 is higher than that in the drift layer 16. The impurity concentration of the first conductivity type in the source region 20 is 1.0×10 18 / cm 3 For example, 2.0 × 10 18 / cm 3 Over 5.0 x 10 19 / cm 3 The following is the result.

[0022] The base contact region 22 is a second conductivity type SiC semiconductor region provided on the base region 18. The base contact region 22 is provided away from the gate insulating film 24. The base contact region 22 is, for example, p-type, and is doped with, for example, aluminum (Al) as a p-type impurity. The base contact region 22 is formed, for example, by irradiating the drift layer 16 with impurity ions of the second conductivity type. The second conductivity type impurity concentration of the base contact region 22 is higher than the second conductivity type impurity concentration of the base region 18. The second conductivity type impurity concentration of the base contact region 22 is, for example, 1.0×10 17 / cm 3 Over 1.0 x 10 19 / cm 3 The following is the result.

[0023] The gate insulating film 24 is provided on the inner wall surface of the gate trench 34. The gate insulating film 24 is provided so as to be adjacent to the drift layer 16, the base region 18, and the source region 20. The gate trench 34 is formed so as to be dug down from the upper surface 20a of the source region 20 toward the substrate 12. The gate trench 34 is formed so as to penetrate through the source region 20 and the base region 18 and reach the top of the drift layer 16. The gate insulating film 24 is formed of an oxide material, for example, SiO2.

[0024] The gate electrode 26 is provided so as to fill the inside of the gate insulating film 24 (gate trench 34). The gate electrode 26 is made of polycrystalline silicon doped with n-type impurities such as phosphorus (P) or nitrogen (N).

[0025] The interlayer insulating film 28 is provided on the gate insulating film 24 and the gate electrode 26. The interlayer insulating film 28 is made of any insulating material.

[0026] The source electrode 30 is provided on the source region 20, the base contact region 22, and the interlayer insulating film 28. The source electrode 30 is in contact with the upper surface 20a of the source region 20 and the upper surface 22a of the base contact region 22. The source electrode 30 is formed of a metal material such as chromium (Cr) or nickel (Ni). The source electrode 30 may be formed of a metal multilayer film in which multiple metal layers made of different metal materials are stacked. The source electrode 30 is a surface metal electrode layer formed on the surface of the semiconductor device 10.

[0027] The drain electrode 32 is provided on the second surface 12b of the substrate 12. The drain electrode 32 is in contact with the second surface 12b of the substrate 12. The drain electrode 32 is formed of a metal material such as chromium (Cr) or nickel (Ni). The drain electrode 32 may be formed of a metal multilayer film in which multiple metal layers made of different metal materials are stacked. The drain electrode 32 is a back surface metal electrode layer formed on the back surface of the semiconductor device 10.

[0028] In the manufacturing process of the semiconductor device 10, hydrogen ions are irradiated onto the semiconductor device 10, and the hydrogen concentration is increased to 10 15 / cm 3 A high-concentration hydrogen region 40 exceeding 1000 mV is formed. At least a portion of the high-concentration hydrogen region 40 is formed in the buffer layer 14 or the drift layer 16, which are semiconductor layers of the first conductivity type. In the example of FIG. 1 , the entire high-concentration hydrogen region 40 is formed in the buffer layer 14, and an upper end 42 and a lower end 44 of the high-concentration hydrogen region 40 are located in the buffer layer 14.

[0029] 2 is a graph showing an example of the hydrogen concentration in the semiconductor device 10 after hydrogen ion irradiation. In FIG. 2, the energy of the hydrogen ion irradiation is set to 960 keV and the dose is set to 1.0×10 13 / cm 2 In the example of Figure 2, the hydrogen concentration is 10 15 / cm 3 In the example of FIG. 2, the high-concentration hydrogen region 40 has a thickness range 46 of about 1.1 μm, where the hydrogen concentration is 10 16 / cm 3 In the example of FIG. 2, the peak value of the hydrogen concentration in the high-concentration hydrogen region 40 exceeds 1.1×10 17 / cm 3 By forming such a high-concentration hydrogen region 40 in the buffer layer 14, it is possible to suppress the expansion of stacking faults when a current is applied to the semiconductor device 10.

[0030] The presence or absence of stacking fault expansion can be confirmed by X-ray topography or photoluminescence. First, the positions of stacking faults present in the semiconductor device 10 before current application are confirmed by X-ray topography or photoluminescence, and then whether or not the stacking faults have expanded after current application can be observed by X-ray topography or photoluminescence. Note that instead of generating injected carriers by current application, carriers can also be generated by irradiating with ultraviolet light, and the presence or absence of stacking fault expansion can be confirmed.

[0031] 3 is a table showing the thickness of the high-concentration hydrogen region 40 and the presence or absence of expansion of stacking faults in the comparative example and the example. 10 / cm 2 ~1.0×10 16 / cm 2 The graph shows whether or not the expansion of stacking faults occurred when the thickness of the hydrogen-rich region 40 was changed within the range of 1 μm. In Comparative Examples 1 and 2, where the thickness of the hydrogen-rich region 40 was less than 1 μm, the expansion of stacking faults was confirmed. On the other hand, in Examples 1 to 5, where the thickness of the hydrogen-rich region 40 was 1 μm or more, the expansion of stacking faults was not confirmed, which indicates that the expansion of stacking faults can be suppressed.

[0032] The dose is 1.0 × 10 16 / cm 2 It is believed that the expansion of stacking faults can be suppressed even when the dose is increased beyond 1.0 × 10 16 / cm 2 More than this is not desirable from the standpoint of productivity.

[0033] 4(a) to 4(d) are diagrams schematically showing other examples of the positions where the high-concentration hydrogen regions 40a to 40d are formed.

[0034] 4(a) is formed across the substrate 12 and the buffer layer 14, spanning the first surface 12a which is the interface between the substrate 12 and the buffer layer 14. An upper end 42a of the high-concentration hydrogen region 40a is located in the buffer layer 14, and a lower end 44a of the high-concentration hydrogen region 40a is located in the substrate 12. At least a portion of the high-concentration hydrogen region 40a is formed in the substrate 12 and the buffer layer 14.

[0035] 4(b) is formed across the substrate 12, buffer layer 14, and drift layer 16. The high-concentration hydrogen region 40b is formed across the first surface 12a, which is the interface between the substrate 12 and buffer layer 14, and across the interface 36 between the buffer layer 14 and drift layer 16. An upper end 42b of the high-concentration hydrogen region 40b is located in the drift layer 16, and a lower end 44b of the high-concentration hydrogen region 40b is located in the substrate 12. At least a portion of the high-concentration hydrogen region 40b is formed in the substrate 12, buffer layer 14, and drift layer 16.

[0036] 4(c) is formed across the buffer layer 14 and the drift layer 16. The high-concentration hydrogen region 40c is formed across the interface 36 between the buffer layer 14 and the drift layer 16. An upper end 42c of the high-concentration hydrogen region 40c is located in the drift layer 16, and a lower end 44c of the high-concentration hydrogen region 40c is located in the buffer layer 14. At least a portion of the high-concentration hydrogen region 40b is formed in the buffer layer 14 and the drift layer 16.

[0037] 4(d), a high-concentration hydrogen region 40d is formed only in the drift layer 16. An upper end 42d and a lower end 44d of the high-concentration hydrogen region 40d are located in the drift layer 16.

[0038] The high-concentration hydrogen regions 40, 40a to 40d are preferably formed in positions close to the first surface 12a of the substrate 12. At least a portion of the high-concentration hydrogen regions 40, 40a to 40d is preferably formed within 5 μm of the first surface 12a of the substrate 12. The upper ends 42, 42a to 42d or the lower ends 44, 44a to 44d of the high-concentration hydrogen regions 40, 40a to 40d are preferably located within 5 μm of the first surface 12a of the substrate 12. The upper ends 42, 42a to 42d or the lower ends 44, 44a to 44d of the high-concentration hydrogen regions 40, 40a to 40d may be formed within 4 μm, 3 μm, or 2 μm of the first surface 12a of the substrate 12.

[0039] The hydrogen concentration of the high-hydrogen-concentration regions 40, 40a to 40d may be subsequently reduced by an annealing process included in the manufacturing process of the semiconductor device 10. For example, if an annealing process is performed after irradiation with hydrogen ions, hydrogen may diffuse due to the annealing process, reducing the hydrogen concentration. In this case, hydrogen fixed to the partial dislocations fringing the stacking faults remains fixed even after the annealing process. In other words, the hydrogen diffused by the annealing process is not fixed to the partial dislocations fringing the stacking faults, and is therefore not thought to contribute to suppressing the expansion of the stacking faults. According to this embodiment, when the hydrogen concentration in the buffer layer 14 or the drift layer 16 at the time of completion of the semiconductor device 10 is 1.0×10 15 / cm 2 Even if the hydrogen concentration in the buffer layer 14 or the drift layer 16 after the hydrogen ion irradiation is 1.0×10 15 / cm 2 If the value exceeds , the expansion of stacking faults can be suppressed.

[0040] If annealing is not performed after the hydrogen ion irradiation, the hydrogen concentration in the buffer layer 14 or the drift layer 16 of the semiconductor device 10 is 1.0×10 15 / cm 2 In this case, the high hydrogen concentration regions 40, 40a to 40d can be formed by the irradiation of hydrogen ions, so that the expansion of stacking faults can be suppressed.

[0041] Next, a description will be given of a method for manufacturing the semiconductor device 10. Figures 5 to 11 are cross-sectional views that schematically show the manufacturing process of the semiconductor device.

[0042] 5, a buffer layer 14 is formed on the first surface 12a of the substrate 12, and a drift layer 16 is formed on the buffer layer 14. The buffer layer 14 and the drift layer 16 can be formed using any epitaxial growth method such as chemical vapor deposition (CVD). The growth temperature of the buffer layer 14 and the drift layer 16 is, for example, 1500°C or higher and 1700°C or lower.

[0043] Next, as shown in FIG. 6 , hydrogen ions 50 are irradiated from above the drift layer 16 to form a high-hydrogen concentration region 40 in the buffer layer 14. The irradiation of the hydrogen ions 50 can be performed using any ion irradiation device. For example, the hydrogen ions 50 can be irradiated using a cyclotron-type or Van de Graaff-type ion irradiation device. The hydrogen ions 50 may be irradiated from the second surface 12b (back surface) of the substrate 12.

[0044] 7, second impurity ions 52, which are impurities of the second conductivity type, are irradiated from above the drift layer 16 to form the base region 18 and the base contact region 22. The second impurity ions 52 are, for example, aluminum ions. The base region 18 can be formed by irradiating the entire surface of the drift layer 16 with the second impurity ions 52. The base contact region 22 can be formed by irradiating the second impurity ions 52 while masking the region other than the region that will become the base contact region 22.

[0045] 8, first impurity ions 54, which are impurities of the first conductivity type, are irradiated from above the drift layer 16 to form the source region 20. The first impurity ions 54 are, for example, nitrogen ions. The source region 20 can be formed by irradiating the first impurity ions 54 while masking the region other than the region that will become the source region 20 (for example, the base contact region 22).

[0046] Next, an annealing process is performed at a first temperature to activate the first or second conductivity type impurities implanted into the base region 18, the source region 20, and the base contact region 22. The first temperature is 1500°C or higher, for example, 1600°C or higher and 1800°C or lower. By performing the annealing process at the first temperature, it is possible to repair the lattice defects formed in the buffer layer 14 by the irradiation of the hydrogen ions 50. Furthermore, by performing the annealing process at the first temperature, hydrogen that is not anchored to the partial dislocations that border the extended defects diffuses, and the hydrogen concentration in the high-concentration hydrogen region 40 increases to 1×10 15 / cm 3 It can drop to the following:

[0047] 9, the gate trench 34 is formed. For example, the gate trench 34 can be formed by forming a mask in an area other than the area where the gate trench 34 is to be formed, and dry etching the source region 20, the base region 18, and the drift layer 16 in the opening area of ​​the mask.

[0048] Next, the gate insulating film 24 is formed on the inner wall surface of the gate trench 34. The gate insulating film 24 can be formed, for example, by thermally oxidizing the inner wall surface of the gate trench 34 at a temperature of about 700°C to 1000°C. Next, the gate electrode 26 is formed inside the gate insulating film 24. The gate electrode 26 can be formed using any technique such as CVD.

[0049] 10, an interlayer insulating film 28 is formed on the source region 20, the base contact region 22, the gate insulating film 24, and the gate electrode 26. The interlayer insulating film 28 can be formed using any technique, such as CVD. Subsequently, a drain electrode 32 (rear surface metal electrode layer) is formed on the second surface 12b of the substrate 12. The drain electrode 32 can be formed using any film formation technique, such as sputtering or vapor deposition.

[0050] After the drain electrode 32 is formed, the drain electrode 32 is annealed at a second temperature to bring the drain electrode 32 into ohmic contact with the second surface 12b of the substrate 12. The second temperature is 450°C or higher, for example, 600°C or higher and 800°C or lower.

[0051] 11, a portion of the interlayer insulating film 28 is removed to expose the upper surface 20a of the source region 20 and the upper surface 22a of the base contact region 22. Subsequently, the source electrode 30 (surface metal electrode layer) shown in FIG. 1 is formed. The source electrode 30 can be formed using any film formation technique such as sputtering or vapor deposition.

[0052] After the source electrode 30 is formed, the source electrode 30 is annealed at a third temperature to bring the source electrode 30 into ohmic contact with the source region 20 and the base contact region 22. The third temperature is 300°C or higher, for example, 350°C or higher and 500°C or lower.

[0053] Through the above steps, the semiconductor device 10 shown in FIG. 1 is completed.

[0054] 12 is a flowchart showing an example of a method for manufacturing the semiconductor device 10 according to the embodiment. First, a semiconductor layer of a first conductivity type (e.g., a buffer layer 14 and a drift layer 16) is formed on the first surface 12a of the substrate 12 (S10). Next, hydrogen ions 50 are irradiated to form a semiconductor layer having a hydrogen concentration of 10 or more over a thickness of 1 μm or more. 15 / cm 3 A high-concentration hydrogen region 40 exceeding 10 ...

[0055] Next, the semiconductor device 10 is annealed at a first temperature of 1500°C or higher (S18) to activate the impurities in the base region 18, the source region 20, and the base contact region 22. Next, a gate trench 34 is formed, and a gate insulating film 24 and a gate electrode 26 are formed in the gate trench 34 (S20). Next, an interlayer insulating film 28 is formed on the gate electrode 26 (S22).

[0056] Next, a backside metal electrode layer (drain electrode 32) is formed on the second surface 12b of the substrate 12 and annealed at a second temperature of 450°C or higher (S24). Next, a portion of the interlayer insulating film 28 is removed (S26), and a frontside metal electrode layer (source electrode 30) is formed on the interlayer insulating film 28 and annealed at a third temperature of 300°C or higher (S28).

[0057] According to this embodiment, the hydrogen concentration is 10 15 / cm 3By irradiating the semiconductor device 10 with hydrogen ions 50 so as to form a high-hydrogen-concentration region 40 exceeding 1000 kJ / cm2, the expansion of stacking faults can be suppressed. In particular, the upward expansion of stacking faults present in the buffer layer 14 and the drift layer 16 can be suppressed, and the stacking faults can be prevented from reaching the base region 18, the source region 20, and the base contact region 22. This can suppress performance degradation associated with the use of the semiconductor device 10 with current flowing through it.

[0058] According to this embodiment, by performing annealing at a first temperature of 1500° C. or higher after the irradiation of hydrogen ions 50, it is possible to repair lattice defects formed in the buffer layer 14, the drift layer 16, and the like by the irradiation of hydrogen ions 50. This makes it possible to suppress a decrease in carrier lifetime caused by lattice defects, and to suppress the influence on device characteristics.

[0059] 12, the order of steps S12 to S16 may be reversed. For example, irradiation with second impurity ions 52 in S14 may be followed by irradiation with hydrogen ions 50 in S12, or irradiation with first impurity ions 54 in S16 may be followed by irradiation with hydrogen ions 50 in S12. Furthermore, irradiation with first impurity ions 54 in S16 may be followed by irradiation with second impurity ions 52 in S14.

[0060] 12, the irradiation of hydrogen ions 50 in S12 may be performed after the annealing treatment at the first temperature in S18. In this case, the annealing treatment at the second temperature in S24 can repair lattice defects caused by the irradiation of hydrogen ions 50. The irradiation step of hydrogen ions 50 in S12 may be performed between S18 and S20, between S20 and S22, or between S22 and S24.

[0061] 12, the irradiation of hydrogen ions 50 in S12 may be performed after the annealing treatment at the second temperature in S24. In this case, the irradiation step of hydrogen ions 50 in S12 may be performed between S24 and S26, or between S26 and S28. In this case, the third temperature of the annealing treatment in S28 is low, so that the diffusion of hydrogen implanted in the high-concentration hydrogen region 40 is suppressed. In this case, when the semiconductor device 10 is completed, the hydrogen concentration in the high-concentration hydrogen region 40 is 1.0×10 15 / cm 2 may be maintained above this level.

[0062] 12, the order of the steps S22 to S28 may be reversed. For example, the interlayer insulating film 28 may be formed in S22 after the back surface metal electrode layer (drain electrode 32) is formed in S24. Alternatively, the step of forming the back surface metal electrode layer (drain electrode 32) in S24 may be performed after the step S26 or after the step S28.

[0063] In the above-described embodiment, the semiconductor device 10 is a MOSFET. However, this embodiment can also be applied to SiC semiconductor devices other than MOSFETs, as long as they have a stacked structure of a substrate, a buffer layer, and a drift layer. For example, the semiconductor device 10 may be a transistor such as a junction field-effect transistor (JFET), a bipolar transistor (BJT), or an insulated gate bipolar transistor (IGBT), or may be a diode such as a Schottky barrier diode or a PIN diode.

[0064] The present invention has been described above based on examples. It will be understood by those skilled in the art that the present invention is not limited to the above-described embodiments, and that various design changes and modifications are possible, and that such modifications are also within the scope of the present invention. [Explanation of symbols]

[0065] 10...semiconductor device, 12...substrate, 12a...first surface, 12b...second surface, 14...buffer layer, 16...drift layer, 40...high-concentration hydrogen region.

Claims

1. A semiconductor device including a substrate made of silicon carbide and a semiconductor layer of a first conductivity type on a first surface of the substrate is irradiated with hydrogen ions to form a semiconductor layer having a hydrogen concentration of 10 or more over a thickness of 1 μm or more. １５ / cm ３ forming a high hydrogen concentration region exceeding 2. A method for manufacturing a semiconductor device, wherein at least a portion of the high-concentration hydrogen region is formed in the semiconductor layer of the first conductivity type.

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein at least a part of the high-concentration hydrogen region is formed within 5 [mu]m from the first surface.

3. the semiconductor layer of the first conductivity type includes a buffer layer on the substrate, and a drift layer of the first conductivity type on the buffer layer and having a lower impurity concentration than the buffer layer; 2. The method for manufacturing a semiconductor device according to claim 1, wherein at least a part of the high-concentration hydrogen region is formed in the buffer layer.

4. 4. The method for manufacturing a semiconductor device according to claim 3, wherein at least a part of the high-concentration hydrogen region is formed at the interface between the substrate and the buffer layer.

5. the semiconductor layer of the first conductivity type includes a buffer layer on the substrate, and a drift layer of the first conductivity type on the buffer layer and having a lower impurity concentration than the buffer layer; 2. The method for manufacturing a semiconductor device according to claim 1, wherein at least a part of the high-concentration hydrogen region is formed in the drift layer.

6. the semiconductor layer of the first conductivity type includes a buffer layer on the substrate, and a drift layer of the first conductivity type on the buffer layer and having a lower impurity concentration than the buffer layer; 2. The method for manufacturing a semiconductor device according to claim 1, wherein the high-concentration hydrogen region is formed across the buffer layer and the drift layer.

7. The peak value of the hydrogen concentration in the high hydrogen concentration region is 10 １６ / cm ３ 2. The method for manufacturing a semiconductor device according to claim 1, wherein:

8. The hydrogen concentration in the high hydrogen concentration region is 10 ２０ / cm ３ 2. The method for manufacturing a semiconductor device according to claim 1, wherein:

9. The dose of hydrogen ions is 10 １２ / cm ２ 9. The method for manufacturing a semiconductor device according to claim 1, wherein the method is as described above.

10. The dose of hydrogen ions is 10 １６ / cm ２ 10. The method for manufacturing a semiconductor device according to claim 9, wherein:

11. irradiating the semiconductor layer with impurity ions of a second conductivity type different from the first conductivity type; annealing at a temperature of 1500° C. or higher to activate the second conductivity type impurities; 9. The method for manufacturing a semiconductor device according to claim 1, wherein the hydrogen ion irradiation is performed before the annealing at a temperature of 1500[deg.] C. or higher.

12. forming a metal electrode layer on a second surface of the substrate opposite the first surface; annealing the metal electrode layer at a temperature of 450°C or higher and 800°C or lower; 9. The method for manufacturing a semiconductor device according to claim 1, wherein the hydrogen ion irradiation is performed before the annealing at the temperature of 450° C. or more and 800° C. or less.

13. a substrate made of silicon carbide; a first conductivity type semiconductor layer provided on the substrate; The hydrogen concentration is 10 １５ / cm ３ and a high hydrogen concentration region exceeding The semiconductor device is characterized in that at least a part of the high-concentration hydrogen region is formed in the semiconductor layer of the first conductivity type.

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