Temperature measuring circuit

Abstract

To provide a temperature measuring circuit that can be easily formed on a semiconductor substrate, and that can measure the temperature with high accuracy.SOLUTION: A temperature measuring circuit includes: a first switch circuit that charges a capacitor when a first control signal is input and discharges the capacitor when a second control signal is input; a control circuit that sets a control signal at the second control signal in response to an inter-terminal voltage being higher than a first reference voltage, sets the control signal at the first control signal in response to the inter-terminal voltage being lower than a second reference voltage, sets the control signal at the second control signal in response to the inter-terminal voltage being higher than a third reference voltage, and sets the control signal at the first control signal in response to the inter-terminal voltage being lower than the second reference voltage; a counter circuit that counts a frequency of the control signal; and a temperature acquisition portion that acquires the temperature on the basis of the frequency.SELECTED DRAWING: Figure 1A

Description

[Technical Field]

[0001] The present disclosure relates to a temperature measurement circuit. [Background technology]

[0002] Patent Document 1 discloses a temperature sensor. In this temperature sensor, a comparator outputs a first read value when the voltage at a first input terminal is smaller than the voltage at a second input terminal, and outputs a second read value when the voltage at the second input terminal is smaller than the voltage at the first input terminal. When the comparator outputs the first read value, the state of the read circuit is in the A-phase state. When the comparator outputs the second read value, the state of the read circuit is in the B-phase state.

[0003] When the readout circuit is in the Phase A state, a proportional current IPTAT is transmitted to a first terminal of a capacitor. A second terminal of the capacitor is connected to ground. A voltage representing a potential difference between the first terminal of the capacitor and the second terminal of the capacitor is input to a first input terminal of a comparator. A base-emitter voltage of a bipolar junction transistor is input to a second input terminal of the comparator.

[0004] When the state of the readout circuit is the B-phase state, the proportional current IPTAT is transmitted to the second terminal of the capacitor. The first terminal of the capacitor is connected to ground. The ground voltage is input to the first input terminal of the comparator. A voltage that is the potential difference from the second terminal of the capacitor to the first terminal of the capacitor is input to the second input terminal of the comparator.

[0005] The control unit determines the temperature based on the oscillation period of the readout value output by the comparator (paragraphs

[0036] ,

[0046] ,

[0047] ,

[0052] ,

[0057] ,

[0058] ,

[0059] ,

[0062] , and

[0063] , and Figures 4 and 5). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] US Patent Application Publication No. 2022 / 0163402 Summary of the Invention [Problem to be solved by the invention]

[0007] In the temperature sensor disclosed in Patent Document 1, when the state of the readout circuit is in the B-phase state, the second end of the capacitor becomes a negative voltage, which makes it difficult to form the temperature sensor on a semiconductor substrate.

[0008] Furthermore, in this temperature sensor, the proportional current IPTAT transmitted to the second end of the capacitor when the readout circuit is in the B-phase state depends on the temperature characteristics of the resistor included in the circuit that generates the proportional current IPTAT, making it impossible to determine the temperature with high accuracy.

[0009] In view of these problems, an object of one aspect of the present disclosure is to provide a temperature measurement circuit that can be easily formed on a semiconductor substrate and that can measure temperature with high accuracy, for example. [Means for solving the problem]

[0010] A temperature measurement circuit according to one aspect of the present disclosure includes a capacitor that generates a voltage between terminals according to the amount of stored charge, a first current source that supplies a first current, a second current source that supplies a second current, a first voltage source that generates a first reference voltage, a second voltage source that generates a second reference voltage, a third voltage source that generates a third reference voltage according to temperature, a comparator circuit that outputs an output voltage indicating whether two input voltages are high or low, and a control circuit that charges the capacitor with the first current when a first control signal is input, and converts the two input voltages into a selected reference voltage and a voltage between the terminals. a first switch circuit that, when a second control signal is input, discharges the capacitor with the second current and sets the two input voltages to the second reference voltage and the inter-terminal voltage; a second switch circuit that is in a first connection state in which the first reference voltage is the selected reference voltage or a second connection state in which the third reference voltage is the selected reference voltage; and a second switch circuit that is in a first connection state in which the inter-terminal voltage becomes higher than the first reference voltage while the control signal is set to the first control signal and the second switch circuit is in the first connection state during a first period. a control circuit that sets the control signal to the second control signal in response to the output voltage indicating that the inter-terminal voltage has become lower than the second reference voltage while the control signal is set to the second control signal, sets the control signal to the first control signal and places the second switch circuit in the first connection state in response to the output voltage indicating that the inter-terminal voltage has become higher than the third reference voltage while the control signal is set to the first control signal and the second switch circuit in the second connection state during a second period, sets the control signal to the second control signal in response to the output voltage indicating that the inter-terminal voltage has become higher than the third reference voltage while the control signal is set to the second control signal, and sets the control signal to the first control signal and places the second switch circuit in the second connection state in response to the output voltage indicating that the inter-terminal voltage has become lower than the second reference voltage while the control signal is set to the second control signal; a counter circuit that counts a first frequency of the control signal during the first period and a second frequency during the second period; and a temperature acquisition unit that acquires the temperature based on the first frequency and the second frequency. [Brief explanation of the drawings]

[0011] [Figure 1A] FIG. 2 is a circuit diagram showing a first state of the temperature measurement circuit according to the first embodiment. [Figure 1B] FIG. 4 is a circuit diagram showing a second state of the temperature measurement circuit of the first embodiment. [Figure 1C] FIG. 4 is a circuit diagram showing a third state of the temperature measurement circuit of the first embodiment. [Figure 1D] FIG. 4 is a circuit diagram showing a fourth state of the temperature measurement circuit according to the first embodiment. [Figure 2A] 4 is a flowchart showing the operation of the temperature measurement circuit according to the first embodiment. [Figure 2B] 4 is a flowchart showing the operation of the temperature measurement circuit according to the first embodiment. [Figure 3A] 1 is a timing chart showing the time changes in a first period T1 of a first input voltage Vin1 and a second input voltage Vin2 input to a comparator provided in the temperature measurement circuit of the first embodiment, a terminal voltage Vc generated by a capacitor provided in the temperature measurement circuit, and a control signal S1 output by a control circuit provided in the temperature measurement circuit. [Figure 3B] 10 is a timing chart showing the time changes in a second period T2 of the first input voltage Vin1 and the second input voltage Vin2 input to the comparator provided in the temperature measurement circuit of the first embodiment, the terminal voltage Vc generated by the capacitor provided in the temperature measurement circuit, and the control signal S1 output by the control circuit provided in the temperature measurement circuit. [Figure 4] FIG. 4 is a circuit diagram of a third voltage source provided in the temperature measurement circuit of the first embodiment. [Figure 5A] FIG. 10 is a circuit diagram showing a state 1a of the temperature measurement circuit according to the second embodiment. [Figure 5B] FIG. 10 is a circuit diagram showing a state 2a of the temperature measurement circuit according to the second embodiment. [Figure 5C] FIG. 10 is a circuit diagram showing a state 1b of the temperature measurement circuit according to the second embodiment. [Figure 5D]FIG. 10 is a circuit diagram showing a state 2b of the temperature measurement circuit according to the second embodiment. [Figure 5E] FIG. 10 is a circuit diagram showing a state 3a of the temperature measurement circuit according to the second embodiment. [Figure 5F] FIG. 4 is a circuit diagram showing a state 4a of the temperature measurement circuit according to the second embodiment. [Figure 5G] FIG. 10 is a circuit diagram showing a state 3b of the temperature measurement circuit according to the second embodiment. [Figure 5H] FIG. 10 is a circuit diagram showing a state 4b of the temperature measurement circuit according to the second embodiment. [Figure 6A] 10 is a circuit diagram illustrating a state in which the first input terminal and the second input terminal of the comparator circuit provided in the temperature measurement circuit of the second embodiment are a non-inverting input terminal and an inverting input terminal, respectively. FIG. [Figure 6B] 10 is a circuit diagram illustrating a state in which the first input terminal and the second input terminal of the comparator circuit provided in the temperature measurement circuit of the second embodiment are an inverting input terminal and a non-inverting input terminal, respectively. FIG. [Figure 7A] 10 is a flowchart showing the operation of the temperature measurement circuit according to the second embodiment. [Figure 7B] 10 is a flowchart showing the operation of the temperature measurement circuit according to the second embodiment. [Figure 8A] 10 is a timing chart showing the time changes in a first period T1 of the first input voltage Vin1 and the second input voltage Vin2 input to a comparator provided in the temperature measurement circuit of the second embodiment, the terminal voltage Vc generated by the capacitor provided in the temperature measurement circuit, the control signal S1 output by the control circuit provided in the temperature measurement circuit, and the control signal S3 output by the switching control circuit provided in the temperature measurement circuit. [Figure 8B]10 is a timing chart showing the time changes in a second period T2 of the first input voltage Vin1 and the second input voltage Vin2 input to the comparator provided in the temperature measurement circuit of the second embodiment, the terminal voltage Vc generated by the capacitor provided in the temperature measurement circuit, the control signal S1 output by the control circuit provided in the temperature measurement circuit, and the control signal S3 output by the switching control circuit provided in the temperature measurement circuit. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the drawings, the same or equivalent elements are designated by the same reference numerals, and redundant description will be omitted.

[0013] 1. First embodiment 1.1 Temperature measurement circuit Fig. 1A is a circuit diagram showing State 1 of the temperature measurement circuit of the first embodiment. Fig. 1B is a circuit diagram showing State 2 of the temperature measurement circuit of the first embodiment. Fig. 1C is a circuit diagram showing State 3 of the temperature measurement circuit of the first embodiment. Fig. 1D is a circuit diagram showing State 4 of the temperature measurement circuit of the first embodiment.

[0014] The temperature measurement circuit 1 of the first embodiment shown in FIGS. 1A to 1D measures temperature and outputs the measured temperature.

[0015] The temperature measurement circuit 1 is formed on a semiconductor substrate and built into a semiconductor integrated circuit. The semiconductor substrate is a CMOS (complementary metal-oxide semiconductor) wafer or the like. The temperature measurement circuit 1 does not have to be formed on a semiconductor substrate or built into a semiconductor integrated circuit.

[0016] As shown in Figures 1A to 1D, the temperature measurement circuit 1 includes a capacitor 11, a first current source 21, a second current source 22, a first voltage source 31, a second voltage source 32, a third voltage source 33, a comparator circuit 41, a control circuit 42, a counter circuit 43, a memory 44, a temperature acquisition unit 45, a first switch circuit 51, and a second switch circuit 52.

[0017] The capacitor 11 has terminals 11a and 11b. The first current source 21 has a negative electrode 21a and a positive electrode 21b. The second current source 22 has a negative electrode 22a and a positive electrode 22b. The first voltage source 31 has a negative electrode 31a and a positive electrode 31b. The second voltage source 32 has a negative electrode 32a and a positive electrode 32b. The third voltage source 33 has a negative electrode 33a and a positive electrode 33b. The comparator circuit 41 has a first input terminal 41a, a second input terminal 41b, and an output terminal 41c. The control circuit 42 has an input terminal 42a and an output terminal 42b. The first switch circuit 51 has terminals 51a, 51b, 51c, 51d, 51e, 51f, 51g, 51h, and 51i. The second switch circuit 52 includes terminals 52a, 52b, and 52c.

[0018] The terminal 11b of the capacitor 11 is grounded. The terminal 11a of the capacitor 11 is electrically connected to the terminal 51c of the first switch circuit 51.

[0019] The negative electrode 21a of the first current source 21 is electrically connected to a power supply. The positive electrode 21b of the first current source 21 is electrically connected to a terminal 51a of the first switch circuit 51. The negative electrode 22a of the second current source 22 is electrically connected to a terminal 51b of the first switch circuit 51. The positive electrode 22b of the second current source 22 is grounded. The negative electrode 31a of the first voltage source 31 is grounded. The positive electrode 31b of the first voltage source 31 is electrically connected to a terminal 52a of the second switch circuit 52. The negative electrode 32a of the second voltage source 32 is grounded. The positive electrode 32b of the second voltage source 32 is electrically connected to a terminal 51h of the first switch circuit 51. The negative electrode 33a of the third voltage source 33 is grounded. The positive electrode 33b of the third voltage source 33 is electrically connected to the terminal 52b of the second switch circuit 52. The first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are electrically connected to the terminals 51f and 51i of the first switch circuit 51, respectively. The output terminal 41c of the comparator circuit 41 is electrically connected to the input terminal 42a of the control circuit 42. The output terminal 42b of the control circuit 42 is electrically connected to the counter circuit 43, the first switch circuit 51, and the second switch circuit 52. The terminal 52c of the second switch circuit 52 is electrically connected to the terminal 51d of the first switch circuit 51. The counter circuit 43 is electrically connected to the control circuit 42. The memory 44 is electrically connected to the counter circuit 43. The temperature acquisition unit 45 is electrically connected to the counter circuit 43.

[0020] Capacitor 11 stores electric charge. The amount of stored electric charge increases by the amount of electric charge carried by the current flowing into terminal 11a of capacitor 11, and decreases by the amount of electric charge carried by the current flowing out of terminal 11a of capacitor 11. Capacitor 11 generates a terminal voltage Vc between terminals 11b and 11a according to the amount of stored electric charge.

[0021] The first current source 21 supplies a first current I1 that flows into the negative electrode 21a and flows out of the positive electrode 21b.

[0022] The second current source 22 generates a second current I2 that flows into the negative electrode 22a and flows out of the positive electrode 22b.

[0023] The first current source 21 and the second current source 22 are temperature proportional current sources, temperature insensitive current sources, process variation insensitive current sources, etc. When the first current source 21 and the second current source 22 are process variation insensitive current sources, the temperature can be measured with high accuracy even when process variation exists in the semiconductor substrate on which the temperature measurement circuit 1 is formed.

[0024] The first voltage source 31 generates a first reference voltage Vref between the negative terminal 31a and the positive terminal 31b.

[0025] The second voltage source 32 generates a second reference voltage Vref / M between the negative terminal 32a and the positive terminal 32b.

[0026] The third voltage source 33 generates a third reference voltage Vbe between the negative electrode 33a and the positive electrode 33b.

[0027] The first reference voltage Vref and the second reference voltage Vref / M are stable with respect to temperature. The third reference voltage Vbe is a voltage that corresponds to temperature. The second reference voltage Vref / M is lower than the first reference voltage Vref and is 1 / M times the first reference voltage Vref, where M is a positive value greater than 1.

[0028] The comparator circuit 41 outputs an output voltage Vout from an output terminal 41c, which indicates whether a first input voltage Vin1 input to a first input terminal 41a or a second input voltage Vin2 input to a second input terminal 41b is high or low. The first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are a non-inverting input terminal and an inverting input terminal, respectively. Therefore, when the first input voltage Vin1 is higher than the second input voltage Vin2, the comparator circuit 41 sets the output voltage Vout to a first output voltage High, and when the first input voltage Vin1 is lower than the second input voltage Vin2, the comparator circuit 41 sets the output voltage Vout to a second output voltage Low.

[0029] The output voltage Vout output from the output terminal 41c of the comparator circuit 41 is input to the input terminal 42a of the control circuit 42. A control signal S1 and a control signal S2 are output from the output terminal 42b of the control circuit 42. The control circuit 42 switches the output control signal S1 between the first control signal High and the second control signal Low in synchronization with the input output voltage Vout changing from the first output voltage High to the second output voltage Low. The control circuit 42 switches the output control signal S2 between the first control signal High and the second control signal Low.

[0030] The counter circuit 43 receives the control signal S1 output from the output terminal 42b of the control circuit 42. The counter circuit 43 counts the frequency of the input control signal S1 and outputs the counted frequency.

[0031] The frequency output from the counter circuit 43 is input to the temperature acquisition unit 45. The temperature acquisition unit 45 acquires the temperature from the input frequency.

[0032] The first switch circuit 51 receives a control signal S1 output from the output terminal 42b of the control circuit 42.

[0033] 1A and 1C, when the input control signal S1 is the first control signal High, the first switch circuit 51 brings the terminal 51a of the first switch circuit 51 into electrical continuity with the terminal 51c of the first switch circuit 51, and brings the terminal 51b of the first switch circuit 51 into electrical continuity with the terminal 51c of the first switch circuit 51. As a result, the first switch circuit 51 causes the first current I1 flowing out from the positive electrode 21b of the first current source 21 to flow into the terminal 11a of the capacitor 11, and the capacitor 11 is charged by the first current I1. As a result, the inter-terminal voltage Vc generated by the capacitor 11 increases over time.

[0034] 1B and 1D, when the input control signal S1 is the second control signal Low, the first switch circuit 51 brings the terminal 51b of the first switch circuit 51 into conduction with the terminal 51c of the first switch circuit 51, and brings the terminal 51a of the first switch circuit 51 out of conduction with the terminal 51c of the first switch circuit 51. As a result, the first switch circuit 51 causes the second current I2 flowing into the negative electrode 22a of the second current source 22 to flow out from the terminal 11a of the capacitor 11, and the capacitor 11 is discharged by the second current I2. As a result, the inter-terminal voltage Vc generated by the capacitor 11 decreases over time.

[0035] 1A and 1C, when the input control signal S1 is the first control signal High, the first switch circuit 51 brings the terminal 51d of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51 and does not bring the terminal 51e of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51. As a result, the first switch circuit 51 sets the first input voltage Vin1 input to the first input terminal 41a of the comparator circuit 41 as the reference voltage Vref or Vbe selected by the second switch circuit 52.

[0036] 1B and 1D, when the input control signal S1 is the second control signal Low, the first switch circuit 51 brings the terminal 51e of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51, and does not bring the terminal 51d of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51. As a result, the first switch circuit 51 sets the first input voltage Vin1 to the inter-terminal voltage Vc generated by the capacitor 11.

[0037] 1A and 1C, when the input control signal S1 is the first control signal High, the first switch circuit 51 brings the terminal 51g of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51, and does not bring the terminal 51h of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51. As a result, the first switch circuit 51 sets the second input voltage Vin2 to the inter-terminal voltage Vc generated by the capacitor 11.

[0038] 1B and 1D, when the input control signal S1 is the second control signal Low, the first switch circuit 51 brings the terminal 51h of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51, and does not bring the terminal 51g of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51. As a result, the first switch circuit 51 sets the second input voltage Vin2 to the second reference voltage Vref / M generated by the second voltage source 32.

[0039] As a result, when the input control signal S1 is the first control signal High, the first switch circuit 51 sets the two input voltages Vin1 and Vin2 compared by the comparator circuit 41 to the reference voltage Vref or Vbe selected by the second switch circuit 52 and the inter-terminal voltage Vc generated by the capacitor 11. When the input control signal S1 is the second control signal Low, the first switch circuit 51 sets the two input voltages Vin1 and Vin2 compared by the comparator circuit 41 to the inter-terminal voltage Vc generated by the capacitor 11 and the second reference voltage Vref / M generated by the second voltage source 32.

[0040] The second switch circuit 52 receives the control signal S2 output from the output terminal 42b of the control circuit 42.

[0041] 1A, 1B, and 1D, when the input control signal S1 is the first control signal High, the second switch circuit 52 brings the terminal 52a of the second switch circuit 52 into conduction with the terminal 52c of the second switch circuit 52, and does not bring the terminal 52b of the second switch circuit 52 into conduction with the terminal 52c of the second switch circuit 52. In this way, the first reference voltage Vref generated by the first voltage source 31 is selected by the second switch circuit 52.

[0042] 1C , when the input control signal S1 is the second control signal Low, the second switch circuit 52 brings the terminal 52b of the second switch circuit 52 into conduction with the terminal 52c of the second switch circuit 52, and does not bring the terminal 52a of the second switch circuit 52 into conduction with the terminal 52c of the second switch circuit 52. In this way, the third reference voltage Vbe generated by the third voltage source 33 is selected by the second switch circuit 52.

[0043] As a result, the second switch circuit 52 is in a first connection state in which the reference voltage selected by the second switch circuit 52 is the first reference voltage Vref generated by the first voltage source 31, or in a second connection state in which the reference voltage selected by the second switch circuit 52 is the third reference voltage Vbe generated by the third voltage source 33.

[0044] 1.2 Operation of the temperature measurement circuit 2A and 2B are flowcharts showing the operation of the temperature measurement circuit of the first embodiment.

[0045] The temperature measurement circuit 1 executes steps S101 to S114 shown in FIGS. 2A and 2B.

[0046] The temperature measurement circuit 1 executes steps S101 to S106 during a first period T1 having a first measurement time TF1, and alternates between State 1 shown in Fig. 1A and State 2 shown in Fig. 1B. During a subsequent second period T2 having a second measurement time TF2, the temperature measurement circuit 1 executes steps S108 to S113, and alternates between State 3 shown in Fig. 1C and State 4 shown in Fig. 1D.

[0047] The temperature measurement circuit 1 executes steps S101 to S103 during a period T1A included in the first period T1, and enters State 1 shown in Fig. 1A. The temperature measurement circuit 1 executes steps S104 to S106 during a period T1B included in the first period T1, and enters State 2 shown in Fig. 1B.

[0048] The temperature measurement circuit 1 executes steps S108 to S110 during a period T2A included in the second period T2, and enters state 3 shown in Fig. 1C. The temperature measurement circuit 1 executes steps S111 to S113 during a period T2B included in the second period T2, and enters state 4 shown in Fig. 1D.

[0049] (Charging during period T1A) In step S101, as shown in FIG. 1A, the control circuit 42 sets the control signal S1 to the first control signal High, and sets the control signal S2 to the first control signal High.

[0050] As a result, the positive electrode 21b of the first current source 21 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the positive electrode 31b of the first voltage source 31. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11.

[0051] As a result, the first current source 21 charges the capacitor 11. Furthermore, the comparator circuit 41 compares the first reference voltage Vref with the inter-terminal voltage Vc, and sets the output voltage Vout to the first output voltage High.

[0052] In the next step S102, the control circuit 42 determines whether the time TM1 that has elapsed since the start of the first period T1 is shorter than the first measurement time TF1. If the control circuit 42 determines that the time TM1 is shorter than the first measurement time TF1, it executes step S103. If the control circuit 42 determines that the time TM1 is equal to or longer than the first measurement time TF1, it executes step S107.

[0053] In step S103, the control circuit 42 determines whether the inter-terminal voltage Vc is lower than the first reference voltage Vref based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is lower than the first reference voltage Vref, it executes step S101. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or higher than the first reference voltage Vref, it executes step S104.

[0054] Through steps S101 to S103, the control circuit 42 causes the first current source 21 to continue charging the capacitor 11 and causes the comparator circuit 41 to continue comparing the first reference voltage Vref and the inter-terminal voltage Vc until the time TM1 reaches the first measurement time TF1 or the inter-terminal voltage Vc increases to the first reference voltage Vref. The control circuit 42 ends the first period T1 and starts the second period T2 in synchronization with the time TM1 reaching the first measurement time TF1. The control circuit 42 ends the period T1A and starts the period T1B in synchronization with the inter-terminal voltage Vc increasing to the first reference voltage Vref and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0055] (Discharge during period T1B) 1B, the control circuit 42 sets the control signal S1 to the second control signal Low and sets the control signal S2 to the first control signal High. Alternatively, the control circuit 42 may set the control signal S2 to the second control signal Low.

[0056] As a result, the negative electrode 22a of the second current source 22 is electrically connected to the terminal 11a of the capacitor 11. In addition, the first input terminal 41a of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. In addition, the second input terminal 41b of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32.

[0057] This causes the second current source 22 to discharge the capacitor 11. Furthermore, the comparator circuit 41 compares the inter-terminal voltage Vc with the second reference voltage Vref / M, and sets the output voltage Vout to the first output voltage High.

[0058] In the following step S105, the control circuit 42 determines whether the time TM1 is shorter than the first measurement time TF1. If the control circuit 42 determines that the time TM1 is shorter than the first measurement time TF1, it executes step S106. If the control circuit 42 determines that the time TM1 is equal to or longer than the first measurement time TF1, it executes step S107.

[0059] In step S106, the control circuit 42 determines whether the inter-terminal voltage Vc is higher than the second reference voltage Vref / M based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is higher than the second reference voltage Vref / M, it executes step S104. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or lower than the second reference voltage Vref / M, it executes step S101.

[0060] Through steps S104 to S106, the control circuit 42 causes the second current source 22 to continue discharging the capacitor 11 and causes the comparator circuit 41 to continue comparing the inter-terminal voltage Vc and the second reference voltage Vref / M until the time TM1 reaches the first measurement time TF1 or the inter-terminal voltage Vc drops to the second reference voltage Vref / M. The control circuit 42 ends the first period T1 and starts the second period T2 in synchronization with the time TM1 reaching the first measurement time TF1. The control circuit 42 ends the period T1B and starts the period T1A in synchronization with the inter-terminal voltage Vc dropping to the second reference voltage Vref / M and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0061] (Counting the number of counts in the first period T1) Through steps S101 to S106, the control circuit 42 sets the control signal S1 to the second control signal Low in response to the output voltage Vout indicating that the inter-terminal voltage Vc has increased to the first reference voltage Vref while the control signal S1 is set to the first control signal High and the second switch circuit 52 is in the first connection state.The control circuit 42 sets the control signal S1 to the first control signal High in response to the output voltage Vout indicating that the inter-terminal voltage Vc has decreased to the second reference voltage Vref / M while the control signal S1 is set to the second control signal Low.

[0062] The fact that the inter-terminal voltage Vc has increased to the first reference voltage Vref is indicated by the output voltage Vout changing from the first output voltage High to the second output voltage Low. The fact that the inter-terminal voltage Vc has decreased to the second output voltage Low is indicated by the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0063] As a result, during the first period T1, the control signal S1 periodically changes between the first control signal High and the second control signal Low. The counter circuit 43 counts the number of times (hereinafter referred to as the “count number”) that the control signal S1 becomes the first control signal High and the second control signal Low during the first period T1, and writes the count number to a first address in the memory 44.

[0064] (Resetting the counter circuit and changing the destination for writing the count) In step S107, the counter circuit 43 is reset, and the address where the count number counted by the counter circuit 43 is written is changed from the first address to the second address.

[0065] (Charging during period T2A) In step S108, the control circuit 42 sets the control signal S1 to a first control signal High and sets the control signal S2 to a second control signal Low, as shown in FIG. 1C.

[0066] As a result, the positive electrode 21b of the first current source 21 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the positive electrode 33b of the third voltage source 33. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11.

[0067] As a result, the first current source 21 charges the capacitor 11. Furthermore, the comparator circuit 41 compares the third reference voltage Vbe with the inter-terminal voltage Vc, and sets the output voltage Vout to the first output voltage High.

[0068] In the next step S109, the control circuit 42 determines whether the time TM2 that has elapsed since the start of the second period T2 is shorter than the second measurement time TF2. If the control circuit 42 determines that the time TM2 is shorter than the second measurement time TF2, it executes step S110. If the control circuit 42 determines that the time TM2 is equal to or longer than the second measurement time TF2, it executes step S114.

[0069] In step S110, the control circuit 42 determines whether the inter-terminal voltage Vc is lower than the third reference voltage Vbe based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is lower than the third reference voltage Vbe, it executes step S108. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or higher than the third reference voltage Vbe, it executes step S111.

[0070] Through steps S108 to S110, the control circuit 42 causes the first current source 21 to continue charging the capacitor 11 and causes the comparator circuit 41 to continue comparing the third reference voltage Vbe and the inter-terminal voltage Vc until time TM2 reaches the second measurement time TF2 or the inter-terminal voltage Vc rises to the third reference voltage Vbe. The control circuit 42 ends the second period T2 in synchronization with time TM2 reaching the second measurement time TF2. The control circuit 42 ends period T2A and starts period T2B in synchronization with the inter-terminal voltage Vc rising to the third reference voltage Vbe and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0071] (Discharge during period T2B) 1D, the control circuit 42 sets the control signal S1 to the second control signal Low and sets the control signal S2 to the first control signal High. Alternatively, the control circuit 42 may set the control signal S2 to the second control signal Low.

[0072] As a result, the negative electrode 22a of the second current source 22 is electrically connected to the terminal 11a of the capacitor 11. In addition, the first input terminal 41a of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. In addition, the second input terminal 41b of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32.

[0073] This causes the second current source 22 to discharge the capacitor 11. Furthermore, the comparator circuit 41 compares the inter-terminal voltage Vc with the second reference voltage Vref / M, and sets the output voltage Vout to the first output voltage High.

[0074] In the following step S112, the control circuit 42 determines whether the time TM2 is shorter than the second measurement time TF2. If the control circuit 42 determines that the time TM2 is shorter than the second measurement time TF2, it executes step S113. If the control circuit 42 determines that the time TM2 is equal to or longer than the second measurement time TF2, it executes step S114.

[0075] In step S113, the control circuit 42 determines whether the inter-terminal voltage Vc is higher than the second reference voltage Vref / M based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is higher than the second reference voltage Vref / M, it executes step S111. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or lower than the second reference voltage Vref / M, it executes step S108.

[0076] Through steps S111 to S113, the control circuit 42 causes the second current source 22 to continue discharging the capacitor 11 and causes the comparator circuit 41 to continue comparing the inter-terminal voltage Vc and the second reference voltage Vref / M until time TM2 reaches the second measurement time TF2 or the inter-terminal voltage Vc drops to the second reference voltage Vref / M. The control circuit 42 ends the second period T2 in synchronization with time TM2 reaching the second measurement time TF2. The control circuit 42 ends period T2B and starts period T2A in synchronization with the inter-terminal voltage Vc dropping to the second reference voltage Vref / M and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0077] (Count in the second period T2) Through steps S107 to S113, the control circuit 42 sets the control signal S1 to the second control signal Low in response to the output voltage Vout indicating that the inter-terminal voltage Vc has increased to the third reference voltage Vbe while the control signal S1 is set to the first control signal High and the second switch circuit 52 is in the first connection state.The control circuit 42 sets the control signal S1 to the first control signal High in response to the output voltage Vout indicating that the inter-terminal voltage Vc has decreased to the second reference voltage Vref / M while the control signal S1 is set to the second control signal Low.

[0078] The fact that the inter-terminal voltage Vc has increased to the third reference voltage Vbe is indicated by the output voltage Vout changing from the first output voltage High to the second output voltage Low. The fact that the inter-terminal voltage Vc has decreased to the second reference voltage Vref / M is indicated by the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0079] As a result, during the second period T2, the control signal S1 periodically changes between the first control signal High and the second control signal Low. The counter circuit 43 counts the number of times the control signal S1 changes to the first control signal High and the second control signal Low during the second period T2, and writes the counted number to a second address in the memory 44.

[0080] (Reading out the count number) In step S114, the counter circuit 43 reads the count numbers from the first address and the second address, and obtains the first frequency F1 in the first period T1 and the second frequency F2 in the second period T2 of the control signal S1 from the count numbers read from the first address and the second address. Also, the temperature obtainment unit 45 obtains the temperature based on the first frequency F1 and the second frequency F2.

[0081] 1.3 Time variations of the first input voltage, the second input voltage, the terminal voltage, and the control signal

[0082] (Change over time in the first period T1) Figure 3A is a timing chart showing the time changes over a first period T1 of the first input voltage Vin1 and the second input voltage Vin2 input to the comparator provided in the temperature measurement circuit of the first embodiment, the terminal voltage Vc generated by the capacitor provided in the temperature measurement circuit, and the control signal S1 output by the control circuit provided in the temperature measurement circuit.

[0083] As shown in FIG. 3A, steps S101 to S106 cause periods T1A and T1B to alternately occur within the first period T1 in the temperature measurement circuit 1.

[0084] During period T1A, the first input voltage Vin1 and the second input voltage Vin2 are set to the first reference voltage Vref and the inter-terminal voltage Vc, respectively. The inter-terminal voltage Vc increases over time. This increases the inter-terminal voltage Vc from the second reference voltage Vref / M to the first reference voltage Vref. The control signal S1 is maintained at the first control signal High.

[0085] During period T1B, the first input voltage Vin1 and the second input voltage Vin2 are set to the inter-terminal voltage Vc and the second reference voltage Vref / M, respectively. The inter-terminal voltage Vc decreases over time. As a result, the inter-terminal voltage Vc decreases from the first reference voltage Vref to the second reference voltage Vref / M. The control signal S1 is maintained at the second control signal Low.

[0086] During periods T1A and T1B, the input terminal to which the inter-terminal voltage Vc is input is switched between the first input terminal 41a of the comparator circuit 41 and the second input terminal 41b of the comparator circuit 41. This makes it possible to switch between a state in which it is possible to detect that the inter-terminal voltage Vc has increased to the reference voltage and a state in which it is possible to detect that the inter-terminal voltage Vc has decreased to the reference voltage. Furthermore, during periods T1A and T1B, the reference voltage compared with the inter-terminal voltage Vc is switched between the first reference voltage Vref and the second reference voltage Vref / M. This makes it possible to switch between a state in which it is possible to detect that the inter-terminal voltage Vc has increased to the first reference voltage Vref and a state in which it is possible to detect that the inter-terminal voltage Vc has decreased to the second reference voltage Vref / M.

[0087] The time required for the inter-terminal voltage Vc to increase from the second reference voltage Vref / M to the first reference voltage Vref does not depend on temperature. The time required for the inter-terminal voltage Vc to decrease from the first reference voltage Vref to the second reference voltage Vref / M does not depend on temperature. Therefore, the first frequency F1 does not depend on temperature and can be used as a reference.

[0088] (Changes over time in the second period T2) Figure 3B is a timing chart showing the time changes during a second period T2 of the first input voltage Vin1 and the second input voltage Vin2 input to the comparator provided in the temperature measurement circuit of the first embodiment, the terminal voltage Vc generated by the capacitor provided in the temperature measurement circuit, and the control signal S1 output by the control circuit provided in the temperature measurement circuit.

[0089] As shown in FIG. 3B, steps S108 to S113 cause periods T2A and T2B to alternately occur in the second period T2 in the temperature measurement circuit 1.

[0090] During period T2A, the first input voltage Vin1 and the second input voltage Vin2 are set to the third reference voltage Vbe and the inter-terminal voltage Vc, respectively. The inter-terminal voltage Vc increases over time. This increases the inter-terminal voltage Vc from the second reference voltage Vref / M to the third reference voltage Vbe. The control signal S1 is maintained at the first control signal High.

[0091] During period T2B, the first input voltage Vin1 and the second input voltage Vin2 are set to the inter-terminal voltage Vc and the second reference voltage Vref / M, respectively. The inter-terminal voltage Vc decreases over time. As a result, the inter-terminal voltage Vc decreases from the third reference voltage Vbe to the second reference voltage Vref / M. The control signal S1 is maintained at the second control signal Low.

[0092] During periods T2A and T2B, the input terminal to which the inter-terminal voltage Vc is input is switched between the first input terminal 41a of the comparator circuit 41 and the second input terminal 41b of the comparator circuit 41. This makes it possible to switch between a state in which it is possible to detect that the inter-terminal voltage Vc has increased to the reference voltage and a state in which it is possible to detect that the inter-terminal voltage Vc has decreased to the reference voltage. Also, during periods T2A and T2B, the reference voltage compared with the inter-terminal voltage Vc is switched between the third reference voltage Vbe and the second reference voltage Vref / M. This makes it possible to switch between a state in which it is possible to detect that the inter-terminal voltage Vc has increased to the third reference voltage Vbe and a state in which it is possible to detect that the inter-terminal voltage Vc has decreased to the second reference voltage Vref / M.

[0093] The time it takes for the terminal voltage Vc to increase from the second reference voltage Vref / M to the third reference voltage Vbe is temperature dependent. The time it takes for the terminal voltage Vc to decrease from the third reference voltage Vbe to the second reference voltage Vref / M is temperature dependent. Therefore, the second frequency F2 is temperature dependent and can be compared with the first frequency F1 to identify the temperature.

[0094] 1.4 First Reference Voltage, Second Reference Voltage, and Third Reference Voltage The first voltage source 31 includes a bandgap reference circuit. The bandgap reference circuit generates a voltage that is independent of temperature. The first voltage source 31 extracts the generated voltage from the bandgap reference circuit and uses the extracted voltage as a first reference voltage Vref.

[0095] The second voltage source 32 includes a bandgap reference circuit and a resistive voltage divider circuit. The bandgap reference circuit generates a voltage that is independent of temperature. The resistive voltage divider circuit divides the generated voltage. The second voltage source 32 extracts the divided voltage from the resistive voltage divider circuit and uses the extracted voltage as a second reference voltage Vref / M.

[0096] FIG. 4 is a circuit diagram of a third voltage source provided in the temperature measurement circuit of the first embodiment.

[0097] 4, the third voltage source 33 includes a current source 61 and a bipolar transistor 62. The current source 61 includes a negative terminal 61a and a positive terminal 61b. The bipolar transistor 62 includes a base 62a, a collector 62b, and an emitter 62c.

[0098] The negative electrode 61a of the current source 61 is electrically connected to a power supply. The positive electrode 61b of the current source 61 is electrically connected to the emitter 62c of the bipolar transistor 62. The bipolar transistor 62 is diode-connected. Therefore, the base 62a and collector 62b of the bipolar transistor 62 are electrically connected to each other. The base 62a and collector 62b are grounded.

[0099] The current source 61 passes a current that flows into the negative electrode 61a and flows out of the positive electrode 61b. The passed current may or may not be a temperature-proportional current. However, semiconductor integrated circuits incorporating the temperature measurement circuit 1 often include a current source that passes a temperature-proportional current. Therefore, when the passed current is a temperature-proportional current, the size of the semiconductor integrated circuit can be reduced.

[0100] Bipolar transistor 62 conducts current that flows into emitter 62c and flows out of collector 62b.

[0101] The third voltage source 33 extracts the voltage generated between the base 62a and the emitter 62c from the emitter 62c, and uses the extracted voltage as a third reference voltage Vbe.

[0102] The temperature coefficient of the voltage generated between the base 62a and the emitter 62c is significantly smaller than the temperature coefficient of the temperature-proportional current, so even if the current being passed is temperature-proportional, the voltage extracted from the emitter 62c has a temperature coefficient close to that of the temperature-proportional current.

[0103] 1.5 Temperature Acquisition The ratio (Vbe-Vref / M):(Vref-Vref / M) of the difference Vbe-Vref / M between the third reference voltage Vbe and the second reference voltage Vref / M to the difference Vref-Vref / M between the first reference voltage Vref and the second reference voltage Vref / M matches the ratio F1:F2 between the first frequency F1 and the second frequency F2. Therefore, the temperature acquisition unit 45 calculates the third reference voltage Vbe from the first reference voltage Vref, the second reference voltage Vref / M, the first frequency F1, and the second frequency F2 according to equation (11).

[0104]

number

[0105] Furthermore, the temperature acquisition unit 45 acquires the temperature Temp from the temperature characteristics of the determined third reference voltage Vbe. For example, the temperature acquisition unit 45 acquires the temperature Temp according to equation (12) using the Boltzmann constant K, the saturation current Is, and the collector current Ic, which are constants.

[0106]

number

[0107] 1.6 Advantages of temperature measurement circuits In the temperature measurement circuit 1, the inter-terminal voltage Vc is maintained at or above the second reference voltage Vref / M, which is a positive voltage. Therefore, the voltage at the terminal 11a of the capacitor 11 does not become a negative voltage. This makes it easy to form the temperature measurement circuit 1 on a semiconductor substrate.

[0108] In the temperature measurement circuit 1, the first current source 21 and the second current source 22 do not have to be temperature proportional current sources. Therefore, various current sources can be used as the first current source 21 and the second current source 22. Furthermore, the temperature measurement circuit 1 can measure temperature with high accuracy without being affected by variations in the temperature proportional current.

[0109] 2. Second embodiment The following describes the differences between the second embodiment and the first embodiment. For points that are not described, the second embodiment also employs the same configuration as that employed in the first embodiment.

[0110] 2.1 Temperature measurement circuit FIG. 5A is a circuit diagram showing state 1a of the temperature measurement circuit of the second embodiment. FIG. 5B is a circuit diagram showing state 2a of the temperature measurement circuit of the second embodiment. FIG. 5C is a circuit diagram showing state 1b of the temperature measurement circuit of the second embodiment. FIG. 5D is a circuit diagram showing state 2b of the temperature measurement circuit of the second embodiment. FIG. 5E is a circuit diagram showing state 3a of the temperature measurement circuit of the second embodiment. FIG. 5F is a circuit diagram showing state 4a of the temperature measurement circuit of the second embodiment. FIG. 5G is a circuit diagram showing state 3b of the temperature measurement circuit of the second embodiment. FIG. 5H is a circuit diagram showing state 4b of the temperature measurement circuit of the second embodiment.

[0111] The temperature measurement circuit 2 of the second embodiment shown in FIGS. 5A to 5H includes a switching control circuit 53.

[0112] The switching control circuit 53 receives the control signal S1 output from the output terminal 42b of the control circuit 42. The switching control circuit 53 divides the frequency of the input control signal S1 to output a control signal S3. The switching control circuit 53 sets the output control signal S3 to either a first control signal High or a second control signal Low. The switching control circuit 53 sets the frequency of the output control signal S3, at which the first control signal High changes from a high to a low and the second control signal Low, to 1 / N of the frequency of the input control signal S1, at which the input control signal S1 changes from a high to a low, where N is an integer greater than or equal to 2. When the input control signal S1 is set to the first control signal High for a set number N of times while the output control signal S3 is set to the first control signal High, the switching control circuit 53 changes the output control signal S3 from the first control signal High to the second control signal Low. When the input control signal S1 is set to the first control signal High for a set number N while the output control signal S3 is set to the second control signal Low, the switching control circuit 53 changes the output control signal S3 from the second control signal Low to the first control signal High. The switching control circuit 53 is configured with a flip-flop circuit or the like.

[0113] In the temperature measurement circuit 2, a control signal S3 output from the switching control circuit 53 is input to the comparator circuit 41. While the input control signal S3 is a second control signal Low, the comparator circuit 41 sets the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 as a non-inverting input terminal and an inverting input terminal, respectively. While the input control signal S3 is a first control signal High, the comparator circuit 41 sets the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 as an inverting input terminal and a non-inverting input terminal, respectively. Therefore, while the input control signal S3 is a second control signal Low, the comparator circuit 41 sets the output voltage Vout to the first output voltage High when the first input voltage Vin1 is higher than the second input voltage Vin2, and sets the output voltage Vout to the second output voltage Low when the first input voltage Vin1 is lower than the second input voltage Vin2. Furthermore, while the input control signal S3 is the first control signal High, the comparator circuit 41 sets the output voltage Vout to the second output voltage Low when the first input voltage Vin1 is higher than the second input voltage Vin2, and sets the output voltage Vout to the first output voltage High when the first input voltage Vin1 is lower than the second input voltage Vin2.

[0114] In the temperature measurement circuit 2, as shown in FIGS. 5A to 5H, the first switch circuit 51 includes terminals 51j and 51k.

[0115] A terminal 51j of the first switch circuit 51 is electrically connected to the positive electrode 32b of the second voltage source 32. A terminal 51k of the first switch circuit 51 is electrically connected to a terminal 52c of the second switch circuit 52.

[0116] The first switch circuit 51 receives a control signal S3 output from a switching control circuit 53.

[0117] 5A and 5E, when the input control signal S1 is the first control signal High and the input control signal S3 is the second control signal Low, the first switch circuit 51 brings the terminal 51d of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51 and does not bring the terminals 51e and 51j of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51. As a result, the first switch circuit 51 sets the first input voltage Vin1 to the reference voltage Vref or Vbe selected by the second switch circuit 52.

[0118] 5B and 5F , when the input control signal S1 is the second control signal Low and the input control signal S3 is the second control signal Low, the first switch circuit 51 brings the terminal 51e of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51 and does not bring the terminals 51d and 51j of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51. As a result, the first switch circuit 51 sets the first input voltage Vin1 to the inter-terminal voltage Vc generated by the capacitor 11.

[0119] 5C and 5G, when the input control signal S1 is the first control signal High and the input control signal S3 is the first control signal High, the first switch circuit 51 brings the terminal 51e of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51 and does not bring the terminals 51d and 51j of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51. As a result, the first switch circuit 51 sets the first input voltage Vin1 to the inter-terminal voltage Vc generated by the capacitor 11.

[0120] 5D and 5H, when the input control signal S1 is the second control signal Low and the input control signal S3 is the first control signal High, the first switch circuit 51 brings the terminal 51j of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51 and does not bring the terminals 51d and 51e of the first switch circuit 51 into conduction with the terminal 51f of the first switch circuit 51. As a result, the first switch circuit 51 sets the first input voltage Vin1 to the second reference voltage Vref / M generated by the second voltage source 32.

[0121] 5A and 5E, when the input control signal S1 is the first control signal High and the input control signal S3 is the second control signal Low, the first switch circuit 51 brings the terminal 51g of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51 and does not bring the terminals 51h and 51k of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51. As a result, the first switch circuit 51 sets the second input voltage Vin2 to the inter-terminal voltage Vc generated by the capacitor 11.

[0122] 5B and 5F , when the input control signal S1 is the second control signal Low and the input control signal S3 is the second control signal Low, the first switch circuit 51 brings the terminal 51h of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51 and does not bring the terminals 51g and 51k of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51. As a result, the first switch circuit 51 sets the second input voltage Vin2 to the second reference voltage Vref / M generated by the second voltage source 32.

[0123] 5C and 5G, when the input control signal S1 is the first control signal High and the input control signal S3 is the first control signal High, the first switch circuit 51 brings the terminal 51k of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51 and does not bring the terminals 51g and 51h of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51. As a result, the first switch circuit 51 sets the second input voltage Vin2 to the reference voltage Vref or Vbe selected by the second switch circuit 52.

[0124] 5D and 5H, when the input control signal S1 is the second control signal Low and the input control signal S3 is the first control signal High, the first switch circuit 51 brings the terminal 51g of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51 and does not bring the terminals 51h and 51k of the first switch circuit 51 into conduction with the terminal 51i of the first switch circuit 51. As a result, the first switch circuit 51 sets the second input voltage Vin2 to the inter-terminal voltage Vc generated by the capacitor 11.

[0125] As a result, when the input control signal S1 is the first control signal High and the input control signal S3 is the second control signal Low, the first switch circuit 51 sets the two input voltages Vin1 and Vin2 compared by the comparator circuit 41 to the reference voltage Vref or Vbe selected by the second switch circuit 52 and the inter-terminal voltage Vc generated by the capacitor 11. When the input control signal S1 is the second control signal Low and the input control signal S3 is the second control signal Low, the first switch circuit 51 sets the two input voltages Vin1 and Vin2 compared by the comparator circuit 41 to the inter-terminal voltage Vc generated by the capacitor 11 and the second reference voltage Vref / M generated by the second voltage source 32. When the input control signal S1 is the first control signal High and the input control signal S3 is the first control signal High, the first switch circuit 51 sets the two input voltages Vin1 and Vin2 compared by the comparator circuit 41 to the inter-terminal voltage Vc generated by the capacitor 11 and the reference voltage Vref or Vbe selected by the second switch circuit 52. When the input control signal S1 is the second control signal Low and the input control signal S3 is the first control signal High, the first switch circuit 51 sets the two input voltages Vin1 and Vin2 compared by the comparator circuit 41 to the second reference voltage Vref / M generated by the second voltage source 32 and the inter-terminal voltage Vc generated by the capacitor 11.

[0126] 2.2 Comparator circuit 6A is a circuit diagram showing a state in which the first input terminal and the second input terminal of the comparator circuit provided in the temperature measurement circuit of the second embodiment are a non-inverting input terminal and an inverting input terminal, respectively. FIG. 6B is a circuit diagram showing a state in which the first input terminal and the second input terminal of the comparator circuit provided in the temperature measurement circuit of the second embodiment are an inverting input terminal and a non-inverting input terminal, respectively.

[0127] 6A and 6B, the comparator circuit 41 includes a differential input circuit 71 and an output circuit 72. The differential input circuit 71 includes a mirror pair 81, a differential pair 82, a constant current source 83, and a switching circuit 84. The mirror pair 81 includes active elements 81p and 81m. The differential pair 82 includes active elements 82p and 82m. The active elements 81p, 81m, 82p, and 82m are metal-oxide semiconductor field-effect transistors (MOSFETs). The active elements 81p, 81m, 82p, and 82m may be active elements other than MOSFETs.

[0128] The mirror pair 81 passes a reference current through one of the active elements 81p and 81m, and passes a current that is a replica of the reference current through the other active element 81p or 81m.

[0129] The differential pair 82 causes a current corresponding to the first input voltage Vin1 input to the first input terminal 41a of the comparator circuit 41 to flow through the active element 82p, and causes a current corresponding to the second input voltage Vin2 input to the second input terminal 41b of the comparator circuit 41 to flow through the active element 82m. The current flowing through the active element 82p includes the current flowing through the active element 81p. The current flowing through the active element 82m includes the current flowing through the active element 81m.

[0130] The constant current source 83 supplies a constant current. The constant current supplied to the constant current source 83 is a current obtained by combining the current supplied to the active element 82p and the current supplied to the active element 82m.

[0131] A control signal S3 is input to the switching circuit 84. When the input control signal S3 is the second control signal Low, the switching circuit 84 diode-connects the active element 81m to cause a reference current to flow through the active element 81m and causes a current that is a copy of the reference current to flow through the active element 81p, as shown in FIG. 6A. When the input control signal S3 is the second control signal Low, the switching circuit 84 electrically connects the output circuit 72 to the active element 82p to cause a current that is a merger of the current flowing through the active element 81p and the current flowing out from the output circuit 72 to flow through the active element 82p, as shown in FIG. 6A. When the input control signal S3 is the first control signal High, the switching circuit 84 diode-connects the active element 81p to cause a reference current to flow through the active element 81p and causes a current that is a copy of the reference current to flow through the active element 81m, as shown in FIG. 6B. Furthermore, when the input control signal S3 is the first control signal High, the switching circuit 84 electrically connects the output circuit 72 to the active element 82m, as shown in FIG. 6B, and causes the current flowing through the active element 81m and the current flowing out from the output circuit 72 to flow through the active element 82m.

[0132] The output circuit 72 outputs an output voltage Vout corresponding to the current that is made to flow out from the output terminal 41c of the comparator circuit 41.

[0133] As a result, while the control signal S3 is the second control signal Low, the switching circuit 84 sets the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 as the non-inverting input terminal and the inverting input terminal, respectively, and while the input control signal S3 is the first control signal High, the switching circuit 84 sets the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 as the inverting input terminal and the non-inverting input terminal, respectively. Therefore, while the control signal S3 is the second control signal Low, when the first input voltage Vin1 is higher than the second input voltage Vin2, the switching circuit 84 sets the output voltage Vout to the first output voltage High, and when the first input voltage Vin1 is lower than the second input voltage Vin2, the switching circuit 84 sets the output voltage Vout to the second output voltage Low. Furthermore, while the control signal S3 is the first control signal High, if the first input voltage Vin1 is higher than the second input voltage Vin2, the switching circuit 84 sets the output voltage Vout to the second output voltage Low, and if the first input voltage Vin1 is lower than the second input voltage Vin2, the switching circuit 84 sets the output voltage Vout to the first output voltage High.

[0134] 2.3 Operation of the temperature measurement circuit 7A and 7B are flowcharts showing the operation of the temperature measurement circuit according to the second embodiment.

[0135] The temperature measurement circuit 2 executes steps S121 to S154 shown in FIGS. 7A and 7B.

[0136] The temperature measurement circuit 2 executes steps S121 to S136 in a first period T1, and alternates between State 1a shown in Fig. 5A and State 2a shown in Fig. 5B, or between State 1b shown in Fig. 5C and State 2b shown in Fig. 5D. In the following second period T2, the temperature measurement circuit 2 executes steps S138 to S153, and alternates between State 3a shown in Fig. 5E and State 4a shown in Fig. 5F, or between State 3b shown in Fig. 5G and State 4b shown in Fig. 5H.

[0137] The temperature measurement circuit 2 executes steps S122 to S124 during period T1A included in the first period T1, and enters state 1a shown in Figure 5A. The temperature measurement circuit 2 executes steps S125 to S127 during period T1B included in the first period T1, and enters state 2a shown in Figure 5B. The temperature measurement circuit 2 executes steps S130 to S132 during period T1C included in the first period T1, and enters state 1b shown in Figure 5C. The temperature measurement circuit 2 executes steps S133 to S135 during period T1D included in the first period T1, and enters state 2b shown in Figure 5D.

[0138] The temperature measurement circuit 2 executes steps S139 to S141 during period T2A included in the second period T2, and enters state 3a shown in FIG. 5E. The temperature measurement circuit 2 executes steps S142 to S144 during period T2B included in the second period T2, and enters state 4a shown in FIG. 5F. The temperature measurement circuit 2 executes steps S147 to S149 during period T2C included in the second period T2, and enters state 3b shown in FIG. 5G. The temperature measurement circuit 2 executes steps S150 to S152 during period T2D included in the second period T2, and enters state 4b shown in FIG. 5H.

[0139] (Initialize the number of measurements) In step S121, the switching control circuit 53 initializes the count number i to 0. The count number i indicates the number of times the control signal S1 is set to the first control signal High.

[0140] (Charging during period T1A) 5A, in the next step S122, the control circuit 42 sets the control signal S1 to the first control signal High, and sets the control signal S2 to the first control signal High. The switching control circuit 53 also sets the control signal S3 to the second control signal Low. The switching control circuit 53 also increments the measurement number i.

[0141] As a result, the positive electrode 21b of the first current source 21 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the positive electrode 31b of the first voltage source 31. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are respectively configured as a non-inverting input terminal and an inverting input terminal. As a result, the non-inverting input terminal of the comparator circuit 41 is electrically connected to the positive electrode 31b of the first voltage source 31. Furthermore, the inverting input terminal of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11.

[0142] As a result, the first current source 21 charges the capacitor 11. Furthermore, the comparator circuit 41 compares the first reference voltage Vref with the inter-terminal voltage Vc, and sets the output voltage Vout to the first output voltage High.

[0143] In the next step S123, the control circuit 42 determines whether the time TM1 that has elapsed since the start of the first period T1 is shorter than the first measurement time TF1. If the control circuit 42 determines that the time TM1 is shorter than the first measurement time TF1, it executes step S124. If the control circuit 42 determines that the time TM1 is equal to or longer than the first measurement time TF1, it executes step S137.

[0144] In step S124, the control circuit 42 determines whether the inter-terminal voltage Vc is lower than the first reference voltage Vref based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is lower than the first reference voltage Vref, it executes step S122. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or higher than the first reference voltage Vref, it executes step S125.

[0145] Through steps S122 to S124, the control circuit 42 causes the first current source 21 to continue charging the capacitor 11 and causes the comparator circuit 41 to continue comparing the first reference voltage Vref and the inter-terminal voltage Vc until the time TM1 reaches the first measurement time TF1 or the inter-terminal voltage Vc rises to the first reference voltage Vref. The control circuit 42 ends the first period T1 and starts the second period T2 in synchronization with the time TM1 reaching the first measurement time TF1. The control circuit 42 ends the period T1A and starts the period T1B in synchronization with the inter-terminal voltage Vc rising to the first reference voltage Vref and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0146] (Discharge during period T1B) 5B, in step S125, the control circuit 42 sets the control signal S1 to the second control signal Low and sets the control signal S2 to the first control signal High. The control circuit 42 may set the control signal S2 to the second control signal Low. Also, the switching control circuit 53 sets the control signal S3 to the second control signal Low.

[0147] As a result, the negative electrode 22a of the second current source 22 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32. Furthermore, the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are respectively configured as a non-inverting input terminal and an inverting input terminal. As a result, the non-inverting input terminal of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the inverting input terminal of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32.

[0148] This causes the second current source 22 to discharge the capacitor 11. Furthermore, the comparator circuit 41 compares the inter-terminal voltage Vc with the second reference voltage Vref / M, and sets the output voltage Vout to the first output voltage High.

[0149] In the following step S126, the control circuit 42 determines whether the time TM1 is shorter than the first measurement time TF1. If the control circuit 42 determines that the time TM1 is shorter than the first measurement time TF1, it executes step S127. If the control circuit 42 determines that the time TM1 is equal to or longer than the first measurement time TF1, it executes step S137.

[0150] In step S127, the control circuit 42 determines whether the inter-terminal voltage Vc is higher than the second reference voltage Vref / M based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is higher than the second reference voltage Vref / M, it executes step S125. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or lower than the second reference voltage Vref / M, it executes step S128.

[0151] Through steps S125 to S127, the control circuit 42 causes the second current source 22 to continue discharging the capacitor 11 and causes the comparator circuit 41 to continue comparing the inter-terminal voltage Vc and the second reference voltage Vref / M until the time TM1 reaches the first measurement time TF1 or the inter-terminal voltage Vc drops to the second reference voltage Vref / M. The control circuit 42 ends the first period T1 and starts the second period T2 in synchronization with the time TM1 reaching the first measurement time TF1. The control circuit 42 ends the period T1B and starts the period T1A or T1C in synchronization with the inter-terminal voltage Vc dropping to the second reference voltage Vref / M and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0152] (Determining the number of counts) In step S128, the switching control circuit 53 determines whether the measurement number i has reached the set number N. If the switching control circuit 53 determines that the measurement number i has reached the set number N, it executes step S129. If the switching control circuit 53 determines that the measurement number i has not reached the set number N, it executes step S122.

[0153] Through steps S121 to S128, the control circuit 42 alternately causes the first current source 21 to charge the capacitor 11 and the comparator circuit 41 to compare the first reference voltage Vref and the inter-terminal voltage Vc, and causes the second current source 22 to discharge the capacitor 11 and the comparator circuit 41 to compare the inter-terminal voltage Vc and the second reference voltage Vref / M, until the measurement number i reaches the set number N. The control circuit 42 ends period T1B and starts period T1C in synchronization with the measurement number i reaching the set number N.

[0154] (Initialize the number of measurements) In step S129, the switching control circuit 53 initializes the measurement number i to zero.

[0155] (Charging during period T1C) In the next step S130, as shown in FIG. 5C, the control circuit 42 sets the control signal S1 to the first control signal High and sets the control signal S2 to the first control signal High. The switching control circuit 53 also sets the control signal S3 to the first control signal High. The switching control circuit 53 also increments the measurement number i.

[0156] As a result, the positive electrode 21b of the first current source 21 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the positive electrode 31b of the first voltage source 31. Furthermore, the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are set as the inverting input terminal and the non-inverting input terminal, respectively. As a result, similar to step S122, the non-inverting input terminal of the comparator circuit 41 is electrically connected to the positive electrode 31b of the first voltage source 31. Furthermore, the inverting input terminal of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11.

[0157] As a result, the first current source 21 charges the capacitor 11. Furthermore, the comparator circuit 41 compares the first reference voltage Vref with the inter-terminal voltage Vc, and sets the output voltage Vout to the first output voltage High.

[0158] In the next step S131, the control circuit 42 determines whether the time TM1 that has elapsed since the start of the first period T1 is shorter than the first measurement time TF1. If the control circuit 42 determines that the time TM1 is shorter than the first measurement time TF1, it executes step S132. If the control circuit 42 determines that the time TM1 is equal to or longer than the first measurement time TF1, it executes step S137.

[0159] In step S132, the control circuit 42 determines whether the inter-terminal voltage Vc is lower than the first reference voltage Vref based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is lower than the first reference voltage Vref, it executes step S130. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or higher than the first reference voltage Vref, it executes step S133.

[0160] Through steps S130 to S132, the control circuit 42 causes the first current source 21 to continue charging the capacitor 11 and causes the comparator circuit 41 to continue comparing the first reference voltage Vref and the inter-terminal voltage Vc until the time TM1 reaches the first measurement time TF1 or the inter-terminal voltage Vc rises to the first reference voltage Vref. The control circuit 42 ends the first period T1 and starts the second period T2 in synchronization with the time TM1 reaching the first measurement time TF1. The control circuit 42 ends the period T1C and starts the period T1D in synchronization with the inter-terminal voltage Vc rising to the first reference voltage Vref and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0161] (Discharge during period T1D) In step S133, the control circuit 42 sets the control signal S1 to the second control signal Low and sets the control signal S2 to the first control signal High. The control circuit 42 may set the control signal S2 to the second control signal Low. Also, the switching control circuit 53 sets the control signal S3 to the first control signal High.

[0162] 5D, the negative electrode 22a of the second current source 22 is electrically connected to the terminal 11a of the capacitor 11. The first input terminal 41a of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32. The second input terminal 41b of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. The first input terminal 41a and the second input terminal 41b of the comparator circuit 41 serve as the inverting input terminal and the non-inverting input terminal, respectively. As a result, similar to step S125, the non-inverting input terminal of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. The inverting input terminal of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32.

[0163] This causes the second current source 22 to discharge the capacitor 11. Furthermore, the comparator circuit 41 compares the inter-terminal voltage Vc with the second reference voltage Vref / M, and sets the output voltage Vout to the first output voltage High.

[0164] In the following step S134, the control circuit 42 determines whether the time TM1 is shorter than the first measurement time TF1. If the control circuit 42 determines that the time TM1 is shorter than the first measurement time TF1, it executes step S135. If the control circuit 42 determines that the time TM1 is equal to or longer than the first measurement time TF1, it executes step S137.

[0165] In step S135, the control circuit 42 determines whether the inter-terminal voltage Vc is higher than the second reference voltage Vref / M based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is higher than the second reference voltage Vref / M, it executes step S133. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or lower than the second reference voltage Vref / M, it executes step S136.

[0166] Through steps S133 to S135, the control circuit 42 causes the second current source 22 to continue discharging the capacitor 11 and causes the comparator circuit 41 to continue comparing the inter-terminal voltage Vc with the second reference voltage Vref / M until time TM1 reaches the first measurement time TF1 or the inter-terminal voltage Vc drops to the second reference voltage Vref / M. The control circuit 42 ends the first period T1 and starts the second period T2 in synchronization with time TM1 reaching the first measurement time TF1. The control circuit 42 ends the period T1D and starts the period T1C in synchronization with the inter-terminal voltage Vc dropping to the second reference voltage Vref / M and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0167] (Determining the number of counts) In step S136, the switching control circuit 53 determines whether the measurement number i has reached the set number N. If the switching control circuit 53 determines that the measurement number i has reached the set number N, it executes step S121. If the switching control circuit 53 determines that the measurement number i has not reached the set number N, it executes step S130.

[0168] Through steps S129 to S136, the control circuit 42 alternately causes the first current source 21 to charge the capacitor 11 and the comparator circuit 41 to compare the inter-terminal voltage Vc with the first reference voltage Vref, and causes the second current source 22 to discharge the capacitor 11 and the comparator circuit 41 to compare the inter-terminal voltage Vc with the second reference voltage Vref / M, until the measurement number i reaches the set number N. The control circuit 42 ends the period T1D and starts the period T1A in synchronization with the measurement number i reaching the set number N.

[0169] By steps S121 to S136, in the first period T1, the non-inverting input terminal and the inverting input terminal of the comparator circuit 41 are swapped, and in accordance with the swapping of the non-inverting input terminal and the inverting input terminal, the voltages input to the first input terminal 41 a and the second input terminal 41 a of the comparator circuit 41 are swapped. This makes it possible to cancel out the influence of input offset caused by variations in active elements such as transistors provided in the comparator circuit 41.

[0170] (Resetting the counter circuit and changing the destination for writing the count) In step S137, the counter circuit 43 is reset, and the address where the count number counted by the counter circuit 43 is written is changed from the first address to the second address.

[0171] (Initialize the number of measurements) In step S138, the switching control circuit 53 initializes the measurement number i to zero.

[0172] (Charging during period T2A) 5E, in step S139, the control circuit 42 sets the control signal S1 to the first control signal High and the control signal S2 to the second control signal Low. The switching control circuit 53 also sets the control signal S3 to the second control signal Low. The switching control circuit 53 also increments the measurement number i.

[0173] As a result, the positive electrode 21b of the first current source 21 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the positive electrode 33b of the third voltage source 33. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are respectively configured as a non-inverting input terminal and an inverting input terminal. As a result, the non-inverting input terminal of the comparator circuit 41 is electrically connected to the positive electrode 33b of the third voltage source 33. Furthermore, the inverting input terminal of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11.

[0174] As a result, the first current source 21 charges the capacitor 11. Furthermore, the comparator circuit 41 compares the third reference voltage Vbe with the inter-terminal voltage Vc, and sets the output voltage Vout to the first output voltage High.

[0175] In the next step S140, the control circuit 42 determines whether the time TM2 that has elapsed since the start of the second period T2 is shorter than the second measurement time TF2. If the control circuit 42 determines that the time TM2 is shorter than the second measurement time TF2, it executes step S141. If the control circuit 42 determines that the time TM2 is equal to or longer than the second measurement time TF2, it executes step S154.

[0176] In step S141, the control circuit 42 determines whether the inter-terminal voltage Vc is lower than the third reference voltage Vbe based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is lower than the third reference voltage Vbe, it executes step S139. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or higher than the third reference voltage VbeVref, it executes step S142.

[0177] Through steps S139 to S141, the control circuit 42 causes the first current source 21 to continue charging the capacitor 11 and causes the comparator circuit 41 to continue comparing the third reference voltage Vbe and the inter-terminal voltage Vc until time TM2 reaches the second measurement time TF2 or the inter-terminal voltage Vc rises to the third reference voltage Vbe. The control circuit 42 ends the second period T2 in synchronization with time TM2 reaching the second measurement time TF2. The control circuit 42 ends period T2A and starts period T2B in synchronization with the inter-terminal voltage Vc rising to the third reference voltage Vbe and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0178] (Discharge during period T2B) In step S142, the control circuit 42 sets the control signal S1 to the second control signal Low and sets the control signal S2 to the second control signal Low. The control circuit 42 may set the control signal S2 to the first control signal High. Also, the switching control circuit 53 sets the control signal S3 to the second control signal Low.

[0179] As a result, as shown in FIG. 5F, the negative electrode 22a of the second current source 22 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32. Furthermore, the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are respectively configured as a non-inverting input terminal and an inverting input terminal. As a result, the non-inverting input terminal of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the inverting input terminal of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32.

[0180] This causes the second current source 22 to discharge the capacitor 11. Furthermore, the comparator circuit 41 compares the inter-terminal voltage Vc with the second reference voltage Vref / M, and sets the output voltage Vout to the first output voltage High.

[0181] In the following step S143, the control circuit 42 determines whether the time TM2 is shorter than the second measurement time TF2. If the control circuit 42 determines that the time TM2 is shorter than the second measurement time TF2, it executes step S144. If the control circuit 42 determines that the time TM2 is equal to or longer than the second measurement time TF2, it executes step S154.

[0182] In step S144, the control circuit 42 determines whether the inter-terminal voltage Vc is higher than the second reference voltage Vref / M based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is higher than the second reference voltage Vref / M, it executes step S142. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or lower than the second reference voltage Vref / M, it executes step S145.

[0183] Through steps S142 to S144, the control circuit 42 causes the second current source 22 to continue discharging the capacitor 11 and causes the comparator circuit 41 to continue comparing the inter-terminal voltage Vc and the second reference voltage Vref / M until time TM2 reaches the second measurement time TF2 or the inter-terminal voltage Vc drops to the second reference voltage Vref / M. The control circuit 42 ends the second period T2 in synchronization with time TM2 reaching the second measurement time TF2. The control circuit 42 ends period T2B and starts period T2A or T2C in synchronization with the inter-terminal voltage Vc dropping to the second reference voltage Vref / M and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0184] (Determining the number of counts) In step S145, the switching control circuit 53 determines whether the measurement number i has reached the set number N. If the switching control circuit 53 determines that the measurement number i has reached the set number N, it executes step S146. If the switching control circuit 53 determines that the measurement number i has not reached the set number N, it executes step S139.

[0185] Through steps S138 to S145, the control circuit 42 alternately causes the first current source 21 to charge the capacitor 11 and the comparator circuit 41 to compare the inter-terminal voltage Vc with the third reference voltage Vbe, and causes the second current source 22 to discharge the capacitor 11 and the comparator circuit 41 to compare the inter-terminal voltage Vc with the second reference voltage Vref / M, until the measurement number i reaches the set number N. The control circuit 42 ends the period T2B and starts the period T2C in synchronization with the measurement number i reaching the set number N.

[0186] (Initialize the number of measurements) In step S146, the switching control circuit 53 initializes the measurement number i to zero.

[0187] (Charging during period T2C) 5G, in step S147, the control circuit 42 sets the control signal S1 to the first control signal High and sets the control signal S2 to the second control signal Low. The switching control circuit 53 also sets the control signal S3 to the first control signal High. The switching control circuit 53 also increments the measurement number i.

[0188] As a result, the positive electrode 21b of the first current source 21 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the positive electrode 33b of the third voltage source 33. Furthermore, the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are respectively configured as an inverting input terminal and a non-inverting input terminal. As a result, the non-inverting input terminal of the comparator circuit 41 is electrically connected to the positive electrode 33b of the third voltage source 33. Furthermore, the inverting input terminal of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11.

[0189] As a result, the first current source 21 charges the capacitor 11. Furthermore, the comparator circuit 41 compares the third reference voltage Vbe with the inter-terminal voltage Vc, and sets the output voltage Vout to the first output voltage High.

[0190] In the next step S148, the control circuit 42 determines whether the time TM2 that has elapsed since the start of the second period T2 is shorter than the second measurement time TF2. If the control circuit 42 determines that the time TM2 is shorter than the second measurement time TF2, it executes step S149. If the control circuit 42 determines that the time TM2 is equal to or longer than the second measurement time TF2, it executes step S154.

[0191] In step S149, the control circuit 42 determines whether the inter-terminal voltage Vc is lower than the third reference voltage Vbe based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is lower than the third reference voltage Vbe, it executes step S147. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or higher than the third reference voltage Vbe, it executes step S150.

[0192] Through steps S147 to S149, the control circuit 42 causes the first current source 21 to continue charging the capacitor 11 and causes the comparator circuit 41 to continue comparing the third reference voltage Vbe and the inter-terminal voltage Vc until time TM2 reaches the second measurement time TF2 or the inter-terminal voltage Vc rises to the third reference voltage Vbe. The control circuit 42 ends the second period T2 in synchronization with time TM2 reaching the second measurement time TF2. The control circuit 42 ends period T2C and starts period T2D in synchronization with the inter-terminal voltage Vc rising to the third reference voltage Vbe and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0193] (Discharge during period T2D) In step S150, as shown in FIG. 5H, the control circuit 42 sets the control signal S1 to the second control signal Low and sets the control signal S2 to the second control signal Low. The control circuit 42 may set the control signal S2 to the first control signal High. Also, the switching control circuit 53 sets the control signal S3 to the first control signal High.

[0194] As a result, the negative electrode 22a of the second current source 22 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32. Furthermore, the second input terminal 41b of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are respectively configured as an inverting input terminal and a non-inverting input terminal. As a result, the non-inverting input terminal of the comparator circuit 41 is electrically connected to the terminal 11a of the capacitor 11. Furthermore, the inverting input terminal of the comparator circuit 41 is electrically connected to the positive electrode 32b of the second voltage source 32.

[0195] This causes the second current source 22 to discharge the capacitor 11. Furthermore, the comparator circuit 41 compares the inter-terminal voltage Vc with the second reference voltage Vref / M, and sets the output voltage Vout to the first output voltage High.

[0196] In the next step S151, the control circuit 42 determines whether the time TM2 is shorter than the second measurement time TF2. If the control circuit 42 determines that the time TM2 is shorter than the second measurement time TF2, it executes step S152. If the control circuit 42 determines that the time TM2 is equal to or longer than the second measurement time TF2, it executes step S154.

[0197] In step S152, the control circuit 42 determines whether the inter-terminal voltage Vc is higher than the second reference voltage Vref / M based on the output voltage Vout. If the control circuit 42 determines that the inter-terminal voltage Vc is higher than the second reference voltage Vref / M, it executes step S150. If the control circuit 42 determines that the inter-terminal voltage Vc is equal to or lower than the second reference voltage Vref / M, it executes step S153.

[0198] Through steps S150 to S152, the control circuit 42 causes the second current source 22 to continue discharging the capacitor 11 and causes the comparator circuit 41 to continue comparing the terminal voltage Vc and the second reference voltage Vref / M until time TM2 reaches the second measurement time TF2 or the inter-terminal voltage Vc drops to the second reference voltage Vref / M. The control circuit 42 ends the second period T2 in synchronization with time TM2 reaching the second measurement time TF2. The control circuit 42 ends the period T2D and starts the period T2A or T2C in synchronization with the inter-terminal voltage Vc dropping to the second reference voltage Vref / M and the output voltage Vout changing from the first output voltage High to the second output voltage Low.

[0199] (Determining the number of counts) In step S153, the switching control circuit 53 determines whether the measurement number i has reached the set number N. If the switching control circuit 53 determines that the measurement number i has reached the set number N, it executes step S138. If the switching control circuit 53 determines that the measurement number i has not reached the set number N, it executes step S147.

[0200] Through steps S146 to S153, the control circuit 42 alternately causes the first current source 21 to charge the capacitor 11 and causes the comparator circuit 41 to compare the third reference voltage Vbe and the inter-terminal voltage Vc, and causes the second current source 22 to discharge the capacitor 11 and causes the comparator circuit 41 to compare the inter-terminal voltage Vc and the second reference voltage Vref / M, until the measurement number i reaches the set number N.

[0201] (Reading out the count number) In step S154, the counter circuit 43 reads the count numbers from the first address and the second address, and obtains the first frequency F1 in the first period T1 and the second frequency F2 in the second period T2 of the control signal S1 from the count numbers read from the first address and the second address. Also, the temperature obtainment unit 45 obtains the temperature based on the first frequency F1 and the second frequency F2.

[0202] 2.4 Time variations of the first input voltage, the second input voltage, the terminal voltage, and the control signal

[0203] (Change over time in the first period T1) Figure 8A is a timing chart showing the time changes over a first period T1 of the first input voltage Vin1 and the second input voltage Vin2 input to the comparator provided in the temperature measurement circuit of the second embodiment, the terminal voltage Vc generated by the capacitor provided in the temperature measurement circuit, the control signal S1 output by the control circuit provided in the temperature measurement circuit, and the control signal S3 output by the switching control circuit provided in the temperature measurement circuit.

[0204] As shown in FIG. 8A, in the temperature measurement circuit 2, by steps S121 to S136, while the control signal S3 of the first period T1 is set to the second control signal Low, that is, while the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are set to the non-inverting input terminal and the inverting input terminal, respectively, the periods T1A and T1B occur alternately, and while the control signal S3 of the first period T1 is set to the first control signal High, that is, while the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are set to the inverting input terminal and the non-inverting input terminal, respectively, the periods T1C and T1D occur alternately.

[0205] During period T1A, the first input voltage Vin1 and the second input voltage Vin2 are set to the first reference voltage Vref and the inter-terminal voltage Vc, respectively. The inter-terminal voltage Vc increases over time. This increases the inter-terminal voltage Vc from the second reference voltage Vref / M to the first reference voltage Vref. The control signal S1 is maintained at the first control signal High.

[0206] During period T1B, the first input voltage Vin1 and the second input voltage Vin2 are set to the inter-terminal voltage Vc and the second reference voltage Vref / M, respectively. The inter-terminal voltage Vc decreases over time. As a result, the inter-terminal voltage Vc decreases from the first reference voltage Vref to the second reference voltage Vref / M. The control signal S1 is maintained at the second control signal Low.

[0207] During period T1C, contrary to period T1A, the first input voltage Vin1 and the second input voltage Vin2 are set to the inter-terminal voltage Vc and the first reference voltage Vref, respectively. Furthermore, the inter-terminal voltage Vc increases over time. As a result, the inter-terminal voltage Vc increases from the second reference voltage Vref / M to the first reference voltage Vref. Furthermore, the control signal S1 is maintained at the first control signal High.

[0208] During period T1D, contrary to period T1B, the first input voltage Vin1 and the second input voltage Vin2 are set to the second reference voltage Vref / M and the inter-terminal voltage Vc, respectively. Furthermore, the inter-terminal voltage Vc decreases over time. As a result, the inter-terminal voltage Vc decreases from the first reference voltage Vref to the second reference voltage Vref / M. Furthermore, the control signal S1 is maintained at the second control signal Low.

[0209] In periods T1A and T1C, the non-inverting input terminal and the inverting input terminal of the comparator circuit 41 are swapped. In periods T1B and T1D, the non-inverting input terminal and the inverting input terminal of the comparator circuit 41 are swapped. This makes it possible to cancel out the influence of input offset caused by variations in active elements such as transistors provided in the comparator circuit 41.

[0210] (Changes over time in the second period T2) Figure 8B is a timing chart showing the time changes over a second period T2 of the first input voltage Vin1 and the second input voltage Vin2 input to the comparator provided in the temperature measurement circuit of the second embodiment, the terminal voltage Vc generated by the capacitor provided in the temperature measurement circuit, the control signal S1 output by the control circuit provided in the temperature measurement circuit, and the control signal S3 output by the switching control circuit provided in the temperature measurement circuit.

[0211] As shown in FIG. 8B, in the temperature measurement circuit 2, by steps S138 to S153, while the control signal S3 of the second period T2 is set to the second control signal Low, that is, while the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are set to the non-inverting input terminal and the inverting input terminal, respectively, the periods T2A and T2B occur alternately, and while the control signal S3 of the second period T2 is set to the first control signal High, that is, while the first input terminal 41a and the second input terminal 41b of the comparator circuit 41 are set to the inverting input terminal and the non-inverting input terminal, respectively, the periods T2C and T2D occur alternately.

[0212] During period T2A, the first input voltage Vin1 and the second input voltage Vin2 are set to the third reference voltage Vbe and the inter-terminal voltage Vc, respectively. The inter-terminal voltage Vc increases over time. This increases the inter-terminal voltage Vc from the second reference voltage Vref / M to the third reference voltage Vbe. The control signal S1 is maintained at the first control signal High.

[0213] During period T2B, the first input voltage Vin1 and the second input voltage Vin2 are set to the inter-terminal voltage Vc and the second reference voltage Vref / M, respectively. The inter-terminal voltage Vc decreases over time. As a result, the inter-terminal voltage Vc decreases from the third reference voltage Vbe to the second reference voltage Vref / M. The control signal S1 is maintained at the second control signal Low.

[0214] During period T2C, contrary to period T2A, the first input voltage Vin1 and the second input voltage Vin2 are set to the inter-terminal voltage Vc and the third reference voltage Vbe, respectively. Furthermore, the inter-terminal voltage Vc increases over time. As a result, the inter-terminal voltage Vc increases from the second reference voltage Vref / M to the third reference voltage Vbe. Furthermore, the control signal S1 is maintained at the first control signal High.

[0215] During period T2D, contrary to period T2B, the first input voltage Vin1 and the second input voltage Vin2 are set to the second reference voltage Vref / M and the inter-terminal voltage Vc, respectively. Furthermore, the inter-terminal voltage Vc decreases over time. As a result, the inter-terminal voltage Vc decreases from the third reference voltage Vbe to the second reference voltage Vref / M. Furthermore, the control signal S1 is maintained at the second control signal Low.

[0216] During periods T2A and T2C, the non-inverting input terminal and the inverting input terminal of the comparator circuit 41 are swapped. During periods T2B and T2D, the non-inverting input terminal and the inverting input terminal of the comparator circuit 41 are swapped. This makes it possible to cancel out the influence of input offset caused by variations in active elements such as transistors provided in the comparator circuit 41.

[0217] The present disclosure is not limited to the above-described embodiments, and may be replaced with a configuration that is substantially the same as the configuration shown in the above-described embodiments, a configuration that has the same effect, or a configuration that can achieve the same purpose. [Explanation of symbols]

[0218] 1, 2 temperature measurement circuit, 11 capacitor, 11a, 11b terminal, 21 first current source, 21a negative electrode, 21b positive electrode, 22 second current source, 22a negative electrode, 22b positive electrode, 31 first voltage source, 31a negative electrode, 31b positive electrode, 32 second voltage source, 32a negative electrode, 32b positive electrode, 33 third voltage source, 33a negative electrode, 33b positive electrode, 41 comparator circuit, 41a first input terminal, 41b second input terminal, 41c output terminal, 42 control circuit, 42a input terminal, 42b output terminal, 43 counter circuit, 44 memory, 45 temperature acquisition unit, 51 First switch circuit, 51a, 51b, 51c, 51d, 51e, 51f, 51g, 51h, 51i, 51j, 51k terminals, 52 second switch circuit, 52a, 52b, 52c terminals, 53 switching control circuit, 61 current source, 62 bipolar transistor, 62a base, 62b collector, 62c emitter, 71 differential input circuit, 72 output circuit, 81 mirror pair, 82 differential pair, 83 constant current source, 84 switching circuit, 81p, 81m, 82p, 82m active elements.

Claims

1. a capacitor that generates a voltage between its terminals according to the amount of charge stored therein; a first current source that supplies a first current; a second current source that supplies a second current; a first voltage source that generates a first reference voltage; a second voltage source that generates a second reference voltage; a third voltage source that generates a third reference voltage according to temperature; a comparator circuit that outputs an output voltage that indicates the difference between two input voltages; a first switch circuit that charges the capacitor with the first current when a first control signal is input, and sets the two input voltages to a selected reference voltage and the voltage between the terminals, and that discharges the capacitor with the second current when a second control signal is input, and sets the two input voltages to the second reference voltage and the voltage between the terminals; a second switch circuit that is in a first connection state in which the selected reference voltage is the first reference voltage or in a second connection state in which the selected reference voltage is the third reference voltage; a control circuit that, during a first period, while the control signal is set to the first control signal and the second switch circuit is in the first connection state, sets the control signal to the second control signal in response to the output voltage indicating that the inter-terminal voltage has become higher than the first reference voltage, and while the control signal is set to the second control signal, sets the control signal to the first control signal and places the second switch circuit in the first connection state in response to the output voltage indicating that the inter-terminal voltage has become lower than the second reference voltage; and, during a second period, while the control signal is set to the first control signal and the second switch circuit is in the second connection state, sets the control signal to the second control signal in response to the output voltage indicating that the inter-terminal voltage has become higher than the third reference voltage, and sets the control signal to the first control signal and places the second switch circuit in the second connection state in response to the output voltage indicating that the inter-terminal voltage has become lower than the second reference voltage; a counter circuit that counts a first frequency of the control signal in the first period and a second frequency of the control signal in the second period; a temperature acquisition unit that acquires the temperature based on the first frequency and the second frequency; A temperature measurement circuit comprising:

2. The first reference voltage and the second reference voltage are stable with respect to the temperature. The temperature measurement circuit according to claim 1 .

3. The second reference voltage is 1 / M times the first reference voltage, where M is a positive value greater than 1. The temperature measurement circuit according to claim 1 or 2.

4. the third voltage source comprises a bipolar transistor having a base, a collector, and an emitter; The third reference voltage is generated between the base and the emitter. The temperature measurement circuit according to claim 1 or 2.

5. The temperature acquisition unit obtains the third reference voltage Vbe from the first reference voltage Vref, the second reference voltage Vref / M, the first frequency F1, and the second frequency F2 according to equation (1), and acquires the temperature from the temperature characteristics of the third reference voltage Vbe. [Equation 1] The temperature measurement circuit according to claim 1 or 2.

6. A switching control circuit is provided which divides the frequency of the control signal and outputs the divided control signal. The temperature measurement circuit according to claim 1 or 2.

7. The comparator circuit a first input terminal to which one of the two input voltages is input; a second input terminal to which the other of the two input voltages is input; a switching circuit that, while the frequency-divided control signal is the first control signal, sets the output voltage to a first output voltage if one of the control signals is higher than the other, and sets the output voltage to a second output voltage if the one of the control signals is lower than the other, and, while the frequency-divided control signal is the second control signal, sets the output voltage to the second output voltage if the one of the control signals is higher than the other, and sets the output voltage to the first output voltage if the one of the control signals is lower than the other; Equipped with The temperature measurement circuit according to claim 6 .

8. the two input voltages are a first input voltage and a second input voltage; the comparator circuit sets the output voltage to a first output voltage when the first input voltage is higher than the second input voltage, and sets the output voltage to a second output voltage when the first input voltage is lower than the second input voltage; setting the selected reference voltage and the terminal voltage as the two input voltages means setting the selected reference voltage and the terminal voltage as the first input voltage and the second input voltage, respectively; setting the second reference voltage and the inter-terminal voltage as the two input voltages means setting the second reference voltage and the inter-terminal voltage as the second input voltage and the first input voltage, respectively; The output voltage indicating that the terminal voltage has become higher than the first reference voltage is a change of the output voltage from the first output voltage to the second output voltage; The output voltage indicating that the terminal voltage has become lower than the second reference voltage is a change of the output voltage from the first output voltage to the second output voltage; When the output voltage indicates that the terminal voltage has become higher than the third reference voltage, the output voltage changes from the first output voltage to the second output voltage. The temperature measurement circuit according to claim 1 or 2.

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