Display device

Abstract

To provide a display device having a touch panel function, including an illuminance sensor on a back surface side, and capable of taking in a sufficient amount of light for the illuminance sensor to measure the illuminance of light entering from a front surface side.SOLUTION: A display device according to an embodiment includes: a substrate; a plurality of pixels each including a display element composed of a lower electrode, an upper electrode, and an organic layer; a partition wall including a lower part with conductivity and an upper part projecting from a side surface of the lower part and surrounding each pixel; a touch panel electrode for detecting an object that comes into contact with or approaches a display region; and an illuminance sensor disposed on a back surface side of the substrate and for measuring the illuminance of light entering from a front surface side of the substrate. Each pixel includes a transmission region where the display element is not disposed. The touch panel electrode includes a metal wire that is located above the partition wall, extends along the partition wall, and has a crank shape near the transmission region included in each pixel.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a display device. [Background technology]

[0002] In recent years, display devices using organic light-emitting diodes (OLEDs) as display elements have come into practical use. These display elements include a lower electrode, an organic layer covering the lower electrode, and an upper electrode covering the organic layer.

[0003] A display device may have a touch panel function that detects user operations on the display area. When electrodes for realizing such a function are arranged in the display area, it is necessary to devise a structure for the display device so as to prevent a deterioration in display quality due to the electrodes.

[0004] Furthermore, the display device may have an illuminance sensor on the back side and a function of adjusting the brightness of the display device according to the illuminance measured by the illuminance sensor. To realize such a function, it is necessary to provide a transmissive region within the display area that can capture a sufficient amount of light for the illuminance sensor to measure the illuminance of light incident from the front side of the display device, and further improvement is required in the structure of the display device. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-195677 [Patent Document 2] Japanese Patent Application Laid-Open No. 2004-207217 [Patent Document 3] Japanese Patent Application Laid-Open No. 2008-135325 [Patent Document 4] Japanese Patent Application Laid-Open No. 2009-32673 [Patent Document 5] Japanese Patent Application Laid-Open No. 2010-118191 [Patent Document 6] International Publication No. 2018 / 179308 [Patent Document 7] US Patent Application Publication No. 2022 / 0077251 Summary of the Invention [Problem to be solved by the invention]

[0006] The object of the present invention is to provide a display device that has touch panel functionality and an illuminance sensor on the back side, which is capable of capturing a sufficient amount of light for measuring the illuminance of light incident from the front side. [Means for solving the problem]

[0007] A display device according to one embodiment includes a substrate having a display area for displaying an image, a plurality of pixels arranged in the display area, each pixel including a display element formed of a lower electrode, an upper electrode facing the lower electrode, and an organic layer disposed between the lower electrode and the upper electrode and emitting light in response to a potential difference between the lower electrode and the upper electrode, a partition wall including a conductive lower portion and an upper portion protruding from a side surface of the lower portion and surrounding each pixel, a touch panel electrode for detecting an object in contact with or near the display area, and an illuminance sensor disposed on the back side of the substrate and measuring the illuminance of light incident from the front side of the substrate. Each pixel includes a transmissive area where the display element is not disposed. The touch panel electrode includes a metal wire located above and extending along the partition wall, the metal wire forming a crank shape near the transmissive area included in each pixel. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view showing an example of the configuration of a display device according to an embodiment. [Figure 2] FIG. 2 is a diagram showing an example of a layout of sub-pixels. [Figure 3] FIG. 3 is a schematic cross-sectional view of the display device taken along line III-III in FIG. [Figure 4]FIG. 4 is a schematic plan view showing elements for realizing functions related to the touch panel. [Figure 5] FIG. 5 is a schematic cross-sectional view of the display device in the peripheral region. [Figure 6] FIG. 6 is a schematic plan view of pixels and metal lines according to a comparative example. [Figure 7] FIG. 7 is a schematic plan view of pixels and metal lines according to a comparative example. [Figure 8] FIG. 8 is a schematic plan view of pixels and metal lines in the same embodiment. [Figure 9] FIG. 9 is a schematic plan view of pixels and metal lines in the same embodiment. [Figure 10] FIG. 10 is a schematic plan view of pixels and metal lines in the same embodiment. [Figure 11] FIG. 11 is a schematic plan view of pixels and metal lines according to a modified example. [Figure 12] FIG. 12 is a schematic plan view of pixels and metal lines according to a modified example. DETAILED DESCRIPTION OF THE INVENTION

[0009] Some embodiments will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily make while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment for the sake of clarity, but these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each drawing, components that perform the same or similar functions as those described above with reference to the previous drawings are designated by the same reference numerals, and redundant detailed descriptions may be omitted as appropriate.

[0010] In the drawings, mutually perpendicular X, Y, and Z axes are shown as necessary to facilitate understanding. The direction along the X axis is referred to as the first direction X, the direction along the Y axis is referred to as the second direction Y, and the direction along the Z axis is referred to as the third direction Z. The third direction Z is a normal direction to a plane including the first direction X and the second direction Y. Furthermore, viewing various elements parallel to the plane including the first direction X and the second direction Y is referred to as planar view.

[0011] The display device according to one embodiment is an organic electroluminescence display device that includes an organic light-emitting diode (OLED) as a display element, and can be installed in various electronic devices such as televisions, personal computers, in-vehicle devices, tablet devices, smartphones, mobile phone devices, and wearable devices.

[0012] 1 is a diagram showing an example of the configuration of a display device DSP according to one embodiment. The display device DSP has a display area DA for displaying an image and a peripheral area SA surrounding the display area DA, on an insulating substrate 10. The substrate 10 may be made of glass or a flexible resin film.

[0013] In this embodiment, the shape of the substrate 10 in plan view is rectangular. However, the shape of the substrate 10 in plan view is not limited to rectangular, and may be other shapes such as square, circle, or ellipse.

[0014] The display area DA includes a plurality of pixels PX arranged in a matrix in the first direction X and the second direction Y. Each pixel PX includes a plurality of subpixels SP. In one example, the pixel PX includes a red subpixel SP1 (first subpixel), a green subpixel SP2 (second subpixel), and a blue subpixel SP3 (third subpixel). The pixel PX may include subpixels SP of other colors, such as white, in addition to or instead of the subpixels SP1, SP2, and SP3.

[0015] The subpixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a drive transistor 3, and a capacitor 4. The pixel switch 2 and the drive transistor 3 are switching elements formed of, for example, thin film transistors.

[0016] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the drive transistor 3 and the capacitor 4. In the drive transistor 3, one of the source electrode and drain electrode is connected to the power line PL and the capacitor 4, and the other is connected to the display element DE.

[0017] The configuration of the pixel circuit 1 is not limited to the example shown in the drawing. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0018] Fig. 2 is a diagram showing an example of the layout of subpixels SP1, SP2, and SP3. In the example of Fig. 2, subpixels SP1 and SP2 are aligned in the second direction Y. Furthermore, subpixels SP1 and SP2 are aligned in the first direction X with subpixel SP3.

[0019] When the subpixels SP1, SP2, and SP3 are laid out in this manner, the display area DA is formed with a column in which the subpixels SP1 and SP2 are alternately arranged in the second direction Y, and a column in which a plurality of subpixels SP3 are repeatedly arranged in the second direction Y. These columns are arranged alternately in the first direction X. Note that the layout of the subpixels SP1, SP2, and SP3 is not limited to the example in FIG. 2.

[0020] In the display area DA, ribs 5 and partition walls 6 are arranged. The ribs 5 have pixel apertures AP1, AP2, and AP3 in the subpixels SP1, SP2, and SP3, respectively. In the example of Fig. 2, the pixel aperture AP2 is larger than the pixel aperture AP1, and the pixel aperture AP3 is larger than the pixel aperture AP2.

[0021] The partitions 6 are arranged at the boundaries between adjacent subpixels SP and overlap the ribs 5 in a plan view. The partitions 6 have a plurality of first partitions 6x extending in the first direction X and a plurality of second partitions 6y extending in the second direction Y. The plurality of first partitions 6x are arranged between the pixel openings AP1 and AP2 adjacent to each other in the second direction Y and between two pixel openings AP3 adjacent to each other in the second direction Y. The second partitions 6y are arranged between the pixel openings AP1 and AP3 adjacent to each other in the first direction X and between the pixel openings AP2 and AP3 adjacent to each other in the first direction X.

[0022] 2, the first partition 6x and the second partition 6y are connected to each other. As a result, the partition 6 as a whole has a lattice shape surrounding the pixel openings AP1, AP2, and AP3. It can also be said that the partition 6 has openings in the subpixels SP1, SP2, and SP3, similar to the ribs 5.

[0023] Subpixel SP1 includes a lower electrode LE1, an upper electrode UE1, and an organic layer OR1 that overlap pixel aperture AP1. Subpixel SP2 includes a lower electrode LE2, an upper electrode UE2, and an organic layer OR2 that overlap pixel aperture AP2. Subpixel SP3 includes a lower electrode LE3, an upper electrode UE3, and an organic layer OR3 that overlap pixel aperture AP3.

[0024] The portions of the lower electrode LE1, upper electrode UE1, and organic layer OR1 that overlap with the pixel aperture AP1 constitute the display element DE1 of the subpixel SP1. The portions of the lower electrode LE2, upper electrode UE2, and organic layer OR2 that overlap with the pixel aperture AP2 constitute the display element DE2 of the subpixel SP2. The portions of the lower electrode LE3, upper electrode UE3, and organic layer OR3 that overlap with the pixel aperture AP3 constitute the display element DE3 of the subpixel SP3. The display elements DE1, DE2, and DE3 may further include a cap layer, which will be described later. The ribs 5 and the partition walls 6 surround each of these display elements DE1, DE2, and DE3.

[0025] The lower electrode LE1 is connected to the pixel circuit 1 of the subpixel SP1 (see FIG. 1) through a contact hole CH1. The lower electrode LE2 is connected to the pixel circuit 1 of the subpixel SP2 through a contact hole CH2. The lower electrode LE3 is connected to the pixel circuit 1 of the subpixel SP3 through a contact hole CH3.

[0026] 2, the contact holes CH1 and CH2 entirely overlap with the first partition wall 6x between the pixel openings AP1 and AP2 adjacent to each other in the second direction Y. The contact hole CH3 entirely overlaps with the first partition wall 6x between two pixel openings AP3 adjacent to each other in the second direction Y. As another example, at least a portion of the contact holes CH1, CH2, and CH3 may not overlap with the first partition wall 6x.

[0027] Fig. 3 is a schematic cross-sectional view of the display device DSP taken along line III-III in Fig. 2. A circuit layer 11 is disposed on the above-mentioned substrate 10. The circuit layer 11 includes various circuits and wiring such as the pixel circuits 1, scanning lines GL, signal lines SL, and power supply lines PL shown in Fig. 1.

[0028] The circuit layer 11 is covered with an organic insulating layer 12. The organic insulating layer 12 functions as a planarizing film that flattens unevenness caused by the circuit layer 11. Although not shown in the cross section of FIG. 3, the above-mentioned contact holes CH1, CH2, and CH3 are provided in the organic insulating layer 12.

[0029] The lower electrodes LE1, LE2, and LE3 are disposed on the organic insulating layer 12. The rib 5 is disposed on the organic insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The ends of the lower electrodes LE1, LE2, and LE3 are covered by the rib 5.

[0030] The partition wall 6 includes a conductive lower portion 61 disposed on the rib 5 and an upper portion 62 disposed on the lower portion 61. The upper portion 62 has a width greater than that of the lower portion 61. As a result, both ends of the upper portion 62 protrude beyond the side surfaces of the lower portion 61 in FIG. 3. Such a shape of the partition wall 6 is called an overhanging shape.

[0031] The organic layer OR1 covers the lower electrode LE1 through the pixel opening AP1. The upper electrode UE1 covers the organic layer OR1 and faces the lower electrode LE1. The organic layer OR2 covers the lower electrode LE2 through the pixel opening AP2. The upper electrode UE2 covers the organic layer OR2 and faces the lower electrode LE2. The organic layer OR3 covers the lower electrode LE3 through the pixel opening AP3. The upper electrode UE3 covers the organic layer OR3 and faces the lower electrode LE3.

[0032] 3, a cap layer CP1 is disposed on the upper electrode UE1, a cap layer CP2 is disposed on the upper electrode UE2, and a cap layer CP3 is disposed on the upper electrode UE3. The cap layers CP1, CP2, and CP3 adjust the optical properties of the light emitted by the organic layers OR1, OR2, and OR3, respectively.

[0033] In the following description, a laminate including an organic layer OR1, an upper electrode UE1, and a cap layer CP1 will be referred to as a thin film FL1, a laminate including an organic layer OR2, an upper electrode UE2, and a cap layer CP2 will be referred to as a thin film FL2, and a laminate including an organic layer OR3, an upper electrode UE3, and a cap layer CP3 will be referred to as a thin film FL3.

[0034] A part of the thin film FL1 is located on the upper part 62. This part is separated from a part of the thin film FL1 located below the partition wall 6 (a part that constitutes the display element DE1). Similarly, a part of the thin film FL2 is located on the upper part 62, and this part is separated from a part of the thin film FL2 located below the partition wall 6 (a part that constitutes the display element DE2). Furthermore, a part of the thin film FL3 is located on the upper part 62, and this part is separated from a part of the thin film FL3 located below the partition wall 6 (a part that constitutes the display element DE3).

[0035] Sealing layers SE11, SE12, and SE13 (first sealing layers) are disposed in the subpixels SP1, SP2, and SP3, respectively. The sealing layer SE11 continuously covers the thin film FL1 and the partition wall 6 around the subpixel SP1. The sealing layer SE12 continuously covers the thin film FL2 and the partition wall 6 around the subpixel SP2. The sealing layer SE13 continuously covers the thin film FL3 and the partition wall 6 around the subpixel SP3. The sealing layers SE11, SE12, and SE13 cover the pixel PX as a whole. Hereinafter, when there is no need to distinguish between the sealing layers SE11, SE12, and SE13, they may be simply referred to as sealing layer SE1.

[0036] 3, the thin film FL1 and the sealing layer SE11 on the partition wall 6 between the subpixels SP1 and SP3 are spaced apart from the thin film FL3 and the sealing layer SE13 on the partition wall 6. In addition, the thin film FL2 and the sealing layer SE12 on the partition wall 6 between the subpixels SP2 and SP3 are spaced apart from the thin film FL3 and the sealing layer SE13 on the partition wall 6.

[0037] The sealing layers SE11, SE12, and SE13 are covered with a resin layer RS1 (first resin layer). The resin layer RS1 is covered with a sealing layer SE2 (second sealing layer). The sealing layer SE2 is covered with a resin layer RS2 (second resin layer). The resin layers RS1 and RS2 and the sealing layer SE2 are provided continuously at least over the entire display area DA, with portions thereof extending into the peripheral area SA.

[0038] A cover member such as a polarizing plate, a touch panel, a protective film, or a cover glass may be further disposed above the resin layer RS2. Such a cover member may be adhered to the resin layer RS2 via an adhesive layer such as OCA (Optical Clear Adhesive).

[0039] 3, metal lines ML that constitute the touch panel electrodes TP are disposed on the sealing layer SE2. The metal lines ML are located above the partition walls 6 and extend generally along the partition walls 6. The metal layers ML are covered with a resin layer RS2.

[0040] The organic insulating layer 12 is formed of an organic insulating material. The rib 5 and sealing layers SE11, SE12, SE13, and SE2 are formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON). The rib 5 and sealing layers SE11, SE12, SE13, and SE2 may be a laminate of different types of inorganic insulating materials. The resin layers RS1 and RS2 are formed of a resin material (organic insulating material) such as epoxy resin or acrylic resin.

[0041] The lower electrodes LE1, LE2, and LE3 each include a reflective layer made of, for example, silver (Ag) and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer. Each conductive oxide layer can be made of a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0042] The upper electrodes UE1, UE2, UE3 are formed of a metal material such as an alloy of magnesium and silver (MgAg). For example, the lower electrodes LE1, LE2, LE3 correspond to anodes, and the upper electrodes UE1, UE2, UE3 correspond to cathodes.

[0043] The organic layers OR1, OR2, and OR3 each have a stacked structure of, for example, a hole injection layer, a hole transport layer, an electron blocking layer, an emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer. The organic layers OR1, OR2, and OR3 may also have a so-called tandem structure including multiple emitting layers.

[0044] The cap layers CP1, CP2, and CP3 are formed, for example, by a multilayer structure of multiple transparent thin films. The multiple thin films may include thin films formed from inorganic materials and thin films formed from organic materials. Furthermore, these multiple thin films have different refractive indices. The material of the thin films that make up the multilayer structure is different from the material of the upper electrodes UE1, UE2, and UE3 and also different from the material of the sealing layers SE11, SE12, and SE13. The cap layers CP1, CP2, and CP3 may be omitted.

[0045] The metal wires ML are made of a metal material. In one example, the metal wires ML have a layered structure of titanium (Ti), aluminum (Al), and titanium. However, the metal wires ML may have a layered structure of other metal materials or a single-layer structure.

[0046] The lower portion 61 of the partition wall 6 is formed of, for example, aluminum. The lower portion 61 may be formed of an aluminum alloy such as aluminum-neodymium (AlNd), or may have a laminated structure of an aluminum layer and an aluminum alloy layer. Furthermore, the lower portion 61 may have a thin film formed of a metal material other than aluminum or an aluminum alloy below the aluminum layer or aluminum alloy layer. Such a thin film may be formed of, for example, molybdenum (Mo).

[0047] The upper portion 62 of the partition wall 6 has a laminated structure of a thin film made of a metal material such as titanium and a thin film made of a conductive oxide such as ITO. The upper portion 62 may have a single-layer structure made of a metal material such as titanium. Alternatively, the upper portion 62 may have a single-layer structure made of an inorganic insulating material different from the sealing layers SE11, SE12, and SE13.

[0048] A common voltage is supplied to the partition wall 6. This common voltage is supplied to each of the upper electrodes UE1, UE2, and UE3 in contact with the side surfaces of the lower portion 61. A pixel voltage is supplied to each of the lower electrodes LE1, LE2, and LE3 through the pixel circuits 1 included in the subpixels SP1, SP2, and SP3, respectively.

[0049] When a potential difference is created between the lower electrode LE1 and the upper electrode UE1, the light-emitting layer of the organic layer OR1 emits light in the red wavelength range. When a potential difference is created between the lower electrode LE2 and the upper electrode UE2, the light-emitting layer of the organic layer OR2 emits light in the green wavelength range. When a potential difference is created between the lower electrode LE3 and the upper electrode UE3, the light-emitting layer of the organic layer OR3 emits light in the blue wavelength range.

[0050] As another example, the light-emitting layers of the organic layers OR1, OR2, and OR3 may emit light of the same color (e.g., white). In this case, the display device DSP may include color filters that convert the light emitted by the light-emitting layers into light of the colors corresponding to the subpixels SP1, SP2, and SP3. The display device DSP may also include a layer containing quantum dots that are excited by the light emitted by the light-emitting layers to generate light of the colors corresponding to the subpixels SP1, SP2, and SP3.

[0051] FIG. 4 is a schematic plan view showing elements for realizing functions related to a touch panel. The substrate 10 has end portions 10a, 10b, 10c, and 10d. The end portions 10a and 10b extend parallel to the second direction Y. The end portions 10c and 10d extend parallel to the first direction X. A plurality of touch panel electrodes TP are arranged in a display area DA on the substrate 10. In the example of FIG. 4, 16 touch panel electrodes TP1 to TP16 (4 rows x 4 columns) are arranged in a matrix. The touch panel electrodes TP1 to TP8 are located in the left half of the display area DA, and the touch panel electrodes TP9 to TP16 are located in the right half of the display area DA. Note that the number and arrangement of the touch panel electrodes TP are not limited to this example.

[0052] Lead wires LL1 to LL16 are connected to the touch panel electrodes TP1 to TP16, respectively. The lead wires LL1 to LL8 are electrically connected to the terminal portion T via a connection portion TCN1. The lead wires LL9 to LL16 are electrically connected to the terminal portion T via a connection portion TCN2. For example, the touch panel electrodes TP1 to TP8, the lead wires LL1 to LL8, and the connection portion TCN1, and the touch panel electrodes TP9 to TP16, the lead wires LL9 to LL16, and the connection portion TCN2 have shapes that are line-symmetrical with respect to the center line of the display device DSP in the first direction X.

[0053] One end of a flexible circuit board FPC is connected to the terminal portion T via, for example, a conductive adhesive. The other end of the flexible circuit board FPC is connected to the board of an electronic device on which the display device DSP is mounted. Video signals and power required for image display are supplied to the display device DSP through the flexible circuit board FPC.

[0054] The display device DSP further includes a display controller CT1 that performs control related to image display and a detection controller CT2 that performs control related to touch detection. These controllers CT1 and CT2 are configured, for example, with ICs and mounted on a flexible circuit board FPC. The controllers CT1 and CT2 may be mounted on separate flexible circuit boards, and these flexible circuit boards may be connected to the terminal units T, respectively.

[0055] In this embodiment, it is assumed that the touch panel electrodes TP1 to TP16 constitute a capacitive touch panel. For example, the detection controller CT2 identifies the position where an object, such as a user's finger, has touched or approached the display area DA based on a change in the capacitance of the touch panel electrodes TP1 to TP16 that occurs when the object touches or approaches the display area DA. This type of method is called a self-capacitance method.

[0056] However, a mutual capacitance method can also be used to detect objects. In this case, in addition to touch panel electrodes TP1 to TP16, drive electrodes are arranged in the display area DA. When an object touches or approaches the display area DA, the electric field between the touch panel electrodes TP1 to TP16 and the drive electrodes is affected by the object, causing a change in capacitance between the touch panel electrodes TP1 to TP16 and the drive electrodes. Based on this change in capacitance, the detection controller CT2 identifies the position where the object touched or approached.

[0057] FIG. 5 is a schematic cross-sectional view of the display device DSP in the peripheral area SA. The circuit layer 11 shown in FIG. 3 includes inorganic insulating layers 31, 32, and 33 formed of an inorganic insulating material, an organic insulating layer 34 formed of an organic insulating material, and metal layers 41, 42, and 43. The inorganic insulating layer 31 covers the upper surface of the substrate 10. The metal layer 41 is disposed on the inorganic insulating layer 31. The inorganic insulating layer 32 covers the metal layer 41. The metal layer 42 is disposed on the inorganic insulating layer 32. The inorganic insulating layer 33 covers the metal layer 42. The organic insulating layer 34 covers the inorganic insulating layer 33. The metal layer 43 is disposed on the organic insulating layer 34 and is covered by the organic insulating layer 12.

[0058] The inorganic insulating layers 31, 32, and 33 are formed of inorganic materials such as silicon nitride and silicon oxide. The metal layers 41, 42, and 43 have a single-layer structure or a multilayer structure made of metal materials such as molybdenum (Mo), tungsten (W), molybdenum-tungsten alloy (MoW), aluminum (Al), and copper (Cu). The metal layer 41 forms, for example, the scan line GL shown in FIG. 1. The metal layer 42 forms, for example, the signal line SL shown in FIG. 1.

[0059] Both dam portions DM1 and DM2 protrude above the substrate 10. In the example of Fig. 5, the dam portions DM1 and DM2 are formed by the organic insulating layers 12 and 34. That is, in this embodiment, the dam portions DM1 and DM2 are made of the same material as the organic insulating layers 34 and 12 and are formed in the same layer as the organic insulating layers 34 and 12.

[0060] The peripheral area SA is further provided with a conductive relay layer RL that connects the partition walls 6 with power supply lines (not shown), and a rib 5. The relay layer RL is formed, for example, from the same material and by the same process as the above-described lower electrodes LE1, LE2, and LE3. The relay layer RL is disposed on the organic insulating layer 12 and is covered with the rib 5.

[0061] The partition wall 6 is disposed on the rib 5. The partition wall 6 is in contact with the relay layer RL at a contact portion CN1 (first contact portion) that overlaps the organic insulating layer 12 in a plan view. The rib 5 is open at the contact portion CN1.

[0062] The partition wall 6 is covered with a thin film FL. The thin film FL is covered with a sealing layer SE1. The sealing layer SE1 continuously covers the thin film FL, the rib 5, the organic insulating layers 12 and 34, and the dam portions DM1 and DM2. An end portion Es1 of the sealing layer SE1 is located above the dam portion DM2.

[0063] 5, the thin film FL is divided near the end E1 of the partition wall 6. The sealing layer SE1 continuously covers the divided thin film FL. In other words, the end E2 of the thin film FL is covered by the sealing layer SE1. By dividing the thin film FL in this way, it is possible to block the path of moisture penetration through the thin film FL.

[0064] 3 are disposed above the sealing layer SE1. The resin layer RS1 covers the sealing layer SE1. The dam portion DM1 serves to block the resin layer RS1 before it hardens during the manufacture of the display device DSP.

[0065] 5, the end portion Er1 of the resin layer RS1 is located above the dam portion DM1, but the position of the end portion Er1 is not limited to this example.

[0066] The sealing layer SE2 covers the end Er1 of the resin layer RS1. The sealing layer SE2 is in contact with the sealing layer SE1 in a region outside the end Er1 (to the right in the figure). In the example of FIG. 5, the end Es2 of the sealing layer SE2 is located above the dam portion DM2, similar to the end Es1 of the sealing layer SE1. The resin layer RS1 is surrounded by the sealing layers SE1 and SE2. This prevents moisture from penetrating the resin layer RS1.

[0067] A lead wire LL is disposed on the sealing layer SE2. An output wire OL electrically connected to the lead wire LL is disposed between the dam portions DM1 and DM2. The output wire OL has a first wire W1 formed by the metal layer 42 and second wires W21 and W22 formed by the metal layer 43. In the example of FIG. 5, the first wire W1 and the second wire W21 contact each other at a contact portion CN2 located between the dam portions DM1 and DM2, and the first wire W1 and the second wire W22 contact each other at a contact portion CN3 located outside the dam portion DM2. The second wire W22 is covered by the organic insulating layer 12. Although not shown in this cross section, a portion of the second wire W22 is exposed from the organic insulating layer 12 outside the dam portion DM2, forming the aforementioned connection portion TCN.

[0068] The contact hole CHa passes through the organic insulating layer 34 and the sealing layers SE1 and SE2. The output line OL and the lead line LL are connected through the contact hole CHa.

[0069] The resin layer RS2 covers the sealing layer SE2 and the lead wires LL. The dam portion DM2 serves to block the resin layer RS2 before hardening during manufacturing of the display device DSP. In this embodiment, the end Er2 of the resin layer RS2 is located between the end Er1 of the resin layer RS1 and the ends Es1 and Es2 of the sealing layers SE1 and SE2. The position of the end Er2 is not limited to the example in FIG. 5.

[0070] Incidentally, an illuminance sensor may be arranged on the back side (substrate 10 side) of the display device DSP. The illuminance sensor is arranged to measure the illuminance of light (i.e., external light) incident from the front side of the display device DSP, and measures the illuminance of light passing through a transmissive region in each pixel PX where no light-blocking element is arranged. In this way, by arranging the illuminance sensor on the back side of the display device DSP, it is possible to implement a function of automatically adjusting the luminance of the display device DSP in accordance with the illuminance measured by the illuminance sensor, for example, by setting the luminance of the display device DSP high in a bright environment and setting the luminance of the display device DSP low in a dark environment.

[0071] To implement such a function, it is necessary to secure a transmissive area in the display area DA that can capture a sufficient amount of light for the illuminance sensor arranged on the back side of the display device DSP to measure the illuminance of light incident from the front side of the display device DSP. In particular, in a display device having a touch panel function such as the above-mentioned display device DSP, in addition to the elements that make up each pixel PX, the metal wires ML that make up the touch panel electrodes TP are arranged in the display area DA, so it is necessary to devise a structure for the display device so that the above-mentioned transmissive area can be secured.

[0072] Fig. 6 is a schematic plan view of a pixel PX and metal wires ML according to a comparative example. The pixel PX according to the comparative example includes subpixels SP1, SP2, and SP3 having the same layout as in Fig. 2. However, Fig. 6 illustrates only the lower electrode LE and pixel aperture AP (light-emitting portion) of the elements constituting the subpixels SP1, SP2, and SP3.

[0073] Each pixel PX has a transmissive region between the subpixels SP1, SP2, and SP3 included in the pixel PX. That is, no light-blocking element is disposed between the lower electrode LE1 constituting the subpixel SP1, the lower electrode LE2 constituting the subpixel SP2, and the lower electrode LE3 constituting the subpixel SP3 included in the pixel PX.

[0074] On the other hand, the metal lines ML constituting the touch panel electrode TP extend along the partition walls 6 and are lattice-shaped as a whole. Specifically, the metal lines ML are aligned and formed so as to surround the sub-pixels SP1, SP2, and SP3, respectively.

[0075] Among the metal lines ML, the metal line ML1 arranged between the subpixels SP1, SP2 and the subpixel SP3 included in one pixel PX is aligned and formed so as to overlap with the end LE3a of the lower electrode LE3 constituting the subpixel SP3 in a planar view.

[0076] This allows a transmissive region TA1, in which no light-blocking elements are arranged, to be provided between the metal line ML1 and the end LE1a of the lower electrode LE1 that constitutes the subpixel SP1. Similarly, a transmissive region TA2, in which no light-blocking elements are arranged, to be provided between the metal line ML1 and the end LE2a of the lower electrode LE2 that constitutes the subpixel SP2.

[0077] By providing two transparent regions TA1 and TA2 per pixel PX in this way, the illuminance sensor located on the back side of the display device DSP can obtain a sufficient amount of light through the transparent regions TA1 and TA2 to measure the illuminance of light incident from the front side of the display device DSP.

[0078] However, misalignment may occur during the process of forming the metal wires ML that constitute the touch panel electrodes TP, resulting in a misalignment of the metal wires ML. As a result, for example, as shown in Figure 7, if the above-mentioned metal wire ML1 is positioned to the left of its intended position in Figure 6, the metal wire ML1 may fill the above-mentioned transmissive regions TA1 and TA2. As a result, the illuminance sensor disposed on the back side of the display device DSP will not be able to capture a sufficient amount of light to measure the illuminance of light incident from the front side of the display device DSP, and will not be able to measure the illuminance of that light.

[0079] Therefore, in this embodiment, a layout of the metal wire ML is described that ensures a transparent area that allows the illuminance sensor located on the back side of the display device DSP to take in a sufficient amount of light to measure the illuminance of light incident from the front side of the display device DSP, even if misalignment occurs during the process of forming the metal wire ML and the position of the metal wire ML is shifted.

[0080] 8 is a schematic plan view of a pixel PX and metal lines ML according to this embodiment. The pixel PX according to this embodiment includes subpixels SP1, SP2, and SP3 having the same layout as in FIG. 2. However, in FIG. 8, of the elements constituting the subpixels SP1, SP2, and SP3, only the lower electrode LE and the pixel aperture AP are shown. Note that the following mainly describes the differences from the comparative example shown in FIG. 6, and a description of the same parts as in the comparative example shown in FIG. 6 will be omitted.

[0081] Of the metal wires ML constituting the touch panel electrode TP, the metal wire ML1 arranged between the subpixels SP1, SP2 and SP3 included in one pixel PX is formed in a crank shape including two crank portions CR1, CR2. The crank portion CR1 (first crank portion) is formed between the subpixels SP1 and SP3, and the crank portion CR2 (second crank portion) is formed between the subpixels SP2 and SP3.

[0082] The crank portion CR1 has a first portion CR11 that overlaps with an end portion LE3a of the lower electrode LE3 that constitutes the subpixel SP3 and extends along the second direction Y, a second portion CR12 that overlaps with an end portion LE1a of the lower electrode LE1 that constitutes the subpixel SP1 and extends along the second direction Y, and a third portion CR13 that connects the end portion of the first portion CR11 and the end portion of the second portion CR12 and extends along the first direction X.

[0083] Similarly, the crank portion CR2 has a first portion CR21 (fourth portion) that overlaps with the end portion LE3a of the lower electrode LE3 that constitutes the subpixel SP3 and extends along the second direction Y, a second portion CR22 (fifth portion) that overlaps with the end portion LE2a of the lower electrode LE2 that constitutes the subpixel SP2 and extends along the second direction Y, and a third portion CR23 (sixth portion) that connects the end portion of the first portion CR21 and the end portion of the second portion CR22 and extends along the first direction X.

[0084] The first portion CR11 of the crank portion CR1 does not necessarily have to overlap with the end LE3a, for example, it may be formed closer to the pixel opening AP3 than the end LE3a of the lower electrode LE3 that constitutes the subpixel SP3, but it is desirable that the first portion CR11 be formed at a position where it does not overlap with the pixel opening AP3 even if misalignment occurs in the process of forming the metal wire ML. The second portion CR12 of the crank portion CR1 does not necessarily have to overlap with the end LE1a, for example, it may be formed closer to the pixel opening AP1 than the end LE1a of the lower electrode LE1 that constitutes the subpixel SP1, but it is desirable that the second portion CR12 be formed at a position where it does not overlap with the pixel opening AP1 even if misalignment occurs in the process of forming the metal wire ML.

[0085] Similarly, the first portion CR21 of the crank portion CR2 does not necessarily have to overlap with the end LE3a, for example, it may be formed closer to the pixel opening AP3 than the end LE3a of the lower electrode LE3 that constitutes the subpixel SP3, but it is desirable that the first portion CR21 be formed at a position where it does not overlap with the pixel opening AP3 even if misalignment occurs in the process of forming the metal wire ML. Furthermore, the second portion CR22 of the crank portion CR2 does not necessarily have to overlap with the end LE2a, for example, it may be formed closer to the pixel opening AP2 than the end LE2a of the lower electrode LE2 that constitutes the subpixel SP2, but it is desirable that the second portion CR22 be formed at a position where it does not overlap with the pixel opening AP2 even if misalignment occurs in the process of forming the metal wire ML.

[0086] In this way, even if misalignment occurs in the process of forming the metal wire ML, the crank portions CR1 and CR2 are formed at a position that does not overlap with the pixel opening AP (light-emitting portion), thereby preventing a decrease in the aperture ratio (narrowing of the light-emitting area).

[0087] As described above, by forming the metal wire ML1 in a crank shape including two crank portions CR1 and CR2, a transmissive region TA11 in which no light-blocking elements are arranged can be provided between the first portion CR11 of the crank portion CR1 and the end portion LE1a of the lower electrode LE1 that constitutes the subpixel SP1. A transmissive region TA12 in which no light-blocking elements are arranged can be provided between the first portion CR21 of the crank portion CR2 and the end portion LE2a of the lower electrode LE2 that constitutes the subpixel SP2. A transmissive region TA13 in which no light-blocking elements are arranged can be provided between the second portion CR12 of the crank portion CR1 and the second portion CR22 of the crank portion CR2 and the end portion LE3a of the lower electrode LE3 that constitutes the subpixel SP3.

[0088] It is desirable that the length LY11 of the first portion CR11 of the crank portion CR1, the length LY12 of the second portion CR12 of the crank portion CR1, the length LY21 of the first portion CR21 of the crank portion CR2, and the length LY22 of the second portion CR22 of the crank portion CR2 are all equal to one another.

[0089] This allows the sum of the areas of the transmissive regions TA11 and TA12 to be equal to the area of ​​the transmissive region TA13, and as will be described in detail later, even if the metal wire ML1 is misaligned in either the left or right direction, half of the sum of the areas of the transmissive regions TA11, TA12, and TA13 can function as a transmissive region, ensuring a transmissive region that can capture a sufficient amount of light to measure the illuminance in the illuminance sensor located on the back side of the display device DSP.

[0090] For example, as shown in Figure 9, if the metal wire ML1 is misaligned and positioned to the left in the figure, the transmissive area TA11 is filled with the first portion CR11 of the crank portion CR1 included in the metal wire ML1, and the transmissive area TA12 is filled with the first portion CR21 of the crank portion CR2 included in the metal wire ML1, but the transmissive area TA13 is not filled with the metal wire ML1, and a transmissive area can be secured that can capture a sufficient amount of light to measure the illuminance in an illuminance sensor located on the back side of the display device DSP.

[0091] Furthermore, as shown in Figure 10, when the metal wire ML1 is misaligned and positioned to the right in the figure, the transmissive area TA13 is filled with the second portion CR12 of the crank portion CR1 included in the metal wire ML1 and the second portion CR22 of the crank portion CR2 included in the metal wire ML1, but the transmissive areas TA11 and TA12 are not filled with the metal wire ML1, and a transmissive area can be secured that can capture a sufficient amount of light to measure the illuminance in an illuminance sensor located on the back side of the display device DSP.

[0092] In Figure 8, we have explained the case where, of the metal wires ML that make up the touch panel electrode TP, only the metal wire ML1 that is arranged between the subpixels SP1, SP2 and SP3 included in one pixel PX is formed in a crank shape. However, which metal wires ML that make up the touch panel electrode TP are made crank-shaped is determined based on the position of the transmissive area included in each pixel PX, and the metal wires ML that are arranged near the transmissive area included in each pixel PX are formed in a crank shape.

[0093] Therefore, for example, as shown in FIG. 11, if there is a transmissive region included in each pixel PX not only between the subpixels SP1, SP2 and subpixel SP3 included in one pixel PX, but also between the subpixels SP1, SP2 included in one pixel PX and the subpixel SP3 included in the pixel PX adjacent to that pixel PX along the first direction X, not only the above-mentioned metal wire ML1 but also the metal wire ML2 arranged between the subpixels SP1, SP2 included in one pixel PX and the subpixel SP3 included in the pixel PX adjacent to that pixel PX along the first direction X may be formed in a crank shape.

[0094] In this embodiment, it is assumed that the area of ​​the transmissive region capable of receiving a sufficient amount of light to measure the illuminance in the illuminance sensor arranged on the back side of the display device DSP is half the sum of the areas of the transmissive regions TA11, TA12, and TA13, but the area of ​​the transmissive region capable of receiving a sufficient amount of light to measure the illuminance in the illuminance sensor arranged on the back side of the display device DSP is determined depending on the performance of the illuminance sensor. For example, if the area of ​​the transmissive region capable of receiving a sufficient amount of light to measure the illuminance in the illuminance sensor arranged on the back side of the display device DSP is 1 / 3 the sum of the areas of the transmissive regions TA11, TA12, and TA13, the layout of the metal wires ML may be as shown in FIG.

[0095] In the example of Figure 12, the length LY11 of the first portion CR11 of the crank portion CR1 included in the metal wire ML1, the length LY21 of the first portion CR21 of the crank portion CR2 included in the metal wire ML1, and the sum of the length LY12 of the second portion CR12 of the crank portion CR1 included in the metal wire ML1 and the length LY22 of the second portion CR22 of the crank portion CR2 included in the metal wire ML1 are all equal, and the areas of the transparent regions TA11, TA12, and TA13 are all equal.

[0096] In this case, even if the metal wire ML1 is shifted to the left side of the figure due to misalignment, it is possible to make 1 / 3 of the sum of the areas of the transmissive regions TA11, TA12, and TA13 function as a transmissive region (specifically, make the transmissive region TA13 function as a transmissive region), and even if the metal wire ML1 is shifted to the right side of the figure due to misalignment, it is possible to make 2 / 3 of the sum of the areas of the transmissive regions TA11, TA12, and TA13 function as a transmissive region (specifically, make the transmissive regions TA11 and TA12 function as transmissive regions), thereby ensuring a transmissive region that can take in a sufficient amount of light to measure the illuminance in the illuminance sensor located on the back side of the display device DSP.

[0097] In this embodiment, it is assumed that no light-blocking element is arranged in the transmissive region included in each pixel PX, but a light-blocking element, such as a scanning line GL extending along the first direction X, may be arranged in the transmissive region. In such a case, it is desirable to determine the length LY11 of the first portion CR11 of the crank portion CR1, the length LY12 of the second portion CR12 of the crank portion CR1, the length LY21 of the first portion CR21 of the crank portion CR2, and the length LY22 of the second portion CR22 of the crank portion CR2, all of which are included in the metal wire ML1, taking into consideration the area of ​​light blocked by the scanning line GL or the like (in other words, it is desirable to determine the areas of the transmissive regions TA11, TA12, and TA13).

[0098] According to the embodiment described above, it is possible to provide a display device that has touch panel functionality and an illuminance sensor on the back side, which is capable of capturing a sufficient amount of light for measuring the illuminance of light incident from the front side.

[0099] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the inventions and their equivalents as defined in the claims. [Explanation of symbols]

[0100] DSP...display device, 10...substrate, DA...display area, LE1, LE2, LE3...lower electrode, UE1, UE2, UE3...upper electrode, OR1, OR2, OR3...organic layer, DE1, DE2, DE3...display element, PX...pixel, 6...partition wall, 61...lower part, 62...upper part, TP...touch panel electrode, ML, ML1, ML2...metal wire, CR1, CR2...crank part, TA11, TA12, TA13...transmissive area.

Claims

1. a substrate having a display area for displaying an image; a plurality of pixels arranged in the display area, each including a display element made of a lower electrode, an upper electrode facing the lower electrode, and an organic layer disposed between the lower electrode and the upper electrode and emitting light in response to a potential difference between the lower electrode and the upper electrode; a partition wall including a conductive lower portion and an upper portion protruding from a side surface of the lower portion, the partition wall surrounding each pixel; a touch panel electrode for detecting an object in contact with or in proximity to the display area; an illuminance sensor disposed on the back surface side of the substrate, for measuring the illuminance of light incident from the front surface side of the substrate; Equipped with Each pixel includes a transmissive region where the display element is not disposed, the touch panel electrode includes a metal wire located above the partition wall, extending along the partition wall, and having a crank shape in the vicinity of the transmissive region included in each pixel; Display device.

2. each pixel includes a first subpixel, a second subpixel, and a third subpixel; the first subpixel and the second subpixel are aligned with the third subpixel in a first direction, the first subpixel and the second subpixel are aligned in a second direction intersecting the first direction, the transmissive region is located between the first subpixel and the second subpixel and the third subpixel; The display device according to claim 1 .

3. the metal wire has a crank shape including a first crank portion and a second crank portion in the vicinity of the transmission region, the first crank portion includes a first portion extending along an edge of a lower electrode constituting the third subpixel along the second direction, a second portion extending along an edge of a lower electrode constituting the first subpixel along the second direction, and a third portion connecting an end of the first portion and an end of the second portion and extending along the first direction; the second crank portion includes a fourth portion extending along an edge of a lower electrode of the third subpixel along the second direction, a fifth portion extending along an edge of a lower electrode of the second subpixel along the second direction, and a sixth portion connecting an end of the fourth portion and an end of the fifth portion and extending along the first direction; the first portion and the fourth portion are spaced apart, The second portion and the fifth portion are connected. The display device according to claim 2 .

4. a first region between the first portion and an end of the lower electrode constituting the first subpixel along the second direction, a second region between the fourth portion and an end of the lower electrode constituting the second subpixel along the second direction, and a third region between the second portion and the fifth portion and an end of the lower electrode constituting the third subpixel along the second direction, overlap with the transmissive region in a plan view, and no light-blocking element is arranged therein; The display device according to claim 3 .

5. the length of the first portion, the length of the second portion, the length of the fourth portion, and the length of the fifth portion are equal to one another; The sum of the areas of the first region and the second region is equal to the area of ​​the third region. The display device according to claim 4 .

6. a length of the first portion, a length of the fourth portion, and a sum of lengths of the second portion and the fifth portion are equal to each other; The area of ​​the first region, the area of ​​the second region, and the area of ​​the third region are equal. The display device according to claim 4 .

7. the metal wire is arranged so as not to overlap with a light-emitting portion of each pixel in a plan view; The display device according to claim 1 .

8. a plurality of first sealing layers covering the pixels; a first resin layer covering the plurality of first sealing layers; a second sealing layer covering the first resin layer; a second resin layer covering the second sealing layer; Furthermore, the metal wire is disposed on the second sealing layer and covered with the second resin layer; The display device according to claim 1 .

9. a terminal portion disposed in a peripheral region around the display region; a lead wire disposed in the peripheral region and electrically connecting the terminal portion and the touch panel electrode; Further provided with The display device according to claim 1 .

Images