Multilayer ceramic capacitor

Abstract

To provide a multilayer ceramic capacitor that can prevent entry of water to the inside of a laminate.SOLUTION: A multilayer ceramic capacitor 1 comprises: a laminate 2 having an inner layer part 6 in which a plurality of dielectric layers 4 and a plurality of internal electrode layers 5 are laminated, two principal surfaces A facing each other in a lamination direction, two side faces B facing each other in a width direction intersecting the lamination direction, two end faces C facing each other in a lengthwise direction intersecting the lamination direction and width direction, and two outer layer parts 7 arranged on both sides in the lamination direction of the inner layer part 6; and external electrodes 3 arranged on the two end faces C of the laminate 2. The laminate 2 has an exposed surface S exposed from the external electrodes 3, and the exposed surface S has a metal oxide coating area Sc coated by metal oxide different from a component constituting the dielectric layers 4.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic capacitor. [Background technology]

[0002] A multilayer ceramic capacitor includes a laminate of sintered ceramic bodies made of a dielectric material such as barium titanate. A plurality of laminar internal electrodes made of a noble metal material such as Ag or an Ag-Pd alloy, or a base metal material such as Ni, are arranged within the laminate with ceramic layers (dielectric layers) interposed between them. The internal electrodes are alternately extended to one end face and the other end face. The internal electrodes extended to one end face are electrically connected to an external electrode formed on one end face, and the internal electrodes extended to the other end face are electrically connected to an external electrode formed on the other end face (see, for example, Patent Document 1).

[0003] The external electrodes of such multilayer ceramic capacitors contain a glass component and multiple metal components, including metals that are the same as or can be alloyed with the materials of the internal electrodes, and are bonded to the wiring board via a conductive resin adhesive. Here, if the area occupancy rate of the metal components relative to the cross-sectional area of ​​the external electrodes is set to 60 to 95%, they can be mounted on the wiring board inexpensively and with high reliability without using solder. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-237137 Summary of the Invention [Problem to be solved by the invention]

[0005] However, the dielectric layers of the laminate contain voids (pores), and moisture can penetrate through these pores to the internal electrodes, resulting in failure. In a typical multilayer ceramic capacitor such as that described in Patent Document 1, part of the outer surface of the laminate is exposed to the air and is not covered by the external electrodes. If voids penetrate from this exposed surface to the internal electrodes, moisture can penetrate through the pores and reach the internal electrodes, causing failure (short circuit).

[0006] An object of the present invention is to provide a multilayer ceramic capacitor that can prevent moisture from penetrating into the inside of the laminate. [Means for solving the problem]

[0007] In order to solve the above problems, the present invention provides a multilayer ceramic capacitor comprising: a laminate having an inner layer portion in which a plurality of dielectric layers and a plurality of internal electrode layers are stacked; two main surfaces opposing each other in the stacking direction; two side surfaces opposing each other in a width direction intersecting the stacking direction; two end faces opposing each other in a length direction intersecting the stacking direction and the width direction; and two outer layer portions arranged on both sides of the inner layer portion in the stacking direction; and external electrodes arranged on each of the two end faces of the laminate, wherein the laminate has an exposed surface exposed from the external electrodes, and the exposed surface has a metal oxide coating region coated with a metal oxide different from the component constituting the dielectric layer. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can prevent moisture from penetrating into the inside of the laminate. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a schematic perspective view of a multilayer ceramic capacitor 1 according to an embodiment. [Figure 2] 2 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line II-II of FIG. [Figure 3] 3 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line III-III in FIG. [Figure 4] 3 is a flowchart illustrating a method for manufacturing the multilayer ceramic capacitor 1. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, a multilayer ceramic capacitor 1 according to an embodiment of the present invention will be described. Fig. 1 is a schematic perspective view of the multilayer ceramic capacitor 1 according to the embodiment. Fig. 2 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line II-II in Fig. 1. Fig. 3 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line III-III in Fig. 1.

[0011] (Multilayer ceramic capacitor 1) The multilayer ceramic capacitor 1 has a substantially rectangular parallelepiped shape and includes a laminate 2 and a pair of external electrodes 3 provided on both ends of the laminate 2. The laminate 2 includes an internal layer portion 6 in which a plurality of dielectric layers 4 and a plurality of internal electrode layers 5 are laminated.

[0012] In the following description, the terms used to represent the orientation of the multilayer ceramic capacitor 1 are: a length direction L, which is the direction in which a pair of external electrodes 3 are provided in the multilayer ceramic capacitor 1; a stacking direction T, which is the direction in which the dielectric layers 4 and the internal electrode layers 5 are stacked; and a width direction W, which is the direction intersecting both the length direction L and the stacking direction T. In the embodiment, the width direction W is perpendicular to both the length direction L and the stacking direction T.

[0013] In the following description, of the six outer peripheral surfaces of the laminate 2, a pair of outer peripheral surfaces facing each other in the stacking direction T will be referred to as the first main surface A1 and the second main surface A2, a pair of outer peripheral surfaces facing each other in the width direction W will be referred to as the first side surface B1 and the second side surface B2, and a pair of outer surfaces facing each other in the length direction L will be referred to as the first end surface C1 and the second end surface C2. Note that when there is no need to particularly distinguish between the first main surface A1 and the second main surface A2, they will be collectively referred to as the main surface A; when there is no need to particularly distinguish between the first side surface B1 and the second side surface B2, they will be collectively referred to as the side surface B; and when there is no need to particularly distinguish between the first end surface C1 and the second end surface C2, they will be collectively referred to as the end surface C.

[0014] (Laminate 2) The laminate 2 includes an inner layer portion 6 and outer layer portions 7 disposed on both main surfaces A of the inner layer portion 6, respectively.

[0015] (Inner layer 6) The inner layer portion 6 is formed by laminating a plurality of dielectric layers 4 and a plurality of internal electrode layers 5.

[0016] (Dielectric layer 4) The dielectric layer 4 is made of a ceramic material such as barium titanate.

[0017] (Internal electrode layer 5) The internal electrode layers 5 include a plurality of first internal electrode layers 5A and a plurality of second internal electrode layers 5B. The first internal electrode layers 5A and the second internal electrode layers 5B are arranged alternately. Note that, when there is no need to particularly distinguish between the first internal electrode layers 5A and the second internal electrode layers 5B, they will be collectively referred to as the internal electrode layers 5.

[0018] The first internal electrode layer 5A includes a first opposing portion 5Aa opposing the second internal electrode layer 5B, and a first lead portion 5Ab extending from the first opposing portion 5Aa toward the first end face C1. An end of the first lead portion 5Ab is exposed at the first end face C1 and is electrically connected to a first external electrode 3A, which will be described later. The second internal electrode layer 5B includes a second opposing portion 5Ba opposing the first internal electrode layer 5A, and a second lead portion 5Bb extending from the second opposing portion 5Ba to the second end face C2. An end of the second lead portion 5Bb is electrically connected to a second external electrode 3B, which will be described later.

[0019] Charges are accumulated in the first opposing portions 5Aa of the first internal electrode layers 5A and the second opposing portions 5Ba of the second internal electrode layers 5B, and they function as capacitors.

[0020] (Outer layer part 7) The outer layer portion 7 is made of the same ceramic material as the dielectric layer 4 of the inner layer portion 6, such as barium titanate.

[0021] (External electrode 3) The external electrodes 3 include a first external electrode 3A provided on a first end face C1 of the laminate 2 and a second external electrode 3B provided on a second end face C2 of the laminate 2. When there is no need to particularly distinguish between the first external electrode 3A and the second external electrode 3B, they will be collectively referred to as the external electrode 3. The external electrode 3 covers not only the end face C, but also a portion of the main face A and the side face B on the end face C side.

[0022] Each external electrode 3 includes a base electrode layer 3a and a plating layer 3b disposed on the outside of the base electrode layer 3a. The base electrode layer 3a is electrically connected to the ends of the lead portions 5Ab and 5Bb of the internal electrode layer 5 exposed at the end face C. The plating layer 3b includes, for example, a Ni plating layer 3b1 disposed to cover the surface of the base electrode layer 3a and a Sn plating layer 3b2 disposed to cover the Ni plating layer 3b1. The Ni plating layer 3b1 prevents the base electrode layer 3a from being corroded by solder. The Sn plating layer 3b2 improves solder wettability when mounting the multilayer ceramic capacitor 1 on a wiring board, facilitating mounting.

[0023] In this embodiment, the outer layer portions 7 and the dielectric layers 4 are made of a dielectric ceramic material such as barium titanate as described above, and are fired in a firing step described below. During firing, the outer layer portions 7 and the dielectric layers 4 become granular, and pores are formed between the grains. In particular, the pores between the grains in the outer layer portions 7 may serve as paths for water to penetrate from the outside, thereby reducing the moisture resistance reliability of the multilayer ceramic capacitor 1.

[0024] The laminate 2 has an exposed surface S exposed from the external electrode 3 on the main surface A and the side surface B. In the embodiment, this exposed surface S is covered with a metal oxide 11 different from the component constituting the dielectric layer 4. The metal oxide 11 does not completely cover the entire exposed surface S, but covers the exposed surface S in a scattered manner. It is preferable that the metal oxide 11 covers at least the exposed surface of the main surface A. In the embodiment, the metal oxide 11 covers the exposed surface S of the main surface A and the exposed surface S of the side surface B.

[0025] 1 and 2, the exposed surface S has, in the length direction L, a central region Sm and two edge regions Se located on the external electrode 3 side of the central region Sm. Although not limited thereto, in an embodiment, when the dimension of the exposed surface S in the length direction L is divided into approximately three equal parts, the middle part is the central region Sm and the two sides thereof are the edge regions Se. The coverage of the metal oxide 11 is greater in the central region Sm than in the edge regions Se.

[0026] If the oxidation of the metal oxide 11 is insufficient or reduced, a short circuit may occur between the metal oxide 11 and the external electrode 3. According to the embodiment, the coverage of the metal oxide 11 in the two end regions Se located on the external electrode 3 side is lower than that in the central region Sm. Therefore, even if the oxidation of the metal oxide 11 is insufficient or reduced, the possibility of a short circuit occurring between the external electrode 3 and the metal oxide 11 is low.

[0027] On the other hand, since the coverage of the metal oxide 11 in the central region Sm is higher than that of the metal oxide 11 in the edge region Se, the effect of preventing water from entering the gap from the outside is high, and the probability of failure (short circuit) due to water intrusion is reduced.

[0028] Furthermore, it is preferable that the edge of the end region Se on the external electrode 3 side includes an uncovered region Se1 that is not covered with the metal oxide 11. This can further reduce the possibility of a short circuit occurring between the end region Se and the external electrode 3, even if the metal oxide 11 is insufficiently oxidized or reduced. Note that the coverage of the metal oxide 11 in the end region Se other than the uncovered region Se1 that is not covered with the metal oxide 11 may be lower than that in the central region Sm.

[0029] The longitudinal distance of the uncovered region Se1 that is not covered with the metal oxide 11, i.e., the longitudinal distance from the edge of the external electrode 3 to the edge of the metal oxide coated region Sc, is preferably 50 μm or more and 200 μm or less. The uncovered region Se1 on the main surface A may be a region that has a substantially constant longitudinal distance, extends in the width direction W, and is curved along the edge of the external electrode 3. The uncovered region Se1 on the side surface B may be a region that has a substantially constant longitudinal distance, extends in the stacking direction T, and is curved along the edge of the external electrode 3. This more appropriately reduces the possibility of short-circuiting.

[0030] It is preferable that the metal oxide 11 is disposed approximately evenly over the entire surface of the central region Sm. By disposing the metal oxide 11 approximately evenly over the entire surface of the central region Sm, the effect of reducing the probability of failure (short circuit) due to moisture penetration can be more reliably obtained.

[0031] The exposed surface S has a metal oxide-coated region Sc coated with metal oxide 11. In the embodiment, the exposed surface S has the metal oxide-coated region Sc and the uncoated region Se1 described above. The metal oxide-coated region Sc is the region of the exposed surface S other than the uncoated region Se1. The coverage of the metal oxide 11 in the metal oxide-coated region Sc is preferably 10% or more and 30% or less. If the coverage is less than 10%, the amount of metal oxide 11 attached is small, the moisture penetration suppression effect is insufficient, and the moisture resistance reliability is not improved. On the other hand, if the coverage is more than 30%, the metal oxide 11 is ionized by moisture penetration, which may cause migration of metal ions or oxide ions, resulting in a risk of short circuiting. However, in the embodiment, the coverage of the metal oxide 11 over the entire exposed surface S is 10% or more and 30% or less, thereby achieving a sufficient moisture penetration suppression effect and reducing the risk of short circuiting due to migration of metal ions or oxide ions.

[0032] The metal oxide 11 is preferably a metal oxide 11 different from the components constituting the dielectric layer 4, and is preferably SnO, which can significantly reduce the probability of failure (short circuit) due to moisture penetration.

[0033] As described above, the exposed surface S of the laminate 2 is coated with a metal oxide 11 that is different from the component that constitutes the dielectric layer 4, thereby sealing the pores, reducing the probability of failure (short circuit) due to moisture intrusion, and improving moisture resistance reliability.

[0034] (Method for measuring the coverage of metal oxide 11) The coverage rate of the metal oxide 11 is measured, for example, as follows. First, observation is performed using a scanning electron microscope (SEM), and an elemental mapping image is obtained using an energy dispersive X-ray analyzer (EDX) attached to the SEM. Next, based on the elemental mapping image, the areas coated with the metal oxide 11 and the areas not coated with the metal oxide 11 on the exposed surface S of the dielectric layer 4 (external layer portion) on the main surface side of the multilayer ceramic capacitor 1, which is exposed from the external electrode 3, are determined by binarization. Then, the ratio of the area occupied by the metal oxide 11 coating to the total area determined by binarization is calculated, and this is defined as the coverage rate. The coverage rate is measured at the center of the central region Sm and the centers of the two edge regions.

[0035] (Manufacturing Method of Multilayer Ceramic Capacitor 1) Next, a method for manufacturing the multilayer ceramic capacitor 1 will be described. The method for manufacturing the multilayer ceramic capacitor 1 of the embodiment is not limited as long as it satisfies the above-mentioned requirements. However, a suitable manufacturing method includes the following steps. Figure 4 is a flowchart illustrating the method for manufacturing the multilayer ceramic capacitor 1.

[0036] (Ceramic green sheet printing process S1) A ceramic slurry containing ceramic powder, a binder, and a solvent is applied in a sheet form onto a carrier film.

[0037] Next, a conductive paste containing metal powder, binders, additives such as plasticizers and dispersants, organic solvents, etc. is printed onto the ceramic green sheets in a stripe pattern by screen printing, inkjet printing, gravure printing, etc. In this way, the conductive paste that will become the internal electrode layers 5 is printed on the surfaces of the ceramic green sheets that will become the dielectric layers 4.

[0038] (Lamination process S2) The plurality of ceramic green sheets are stacked so that the conductive paste is shifted by half a pitch in the length direction L between the ceramic green sheets adjacent to each other in the stacking direction T. Furthermore, outer layer ceramic green sheets that will become the outer layer portions 7 are stacked on both sides of the stacked ceramic green sheets in the stacking direction T.

[0039] (Mother block formation step S3) Next, outer layer ceramic green sheets that will become the outer layer portions 7 are stacked on both sides of the stacked ceramic green sheets in the stacking direction T, and the stack is then thermocompression bonded to form a mother block.

[0040] (Mother block cutting process S4) Next, the mother block is cut to produce a plurality of laminates 2.

[0041] (External electrode formation step S5) A conductive paste that will become the base electrode layer 3a of the external electrode 3 is applied to both ends of the laminate 2 by dipping or the like.

[0042] (Firing process S6) Then, the laminate 2 is heated in a nitrogen atmosphere at a set firing temperature for a predetermined time, and the base electrode layer 3 a of the external electrode 3 is baked onto the laminate 2 .

[0043] (Metal oxide coating process S7) The manufactured multilayer ceramic capacitor 1 is plated in a plating bath intentionally mixed with scraps of a specified metal oxide 11 to form a plating layer 3b and coat the surface of the element with metal oxide 11. After that, the metal oxide 11 near the external electrodes 3 is removed with a laser. Through the above steps, the multilayer ceramic capacitor 1 shown in Figure 1 is manufactured.

[0044] Although the embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment, and various changes and modifications can be made as follows.

[0045] <1> an inner layer portion in which a plurality of dielectric layers and a plurality of internal electrode layers are laminated; Two main surfaces facing each other in a stacking direction; Two side surfaces facing each other in a width direction intersecting the stacking direction; two end faces facing each other in a length direction intersecting the stacking direction and the width direction; a laminate having two outer layer portions arranged on both sides of the inner layer portion in the stacking direction; and a multilayer ceramic capacitor including external electrodes disposed on the two end surfaces of the laminate, the laminate has an exposed surface exposed from the external electrode, the exposed surface has a metal oxide coating region coated with a metal oxide different from the component constituting the dielectric layer; Multilayer ceramic capacitor.

[0046] <2> the exposed surface has, in the length direction, a central region and two end regions located on both sides of the central region on the external electrode side, the coverage of the metal oxide is greater in the central region than in the edge regions; <1> The multilayer ceramic capacitor according to claim 1.

[0047] <3> the end region includes a region not covered with the metal oxide; <1> or <2> The multilayer ceramic capacitor according to claim 1.

[0048] <4> The metal oxide is disposed substantially uniformly over the entire surface of the central region. <1> from <3> 10. The multilayer ceramic capacitor according to claim 9, wherein the multilayer ceramic capacitor is a multilayer ceramic capacitor having a thickness of 100 nm.

[0049] <5> The coverage of the metal oxide in the metal oxide coating region is 10% or more and 30% or less. <1> from <4> 10. The multilayer ceramic capacitor according to claim 9, wherein the multilayer ceramic capacitor is a multilayer ceramic capacitor having a thickness of 100 nm.

[0050] <6> The metal oxide is SnO. <1> from <5> 10. The multilayer ceramic capacitor according to claim 9, wherein the multilayer ceramic capacitor is a multilayer ceramic capacitor having a thickness of 100 nm. [Explanation of symbols]

[0051] S Exposed surface Sm central area Se end area Se1 uncovered region 1. Multilayer ceramic capacitors 2. Laminate 3 External electrode 4 Dielectric Layer 5 Internal electrode layer 6 Inner layer 7 Outer layer 11 Metal oxides

Claims

1. an inner layer portion in which a plurality of dielectric layers and a plurality of internal electrode layers are laminated; Two main surfaces facing each other in a stacking direction; Two side surfaces facing each other in a width direction intersecting the stacking direction; two end faces facing each other in a length direction intersecting the stacking direction and the width direction; a laminate having two outer layer portions arranged on both sides of the inner layer portion in the stacking direction; and a multilayer ceramic capacitor including external electrodes disposed on the two end surfaces of the laminate, the laminate has an exposed surface exposed from the external electrode, the exposed surface has a metal oxide coating region coated with a metal oxide different from the component constituting the dielectric layer; Multilayer ceramic capacitor.

2. the exposed surface has, in the length direction, a central region and two end regions located on both sides of the central region on a side of the external electrode, the coverage of the metal oxide is greater in the central region than in the edge regions; The multilayer ceramic capacitor according to claim 1 .

3. the end region includes a region not covered with the metal oxide; The multilayer ceramic capacitor according to claim 2 .

4. The metal oxide is disposed substantially uniformly over the entire surface of the central region. The multilayer ceramic capacitor according to claim 2 .

5. a coverage of the metal oxide in the metal oxide coating region is 10% or more and 30% or less; The multilayer ceramic capacitor according to claim 1 .

6. The metal oxide is SnO. The multilayer ceramic capacitor according to claim 1 .

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