Multilayer ceramic electronic component

Abstract

To provide a multilayer ceramic electronic component that reduces the possibility of having interlayer peeling, while satisfying requests for a reduction in size and an increase in capacitance.SOLUTION: A multilayer ceramic capacitor 1 comprises: a laminate 2 having two outer layer parts 7 arranged on both sides in a lamination direction T of an inner layer part 6, a first side gap part 8A located on a side of a first side face B1 of the inner layer part 6, and a second side gap part 8B located on a side of a second side face B2; and external electrodes 3 arranged respectively on a first end face C1 and a second end face C2. The dimensions in a width direction W of the inner layer part 6 on a side of a first principal surface A1 and on a side of a second principal surface A2 in the lamination direction T are substantially equal to each other. On a cross section passing through the lamination direction T and the width direction W at the center in a lengthwise direction L, the dimensions in the width direction W of the first side gap part 8A on a side of the first principal surface A1 and on a side of the second principal surface A2 in the lamination direction T are substantially equal to each other, and the dimension in the width direction W of the second side gap part 8B gradually increases from the center in the lamination direction T toward the second principal surface.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic electronic component. [Background technology]

[0002] Multilayer ceramic capacitors have been known as multilayer ceramic electronic components. A multilayer ceramic capacitor includes a laminate having an inner layer portion in which multiple internal dielectric layers and internal electrode layers are alternately stacked, side gaps disposed on both sides of the inner layer portion in the width direction, and external electrodes provided on both end faces of the laminate.

[0003] Such a multilayer ceramic capacitor is manufactured, for example, by cutting a mother block into a predetermined size to produce a laminate, in which a conductive paste that becomes the internal electrode layers is printed on ceramic green sheets that become the internal dielectric layers, and then forming external electrodes on the laminate (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-357628 Summary of the Invention [Problem to be solved by the invention]

[0005] When cutting the mother block to a predetermined size, the mother block is cut in both the length and width directions. In the width direction, the cutting is performed from one side of the stacking direction to the other, between the conductive pastes that form the side gaps where no conductive paste is printed. At this time, the cutting blade is initially positioned approximately in the center between the conductive pastes, but as it moves from one side of the stacking direction to the other (from top to bottom), it may shift from the center and approach the conductive paste.

[0006] Here, the adhesive strength between the conductive paste and the ceramic green sheet is weaker than that of the side gap portion where the ceramic green sheet is directly laminated, and therefore, when the cutting blade approaches the portion where the conductive paste is printed, a downward force is applied to the conductive paste, which may cause the ceramic green sheet on which the conductive paste is printed to be pulled away from the ceramic green sheet laminated on top, resulting in delamination.

[0007] To avoid such delamination, it may be possible to increase the width of the side gap portion from top to bottom in both width directions so that the cutting blade can be displaced in either direction in the width direction.

[0008] However, in recent years, there has been a demand for smaller multilayer ceramic capacitors with higher capacitance. If the width of the side gap portion is increased in both width directions from top to bottom, the width of the conductive paste on the lower side, i.e., the width of the internal electrode layer, will become smaller, which is contrary to the demand for smaller size and higher capacitance.

[0009] An object of the present invention is to provide a multilayer ceramic electronic component that satisfies the demands for miniaturization and high capacitance to some extent, while reducing the possibility of delamination. [Means for solving the problem]

[0010] In order to solve the above problems, the present invention provides a laminate including an inner layer portion in which inner electrode layers and inner dielectric layers are laminated, a first main surface and a second main surface opposite to each other in a lamination direction, a first end surface and a second end surface opposite to each other in a length direction intersecting the lamination direction, a first side surface and a second side surface opposite to each other in a width direction intersecting the lamination direction and the length direction, two outer layer portions arranged on both sides of the lamination direction of the inner layer portion, a first side gap portion located on the first side surface side of the inner layer portion, and a second side gap portion located on the second side surface side of the inner layer portion; and a multilayer ceramic electronic component including external electrodes arranged on each of the second end faces, wherein the widthwise dimension of the inner layer portion is approximately equal on the first main surface side and the second main surface side in the stacking direction, and in a cross section passing through the stacking direction and the widthwise direction at the center of the longitudinal direction, the widthwise dimension of the first side gap portion is approximately equal on the first main surface side and the second main surface side in the stacking direction, and the widthwise dimension of the second side gap portion gradually increases from the center of the stacking direction toward the second main surface side. [Effects of the Invention]

[0011] According to the present invention, it is possible to provide a multilayer ceramic electronic component that satisfies the demands for miniaturization and high capacitance to some extent, while reducing the possibility of delamination. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a schematic perspective view of a multilayer ceramic capacitor 1 according to an embodiment. [Figure 2] 2 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line II-II of FIG. [Figure 3] 3 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line III-III in FIG. 2. [Figure 4] 3 is a flowchart illustrating a method for manufacturing the multilayer ceramic capacitor 1. [Figure 5A] 2A to 2C are diagrams illustrating a method for manufacturing the multilayer ceramic capacitor 1. [Figure 5B] 2A to 2C are diagrams illustrating a method for manufacturing the multilayer ceramic capacitor 1. [Figure 6A] 1 is a diagram showing a multilayer ceramic capacitor 1 according to a modified example of the present invention. [Figure 6B] 1 is a diagram showing a multilayer ceramic capacitor 1 according to a modified example of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, a multilayer ceramic capacitor 1 as a multilayer ceramic electronic component according to a preferred embodiment of the present invention will be described. Fig. 1 is a schematic perspective view of the multilayer ceramic capacitor 1 according to the preferred embodiment. Fig. 2 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line II-II in Fig. 1. Fig. 3 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line III-III in Fig. 2.

[0014] (Multilayer ceramic capacitor 1) The multilayer ceramic capacitor 1 has a substantially rectangular parallelepiped shape and includes a laminate 2 and a pair of external electrodes 3 provided on both ends of the laminate 2. The laminate 2 includes an internal layer portion 6 in which a plurality of internal dielectric layers 4 and a plurality of internal electrode layers 5 are laminated.

[0015] In the following description, the terms used to represent the orientation of the multilayer ceramic capacitor 1 are: a length direction L, which is the direction in which a pair of external electrodes 3 are provided in the multilayer ceramic capacitor 1; a stacking direction T, which is the direction in which the internal dielectric layers 4 and the internal electrode layers 5 are stacked; and a width direction W, which is the direction intersecting both the length direction L and the stacking direction T. In the embodiment, the width direction W is perpendicular to both the length direction L and the stacking direction T.

[0016] If the dimension in the length direction L is defined as the L dimension, then the L dimension of the multilayer ceramic capacitor 1 is preferably 0.2 mm or more and 10 mm or less. If the dimension in the stacking direction T is defined as the T dimension, then the T dimension of the multilayer ceramic capacitor 1 is preferably 0.1 mm or more and 10 mm or less. If the dimension in the width direction W is defined as the W dimension, then the W dimension of the multilayer ceramic capacitor 1 is preferably 0.1 mm or more and 10 mm or less. Note that the L dimension of the multilayer ceramic capacitor 1 is not necessarily longer than the W dimension.

[0017] In the following description, of the six outer peripheral surfaces of the laminate 2, a pair of outer peripheral surfaces facing each other in the stacking direction T will be referred to as the first main surface A1 and the second main surface A2, a pair of outer peripheral surfaces facing each other in the width direction W will be referred to as the first side surface B1 and the second side surface B2, and a pair of outer surfaces facing each other in the length direction L will be referred to as the first end surface C1 and the second end surface C2. Note that when there is no need to particularly distinguish between the first main surface A1 and the second main surface A2, they will be collectively referred to as the main surface A; when there is no need to particularly distinguish between the first side surface B1 and the second side surface B2, they will be collectively referred to as the side surface B; and when there is no need to particularly distinguish between the first end surface C1 and the second end surface C2, they will be collectively referred to as the end surface C.

[0018] (Laminate 2) The laminate 2 includes an inner layer portion 6 and outer layer portions 7 disposed on both main surfaces A of the inner layer portion 6. As shown in FIG. 1, the laminate 2 has a substantially rectangular parallelepiped shape. The dimensions of the laminate 2 are not particularly limited, but the L dimension is preferably 0.2 mm or more and 10 mm or less. The T dimension of the laminate 2 is preferably 0.1 mm or more and 10 mm or less. The W dimension of the laminate 2 is preferably 0.1 mm or more and 10 mm or less. The L dimension of the laminate 2 is not necessarily longer than the W dimension.

[0019] It is preferable that the corners and ridges of the laminate 2 are rounded. A corner is a portion where three surfaces of the laminate 2 intersect, and a ridge is a portion where two surfaces of the laminate 2 intersect. Note that unevenness may be formed on part or all of the surfaces constituting the laminate 2.

[0020] The first main surface A1 of the laminate 2 is curved in the cross section shown in Fig. 3, and the central portion in the width direction W has a convex shape that protrudes upward in the figure from both sides in the width direction W. The second main surface A2 is also curved in the cross section shown in Fig. 3, and the central portion in the width direction W has a shape that protrudes downward in the figure from both sides. The protrusion amount T1 of the first main surface A1 is greater than the protrusion amount T2 of the second main surface A2.

[0021] The protrusion amount T1 of the first main surface A1 is the distance T1 in the stacking direction T between the upper end of the portion of the outline of the first side surface B1 and the second side surface B2 shown as an approximately straight line in Figure 3 on the first main surface A1 side and the apex of the convex shape protruding above the first main surface A1. The protrusion amount T2 of the second main surface A2 is the distance T2 in the stacking direction T between the lower end of the portion of the outline of the first side surface B1 and the second side surface B2 shown as an approximately straight line in Figure 3 on the second main surface A2 side and the apex of the convex shape protruding below the second main surface A2.

[0022] (Inner layer 6) The inner layer portion 6 is formed by laminating a plurality of inner dielectric layers 4 and inner electrode layers 5.

[0023] (internal dielectric layer 4) The internal dielectric layer 4 is made of a dielectric material. The dielectric material may be, for example, a dielectric ceramic containing components such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3. The dielectric material may also be a material containing these main components plus a secondary component such as a Mn compound, an Fe compound, a Cr compound, a Co compound, or a Ni compound. It is particularly preferable that the dielectric material contains BaTiO3 as the main component.

[0024] The thickness of the internal dielectric layer 4 is preferably 0.5 μm or more and 15 μm or less. The number of laminated internal dielectric layers 4 is preferably 10 or more and 700 or less. The number of internal dielectric layers 4 is the total number of the dielectric layers in the internal layer portion 11 and the dielectric layers in the first outer layer portion 7A and the second outer layer portion 7B.

[0025] (Internal electrode layer 5) The internal electrode layers 5 include a plurality of first internal electrode layers 5A and a plurality of second internal electrode layers 5B. The first internal electrode layers 5A and the second internal electrode layers 5B are arranged alternately. Note that, when there is no need to particularly distinguish between the first internal electrode layers 5A and the second internal electrode layers 5B, they will be collectively referred to as the internal electrode layers 5.

[0026] The thickness of each of the first internal electrode layers 5A and the second internal electrode layers 5B is preferably, for example, 0.2 μm or more and 2.0 μm or less. The total number of the first internal electrode layers 5A and the second internal electrode layers 5B is preferably 10 or more and 700 or less.

[0027] The first internal electrode layer 5A and the second internal electrode layer 5B are made of an appropriate conductive material such as a metal such as Ni, Cu, Ag, Pd, Au, or an alloy containing at least one of these metals. When an alloy is used, the first internal electrode layer 5A and the second internal electrode layer 5B may be made of, for example, an Ag-Pd alloy.

[0028] The first internal electrode layer 5A includes a first opposing portion 5Aa opposing the second internal electrode layer 5B, and a first lead portion 5Ab extending from the first opposing portion 5Aa toward the first end face C1. An end of the first lead portion 5Ab is exposed at the first end face C1 and is electrically connected to a first external electrode 3A, which will be described later. The second internal electrode layer 5B includes a second opposing portion 5Ba opposing the first internal electrode layer 5A, and a second lead portion 5Bb extending from the second opposing portion 5Ba to the second end face C2. An end of the second lead portion 5Bb is electrically connected to a second external electrode 3B, which will be described later.

[0029] Charges are accumulated in the first opposing portions 5Aa of the first internal electrode layers 5A and the second opposing portions 5Ba of the second internal electrode layers 5B, and they function as capacitors.

[0030] The shapes of the first opposing portion 5Aa and the second opposing portion 5Ba are not particularly limited, but are preferably rectangular. However, the corners of the rectangular shape may be rounded or the corners of the rectangular shape may be formed at an angle. The shapes of the first lead portion 5Ab and the second lead portion 5Bb are not particularly limited, but are preferably rectangular. However, the corners of the rectangular shape may be rounded or the corners of the rectangular shape may be formed at an angle.

[0031] (Outer layer 7) The outer layer portion 7 may be made of the same dielectric ceramic material as the inner dielectric layer 4 of the inner layer portion 6 .

[0032] (Side gap part 8) The laminate 2 has a first side gap portion 8A arranged on the first side surface B1 side of the inner layer portion 6, and a second side gap portion 8B arranged on the second side surface B2 side of the inner layer portion 6. Note that, unless it is necessary to particularly distinguish between the first side gap portion 8A and the second side gap portion 8B, they will be collectively referred to as the side gap portion 8.

[0033] 3, the first side gap portion 8A has a width W4 on the first main surface A1 side in the stacking direction T that is approximately equal to a width W6 on the second main surface A2 side. The width W5 at the center in the stacking direction T is smallest. That is, the width W5 at the center in the stacking direction T is smaller than the width W4 on the first main surface A1 side in the stacking direction T and the width W6 on the second main surface A2 side in the stacking direction T. However, because the change in the width W of the first side gap portion 8A is within 5%, this difference is small compared to the difference in the width W of the second side gap portion 8B, as described below, and can be considered to be approximately constant.

[0034] On one hand, the dimension in the width direction W of the second side gap portion 8B gradually increases from the central portion in the stacking direction T toward the second main surface A2 side. That is, when the dimension W2 in the width direction W of the central portion in the stacking direction T and the dimension W3 in the width direction W of the end portion on the second main surface A2 side in the stacking direction T are considered, W2 < W3, and the dimension gradually increases from W2 to W3 from the central portion in the stacking direction T with the dimension W2 in the width direction W toward the end portion on the second main surface A2 side in the stacking direction T with the dimension W3 in the width direction W.

[0035] Furthermore, in the present embodiment, when the dimension W1 in the width direction W of the end portion on the first main surface A1 side in the stacking direction T of the second side gap portion 8B is considered, W1 < W2 < W3, and the dimension gradually increases from W1 to W3 via W2 from the end portion on the first main surface A1 side in the stacking direction T toward the second main surface A2 side in the stacking direction T.

[0036] The maximum dimension in the width direction W of the second side gap portion 8B is 1.5 times or more the minimum dimension in the width direction W of the second side gap portion 8B. In the embodiment, the maximum dimension in the width direction W of the second side gap portion 8B is W3, the minimum dimension in the width direction W of the second side gap portion 8B is W1, and 1.5W1 < W3.

[0037] [[ID=]11] Here, the dimension in the width direction W connecting the outer surface of the first side gap portion 8A and the outer surface of the second side gap portion 8B, that is, the dimension in the width direction W of the inner layer portion 6 may be substantially equal on the first main surface A1 side and the second main surface A2 side in the stacking direction T. That is, the dimension W7 in the width direction W of the inner layer portion 6 on the first main surface A1 side may be substantially equal to the dimension W8 in the width direction W of the inner layer portion 6 on the second main surface A2 side. Here, if the difference between the above-mentioned dimension W7 and dimension W8 is within 5%, it can be considered substantially equal. The change rate of the dimension in the width direction W of the inner layer portion 6 along the stacking direction may be 5% or less. If the change rate of the dimension in the width direction W of the inner layer portion 6 along the stacking direction is within 5%, it can be considered substantially constant along the stacking direction.

[0038] The dimensions W1 to W8 in the width direction W and the dimensions T1 and T2 in the stacking direction T can be measured by polishing a cross section as shown in FIG. 3 to expose it, and then using a digital microscope to measure the exposed cross section.

[0039] (External electrode 3) The external electrodes 3 include a first external electrode 3A provided on a first end face C1 of the laminate 2 and a second external electrode 3B provided on a second end face C2 of the laminate 2. When there is no need to particularly distinguish between the first external electrode 3A and the second external electrode 3B, they will be collectively referred to as the external electrode 3. The external electrode 3 covers not only the end face C, but also a portion of the main face A and the side face B on the end face C side.

[0040] Each of the external electrodes 3 includes a base electrode layer 3a and a plating layer 3b disposed on the outer side of the base electrode layer 3a.

[0041] (Base electrode layer 3a) The base electrode layer 3a is electrically connected to the ends of the lead portions 5Ab and 5Bb of the internal electrode layer 5 exposed at the end face C.

[0042] The base electrode layer 3a is a baked layer. The baked layer preferably contains a metal component and either a glass component or a ceramic component, or both. The metal component includes at least one selected from, for example, Cu, Ni, Ag, Pd, an Ag-Pd alloy, and Au. The glass component includes at least one selected from, for example, B, Si, Ba, Mg, Al, and Li. The ceramic component may be the same type of ceramic material as that of the internal dielectric layer 4, or a different type of ceramic material. The ceramic component includes at least one selected from, for example, BaTiO3, CaTiO3, (Ba,Ca)TiO3, SrTiO3, and CaZrO3. The main metal component of the base electrode layer 3a is preferably Cu.

[0043] The baked layer is formed by, for example, applying a conductive paste containing glass and metal to the laminate 2 and baking it. The baked layer can be formed by simultaneously baking a pre-fired laminate chip, which is the material for the laminate 2 having multiple internal electrodes and dielectric layers, and a conductive paste applied to the laminate chip. Alternatively, the baked layer can be formed by first firing the laminate chip to obtain the laminate 2, and then applying a conductive paste to the laminate 2 and baking it. In the above-mentioned formation method, it is preferable to form the baked layer by baking a material to which a ceramic material is added instead of a glass component. In this case, it is particularly preferable to use the same type of ceramic material as the internal dielectric layer 4 as the added ceramic material. The baked layer may be formed in multiple layers.

[0044] The thickness of the base electrode layer 3a at the end surface C in the length direction L is preferably, for example, about 2 μm to 220 μm at the center in the stacking direction T and width direction W of the base electrode layer 3a.

[0045] The thickness of the base electrode layer 3a provided on the main surface A (thickness in the direction normal to the main surface A) is preferably, for example, approximately 4 μm or more and 40 μm or less at the center of the base electrode layer 3a provided on the main surface A in the length direction L and width direction W.

[0046] The thickness of the base electrode layer 3a provided on the side B (thickness in the direction normal to the side B) is preferably, for example, approximately 4 μm or more and 40 μm or less at the center of the base electrode layer 3a provided on the side B in the length direction L and stacking direction T.

[0047] (Conductive resin layer) A conductive resin layer may be disposed on the base electrode layer. The conductive resin layer contains a resin component and a metal component. The conductive resin layer contains a thermosetting resin. By containing a thermosetting resin, the conductive resin layer is more flexible than the base electrode layer. It is preferable that the edge of the conductive resin layer contacts the laminate 2. The conductive resin layer functions as a buffer layer. Therefore, when a bending stress is applied to the mounting substrate and this stress causes a physical impact on the multilayer ceramic capacitor 1, cracks are unlikely to occur in the multilayer ceramic capacitor 1. When a shock due to a thermal cycle is applied to the multilayer ceramic capacitor 1, cracks are unlikely to occur in the multilayer ceramic capacitor 1.

[0048] The thermosetting resin contained in the conductive resin layer can be a thermosetting resin such as an epoxy resin, a phenolic resin, a urethane resin, a silicone resin, or a polyimide resin. Among these resins, an epoxy resin is one of the most suitable resins. An epoxy resin has excellent heat resistance, moisture resistance, and adhesion.

[0049] The conductive resin layer preferably contains a curing agent in addition to the thermosetting resin. When an epoxy resin is used as the thermosetting resin, the curing agent may be a phenol-based, amine-based, acid anhydride-based, imidazole-based, active ester-based, amide-imide-based compound, or the like.

[0050] As described above, the conductive resin layer contains a metal component. The inclusion of the metal component in the conductive resin layer makes the conductive resin layer electrically conductive. The metal component contained in the conductive resin layer is contained in the conductive resin layer as a metal filler. The thickness of the conductive resin layer is preferably 10 μm or more and 150 μm or less.

[0051] The base electrode layer 3a may be omitted. The base electrode layer may also be a thin film layer. When the base electrode layer is a thin film layer, the thin film layer can be formed by a thin film formation method such as sputtering or vapor deposition. The formed thin film layer is a layer in which metal particles are deposited. The thickness of the thin film layer is preferably 1 μm or less.

[0052] (plating layer 3b) The plating layer 3b includes a Ni plating layer 3b1 and a Sn plating layer 3b2.

[0053] (Ni plating layer 3b1) The Ni plating layer 3b1 is disposed on the base electrode layer. The Ni plating layer 3b1 covers at least a portion of the base electrode layer. The Ni plating layer 3b1 prevents the base electrode layer and other components from being eroded by solder when the multilayer ceramic capacitor 1 is mounted.

[0054] (Sn plating layer 3b2) The Sn plating layer 3b2 is disposed on the Ni plating layer 3b1 and covers at least a portion of the Ni plating layer 3b1.

[0055] The Sn plating layer 3b2 has good solder wettability and facilitates mounting of the multilayer ceramic capacitor 1 on a substrate or the like. The thickness of each of the Ni plating layer 3b1 and the Sn plating layer 3b2 is preferably 1 μm or more and 15 μm or less.

[0056] (Manufacturing Method of Multilayer Ceramic Capacitor 1) Next, an example of a method for manufacturing the multilayer ceramic capacitor 1 will be described. The method for manufacturing the multilayer ceramic capacitor 1 of the embodiment is not limited as long as it satisfies the above-mentioned requirements. However, a suitable manufacturing method includes the following steps. FIG. 4 is a flowchart illustrating a method for manufacturing the multilayer ceramic capacitor 1. FIG. 5A is a diagram showing a plurality of ceramic green sheets 14 before lamination in the method for manufacturing the multilayer ceramic capacitor 1. FIG. 5B is a cross-sectional view of a mother block 20 on which a plurality of ceramic green sheets 14 are laminated.

[0057] (Ceramic green sheet production process S1) First, a ceramic slurry containing ceramic powder, a binder, and a solvent is applied in a sheet form onto a carrier film to prepare a ceramic green sheet 14 .

[0058] Next, a conductive paste 15 containing metal powder, binders, additives such as plasticizers and dispersants, organic solvents, etc. is printed on the ceramic green sheet 14 in a strip-like pattern by screen printing, inkjet printing, gravure printing, etc.

[0059] As described above, the second side gap portion 8B of the multilayer ceramic capacitor 1 of the embodiment manufactured has a dimension W1 in the width direction W of the end portion on the first main surface A1 side in the stacking direction T, which gradually increases from W1 to W2 and then to W3 toward the second main surface A2 side in the stacking direction T, as shown in FIG. 3 . The maximum dimension W3 in the width direction W of the second side gap portion 8B is 1.5 times or more (1.5W1) the minimum dimension W1 in the width direction W of the second side gap portion 8B. <W3)である。

[0060] 3, the first side gap 8A of the multilayer ceramic capacitor 1 has a width W4 at its end on the first main surface A1 side in the stacking direction T, a width W6 at its end on the second main surface A2 side in the stacking direction T that is approximately equal to W4, and a width W5 at its center in the stacking direction T that is smaller than W4 and W6. However, the rate of change in the width W at the end on the first main surface A1 side in the stacking direction T of the first side gap 8A of the multilayer ceramic capacitor 1 is within 5%. Therefore, this is slight compared to the change in the width W of the second side gap 8B. Note that W4 is approximately equal to W1.

[0061] To manufacture such a multilayer ceramic capacitor 1, the conductive paste 15 printed on the surfaces of the ceramic green sheets 14 is printed so that the dimension in the width direction W gradually decreases from the ceramic green sheet 14t on the first main surface A1 side to the ceramic green sheet 14d on the second main surface A2 side. Fig. 5A shows a plurality of ceramic green sheets 14 printed so that the width of the conductive paste 15 in the width direction W gradually decreases from the first main surface A1 side toward the second main surface A2 side.

[0062] The ceramic green sheet 14t located closest to the first main surface A1 in the inner layer portion 6 has the largest width dimension of the conductive paste 15, i.e., the smallest gap between adjacent conductive pastes 15 in the width direction W is approximately W1+W4 (the gap becomes W1+W4 after firing). In the ceramic green sheet 14m located approximately in the center between the first main surface A1 and the second main surface A2, the gap between adjacent conductive pastes 15 in the width direction W is approximately W2+W5 (the gap becomes W2+W5 after firing). The ceramic green sheet 14d located closest to the second main surface A2 in the inner layer portion 6 has the smallest widthwise dimension between the conductive pastes 15, i.e., the largest gap between adjacent conductive pastes 15 in the width direction W is approximately W3+W6 (the gap becomes W3+W6 after firing).

[0063] (Lamination process S2) The ceramic green sheets 14 on which the conductive paste 15 is printed are stacked in the length direction L such that the conductive paste 15 between adjacent ceramic green sheets 14 in the stacking direction T is shifted by half a pitch.

[0064] On the other hand, the ceramic green sheets 14 on which the conductive paste 15 is printed are stacked in the width direction W, as shown in Figure 5B, between adjacent ceramic green sheets 14 in the stacking direction T, so that one end of the conductive paste 15 in the width direction W (the left end of each conductive paste 15 in Figure 5B) is at approximately the same position in the width direction W. In this case, the other end of the conductive paste 15 in the width direction W (the right end of each conductive paste 15 in Figure 5B) gradually shifts to the left in the width direction W as it goes from top to bottom, and the line connecting the right ends becomes a diagonal straight line.

[0065] (Mother block formation step S3) A ceramic green sheet 17A for the outer layer portion that will become the first outer layer portion 7A and a ceramic green sheet 17B for the second outer layer portion 7B are stacked on both sides of the stacked ceramic green sheets 14 in the stacking direction T, and these are thermocompression bonded to form the mother block 20 shown in Figure 5B.

[0066] At this time, the multilayer ceramic capacitor 1 is pressed in the stacking direction T, and the central portion of the inner layer portion 6 at the center in the stacking direction T extends slightly in the width direction, so that the dimension in the width direction W of the central portion in the stacking direction T of the first side gap portion 8A becomes W5, which is slightly smaller than W4 and W6. However, the rate of change in the dimension in the width direction W of the end portion on the first main surface A1 side in the stacking direction T of the first side gap portion 8A of the multilayer ceramic capacitor 1 is within 5%, so it can be considered to be approximately uniform compared to the change in the dimension in the width direction W of the second side gap portion 8B.

[0067] (Mother block cutting process S4) Next, the mother block 20 is cut by a cutting blade 21 at regular intervals in the width direction W and the length direction L to a predetermined size. 5B is a diagram illustrating a state in which the mother block 20 is cut in the width direction W. In the width direction W, the mother block 20 is cut by moving the cutting blade 21 between adjacent conductive pastes 15 from the first main surface A1 side toward the second main surface A2 side.

[0068] At this time, the cutting blade 21 is positioned approximately in the center between adjacent conductive pastes 15, which is approximately W1+W4 (W1≈W4), in the ceramic green sheet 14t located closest to the first main surface A1. However, as the cutting blade 21 moves from top to bottom, the position of the cutting blade 21 may shift from the center. This shift often occurs in a fixed direction.

[0069] Here, unlike the embodiment, if the spacing between adjacent conductive pastes 15 (i.e., the width of the side gap portion) is equal in all ceramic green sheets 14, there is a possibility that the cutting blade 21 may shift from the center between the conductive pastes 15 and approach one of the conductive pastes 15 as it moves from top to bottom.

[0070] The adhesive strength between the conductive paste 15 and the ceramic green sheet 14 is weaker than that between the portions where the ceramic green sheet 14 is directly laminated. Therefore, when a downward force is applied to the conductive paste 15 as the cutting blade 21 moves from top to bottom, the ceramic green sheet 14 on which the conductive paste 15 is printed may be pulled away from the ceramic green sheet 14 laminated above it, causing delamination. Since delamination has occurred at this point, the multilayer ceramic capacitor 1 that is finally manufactured will also have delamination.

[0071] However, in the embodiment, the ceramic green sheets 14 on which the conductive paste 15 is printed are stacked in the width direction W between adjacent ceramic green sheets 14 in the stacking direction T so that the left ends of the conductive paste 15 in the width direction W are at the same position in the width direction W, and the right ends of the conductive paste 15 in the width direction W are gradually shifted to the left in the width direction W as they move from top to bottom, so that the spacing between adjacent conductive pastes 15 gradually increases from top to bottom, and the line connecting the ends of the conductive pastes 15 in the width direction W becomes diagonal.

[0072] Therefore, in the mother block cutting step S4, the mother block 20 is oriented so that the direction in which the line connecting the ends of the conductive paste 15 in the width direction W is oblique is the direction in which the cutting blade 21 may be misaligned. In this way, even if the cutting blade 21 moves from top to bottom and deviates from the center between the conductive pastes 15, the possibility of the cutting blade 21 approaching the conductive pastes 15 is reduced, making peeling less likely to occur. Therefore, the possibility of interlayer peeling in the finally manufactured multilayer ceramic capacitor 1 is also reduced.

[0073] In order to avoid delamination, it is also possible to widen the gap between adjacent conductive pastes 15 in the width direction W in the left-right direction in the figure so that the cutting blade 21 can move diagonally in either direction from the center between the conductive pastes 15, making the lower side wider than the upper side in the cutting direction.

[0074] However, in recent years, there has been a demand for smaller multilayer ceramic capacitors with higher capacitance. If the width of the side gap portion increases downward on both the left and right sides in the width direction W, the width of the conductive paste 15 (internal electrode layer) on the lower side will become significantly narrower, which is counter to the need for higher capacitance.

[0075] In the multilayer ceramic capacitor 1 of the embodiment, the width of one side gap portion in the width direction W is constant, so the width of the conductive paste 15 (internal electrode layer) on the lower side can be made wider than when the width of the side gap portion is made wider toward the bottom on both sides in the width direction W.

[0076] That is, the multilayer ceramic capacitor 1 of the embodiment can prevent delamination while minimizing the decrease in capacitance.

[0077] (External electrode formation step S5) External electrodes 3 are formed on both ends of each individual laminate 2 manufactured by cutting the mother block 20 in this manner.

[0078] (Firing process S6) Then, the laminate is heated in a nitrogen atmosphere at a set firing temperature for a predetermined time, and the external electrodes 3 are baked onto the laminate 2, thereby producing the multilayer ceramic capacitor 1 shown in FIG.

[0079] As described above, according to the present invention, it is possible to provide a multilayer ceramic capacitor that maintains capacitance while reducing the possibility of delamination.

[0080] As described above, the embodiments of the present invention have been explained. However, the present invention is not limited to the above-described embodiments, and various changes and modifications as follows are possible. FIGS. 6A and 6B are diagrams showing a multilayer ceramic capacitor 1 as a modified example of the present invention.

[0081] In the above-described embodiment, the second side gap portion 8B has a dimension W1 (W1 < W2 < W3) in the width direction W at the end portion on the first main surface A1 side in the stacking direction T, and the dimension increases gradually from W1 to W3 from the end portion on the first main surface A1 side in the stacking direction T toward the second main surface A2 side in the stacking direction T. However, it is not limited thereto. If the dimension in the width direction W of the second side gap portion 8B increases gradually from the central portion in the stacking direction T toward the second main surface A2 side, the dimension may be the same W2 from the end portion on the first main surface A1 side to the central portion in the stacking direction T as shown in FIG. 6A.

[0082] In the above-described embodiment, the other end portion of the conductive paste 15 in the width direction W is slightly shifted in the position in the width direction W as going from top to bottom, and the line connecting the end portions is an oblique straight line. However, it is not limited thereto. If the dimension in the width direction W of the second side gap portion 8B increases gradually from the central portion in the stacking direction T toward the second main surface A2 side, the straight line connecting the end portions of the internal electrode layer may be curved as shown in FIG. 6B.

[0083] Also, various changes and modifications as follows are possible. <1> An inner layer portion in which an internal electrode layer and an internal dielectric layer are stacked, A first main surface and a second main surface facing each other in the stacking direction, A first end surface and a second end surface facing each other in the length direction intersecting the stacking direction, A first side surface and a second side surface facing each other in the width direction intersecting the stacking direction and the length direction, Two outer layer portions disposed on both sides of the inner layer portion in the stacking direction, A multilayer body having a first side gap portion located on the first side surface side of the inner layer portion and a second side gap portion located on the second side surface side, and external electrodes disposed on the first end surface and the second end surface; A multilayer ceramic capacitor comprising: the width direction dimension of the inner layer portion is approximately equal on the first principal surface side and the second principal surface side in the stacking direction, In a cross section passing through the stacking direction and the width direction at the center in the longitudinal direction, the first side gap portion has a widthwise dimension that is approximately equal on the first principal surface side and the second principal surface side in the stacking direction, The dimension in the width direction of the second side gap portion gradually increases from the center portion in the stacking direction toward the second main surface side. Multilayer ceramic electronic components.

[0084] <2> a rate of change in the width direction of the first side gap portion along the stacking direction is 5% or less; <1> The multilayer ceramic electronic component according to claim 1.

[0085] <3> The dimension of the second side gap portion in the width direction gradually increases from the first main surface toward the second main surface. <1> or <2> The multilayer ceramic electronic component according to claim 1.

[0086] <4> the maximum dimension of the second side gap portion in the width direction is 1.5 times or more the minimum dimension of the second side gap portion in the width direction; <1> from <3> 10. The multilayer ceramic electronic component according to claim 9, wherein the multilayer ceramic electronic component is a multilayer ceramic electronic component. [Explanation of symbols]

[0087] 1. Multilayer ceramic capacitors (multilayer ceramic electronic components) 2. Laminate 3 External electrode 4 inner dielectric layers 5 Internal electrode layer 6 Inner layer 7 Outer layer 8 Side gap section 8A First side gap 8B Second side gap 11 Inner layer 14 Ceramic green sheet 15 Conductive paste 20 Mother Block

Claims

1. an inner layer portion in which an inner electrode layer and an inner dielectric layer are laminated; a first main surface and a second main surface facing each other in the stacking direction; a first end surface and a second end surface facing each other in a length direction intersecting the stacking direction; a first side surface and a second side surface facing each other in a width direction intersecting the stacking direction and the length direction; two outer layer portions arranged on both sides of the inner layer portion in the stacking direction; a laminate having a first side gap portion located on the first side surface side of the inner layer portion and a second side gap portion located on the second side surface side of the inner layer portion; and external electrodes disposed on the first end surface and the second end surface; A multilayer ceramic capacitor comprising: the width direction dimension of the inner layer portion is approximately equal on the first main surface side and the second main surface side in the stacking direction, In a cross section passing through the stacking direction and the width direction at the center in the longitudinal direction, a dimension in the width direction of the first side gap portion is approximately equal on the first main surface side and the second main surface side in the stacking direction, the dimension in the width direction of the second side gap portion gradually increases from a center portion in the stacking direction toward the second main surface side; Multilayer ceramic electronic components.

2. a rate of change in the width direction of the first side gap portion along the stacking direction is 5% or less; The multilayer ceramic electronic component according to claim 1 .

3. The dimension of the second side gap portion in the width direction gradually increases from the first main surface toward the second main surface. The multilayer ceramic electronic component according to claim 1 .

4. the maximum dimension of the second side gap portion in the width direction is 1.5 times or more the minimum dimension of the second side gap portion in the width direction; The multilayer ceramic electronic component according to claim 1 .

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