Gate drive device

The gate drive device enhances temperature estimation accuracy in semiconductor switching elements by adjusting the gate voltage to a half-on voltage and utilizing temperature dependency information, addressing the low accuracy of existing methods.

JP2025136222APending Publication Date: 2025-09-19DENSO CORP +2
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Patent Information

Application Number
JP2024034523
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-07
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

Existing methods for estimating the temperature of semiconductor switching elements, such as measuring element current and on-voltage, suffer from low accuracy due to minimal changes in voltage-current characteristics at typical gate drive voltages.

Method used

A gate drive device that adjusts the gate voltage to a half-on voltage, utilizing temperature dependency information to accurately determine the semiconductor switching element's temperature by increasing the sensitivity of voltage-current characteristics to temperature changes.

Benefits of technology

Enables precise temperature estimation of semiconductor switching elements by enhancing the sensitivity of voltage-current characteristics at the half-on voltage, thereby improving accuracy.

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Abstract

To provide a technique capable of highly accurately estimating a temperature of a semiconductor switching element.SOLUTION: A gate drive device 4 includes: a driver unit 10 capable of adjusting a gate voltage of a semiconductor switching element SW to at least one of an off voltage, a full-on voltage, and a half-on voltage; a memory 40 for storing temperature dependency information of the semiconductor switching element SW; and an operation unit 50 for, when the driver unit 10 adjusts the gate voltage to the half-on voltage, referencing the temperature dependency information and identifying an estimated temperature value of the semiconductor switching element SW on the basis of an element current and an on-voltage of the semiconductor switching element SW.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The technology disclosed in this specification relates to a gate driver. [Background technology]

[0002] For example, a technique for estimating the temperature of a semiconductor switching element is required to control the semiconductor switching element and implement a fail-safe. Conventionally, a technique for attaching a thermistor to the semiconductor switching element or a technique for fabricating a temperature-sensitive diode on the substrate of the semiconductor switching element is known. However, these techniques require the thermistor or temperature-sensitive diode to be additionally mounted on the semiconductor switching element, which increases manufacturing costs.

[0003] Patent Document 1 discloses a technique for measuring the element current and on-voltage of a semiconductor switching element when the semiconductor switching element is on, and estimating the temperature of the semiconductor switching element based on the measured element current and on-voltage. This technique eliminates the need for a thermistor or temperature-sensitive diode, thereby reducing manufacturing costs. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2020-195194 Summary of the Invention [Problem to be solved by the invention]

[0005] Typically, the gate drive voltage input to the gate of a semiconductor switching element is set to a value sufficiently higher than the threshold voltage so that the on-resistance of the semiconductor switching element is sufficiently low. In the technology of Patent Document 1, the element current and on-voltage of the semiconductor switching element are measured when the gate drive voltage is input to the gate of the semiconductor switching element. The voltage-current characteristics measured at such timing change little with respect to temperature. For this reason, the technology of Patent Document 1 has a problem in that the accuracy of temperature estimation is low. This specification provides a technology that can estimate the temperature of a semiconductor switching element with high accuracy. [Means for solving the problem]

[0006] The gate drive device (4) disclosed in this specification may include a driver unit (10), a memory (40), and a calculation unit (50). The driver unit may be capable of adjusting the gate voltage of the semiconductor switching element (SW) to at least one of an off voltage, a full-on voltage, and a half-on voltage. The half-on voltage is a voltage lower than the full-on voltage. The memory may store temperature dependency information of the semiconductor switching element. When the driver unit adjusts the gate voltage to the half-on voltage, the calculation unit may refer to the temperature dependency information and determine an estimated temperature value of the semiconductor switching element based on the element current and on voltage of the semiconductor switching element.

[0007] When the gate voltage is adjusted to the half-on voltage, the on-resistance of the semiconductor switching element increases, and the amount of change in the on-resistance of the semiconductor switching element with respect to temperature also increases. Therefore, the voltage-current characteristics of the semiconductor switching element when the gate voltage is adjusted to the half-on voltage change significantly with temperature. The gate drive device determines an estimated temperature value of the semiconductor switching element based on the element current and on-voltage of the semiconductor switching element when the gate voltage is adjusted to the half-on voltage. Therefore, the gate drive device can estimate the temperature of the semiconductor switching element with high accuracy. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram illustrating a schematic configuration of a motor drive device. [Figure 2] FIG. 1 is a diagram illustrating a configuration of a gate driving device. [Figure 3] FIG. 2 is a diagram illustrating a configuration of a driver unit. [Figure 4] FIG. 10 is a diagram showing the relationship between on-resistance and gate voltage (that is, off-voltage, full-on voltage, and half-on voltage). [Figure 5] FIG. 10 is a diagram showing the relationship between the on-voltage and the temperature when the gate voltage is a full-on voltage and a half-on voltage. [Figure 6] FIG. 3 is a diagram showing a timing chart of the gate driver of FIG. 2. [Figure 7] FIG. 3 is a diagram showing an example of a modified example of the gate driving device of FIG. [Figure 8] FIG. 3 is a diagram showing an example of a modified example of the gate driving device of FIG. [Figure 9] FIG. 10 is a diagram showing a plurality of types of temperature dependency information stored in a memory. [Figure 10] FIG. 3 is a diagram showing an example of a modified example of the gate driving device of FIG. [Figure 11] 11 is a diagram showing an example of a modified example of the driver section of the gate drive device of FIG. DETAILED DESCRIPTION OF THE INVENTION

[0009] Fig. 1 shows the configuration of a motor drive device 1 to which the technology disclosed in this specification is applied. The motor drive device 1 is not particularly limited, and may be mounted on a vehicle, for example. The motor drive device 1 is a device that supplies three-phase AC power to a motor M, and includes a battery 2 that serves as a main power source, an inverter 3, a plurality of gate drive devices 4up to 4wn, and a controller 5. Note that the technology disclosed in this specification may also be applied to devices that drive loads other than motors.

[0010] A positive power supply line L1 is connected to the positive electrode of the battery 2, and a negative power supply line L2 is connected to the negative electrode of the battery 2. The inverter 3 converts a DC voltage supplied from the battery 2 to a pair of power supply lines L1 and L2 into a three-phase (i.e., U-phase, V-phase, and W-phase) AC voltage and outputs it to the motor M. The inverter 3 includes three switching circuits 3u, 3v, and 3w connected in parallel between the pair of power supply lines L1 and L2. The three switching circuits 3u, 3v, and 3w have a common circuit configuration. The switching circuit 3u corresponding to the U phase includes semiconductor switching elements SWup and SWun connected in series between the pair of power supply lines L1 and L2. The switching circuit 3v corresponding to the V phase includes semiconductor switching elements SWvp and SWvn connected in series between the pair of power supply lines L1 and L2. The switching circuit 3w corresponding to the W phase includes semiconductor switching elements SWwp and SWwn connected in series between the pair of power supply lines L1 and L2. The connection nodes between the upper and lower arms of each of the three switching circuits 3u, 3v, and 3w are connected to corresponding one of the three winding terminals of the motor M. The multiple semiconductor switching elements SWup to SWwn are the same type of power devices. Hereinafter, when there is no need to distinguish between these semiconductor switching elements SWup to SWwn, they will be referred to as semiconductor switching elements SW.

[0011] The semiconductor switching element SW is not particularly limited, and may be, for example, a MOSFET manufactured using a silicon carbide (SiC) substrate. The MOSFET of the semiconductor switching element SW has a built-in body diode consisting of a p-type body region and an n-type drift region. Such a body diode is connected in anti-parallel to the MOSFET of the semiconductor switching element SW and can function as a freewheeling diode. Note that, in addition to the built-in body diode, a diode element may be connected in anti-parallel to the MOSFET of the semiconductor switching element SW.

[0012] Each of the plurality of gate drive devices 4up to 4wn is configured to control the gate voltage of a corresponding semiconductor switching element SWup to SWwn among the plurality of semiconductor switching elements SWup to SWwn. A drive instruction signal S1 and a temperature estimation mode instruction signal S2 are input to each of the plurality of gate drive devices 4up to 4wn from the controller 5. The drive instruction signal S1 is a signal that instructs PWM control of the semiconductor switching element SW. The temperature estimation mode instruction signal S2 is a signal that instructs estimation of the temperature of the semiconductor switching element SW. The plurality of gate drive devices 4up to 4wn have a common circuit configuration. Hereinafter, when there is no need to distinguish between these gate drive devices 4up to 4wn, they will be referred to as gate drive device 4.

[0013] 2 shows the configuration of the gate driver 4. The gate driver 4 includes a driver section 10, a current measurement section 20, a voltage measurement section 30, a memory 40, and a calculation section 50.

[0014] As shown in FIG. 3, the driver section 10 includes a push-pull circuit 12, a power supply switching circuit 14, a full-on voltage power supply 16, and a half-on voltage power supply 18.

[0015] The push-pull circuit 12 is configured to control the on / off of the CMOS transistor based on the drive instruction signal S1, and switch between an operation in which a gate current flows into the gate of the semiconductor switching element SW and an operation in which a gate current flows out from the gate.

[0016] The power supply switching circuit 14 is configured to switch the power supply connected to the push-pull circuit 12 between a full-on voltage power supply 16 and a half-on voltage power supply 18 based on a temperature estimation permission signal S6, which will be described later.

[0017] The full-on voltage power supply 16 is a power supply that supplies a gate drive voltage to be input to the gate of the semiconductor switching element SW in the normal drive mode, and is not particularly limited, but may be a power supply that supplies 20 to 25V, for example.

[0018] Half-on voltage power supply 18 is a power supply that supplies a gate drive voltage to be input to the gate of semiconductor switching element SW in the temperature estimation mode, and is a power supply that supplies a voltage lower than the voltage supplied by full-on voltage power supply 16. A dedicated power supply may be provided for half-on voltage power supply 18, or it may be shared with a power supply used for other logic circuits (for example, current measurement unit 20, voltage measurement unit 30, or calculation unit 50).

[0019] Here, referring to FIG. 4, the off voltage, full-on voltage, and half-on voltage input to the gate of the semiconductor switching element SW will be described. FIG. 4 shows the relationship between the gate voltage and on resistance of the semiconductor switching element SW. The off voltage is a voltage equal to or lower than the gate threshold voltage Vth1. When the gate voltage of the semiconductor switching element SW is the off voltage, no current flows through the semiconductor switching element SW. The full-on voltage is a voltage sufficiently higher than the gate threshold voltage Vth1. When the gate voltage of the semiconductor switching element SW is the full-on voltage, the on resistance of the semiconductor switching element SW becomes sufficiently low, allowing element current to flow. The full-on voltage is a voltage set to turn on the semiconductor switching element SW in normal operation mode. The half-on voltage is a voltage between the gate threshold voltage Vth1 and the full-on voltage. When the gate voltage of the semiconductor switching element SW is the half-on voltage, the on resistance of the semiconductor switching element SW is higher than when it is fully on, but element current can flow.

[0020] Referring to Figure 5, we will explain the temperature dependence of the voltage between the main electrodes (i.e., the voltage between the drain and source, also known as the on-voltage) when the gate voltage of the semiconductor switching element SW is at full-on voltage or half-on voltage. Note that Figure 5 shows the case where the main electrode current (i.e., the current flowing between the drain and source, also known as the element current) flowing through the semiconductor switching element SW is the same. When the gate voltage of the semiconductor switching element SW is at full-on voltage, the on-resistance of the semiconductor switching element SW is sufficiently low, so the on-voltage is low. When the gate voltage of the semiconductor switching element SW is at half-on voltage, the on-resistance of the semiconductor switching element SW is higher than when it is at full-on voltage, so the on-voltage is high. Furthermore, when the gate voltage of the semiconductor switching element SW is at half-on voltage, the on-resistance changes with temperature more significantly, and the on-voltage also changes with temperature more significantly. Thus, when the gate voltage of the semiconductor switching element SW is at half-on voltage, the voltage-current characteristics of the semiconductor switching element SW become more sensitive to temperature.

[0021] Returning to Fig. 2, the current measurement unit 20 has an ammeter 22, a current direction determination comparator 24, a current value determination comparator 26, a first AND circuit 28, and a second AND circuit 29. The current direction determination comparator 24, the current value determination comparator 26, the first AND circuit 28, and the second AND circuit 29 form a logic circuit for determining whether or not to permit a transition from the normal operation mode to the temperature estimation mode.

[0022] The ammeter 22 measures the device current of the semiconductor switching device SW and outputs a device current monitor output Iout corresponding to the measured device current. The device current monitor output Iout is input to the current direction determination comparator 24, the current value determination comparator 26, and the calculation unit 50, respectively.

[0023] The current direction determination comparator 24 determines whether the element current flowing through the semiconductor switching element SW is in the forward direction (i.e., from drain to source). A current direction determination threshold voltage Vth2 is input to the inverting input terminal (-) of the current direction determination comparator 24, and the element current monitor output Iout is input to the non-inverting input terminal (+) of the current direction determination comparator 24. When the element current monitor output Iout is equal to or greater than the current direction determination threshold voltage Vth2, the current direction determination comparator 24 outputs a current direction determination signal S3 as Hi, and determines that the element current flowing through the semiconductor switching element SW is in the forward direction.

[0024] The current value determination comparator 26 determines whether the element current flowing through the semiconductor switching element SW is equal to or less than a threshold. A current value determination threshold voltage Vth3 is input to the non-inverting input terminal (+) of the current value determination comparator 26, and the element current monitor output Iout is input to the inverting input terminal (-) of the current value determination comparator 26. When the element current monitor output Iout is equal to or less than the current value determination threshold voltage Vth3, the current value determination comparator 26 outputs a current value determination signal S4 as Hi, and determines that the element current flowing through the semiconductor switching element SW is equal to or less than the threshold.

[0025] The first AND circuit 28 determines whether to permit the gate voltage of the semiconductor switching element SW to be set to the half-on voltage. The first AND circuit 28 receives a current direction determination signal S3 and a current value determination signal S4. When the element current flowing through the semiconductor switching element SW is forward and equal to or less than a threshold, the first AND circuit 28 outputs a half-on permission signal S5 as Hi, permitting the gate voltage of the semiconductor switching element SW to be set to the half-on voltage. The permission determination by the first AND circuit 28 prevents the gate voltage from becoming the half-on voltage when the element current flowing through the semiconductor switching element SW is large. If the gate voltage becomes the half-on voltage when the element current is large, loss in the semiconductor switching element SW increases. The permission determination by the first AND circuit 28 enables the temperature of the semiconductor switching element SW to be estimated while suppressing loss in the semiconductor switching element SW.

[0026] The second AND circuit 29 determines whether or not to permit transition to the temperature estimation mode. The second AND circuit 29 receives the temperature estimation mode instruction signal S2 and the half-on permission signal S5. When both the temperature estimation mode instruction signal S2 and the half-on permission signal S5 are Hi, the second AND circuit 29 outputs the temperature estimation permission signal S6 as Hi, permitting transition to the temperature estimation mode. The temperature estimation permission signal S6 is input to the driver unit 10, the voltage measurement unit 30, and the calculation unit 50.

[0027] The voltage measurement unit 30 has a gate-on determination comparator 32, a third AND circuit 34, a high-voltage switch 36, and a voltmeter 38. The gate-on determination comparator 32, the third AND circuit 34, and the high-voltage switch 36 form a logic circuit that determines whether or not to permit measurement of the on-voltage of the semiconductor switching element SW.

[0028] The gate-on determination comparator 32 determines whether the semiconductor switching element SW is on. A gate threshold voltage Vth1 is input to the inverting input terminal (-) of the gate-on determination comparator 32, and a gate voltage Vg of the semiconductor switching element SW is input to the non-inverting input terminal (+) of the gate-on determination comparator 32. When the gate voltage Vg is equal to or greater than the gate threshold voltage Vth1, the gate-on determination comparator 32 outputs a gate-on determination signal S7 as Hi, and determines that the semiconductor switching element SW is on.

[0029] The third AND circuit 34 determines whether or not to permit measurement of the on-voltage of the semiconductor switching element SW. The temperature estimation permission signal S6 and the gate-on determination signal S7 are input to the third AND circuit 34. When the temperature estimation permission signal S6 and the gate-on determination signal S7 are both Hi, the third AND circuit 34 sets the output, which is the on-voltage measurement permission signal S8, to Hi, and permits measurement of the on-voltage of the semiconductor switching element SW.

[0030] The high-voltage switch 36 is provided between the drain of the semiconductor switching element SW and the voltmeter 38. When the on-voltage measurement enable signal S8 is Hi, the high-voltage switch 36 closes, connecting the drain of the semiconductor switching element SW to the voltmeter 38. The provision of this high-voltage switch 36 prevents the drain-source voltage of the semiconductor switching element SW from being input to the voltmeter 38 when the semiconductor switching element SW is off. The drain-source voltage is high when the semiconductor switching element SW is off. If such a high voltage is input to the voltmeter 38, there is a concern that the amplifier built into the voltmeter 38 may malfunction. The provision of the high-voltage switch 36 prevents malfunction of the voltmeter 38. Note that if the DC voltage of the battery 2 (see FIG. 1) is low, a logic circuit including the high-voltage switch 36 may not be provided.

[0031] The voltmeter 38 measures the on-voltage of the semiconductor switching element SW in the temperature estimation mode, and outputs an on-voltage monitor output Vout corresponding to the measured on-voltage. The on-voltage monitor output Vout is input to the calculation unit 50.

[0032] The memory 40 stores temperature dependency information of the semiconductor switching element SW. The temperature dependency information is data describing the correspondence between the temperature, gate voltage, element current, and on-voltage of the semiconductor switching element SW. For example, the temperature dependency information may be data describing the relationship between the on-voltage and temperature at multiple element currents for multiple gate voltages corresponding to half-on voltages. As will be described in a modified example below, the temperature dependency information may also be data describing the relationship between the on-resistance and temperature for multiple gate voltages corresponding to half-on voltages. Such temperature dependency information may be created from data measured during shipping testing of the semiconductor switching element SW and stored in the memory 40. The temperature dependency information may be described as a function with the gate voltage, element current, and on-voltage as explanatory variables and an estimated temperature value as a response variable.

[0033] The calculation unit 50 calculates an estimated temperature value of the semiconductor switching element SW. The calculation unit 50 receives the temperature estimation enable signal S6, the element current monitor output Iout from the ammeter 22, and the on-voltage monitor output Vout from the voltmeter 38. As described in a modified example below, if the half-on voltage input to the gate of the semiconductor switching element SW is variable, the calculation unit 50 also receives the gate voltage Vg of the semiconductor switching element SW. If only one fixed half-on voltage is used, the calculation unit 50 can perform calculations based on the fixed gate voltage Vg, and the gate voltage Vg need not be input. The calculation unit 50 is also communicatively connected to the memory 40 and can refer to temperature dependency information stored in the memory 40. In the temperature estimation mode, the calculation unit 50 refers to the temperature dependency information, determines an estimated temperature value of the semiconductor switching element SW based on the gate voltage, element current, and on-voltage of the semiconductor switching element SW, and outputs a temperature estimation monitor output Tout corresponding to the estimated temperature value. The temperature estimation monitor output Tout may be an analog value or a digital value. The temperature estimation monitor output Tout is input to, for example, the controller 5 (see FIG. 1). The controller 5 may perform, for example, feedback control of the drive instruction signal S1 based on the temperature estimation monitor output Tout.

[0034] The operation of the gate driver 4 will be described with reference to the timing chart of FIG. 6. In this example, the drive instruction signal S1 instructs PWM control such that it rises at times t1 and t4 and falls at time t2. The temperature estimation mode instruction signal S2 switches to Hi at time t3. The gate driver 4 operates in normal drive mode until time t3, transitions from normal drive mode to temperature estimation mode from time t3 to time t5, and operates in temperature estimation mode from time t5 onwards. In the normal drive mode until time t3, the gate driver 4 inputs a full-on voltage to the gate of the semiconductor switching element SW based on the drive instruction signal S1 (see FIG. 3).

[0035] At time t4, the drive instruction signal S1 rises, and the gate driver 4 inputs a full-on voltage to the gate of the semiconductor switching element SW. Because a forward element current flows through the semiconductor switching element SW, the current direction determination signal S3 goes high. In this example, the element current monitor output Iout is equal to or lower than the current value determination threshold voltage Vth3, so the current value determination signal S4 remains high. Because both the current direction determination signal S3 and the current value determination signal S4 are high, the gate driver 4 switches the half-on enable signal S5 to high, and then switches the temperature estimation enable signal S6 to high as well. This transitions to temperature estimation mode. At time t5, the gate driver 4 switches the gate drive voltage of the semiconductor switching element SW to a half-on voltage based on the temperature estimation enable signal S6 (see Figure 3). As a result, the gate resistance of the semiconductor switching element SW increases, and the drain-source voltage (i.e., the on-voltage) of the semiconductor switching element SW increases. The gate driver 4 starts measuring the on-voltage of the semiconductor switching element SW, and inputs the on-voltage monitor output Vout to the calculation unit 50 (see FIG. 2).

[0036] As described above, the calculation unit 50 of the gate driver 4 refers to the temperature dependency information stored in the memory 40 and determines the estimated temperature value of the semiconductor switching element SW based on the gate voltage, element current, and on-voltage of the semiconductor switching element SW. Because the gate voltage of the semiconductor switching element SW is adjusted to a half-on voltage, the voltage-current characteristics of the semiconductor switching element SW change significantly with temperature (see FIG. 5). Therefore, the gate driver 4 can estimate the temperature of the semiconductor switching element SW with high accuracy.

[0037] Below, we will explain some modified examples of the gate driver 4. In the following modified examples, components having substantially the same functions as those in the above examples will be given the same reference numerals, and their explanation will be omitted.

[0038] (1) The gate driver 4 shown in Fig. 7 is configured such that the device current monitor output Iout output from the ammeter 22 is also input to the driver unit 10. The driver unit 10 is configured to increase or decrease the half-on voltage supplied from the half-on voltage power supply 18 based on the device current monitor output Iout. The driver unit 10 may be configured to vary the half-on voltage in multiple stages, or may be configured to vary the half-on voltage linearly. Such a driver unit 10 is not particularly limited, and may be configured using, for example, a variable output voltage three-terminal regulator.

[0039] The driver unit 10 increases the half-on voltage when the device current of the semiconductor switching element SW is large, and decreases the half-on voltage when the device current of the semiconductor switching element SW is small. By increasing the half-on voltage when the device current is large, the on-resistance of the semiconductor switching element SW is decreased, thereby reducing loss. Furthermore, by decreasing the half-on voltage when the device current is small, the on-resistance of the semiconductor switching element SW is increased, thereby reducing a decrease in sensitivity of the voltage-current characteristics. In this way, the driver unit 10, which is configured to be able to increase or decrease the half-on voltage, can achieve both low loss and highly accurate temperature estimation over a wide range of device currents.

[0040] (2) As shown in FIG. 8 , the device current monitor output Iout may be input to the inverting input terminal (−) of the current direction determination comparator 24, and the current direction determination threshold voltage Vth2 may be input to the non-inverting input terminal (+) of the current direction determination comparator 24. In this modified example, the current direction determination comparator 24 sets the current direction determination signal S3 to Hi when the device current flowing through the semiconductor switching element SW is in the reverse direction, i.e., during reverse conduction. Furthermore, the current value determination comparator 26 sets the output, which is the current value determination signal S4, to Hi when the device current monitor output Iout is equal to or greater than the current value determination threshold voltage Vth3. Therefore, during reverse conduction, the gate driver 4 can input a half-on voltage to the gate of the semiconductor switching element SW to synchronously rectify the semiconductor switching element SW. This allows the gate driver 4 to estimate the temperature of the semiconductor switching element SW while suppressing losses due to the voltage generated in the freewheel diode and the reverse conduction current.

[0041] Furthermore, the driver unit 10 of the gate driver 4 shown in FIG. 8 may be configured to increase or decrease the half-on voltage supplied from the half-on voltage power supply 18 so that the drain-source voltage of the semiconductor switching element SW does not exceed the forward voltage of the freewheel diode. For example, the driver unit 10 may adjust the drain-source voltage so that it does not exceed the forward voltage of the freewheel diode by increasing the half-on voltage when the element current of the semiconductor switching element SW is large, based on the element current monitor output Iout, thereby reducing the on-resistance of the semiconductor switching element SW. This effectively prevents the freewheel diode from operating, preventing the on-voltage of the semiconductor switching element SW from being clamped by the freewheel diode. As a result, the gate driver 4 reduces loss due to synchronous rectification of the semiconductor switching element SW and can accurately estimate the temperature of the semiconductor switching element SW.

[0042] (3) As shown in FIG. 9, the memory 40 may store multiple types of temperature dependency information. Forward temperature dependency information 42 is data describing the correspondence between the temperature, gate voltage, device current, and on-voltage of the semiconductor switching element SW when a forward device current flows through the semiconductor switching element SW. This forward temperature dependency information 42 corresponds to the temperature dependency information referenced in the example shown in FIG. 2. Reverse conduction temperature dependency information 44 is data describing the correspondence between the temperature, gate voltage, device current, and on-voltage of the semiconductor switching element SW when the semiconductor switching element SW is synchronously rectified. This reverse conduction temperature dependency information 44 corresponds to the temperature dependency information referenced in the example shown in FIG. 8. Freewheel diode temperature dependency information 46 is data describing the correspondence between the temperature, device current, and drain-source voltage of the semiconductor switching element SW when the freewheel diode operates predominantly in reverse conducting operation. The free wheel diode temperature dependency information 46 is temperature dependency information that is referenced when current flows predominantly through the free wheel diode, for example, when a time (i.e., dead time) is provided to prevent the semiconductor switching elements SW of the upper and lower arms from being turned on simultaneously, when a semiconductor switching element SW (e.g., IGBT) that cannot perform synchronous rectification is used, or when a large current flows during synchronous rectification.

[0043] The calculation unit 50 references appropriate temperature dependency information from among these multiple types of temperature dependency information based on the operating state of the semiconductor switching element SW, and estimates the temperature of the semiconductor switching element SW. This allows the gate drive device 4 to estimate the temperature of the semiconductor switching element SW with high accuracy based on the operating state of the semiconductor switching element SW.

[0044] (4) The temperature dependency information may be data describing the relationship between on-resistance and temperature for each of a plurality of gate voltages corresponding to half-on voltages. In this case, the calculation unit 50 may calculate the on-resistance of the semiconductor switching element SW from the measured element current and on-voltage, and may refer to the temperature dependency information of the on-resistance and determine an estimated temperature value of the semiconductor switching element SW from the calculated on-resistance. In this modification, the amount of data of the temperature dependency information stored in the memory 40 is reduced.

[0045] (5) The calculation unit 50 may store in the memory 40 combination data of the on-state voltage and the device current measured in the temperature estimation mode. The calculation unit 50 may extract, from the stored combination data, combination data measured under conditions similar to those of the measured combination data, and output an abnormality signal when the measured combination data is an outlier relative to the statistics (e.g., arithmetic mean) of the extracted combination data. The "similar conditions" mentioned here are not particularly limited, but may refer, for example, to cases where the external temperatures at the time of measurement are similar. The memory 40 may store each combination data in association with the external temperature acquired from an external temperature sensor at the time of measurement. This allows the gate driver 4 to detect, for example, an increase in on-state resistance due to deterioration of the semiconductor switching element SW.

[0046] (6) The gate drive device 4 shown in FIG. 10 is an example configured to estimate the temperature of the semiconductor switching element SW when the semiconductor switching element SW is disconnected from the battery 2 (see FIG. 1), for example, during startup of the motor drive device 1 (see FIG. 1). This gate drive device 4 operates based on a shutdown temperature estimation mode instruction signal S9 that instructs temperature estimation when the semiconductor switching element SW is disconnected from the battery 2. The gate drive device 4 includes a constant current source 62 and a switch 64. The constant current source 62 is connected to the drain of the semiconductor switching element SW via the switch 64. The switch 64 closes when the shutdown temperature estimation mode instruction signal S9 is high. This causes the constant current source 62 to supply a constant current to the semiconductor switching element SW when the shutdown temperature estimation mode instruction signal S9 is high. Furthermore, the driver unit 10 is configured to input a half-on voltage to the gate of the semiconductor switching element SW when the shutdown temperature estimation mode instruction signal S9 is high. In this way, when the semiconductor switching element SW is disconnected from the battery 2 (see FIG. 1), the gate driver 4 supplies a constant current to the semiconductor switching element SW and inputs a half-on voltage to the gate of the semiconductor switching element SW. In this example, the half-on voltage and element current input to the gate of the semiconductor switching element SW may be fixed values. For this reason, it is sufficient for the calculation unit 50 to receive only the on-voltage monitor output Vout output from the voltmeter 38. This allows the gate driver 4 to estimate the temperature of the semiconductor switching element SW with high accuracy when the semiconductor switching element SW is disconnected from the battery 2. The acquired temperature estimate may be used for initialization at startup, correction of temperature-dependent information stored in the memory 40, etc.

[0047] In the normal operation mode, a current source may be used to drive the gate of the semiconductor switching element SW. In this case, the constant current source 62 for the shutdown temperature estimation mode and the normal operation mode may be shared. FIG. 11 shows a driver unit 10 in which the constant current source 62 is shared. This driver unit 10 includes a NOT circuit 72, a first switch 74, a second switch 76, and a third switch 78. The constant current source 62 and the first switch 74 are connected in series between the full-on voltage power supply 16 and the gate of the semiconductor switching element SW. The first switch 74 receives an inverted shutdown temperature estimation mode instruction signal S9 from the NOT circuit 72. Therefore, the first switch 74 is closed when the shutdown temperature estimation mode instruction signal S9 is low, i.e., in the normal operation mode. The constant current source 62 and the second switch 76 are connected in series between the full-on voltage power supply 16 and the drain of the semiconductor switching element SW. A third switch 78 is connected between the half-on voltage power supply 18 and the gate of the semiconductor switching element SW. The second switch 76 and the third switch 78 are closed when the shutdown temperature estimation mode instruction signal S9 is Hi, i.e., when the shutdown temperature estimation mode is selected. In this manner, the driver unit 10 of the modified example can perform gate driving in the normal operation mode and constant current supply in the shutdown temperature estimation mode using a single constant current source 62.

[0048] Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and variations of the specific examples exemplified above. Furthermore, the technical elements described in this specification or drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technology exemplified in this specification or drawings can achieve multiple objectives simultaneously, and achieving one of these objectives itself has technical utility. [Explanation of symbols]

[0049] 4: Gate driver, 10: Driver section, 16: Full-on voltage power supply, 18: Half-on voltage power supply, 0: Current measurement section, 22: Ammeter, 24: Current direction determination comparator, 26: Current value determination comparator, 28: First AND circuit, 29: Second AND circuit, 30: Voltage measurement section, 32: Gate-on determination comparator, 34: Third AND circuit, 36: High-voltage switch, 38: Voltmeter, 40: Memory, 50: Calculation section, SW: Semiconductor switching element

Claims

1. A gate driver (4), a driver unit (10) capable of adjusting the gate voltage of a semiconductor switching element (SW) to at least one of an off voltage, a full-on voltage, and a half-on voltage, the half-on voltage being lower than the full-on voltage; a memory (40) in which temperature dependency information of the semiconductor switching element is stored; a calculation unit (50) that, when the driver unit adjusts the gate voltage to the half-on voltage, refers to the temperature dependency information and specifies an estimated temperature value of the semiconductor switching element based on an element current and an on-voltage of the semiconductor switching element.

2. a current measuring unit (20) for measuring the element current of the semiconductor switching element; 2. The gate driver according to claim 1, further comprising a voltage measurement unit (30) that measures the on-voltage of the semiconductor switching element.

3. The gate driver according to claim 2 , wherein the driver section increases or decreases the half-on voltage based on the measured device current.

4. The calculation unit calculating an on-resistance of the semiconductor switching element from the element current and the on-voltage; 2. The gate driver according to claim 1, further comprising: a step of: referring to the temperature dependency information of the on-resistance, and specifying the estimated temperature value of the semiconductor switching element from the calculated on-resistance.

5. The temperature dependency information includes forward temperature dependency information (42) when the semiconductor switching element is in forward operation, 2. The gate driver according to claim 1, wherein the calculation unit refers to the forward temperature dependency information when the semiconductor switching element is in the forward operation and the gate voltage is adjusted to the half-on voltage.

6. the temperature dependency information includes reverse conduction temperature dependency information (44) when the semiconductor switching element is in reverse conduction operation, 2. The gate driver according to claim 1, wherein the calculation unit refers to the reverse conduction temperature dependency information when the semiconductor switching element is in the reverse conduction operation and the gate voltage is adjusted to the half-on voltage.

7. 7. The gate drive device according to claim 6, wherein the driver section increases or decreases the half-on voltage so that a voltage between main electrodes of the semiconductor switching element does not exceed a forward voltage of a free wheel diode connected in antiparallel to the semiconductor switching element.

8. the temperature dependency information includes freewheel diode temperature dependency information (46) when the semiconductor switching element is in reverse conduction and the gate voltage is the off voltage; 2. The gate driver according to claim 1, wherein the calculation unit refers to the free wheel diode temperature dependency information when the semiconductor switching element is in the reverse conducting operation and the gate voltage is adjusted to the off voltage.

9. The power supply further includes a constant current source (62) capable of supplying a constant current to the semiconductor switching element when the semiconductor switching element is disconnected from the main power supply (2), 9. The gate drive device according to claim 1, wherein the driver section adjusts the gate voltage to the half-on voltage when the constant current is supplied to the semiconductor switching element.

Citation Information

Patent Citations

  • Power conversion device and method for monitoring device state of power conversion device

    JP2020195194A