Rectifier circuit, semiconductor package, and power supply

The rectifier circuit addresses large reverse currents by controlling switching elements to prevent simultaneous reverse recovery and charging currents, resulting in reduced losses and improved efficiency.

JP2025136768APending Publication Date: 2025-09-19MINEBEA POWER SEMICON DEVICE INC
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Patent Information

Application Number
JP2024035599
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-08
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

Conventional rectifier circuits using MOSFETs suffer from large reverse currents due to reverse recovery currents and charging currents, leading to increased losses and parasitic resistance, especially in applications like switching power supplies.

Method used

A rectifier circuit design incorporating a first and second switching element, diodes, and a control circuit that controls the switching elements to prevent simultaneous flow of reverse recovery and charging currents, using a comparator and gate driver to manage the switching states based on detected voltages.

Benefits of technology

The design achieves a rectifier circuit with reduced reverse currents and lower losses, improving efficiency and reducing the impact of parasitic resistance.

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Abstract

To provide a rectifier circuit that uses a switching element and has a small reverse current and a low loss.SOLUTION: A rectifier circuit 10 includes: an anode A; a cathode K; a first switching element Q1; a first diode D1; a second switching element Q2; a second diode D2; a capacitor C1; a comparator Co1; a gate driver GD1; and a control circuit 2. The control circuit 2 controls the second switching element Q2 to be turned off or the second switching element Q2 to be turned on in a high resistance state at least during a period in which a reverse recovery current due to reverse recovery of the first diode D1 flows from the cathode K of the rectifier circuit 10 toward the anode A of the rectifier circuit 10.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a rectifier circuit, a semiconductor package, and a power supply. [Background technology]

[0002] Known methods for rectifying AC to DC include rectification using a diode and synchronous rectification using a switching element such as a MOSFET.

[0003] Rectification using diodes has the problem of large losses due to the voltage drop caused by the built-in potential of the diode. In contrast, synchronous rectification using MOSFETs, for example, has the advantage of low losses because there is no built-in potential in the MOSFET and the forward current rises from 0V. Therefore, synchronous rectification using MOSFETs is mainly used to rectify with even lower losses, especially in switching power supplies such as front-end power supplies that are subject to strict efficiency regulations.

[0004] Techniques relating to synchronous rectification include, for example, techniques such as those disclosed in Patent Document 1 and Patent Document 2. Patent Documents 1 and 2 describe rectifier circuits that achieve synchronous rectification.

[0005] This rectifier circuit is mainly composed of a synchronous rectification MOSFET (first switching element), its drive circuit, a capacitor that supplies power to the drive circuit, a switching element (second switching element) for controlling the capacitor voltage, and its control circuit.

[0006] The drive circuit controls the on / off of the MOSFET based on the threshold voltage of the drive circuit and the detected drain-source voltage of the MOSFET.

[0007] After the MOSFET turns off, the capacitor that supplies power to the drive circuit is charged by the current that flows through the path from the MOSFET's drain terminal to the capacitor and back to the MOSFET's source terminal. Once charging of the capacitor begins, the capacitor voltage increases to track the MOSFET's drain-source voltage.

[0008] In this rectifier circuit, after the capacitor voltage reaches the target voltage, the switching element inserted between the drain terminal of the MOSFET and the positive terminal of the capacitor is turned off to cut off the capacitor charging current, thereby controlling the capacitor voltage to remain below the target voltage. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Publication No. 2023-44912 [Patent Document 2] U.S. Patent No. 10,756,645 Summary of the Invention [Problem to be solved by the invention]

[0010] However, in this rectifier circuit, after the MOSFET turns off, a reverse current flows in the opposite direction to the rectified current, i.e., from the cathode to the anode. This reverse current includes two currents: a reverse recovery current due to the reverse recovery of the MOSFET's body diode, and a charging current that flows when charging the capacitor through the path from the cathode to the switching element, the capacitor, and the anode. In conventional technology, when the reverse recovery current flows, the switching element is on and conducting with low resistance, so the path from the cathode to the switching element, the capacitor, and the anode has low impedance, allowing a large charging current to flow. The simultaneous flow of the reverse recovery current and the large charging current results in a large reverse current. A large reverse current can cause problems, such as increased losses due to the reverse current flowing through parasitic resistance in the wiring between the cathode and anode.

[0011] The problem to be solved by the present invention is to provide a rectifier circuit using a switching element, which has a small reverse current and low loss, and to provide a semiconductor package and a power supply using the same. [Means for solving the problem]

[0012] In order to solve the above-mentioned problems, the rectifier circuit of the present invention is a rectifier circuit having an anode and a cathode, and includes: a first switching element having a first terminal connected to the cathode of the rectifier circuit and a second terminal connected to the anode of the rectifier circuit; a first diode having a cathode connected to the first terminal of the first switching element and an anode connected to the second terminal of the first switching element; a second switching element having a first terminal connected to the first terminal of the first switching element; a second diode having an anode connected to the second terminal of the second switching element; a capacitor having a positive terminal connected to the cathode of the second diode and a negative terminal connected to the second terminal of the first switching element; The rectifier circuit includes a comparator that detects a voltage between the second terminal of the switching element and the second terminal of the switching element and receives power from the capacitor; a gate driver that has an input terminal connected to the output terminal of the comparator and an output terminal connected to a third terminal of the first switching element for controlling the first switching element, and that controls the first switching element based on an output signal of the comparator; and a control circuit that is connected to the third terminal of the second switching element for controlling the second switching element, wherein the control circuit controls the second switching element to be turned off or to be turned on in a high resistance state at least during a period in which a reverse recovery current due to reverse recovery of the first diode flows from the cathode of the rectifier circuit to the anode of the rectifier circuit.

[0013] The semiconductor package and power supply of the present invention are characterized by using the above-mentioned rectifier circuit. [Effects of the Invention]

[0014] According to the present invention, it is possible to realize a rectifier circuit using a switching element, which has a small reverse current and low loss, and to realize a semiconductor package and a power supply using the same. [Brief explanation of the drawings]

[0015] [Figure 1] FIG. 1 is a circuit diagram of a rectifier circuit according to a first embodiment. [Figure 2] 4 is a waveform diagram illustrating the operation of the rectifier circuit of the first embodiment. FIG. [Figure 3] 10 is a waveform diagram illustrating the operation of the rectifier circuit of the second embodiment. FIG. [Figure 4] 10 is a waveform diagram illustrating the operation of the rectifier circuit of the third embodiment. FIG. [Figure 5] FIG. 10 is a circuit diagram of a rectifier circuit according to a fourth embodiment. [Figure 6] FIG. 10 is a circuit diagram of a rectifier circuit according to a fifth embodiment. [Figure 7] FIG. 10 is a circuit diagram of a semiconductor package according to a sixth embodiment. [Figure 8] FIG. 13 is a circuit diagram of a semiconductor package according to a seventh embodiment. [Figure 9] FIG. 13 is a circuit diagram of a power supply according to an eighth embodiment. [Figure 10] 10A and 10B are waveform diagrams illustrating the operation of a rectifier circuit of a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each drawing and each embodiment, the same or similar components are designated by the same reference numerals, and redundant explanations will be omitted. [Example]

[0017] FIG. 1 is a circuit diagram of a rectifier circuit according to a first embodiment.

[0018] The rectifier circuit 10 of this embodiment has an anode A and a cathode K.

[0019] The rectifier circuit 10 also has a first switching element Q1 having a first terminal connected to the cathode K of the rectifier circuit 10 and a second terminal connected to the anode A of the rectifier circuit 10, and a first diode D1 having a cathode connected to the first terminal of the first switching element Q1 and an anode connected to the second terminal of the first switching element Q1.

[0020] In this embodiment, an n-channel enhancement-mode MOSFET is used as the first switching element Q1. Therefore, the first terminal, second terminal, and third terminal of the first switching element Q1 are the drain terminal, source terminal, and gate terminal, respectively, and the first diode D1 is the body diode of the MOSFET. However, this is not limiting, and another switching element may be used as the first switching element Q1, or another diode may be used as the first diode D1.

[0021] The rectifier circuit 10 further includes a second switching element Q2 having a first terminal connected to the first terminal of the first switching element Q1, a second diode D2 having an anode connected to the second terminal of the second switching element Q2, and a capacitor C1 having a positive terminal connected to the cathode of the second diode D2 and a negative terminal connected to the second terminal of the first switching element Q1.

[0022] In this embodiment, an n-channel depletion-type MOSFET is used as the second switching element Q2. Therefore, the first terminal, the second terminal, and the third terminal of the second switching element Q2 are the drain terminal, the source terminal, and the gate terminal, respectively. However, this is not limiting, and other switching elements may be used as the second switching element Q2.

[0023] Furthermore, the rectifier circuit 10 includes a drive circuit 1 that drives the first switching element Q1 and a control circuit 2 that controls the second switching element Q2.

[0024] The drive circuit 1 includes a comparator Co1 that detects the voltage between the second terminal of the second switching element Q2 and the second terminal of the first switching element Q1 and is supplied with power from the capacitor C1, and a gate driver GD1 that has an input terminal connected to the output terminal of the comparator Co1 and an output terminal connected to the third terminal of the first switching element Q1 for controlling the first switching element Q1 and that controls the first switching element Q1 based on the output signal of the comparator Co1. The gate driver GD1 also receives power from the capacitor C1.

[0025] The control circuit 2 is connected to a third terminal of the second switching element Q2 for controlling the second switching element Q2.

[0026] The rectifier circuit 10 performs synchronous rectification by driving a first switching element Q1 with a drive circuit 1. Power is supplied to the drive circuit 1 from a capacitor C1. Charging of the capacitor C1 is controlled by a second switching element Q2 and a control circuit 2. The control circuit 2 controls the current flowing from the first terminal to the second terminal of the second switching element Q2 so that the voltage of the capacitor C1 does not exceed a predetermined target voltage.

[0027] Furthermore, the control circuit 2 of this embodiment controls the second switching element Q2 to be turned off at least during the period when a reverse recovery current due to reverse recovery of the first diode D1 flows from the cathode K of the rectifier circuit 10 to the anode A of the rectifier circuit 10. The effect of this will be described in detail using the explanation of the operation of this embodiment in FIG. 2 and the explanation of the operation of the comparative example in FIG. 10.

[0028] Fig. 2 is a waveform diagram illustrating the operation of the rectifier circuit of Example 1. Fig. 2 shows each operating waveform when the rectifier circuit 10 shown in Fig. 1 is applied to the upper arm switching element of a double pulse test circuit.

[0029] 2, the period from time T0 to time T1 is a period in which the current Is is positive, and is a rectification period in which rectification is performed by the rectifier circuit 10 of this embodiment. The period from time T1 to time T2 is a non-rectification period. The rectifier circuit 10 of this embodiment achieves synchronous rectification by repeating the operation from time T0 to time T2.

[0030] At time T0, current Is begins to flow and the commutation period begins.

[0031] During the period from time T0 to time T0a, the gate driver GD1 controls the gate-source voltage Vgs1 of the first switching element Q1 to be equal to or lower than the gate threshold voltage Vgsth1 of the first switching element Q1, thereby turning off the first switching element Q1. During this period, the current Is first discharges the charge accumulated in the drain-source capacitance of the first switching element Q1, causing the drain-source voltage Vds1 of the first switching element Q1 to decrease. After the charge accumulated in the drain-source capacitance of the first switching element Q1 is discharged, the current Is flows through the first diode D1. Due to the voltage drop across the first diode D1, the drain-source voltage Vds1 becomes negative. After the drain-source voltage Vds1 becomes negative, the current Is increases, causing the voltage drop across the first switching element Q1 to increase and the drain-source voltage Vds1 to decrease. During this period, the control circuit 2 controls the gate-source voltage Vgs2 of the second switching element Q2 to be smaller than the gate threshold voltage Vgsth2 of the second switching element Q2, thereby controlling the second switching element Q2 to be turned off.

[0032] At time T0a, the drain-source voltage Vds1 becomes equal to the threshold voltage Vth1. At this time, the comparator Co1 inputs a signal to the gate driver GD1 to turn on the first switching element Q1. However, the voltage detected by the comparator Co1 is not the drain-source voltage Vds1 but the voltage between the second terminal of the second switching element Q2 and the second terminal of the first switching element Q1. Therefore, the threshold voltage Vth1' of the comparator Co1 is set to match this timing. Then, when the detected voltage becomes smaller than the threshold voltage Vth1', the comparator Co1 inputs a signal to the gate driver GD1 to turn on the first switching element Q1. As a result, the gate driver GD1 begins to increase the gate-source voltage Vgs1 of the first switching element Q1. For example, the threshold voltage Vth1 is a negative value, and its absolute value is smaller than the forward voltage drop of the first diode D1. At this time, the control circuit 2 turns on the second switching element Q2 by controlling the gate-source voltage Vgs2 of the second switching element Q2 so that it is greater than the gate threshold voltage Vgsth2 of the second switching element Q2. At this time, the gate-source voltage Vgs2 is sufficiently greater than the gate threshold voltage Vgsth2, so the second switching element Q2 is turned on in a low resistance state and becomes conductive.

[0033] During the period from time T0a to time T0b, the gate driver GD1 increases the gate-source voltage Vgs1 of the first switching element Q1 to a target voltage Vgsref1. However, the target voltage Vgsref1 is greater than the gate threshold voltage Vgsth1 of the first switching element Q1 and less than the absolute maximum rated gate-source voltage of the first switching element Q1. For example, the target voltage Vgsref1 is the voltage Vc1 of the capacitor C1. When the gate-source voltage Vgs1 becomes greater than the gate threshold voltage Vgsth1, the first switching element Q1 turns on. As a result, the drain-source voltage Vds1 of the first switching element Q1 becomes equal to a voltage determined by the product of the current Is and the on-resistance of the first switching element Q1.

[0034] The current Is begins to decrease midway through the period from time T0b to time T0c, and as a result, the drain-source voltage Vds1 of the first switching element Q1 begins to increase.

[0035] At time T0c, the drain-source voltage Vds1 becomes equal to the threshold voltage Vth2. At this time, the comparator Co1 inputs a signal to the gate driver GD1 to turn off the first switching element Q1. However, the voltage detected by the comparator Co1 is not the drain-source voltage Vds1 but the voltage between the second terminal of the second switching element Q2 and the second terminal of the first switching element Q1. Therefore, the threshold voltage Vth2' of the comparator Co1 is set to match this timing. Then, when the detected voltage becomes greater than the threshold voltage Vth2', the comparator Co1 inputs a signal to the gate driver GD1 to turn off the first switching element Q1. As a result, the gate driver GD1 begins to decrease the gate-source voltage Vgs1 of the first switching element Q1. The threshold voltage Vth2 may be the same as or different from the threshold voltage Vth1. When the threshold voltage Vth2 is set to a value greater than the threshold voltage Vth1, for example, when the threshold voltage Vth2 is negative and greater than the threshold voltage Vth1, the first switching element Q1 is turned on when the drain-source voltage Vds1 becomes smaller than the threshold voltage Vth1, turned off when the drain-source voltage Vds1 becomes larger than the threshold voltage Vth2, and otherwise maintains the state of the first switching element Q1, thereby suppressing chattering, which occurs when the first switching element Q1 repeatedly turns on and off in a short period of time. The comparator Co1 operates as follows: when the detected voltage becomes smaller than the threshold voltage Vth1', it outputs a signal to turn on the first switching element Q1; when the detected voltage becomes larger than the threshold voltage Vth2', it outputs a signal to turn off the first switching element Q1; and otherwise it outputs a signal to maintain the state of the first switching element Q1. Even if the threshold voltage Vth2 and the drain-source voltage Vds1 are negative, the voltage detected by the comparator Co1 may be positive, so the threshold voltage Vth2' may be set to a positive value.Also, at this time, the control circuit 2 controls the gate-source voltage Vgs2 of the second switching element Q2 to be smaller than the gate threshold voltage Vgsth2 of the second switching element Q2, thereby turning off the second switching element Q2.

[0036] During the period from time T0c to time T0d, the gate driver GD1 reduces the gate-source voltage Vgs1 of the first switching element Q1 to a voltage smaller than the gate threshold voltage Vgsth1 of the first switching element Q1. During this period, the gate-source voltage Vgs1 becomes smaller than the gate threshold voltage Vgsth1, so the first switching element Q1 turns off. As a result, the current Is flows through the first diode D1. Due to the voltage drop across the first diode D1, the drain-source voltage Vds1 of the first switching element Q1 becomes a negative value.

[0037] During the period from time T0d to time T1, the current Is decreases. During this period, the first switching element Q1 remains off, so the current Is flows through the first diode D1.

[0038] At time T1, the current Is is zero.

[0039] During part of or all of the period from time T1 to time T1a, a reverse recovery current due to reverse recovery of the first diode D1 flows, and current Is has a negative value. That is, current Is flows in the reverse direction, from cathode K to anode A. In this embodiment, the second switching element Q2 is controlled to be off at least during the period during which the reverse recovery current of the first diode D1 flows, so that no charging current flows when charging capacitor C1 through the path from cathode K to second switching element Q2, capacitor C1, and anode A. Therefore, the reverse recovery current of the first diode D1 and the charging current that charges capacitor C1 do not flow simultaneously, so the reverse current can be reduced, and the loss caused by the reverse current can also be reduced.

[0040] At time T1a, the control circuit 2 controls the gate-source voltage Vgs2 of the second switching element Q2 so that it is greater than the gate threshold voltage Vgsth2 of the second switching element Q2, thereby turning on the second switching element Q2. At this time, the gate-source voltage Vgs2 is sufficiently greater than the gate threshold voltage Vgsth2, so the second switching element Q2 is turned on and conducts in a low-resistance state. This causes charging of the capacitor C1. Note that the charging current of the capacitor C1 during this period is not shown as the current Is in Figure 2. Time T1a is determined based on the drain-source voltage Vds1 of the first switching element Q1, the capacitance of capacitor C1, and the on-resistance of the second switching element Q2 so that the period from time T1 to time T1a is shorter than the period from time T1 to time T2, and so that the voltage Vc1 of capacitor C1 is charged to a predetermined target voltage Vcref1 during the period from time T1a to time T2 (strictly speaking, the period from time T1a to time T1b in this embodiment). The target voltage Vcref1 of the voltage Vc1 of capacitor C1 is set to be smaller than the maximum rated voltage of comparator Co1, the maximum rated voltage of gate driver GD1, or the maximum rated voltage between the third terminal and the first terminal of first switching element Q1, whichever is smaller. This prevents damage to comparator Co1, gate driver GD1, and first switching element Q1.

[0041] During the period from time T1a to time T1b, the capacitor C1 is charged by a current that flows from the cathode K through the second switching element Q2, the diode D2, and the capacitor C1 to the anode A, and the voltage Vc1 of the capacitor C1 increases.

[0042] At time T1b, the voltage Vc1 of capacitor C1 is equal to the target voltage Vcref1 of capacitor C1. At this time, control circuit 2 controls the gate-source voltage Vgs2 of second switching element Q2 to turn off second switching element Q2. As a result, the current flowing from cathode K through second switching element Q2, diode D2, and capacitor C1 to anode A is cut off, and charging of capacitor C1 is stopped.

[0043] During the period from time T1b to time T2, the voltage Vc1 of the capacitor C1 decreases due to discharging.

[0044] By repeating the above control, the rectifier circuit 10 of this embodiment achieves synchronous rectification.

[0045] FIG. 10 is a waveform diagram illustrating the operation of the rectifier circuit of the comparative example.

[0046] The rectifier circuit of the comparative example has basically the same circuit configuration as the rectifier circuit 10 of this embodiment shown in FIG. 1, but the control method by the control circuit 2 is different.

[0047] As shown in FIG. 10, in the comparative example, the second switching element Q2 is controlled to be on and conduction in a low resistance state even during the period from time T0c to time T1a, compared to the present embodiment shown in FIG. 2. The second switching element Q2 is controlled to be off during the period from time T1a to time T2. As a result, in the comparative example, the reverse recovery current of the first diode D1 and the charging current of the capacitor C1 flow simultaneously during the period from time T1 to time T1a. This results in a problem that the reverse current during this period is larger than that of the present embodiment shown in FIG. 2. This problem is particularly likely to occur when the rectifier circuit of the comparative example is used as a freewheeling diode in a boost converter or a secondary-side rectifier circuit in an LLC converter.

[0048] In particular, the reverse current generated in the secondary rectifier circuit of the LLC converter induces a current in the primary full-bridge circuit via the isolation transformer, which can make it difficult to achieve soft switching of the switching elements that make up the primary full-bridge circuit.

[0049] In contrast, in the rectifier circuit 10 of this embodiment, as shown in Figure 2, the second switching element Q2 is controlled to be off at least during the period when the reverse recovery current of the first diode D1 flows, so that the reverse recovery current of the first diode D1 and the charging current that charges the capacitor C1 are prevented from flowing simultaneously, thereby reducing the reverse current and reducing the loss caused by the reverse current.

[0050] Of the reverse currents, the reverse recovery current of the first diode D1 can be expected to be suppressed by using a first diode D1 with good reverse recovery characteristics.

[0051] Another method for suppressing the reverse current, i.e., the charging current of capacitor C1, is to insert a resistor in the path through which the charging current of capacitor C1 flows, for example, on the first terminal side of second switching element Q2. However, this method of inserting a resistor may result in an insufficient increase in voltage Vc1 across capacitor C1 during the off-period of the rectifier circuit 10, due to the suppression of the charging current of capacitor C1. This results in a problem of a lower maximum operating frequency of the rectifier circuit 10. In other words, the method of inserting a resistor imposes a trade-off between suppression of reverse current and the maximum operating frequency of the rectifier circuit 10, which reduces the design flexibility of the rectifier circuit 10.

[0052] According to this embodiment, these problems can be solved, and a rectifier circuit 10 with a small reverse current and low loss can be realized. [Example]

[0053] FIG. 3 is a waveform diagram illustrating the operation of the rectifier circuit of the second embodiment.

[0054] Example 2 is a modified example of Example 1. In Example 1, the second switching element Q2 is controlled to be turned off, whereas in Example 2, the second switching element Q2 is controlled to be turned on in a high resistance state.

[0055] In this embodiment, as shown in FIG. 3 , during the period from time T0 to time T0a, the period from time T0c to time T1a, and the period from time T1b to time T2, the control circuit 2 controls the gate-source voltage Vgs2 of the second switching element Q2 to be close to the gate threshold voltage Vgsth2 of the second switching element Q2, so that the second switching element Q2 is turned on but at a high resistance. Note that time T1c is the time when the drain-source voltage Vds1 of the first switching element Q1 is equal to the sum of the forward voltage drop of the second diode D2 and the voltage Vc1 of the capacitor C1. Therefore, in the rectifier circuit of this embodiment, the second switching element Q2 is always turned on in either a high-resistance or low-resistance state during the period from time T0 to time T2, i.e., during the switching period.

[0056] 2, the charging period of the capacitor C1 is increased by the period from time T1b to time T1c. This increases the ratio of the charging period of the capacitor C1 to the period from time T0 to time T2, i.e., the switching period, and therefore reduces the capacitance required for the capacitor C1.

[0057] In this embodiment, if the voltage Vc1 of the capacitor C1 is low during the period from time T1 to time T1a when the reverse recovery current of the first diode D1 flows, a charging current for the capacitor C1 may flow. However, since the second switching element Q2 is on in a high resistance state during this period, the charging current for the capacitor C1 can be made smaller than in the comparative example. Therefore, this embodiment also realizes a rectifier circuit 10 with a small reverse current and low loss. [Example]

[0058] FIG. 4 is a waveform diagram illustrating the operation of the rectifier circuit of the third embodiment.

[0059] Example 3 is a modified example of Example 2. In Example 2, the second switching element Q2 is controlled to be turned on in a low resistance state from time T0a, whereas in Example 3, the second switching element Q2 is controlled to be turned on in a low resistance state from time T1c.

[0060] In this embodiment, the same effects as those in the second embodiment can be obtained. [Example]

[0061] FIG. 5 is a circuit diagram of a rectifier circuit according to a fourth embodiment.

[0062] The fourth embodiment is an embodiment for explaining an example of the control circuit 2 applicable to the first to third embodiments.

[0063] The control circuit 2 of this embodiment is connected to the positive terminal of the capacitor C1 and the output terminal of the comparator Co1. Specifically, the control circuit 2 has a determination circuit JD1, which detects the voltage Vc1 of the capacitor C1 and the signal output by the comparison circuit Co1, and outputs a gate-source voltage Vgs2 of the second switching element Q2 based on the detected voltage Vc1 of the capacitor C1 and the signal output by the comparison circuit Co1, thereby realizing the on / off control of the second switching element Q2 in the rectifier circuit 10 described in the first to third embodiments.

[0064] For example, in Examples 1 to 3, at time T1b, the control circuit 2 compares the voltage Vc1 of the capacitor C1 with the target voltage Vcref1, detects that the voltage Vc1 of the capacitor C1 has reached the target voltage Vcref1 of the capacitor C1, and controls the second switching element Q2 to be turned off or turned on in a high resistance state.

[0065] In addition, in Examples 1 to 3, the control circuit 2 controls the second switching element Q2 to be turned off or turned on in a high resistance state at a first timing before the start of the period in which the reverse recovery current of the first diode D1 flows, and controls the second switching element Q2 to be turned on in a low resistance state at a second timing after a predetermined period has elapsed from the first timing.

[0066] In the first to third embodiments, the rectifier circuit 10 does not have a means for directly detecting the reverse recovery current of the first diode D1. Therefore, it is preferable that the control circuit 2 sets the first timing based on the signal output by the comparison circuit Co1 and controls the second switching element Q2 to be turned off or turned on in a high-resistance state, and also sets the predetermined period in advance so that the second timing corresponds to the timing when the reverse recovery current of the first diode D1 has finished flowing, and controls the second switching element Q2 to be turned on in a low-resistance state at the second timing when the predetermined period has elapsed since the first timing.

[0067] 5 shows an example in which the control circuit 2 is connected to the positive terminal of the capacitor C1 and the output terminal of the comparator Co1, but the present invention is not limited to this, and the control circuit 2 may be connected to the positive terminal of the capacitor C1 and the output of the gate driver GD1. The control circuit 2 can achieve the same operation even if it uses the signal output by the gate driver GD1 instead of the signal output by the comparator circuit Co1. [Example]

[0068] FIG. 6 is a circuit diagram of a rectifier circuit according to a fifth embodiment.

[0069] The fifth embodiment is a modification of the configuration of the rectifier circuit 10 of FIG. 1 described in the first embodiment.

[0070] As shown in FIG. 6, the rectifier circuit 10 of this embodiment has, in addition to the configuration of the rectifier circuit 10 of FIG. 1, a second cathode K2, and a normally-on third switching element Q3 having a first terminal connected to the cathode K, a second terminal connected to the second cathode K2, and a third terminal, which is a control terminal, connected to the anode A.

[0071] The third switching element Q3 may be, for example, a SiC-JFET or a GaN-HEMT, etc. The first terminal, the second terminal, and the third terminal of the third switching element Q3 are the source, the drain, and the gate of the SiC-JFET or the GaN-HEMT, respectively.

[0072] In this embodiment, the third switching element Q3 is controlled to be turned on and off in conjunction with the first switching element Q1.

[0073] When a high breakdown voltage, e.g., 600 V, is required for the rectifier circuit 10, devices that can be used for the first switching element Q1 and the third switching element Q3 are described below. In the rectifier circuit 10 shown in FIG. 1, a superjunction Si-MOSFET with a breakdown voltage of 600 V may be used for the first switching element Q1. On the other hand, in the rectifier circuit 10 of this embodiment shown in FIG. 6, a SiC-JFET or GaN-HEMT with a breakdown voltage of 600 V may be used for the third switching element Q3, and a trench-structure Si-MOSFET with a low breakdown voltage, e.g., 20 V, may be used for the first switching element Q1. SiC-JFETs and GaN-HEMTs do not have a body diode, and the body diode of a trench-structure Si-MOSFET has superior reverse recovery characteristics compared to the body diode of a superjunction Si-MOSFET. Therefore, in the rectifier circuit 10 of this embodiment, by using the body diode of the first switching element Q1 as the first diode D1, it is possible to suppress the reverse recovery current of the first diode D1. [Example]

[0074] FIG. 7 is a circuit diagram of a semiconductor package according to a sixth embodiment.

[0075] The semiconductor package 20 of this embodiment incorporates the rectifier circuit 10 described in the first to fifth embodiments. The semiconductor package 20 has an anode A and a cathode K as external terminals. Note that FIG. 7 shows an example in which the rectifier circuit 10 shown in FIG. 1 is used. When the rectifier circuit 10 of the fifth embodiment shown in FIG. 6 is used, the anode A and the second cathode K2 are provided as external terminals.

[0076] According to this embodiment, in addition to the effects of the rectifier circuit 10 described in the first to fifth embodiments, when designing and manufacturing a product that uses the rectifier circuit 10, it is possible to simply purchase and incorporate the rectifier circuit 10 having the drive circuit 1, control circuit 2, and capacitor C1 built in as in this embodiment, and there is no need to incorporate the drive circuit and control circuit into the design and manufacturing process by oneself, which has the effect of reducing the number of steps required for design and implementation. [Example]

[0077] FIG. 8 is a circuit diagram of a semiconductor package according to a seventh embodiment.

[0078] The semiconductor package 20 of this embodiment incorporates a plurality of rectifier circuits 10 described in the first to fifth embodiments. The semiconductor package 20 shown in FIG. 8 is an example having a bridge circuit configured using four rectifier circuits 10. The semiconductor package 20 has external terminals OT1 to OT4. Although FIG. 8 shows an example using the rectifier circuit 10 shown in FIG. 1, the present invention is not limited to this. Furthermore, although FIG. 8 shows an example in which a bridge circuit is configured, the present invention is not limited to this.

[0079] In this embodiment, the same effects as those in the sixth embodiment can be obtained. [Example]

[0080] FIG. 9 is a circuit diagram of a power supply according to an eighth embodiment.

[0081] The power supply 30 of this embodiment is, for example, a front-end power supply, and can use the rectifier circuit 10 described in the first to fifth embodiments or the semiconductor package 20 described in the sixth and seventh embodiments.

[0082] For example, in the power supply 30 shown in FIG. 9, the rectifier circuit 10 or the semiconductor package 20 can be used as the commercial rectifier diodes CRD1 to CRD4, the freewheeling diode FWD, the secondary side rectifier diodes SSD1 to SSD2, and the backflow prevention diode BPD.

[0083] According to this embodiment, it is possible to improve the power density of the power supply 30 and contribute to cost reduction.

[0084] The rectifier circuit 10 or the semiconductor package 20 is not limited to this, but can be applied to any rectifier circuit used in a power conversion device.

[0085] Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations described in the embodiments, and various modifications are possible within the scope of the technical concept of the present invention. In addition, some or all of the configurations described in each embodiment may be combined and applied. [Explanation of symbols]

[0086] 1: Drive circuit 2: Control circuit 10: Rectifier circuit 20: Semiconductor package 30: Power supply K: Cathode K2: Second cathode A: Anode Q1: First switching element Q2: Second switching element Q3: Third switching element D1: First diode D2: Second diode C1: Capacitor Co1: Comparator GD1: Gate driver JD1: Judgment circuit T0, T0a~T0d, T1, T1a~T1c, T2: Time Is: Current Vds1, Vds2: Drain-source voltage Vgs1, Vgs2: Gate-source voltage Vgsth1, Vgsth2: Gate threshold voltage Vgsref1: Target voltage for gate-source voltage Vgs1 Vc1: Voltage of capacitor C1 Vcref1: Target voltage of capacitor C1 Vth1, Vth2: Threshold voltage OT1 to OT4: External terminals CRD1 to CRD4: Commercial rectifier diodes FWD: Freewheeling diode SSD1~SSD2: Secondary side rectifier diodes BPD: Backflow prevention diode

Claims

1. A rectifier circuit having an anode and a cathode, a first switching element having a first terminal connected to the cathode of the rectifier circuit and a second terminal connected to the anode of the rectifier circuit; a first diode having a cathode connected to the first terminal of the first switching element and an anode connected to the second terminal of the first switching element; a second switching element having a first terminal connected to the first terminal of the first switching element; a second diode having an anode connected to the second terminal of the second switching element; a capacitor having a positive terminal connected to the cathode of the second diode and a negative terminal connected to the second terminal of the first switching element; a comparator that detects a voltage between the second terminal of the second switching element and the second terminal of the first switching element and is supplied with power from the capacitor; a gate driver having an input terminal connected to the output terminal of the comparator and an output terminal connected to a third terminal of the first switching element for controlling the first switching element, the gate driver controlling the first switching element based on an output signal of the comparator; a control circuit connected to a third terminal of the second switching element for controlling the second switching element; the control circuit controls the second switching element to be turned off or to be turned on in a high resistance state at least during a period in which a reverse recovery current due to reverse recovery of the first diode flows from the cathode of the rectifier circuit to the anode of the rectifier circuit.

2. In claim 1, The rectifier circuit according to claim 1, wherein the control circuit controls the second switching element to be turned off at least during a period in which the reverse recovery current flows.

3. In claim 1, The rectifier circuit according to claim 1, wherein the control circuit controls the second switching element to be turned on in a high resistance state at least during a period in which the reverse recovery current flows.

4. In claim 1, the control circuit controls the second switching element to be turned off or turned on in a high resistance state at a first timing before the start of a period in which the reverse recovery current flows, and controls the second switching element to be turned on in a low resistance state at a second timing after a predetermined period has elapsed from the first timing.

5. In claim 1, The control circuit controls the current flowing from the first terminal to the second terminal of the second switching element so that the voltage of the capacitor does not exceed a predetermined target voltage.

6. In claim 1, a first switching element that is a first MOSFET, the first terminal, the second terminal, and the third terminal of the first switching element being a drain terminal, a source terminal, and a gate terminal of the first MOSFET, respectively, and the first diode being a body diode of the first MOSFET.

7. In claim 1, The second switching element is a second MOSFET, and the first terminal, the second terminal, and the third terminal of the second switching element are a drain terminal, a source terminal, and a gate terminal of the second MOSFET, respectively.

8. In claim 7, The rectifier circuit is characterized in that the second MOSFET is an n-channel depletion type MOSFET.

9. In claim 1, The rectifier circuit is characterized in that the control circuit is connected to the positive terminal of the capacitor and the output terminal of the comparator.

10. In claim 1, The rectifier circuit is characterized in that the control circuit is connected to the positive terminal of the capacitor and an output of the gate driver.

11. A semiconductor package incorporating the rectifier circuit according to any one of claims 1 to 10.

12. In claim 11, A semiconductor package incorporating a plurality of the rectifier circuits.

13. A power supply comprising a rectifier circuit according to any one of claims 1 to 10.

Citation Information

Patent Citations

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