Semiconductor storage device

Abstract

To provide a semiconductor storage device which achieves improvement of heat dissipation performance.SOLUTION: A semiconductor storage device 1 includes: a housing 10 including a first member 30 and a second member 40; a substrate module 20 including a substrate and a semiconductor memory; and a heat dissipation structure HS. When a thickness direction of the substrate is referred to as a first direction Z, the first member has a first wall part 31 facing the substrate from a first side in the first direction. The second member has a second wall part 41 facing the substrate from a second side opposite to the first side in the first direction. The heat dissipation structure includes a plurality of first fins 51 protruding from the first wall part to the side opposite to the substrate. The second member has a third wall part 42 which overlaps with a part of the first member from the outer side of the housing when viewed in a second direction Y in which the first fins are lined up.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a semiconductor memory device. [Background technology]

[0002] 2. Description of the Related Art A semiconductor memory device is known that has a housing, a board housed in the housing, and a semiconductor memory provided on the board. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2023 / 0240049 Summary of the Invention [Problem to be solved by the invention]

[0004] One embodiment provides a semiconductor memory device that can improve heat dissipation. [Means for solving the problem]

[0005] In one embodiment, the semiconductor memory device includes a housing, a substrate, a semiconductor memory, and a heat dissipation structure. The substrate is housed in the housing. The semiconductor memory is provided on the substrate. The heat dissipation structure is provided in the housing. The housing includes a first member and a second member. When the thickness direction of the substrate is defined as a first direction, the first member has a first wall portion including a portion exposed to the outside of the housing and facing the substrate from a first side in the first direction. The second member has a second wall portion including a portion exposed to the outside of the housing and facing the substrate from a second side opposite the first side in the first direction. The heat dissipation structure includes a plurality of first fins protruding from the first wall portion toward the opposite side to the substrate. The second member further has a third wall portion overlapping a portion of the first member from the outside of the housing when viewed from a second direction in which the plurality of first fins are arranged. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a perspective view showing a semiconductor memory device according to a first embodiment. [Figure 2] FIG. 2 is a perspective view showing a board unit according to the first embodiment. [Figure 3] FIG. 2 is an exploded perspective view of the housing and the heat dissipation structure of the first embodiment. [Figure 4] FIG. 2 is a perspective view showing a first component of the first embodiment. [Figure 5] FIG. 4 is a perspective view showing a second component of the first embodiment. [Figure 6] FIG. 6 is a cross-sectional view of the semiconductor memory device shown in FIG. 1 taken along line F6-F6. [Figure 7] FIG. 3 is a cross-sectional view showing a first end portion of the housing of the first embodiment. [Figure 8] FIG. 2 is a cross-sectional view showing the housing and the heat dissipation structure of the first embodiment. [Figure 9] FIG. 7 is a cross-sectional view taken along line F9-F9 of the semiconductor memory device shown in FIG. 6. [Figure 10] FIG. 2 is a bottom view showing the semiconductor memory device of the first embodiment. [Figure 11] FIG. 2 is a perspective view illustrating a method for assembling the semiconductor memory device according to the first embodiment. [Figure 12] FIG. 1 is a cross-sectional view showing an example of a usage environment of the semiconductor memory device according to the first embodiment. [Figure 13] FIG. 3 is a cross-sectional view illustrating the operation of the heat dissipation structure of the first embodiment. [Figure 14] FIG. 10 is a cross-sectional view showing a semiconductor memory device according to a second embodiment. [Figure 15] FIG. 10 is a cross-sectional view showing a semiconductor memory device according to a third embodiment. [Figure 16] FIG. 10 is a perspective view showing a semiconductor memory device according to a fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Semiconductor memory devices according to embodiments will be described below with reference to the drawings. In the following description, components having the same or similar functions will be assigned the same reference numerals. Further, duplicate descriptions of these components may be omitted. In this application, "parallel," "orthogonal," or "same" may include "substantially parallel," "substantially orthogonal," or "substantially the same," respectively. In this application, "connection" is not limited to mechanical connection, but may also include electrical connection. In other words, "connection" is not limited to direct connection with an object, but may also include connection with an object via another element interposed therebetween.

[0008] In the present application, the +X direction, the −X direction, the +Y direction, the −Y direction, the +Z direction, and the −Z direction are defined as follows: The +X direction, the −X direction, the +Y direction, and the −Y direction are directions parallel to the first surface 21a of the substrate 21 (described later) (see FIG. 2). The +X direction is the direction from the first end 10e1 to the second end 10e2 of the housing 10 (see FIG. 1). The −X direction is the direction opposite to the +X direction. When the +X direction and the −X direction are not distinguished, they are simply referred to as the “X direction.” The +Y direction and the −Y direction are directions intersecting (e.g., perpendicular to) the X direction. The +Y direction is the direction from one side wall (third wall 42A) to the other side wall (third wall 42B) of the housing 10 (described later) (see FIG. 1). The −Y direction is the direction opposite to the +Y direction. When the +Y direction and the −Y direction are not distinguished, they are simply referred to as the “Y direction.” The +Z direction and the -Z direction are directions that intersect (for example, are perpendicular to) the X direction and the Y direction. The +Z direction is the direction from the second wall 41 of the housing 10 described later toward the first wall 31 (see FIG. 1). The -Z direction is the direction opposite to the +Z direction. When there is no need to distinguish between the +Z direction and the -Z direction, they are simply referred to as the "Z direction." The Z direction is the thickness direction of the substrate 21. The Z direction is an example of the "first direction." The +Z direction side is an example of the "first side." The -Z direction side is an example of the "second side." The Y direction is an example of the "second direction."

[0009] (First embodiment) <1. Overall configuration of semiconductor memory device> A semiconductor memory device 1 according to a first embodiment will be described with reference to FIGS. 1 to 13. The semiconductor memory device 1 is a storage device such as an SSD (Solid State Drive). The semiconductor memory device 1 is connected to a host device and used as a storage device for the host device. The host device may be, but is not limited to, a personal computer, a mobile device, a video recorder, or an in-vehicle device.

[0010] 1 is a perspective view showing a semiconductor memory device 1. The semiconductor memory device 1 has, for example, a housing 10, a board unit 20, and a heat dissipation structure HS. Here, the board unit 20 will be described first.

[0011] 2 is a perspective view showing the board unit 20. The board unit 20 is an assembly on which components including circuits are mounted. The board unit 20 includes, for example, a board 21, a connector 22, a controller 23, multiple DRAMs (Dynamic Random Access Memories) 24, multiple NAND flash memories 25 (hereinafter referred to as "NAND 25"), multiple capacitors 26, and multiple heat conductive members 27.

[0012] The substrate 21 is a plate member extending along the X and Y directions. The substrate 21 is a printed circuit board. The substrate 21 includes an insulating base material and a wiring pattern provided on the insulating base material. The substrate 21 has a first surface 21a and a second surface 21b located on the opposite side of the first surface 21a. The first surface 21a extends in the X and Y directions. The first surface 21a is a surface facing the +Z direction. The second surface 21b extends in the X and Y directions. The second surface 21b is a surface facing the -Z direction.

[0013] The substrate 21 has a first end 21e1 and a second end 21e2 as ends in the longitudinal direction (X direction) of the substrate 21. The first end 21e1 is the end on the −X direction side of the substrate 21. The second end 21e2 is the end on the +X direction side of the substrate 21. In this embodiment, the second end 21e2 of the substrate 21 has a through hole 21h. The through hole 21h penetrates the substrate 21 in the Z direction. A fastening member 73 (see FIG. 9), which will be described later, is inserted into the through hole 21h.

[0014] The connector 22 is a connecting portion that can be connected to a connector of the host device. The connector 22 includes a plurality of metal terminals that can be connected to a connector of the host device. The connector 22 is provided, for example, at the second end 21e2 of the substrate 21. The connector 22 is exposed to the outside of the housing 10 through the opening 10a of the housing 10 (see FIG. 9).

[0015] The controller 23 is a component that performs overall control of the entire semiconductor memory device 1. The controller 23 is, for example, a semiconductor package including an SoC (System on a Chip) in which a host interface circuit for a host device, a control circuit that controls a plurality of NANDs 25, and the like are integrated into one semiconductor chip. The controller 23 is provided on, for example, the first surface 21a of the substrate 21.

[0016] The DRAM 24 is a data buffer that temporarily stores data to be written received from the host device or data to be read read from the NAND 25. The multiple DRAMs 24 include, for example, a DRAM 24A provided on the first surface 21a of the substrate 21 and a DRAM 24B provided on the second surface 21b of the substrate 21. The number of DRAMs 24 may be one. Furthermore, instead of being provided as a component separate from the controller 23, the DRAM 24 may be provided inside the controller 23 as part of the controller 23.

[0017] The NAND 25 is a semiconductor package including a nonvolatile semiconductor memory chip. The multiple NANDs 25 include, for example, multiple NANDs 25A provided on the first surface 21a of the substrate 21 and multiple NANDs 25B provided on the second surface 21b of the substrate 21. The NAND 25 is an example of a "semiconductor memory." Note that the "semiconductor memory" referred to in this application is not limited to the NAND 25, and may be other types of semiconductor memory such as a NOR memory, an MRAM (Magnetoresistive Random Access Memory), or a resistive memory.

[0018] The capacitor 26 is one of the components electrically connected to the substrate 21. The capacitor 26 performs a power backup function for protecting data in the event of an unexpected power interruption, for example. In this embodiment, the capacitor 26 supplies power to the controller 23, the multiple DRAMs 24, and the multiple NANDs 25 for a certain period of time when the power supply from the host device is unexpectedly interrupted.

[0019] The heat conducting member 27 is attached to each component (hereinafter referred to as "heat generating component"), such as the controller 23, the DRAM 24, or the NAND 25. The heat conducting member 27 is disposed between the heat generating component and the inner surface of the housing 10, and is in contact with the heat generating component and the inner surface of the housing 10. The heat conducting member 27 transfers at least a portion of the heat generated by the heat generating component to the housing 10.

[0020] <2. Housing and heat dissipation structure> Next, returning to FIG. 1, the housing 10 and the heat dissipation structure HS will be described. The housing 10 is a component that houses the board unit 20. The housing 10 has an accommodation space S1 in which the board unit 20 is housed. In this application, the term "housing" refers to a component that defines a space (e.g., accommodation space S1) that houses electronic components. Therefore, from one perspective, the heat dissipation structure HS, which will be described later, can be said to be a heat dissipation structure that exists outside the housing 10.

[0021] The housing 10 has a first end 10e1 and a second end 10e2 as ends in the longitudinal direction (X direction) of the housing 10. The first end 10e1 is the end on the -X direction side of the housing 10. The second end 10e2 is the end on the +X direction side of the housing 10. In this embodiment, the first end 10e1 of the housing 10 has a pair of through holes 10h. The through holes 10h open in the Z direction. Fastening members FS (e.g., screws) that fix the semiconductor memory device 1 to a host device are inserted through the through holes 10h.

[0022] In this embodiment, the housing 10 is provided with a heat dissipation structure HS. The heat dissipation structure HS is formed, for example, integrally with the housing 10. However, the heat dissipation structure HS may be formed separately from the housing 10 and then attached to the housing 10 using a fixing portion (such as a fastening member such as a screw, welding, or an adhesive). In this application, "the housing is provided with a heat dissipation structure" may refer to either a case where the heat dissipation structure is formed integrally with the housing or a case where the heat dissipation structure is formed separately from the housing and then attached to the housing.

[0023] FIG. 3 is an exploded perspective view of the housing 10 and the heat dissipation structure HS. In this embodiment, the housing 10 includes a first member 30 and a second member 40. The heat dissipation structure HS includes a first heat dissipation section 50 formed integrally with the first member 30 and a second heat dissipation section 60 formed integrally with the second member 40. Alternatively, the first heat dissipation section 50 may be formed separately from the first member 30 and then attached to the first member 30. The second heat dissipation section 60 may be formed separately from the second member 40 and then attached to the second member 40. For ease of explanation, the first member 30 and the first heat dissipation section 50 may be collectively referred to as the "first component P1." The second member 40 and the second heat dissipation section 60 may be collectively referred to as the "second component P2."

[0024] <2.1 First member> First, the first member 30 will be described. 4 is a perspective view showing the first part P1. The first member 30 is a member that forms part of the housing 10. The first member 30 has, for example, a first wall 31 and a pair of engagement portions 32.

[0025] <2.1.1 First wall> The first wall 31 is a plate-shaped wall that extends along the X and Y directions. The first wall 31 extends in the X direction. The first wall 31 defines a portion of the end of the storage space S1 of the housing 10 on the +Z direction side (see FIG. 6). The first wall 31 faces the storage space S1 from the +Z direction side. The first wall 31 faces the board unit 20 from the +Z direction side. The first wall 31 is an example of a "first wall part." The first wall 31 has, for example, a first portion 31a and a second portion 31b.

[0026] The first portion 31a is located at the first end 10e1 of the housing 10 (see FIG. 1). The first portion 31a is an area that does not overlap with the heat dissipation structure HS when viewed from the Z direction. The first portion 31a is exposed to the outside of the housing 10 (e.g., the outside of the semiconductor memory device 1). The first portion 31a faces a part of the board unit 20 from the +Z direction side. The first portion 31a has the above-mentioned through-hole 10h. The width W1 of the first portion 31a in the Y direction is large enough to span between a pair of third walls 42A, 42B of the second member 40, which will be described later.

[0027] The second portion 31b is integral with the first portion 31a and extends from the first portion 31a in the +X direction. The second portion 31b is an area that overlaps with the heat dissipation structure HS when viewed from the Z direction. The second portion 31b faces a part of the board unit 20 from the +Z direction side. In this embodiment, the width W2 of the second portion 31b in the Y direction is smaller than the width W1 of the first portion 31a in the Y direction.

[0028] The first wall 31 has a first surface 31s1 and a second surface 31s2. The first surface 31s1 faces the +Z direction. The second surface 31s2 faces the -Z direction. The second surface 31s2 faces the storage space S1 of the housing 10.

[0029] The first wall 31 is thermally connected to each of the plurality of heat-generating components (e.g., the controller 23, the DRAM 24A, and the plurality of NANDs 25A) mounted on the first surface 21a of the substrate 21 via the heat-conducting member 27 (see FIGS. 6 and 9). At least a portion of the heat generated by each of the plurality of heat-generating components (e.g., the controller 23, the DRAM 24A, and the plurality of NANDs 25A) mounted on the first surface 21a of the substrate 21 is transferred to the first wall 31 via the heat-conducting member 27.

[0030] <2.1.2 Engagement part> A pair of engaging portions 32 (engaging portions 32A, 32B) are provided on the first portion 31a of the first wall 31. The pair of engaging portions 32 are arranged separately at both ends in the Y direction of the first portion 31a of the first wall 31. Each engaging portion 32 protrudes from the first portion 31a of the first wall 31 in the -Z direction.

[0031] Each engagement portion 32 has, for example, a first portion 33a and a second portion 33b. The first portion 33a protrudes in the -Z direction from the first portion 31a of the first wall 31. The second portion 33b protrudes in the +X direction from the end of the first portion 33a on the -Z direction side. The function of the engagement portion 32 will be described later. The engagement portion 32 is an example of a "second engagement portion."

[0032] <2.2 First heat dissipation section> The first heat dissipation section 50 is a heat dissipation section that promotes heat dissipation from the first member 30. The first heat dissipation section 50 promotes heat dissipation from the first member 30, thereby promoting heat dissipation from multiple heat-generating components (e.g., the controller 23, the DRAM 24A, and multiple NANDs 25A) mounted on the first surface 21a of the substrate 21. In this embodiment, the first member 30 and the first heat dissipation section 50 are made of metal (e.g., aluminum or an aluminum alloy) and have high thermal conductivity.

[0033] The first heat dissipation unit 50 has a plurality of (for example, four) fins 51. The plurality of fins 51 are provided on the first wall 31 and protrude from the first wall 31 toward the opposite side of the accommodation space S1 (the opposite side of the substrate 21). The plurality of fins 51 are arranged side by side at regular intervals in the Y direction. Each fin 51 is a plate portion along the X direction and the Z direction. Each fin 51 extends in the X direction. For example, each fin 51 extends in the X direction so as to span more than half the X-direction length of the second portion 31b of the first wall 31. For example, each fin 51 extends in the X direction so as to span the entire X-direction length of the second portion 31b of the first wall 31. At least one fin 51 included in the plurality of fins 51 (for example, all the fins 51) overlaps the controller 23 and one or more NANDs 25 when viewed from the Z direction. The fin 51 is an example of a "first fin" and also an example of a "protrusion."

[0034] In this embodiment, the height H1 in the Z direction of each fin 51 is greater than the height H2 in the Z direction of a fin 63 of a second heat dissipation section 60, which will be described later (see FIG. 6). In this embodiment, the number of fins 51 (for example, four) is greater than the number of fins 63 of a second heat dissipation section 60, which will be described later (for example, three) (see FIG. 6).

[0035] <2.3 Second member> Next, the second member 40 will be described. 5 is a perspective view showing the second part P2. The second member 40 is a member that forms another part of the housing 10. The second member 40 has, for example, a second wall 41, a pair of third walls 42, a pair of fourth walls 43, and a pair of engagement portions 44.

[0036] <2.3.1 Second wall> The second wall 41 is a plate-shaped wall extending along the X and Y directions. The second wall 41 extends in the X direction. The width of the second wall 41 in the Y direction is the same as the width W1 of the first portion 31a of the first wall 31 in the Y direction. The length of the second wall 41 in the X direction is the same as the length of the first wall 31 in the X direction. The second wall 41 is exposed to the outside of the housing 10 (e.g., the outside of the semiconductor memory device 1). The second wall 41 defines the end of the storage space S1 of the housing 10 on the -Z direction side (see FIG. 6). The second wall 41 faces the storage space S1 from the -Z direction side. The second wall 41 faces the board unit 20 from the -Z direction side. The second wall 41 is an example of a "second wall part."

[0037] The second wall 41 is thermally connected to each of the plurality of heat-generating components (e.g., DRAM 24B and the plurality of NANDs 25B) mounted on the second surface 21b of the substrate 21 via the heat-conducting member 27 (see FIGS. 6 and 9). At least a portion of the heat generated by each of the plurality of heat-generating components (e.g., DRAM 24B and the plurality of NANDs 25B) mounted on the second surface 21b of the substrate 21 is conducted to the second wall 41 via the heat-conducting member 27.

[0038] <2.3.2 Third wall> Each of the pair of third walls 42 (third walls 42A, 42B) is a plate-shaped wall extending along the X and Z directions. Each of the pair of third walls 42 stands up in the +Z direction from the second wall 41. For example, one third wall 42A stands up in the +Z direction from the -Y direction end of the second wall 41. The third wall 42A faces the storage space S1 from the -Y direction side. The third wall 42A faces the board unit 20 from the -Y direction side. The other third wall 42B stands up in the +Z direction from the +Y direction end of the second wall 41. The third wall 42B faces the storage space S1 from the +Y direction side. The third wall 42B faces the board unit 20 from the +Y direction side. Each of the pair of third walls 42 extends in the X direction.

[0039] 6 is a cross-sectional view of the semiconductor memory device 1 taken along line F6-F6 in FIG. 1. When viewed from the Y direction, each of the pair of third walls 42 overlaps with a part of the first member 30 from the outside of the housing 10. For example, when viewed from the Y direction, each of the pair of third walls 42 overlaps with the first wall 31 of the first member 30 from the outside of the housing 10. Each of the pair of third walls 42 is an example of a "third wall part."

[0040] In the present application, a connection portion between two walls (for example, the connection J1 between the third wall 42 and the fourth wall 43) is part of one wall (for example, the third wall 42) and also part of another wall (the fourth wall 43). Therefore, in the present application, "the third wall 42 overlaps with the first wall 31 when viewed from the Y direction" includes the case where the connection J1 between the third wall 42 and the fourth wall 43 overlaps with the first wall 31 when viewed from the Y direction.

[0041] <2.3.3 Fourth wall> Each of the pair of fourth walls 43 (fourth walls 43A, 43B) is a plate-shaped wall extending along the X and Y directions. Each of the pair of fourth walls 43 extends in the Y direction from the third wall 42. For example, one fourth wall 43A extends in the +Y direction from an end of the third wall 42A in the +Z direction. The other fourth wall 43B extends in the -Y direction from an end of the third wall 42B in the +Z direction. Each of the pair of fourth walls 43 defines a part of the end of the storage space S1 of the housing 10 on the +Z direction side (see FIG. 6). Each of the pair of fourth walls 43 faces the storage space S1 from the +Z direction side. Each of the pair of fourth walls 43 faces the board unit 20 from the +Z direction side. Each of the pair of fourth walls 43 extends in the X direction.

[0042] When viewed from the Y direction, each of the pair of fourth walls 43 overlaps with a part of the first member 30 from the outside of the housing 10. For example, when viewed from the Y direction, each of the pair of fourth walls 43 overlaps with the first wall 31 of the first member 30 from the outside of the housing 10. Each of the pair of fourth walls 43 corresponds to another example of a "third wall portion."

[0043] The fourth wall 43 has a first surface 43s1 and a second surface 43s2. The first surface 43s1 faces the +Z direction. The first surface 43s1 is, for example, flush with the first surface 31s1 of the first wall 31 of the first member 30. The second surface 43s2 faces the -Z direction. The second surface 43s2 faces the storage space S1 of the housing 10. The second surface 43s2 is, for example, flush with the second surface 31s2 of the first wall 31 of the first member 30. In this embodiment, the first wall 31 of the first member 30, the second wall 41 of the second member 40, the third walls 42A and 42B, and the fourth walls 43A and 43B define a cylindrical (for example, rectangular) storage space S1. The storage space S1 is open to the outside of the semiconductor memory device 1 in the +X direction and the -X direction.

[0044] <2.3.4 Engagement part> Returning to Fig. 5, the engaging portions 44 will be described. The pair of engaging portions 44 (engaging portions 44A, 44B) are provided at the end portion on the -X direction side of the third wall 42. One engaging portion 44A is provided at the end portion on the -X direction side of one third wall 42A. The other engaging portion 44B is provided at the end portion on the -X direction side of the other third wall 42B.

[0045] The engaging portion 44 has, for example, a first portion 45a and a second portion 45b. The second portion 45b is located on the +Z direction side of the first portion 45a. The second portion 45b protrudes further in the -X direction than the first portion 45a. As a result, the engaging portion 44 has a recess 45c defined by the step between the first portion 45a and the second portion 45b. The function of the engaging portion 44 will be described later. The engaging portion 44 is an example of a "first engaging portion."

[0046] <2.4 Second heat dissipation section> The second heat dissipation section 60 is a heat dissipation section that promotes heat dissipation from the second member 40. The second heat dissipation section 60 promotes heat dissipation from the second member 40, thereby promoting heat dissipation from multiple heat-generating components (e.g., DRAM 24B and multiple NANDs 25B) mounted on the second surface 21b of the substrate 21. In this embodiment, the second member 40 and the second heat dissipation section 60 are made of metal (e.g., aluminum or aluminum alloy) and have high thermal conductivity. The second heat dissipation section 60 has, for example, a pair of upright portions 61, a ceiling portion 62, and multiple (e.g., three) fins 63.

[0047] (Standing part) The pair of upright portions 61 (upright portions 61A, 61B) stand upright on the opposite side (+Z direction side) from the storage space S1 from the fourth wall 43 of the second member 40. One upright portion 61A stands upright in the +Z direction from an end portion on the +Y direction side of one fourth wall 43A. The other upright portion 61B stands upright in the +Z direction from an end portion on the -Y direction side of the other fourth wall 43B.

[0048] In this embodiment, the standing portion 61 is a plate-shaped wall (standing wall) extending along the X and Z directions. The standing portion 61 extends in the X direction. For example, the standing portion 61 extends in the X direction over more than half the length of the second portion 31b of the first wall 31 in the X direction. For example, the standing portion 61 extends in the X direction over the entire length of the second portion 31b of the first wall 31 in the X direction. At least a portion of the standing portion 61 overlaps with the multiple fins 51 of the first heat dissipation section 50 when viewed from the Y direction (see FIG. 6 ).

[0049] (ceiling) The ceiling portion 62 is a portion that covers the first heat dissipation portion 50 from the +Z direction side. The ceiling portion 62 is supported by a pair of upright portions 61. The ceiling portion 62 is disposed on the opposite side of the first wall 31 of the first member 30 with respect to the multiple fins 51.

[0050] In this embodiment, the ceiling portion 62 is a plate-shaped wall (ceiling wall) that extends along the X and Y directions. The ceiling portion 62 extends in the X direction. For example, the ceiling portion 62 extends in the X direction over more than half the length of the second portion 31b of the first wall 31 in the X direction. For example, the ceiling portion 62 extends in the X direction over the entire length of the second portion 31b of the first wall 31 in the X direction.

[0051] (multiple fins) The multiple fins 63 are provided on the ceiling portion 62 and protrude from the ceiling portion 62 in the -Z direction. The multiple fins 63 protrude from the ceiling portion 62 toward the first wall 31 of the first member 30. The multiple fins 63 are arranged side by side at regular intervals in the Y direction. Each fin 63 is a plate portion extending along the X direction and the Z direction. Each fin 63 extends in the X direction. For example, each fin 63 extends in the X direction so as to span more than half the length of the second portion 31b of the first wall 31 in the X direction. For example, each fin 63 extends in the X direction so as to span the entire length of the second portion 31b of the first wall 31 in the X direction. The fins 63 are an example of a "second fin."

[0052] In this embodiment, at least one fin 63 included in the plurality of fins 63 of the second heat dissipation section 60 is arranged in a position corresponding to a position between two fins 51 included in the plurality of fins 51 of the first heat dissipation section 50 in the Y direction. Furthermore, at least one fin 51 included in the plurality of fins 51 of the first heat dissipation section 50 is arranged in a position corresponding to a position between two fins 63 included in the plurality of fins 63 of the second heat dissipation section 60 in the Y direction. In this embodiment, the fins 51 and the fins 63 are arranged alternately in the Y direction.

[0053] In this embodiment, a cylindrical (e.g., rectangular cylindrical) air flow path space S2 is defined by the first wall 31 of the first member 30, the pair of upright portions 61A, 61B of the second heat dissipation portion 60, and the ceiling portion 62 of the second heat dissipation portion 60 (see FIG. 6). The air flow path space S2 is open to the outside of the semiconductor memory device 1 in the +X direction and the −X direction. Air can pass through the air flow path space S2 along the X direction. The multiple fins 51 of the first heat dissipation portion 50 and the multiple fins 63 of the second heat dissipation portion 60 are arranged inside the air flow path space S2.

[0054] <3. Engagement structure> Next, the engagement structure between the first member 30 and the second member 40 will be described. 7 is a cross-sectional view showing the first end 10e1 of the housing 10. As described above, the engagement portion 32 of the first member 30 has the first portion 33a and the second portion 33b. The first portion 33a protrudes in the -Z direction from the first wall 31. The second portion 33b protrudes in the +X direction from the end of the first portion 33a on the -Z direction side.

[0055] On the other hand, the engaging portion 44 of the second member 40 has a first portion 45a and a second portion 45b. The second portion 45b is located closer to the +Z direction than the first portion 45a. The second portion 45b protrudes further to the -X direction than the first portion 45a. As a result, the engaging portion 44 has a recess 45c defined by a step between the first portion 45a and the second portion 45b. The recess 45c is provided at a position corresponding to the second portion 33b of the engaging portion 32. By inserting the second portion 33b of the engaging portion 32 into the recess 45c, the position of the first member 30 in the Z direction relative to the second member 40 at the first end 10e1 of the housing 10 is restricted.

[0056] In this embodiment, the engaging portion 44 has an inclined portion 45i. The inclined portion 45i is located on the opposite side of the recess 45c from the second portion 45b. The inclined portion 45i faces the second portion 33b of the engaging portion 32 inserted into the recess 45c from the opposite side of the second portion 45b. The inclined portion 45i is inclined so as to move away from the second portion 33b of the engaging portion 32 as it progresses in the -X direction. The inclined portion 45i is inclined with respect to, for example, a horizontal plane.

[0057] When the inclined portion 45i is provided, the second portion 33b of the engaging portion 32 can be inserted into the recess 45c in an attitude inclined with respect to the second portion 45b of the engaging portion 44 (see (a) in FIG. 7). Then, by making the second portion 33b of the engaging portion 32 horizontal, the position of the first member 30 in the Z direction relative to the second member 40 is regulated (see (b) in FIG. 7).

[0058] 8 is a cross-sectional view showing the housing 10 and the heat dissipation unit HS. In this embodiment, the second portion 33b of the engaging portion 32 is inserted into the recess 45c with the first member 30 tilted relative to the second member 40 (see (a) in FIG. 8). Then, the first member 30 is horizontally positioned so that the first member 30 is parallel to the second member 40. This restricts the position of the first member 30 in the Z direction relative to the second member 40 at the first end 10e1 of the housing 10 (see (b) in FIG. 8).

[0059] <4. Fixed structure> Next, the fixing structure between the first member 30 and the second member 40 will be described. Fig. 9 is a cross-sectional view of the semiconductor memory device 1 taken along line F9-F9 in Fig. 6. The second end 10e2 of the housing 10 has a fixing portion 70. The fixing portion 70 includes, for example, a first portion 71, a second portion 72, and a fastening member 73.

[0060] The first portion 71 is provided on the first wall 31 of the first member 30. For example, the first portion 71 is a protrusion that protrudes from the first wall 31 of the first member 30 in the -Z direction. The first portion 71 has a screw hole 71h that opens toward the -Z direction. The inner circumferential surface of the screw hole 71h has a female thread. The screw hole 71h communicates with the through hole 21h of the substrate 21.

[0061] The second portion 72 is provided on the second wall 41 of the second member 40. For example, the second portion 72 is a protrusion that protrudes from the second wall 41 of the second member 40 in the +Z direction. The second portion 72 has a through hole 72h that penetrates the second member 40 in the Z direction. The through hole 72h communicates with the through hole 21h of the substrate 21.

[0062] The fastening member 73 is a member that fastens the first member 30 and the second member 40 together. The fastening member 73 is, for example, a screw. The fastening member 73 is passed through the through hole 72h of the second portion 72 from the outside of the housing 10. The fastening member 73 that has passed through the through hole 72h is then passed through the through hole 21h of the substrate 21 and engages with the screw hole 71h of the first portion 71. By engaging the fastening member 73 with the screw hole 71h, the first member 30 and the second member 40 are fixed together with the substrate 21 sandwiched between the first portion 71 and the second portion 72.

[0063] 10 is a bottom view showing the semiconductor memory device 1. In this embodiment, the fixing portion 70 is provided at the second end 10e2 of the housing 10, in the center of the housing 10 in the Y direction. In this embodiment, the fixing portion 70 is provided at only one location on the housing 10. The first member 30 and the second member 40 are fixed by one fastening member 73 in a state in which the engagement portions 32A and 32B are hooked onto the engagement portions 44A and 44B.

[0064] <5. Assembly method> Next, a method for assembling the semiconductor memory device 1 will be described. 11 is a perspective view for explaining a method of assembling the semiconductor memory device 1. First, a first component P1 in which the first member 30 and the first heat dissipation section 50 are integrated, and a second component P2 in which the second member 40 and the second heat dissipation section 60 are integrated are prepared (see (a) in FIG. 11). For example, the first component P1 is integrally formed by extrusion molding the first member 30 and the first heat dissipation section 50. For example, the second component P2 is integrally formed by extrusion molding the second member 40 and the second heat dissipation section 60.

[0065] Next, the board unit 20 is inserted into the second component P2. The board unit 20 is placed on the second wall 41 of the second component 40 via the heat conductive member 27. In addition, a portion of the board 21 is placed on the second portion 72 included in the fixing portion 70 (see FIG. 9).

[0066] Next, the first component P1 is inserted into the second component P2 by inserting the fins 51 of the first heat dissipation component 50 between the fins 63 of the second heat dissipation component 60 (see (b) in FIG. 11). For example, by aligning the left and right side portions of the first wall 31 with the inner surfaces of the pair of standing components 61A, 61B of the second heat dissipation component 60, the first component P1 can be inserted into the second component P2 along the X direction while being guided by the inner surfaces of the standing components 61A, 61B.

[0067] Next, with the first component P1 tilted in the Z direction relative to the second component P2 (see (a) in FIG. 8), the engaging portions 32A and 32B of the first member 30 are engaged with the engaging portions 44A and 44B of the second component 40. Next, the first component P1 is placed parallel to the second component P2 (see (b) in FIG. 8). Then, the first component 30 and the second component 40 are fixed together using the fastening member 73 (see (c) in FIG. 11). This integrates the first component P1 and the second component P2. The board unit 20 is sandwiched between the first wall 31 of the first component 30 and the second wall 41 of the second component 40 via the thermal conduction member 27. This completes the assembly of the semiconductor memory device 1.

[0068] <6. Effect> Next, the function of the heat dissipation structure HS will be described. Fig. 12 is a cross-sectional view showing an example of a usage environment of the semiconductor memory device 1. Fig. 12 shows a usage environment in which the semiconductor memory device 1 is connected to a connector HDa of a host device HD. For ease of explanation, the board unit 20 is not shown in Fig. 12.

[0069] 12, multiple semiconductor memory devices are arranged side by side in the Z direction, for example. In the host device HD, the position in the Z direction of the connector HDa to which the semiconductor memory device 1 is connected is determined by its standard or specifications. In addition, in the host device HD, the standard or specifications determine an area R in which the heat dissipation unit of the semiconductor memory device 1 can be arranged. In this way, the semiconductor memory device 1 may be restricted from providing a heat dissipation unit on the -Z direction side of the housing 10.

[0070] 13 is a cross-sectional view illustrating the operation of the heat dissipation structure HS of this embodiment. Here, a minute gap g exists between the first wall 31 of the first member 30 and the fourth walls 43A, 43B of the second member 40, which is used for assembling the first member 30 and the second member 40. Therefore, heat transfer between the first member 30 and the second member 40 is limited.

[0071] Arrow A in the figure indicates the transfer path of heat generated by heat-generating components (e.g., controller 23, DRAM 24A, and NAND 25A) mounted on first surface 21a of substrate 21. At least a portion of the heat generated by the heat-generating components mounted on first surface 21a of substrate 21 is transferred from the heat-generating components to multiple fins 51 of first heat dissipation section 50 via heat conduction member 27 and first wall 31. The heat transferred to multiple fins 51 is dissipated to the outside by, for example, air flowing through air flow path space S2.

[0072] Meanwhile, arrow B in the figure indicates the transfer path of heat generated by heat-generating components (e.g., DRAM 24B and NAND 25B) mounted on the second surface 21b of the substrate 21. At least a portion of the heat generated by the heat-generating components mounted on the second surface 21b of the substrate 21 is transferred from the heat-generating components to the third wall 42 and fourth wall 43 of the second member 40 via the thermally conductive member 27 and the second wall 41. In this embodiment, the third wall 42 and fourth wall 43 of the second member 40 overlap the first wall 31 of the first member 30 from the outside of the housing 10 and are exposed to the outside of the semiconductor memory device 1. Therefore, at least a portion of the heat transferred to the third wall 42 and fourth wall 43 of the second member 40 is dissipated from the third wall 42 and fourth wall 43 to the outside of the semiconductor memory device 1.

[0073] Furthermore, a portion of the heat transferred to the third wall 42 and the fourth wall 43 is transferred from the third wall 42 and the fourth wall 43 to the second heat dissipation section 60. A portion of the heat transferred to the second heat dissipation section 60 is released to the outside of the semiconductor memory device 1 from the upright portions 61 and the ceiling portion 62 of the second heat dissipation section 60. A portion of the heat transferred to the second heat dissipation section 60 is transferred to the plurality of fins 63. The heat transferred to the plurality of fins 63 is dissipated to the outside by, for example, air flowing through the air flow path space S2.

[0074] <4. Advantages> As a comparative example, consider a structure in which the housing 10 is formed by a base member having a second wall 41 and a cover member having a first wall 31, a third wall 42, a fourth wall 43, and multiple fins 51. In this comparative example, the base member and the cover member are separate. At least a portion of the heat transferred to the first wall 31 from the heat-generating components mounted on the first surface 21a of the substrate 21 is dissipated to the outside by the first wall 31, the third wall 42, the fourth wall 43, and the multiple fins 51. Meanwhile, heat from the heat-generating components mounted on the second surface 21b of the substrate 21 is transferred to the second wall 41 and dissipated. However, due to the limited heat dissipation area, heat dissipation is difficult to promote. For this reason, it is difficult to dissipate the heat transferred from the substrate 21 to the first wall 31 and the heat transferred from the substrate 21 to the second wall 41 to the outside in a balanced manner, which may make it difficult to improve the heat dissipation performance of the semiconductor memory device.

[0075] On the other hand, in this embodiment, the semiconductor memory device 1 has a housing 10 and a heat dissipation structure HS. The heat dissipation structure HS is provided in the housing 10. The housing 10 has a first member 30 and a second member 40. The first member 30 has a first wall portion (e.g., first wall 31). The first wall portion includes a portion exposed to the outside of the housing 10 and faces the substrate 21 from the +Z direction side. The second member 40 has a second wall portion (e.g., second wall 41). The second wall portion includes a portion exposed to the outside of the housing 10 and faces the substrate 21 from the -Z direction side. The heat dissipation structure HS includes a plurality of fins 51 protruding from the first wall 31 toward the opposite side to the substrate 21. The second member 40 has a third wall portion (e.g., third wall 42 or fourth wall 43) that overlaps with a portion of the first member 30 from the outside of the housing 10 when viewed from the direction in which the plurality of fins 51 are arranged. For example, the second wall portion and the third wall portion are integrally formed, and the second member 40 is a single-piece member including the second wall portion and the third wall portion.

[0076] With this configuration, at least a portion of the heat transferred from the substrate 21 to the first wall portion is dissipated to the outside by the multiple fins 51. On the other hand, at least a portion of the heat transferred from the substrate 21 to the second wall portion is dissipated to the outside by the third wall portion that overlaps with the first member 30 from outside the housing 10. As a result, compared to the configuration of the comparative example, for example, the heat transferred from the substrate 21 to the first wall portion and the heat transferred from the substrate 21 to the second wall portion can be dissipated to the outside in a balanced manner. This allows the heat dissipation performance of the semiconductor memory device 1 to be improved.

[0077] In this embodiment, the third wall portion overlaps the first wall portion from the outside of the housing 10 when viewed from the direction in which the multiple fins 51 are arranged. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall portion is dissipated to the outside by the third wall portion that overlaps with the first wall portion from the outside of the housing 10. This allows the heat transferred from the substrate 21 to the first wall portion and the heat transferred from the substrate 21 to the second wall portion to be dissipated in a balanced manner. This allows the heat dissipation performance of the semiconductor memory device 1 to be improved.

[0078] In this embodiment, the housing 10 has an accommodation space S1 in which the substrate 21 is accommodated. The first wall faces the accommodation space S1 from the +Z direction side. The second wall faces the accommodation space S1 from the -Z direction side. The third wall (e.g., the fourth wall 43) faces the accommodation space S1 from the +Z direction side. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall is dissipated to the outside by the third wall located on the +Z direction side of the accommodation space S1. This can further improve the heat dissipation performance of the semiconductor memory device 1.

[0079] In this embodiment, the heat dissipation structure HS includes a first heat dissipation section 50 including a plurality of fins 51, and a second heat dissipation section 60 provided on the second member 40. When viewed from the direction in which the plurality of fins 51 are arranged, at least a portion of the second heat dissipation section 60 overlaps with at least a portion of the plurality of fins 51. With this configuration, at least a portion of the heat conducted from the substrate 21 to the second wall section is dissipated to the outside by the second heat dissipation section 60 arranged alongside at least a portion of the plurality of fins 51. This can further improve the heat dissipation performance of the semiconductor memory device 1.

[0080] In this embodiment, the second heat dissipation portion 60 includes a plurality of second fins 63. The plurality of second fins 63 are aligned in the same direction as the plurality of fins 51. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall portion is dissipated to the outside by the plurality of fins 63. This can further improve the heat dissipation performance of the semiconductor memory device 1.

[0081] In this embodiment, the second heat dissipation section 60 has an upright portion 61 and a ceiling portion 62. When viewed from the direction in which the fins 51 are arranged, the upright portion 61 overlaps the fins 51. The ceiling portion 62 is supported by the upright portion 61 and is disposed on the opposite side of the fins 51 from the first wall portion. The fins 63 protrude from the ceiling portion 62 toward the first wall portion. With this configuration, at least a portion of the heat transferred from the substrate 21 to the second wall portion is dissipated to the outside by the fins 63 disposed on the opposite side of the fins 51 from the first wall portion. This further improves the heat dissipation performance of the semiconductor memory device 1.

[0082] In this embodiment, at least one fin 63 included in the plurality of fins 63 is disposed corresponding to a position between two fins 51 included in the plurality of fins 51. With this configuration, air can easily flow around the plurality of fins 51 and the plurality of fins 63. This can further improve the heat dissipation performance of the semiconductor memory device 1.

[0083] In this embodiment, the third wall portion (for example, the third wall 42) has an engaging portion 44. The first member 30 has an engaging portion 32 whose position in the Z direction is restricted by engaging with the engaging portion 44. With this configuration, the engaging portion 44 provided on the third wall portion, which contributes to improving heat dissipation, can be used to reduce the number of fastening members required for assembling the semiconductor memory device 1. This can improve the ease of assembly of the semiconductor memory device 1 and / or reduce manufacturing costs.

[0084] (Second embodiment) Next, a second embodiment will be described. The second embodiment differs from the first embodiment in that the second heat dissipation section 60 does not have fins 63. Note that the configuration other than that described below is the same as that of the first embodiment.

[0085] 14 is a cross-sectional view showing a semiconductor memory device 1A according to the second embodiment. In this embodiment, the second heat dissipation section 60 does not have a ceiling section 62 or fins 63. The air flow path space S2 is open in the +Z direction. The upright sections 61 of the second heat dissipation section 60 function as fins, for example.

[0086] With this configuration, at least a portion of the heat transferred from the substrate 21 to the first wall 31 is dissipated to the outside by the multiple fins 51. On the other hand, at least a portion of the heat transferred from the substrate 21 to the second wall 41 is dissipated to the outside from the outside of the housing 10 by the third wall portion (the third wall 42 or the fourth wall 43) that overlaps with the first member 30 and the upright portion 61 of the second heat dissipation portion 60. As a result, compared to the configuration of the comparative example, for example, the heat transferred from the substrate 21 to the first wall 31 and the heat transferred from the substrate 21 to the second wall 41 can be dissipated to the outside in a balanced manner. This makes it possible to improve the heat dissipation performance of the semiconductor memory device 1.

[0087] (Third embodiment) Next, a third embodiment will be described. The third embodiment differs from the first embodiment in that the second heat dissipation section 60 is not provided. Note that the configuration other than that described below is the same as the configuration of the first embodiment.

[0088] 15 is a cross-sectional view showing a semiconductor memory device 1B according to a third embodiment. In this embodiment, the second heat dissipation portion 60 is not provided.

[0089] With this configuration, at least a portion of the heat transferred from the substrate 21 to the first wall 31 is dissipated to the outside by the multiple fins 51. On the other hand, at least a portion of the heat transferred from the substrate 21 to the second wall 41 is dissipated to the outside by the third wall portion (the third wall 42 or the fourth wall 43) that overlaps with the first member 30 from the outside of the housing 10. This makes it possible to dissipate to the outside the heat transferred from the substrate 21 to the first wall 31 and the heat transferred from the substrate 21 to the second wall 41 in a balanced manner, compared to the configuration of the comparative example, for example. This makes it possible to improve the heat dissipation performance of the semiconductor memory device 1B.

[0090] (Fourth embodiment) Next, a fourth embodiment will be described. The third embodiment differs from the first embodiment in that the first heat dissipation section 50 has a plurality of protrusions 51A and the second heat dissipation section 60 has a plurality of protrusions 63A. Note that the configuration other than that described below is the same as that of the first embodiment.

[0091] FIG. 16 is a cross-sectional view showing a semiconductor memory device 1C according to a fourth embodiment. In this embodiment, the first heat dissipation unit 50 has a plurality of protrusions 51A instead of a plurality of fins 51. The protrusions 51A protrude from the first wall 31 in the +Z direction. The protrusions 51A are, for example, cylindrical, but may also be prismatic, conical, or pyramidal. The protrusions 51A are arranged at intervals in the X and Y directions. Similarly, the second heat dissipation unit 60 has a plurality of protrusions 63A instead of a plurality of fins 63. The protrusions 63A protrude from the ceiling 62 in the -Z direction. The protrusions 63A are, for example, cylindrical, but may also be prismatic, conical, or pyramidal. The protrusions 63A are arranged at intervals in the X and Y directions.

[0092] With this configuration, at least a portion of the heat transferred from the substrate 21 to the first wall 31 is dissipated to the outside by the multiple protrusions 51A. On the other hand, at least a portion of the heat transferred from the substrate 21 to the second wall 41 is dissipated to the outside from the outside of the housing 10 by the third wall portion (the third wall 42 or the fourth wall 43) overlapping with the first member 30 and the multiple protrusions 63A. As a result, compared to the configuration of the comparative example, for example, the heat transferred from the substrate 21 to the first wall 31 and the heat transferred from the substrate 21 to the second wall 41 can be dissipated to the outside in a balanced manner. This can improve the heat dissipation performance of the semiconductor memory device 1C.

[0093] Although several embodiments have been described above, the embodiments are not limited to the above examples. For example, multiple embodiments may be realized in combination with each other.

[0094] According to at least one of the above-described embodiments, the semiconductor memory device of the embodiment includes a housing, a substrate, a semiconductor memory, and a heat dissipation structure. The housing includes a first member and a second member. When the thickness direction of the substrate is defined as a first direction, the first member has a first wall portion facing the substrate from a first side in the first direction. The second member has a second wall portion facing the substrate from a second side opposite the first side in the first direction. The heat dissipation structure includes a plurality of first fins protruding from the first wall portion toward the side opposite the substrate. The second member further includes a third wall portion overlapping a portion of the first member from outside the housing when viewed from the second direction in which the plurality of first fins are aligned. This configuration can improve the heat dissipation of the semiconductor memory device.

[0095] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, as well as the inventions described in the claims and their equivalents. [Explanation of symbols]

[0096] 1...Semiconductor memory device 10...Housing 20... Circuit board unit 21... Circuit board 23...Controller 24...DRAM 25...NAND flash memory (semiconductor memory) 30...First member 31...First wall (first wall portion) 32,32A,32B...Engaging part (second engaging part) 40...Second member 41...Second wall (second wall portion) 42,42A,42B…3rd wall (3rd wall part) 43,43A,43B...4th wall (3rd wall part) 44,44A,44B...Engaging part (first engaging part) 50...First heat dissipation section 51...Fin (first fin) 51A…Protrusion 60...Second heat dissipation section 61,61A,61B…Standing part 62...Ceiling 63...Fin (second fin) 63A…Protrusion HS...Heat dissipation structure

Claims

1. The housing and a substrate accommodated in the housing; a semiconductor memory provided on the substrate; a heat dissipation structure provided in the housing; Equipped with the housing includes a first member and a second member, When the thickness direction of the substrate is defined as a first direction, the first member has a first wall portion that includes a portion exposed to the outside of the housing and faces the board from a first side in the first direction; the second member has a second wall portion that includes a portion exposed to the outside of the housing and faces the substrate from a second side opposite to the first side in the first direction, the heat dissipation structure includes a plurality of first fins protruding from the first wall portion toward a side opposite to the substrate, the second member further includes a third wall portion that overlaps with a part of the first member from the outside of the housing when viewed from a second direction in which the plurality of first fins are arranged; Semiconductor memory device.

2. the third wall portion overlaps with the first wall portion from the outside of the housing when viewed from the second direction; 2. The semiconductor memory device according to claim 1.

3. the second member is a one-piece member including the second wall portion and the third wall portion; 3. The semiconductor memory device according to claim 1.

4. the housing has an accommodation space in which the substrate is accommodated, the first wall portion faces the accommodation space from the first side in the first direction, the second wall portion faces the accommodation space from the second side in the first direction, the third wall portion faces the accommodation space from the first side in the first direction; 3. The semiconductor memory device according to claim 1.

5. the heat dissipation structure includes a first heat dissipation portion including the plurality of first fins and a second heat dissipation portion provided on the second member, At least a portion of the second heat dissipation portion overlaps with at least a portion of the plurality of first fins when viewed from the second direction.

3. The semiconductor memory device according to claim 1.

6. The second heat dissipation portion includes a plurality of second fins arranged in the second direction.

6. The semiconductor memory device according to claim 5.

7. the second heat dissipation portion further includes an upright portion that overlaps with the plurality of first fins when viewed from the second direction, and a ceiling portion that is supported by the upright portion and is disposed on an opposite side of the plurality of first fins from the first wall portion, The plurality of second fins protrude from the ceiling portion toward the first wall portion.

7. The semiconductor memory device according to claim 6.

8. At least one second fin included in the plurality of second fins is disposed at a position corresponding to a position between two first fins included in the plurality of first fins.

8. The semiconductor memory device according to claim 7.

9. the third wall portion has a first engagement portion, the first member has a second engaging portion that is engaged with the first engaging portion to restrict the position in the first direction; 3. The semiconductor memory device according to claim 1.

10. Further comprising a controller provided on the substrate; At least one first fin included in the plurality of first fins overlaps the semiconductor memory and the controller when viewed from the first direction.

3. The semiconductor memory device according to claim 1.

11. The housing and a substrate accommodated in the housing; a semiconductor memory provided on the substrate; a heat dissipation structure provided in the housing; Equipped with the housing includes a first member and a second member, When the thickness direction of the substrate is defined as a first direction, the first member has a first wall portion that includes a portion exposed to the outside of the housing and faces the board from a first side in the first direction; the second member has a second wall portion that includes a portion exposed to the outside of the housing and faces the substrate from a second side opposite to the first side in the first direction, the heat dissipation structure includes a first heat dissipation portion provided on the first member and a second heat dissipation portion provided on the second member, the first heat dissipation portion includes a plurality of first fins provided on the first wall portion, the second heat dissipation portion includes a plurality of second fins arranged on the opposite side of the first wall portion from the second wall portion, Semiconductor memory device.

12. The housing and a substrate accommodated in the housing; a semiconductor memory provided on the substrate; a heat dissipation structure provided in the housing; Equipped with the housing includes a first member and a second member, When the thickness direction of the substrate is defined as a first direction, the first member has a first wall portion that includes a portion exposed to the outside of the housing and faces the board from a first side in the first direction; the second member has a second wall portion that includes a portion exposed to the outside of the housing and faces the substrate from a second side opposite to the first side in the first direction, the heat dissipation structure includes a plurality of protrusions protruding from the first wall portion toward an opposite side to the substrate, the second member further includes a third wall portion that overlaps with a part of the first member from the outside of the housing when viewed from a second direction in which the plurality of protrusions are arranged; Semiconductor memory device.

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