Power module

Abstract

To provide a power module with improved di / dt switching behavior.SOLUTION: A power module 100 includes: a substrate 202 having patterned metallization on an electrical insulator; a first power transistor die 210 of a first transistor type attached to the substrate; and a second power transistor die 212 of a second transistor type. The first (second) one or more of the first power transistor dies 210 and the first (second) one or more of the second power transistor dies 212 are electrically connected in parallel via the patterned metallization to form first and second topological switches 104 and 106. The first and second topological switches 104 and 106 are electrically connected in series via the patterned metallization.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] A power semiconductor module contains power semiconductor dies mounted on one or more substrates and electrically interconnected within the module to form the power converter components of a power electronics device, such as a half bridge, full bridge, or B6 bridge. Conventional power semiconductor modules typically have a negative gate feedback loop that slows down switching events due to stray inductance. During di / dt switching, the negative gate feedback loop reduces the effective gate voltage and current provided by the gate driver, thus slowing down switching speed.

[0002] Therefore, there is a need for a power module design with improved di / dt switching behavior. Summary of the Invention

[0003] According to one embodiment of a power module, the power module comprises: a substrate including patterned metallization on an electrical insulator; a plurality of first power transistor dies of a first transistor type attached to the substrate; and a plurality of second power transistor dies of a second transistor type different from the first transistor type attached to the substrate, wherein a first one or more of the first power transistor dies and a first one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a first topological switch; a second one or more of the first power transistor dies and a second one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a second topological switch; and the first topological switch and the second topological switch are electrically connected in series via the patterned metallization.

[0004] According to one embodiment of a multi-phase power electronics assembly, the multi-phase power electronics assembly includes a plurality of power modules, which can be mounted to a common base plate or coolant system. Each power module includes a substrate supporting a different phase and including patterned metallization on an electrical insulator, a plurality of first power transistor dies of a first transistor type mounted on the substrate, and a plurality of second power transistor dies of a second transistor type different from the first transistor type mounted on the substrate, wherein a first one or more of the first power transistor dies and a first one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a first topological switch, a second one or more of the first power transistor dies and a second one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a second topological switch, and the first and second topological switches are electrically connected in series via the patterned metallization to enable a load current path for the phases supported by the power modules.

[0005] According to another embodiment of a power module, the power module comprises: a substrate including patterned metallization on an electrical insulator; a first power transistor die having a drain / collector pad attached to a first metal island of the patterned metallization; and a second power transistor die having a drain / collector pad attached to the first metal island of the patterned metallization, wherein the second metal island of the patterned metallization is electrically connected to source / emitter pads on both sides of the first power transistor die and the second power transistor die facing outward from the substrate; a third metal island of the patterned metallization is electrically connected to the source / emitter pads of the first power transistor die and the second power transistor die; and a load current path of the power module includes the first and second metal islands but excludes the third metal island.

[0006] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.

[0007] The elements of the drawings are not necessarily to scale relative to each other. Like reference symbols indicate corresponding like parts. The features of the various illustrated embodiments may be combined unless they are mutually exclusive. The embodiments are illustrated in the drawings and detailed in the following description. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 shows a schematic diagram of one embodiment of a power electronics assembly including a power module and a gate driver IC. [Figure 2] FIG. 1 shows a top view of a power module with the module frame outlined so that the internal components of the module are visible. [Figure 3] The thermal behavior of the power module in motor acceleration mode is shown. [Figure 4] The thermal behavior of the power module in diode (freewheel) mode is shown. [Figure 5] 10 shows a top view of a power module according to a further embodiment. [Figure 6] 10 shows a top view of a power module according to a further embodiment. [Figure 7] 10 shows a top view of a power module according to a further embodiment. [Figure 8] 10 shows a top view of a power module according to a further embodiment. [Figure 9] 10 shows a top view of a power module according to a further embodiment. [Figure 10] FIG. 1 illustrates a top view of a multi-phase power electronics assembly including a plurality of power modules. DETAILED DESCRIPTION OF THE INVENTION

[0009] The embodiments described herein provide a power module design without a negative gate feedback loop and therefore with improved di / dt switching behavior. The negative gate feedback loop is eliminated by providing gate driver connections that are outside the load current path of the power module. Because the load current does not cross the gate driver connections, the gate driver connections to the power module are di / dt-free during switching and therefore do not experience voltage drops. This means that the gate drivers can rapidly switch the power transistor dies included in the power module without negative feedback. Different types of power transistor dies can be included in the power module, either separately or in combination, to take advantage of the advantages associated with different technology types.

[0010] Exemplary embodiments of power module designs and corresponding manufacturing methods will now be described with reference to the drawings. Any of the power module embodiments described herein may be used interchangeably unless otherwise specified.

[0011] 1 shows a schematic diagram of one embodiment of a power electronics assembly including a power module 100 and a gate driver IC (integrated circuit) 102. Other components of the power electronics assembly are not shown to emphasize the power module 100. The power electronics assembly can be used in a variety of power applications, such as DC / AC inverters, DC / DC converters, AC / DC converters, DC / AC converters, AC / AC converters, multi-phase inverters, H-bridges, DC motor drives, etc.

[0012] In FIG. 1, the power module 100 includes a first topological switch 104 and a second topological switch 106 electrically connected in series, e.g., in a half-bridge configuration. Each of the topological switches 104, 106 includes two or more power transistor dies (chips) connected in parallel and controlled simultaneously to implement the function of a single switch device. Each power transistor die in FIG. 1 is represented by a transistor symbol HS1, HS2, LS1, or LS2. The first topological switch 104 may be implemented by power transistor dies HS1, HS2 of different transistor types, and the second topological switch 106 may be implemented by power transistor dies LS1, LS2 of different transistor types. The different transistor types mean that the power transistor dies HS1 / HS2, LS1 / LS2 forming the same topological switches 104, 106 may utilize different semiconductor technologies (e.g., Si and SiC) and / or different transistor technologies (e.g., MOSFET and IGBT).

[0013] For example, SiC MOSFET dies and Si IGBT dies can be used to form the first topological switch 104 and / or the second topological switch 106, with a diode die electrically connected in anti-parallel with each Si IGBT die. In another example, SiC MOSFET dies and Si reverse-conducting IGBT dies can be used to form the first topological switch 104 and / or the second topological switch 106. In yet another example, Si MOSFET dies and Si IGBT dies can be used to form the first topological switch 104 and / or the second topological switch 106. In yet another example, Si IGBT dies and Si reverse-conducting IGBT dies can be used to form the first topological switch 104 and / or the second topological switch 106. Still other types of semiconductor technology (e.g., GaN) and / or transistor technology (e.g., JFET—junction field-effect transistor) can be used to form the first topological switch 104 and / or the second topological switch 106.

[0014] The use of IGBT (insulated gate bipolar transistor) power semiconductor dies provides high reliability, high production yield, and a favorable cost-to-current ratio. The use of SiC MOSFET (metal-oxide semiconductor field-effect transistor) power semiconductor dies provides higher efficiency and lower battery costs compared to their IGBT counterparts because SiC MOSFET power semiconductor dies have no p-n junction voltage drop and therefore low conduction losses under light load conditions. Therefore, power modules utilizing SiC MOSFET power semiconductor dies have better WLTP (World Wide Harmonized Test Procedure for Passenger Vehicles) drive cycle efficiency compared to power modules utilizing IGBT power semiconductor dies. However, SiC MOSFET power semiconductor dies are significantly more expensive than IGBT power semiconductor dies. Therefore, power module 100 utilizes a combination of SiC MOSFET power semiconductor dies and IGBT power semiconductor dies to implement topological switches 104, 106, reducing SiC chip area and therefore chip / module cost while achieving high WLTP drive cycle efficiency.

[0015] 1 , the drain / collector of each power transistor die HS1, HS2 used to form the first topological switch 104 forms a positive load terminal P1 of the power module 100, e.g., a DC+ terminal in the case of a motor drive application. The source / emitter of each power transistor die LS1, LS2 used to form the second topological switch 106 forms a negative load terminal N1 of the power module 100, e.g., a DC− terminal in the case of a motor drive application. The source / emitter of each power transistor die HS1, HS2 used to form the first topological switch 104 and the drain / collector of each power transistor die LS1, LS2 used to form the second topological switch 106 are connected to form a switch node SW of the power module 100, e.g., an AC / phase terminal in the case of a motor drive application.

[0016] Each power transistor die HS1, HS2, LS1, LS2 also has a gate terminal Gn.m and an auxiliary source / emitter terminal E / Sm that are used by the gate driver 102 to provide a transistor drive voltage signal that switches the corresponding topological switch 104, 106. At least one of the power transistor dies HS1, HS2 used to form the first topological switch 104 and at least one of the power transistor dies LS1, LS2 used to form the second topological switch 106 has a sensing terminal TSn.m for measuring current, e.g., via a current sensing element Rsense and / or temperature, e.g., via a temperature sensing element Tsense in the gate driver 102.

[0017] The gate driver 102 also provides a reference ground GND2 for the power module 100 and, for ease of illustration, may have additional outputs and inputs not shown in Figure 1. For ease of illustration, Figure 1 shows the gate driver 102 connected only to the second topological switch 106 included in the power module 100. The same or different gate drivers 102 can be used to switch the topological switches 104, 106 included in the power module 100.

[0018] 2 shows a top view of the power module 100 with the module frame 200 outlined so that the internal components of the module 100 are visible. The power module 100 includes a substrate 202 having a first metallization 204 patterned on an electrical insulator 206. The substrate 202 may also have a second metallization 208 on the opposite side of the electrical insulator 206 as the patterned first metallization 204. The substrate 202 may be a direct copper bond (DCB) substrate, an active metal braze (AMB) substrate, or an insulated metal (IMS) substrate, and in each case, an electrical insulator 206, e.g., a ceramic body, separates the first and second metallizations 204, 208 of the substrate 202 from each other.

[0019] The first metallization 204 of the substrate 202 is patterned to ensure proper isolation and signal routing for mounting power electronic devices implemented using the power module 100. Exemplary electrical connections are described in more detail below in the context of a half bridge. However, a half bridge is merely one example of a power electronic device that may be implemented using the power module 100. The first metallization 204 of the substrate 202 can be patterned differently than shown in the figures to facilitate electrical connection of any type of power electronic device implemented using the power module 100.

[0020] Power module 100 also includes a first power transistor die 210 of a first transistor type mounted on substrate 202 and a second power transistor die 212 of a second transistor type different from the first transistor type mounted on substrate 202. That is, first power transistor die 210 and second power transistor die 212 utilize different semiconductor technologies (e.g., Si and SiC) and / or different transistor technologies (e.g., MOSFET and IGBT).

[0021] For example, the first power transistor die 210 may be a SiC MOSFET die, the second power transistor die 212 may be a Si IGBT die, and the diode die 214 is electrically connected in anti-parallel with each Si IGBT die 212 to provide a freewheeling current path. In another example, the first power transistor die 210 may be a SiC MOSFET die, and the second power transistor die 212 may be a Si reverse-conducting IGBT die. In yet another example, the first power transistor die 210 may be a Si MOSFET die, and the second power transistor die 212 may be a Si IGBT die. In yet another example, the first power transistor die 210 may be a Si IGBT die, and the second power transistor die 212 may be a Si reverse-conducting IGBT die. Still other types of semiconductor technologies (e.g., GaN) and / or transistor technologies (e.g., JFET—Junction Field Effect Transistor) can be used.

[0022] In one embodiment, the power transistor dies 210, 212 are vertical power transistor dies. For vertical power transistor dies, the primary current flow path is between the front and back sides of each die 210, 212 (along the z-direction in FIG. 2). A drain pad is typically located on the backside of the die, with gate and source pads (and optionally one or more sense pads) on the front side of the die. Additional types of semiconductor dies, such as a logic die, a controller die, and a gate driver die, may also be included in the power module 100.

[0023] A first one or more of the first power transistor dies 210_1 and a first one or more of the second power transistor dies 212_1 are electrically connected in parallel via the patterned substrate metallization 204 to form the second topological switch 106. FIG. 2 shows four first power transistor dies 210_1 and one second power transistor die 212_1 forming the second topological switch 106. However, this is merely an example. The number of first power transistor dies 210_1 and the number of second power transistor dies 212_1 forming the second topological switch 106 depends on various considerations, such as transistor type, load requirements, etc.

[0024] A second one or more of the first power transistor dies 210_2 and a second one or more of the second power transistor dies 212_2 are electrically connected in parallel via the patterned substrate metallization 204 to form the first topological switch 104. FIG. 2 shows four first power transistor dies 210_2 and one second power transistor die 212_2 forming the first topological switch 104. However, this is merely an example. The number of first power transistor dies 210_2 and the number of second power transistor dies 212_2 forming the first topological switch 104 depends on various considerations, such as transistor type, load requirements, etc.

[0025] The first topological switch 104 and the second topological switch 106 are electrically connected in series, for example in a half-bridge configuration, via patterned substrate metallization 204. In the half-bridge configuration, the first topological switch 104 may form a high-side switch device of the half-bridge, and the second topological switch 106 may form a low-side switch device of the half-bridge.

[0026] Continuing with the half-bridge example, patterned substrate metallization 204 may include a first metal island 216 providing a phase (AC) terminal for providing a phase or quasi-AC current path to switch node SW between first topological switch 104 and second topological switch 106. A first one or more drain / collector pads (out of view) of first power transistor die 210_1 and a first one or more drain / collector pads (out of view) of second power transistor die 212_1 are attached to first metal island 216 of patterned substrate metallization 204. The configuration of patterned substrate metallization 204 may be designed for other types of power circuit configurations. For example, power module 100 may implement a single topological switch by omitting a second one or more of first power transistor dies 210_2 and a second one or more of second power transistor dies 212_2.

[0027] The patterned substrate metallization 204 may implement the high-side (DC+) power terminal of the half bridge via second and third metal islands 218, 220. A second drain / collector pad or pads (out of view) of the first power transistor die 210_2 are attached to the second metal island 218 of the patterned substrate metallization 204. A second drain / collector pad or pads (out of view) of the second power transistor die 212_2 are attached to the third metal island 220 of the patterned substrate metallization 204. According to this embodiment, the high-side (DC+) power terminal of the half bridge has a split configuration. Alternatively, the patterned substrate metallization 204 may implement the high-side (DC+) power terminal of the half bridge via a single metal island. However, in FIG. 2, the split DC+ terminal configuration has the advantage of reduced stray inductance.

[0028] More specifically, with regard to reducing stray inductance, the fourth metal island 222 of the patterned substrate metallization 204 forms a low-side (DC-) power terminal of the half-bridge. According to this embodiment, the fourth metal island 222 of the patterned substrate metallization 204 is electrically connected to the first one or more source / emitter pads 224 of the first power transistor die 210_1 and the first one or more source / emitter pads 226 of the second power transistor die 212_1 by respective electrical conductors 228, 230, such as wire bonds, wire ribbons, metal clips, etc. In FIG. 2 , the fourth metal island 222 of the patterned substrate metallization 204 is interposed between the second metal island 218 and the third metal island 220 of the patterned substrate metallization 204 along the first edge of the substrate 200 in the first lateral direction (the x-direction in FIG. 2 ). In this example, the fourth metal island 222 is at DC- potential and the second and third metal islands 218, 220 are at DC+ potential, thereby reducing the stray inductance of the commutation (load current) path of the power module 100.

[0029] 2, first metal island 216 of patterned substrate metallization 204 extends between second metal island 218 and third metal island 220 of patterned substrate metallization 204 in a direction toward a second edge of substrate 200 opposite the first edge (the y-direction in FIG. 2). First metal island 216 of patterned substrate metallization 204 terminates at the second edge of substrate 200 to form an AC (phase) terminal of power module 100 in this example.

[0030] 2 , the patterned substrate metallization 204 also includes a fifth metal island 232 interposed between a sixth metal island 234 and a seventh metal island 236 in a first lateral direction (the x-direction in FIG. 2 ). The fifth metal island 232 is electrically connected to the first one or more source / emitter pads 224 of the first power transistor die 210_1 and the first one or more source / emitter pads 226 of the second power transistor die 212_1 by respective electrical conductors 238, such as wirebonds, wire ribbons, metal clips, etc. The sixth metal island 234 is electrically connected to the first one or more gate pads 240 of the first power transistor die 210_1 by respective electrical conductors 242, such as wirebonds, wire ribbons, metal clips, etc. The seventh metal island 236 is electrically connected to the first gate pad(s) 244 of the second power transistor die 212_1 by respective electrical conductors 246, such as wire bonds, wire ribbons, metal clips, or the like.

[0031] The fifth and sixth metal islands 232, 234 of the patterned substrate metallization 204 enable gate driver connections to a first one or more of the first power transistor dies 210_1. The fifth and seventh metal islands 232, 236 of the patterned substrate metallization 204 enable gate driver connections to a first one or more of the second power transistor dies 212_1. The first one or more gate signals of the first power transistor die 210_1 are carried by the sixth metal island 234 of the patterned substrate metallization 204 and are referenced to ground by the fifth metal island 232, which is at the reference ground GND2 provided by the gate driver 102. The first one or more gate signals of the second power transistor die 212_1 are carried by the seventh metal island 236 of the patterned substrate metallization 204 and are also referenced to ground by the fifth metal island 232. A fifth metal island 232 of the patterned substrate metallization 204 forms an auxiliary source / emitter connection to the power transistor dies 210_1, 212_1 that form the second topological switch 106.

[0032] The auxiliary source / emitter connection implemented by the fifth metal island 232 of the patterned substrate metallization 204 ensures that there is no negative gate feedback loop for the second topological switch 106. The fourth metal island 222 of the patterned substrate metallization 204 has the same steady-state potential as the fifth metal island 232. However, because the fourth metal island 222 carries the switched load current during switching of the second topological switch 106, it has a voltage drop across its trace / length given by dV=L*di / dt, where L is the stray inductance. Meanwhile, no load current flows through any of the fifth, sixth, and seventh metal islands 232, 234, 236. That is, the load current path of the power module 100, as indicated by the dashed arrow in FIG. 2, includes the first through fourth metal islands 216, 218, 220, and 222, but does not include the fifth, sixth, and seventh metal islands 232, 234, and 236. Therefore, di / dt current flows through the fifth metal island 232 during switching, and therefore there is no voltage drop across the fifth metal island 232 along its trace / length. This means that there is no gate voltage or current drop, and the gate driver 102 can switch the power transistor dies 210_1 and 212_1 that form the second topological switch 106 at high frequencies without negative feedback.

[0033] When a first topological switch 104 is also included in the power module 100, the patterned substrate metallization 204 can be configured to avoid a negative gate feedback loop of the first topological switch 104. For example, in FIG. 2 , an eighth metal island 248 of the patterned substrate metallization 204 is interposed between a ninth metal island 250 and a tenth metal island 252 of the patterned substrate metallization 204 in a first lateral direction (the x-direction in FIG. 2 ). The eighth metal island 248 is electrically connected to second one or more source / emitter pads 254 of the first power transistor die 210_2 and second one or more source / emitter pads 256 of the second power transistor die 212_2 by one or more respective electrical conductors 255, 257, such as wire bonds, wire ribbons, metal clips, etc. The second one or more source / emitter pads 254 of the first power transistor die 210_2 and the second one or more source / emitter pads 256 of the second power transistor die 212_2 are electrically connected to the first metal island 216 of the patterned substrate metallization 204 by respective electrical conductors 258, 260, such as wire bonds, wire ribbons, metal clips, etc.

[0034] The ninth metal island 250 of the patterned substrate metallization 204 is electrically connected to the second gate pad(s) 262 of the first power transistor die 210_2 by one or more electrical conductors 264, such as wirebonds, wire ribbons, metal clips, etc. The tenth metal island 252 of the patterned substrate metallization 204 is electrically connected to the second gate pad(s) 266 of the second power transistor die 212_2 by one or more electrical conductors 268, such as wirebonds, wire ribbons, metal clips, etc.

[0035] The eighth and ninth metal islands 248, 250 of the patterned substrate metallization 204 enable gate driver connections to a second one or more of the first power transistor dies 210_2. The eighth and tenth metal islands 248, 252 of the patterned substrate metallization 204 enable gate driver connections to a second one or more of the second power transistor dies 212_2. The second one or more gate signals for the first power transistor die 210_2 are carried by the ninth metal island 250 of the patterned substrate metallization 204 and are referenced to ground by the eighth metal island 248, which is at the reference ground GND2 provided by the gate driver 102. The second one or more gate signals for the second power transistor die 212_2 are carried by the tenth metal island 252 of the patterned substrate metallization 204 and are also referenced to ground by the eighth metal island 248. An eighth metal island 248 of the patterned substrate metallization 204 forms an auxiliary source / emitter connection to the power transistor dies 210_2, 212_2 that form the first topological switch 104.

[0036] The auxiliary source / emitter connection implemented by the eighth metal island 248 of the patterned substrate metallization 204 ensures that there is no negative gate feedback loop for the first topological switch 104. The first metal island 216 of the patterned substrate metallization 204 has the same steady-state potential as the eighth metal island 248. However, because the first metal island 216 carries the switched load current during switching of the first topological switch 104, it has a voltage drop across its trace / length given by dV = L * di / dt, where L is the stray inductance. Meanwhile, the eighth, ninth, and tenth metal islands 248, 250, and 252 do not carry the load current. That is, the load current path of the power module 100 includes the first through fourth metal islands 216, 218, 220, and 222, but does not include the eighth, ninth, and tenth metal islands 248, 250, and 252. Therefore, no di / dt current flows through the eighth metal island 248 during switching, and therefore there is no voltage drop across the trace / length of the eighth metal island 248. This means that there is no gate voltage or current drop, and the gate driver 102 can switch the power transistor dies 210_2, 212_2 that form the first topological switch 104 at high frequencies without negative feedback. As mentioned above, the power module 100 may alternatively include only one of the topological switches 104, 106.

[0037] 2 , eighth, ninth, and tenth metal islands 248, 250, 252 of patterned substrate metallization 204 are interposed in a first lateral direction (the x-direction in FIG. 2 ) between a first branch 216_1 and a second branch 216_2 of a first metal island 216 of patterned substrate metallization 204. The first branch 216_1 of first metal island 216 is electrically connected to a second source / emitter pad(s) 254 of first power transistor die 210_2 by one or more first conductors 258, such as wirebonds, wire ribbons, metal clips, etc. The second branch 216_2 of first metal island 216 is electrically connected to a second source / emitter pad(s) 256 of second power transistor die 212_2 by one or more second conductors 260, such as wirebonds, wire ribbons, metal clips, etc.

[0038] Similarly, fifth, sixth, and seventh metal islands 232, 234, 236 of patterned substrate metallization 204 are interposed in a first lateral direction (the x-direction in FIG. 2 ) between first branch 222_1 and second branch 222_2 of fourth metal island 222 of patterned substrate metallization 204. First branch 222_1 of fourth metal island 222 is electrically connected to first one or more source / emitter pads 224 of first power transistor die 210_1 by one or more first electrical conductors 228, such as wirebonds, wire ribbons, metal clips, etc. Second branch 222_2 of fourth metal island 222 is electrically connected to first one or more source / emitter pads 226 of second power transistor die 212_1 by one or more second electrical conductors 230, such as wirebonds, wire ribbons, metal clips, etc.

[0039] In FIG. 2 , the fourth metal island 222 of the patterned substrate metallization 204 is interposed in a first lateral direction (x-direction in FIG. 2 ) between a metal island 270 of the patterned substrate metallization 204 electrically connected to a single sense pad 272 of a first one or more of the first power transistor dies 210_1 by one or more electrical conductors 274, such as wire bonds, wire ribbons, metal clips, etc., and a metal island 234 of the patterned substrate metallization 204 electrically connected to a first one or more gate pads 240 of the first power transistor die 210_1. The fourth metal island 222 of the patterned substrate metallization 204 is interposed in a first lateral direction (x-direction in FIG. 2 ) between a metal island 276 of the patterned substrate metallization 204 electrically connected to a single sense pad 278 of a first one or more of the second power transistor dies 212_1 by one or more electrical conductors 280, such as wire bonds, wire ribbons, metal clips, etc., and a metal island 236 of the patterned substrate metallization 204 electrically connected to a first one or more gate pads 244 of the second power transistor dies 212_1.

[0040] In a similar manner for the second topological switch 106, when included in the power module 100, a first metal island 216 of the patterned substrate metallization 204 is interposed in a first lateral direction (x-direction in FIG. 2 ) between a metal island 282 of the patterned substrate metallization 204 electrically connected to a single sense pad 284 of a second one or more of the first power transistor dies 210_2 by one or more electrical conductors 286, such as wire bonds, wire ribbons, metal clips, etc., and a metal island 250 of the patterned substrate metallization 204 electrically connected to a second one or more gate pads 262 of the first power transistor dies 210_2. The first metal island 216 of the patterned substrate metallization 204 is interposed in a first lateral direction (x-direction in FIG. 2 ) between a metal island 288 of the patterned substrate metallization 204 that is electrically connected to a single sense pad 290 of a second one or more of the second power transistor dies 212_2 by one or more electrical conductors 292, such as wire bonds, wire ribbons, metal clips, etc., and a metal island 252 of the patterned substrate metallization 204 that is electrically connected to a second one or more gate pads 266 of the second power transistor dies 212_2.

[0041] 2 , a single sensor pin 294 is attached to a metal island 270 of the patterned substrate metallization 204 that is electrically connected to a single one of the first one or more sense pads 272 of the first power transistor die 210_1, a single sensor pin 296 is attached to a metal island 276 of the patterned substrate metallization 204 that is electrically connected to a single one of the first one or more sense pads 278 of the second power transistor die 212_1, a single sensor pin 298 is attached to a metal island 282 of the patterned substrate metallization 204 that is electrically connected to a single one of the second one or more sense pads 284 of the first power transistor die 210_2, and a single sensor pin 300 is attached to a metal island 288 of the patterned substrate metallization 204 that is electrically connected to a sense pad 290 of a single one of the second one or more of the second power transistor die 212_2. Additional pins 302 may be attached to the patterned substrate metallization 204 to facilitate further external electrical connections to components housed in the power module 100, such as gate connections, auxiliary source / emitter connections, etc.

[0042] Alternatively, only one of the first power transistor dies 210_1, 212_1 forming the second topological switch 106 and / or only one of the power transistor dies 210_2, 212_2 forming the first topological switch 104 may have a sense pad 272 / 278, such that one of the sense pads 272, 278 for the second topological switch 106 and / or one of the sense pads 284, 290 for the first topological switch 104 (and corresponding connections and pins) shown in FIG. 2 may be omitted. That is, only one of the transistor types may provide a sense function, such as an IGBT, but not a SiC MOSFET, or vice versa. All power transistor dies 210, 212 may have sense pads, but only one sense pad from each group of power transistor dies 210_1, 212_1, 210_2, 212_2 may be connected to the patterned substrate metallization 204.

[0043] More generally, any of the power transistor dies 210, 212 forming any of the topological switches 104, 106 can implement a sensor function, such as a temperature sensor, a current mirror, or a combination of a temperature sensor and a current mirror. The corresponding module sense pins 294, 296, 298, 300 may be located near the corresponding gate connections of the corresponding switches, but the load current path may be between the corresponding gate and the sensor pin location to avoid interfering with the load current path due to minimized stray inductance and resistance. As mentioned above, only one power transistor die 210, 212 per topological switch 104, 106 can implement the sense function to save pin connection and layout / routing effort. However, more than one power transistor die 210, 212 per topological switch 104, 106 may implement the sense function.

[0044] In FIG. 2 , the first one or more first power transistor dies 210_1 and the second one or more first power transistor dies 210_2 are arranged diagonally relative to each other on the module substrate 202, and the first one or more second power transistor dies 212_1 and the second one or more second power transistor dies 212_2 are also arranged diagonally relative to each other on the module substrate 202. That is, the high-side and low-side power transistor dies 210, 212 of the same transistor type are offset / positioned diagonally relative to each other to provide more separation distance without having to increase the size of the module substrate 202. This configuration is optimal for thermal coupling. For example, in a motor application, only the diode die is loaded when in diode (freewheeling) mode, e.g., when stopping the motor. When accelerating the motor, the IGBT 212 is primarily loaded. The diagonal arrangement shown in FIG. 2 results in the maximum distance between the IGBT die 212 and the diode die 214 of the high-side and low-side switches 104, 106. Thus, the hottest components are separated by the greatest distance.

[0045] Figure 3 illustrates the thermal behavior of power module 100 in a motor acceleration mode, for example, when accelerating a load of a motor powered by module 100. The hottest die component in the acceleration mode is indicated by the box labeled 400 in Figure 3. The next hottest die component in the acceleration mode is indicated by the box labeled 402 in Figure 3. The coolest die component in the acceleration mode is indicated by the box labeled 404 in Figure 3.

[0046] Figure 4 illustrates the thermal behavior of a power module in diode (freewheel) mode when turning off a load, for example, a motor powered by module 100. The hottest die component in diode mode is indicated by the box labeled 400 in Figure 4. The next hottest die component in diode mode is indicated by the box labeled 402 in Figure 4. The coolest die component in diode mode is indicated by the box labeled 404 in Figure 4.

[0047] 5 shows a top view of the power module 100 without the module frame 200 according to another embodiment. In FIG. 5, the fifth metal island 232 of the patterned substrate metallization 204 is interposed between the sixth and seventh metal islands 234, 236 of the patterned substrate metallization 204 in a second lateral direction (y-direction in FIGS. 2 and 5) that is orthogonal to the first lateral direction (x-direction in FIGS. 2 and 5). Similarly, the eighth metal island 248 of the patterned substrate metallization 204 is interposed between the ninth and tenth metal islands 250, 252 of the patterned substrate metallization 204 in the second lateral direction (y-direction in FIGS. 2 and 5).

[0048] 6 illustrates a top view of power module 100 without module frame 200 according to another embodiment. In FIG. 6, first metal island 216 of patterned substrate metallization 204 is electrically connected to additional metal islands 500 of patterned substrate metallization 204 by one or more electrical conductors 502, such as wire bonds, wire ribbons, metal clips, etc. Additional metal islands 500 terminate at a second end of module substrate 202 and form AC / phase module terminals on the opposite side of substrate 204, with metal islands 218, 220 forming the DC+ module terminal and metal island 222 forming the DC− module terminal.

[0049] 7 illustrates a top view of power module 100 omitting module frame 200 according to another embodiment. In FIG. 7 , second source / emitter pads 254 of first power transistor die 210_2 are electrically connected to first metal island 216 of patterned substrate metallization 204 by one or more respective conductors 255, such as wire bonds, wire ribbons, metal clips, etc. Similarly, in FIG. 7 , second source / emitter pads 256 of second power transistor die 212_2 are electrically connected to first metal island 216 of patterned substrate metallization 204 by one or more respective conductors 257, such as wire bonds, wire ribbons, metal clips, etc.

[0050] 7 , the first one or more of the first power transistor dies 210_1 includes at least three first power transistor dies 210 arranged in a first row 600 on the same metal island 602 of the patterned substrate metallization 204. Similarly, the second one or more of the first power transistor dies 210_2 includes at least three first power transistor dies 210 arranged in a second row 604 on the same metal island 606 of the patterned substrate metallization 204. In FIG. 7 , the first row 600 of the first power transistor dies 210 is shown attached to a first metal island 216 of the patterned substrate metallization 204, and the second row 604 of the first power transistor dies 210 is shown attached to a second metal island 218 of the patterned substrate metallization 204. However, the first row 600 of the first power transistor die 210 may be attached to a metal island of the patterned substrate metallization 204 that is different from the first metal island 216, and the second row 604 of the first power transistor die 210 may be attached to a metal island of the patterned substrate metallization 204 that is different from the second metal island 218.

[0051] 8 illustrates a top view of a power module 100 without the module frame 200 according to another embodiment. In FIG. 8, the metal islands 602 of the patterned substrate metallization 204 to which the first row 600 of first power transistor dies 210 are attached have wider portions 602_1 to which the middle (inner) ones of the at least three first power transistor dies 210 are attached and narrower portions 602_2 to which the at least three end (outer) ones of the first power transistor dies 210 are attached to better balance heat dissipation. That is, the middle ones of the at least three first power transistor dies 210 in the first row 600 have a higher thermal capacitance than the end dies 210 in the first row 600 due to the larger surrounding metal area. Similarly, the metal islands 606 of the patterned substrate metallization 204 to which the second row 604 of first power transistor dies 210 are attached have wider portions 606_1 to which at least three middle (inner) ones of the first power transistor dies 210 are attached, and narrower portions 606_2 to which at least three end (outer) ones of the first power transistor dies 210 are attached.

[0052] 8 , the first one or more conductors 228_1 connect the source / emitter pads 224 of each of the at least three middle first power transistor dies 210 in the first column 600 to a fourth metal island 222 of the patterned substrate metallization 204. The second one or more conductors 228_2 connect the source / emitter pads 224 of each of the at least three end first power transistor dies 210 in the first column 600 to the fourth metal island 222. The first one or more conductors 228_1 are longer (and therefore more resistive) than the second one or more conductors 228_2 because the metal island 602 to which the first column 600 of first power transistor dies 210 are attached has a wider middle portion 602_1 and a narrower end portion 602_2. This means that current sharing among the first power transistor dies 210 in the first column 600 is slightly asymmetric. Each of the at least three middle first power transistor dies 210 in the first row 600 has a lower current and therefore dissipates less heat (i.e., lower power loss), and therefore has better cooling to avoid thermal hot spots in each middle die 210 in the first row 600. A sensor function provided by one of the end dies 210 in the first row 600 measures the accurate temperature for the corresponding topological switch 106.

[0053] Similarly, the first one or more conductors 258_1 connect the source / emitter pads 254 of each of the at least three middle ones of the first power transistor dies 210 in the second column 604 to the first metal island 216 of the patterned substrate metallization 204. The second one or more conductors 258_2 connect the source / emitter pads 254 of each of the at least three end ones of the first power transistor dies 210 in the second column 604 to the first metal island 222. The first one or more conductors 258_1 are longer (and therefore more resistive) than the second one or more conductors 258_2 because the metal island 606 to which the second column 604 of the first power transistor dies 210 are attached has a wider middle portion 606_1 and a narrower end 606_2.

[0054] 9 illustrates a top view of power module 100 without module frame 200 according to another embodiment. In FIG. 9, second one or more source / emitter pads 254 of first power transistor die 210_2 are electrically connected to eighth metal island 248 of patterned substrate metallization 204 in place of first metal island 216. Similarly, second one or more source / emitter pads 256 of second power transistor die 212_2 are electrically connected to eighth metal island 248 of patterned substrate metallization 204 in place of first metal island 216.

[0055] 10 shows a top view of a multi-phase power electronics assembly 700 including multiple power modules 100. Each of the power modules 100 supports a different phase U, V, W of the multi-phase power electronics assembly 700. For example, the multi-phase power electronics assembly 700 may power a three-phase motor, with each of the power modules 100 energizing a different phase U, V, W of the motor. The power modules 100 may be mounted to a common base plate or coolant system 702.

[0056] Although the present disclosure is not so limited, the following numbered examples illustrate one or more aspects of the present disclosure.

[0057] Example 1. A power module comprising: a substrate including patterned metallization on an electrical insulator; a plurality of first power transistor dies of a first transistor type attached to the substrate; and a plurality of second power transistor dies of a second transistor type different from the first transistor type attached to the substrate, wherein a first one or more of the first power transistor dies and a first one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a first topological switch, a second one or more of the first power transistor dies and a second one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a second topological switch, and the first topological switch and the second topological switch are electrically connected in series via the patterned metallization.

[0058] Example 2. The power module of example 1, wherein the first one or more drain / collector pads of the first power transistor die and the first one or more drain / collector pads of the second power transistor die are attached to a first metal island of the patterned metallization, the second one or more drain / collector pads of the first power transistor die are attached to a second metal island of the patterned metallization, and the second one or more drain / collector pads of the second power transistor die are attached to a third metal island of the patterned metallization, the second metal island and the third metal island forming a first DC terminal of the power module.

[0059] Example 3. The power module of example 2, wherein a fourth metal island of the patterned metallization forms a second DC terminal of the power module, the fourth metal island electrically connected to the first one or more source / emitter pads of the first power transistor die and the first one or more source / emitter pads of the second power transistor die.

[0060] Example 4. The power module of example 3, wherein a fourth metal island is interposed between the second metal island and the third metal island along the first edge of the substrate.

[0061] Example 5. The power module of example 4, wherein the first metal island extends between the second metal island and the third metal island in a direction toward a second end of the substrate opposite the first end.

[0062] Example 6. The power module of example 5, wherein the first metal island terminates at a second end of the substrate and forms an AC terminal of the power module.

[0063] Example 7. The power module of example 5, wherein the first metal island is connected by one or more electrical conductors to an additional metal island of the patterned metallization, the additional metal island terminating at a second end of the substrate.

[0064] Example 8. The power module of any one of Examples 3-7, wherein a fifth metal island of the patterned metallization is interposed between a sixth metal island and a seventh metal island of the patterned metallization, the fifth metal island being electrically connected to the first one or more source / emitter pads of the first power transistor die and the first one or more source / emitter pads of the second power transistor die, the sixth metal island being electrically connected to the first one or more gate pads of the first power transistor die, and the seventh metal island being electrically connected to the first one or more gate pads of the second power transistor die.

[0065] Example 9. The power module of Example 8, wherein the fifth metal island, the sixth metal island, and the seventh metal island are interposed between the first branch and the second branch of the fourth metal island, the first branch of the fourth metal island is connected to the first one or more source / emitter pads of the first power transistor die by one or more first conductors, and the second branch of the fourth metal island is connected to the first one or more source / emitter pads of the second power transistor die by one or more second conductors.

[0066] Example 10. The power module of example 8 or 9, wherein an eighth metal island of the patterned metallization is interposed between a ninth metal island and a tenth metal island of the patterned metallization, the eighth metal island being electrically connected to a second one or more source / emitter pads of the first power transistor die and a second one or more source / emitter pads of the second power transistor die, the ninth metal island being electrically connected to a second one or more gate pads of the first power transistor die, and the tenth metal island being electrically connected to a second one or more gate pads of the second power transistor die.

[0067] Example 11. The power module of Example 10, wherein the eighth metal island, the ninth metal island, and the tenth metal island are interposed between the first branch and the second branch of the first metal island, the first branch of the first metal island being connected to the second one or more source / emitter pads of the first power transistor die by one or more first conductors, and the second branch of the first metal island being connected to the second one or more source / emitter pads of the second power transistor die by one or more second conductors.

[0068] Example 12. The power module of any one of Examples 1-11, wherein the first one or more of the first power transistor dies and the second one or more of the first power transistor dies are arranged diagonally relative to one another on the substrate, and the first one or more of the second power transistor dies and the second one or more of the second power transistor dies are arranged diagonally relative to one another on the substrate.

[0069] Example 13. The power module of any one of Examples 1-12, wherein a metal island of the patterned metallization electrically connected to the source / emitter pads of the first one or more of the first power transistor dies and the first one or more of the second power transistor dies is interposed between a metal island of the patterned metallization electrically connected to the sense pad of a single one of the first one or more of the first power transistor dies and a metal island of the patterned metallization electrically connected to the first one or more gate pads of the first power transistor dies, and a metal island of the patterned metallization electrically connected to the source / emitter pads of the first one or more of the first power transistor dies and the first one or more of the second power transistor dies is interposed between a metal island of the patterned metallization electrically connected to the sense pad of a single one of the first one or more of the second power transistor dies and a metal island of the patterned metallization electrically connected to the sense pad of a single one of the first one or more of the second power transistor dies.

[0070] Example 14. The power module of example 13, wherein the single sensor pin is attached to a metal island of the patterned metallization electrically connected to a sense pad of a single one of the first one or more of the first power transistor dies, and the single sensor pin is attached to a metal island of the patterned metallization electrically connected to a sense pad of a single one of the first one or more of the second power transistor dies.

[0071] Example 15. The power module of any one of Examples 1-14, wherein the metal island of the patterned metallization electrically connected to the source / emitter pads of a second one or more of the first power transistor dies and the second one or more of the second power transistor dies is interposed between the metal island of the patterned metallization electrically connected to the sense pad of a single one of the second one or more of the first power transistor dies and the metal island of the patterned metallization electrically connected to the second one or more gate pads of the first power transistor die, and the metal island of the patterned metallization electrically connected to the source / emitter pads of the second one or more of the first power transistor dies and the second one or more of the second power transistor dies is interposed between the metal island of the patterned metallization electrically connected to the sense pad of a single one of the second one or more of the second power transistor dies and the metal island of the patterned metallization electrically connected to the sense pad of a single one of the second one or more of the second power transistor dies.

[0072] Example 16. The power module of example 15, wherein the single sensor pin is attached to a metal island of the patterned metallization electrically connected to a sense pad of a single one of the second one or more of the first power transistor dies, and the single sensor pin is attached to a metal island of the patterned metallization electrically connected to a sense pad of a single one of the second one or more of the second power transistor dies.

[0073] Example 17. The power module of any one of Examples 1 to 16, wherein the first power transistor die is a SiC MOSFET die, the second power transistor die is a Si IGBT die, and the diode die is electrically connected in anti-parallel with each Si IGBT die.

[0074] Example 18. The power module of any one of Examples 1-16, wherein the first power transistor die is a SiC MOSFET die and the second power transistor die is a Si reverse conducting IGBT die.

[0075] Example 19. The power module of any one of Examples 1-16, wherein the first power transistor die is a Si MOSFET die and the second power transistor die is a Si IGBT die.

[0076] Example 20. The power module of any one of Examples 1-16, wherein the first power transistor die is a Si IGBT die and the second power transistor die is a Si reverse conducting IGBT die.

[0077] Example 21. The power module of any one of Examples 1-20, wherein the first one or more of the first power transistor dies comprises at least three of the first power transistor dies arranged in a row on the same metal island of the patterned metallization, and wherein a portion of the metal island to which each middle one of the at least three of the first power transistor dies is attached is wider than each portion of the metal island to which the at least three end ones of the first power transistor dies are attached.

[0078] Example 22. A power module according to any one of Examples 1 to 21, wherein the first one or more conductors connect a source / emitter pad of each of a middle one of the at least three of the first power transistor dies to an additional metal island of the patterned metallization, and the second one or more conductors connect a source / emitter pad of each of an end one of the at least three of the first power transistor dies to the additional metal island, and the first one or more conductors are longer than the second one or more conductors.

[0079] Example 23. The power module of any one of Examples 1-22, wherein the second one or more of the first power transistor dies comprises at least three of the first power transistor dies arranged in a row on the same metal island of the patterned metallization, and wherein a portion of the metal island to which each middle one of the at least three of the first power transistor dies is attached is wider than each portion of the metal island to which the at least three end ones of the first power transistor dies are attached.

[0080] Example 24. A power module described in any one of Examples 1 to 23, wherein the first one or more conductors connect the source / emitter pads of each middle one of the at least three of the first power transistor dies to an additional metal island of the patterned metallization, and the second one or more conductors connect the source / emitter pads of each end one of the at least three of the first power transistor dies to the additional metal island, and the first one or more conductors are longer than the second one or more conductors.

[0081] Example 25. The power module of any one of Examples 1-24, wherein the first one or more drain / collector pads of the first power transistor die and the first one or more drain / collector pads of the second power transistor die are attached to a first metal island of the patterned metallization, the first one or more source / emitter pads of the first power transistor die and the first one or more source / emitter pads of the second power transistor die are electrically connected to a second metal island of the patterned metallization, and a third metal island of the patterned metallization is electrically connected to the first one or more source / emitter pads of the first power transistor die and the first one or more source / emitter pads of the second power transistor die, and a load current path of the power module includes the first and second metal islands but excludes the third metal island.

[0082] Example 26. A multi-phase power electronics assembly comprising a plurality of power modules, each power module comprising: a substrate supporting a different phase and including patterned metallization on an electrical insulator; a plurality of first power transistor dies of a first transistor type attached to the substrate; and a plurality of second power transistor dies of a second transistor type different from the first transistor type attached to the substrate, wherein a first one or more of the first power transistor dies and a first one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a first topological switch, and a second one or more of the first power transistor dies and a second one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a second topological switch, and the first topological switch and the second topological switch are electrically connected in series via the patterned metallization to enable a load current path for a phase supported by the power module.

[0083] Example 27. A power module comprising: a substrate including patterned metallization on an electrical insulator; a first power transistor die having a drain / collector pad attached to a first metal island of the patterned metallization; and a second power transistor die having a drain / collector pad attached to the first metal island of the patterned metallization, wherein the second metal island of the patterned metallization is electrically connected to source / emitter pads on both sides of the first power transistor die and the second power transistor die facing outward from the substrate; and a third metal island of the patterned metallization is electrically connected to the source / emitter pads of the first power transistor die and the second power transistor die, and a load current path of the power module includes the first and second metal islands but excludes the third metal island.

[0084] Terms such as "first," "second," etc. are used to describe various elements, regions, sections, etc., and are not intended to be limiting. Like numbers refer to like elements throughout the description.

[0085] As used herein, terms such as "having," "containing," "including," "comprising," and the like are open-ended terms indicating the presence of stated elements or features, but do not exclude additional elements or features. The articles "a," "an," and "the" are intended to include the plural as well as the singular unless the context clearly dictates otherwise.

[0086] The term "and / or" should be interpreted to cover all possible conjunctive and disjunctive combinations unless otherwise specified. For example, the term "A and / or B" should be interpreted to mean A only, B only, or both A and B. The term "at least one of" should be interpreted the same as "and / or" unless otherwise specified. For example, the term "at least one of A and B" should be interpreted to mean A only, B only, or both A and B.

[0087] It should be understood that the features of the various embodiments described herein may be combined with each other unless otherwise stated.

[0088] While specific embodiments have been illustrated and described herein, those skilled in the art will recognize that various alternative and / or equivalent implementations may be substituted for the specific embodiments illustrated and described without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Accordingly, it is intended that the present invention be limited only by the claims and equivalents thereof.

Claims

1. A power module, a substrate including patterned metallization on an electrical insulator; a plurality of first power transistor dies of a first transistor type attached to the substrate; a plurality of second power transistor dies of a second transistor type different from the first transistor type attached to the substrate; a first one or more of the first power transistor dies and a first one or more of the second power transistor dies electrically connected in parallel via the patterned metallization to form a first topological switch; a second one or more of the first power transistor dies and a second one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a second topological switch; the first topological switch and the second topological switch are electrically connected in series via the patterned metallization. Power module.

2. the first one or more drain / collector pads of the first power transistor die and the first one or more drain / collector pads of the second power transistor die are attached to first metal islands of the patterned metallization; the second one or more drain / collector pads of the first power transistor die are attached to a second metal island of the patterned metallization; the second one or more drain / collector pads of the second power transistor die are attached to a third metal island of the patterned metallization; The power module of claim 1 , wherein the second metal island and the third metal island form a first DC terminal of the power module.

3. 3. The power module of claim 2, wherein a fourth metal island of the patterned metallization forms a second DC terminal of the power module, the fourth metal island being electrically connected to the first one or more source / emitter pads of the first power transistor die and the first one or more source / emitter pads of the second power transistor die.

4. 4. The power module of claim 3, wherein along a first edge of the substrate, the fourth metal island is interposed between the second metal island and the third metal island.

5. 5. The power module of claim 4, wherein the first metal island extends between the second metal island and the third metal island in a direction toward a second end of the substrate opposite the first end.

6. The power module of claim 5 , wherein the first metal island terminates at the second end of the substrate and forms an AC terminal for the power module.

7. 6. The power module of claim 5, wherein the first metal island is connected by one or more electrical conductors to additional metal islands of the patterned metallization, the additional metal islands terminating at the second end of the substrate.

8. a fifth metal island of the patterned metallization is interposed between a sixth metal island and a seventh metal island of the patterned metallization; the fifth metal island is electrically connected to the source / emitter pads of the first one or more of the first power transistor die and the first one or more of the second power transistor die; the sixth metal island is electrically connected to the first one or more gate pads of the first power transistor die; 4. The power module of claim 3, wherein the seventh metal island is electrically connected to the first one or more gate pads of the second power transistor die.

9. the fifth metal island, the sixth metal island, and the seventh metal island are interposed between a first branch and a second branch of the fourth metal island; the first branch of the fourth metal island is connected to the first one or more source / emitter pads of the first power transistor die by one or more first conductors; 9. The power module of claim 8, wherein the second branch of the fourth metal island is connected to the first one or more source / emitter pads of the second power transistor die by one or more second conductors.

10. an eighth metal island of the patterned metallization is interposed between a ninth metal island and a tenth metal island of the patterned metallization; the eighth metal island is electrically connected to the second one or more source / emitter pads of the first power transistor die and the second one or more source / emitter pads of the second power transistor die; the ninth metal island is electrically connected to the second one or more gate pads of the first power transistor die; 9. The power module of claim 8, wherein the tenth metal island is electrically connected to the second one or more gate pads of the second power transistor die.

11. the eighth metal island, the ninth metal island, and the tenth metal island are interposed between a first branch and a second branch of the first metal island; the first branch of the first metal island is connected to the second one or more source / emitter pads of the first power transistor die by one or more first conductors; 11. The power module of claim 10, wherein the second branch of the first metal island is connected to the second one or more source / emitter pads of the second power transistor die by one or more second conductors.

12. 2. The power module of claim 1, wherein the first one or more of the first power transistor dies and the second one or more of the first power transistor dies are disposed diagonally relative to one another on the substrate, and the first one or more of the second power transistor dies and the second one or more of the second power transistor dies are disposed diagonally relative to one another on the substrate.

13. a metal island of the patterned metallization electrically connected to the source / emitter pads of the first one or more of the first power transistor die and the first one or more of the second power transistor die is interposed between a metal island of the patterned metallization electrically connected to a sense pad of a single one of the first one or more of the first power transistor die and a metal island of the patterned metallization electrically connected to the first one or more gate pads of the first power transistor die; 2. The power module of claim 1 , wherein the metal island of the patterned metallization electrically connected to the source / emitter pads of the first one or more of the first power transistor die and the first one or more of the second power transistor dies is interposed between the metal island of the patterned metallization electrically connected to a sense pad of a single one of the first one or more of the second power transistor dies and the metal island of the patterned metallization electrically connected to the first one or more gate pads of the second power transistor die.

14. 14. The power module of claim 13, wherein a single sensor pin is attached to the metal island of the patterned metallization that is electrically connected to the sense pad of the single one of the first one or more of the first power transistor dies, and a single sensor pin is attached to the metal island of the patterned metallization that is electrically connected to the sense pad of the single one of the first one or more of the second power transistor dies.

15. the metal island of the patterned metallization electrically connected to the source / emitter pads of the second one or more of the first power transistor die and the second one or more of the second power transistor die is interposed between the metal island of the patterned metallization electrically connected to a sense pad of a single one of the second one or more of the first power transistor die and the metal island of the patterned metallization electrically connected to the second one or more gate pads of the first power transistor die; 2. The power module of claim 1 , wherein the metal island of the patterned metallization electrically connected to the source / emitter pads of the second one or more of the first power transistor die and the second one or more of the second power transistor die is interposed between the metal island of the patterned metallization electrically connected to a sense pad of a single one of the second one or more of the second power transistor die and the metal island of the patterned metallization electrically connected to the second one or more gate pads of the second power transistor die.

16. 16. The power module of claim 15, wherein a single sensor pin is attached to the metal island of the patterned metallization that is electrically connected to the sense pad of the single one of the second one or more of the first power transistor dies, and a single sensor pin is attached to the metal island of the patterned metallization that is electrically connected to the sense pad of the single one of the second one or more of the second power transistor dies.

17. 2. The power module of claim 1, wherein the first power transistor die is a SiC MOSFET die, the second power transistor die is a Si IGBT die, and a diode die is electrically connected in anti-parallel with each Si IGBT die.

18. 2. The power module of claim 1, wherein the first power transistor die is a SiC MOSFET die and the second power transistor die is a Si reverse conducting IGBT die.

19. 2. The power module of claim 1, wherein the first power transistor die is a Si MOSFET die and the second power transistor die is a Si IGBT die.

20. 2. The power module of claim 1, wherein the first power transistor die is a Si IGBT die and the second power transistor die is a Si reverse conducting IGBT die.

21. the first one or more of the first power transistor dies comprising at least three of the first power transistor dies arranged in a row on the same metal island of the patterned metallization; 2. The power module of claim 1, wherein a portion of the metal island to which each middle one of the at least three first power transistor dies is attached is wider than a portion of the metal island to which an end one of the at least three first power transistor dies is attached.

22. a first one or more electrical conductors connecting a source / emitter pad of each middle one of the at least three of the first power transistor dies to an additional metal island of the patterned metallization; a second one or more conductors connecting a source / emitter pad of each end one of the at least three first power transistor dies to the additional metal island; The power module of claim 1 , wherein the first one or more electrical conductors are longer than the second one or more electrical conductors.

23. the second one or more of the first power transistor dies comprising at least three of the first power transistor dies arranged in a row on the same metal island of the patterned metallization; 2. The power module of claim 1, wherein a portion of the metal island to which each middle one of the at least three first power transistor dies is attached is wider than a portion of the metal island to which an end one of the at least three first power transistor dies is attached.

24. a first one or more electrical conductors connecting a source / emitter pad of each middle one of the at least three of the first power transistor dies to an additional metal island of the patterned metallization; a second one or more conductors connecting a source / emitter pad of each end one of the at least three first power transistor dies to the additional metal island; The power module of claim 1 , wherein the first one or more electrical conductors are longer than the second one or more electrical conductors.

25. the first one or more drain / collector pads of the first power transistor die and the first one or more drain / collector pads of the second power transistor die are attached to first metal islands of the patterned metallization; the first one or more source / emitter pads of the first power transistor die and the first one or more source / emitter pads of the second power transistor die are electrically connected to a second metal island of the patterned metallization; a third metal island of the patterned metallization electrically connected to the source / emitter pads of the first one or more of the first power transistor die and the first one or more of the second power transistor die; 2. The power module of claim 1, wherein a load current path of the power module includes the first and second metal islands but excludes the third metal island.

26. 1. A multi-phase power electronics assembly comprising a plurality of power modules, each of said power modules supporting a different phase; and a substrate including patterned metallization on an electrical insulator; a plurality of first power transistor dies of a first transistor type attached to the substrate; a plurality of second power transistor dies of a second transistor type different from the first transistor type attached to the substrate; a first one or more of the first power transistor dies and a first one or more of the second power transistor dies electrically connected in parallel via the patterned metallization to form a first topological switch; a second one or more of the first power transistor dies and a second one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a second topological switch; the first topological switch and the second topological switch are electrically connected in series via the patterned metallization to enable a load current path for the phase supported by the power module. Polyphase power electronics assembly.

27. A power module, a substrate including patterned metallization on an electrical insulator; a first power transistor die having a drain / collector pad attached to a first metal island of the patterned metallization; a second power transistor die having a drain / collector pad attached to the first metal island of the patterned metallization; a second metal island of the patterned metallization electrically connected to source / emitter pads on both sides of the first power transistor die and the second power transistor die facing outward from the substrate; a third metal island of the patterned metallization electrically connected to the source / emitter pads of the first power transistor die and the second power transistor die; A power module, wherein a load current path of the power module includes the first and second metal islands but excludes the third metal island.

Images