Wiring board and electronic equipment
The wiring board design addresses the issue of large planar space requirements by using a dual-base structure with recessed electrodes, enhancing manufacturability and strength while minimizing device size.
Patent Information
- Application Number
- JP2024045616
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-21
- Publication Date
- 2025-10-03
AI Technical Summary
Existing electronic devices with imaging elements and multiple components mounted on a substrate require large planar space due to the arrangement of electrodes, leading to increased device size.
A wiring board design featuring a first base with electrodes on the upper surface, a second base with electrodes on the lower surface and side surfaces, and third electrodes on recessed side surfaces, allowing for efficient electrical connections and reduced planar space usage.
The design improves manufacturability and strength while reducing the size of the wiring board and electronic device by optimizing electrode placement and utilization of recessed side surfaces.
Smart Images

Figure 2025145438000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a wiring board and an electronic device. [Background technology]
[0002] For example, as shown in Patent Document 1, an electronic device equipped with an imaging element (referred to as an imaging module in Patent Document 1) is known. The electronic device according to this prior art includes a substrate (referred to as an imaging element mounting substrate in Patent Document 1), which includes a base (referred to as a substrate in Patent Document 1). The imaging element is mounted on the top surface of the base, and multiple electronic components are mounted around the imaging element on the top surface of the base. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] International Publication No. 2019 / 082923 Summary of the Invention [Problem to be solved by the invention]
[0004] In the electronic device according to the prior art, as described above, an imaging element and multiple electronic components are mounted on the upper surface of a substrate. In other words, in the substrate according to the prior art, multiple electrodes for the imaging element for mounting the imaging element are located on the upper surface of the base, and multiple electrodes for the electronic components for mounting the multiple electronic components are located around the electrodes for the imaging element on the upper surface of the base. As a result, the electronic device and the substrate tend to be larger in size in a plan view, and the planar space required for mounting the electronic device and the substrate is larger. [Means for solving the problem]
[0005] The wiring board according to the present disclosure comprises a first base having a first upper surface, a first lower surface opposite the first upper surface, and four first side surfaces located between the first upper surface and the first lower surface; a second base having a second upper surface in contact with the first lower surface, a second lower surface opposite the second upper surface, and four second side surfaces located between the second upper surface and the second lower surface and corresponding to the four first side surfaces; a plurality of first electrodes located on the first upper surface, a plurality of second electrodes located on the second lower surface, and a plurality of third electrodes located on the second side surfaces; and among the four second side surfaces, portions of a pair of the second side surfaces extending along a first direction perpendicular to the height direction are located on the same plane as the corresponding first side surfaces, and at least one of the second side surfaces has an area located inside a plane including the corresponding first side surface, and the third electrode is located in the area.
[0006] The electronic device according to the present disclosure comprises a wiring board according to the present disclosure, a first element connected to the first electrode, a second element connected to the second electrode, and a third element connected to the third electrode. [Effects of the Invention]
[0007] According to the present disclosure, it is possible to improve the manufacturability and strength of the wiring board while saving the planar space required for mounting the wiring board. [Brief explanation of the drawings]
[0008] [Figure 1] 1 is a schematic perspective view of a wiring substrate according to a first embodiment, as viewed from above. [Figure 2] 2 is a schematic perspective view of the wiring board according to the first embodiment as viewed from below. FIG. [Figure 3] FIG. 2 is a schematic bottom view of the wiring board according to the first embodiment. [Figure 4] FIG. 4 is a schematic diagram illustrating a third electrode. [Figure 5] 1 is a schematic perspective view of an electronic device according to a first embodiment, as viewed from above. [Figure 6]1 is a schematic perspective view of the electronic device according to the first embodiment, as viewed from below. [Figure 7] FIG. 10 is a schematic perspective view of a wiring board according to a second embodiment, as viewed from above. [Figure 8] FIG. 10 is a schematic perspective view of the wiring board according to the second embodiment as viewed from below. [Figure 9] FIG. 10 is a schematic bottom view of the wiring board according to the second embodiment. [Figure 10] FIG. 11 is a schematic perspective view of a wiring board according to a third embodiment, as viewed from above. [Figure 11] FIG. 11 is a schematic perspective view of a wiring board according to a third embodiment, as viewed from below. [Figure 12] FIG. 10 is a schematic side view of a wiring board according to a third embodiment. [Figure 13] FIG. 11 is a schematic perspective view of an electronic device according to a third embodiment, as viewed from the side. DETAILED DESCRIPTION OF THE INVENTION
[0009] Hereinafter, wiring boards and electronic devices according to embodiments will be described in detail with reference to the drawings. However, for the sake of convenience, the drawings referred to below show simplified views of only the components necessary for explaining the embodiments. Therefore, wiring boards and electronic devices according to embodiments may include any components not shown in the drawings referred to. The dimensions of the components in the drawings do not necessarily faithfully represent the actual dimensions of the components and the dimensional ratios of each member.
[0010] In the specification and claims of this application, the term "first direction" refers to the width direction of the wiring board, in other words, a direction perpendicular to the height direction of the wiring board. The height direction is the up-down direction of the wiring board. Hereinafter, the first direction will be referred to as the width direction for convenience. The term "second direction" refers to the direction perpendicular to the height direction and the first direction. Hereinafter, the second direction will be referred to as the length direction for convenience. The term "rectangular" is not limited to a strict rectangular shape, but includes a shape that can be visually recognized as a rectangle overall, even if the corners are curved. The term "inside" refers to the side inside the outer surface of the wiring board. In the drawings, "WD" refers to the width direction, "LD" refers to the length direction, "UD" refers to the top direction, and "DD" refers to the bottom direction.
[0011] A wiring board 1 and an electronic device 100 according to a first embodiment will be described with reference to FIGS. 1 to 6. FIG. 1 is a schematic perspective view of the wiring board 1 according to the first embodiment, as seen from above. FIG. 2 is a schematic perspective view of the wiring board 1 according to the first embodiment, as seen from below. FIG. 3 is a schematic bottom view of the wiring board 1 according to the first embodiment. IV A in FIG. 4 is a schematic view showing a third electrode 6 spanning three insulating layers 31, and is a schematic view showing an enlarged view of the insulating layers 31 and the third electrode 6 in a recess 32, which will be described later. IV B in FIG. 4 is a cross-sectional view taken along line AA in IVA in FIG. 4. FIG. 5 is a schematic perspective view of the electronic device 100 according to the first embodiment, as seen from above. FIG. 6 is a schematic perspective view of the electronic device 100 according to the first embodiment, as seen from below.
[0012] As shown in the example of FIGS. 1 and 2, the wiring board 1 according to the first embodiment may include a first base 2 that is rectangular in plan view. The first base 2 may include a plurality of insulating layers stacked in the height direction. Specifically, as shown in FIGS. 1 and 2, the first base 2 may be composed of two insulating layers 21. The first base 2 may be composed of a plurality of insulating layers 21 other than two, or a single insulating layer 21. The insulating layer 21 may be made of insulating ceramics such as an aluminum oxide sintered body (alumina ceramics), an aluminum nitride sintered body, a mullite sintered body, or a glass ceramic sintered body.
[0013] In the present disclosure, the "height direction" and the "up-down direction" may be directions along the stacking direction of the wiring board 1, as in the wiring board 1 of the first embodiment. The "width direction" may be a direction along one direction in which the insulating layer 21 of the wiring board 1 extends, and may be, for example, a left-right direction when facing the front of the wiring board 1. The "length direction" may be a direction along one direction in which the insulating layer 21 of the wiring board 1 extends and may be a direction that intersects with the "width direction," and may be, for example, a direction connecting the front side and the back side of the wiring board 1.
[0014] The first substrate 2 may have a first upper surface 2u, a first lower surface 2d located opposite the first upper surface 2u, and four first side surfaces 2s located between the first upper surface 2u and the first lower surface 2d. The first upper surface 2u and the first lower surface 2d of the first substrate 2 may be parallel, and the first side surface 2s of the first substrate 2 may be perpendicular to the first upper surface 2u and the first lower surface 2d. Two of the first side surfaces 2s of the first substrate 2 may be parallel to the width direction WD, and the remaining two first side surfaces 2s of the first substrate 2 may be parallel to the length direction LD. In the present disclosure, "parallel" may include a state in which the two directions are strictly parallel, as well as a state in which the two directions are generally parallel. For example, "generally parallel" may include a state in which the angle between the two directions is 5 degrees or less, a state in which the angle between the two directions is 10 degrees or less, or a state in which the angle between the two directions is 15 degrees or less. Also, in the present disclosure, even when two surfaces are curved, the two surfaces may be considered to be parallel if the tangent direction of either of the two surfaces is "substantially parallel."
[0015] The wiring board 1 may include a second base 3 that is H-shaped in bottom view and located below the first base 2. The second base 3 may include a plurality of insulating layers 31, 10 or more layers stacked in the height direction. The second base 3 may also include a plurality of insulating layers 31, 9 or less layers. The insulating layers 31 may include the same insulating ceramic as the insulating layer 21.
[0016] The second substrate 3 may have a second upper surface 3u in contact with the first lower surface 2d of the first substrate 2, a second lower surface 3d located on the opposite side of the second upper surface 3u, and four second side surfaces 3s located between the second upper surface 3u and the second lower surface 3d and corresponding to the four first side surfaces 2s, respectively. The corresponding first side surfaces 2s and second side surfaces 3s refer to first side surfaces 2s and second side surfaces 3s facing in the same direction. The second upper surface 3u and second lower surface 3d of the second substrate 3 may be parallel, and the second side surfaces 3s of the second substrate 3 may be perpendicular to the second upper surface 3u and second lower surface 3d. Two second side surfaces 3s of the second substrate 3 may be parallel to the width direction WD, and the remaining two second side surfaces 3s of the second substrate 3 may be parallel to the length direction LD.
[0017] As shown in Figures 1 to 3, a pair of second side surfaces 3s extending along the width direction WD may have a portion of each second side surface 3s located on the same plane as the corresponding first side surface 2s. Furthermore, at least one second side surface 3s may have a region F located inside a plane including the corresponding first side surface 2s. The outer edge of the second base 3 may overlap with or be located inside the outer edge of the first base 2 in a bottom view. In the present disclosure, a bottom view may refer to a planar view or a see-through view of an object from one of the up and down directions.
[0018] 1 to 3, the second side surface 3s extending along the longitudinal direction LD may have a region F located entirely inside a plane including the corresponding first side surface 2s. In other words, the entire second side surface 3s extending along the longitudinal direction LD may be located entirely inside a plane including the corresponding first side surface 2s. "Inside the plane" means being closer to the inside of the wiring board than the plane.
[0019] 1 to 3, at least one of the second side surfaces 3s may have a recess 32 recessed inward from a plane including the corresponding first side surface 2s. Furthermore, in the second side surface 3s having the recess 32, a region F located inward from a plane including the corresponding first side surface 2s may be the inner surface of the recess 32. For example, a pair of second side surfaces 3s parallel to the width direction WD of the second base 3 may have the recess 32 recessed inward from a plane including the corresponding first side surface 2s.
[0020] As shown in the examples of FIGS. 1 to 3, each second side surface 3s of the second substrate 3 may have a region F. The surface roughness of the region F of the second substrate 3 may be greater than the surface roughness of the second side surface 3s located on the same plane as the first side surface 2s. The surface roughness (arithmetic mean roughness (Ra)) of the region F of the second substrate 3 may be, for example, 1.5 μm or more and 7.0 μm or less, or even 1.7 μm or more and 6.0 μm or less. The surface roughness of the second side surface 3s of the second substrate 3 located on the same plane as the first side surface 2s of the first substrate 2 may be, for example, 0.1 μm or more and 1.5 μm or less, or even 0.6 μm or more and 1.0 μm or less. In FIGS. 1, 2, IV A of FIG. 4, 5, and 6, the region F is indicated by dotted hatching.
[0021] As shown in the examples of FIGS. 1 and 2, a plurality of first electrodes 4 may be positioned on the first upper surface 2u of the first substrate 2 for electrical connection to the imaging element 110 (see FIGS. 5 and 6) serving as the first element. The plurality of first electrodes 4 may be printed on the first upper surface 2u of the first substrate 2 and formed by firing. The plurality of first electrodes 4 may be arranged at intervals in the width direction WD and the length direction LD, and the arrangement pattern of the plurality of first electrodes 4 may be changed as appropriate. Each of the first electrodes 4 may be made of a metal powder metallization containing, for example, tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), copper (Cu), or the like.
[0022] As in the examples shown in FIGS. 1 to 3, a plurality of second electrodes 5 may be located on the second lower surface 3d of the second substrate 3 for electrically connecting to a capacitor 120 (see FIG. 6) as a second element. The plurality of second electrodes 5 may be printed on the second lower surface 3d of the second substrate 3 and formed by firing. The plurality of second electrodes 5 may be arranged at intervals in the width direction WD and the length direction LD, and the arrangement pattern of the plurality of second electrodes 5 may be changed as appropriate. Each second electrode 5 may use the same metal powder metallization as the first electrode 4.
[0023] As shown in the examples IVA and IVB in FIGS. 1 and 2, and 4A and 4B, a plurality of third electrodes 6 for electrically connecting to a cable 130 or a capacitor 140 (see FIGS. 5 and 6) serving as a third element may be located in the region F of the second side surface 3s of the second base 3. In the region F of the second side surface 3s having the recess 32, the plurality of third electrodes 6 may be located on a surface extending in the stacking direction of the insulating layer 31. Alternatively, the plurality of third electrodes 6 may be located on the bottom surface of the recess 32, in other words, on a surface parallel to the corresponding first side surface 2s. In each region F, the plurality of third electrodes 6 may include third electrodes 6 located at different heights. In other words, in each region F, one third electrode 6 may be located at a different height from another third electrode 6.
[0024] Furthermore, any of the third electrodes 6 may extend across three or more insulating layers 31, as shown in FIG. 4A. The side of any of the third electrodes 6 may include a side 6s extending in the height direction, and the side 6s may be distorted relative to the height direction. In other words, the side 6s of the third electrode 6 extending in the stacking direction may not be straight and may have a step. As shown in FIG. 4, the multiple third electrodes 6 may include via conductors that extend through at least one insulating layer 31 and protrude from the second side surface 3s, which is the surface of the second substrate 3. As shown in FIG. 4, the via conductor included in the third electrode 6 extends across multiple layers in the stacking direction. The via conductor included in the third electrode 6 may be split in half. The same metal powder metallization as that of the first electrode 4 may be used for each of the third electrodes 6.
[0025] 1, 2, 5, and 6, a plurality of third electrodes 6 for electrical connection to the cable 130 may be electrically connected to the corresponding first electrodes 4 or second electrodes 5 by internal wiring. Any of the third electrodes 6 for electrical connection to the cable 130 may be electrically connected to the third electrode 6 for electrical connection to the capacitor 140 by internal wiring. This allows signals to be input to and output from the imaging element 110, and power to be supplied to the imaging element 110.
[0026] As in the example shown in FIGS. 1 and 2, when the first substrate 2 and the second substrate 3 are made of, for example, an aluminum oxide sintered body, the first substrate 2 and the second substrate 3 are manufactured as follows.
[0027] A slurry is produced by adding an appropriate organic binder and solvent to raw material powders such as aluminum oxide and silicon oxide. This slurry is formed into sheets using a doctor blade method, a calendar roll method, or the like to produce ceramic green sheets for the insulating layer 21 and the insulating layer 31. Subsequently, as needed, multiple ceramic green sheets for the insulating layer 21 are stacked to produce a laminate for the first substrate 2. Multiple ceramic green sheets for the insulating layer 31 are stacked to produce a laminate for the second substrate 3. Region F of the second substrate 3 is formed by punching with a die at the location of the ceramic green sheets for the insulating layer 31. The laminate for the first substrate 2 or a laminate of the ceramic green sheets for the insulating layer 31 and the laminate for the second substrate 3 is then fired at a high temperature (approximately 1300 to 1600°C) to form a sintered body. The sintered body is then sliced along the outer edge of the first substrate 2 to produce the first substrate 2 and the second substrate 3. As a method for cutting the sintered body, dicing may be used instead of slicing.
[0028] The first side surface 2s of the first substrate 2 and the second side surface 3s of the second substrate located on the same plane are formed by slicing a sintered body, etc. As a result, the surface roughness of the first side surface 2s and the second side surface 3s located on the same plane as the first side surface 2s is smaller than the surface roughness of a region F of the second side surface 3s located inside the plane including the first side surface 2s and formed by punching.
[0029] As in the example shown in FIGS. 1 and 2, when the first electrode 4, the second electrode 5, and the third electrode 6 are metallized layers containing, for example, tungsten, they can be formed as follows.
[0030] The first electrode 4 is formed by printing a metal paste, which is made by mixing tungsten powder with an organic solvent and an organic binder, onto a ceramic green sheet for the insulating layer 21 by a method such as screen printing, and then firing the laminate for the wiring board 1. The second electrode 5 is formed by printing a metal paste onto a ceramic green sheet for the insulating layer 31 by a method such as screen printing, and then firing the laminate for the wiring board 1. The third electrode 6 is formed by providing a hole for the third electrode 6 in the ceramic green sheet for the insulating layer 31, filling the hole with the metal paste, and then firing the laminate for the wiring board 1.
[0031] 1 and 2, the surfaces of the first electrode 4, the second electrode 5, and the third electrode 6 that are exposed to the outside may be coated with a nickel plating layer / gold plating layer as a metal plating layer by a plating method such as electrolytic plating or electroless plating. This can effectively reduce corrosion of the first electrode 4, etc. The metal plating layer is not limited to a nickel plating layer / gold plating layer, and may be other metal plating layers including a nickel plating layer / palladium plating layer / gold plating layer, etc.
[0032] 5 and 6, the electronic device 100 may include a wiring board 1 and an imaging element 110 as a first element mounted on the first upper surface 2u side of the first base 2. Each electrode of the imaging element 110 is electrically connected to a corresponding first electrode 4 by solder or a conductive adhesive. The imaging element 110 is one of electronic components, such as a CMOS (Complementary Metal Oxide Semiconductor) or a CCD (Charge Coupled Device), which converts an optical image formed on an imaging surface into an electrical signal and outputs it.
[0033] As shown in the example of FIG. 6 , the electronic device 100 may include a plurality of capacitors 120 as second elements mounted on the second lower surface 3 d of the second base 3, and the capacitor 120 is one of the electronic components. The electrodes of each of the plurality of capacitors 120 may be electrically connected to the corresponding second electrode 5 by solder or a conductive adhesive. Instead of any of the plurality of capacitors 120, another electronic component such as a resistor may be mounted on the second lower surface 3 d of the second base 3. The electronic device 100 may include a ground terminal electrically connected to a central second electrode 5 of the plurality of second electrodes 5. The electronic device 100 may include a heat sink thermally connected to the central second electrode 5 of the plurality of second electrodes 5.
[0034] As in the examples shown in FIGS. 5 and 6 , the electronic device 100 may include a plurality of cables 130 as a plurality of third elements mounted in the region F of the second base 3. Each cable 130 may be electrically connected to a corresponding third electrode 6 of the wiring board 1 by solder or a conductive adhesive. The electronic device 100 may include a plurality of capacitors 140 as a plurality of third elements mounted in the region F of the second base 3. Each electrode of the plurality of capacitors 140 may be electrically connected to a corresponding third electrode 6 of the wiring board 1 by solder or a conductive adhesive. Instead of any of the plurality of capacitors 140, another electronic component such as a resistor may be mounted in the region F of the second base 3.
[0035] When the cable 130 and the capacitor 140 are mounted in the same region F of the second base 3, by positioning the cable 130 on the second lower surface 3d side of the second base 3, the cable 130 does not need to detour around the capacitor 140, and the wiring structure of the cable 130 is simplified.
[0036] As shown in the example of FIG. 3 , in the configuration of the wiring board 1 according to the first embodiment, at least one second side surface 3s has a region F located inside a plane including the corresponding first side surface 2s, and multiple third electrodes are located in the region F. As a result, when a third element is disposed on the second side surface 3s of the wiring board 1 to form an electronic device, the electronic device can be made smaller in size in a planar view. Furthermore, even if the number of electrodes including the third electrode 6 is increased, the wiring board 1 can be made smaller in size in a planar view. In other words, even if the number of elements including the third element mounted on the wiring board 1 is increased, the wiring board 1 and the electronic device 100 can be made smaller in size in a planar view. As a result, the planar space required for mounting the wiring board 1 and the electronic device 100 can be saved.
[0037] 3, when the second side surface 3s extending along the length direction LD intersecting with the width direction WD has the region F over the entirety, it is possible to increase the number of third electrodes 6 that can be arranged on the second side surface 3s. Furthermore, even if the number of electrodes including the third electrodes 6 is increased, it is possible to reduce the size of the wiring board 1 in plan view.
[0038] 1 to 3, at least one second side surface 3s may have a recess 32 recessed inward from a plane including the corresponding first side surface 2s, and region F may be the inner surface of recess 32. In this case, the strength of wiring board 1 is increased, and even if the number of electrodes including third electrode 6 is increased, wiring board 1 can be made smaller in size in a plan view.
[0039] 1 and 2, when each second side surface 3s of the second base 3 has a region F, it is possible to further increase the number of electrodes including the third electrode 6. Furthermore, when one region F includes third electrodes 6 located at different heights, it is also possible to further increase the number of electrodes including the third electrode 6.
[0040] 3 , in the configuration of the wiring board 1 according to the first embodiment, among the four second side surfaces 3s, a pair of second side surfaces 3s extending along the width direction WD perpendicular to the height direction are partially located on the same plane as the corresponding first side surfaces 2s. This simplifies the alignment of the laminate for the first base 2 or the ceramic green sheet for the insulating layer 31 with the laminate for the second base 3, thereby improving the manufacturability of the wiring board 1 and the electronic device 100. Furthermore, the strength of the wiring board 1 can be increased compared to when all four second side surfaces 3s of the second base 3 are located inside the plane including the first side surfaces 2s of the first base 2.
[0041] According to the configuration of the wiring board 1 according to the first embodiment, the surface roughness of the region F of the second base 3 is greater than the surface roughness of the second side surface 3s of the second base 3, which is located on the same plane as the first side surface 2s of the first base 2. Therefore, when a capacitor 140 or the like serving as a third element is solder-mounted in the region F of the second base 3, the solder does not easily flow in the region F of the second base 3, thereby preventing short circuits between adjacent third electrodes 6. When a capacitor 140 or the like serving as a third element is mounted in the region F of the second base 3 using a conductive adhesive, the surface area of the region F of the second base 3 is increased, thereby increasing the mounting strength, for example, the adhesive strength, of the capacitor 140 or the like relative to the region F of the second base 3.
[0042] 4, if the third electrode 6 protrudes from the second side surface 3s of the second base 3, when a capacitor 140 or the like is solder-mounted as a third element in the region F of the second base 3, the capacitor 140 or the like can be reduced from floating up relative to the second base 3. This allows the electronic device 100 to be made smaller in plan view. If the third electrode 6 does not protrude from the surface of the second base 3, when a capacitor 140 or the like is solder-mounted in the region F of the second base 3, the amount of solder increases, and the capacitor 140 or the like will float up more relative to the second base 3.
[0043] As shown in the example in IVA of FIG. 4, at least one third electrode 6 includes a side edge 6s extending in the height direction, and the side edge 6s may be distorted relative to the height direction. In other words, the side edge 6s of any third electrode 6 may not be straight, but may be offset in the width direction WD or the length direction LD. In this case, when a capacitor 140 or the like serving as a third element is solder-mounted in the region F of the second base 3, the self-alignment function of the solder facilitates alignment of the solder mounting. This allows the capacitor 140 or the like to be easily mounted in the correct position on the wiring board 1, further improving the manufacturability of the electronic device 100.
[0044] A wiring board 1A according to a second embodiment of the present disclosure will be described with reference to Fig. 7 to Fig. 9. Fig. 7 is a schematic perspective view of the wiring board 1A according to the second embodiment as seen from above. Fig. 8 is a schematic perspective view of the wiring board 1A according to the second embodiment as seen from below. Fig. 9 is a schematic bottom view of the wiring board 1A according to the second embodiment.
[0045] 7 and 8, wiring board 1A according to embodiment 2 of the present disclosure has the same configuration as wiring board 1 according to embodiment 1, except for some components. Among the configurations of wiring board 1A, those components that differ from wiring board 1 according to embodiment 1 will be described. For ease of explanation, components that have the same functions as components described in the first embodiment will be denoted by the same reference numerals.
[0046] 9, a portion of a pair of second side surfaces 3s parallel to the width direction WD of the second base 3 may be located on the same plane as the corresponding first side surfaces 2s of the first base 2. Furthermore, at least a portion of a pair of second side surfaces 3s parallel to the length direction LD of the second base 3 may be located on the same plane as the first side surfaces 2s of the first base 2. The outer edge of the second base 3 may overlap the outer edge of the first base 2 or may be located inside the outer edge of the first base 2 in a bottom view.
[0047] As shown in the examples of FIGS. 7 to 9, each second side surface 3s of the second substrate 3 may have a recess 32 recessed inward from a plane including the corresponding first side surface 2s in a bottom view. In this case, a region F of the second side surface 3s located inside the plane including the corresponding first side surface 2s is the inner surface of the recess 32. The surface roughness of the region F of the second substrate 3 may be greater than the surface roughness of the second side surface 3s of the second substrate 3 located in the same plane as the first side surface 2s of the first substrate 2. The surface roughness (arithmetic mean roughness (Ra)) of the region F of the second substrate 3 may be, for example, 1.5 μm to 7.0 μm, or even 1.7 μm to 6.0 μm. The surface roughness of the second side surface 3s of the second substrate 3 located in the same plane as the first side surface 2s of the first substrate 2 may be, for example, 0.1 μm to 1.5 μm, or even 0.6 μm to 1.0 μm. 7 and 8, the area F is hatched with dots.
[0048] 7 to 9, in the configuration of the wiring board 1A according to the second embodiment, all second side surfaces 3s have a region F located inside a plane including the corresponding first side surface 2s. Furthermore, multiple third electrodes 6 are located in the region F of all second side surfaces 3s. Therefore, even if the number of electrodes including the third electrodes 6 is increased, the wiring board 1A can be made smaller in plan view. This allows for a reduction in the planar space required for mounting the wiring board 1A.
[0049] 9 , in the configuration of the wiring board 1A according to the second embodiment, a portion of all of the second side surfaces 3s is located on the same plane as the corresponding first side surfaces 2s of the first base 2. This simplifies the alignment of the laminate for the first base 2 or the ceramic green sheets for the insulating layer 31 with the laminate for the second base 3, thereby improving the manufacturability of the wiring board 1A. Furthermore, the strength of the wiring board 1 can be increased compared to when all four second side surfaces 3s of the second base 3 are located inside a plane including the first side surfaces 2s of the first base 2.
[0050] 7 and 8 , in the configuration of the wiring board 1A according to the second embodiment, the surface roughness of the region F of the second base 3 is greater than the surface roughness of the second side surface 3s of the second base 3, which is located on the same plane as the first side surface 2s of the first base 2. Therefore, when a capacitor 140 or the like serving as a third element is solder-mounted in the region F of the second base 3, the solder is less likely to flow in the region F of the second base 3, thereby preventing short circuits between adjacent third electrodes 6. When a capacitor 140 or the like serving as a third element is mounted in the region F of the second base 3 using a conductive adhesive, the surface area of the region F of the second base 3 is increased, thereby increasing the mounting strength, e.g., adhesion strength, of the capacitor 140 or the like to the region F of the second base 3.
[0051] Additionally, the wiring board 1A according to the second embodiment has the same effects as the wiring board 1 according to the first embodiment described above.
[0052] A wiring board 1B and an electronic device 100B according to a third embodiment of the present disclosure will be described with reference to Fig. 10 to Fig. 13. Fig. 10 is a schematic perspective view of the wiring board 1B according to the third embodiment, as seen from above. Fig. 11 is a schematic perspective view of the wiring board 1B according to the third embodiment, as seen from below. Fig. 12 is a schematic side view of the wiring board 1B according to the third embodiment. Fig. 13 is a schematic perspective view of the electronic device 100B according to the third embodiment, as seen from the side.
[0053] 10 and 11, wiring board 1B according to embodiment 3 of the present disclosure has the same configuration as wiring board 1 according to the first embodiment, except for some components. Among the configurations of wiring board 1B, those components that are different from wiring board 1 according to the first embodiment will be described. For ease of explanation, components that have the same functions as components described in the first embodiment will be denoted by the same reference numerals.
[0054] 10 and 11, wiring board 1B according to the third embodiment may include a first base 2 that is rectangular in plan view. Wiring board 1B may also include a second base 3 located below first base 2. First base 2 and second base 3 may each include a plurality of insulating layers stacked in the width direction WD.
[0055] In the present disclosure, the "height direction" and "vertical direction" may be directions intersecting or perpendicular to the stacking direction of wiring board 1, as in wiring board 1B of the third embodiment. The "width direction" may be the stacking direction of insulating layers of wiring board 1B, and may be, for example, the left-right direction when facing the front of wiring board 1. The "length direction" is a direction along one direction in which insulating layer 21 of wiring board 1 extends, and may also be a direction intersecting the "width direction," and may be, for example, a direction connecting the front side and the back side of wiring board 1.
[0056] 12, a portion of a pair of second side surfaces 3s parallel to the width direction WD of the second substrate 3 may be located on the same plane as the corresponding first side surfaces 2s. At least a portion of a pair of second side surfaces 3s parallel to the length direction LD of the second substrate 3 may be located on the same plane as the corresponding first side surfaces 2s of the first substrate 2. Furthermore, at least one second side surface 3s may have a region F located inside a plane including the corresponding first side surface 2s.
[0057] More specifically, as shown in the examples shown in FIGS. 10 to 12 , at least one of a pair of second side surfaces 3s parallel to the length direction LD of the second substrate 3 may have a region F located inside a plane including the corresponding first side surface 2s. Furthermore, at least one of a pair of second side surfaces 3s parallel to the width direction WD of the second substrate 3 may have a region F located inside a plane including the corresponding first side surface 2s. Furthermore, a lower region of at least one of the second side surfaces 3s parallel to the length direction LD may have a region F located inside a plane including the corresponding first side surface 2s over the entire length direction LD. In other words, at least one of the second side surfaces 3s parallel to the length direction LD may have a region located on the same plane as the plane including the corresponding first side surface 2s, and a region F located inside the plane including the corresponding first side surface 2s over the entire length direction LD. Furthermore, the second substrate 3 may have a second side surface 3s whose entire surface is located on the same plane as the corresponding first side surface 2s.
[0058] The surface roughness of region F of the second substrate 3 may be greater than the surface roughness of the second side surface 3s of the second substrate 3 located on the same plane as the first side surface 2s of the first substrate 2. The surface roughness (arithmetic mean roughness (Ra)) of region F of the second substrate 3 may be, for example, 1.5 μm or more and 7.0 μm or less, or even 1.7 μm or more and 6.0 μm or less. The surface roughness of the second side surface 3s of the second substrate 3 located on the same plane as the first side surface 2s of the first substrate 2 may be, for example, 0.1 μm or more and 1.5 μm or less, or even 0.6 μm or more and 1.0 μm or less. In Figures 10, 11, and 13, region F is indicated by dotted hatching.
[0059] 10, a plurality of first electrodes 4 for electrical connection with an imaging element 150 (see FIG. 13) serving as a first element may be located on the first upper surface 2u of the first base 2. A plurality of second electrodes 5 for electrical connection with a connector 160 (see FIG. 13) serving as a second element may be located on the second lower surface 3d of the second base 3.
[0060] 10 and 11, a plurality of third electrodes 6 for electrical connection with a connector 170 (see FIG. 13) serving as a third element may be located in a region F of one second side surface 3s parallel to the longitudinal direction LD. Furthermore, a plurality of third electrodes 6 for electrical connection with a capacitor 175 serving as a third element may be located in a region F of the second side surface 3s parallel to the width direction WD. The region F where the third electrodes 6 connected to the capacitor 175 are located may be the inner surface of a recess 32 recessed inward from a plane including the corresponding first side surface 2s.
[0061] 10, 11, and 13, a flexible circuit board 180 may be connected to the connector 160. A flexible circuit board 190 may be connected to the connector 170. The multiple first electrodes 4 may be electrically connected to the corresponding second electrodes 5 or third electrodes 6 by internal wiring. This allows signals to be input to and output from the imaging element 150, and power to be supplied to the imaging element 150.
[0062] 13, the electronic device 100B may include a wiring board 1B, an imaging element 150 as a first element mounted on the first upper surface 2u of the first base 2, and a connector 160 as a second element mounted on the second lower surface 3d. Furthermore, the electronic device 100B may include a connector 170 and / or a capacitor 175 as a third element mounted on the second side surface 3s.
[0063] The first substrate 2 and the second substrate 3 may include multiple insulating layers stacked in the width direction WD, or the first substrate 2 and the second substrate 3 may be integrally formed by multiple insulating layers. The first electrode 4, the second electrode 5, and the third electrode 6 may be formed as described above in the first embodiment.
[0064] 13, the electronic device 100B may include an imaging element 150 mounted on the first upper surface 2u. Each electrode of the imaging element 150 is electrically connected to a corresponding first electrode 4 by solder or a conductive adhesive. The imaging element 150 is an electronic component, such as a CMOS or CCD, that converts an optical image formed on the imaging surface into an electrical signal and outputs the electrical signal.
[0065] 13, the electronic device 100B may include a connector 160 mounted on the first upper surface 2u. The connector 160 is one of the electronic components, and each electrode of the connector 160 is electrically connected to a corresponding second electrode 5 by solder or a conductive adhesive.
[0066] The electronic device 100B may include a connector 170 and / or a capacitor 175 as a third element in the region F of the second side surface 3s. The connector 170 is one of the electronic components, and each electrode of the connector 170 is electrically connected to a corresponding third electrode 6 by solder or a conductive adhesive. The capacitor 175 is one of the electronic components, and each electrode of the capacitor 175 is electrically connected to a corresponding third electrode 6 by solder or a conductive adhesive.
[0067] 10 to 12, in the configuration of the wiring board 1B according to the third embodiment, at least one second side surface 3s has a region F located inside a plane including the corresponding first side surface 2s, and the third electrode 6 is located in the region F. Therefore, even if the number of electrodes including the third electrode 6 is increased, the wiring board 1B can be made smaller in plan view. In other words, even if the number of elements including the third element mounted on the wiring board 1B is increased, the wiring board 1B and the electronic device 100B can be made smaller in plan view. This allows for space saving in the planar space required to mount the wiring board 1B and the electronic device 100B.
[0068] According to the configuration of the wiring board 1B according to the third embodiment, a pair of second side surfaces 3s extending along the width direction WD are partially located on the same plane as the corresponding first side surfaces 2s. This simplifies the alignment of the laminate for the first base 2 or the ceramic green sheets for the insulating layer 31 with the laminate for the second base 3, thereby improving the manufacturability of the wiring board 1B and the electronic device 100B. Furthermore, the strength of the wiring board 1B can be increased compared to when the four second side surfaces 3s of the second base 3 are located closer to the center in both the width direction WD and the length direction LD with respect to the first side surfaces 2s of the first base 2.
[0069] According to the configuration of the wiring board 1B of the third embodiment, the surface roughness of the region F of the second base 3 is greater than the surface roughness of the second side surface 3s of the second base 3, which is located on the same plane as the first side surface 2s of the first base 2. Therefore, when a capacitor 140 or the like serving as a third element is solder-mounted in the region F of the second base 3, the solder is less likely to flow in the region F of the second base 3, making it possible to avoid short circuits between adjacent third electrodes 6. When a capacitor 140 or the like serving as a third element is mounted in the region F of the second base 3 using a conductive adhesive, the surface area of the region F of the second base 3 is increased, making it possible to increase the mounting strength, for example, the adhesion strength, of the capacitor 140 or the like to the region F of the second base 3.
[0070] Additionally, wiring board 1B according to the third embodiment has the same effects as wiring board 1 according to the first embodiment described above.
[0071] In one embodiment, (1) a wiring substrate includes a first base having a first upper surface, a first lower surface opposite the first upper surface, and four first side surfaces between the first upper surface and the first lower surface, a second base having a second upper surface in contact with the first lower surface, a second lower surface opposite the second upper surface, and four second side surfaces between the second upper surface and the second lower surface and corresponding to the four first side surfaces, a plurality of first electrodes located on the first upper surface, a plurality of second electrodes located on the second lower surface, and a plurality of third electrodes located on the second side surfaces, wherein a pair of the second side surfaces, each extending along a first direction perpendicular to a height direction, are partially located on the same plane as the corresponding first side surface, and at least one of the second side surfaces has a region located inside a plane including the corresponding first side surface, and the third electrode is located in the region.
[0072] (2) In the wiring board of (1), the second side surface extending along a second direction intersecting the first direction has the region over the entire surface.
[0073] (3) In the wiring board of (1) or (2), at least one of the second side surfaces has a recess recessed inward from a plane including the corresponding first side surface, and the region is the inner surface of the recess.
[0074] (4) In the wiring board according to any one of (1) to (3), each of the second side surfaces may have the region.
[0075] (5) In the wiring substrate according to any one of (1) to (4), the plurality of third electrodes include third electrodes located at different heights in one of the regions.
[0076] (6) In the wiring board according to any one of (1) to (5), the first base and the second base include a plurality of insulating layers stacked in the height direction.
[0077] (7) In the wiring board according to any one of (1) to (5), the first base and the second base include a plurality of insulating layers stacked in the first direction.
[0078] (8) The wiring board according to any one of (1) to (7) above further includes a via conductor extending through at least one of the insulating layers and protruding from the surface of the second side surface.
[0079] (9) In the wiring substrate according to any one of (1) to (8), at least one of the third electrodes includes a side that extends in a height direction, and the side is distorted with respect to the height direction.
[0080] (10) An electronic device includes a wiring substrate according to any one of (1) to (9), a first element connected to the first electrode, a second element connected to the second electrode, and a third element connected to the third electrode.
[0081] The invention according to the present disclosure has been described above based on the drawings and examples. However, the invention according to the present disclosure is not limited to the above-described embodiments and their modifications. In other words, the invention according to the present disclosure can be modified in various ways within the scope of the present disclosure, and embodiments obtained by appropriately combining the technical means disclosed in the embodiments and their modifications are also included in the technical scope of the invention according to the present disclosure. In other words, it should be noted that a person skilled in the art could easily make various modifications or alterations based on the present disclosure. It should also be noted that these modifications or alterations are included in the scope of the present disclosure. [Explanation of symbols]
[0082] 1. Wiring board (wiring board according to the first embodiment) 2 First base 2u 1st top surface 2d 1st bottom surface 2s 1st side 21 Insulating layer 3 Second base 3u 2nd top surface 3d 2nd bottom surface 3s 2nd side 31 Insulating layer 32 recess F area 4 1st electrode 5 Second electrode 6 Third electrode 100 Electronic device (electronic device according to the first embodiment) 110 Image sensor (first sensor) 120 Capacitor (second element) 130 Cable (third element) 140 Capacitor (third element) 1A Wiring board (wiring board according to the second embodiment) 1B Wiring board (wiring board according to the third embodiment) 4 1st electrode 5 Second electrode 100B Electronic device (electronic device according to the third embodiment) 150 imaging element (first element) 160 Connector (second element) 170 Connector (third element) 175 Capacitor (third element) 180 Flexible Circuit Board 190 Flexible Circuit Board
Claims
1. a first base body having a first upper surface, a first lower surface located opposite the first upper surface, and four first side surfaces located between the first upper surface and the first lower surface; a second base body having a second upper surface in contact with the first lower surface, a second lower surface located opposite to the second upper surface, and four second side surfaces located between the second upper surface and the second lower surface and corresponding to the four first side surfaces, respectively; a plurality of first electrodes located on the first top surface; a plurality of second electrodes located on the second lower surface; a plurality of third electrodes located on the second side surface; Among the four second side surfaces, a pair of second side surfaces extending along a first direction perpendicular to the height direction are located on the same plane as the corresponding first side surfaces, At least one of the second side surfaces has a region located inside a plane including the corresponding first side surface, The third electrode is located in the region.
2. The wiring board according to claim 1 , wherein the second side surface extending along a second direction intersecting the first direction has the region over the entirety thereof.
3. At least one of the second side surfaces has a recess recessed inward from a plane including the corresponding first side surface, The wiring board according to claim 1 , wherein the region is an inner surface of the recess.
4. The wiring substrate of claim 1 , wherein each of the second sides has the region.
5. The wiring board according to claim 1 , wherein the plurality of third electrodes include third electrodes positioned at different heights in one of the regions.
6. The wiring board according to claim 1 , wherein the first base and the second base include a plurality of insulating layers stacked in the height direction.
7. The wiring board according to claim 1 , wherein the first base and the second base include a plurality of insulating layers stacked in the first direction.
8. The wiring board according to claim 6 , wherein the third electrode includes a via conductor extending through at least one of the insulating layers and protruding from the surface of the second side surface.
9. At least one of the third electrodes includes a side extending in a height direction, The wiring board according to claim 1 , wherein the side edge is distorted with respect to the height direction.
10. The wiring board according to any one of claims 1 to 7; a first element connected to the first electrode; a second element connected to the second electrode; a third element connected to the third electrode.
Citation Information
Patent Citations
Imaging-element mounting substrate, imaging device, and imaging module
WO2019082923A1