Semiconductor device and manufacturing method thereof
The described manufacturing method enhances semiconductor devices by forming controlled defect structures and conductivity layers, addressing speed and temperature challenges, resulting in reduced switching loss and improved operating temperature.
Patent Information
- Application Number
- JP2024047753
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-25
- Publication Date
- 2025-10-07
AI Technical Summary
The challenge is to increase the speed and guaranteed operating temperature of power devices, particularly in the context of the growing electric vehicle market, which existing technologies have not adequately addressed.
A manufacturing method involving the introduction of impurities with specific conductivity types into a semiconductor substrate, followed by heat treatments to form semiconductor layers with controlled carrier concentration distributions and defect structures, including hydrogen donor formation and laser irradiation to adjust the characteristics of field stop and collector layers.
This method enables semiconductor devices with reduced switching loss and improved operating temperature, facilitating high-speed operation and flexibility in adjusting device characteristics.
Smart Images
Figure 2025147487000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a semiconductor device and a manufacturing method thereof, and more particularly to a manufacturing method of an FRD (Fast Recovery Diode) and an IGBT (Insulated Gate Bipolar Transistor). [Background technology]
[0002] An FRD (fast rectifier diode) is a pn junction diode with measures taken to shorten the reverse recovery time. FRDs are designed to rectify high frequencies of tens or hundreds of kHz used in switching power supplies, and are characterized by a reverse recovery time that is two to three orders of magnitude shorter than that of ordinary rectifier diodes.
[0003] An IGBT (Insulated Gate Bipolar Transistor) is a transistor with an input section that has a MOS (Metal-Oxide-Semiconductor) structure and an output section that has a bipolar structure. IGBTs combine the characteristics of MOS field-effect transistors, which have high input impedance and fast switching speed, with the characteristics of bipolar transistors, which have a low saturation voltage.
[0004] FRDs and IGBTs are widely used as power devices for motors, batteries, etc.
[0005] Patent Document 1 discloses a power conversion device having a transistor that performs switching operation and a diode connected in parallel to the transistor. By using a bipolar transistor containing Ge with a predetermined concentration distribution as the transistor, it is possible to provide a highly efficient AC / DC converter, etc. [Prior art documents] [Patent documents]
[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-72157 [Patent Document 2] Japanese Patent Publication No. 2022-73497 Summary of the Invention [Problem to be solved by the invention]
[0007] With the growth of the electric vehicle market, increasing the speed and guaranteed operating temperature of power devices is a constant challenge.
[0008] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]
[0009] A method for manufacturing a semiconductor device according to the present disclosure includes introducing an impurity having a first conductivity type into a semiconductor substrate having an upper surface and a lower surface through the upper surface, forming a metal layer on the upper surface, introducing hydrogen into the lower surface to form a first semiconductor layer, performing a first heat treatment on the semiconductor substrate to convert the hydrogen introduced into the first semiconductor layer into donors, introducing an impurity of a second conductivity type opposite to the first conductivity type from the lower surface to form a second semiconductor layer at a position shallower than the first semiconductor layer, and performing a second heat treatment on the semiconductor substrate at a temperature higher than that of the first heat treatment to impart the second conductivity type to the second semiconductor layer.
[0010] The semiconductor device according to the present disclosure comprises a semiconductor substrate having an upper surface and a lower surface, a metal layer formed on the upper surface, an impurity region having a first conductivity type formed on the upper surface side, a first semiconductor layer formed on the lower surface side, having a first thickness in a direction perpendicular to the lower surface, and containing donor-converted hydrogen, and a second semiconductor layer formed on the lower surface side of the first semiconductor layer, containing impurities of a second conductivity type opposite to the first conductivity type, and having a second thickness smaller than the first thickness, wherein the first semiconductor layer has a first region having a maximum value in a carrier concentration distribution within the first semiconductor layer, and the second semiconductor layer has a second region having a carrier concentration distribution lower than that of the first semiconductor layer, and the first region is located at a deeper position than the second region when the lower surface is taken as a reference plane. [Effects of the Invention]
[0011] The present disclosure makes it possible to provide a semiconductor device that achieves high speed and an improved guaranteed operating temperature, and a method for manufacturing the same. [Brief explanation of the drawings]
[0012] [Figure 1] FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Figure 2] FIG. 2 is a diagram illustrating a method for manufacturing the semiconductor device according to the first embodiment. [Figure 3] FIG. 3 is a diagram illustrating the carrier concentration distribution of the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a diagram illustrating the carrier concentration distribution of the semiconductor device of the comparative example. [Figure 5] FIG. 5 is a diagram illustrating defects caused by introduction of impurities into the semiconductor device according to the first embodiment. [Figure 6] FIG. 6 is a diagram illustrating a method for manufacturing the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a diagram illustrating defect recovery in the semiconductor device according to the second embodiment. [Figure 8]FIG. 8 is a diagram illustrating defect recovery of the semiconductor device according to the third embodiment. [Figure 9] FIG. 9 is a diagram illustrating defects caused by introduction of impurities in the semiconductor device according to the third embodiment. [Figure 10] FIG. 10 is a diagram illustrating defect recovery in the semiconductor device according to the fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0013] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the specification and drawings, identical or corresponding components are designated by the same reference numerals, and duplicate explanations will be omitted. In the drawings, components may be omitted or simplified for the sake of convenience. Furthermore, at least some of the embodiments may be combined with each other in any desired manner.
[0014] The impurity concentration of a component included in a semiconductor device according to the present disclosure refers to the peak value in the measured region of the component. Furthermore, when comparing the impurity concentrations of two components, the expression "similar" does not necessarily mean that they are completely identical. Even if the impurity concentrations of two components differ due to manufacturing variations, if the set values of the impurity concentrations of the two components are the same, the impurity concentrations of the two components are considered to be the same.
[0015] <First Embodiment> 1 is a cross-sectional view of a semiconductor substrate 10 (n-type Si substrate) in a semiconductor device 1. The semiconductor device 1 includes a semiconductor substrate 10 having an upper surface 11 and a lower surface 12, and a plurality of regions formed within the semiconductor substrate 10 on the upper surface 11 and the lower surface 12 of the semiconductor substrate.
[0016] A metal layer 100 is formed on an upper surface 11 of the semiconductor substrate 10, and an impurity region 20 is formed below the metal layer 100. A second semiconductor layer 102, a first semiconductor layer 101, and a third semiconductor layer 103 are formed on a lower surface 12 of the semiconductor substrate 10 in this order from the bottom up. In addition, defects 110 caused by the introduction of impurities exist between the second semiconductor layer 102 and the first semiconductor layer 101.
[0017] Hereinafter, each element constituting the semiconductor device 1 and a method for manufacturing the same will be described with reference to FIG.
[0018] First, an impurity having a first conductivity type is introduced into the upper surface 11 of the semiconductor substrate 10 (see FIG. 2(a)). As a result, an impurity region 20 having the first conductivity type and a region 30 (n-type Si substrate) are formed on the upper surface 11 of the semiconductor substrate 10. In the semiconductor device 1, the impurity region 20 functions as an anode layer, and the region 30 functions as a drift layer. To facilitate understanding, this embodiment will be described using a specific example in which B (boron) is introduced into the semiconductor substrate 10, which is an n-type (second conductivity type) silicon substrate, to form a p-type (first conductivity type) impurity region on the upper surface 11 of the semiconductor substrate 10.
[0019] Next, a metal layer 100 is formed on the upper surface 11 of the semiconductor substrate 10 (see FIG. 2(b)). The metal layer 100 is formed by using a film formation method such as sputtering a metal material such as Al (aluminum). The metal layer 100 functions as an anode electrode in the semiconductor device 1.
[0020] Next, hydrogen is introduced from the lower surface 12 of the semiconductor substrate 10 (see FIG. 2(c)). As a result, a first semiconductor layer 101 having a first thickness L1 in a direction perpendicular to the lower surface 12 is formed. The introduction of hydrogen is performed using a method such as ion implantation or ion doping.
[0021] After introducing hydrogen, the semiconductor substrate 10 is subjected to a first heat treatment to convert the hydrogen introduced into the first semiconductor layer 101 into donors (not shown). As a result, the first semiconductor layer 101 functions as an n-type donor layer having a higher impurity concentration than the semiconductor substrate 10. The first heat treatment is preferably performed at 350 to 400°C (350 to 400°C, for example, 350°C) using a heating furnace or the like for about one hour (see Patent Document 2).
[0022] Next, impurities of a second conductivity type, which is the conductivity type opposite to the first conductivity type, are introduced from the lower surface 12 of the semiconductor substrate 10 (see FIG. 2(d)). As a result, a second semiconductor layer 102 having a second thickness L2 that is smaller than the first thickness L1 in a direction perpendicular to the lower surface 12 is formed at a position shallower than the first semiconductor layer 101, i.e., at a position closer to the lower surface 12 of the semiconductor substrate 10. In this embodiment, the second semiconductor layer 102 is formed by introducing P (phosphorus). Note that although defects 110 caused by the introduction of impurities shown in FIG. 1 exist at this stage, they are omitted from FIG. 2(d) to avoid complicating the illustration. Details of the defects 110 caused by the introduction of impurities will be described later.
[0023] After the impurities of the second conductivity type are introduced, a second heat treatment is performed on the semiconductor substrate 10 to activate the impurities of the second conductivity type and impart the second semiconductor layer 102 with the second conductivity type (see FIG. 2(e)). In this embodiment, the second semiconductor layer 102 is thereby imparted with n-type (second conductivity type) conductivity and functions as a field stop layer in the semiconductor device 1. The second heat treatment is preferably performed at a temperature higher than that of the first heat treatment, and is performed at a temperature higher than that of the first heat treatment, for example, by using laser irradiation or the like. The heat treatment using laser irradiation is a localized thermal load, and therefore can suppress desorption of hydrogen from regions that do not reach the laser irradiation depth.
[0024] The second heat treatment causes hydrogen contained in the region of the first semiconductor layer 101 close to the underside 12 of the semiconductor substrate 10 to be desorbed, and the thickness of the first semiconductor layer 101 after the second heat treatment is reduced to L1' (≒L1-L2, where L1'>L2).
[0025] The distribution of hydrogen donors in the semiconductor substrate 10 after the second heat treatment will be described with reference to Fig. 3(a). Fig. 3(a) shows the carrier concentration distribution in the depth direction measured by SRP (Spreading Resistance Profiling Method) when the lower surface 12 of the semiconductor substrate 10 is used as the reference plane. The horizontal axis representing the depth is normalized with the depth at which the first region 111, where the carrier concentration peaks, is located as 1.
[0026] It can be seen that the carrier concentration distribution has a gradient as it approaches the lower surface 12 of the semiconductor substrate 10 from the first region 111 where the carrier concentration distribution has a maximum value. In other words, the carrier concentration distribution of the first semiconductor layer 101 after the second heat treatment has a gradient in which the carrier concentration increases in the depth direction when the lower surface 12 is used as the reference plane.
[0027] As a comparative example, the carrier concentration distribution of a semiconductor substrate to which hydrogen was introduced and the first heat treatment was performed, i.e., to which the second conductivity type impurity was not introduced and the second heat treatment was not performed, is shown in Fig. 4. The carrier concentration distribution in a region closer to the lower surface 12 of the semiconductor substrate 10 than the first region 111 where the carrier concentration peaks is flatter than the carrier concentration distribution in Fig. 3(a).
[0028] 3(a) and 4, it can be seen that hydrogen contained in the region close to the lower surface 12 of the semiconductor substrate 10 is desorbed by performing the second heat treatment. This region (second region 112) where the gradient is steeper, i.e., the region having a lower carrier concentration distribution than the first semiconductor layer 101, is defined as the hydrogen desorption region. In other words, the minimum value of the hydrogen concentration distribution in the second region 112 is smaller than the set value of the hydrogen dose when hydrogen is introduced.
[0029] 3(b) shows the first semiconductor layer 101, the second semiconductor layer 102, and the region 30 into which no impurities have been introduced of the semiconductor substrate 10 fitted to the carrier concentration distribution shown in FIG. 3(a). A first region 111 where the carrier concentration reaches a peak is formed in the first semiconductor layer 101, and a second region 112, which is a hydrogen desorption region, is formed in the second semiconductor layer 102.
[0030] 3(a), a concentration gradient is also observed for the second conductivity type impurity. In the peak region of the concentration of this second conductivity type impurity, many defects 110 due to the introduction of the impurity exist.
[0031] The semiconductor device 1 according to the present disclosure reduces switching loss and facilitates adjustment of high speed by introducing many defects 110 by introducing impurities between the second semiconductor layer 102 and the first semiconductor layer 101. The mechanism behind this will be explained with reference to FIG.
[0032] 5(a) is a cross-sectional view of a semiconductor substrate into which a second conductivity type impurity (phosphorus) has been introduced and the second heat treatment has been performed, i.e., the introduction of hydrogen and the first heat treatment have not been performed. Therefore, the semiconductor substrate is formed with only the second semiconductor layer 102 and a region 30 into which no impurity has been introduced, and defects 110 due to the introduction of the impurity have been formed between the second semiconductor layer 102 and the region 30.
[0033] Research by the present inventors has confirmed that increasing the energy of doping the second conductivity type impurity reduces the switching loss of the semiconductor device. Increasing the energy of doping the second conductivity type impurity increases the number of defects 110 caused by the doping of the impurity. Therefore, it is found that increasing the number of defects 110 caused by the doping of the impurity is effective in reducing the switching loss of the semiconductor device.
[0034] Furthermore, since the operating temperature and switching loss of a semiconductor device are almost proportional to each other, reducing the switching loss leads to an improvement in the guaranteed operating temperature.
[0035] On the other hand, reducing the thickness of the semiconductor substrate is effective in improving the electrical characteristics of semiconductor devices, but this can lead to the problem of ringing, which can be suppressed by forming hydrogen donors.
[0036] Therefore, in order to simultaneously reduce the switching loss and suppress the ringing in a semiconductor device, it is necessary to increase the number of defects 110 due to the introduction of impurities and to form hydrogen donors.
[0037] The inventors discovered a problem in that when hydrogen donors are formed after defects 110 are formed by doping impurities, some of the defects 110 are repaired by the hydrogen donor formation process. Figure 5(b) shows an image of the fluctuation in switching characteristics due to defect repair. The vertical axis is switching loss Err, and the horizontal axis is forward voltage VF. When defects are repaired, the operating voltage decreases, but the switching loss tends to increase.
[0038] The present inventors have overcome this problem by forming defects 110 by introducing impurities after forming hydrogen donors, as shown in the method for manufacturing a semiconductor device according to the present disclosure.
[0039] In this way, the method for manufacturing a semiconductor device according to the present disclosure makes it possible to increase the speed and the guaranteed operating temperature.
[0040] The above-described method for manufacturing a semiconductor device is a method for manufacturing an FRD. When manufacturing an IGBT, impurities of a first conductivity type are introduced into the lower surface 12 of the semiconductor substrate 10 (see FIG. 6) before the second heat treatment (see FIG. 2(d)). As a result, a third semiconductor layer 103 having a third thickness L3 in a direction perpendicular to the lower surface 12 is formed at a position shallower than the second semiconductor layer 102, i.e., at a position closer to the lower surface 12 of the semiconductor substrate 10. In this embodiment, the third semiconductor layer 103 is formed by introducing B (boron). The subsequent second heat treatment imparts p-type (first conductivity type) to the third semiconductor layer 103, and the third semiconductor layer 103 functions as a collector layer in the semiconductor device 1, which is an IGBT.
[0041] In the method for manufacturing a semiconductor device according to the present disclosure, the second semiconductor layer 102 and the third semiconductor layer 103 can be formed after the formation of the hydrogen donor, which makes it easier to adjust the characteristics of the field stop layer and the collector layer, and further enables an improvement in the speed and guaranteed operating temperature.
[0042] <Embodiment 2> In this embodiment, a modified example of the semiconductor device manufacturing method according to the first embodiment will be described, particularly a case where the irradiation depth of the laser used in the second heat treatment is made larger than that of the first embodiment. Note that a description of the same configuration as the first embodiment will be omitted.
[0043] 7(a) shows an example in which the laser irradiation conditions in the second heat treatment are changed so that the laser irradiation depth reaches the region where hydrogen donors are formed. The open circles in the figure indicate defect recovery due to laser irradiation, and the closed circles indicate defect recovery due to hydrogen desorption caused by laser irradiation. Therefore, the third region 113 surrounded by the dotted line indicates a defect recovery region where defects have been recovered by laser irradiation, and the third region 113 is formed on the underside 12 of the semiconductor substrate 10.
[0044] 7(b) shows an example in which laser irradiation is performed under the same conditions as in FIG. 7(a) in a state in which hydrogen donors have been formed deeper than in the first embodiment. The open and closed circles in the figure are the same as those in FIG. 7(a), and the cross marks indicate that the defects have not been repaired by the laser irradiation, i.e., the defects remain. By applying this hydrogen donor formation and laser irradiation, it is expected that the extension of the depletion layer due to the hydrogen donor formation can be suppressed.
[0045] <Third Embodiment> In this embodiment, a modified example of the semiconductor device manufacturing method according to the first embodiment will be described, particularly a case where the irradiation depth of the laser used in the second heat treatment is changed. Note that the description of the same configuration as in the first and second embodiments will be omitted.
[0046] The laser irradiation depth can be controlled by changing the laser wavelength. Figure 8(a) shows an example of the manufacturing method similar to that shown in embodiment 1, in which the laser irradiation depth is adjusted to the depth at which the second semiconductor layer 102 is formed, thereby forming the third region 113, which is a crystalline recovery region. As described in embodiment 1, this manufacturing method has the advantage of low switching loss (see white circles in Figure 9).
[0047] 8(b) shows an example in which the laser irradiation depth is adjusted so that it reaches partway through the second semiconductor layer 102, forming a third region 113, which is a crystalline recovery region. This manufacturing method achieves a good balance between switching loss and operating voltage (see the hatched circle in FIG. 9).
[0048] In Figure 8(c), the laser irradiation depth is further reduced compared to Figure 8(b). This manufacturing method has the advantage of being able to reduce the operating voltage (see the black circles in Figure 9).
[0049] In this way, by changing the laser irradiation depth, it becomes possible to flexibly respond to the specifications required for semiconductor devices.
[0050] <Fourth Embodiment> In this embodiment, a modified example of the method for manufacturing a semiconductor device according to the first embodiment will be described, particularly for an IGBT. As shown in the first embodiment, when manufacturing an IGBT, a third semiconductor layer 103 is formed by introducing a first conductivity type impurity into the lower surface 12 of the semiconductor substrate 10 before the second heat treatment.
[0051] 10 shows an example in which defects formed in the third semiconductor layer 103 are repaired by laser irradiation in the second heat treatment. The open circles, black circles, and crosses in the figure are the same as those in the second embodiment. A third region, which is a defect repair region, is also formed in the third semiconductor layer 103 by laser irradiation.
[0052] The method for manufacturing a semiconductor device according to this embodiment makes it possible to adjust not only the amount of second conductivity type impurities introduced into the second semiconductor layer 102 but also the amount of first conductivity type impurities introduced into the third semiconductor layer 103. Furthermore, since defects due to second conductivity type impurities and defects due to first conductivity type impurities can be formed after hydrogen donors are formed, it becomes easy to adjust the characteristics of the field stop layer and the collector layer.
[0053] The invention made by the present inventors has been specifically described above based on the embodiments, but it goes without saying that the present disclosure is not limited to the embodiments already described, and various modifications are possible within the scope that does not deviate from the gist of the present disclosure. [Explanation of symbols]
[0054] 1. Semiconductor device 10. Semiconductor substrate 11 Top side 12 Bottom side 20 Impurity region 30 areas 100 metal layers 101 First semiconductor layer 102 second semiconductor layer 103 Third semiconductor layer 110 Defects 111 First area 112 Second Domain 113 The Third Realm
Claims
1. doping an impurity having a first conductivity type into a semiconductor substrate having an upper surface and a lower surface from the upper surface; forming a metal layer on the upper surface; hydrogen is introduced from the lower surface to form a first semiconductor layer; performing a first heat treatment on the semiconductor substrate to convert hydrogen introduced into the first semiconductor layer into donors; doping impurities of a second conductivity type opposite to the first conductivity type from the lower surface to form a second semiconductor layer at a position shallower than the first semiconductor layer; performing a second heat treatment on the semiconductor substrate at a temperature higher than that of the first heat treatment to impart the second conductivity type to the second semiconductor layer; A method for manufacturing a semiconductor device.
2. the thickness of the first semiconductor layer after the second heat treatment is greater than the thickness of the second semiconductor layer; The method for manufacturing a semiconductor device according to claim 1 .
3. After the second heat treatment, the first semiconductor layer has a first region having a maximum value in a carrier concentration distribution in the first semiconductor layer; the second semiconductor layer has a second region having a carrier concentration distribution lower than that of the first semiconductor layer; The method for manufacturing a semiconductor device according to claim 1 .
4. the minimum value of the hydrogen concentration distribution in the second region is smaller than the set value of the hydrogen dose in the introduction of hydrogen; The method for manufacturing a semiconductor device according to claim 3 .
5. the carrier concentration distribution of the first semiconductor layer after the second heat treatment has a gradient in which the carrier concentration increases in a depth direction when the lower surface is taken as a reference surface; The method for manufacturing a semiconductor device according to claim 3 .
6. Furthermore, before the second heat treatment, a third semiconductor layer is formed by introducing an impurity of the first conductivity type from the lower surface. The method for manufacturing a semiconductor device according to claim 1 .
7. the first heat treatment is performed in a heating furnace; the second heat treatment is performed by irradiating the lower surface with a laser. The method for manufacturing a semiconductor device according to claim 1 .
8. a third region in which defects formed in the semiconductor substrate are repaired is formed on the lower surface side of the semiconductor substrate by performing the second heat treatment using the laser; The method for manufacturing a semiconductor device according to claim 7 .
9. an irradiation depth of the laser is greater than or approximately equal to a depth at which the first semiconductor layer is formed when the lower surface is taken as a reference surface; the third region reaches the second semiconductor layer and the first semiconductor layer in a depth direction with the lower surface as a reference plane. The method for manufacturing a semiconductor device according to claim 8 .
10. the laser irradiation depth is smaller than the depth at which the second semiconductor layer is formed when the lower surface is taken as a reference surface; the third region reaches a part of the second semiconductor layer in a depth direction with the lower surface as a reference plane. The method for manufacturing a semiconductor device according to claim 8 .
11. a semiconductor substrate having an upper surface and a lower surface; a metal layer formed on the upper surface; an impurity region having a first conductivity type formed on the upper surface side; a first semiconductor layer formed on the lower surface side, having a first thickness in a direction perpendicular to the lower surface, and containing hydrogen converted into donors; a second semiconductor layer formed closer to the lower surface than the first semiconductor layer, containing impurities of a second conductivity type opposite to the first conductivity type, and having a second thickness smaller than the first thickness; the first semiconductor layer has a first region having a maximum value in a carrier concentration distribution in the first semiconductor layer; the second semiconductor layer has a second region having a carrier concentration distribution lower than that of the first semiconductor layer; When the lower surface is a reference surface, the first region is located at a deeper position than the second region. Semiconductor device.
12. the carrier concentration distribution of the first semiconductor layer has a gradient in which the carrier concentration increases in a depth direction when the lower surface is taken as a reference surface; The semiconductor device according to claim 11.
13. a third semiconductor layer formed closer to the lower surface than the second semiconductor layer and containing an impurity of the first conductivity type; The semiconductor device according to claim 11.
Citation Information
Patent Citations
Power converter
JP2005072157A
Semiconductor device and method for manufacturing semiconductor device
JP2022073497A