Semiconductor manufacturing device, inspection device, and semiconductor device manufacturing method

By using an oblique light illuminator with adjustable illumination direction, the semiconductor manufacturing apparatus enhances flaw detection sensitivity by distinguishing between die surface patterns and scratches, improving the visibility of scratches on semiconductor dies.

JP2025148155APending Publication Date: 2025-10-07FASFORD TECH
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Patent Information

Application Number
JP2024048771
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-25
Publication Date
2025-10-07

AI Technical Summary

Technical Problem

The sensitivity of detecting scratches on semiconductor dies is low due to the illumination configuration of the optical system, which makes it difficult to distinguish between circuit patterns and scratches using dark-field inspection.

Method used

The semiconductor manufacturing apparatus employs an oblique light illuminator with a rectangular light-emitting surface angled relative to the imaging device, allowing adjustment of the illumination direction to enhance flaw detection sensitivity by distinguishing between different reflection characteristics of the die surface and scratches.

Benefits of technology

This configuration improves the sensitivity of detecting flaws by effectively separating the reflection characteristics of scratches from those of the die surface patterns, enhancing the visibility of scratches during inspection.

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Abstract

To provide a technique capable of improving the sensitivity of detecting flaws.SOLUTION: A semiconductor manufacturing device includes (a) an imaging device that images a die, (b) an illumination device that is an oblique light illuminator having a rectangular light-emitting surface, the long side of which is arranged to face one side of the die, and that is arranged to irradiate illumination light at a first predetermined angle with respect to the optical axis of the imaging device, and (c) a control unit that is configured to be able to adjust the direction in which the illumination light is irradiated onto the one side of the die in a planar view.SELECTED DRAWING: Figure 9
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Description

[Technical Field]

[0001] The present disclosure relates to semiconductor manufacturing equipment and is applicable to, for example, a die bonder that inspects the surface of a die. [Background technology]

[0002] The manufacturing process of a semiconductor device includes a dicing process, in which dies are separated from a semiconductor wafer (hereinafter simply referred to as a wafer), and a die bonding process, in which the separated dies are mounted on a substrate. During the die bonding process or an earlier process, such as the dicing process, scratches such as cracks may occur in the die.

[0003] When inspecting for flaws using images captured by an optical system including a camera, the illumination configuration of the optical system may be performed using a dark field method in which the background is darkened and what is desired to be seen is brightly captured (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2020-13841 Summary of the Invention [Problem to be solved by the invention]

[0005] Depending on the pattern formed on the die, the sensitivity of detecting scratches may be low.

[0006] An object of the present disclosure is to provide a technology that can improve the sensitivity of detecting flaws. Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0007] A brief summary of representative aspects of this disclosure is as follows. That is, the semiconductor manufacturing apparatus includes: (a) an imaging device that images the die; (b) an illumination device that is an oblique light illuminator having a rectangular light-emitting surface, the long side of which is arranged to face one side of the die, and that is arranged to irradiate illumination light at a first predetermined angle with respect to the optical axis of the imaging device; and (c) a control unit that is configured to be able to adjust the direction in which the illumination light is irradiated onto the one side of the die in a planar view. [Effects of the Invention]

[0008] According to the present disclosure, it is possible to improve the sensitivity of detecting flaws. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a schematic top view showing an example of the configuration of a die bonder according to an embodiment. [Figure 2] FIG. 2 is a diagram illustrating the schematic configuration when viewed from the direction of arrow A in FIG. [Figure 3] FIG. 3 is a schematic cross-sectional view showing a main part of the wafer supply unit shown in FIG. [Figure 4] FIG. 4 is a block diagram showing a schematic configuration of a control system of the die bonder shown in FIG. [Figure 5] FIG. 5 is a flowchart showing a method for manufacturing a semiconductor device using the die bonder shown in FIG. [Figure 6] FIG. 6 is a diagram showing an example of the configuration of a dark-field inspection system in a comparative example. [Figure 7] FIG. 7 is a diagram showing an example of an image captured by the dark-field inspection system shown in FIG. [Figure 8] FIG. 8 is a diagram for explaining the problem in the dark-field inspection system shown in FIG. [Figure 9] FIG. 9 is a diagram illustrating the change in flaw detection sensitivity depending on the illumination direction. [Figure 10] FIG. 10 is a diagram showing a first example of rotating the lighting device in the horizontal direction. [Figure 11] FIG. 11 is a diagram showing a second example in which the lighting device is rotated in the horizontal direction. [Figure 12] FIG. 12 shows a third example in which the die is rotated horizontally. [Figure 13] FIG. 13 is a diagram illustrating another example of changing the direction of illumination from the illumination device onto the die. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments and modifications will be described with reference to the drawings. However, in the following description, the same components will be assigned the same reference numerals, and repeated description may be omitted. Note that, to clarify the description, the drawings may show the width, thickness, shape, etc. of each part more schematically than in the actual embodiment. Furthermore, the dimensional relationships and ratios of each element between multiple drawings do not necessarily match.

[0011] The configuration of a die bonder, which is one embodiment of semiconductor manufacturing equipment, will be described with reference to Figures 1 to 3. Figure 1 is a schematic top view showing an example of the configuration of the die bonder in the embodiment. Figure 2 is a diagram explaining the schematic configuration as seen from the direction of arrow A in Figure 1. Figure 3 is a schematic cross-sectional view showing the main parts of the wafer supply unit shown in Figure 1.

[0012] The die bonder 1 broadly comprises a wafer supply unit 10, a pickup unit 20, an intermediate stage unit 30, a bonding unit 40, a transport unit 50, a substrate supply unit 60, a substrate unloading unit 70, and a control unit (control device) 80. The Y2-Y1 direction (Y direction) is the front-to-rear direction of the die bonder 1, the X2-X1 direction (X direction) is the left-to-right direction, and the Z1-Z2 direction (Z direction) is the up-to-down direction. The wafer supply unit 10 is located on the front side of the die bonder 1, and the bonding unit 40 is located on the rear side. Here, the X direction, Y direction, and Z direction are perpendicular to one another.

[0013] The wafer supply unit 10 includes a wafer cassette lifter 11, a wafer holder 12, a peeling unit 13, and a wafer recognition camera 14.

[0014] A wafer cassette lifter 11 moves a wafer cassette (not shown), which stores multiple wafer rings WR, up and down to the wafer transport height. A wafer correction chute (not shown) aligns the wafer rings WR supplied from the wafer cassette lifter 11. A wafer extractor (not shown) removes wafer rings WR from the wafer cassette and supplies them to the wafer holder 12, or removes them from the wafer holder 12 and stores them in the wafer cassette.

[0015] The wafer holder 12 has an expand ring 121 that holds the wafer ring WR, and a support ring 122 that is held by the wafer ring WR and horizontally positions the dicing tape DT. The peeling unit 13 is disposed inside the support ring 122.

[0016] A wafer W is adhered (attached) to a dicing tape DT, and the wafer W is divided into multiple dies D. The wafer W is, for example, a semiconductor wafer or a glass wafer, and the dies D are semiconductor chips or glass chips. A film-like adhesive material DF called a die attach film (DAF) may be attached between the wafer W and the dicing tape DT. The adhesive material DF hardens when heated.

[0017] The wafer holder 12 is moved in the X1-X2 and Y1-Y2 directions by a drive unit (not shown), and moves the die D to be picked up to the position of the peeling unit 13. The wafer holder 12 also rotates the wafer ring WR in the XY plane by a drive unit (not shown). The peeling unit 13 is moved in the vertical direction by a drive unit (not shown). The peeling unit 13 peels the die D from the dicing tape DT.

[0018] The wafer recognition camera 14 detects the pick-up position of the die D to be picked up from the wafer W and inspects the surface of the die D.

[0019] The pickup unit 20 has a pickup head 21 and a Y drive unit 23. The pickup head 21 is provided with a collet 22 that suction-holds the peeled die D at its tip. The pickup head 21 picks up the die D from the wafer supply unit 10 and places it on the intermediate stage 31. The Y drive unit 23 moves the pickup head 21 in the Y1-Y2 direction. The pickup unit 20 has various drive units (not shown) that raise and lower, rotate, and move the pickup head 21 in the X direction.

[0020] The intermediate stage unit 30 has an intermediate stage 31 on which the die D is placed, and a stage recognition camera 34 for recognizing the die D on the intermediate stage 31. The intermediate stage 31 has suction holes that adsorb the placed die D. The intermediate stage 31 may also be provided with a rotation mechanism for adjusting the horizontal tilt of the placed die D. The placed die D is temporarily held on the intermediate stage 31. The intermediate stage 31 is both a placement stage on which the die D is placed and a pickup stage on which the die D is picked up.

[0021] The bonding unit 40 includes a bond head 41, a Y-axis drive unit 43, a substrate recognition camera 44, and a bond stage 46. The bond head 41 is provided with a collet 42 that suction-holds a die D at its tip. The Y-axis drive unit 43 moves the bond head 41 in the Y1-Y2 direction. The substrate recognition camera 44 captures an image of a position recognition mark (not shown) on the substrate S to recognize the bond position. Here, the substrate S may be, for example, a wiring board, a lead frame, or a glass substrate. The substrate S has multiple product areas (hereinafter referred to as package areas P) that will ultimately become a single package. A position recognition mark is provided for each package area P. The bond stage 46 is raised when the die D is placed on the substrate S and supports the substrate S from below. The bond stage 46 has a suction port (not shown) for vacuum-suctioning the substrate S, allowing the substrate S to be fixed in place. The bond stage 46 also has a heating unit (not shown) for heating the substrate S. The bonding section 40 has driving sections (not shown) for raising and lowering, rotating and moving the bond head 41 in the X direction.

[0022] With this configuration, the bond head 41 corrects the pickup position and posture based on the image data of the stage recognition camera 34, and picks up the die D from the intermediate stage 31. Then, the bond head 41 bonds the die D onto the package area P of the substrate S based on the image data of the substrate recognition camera 44, or bonds the die D by stacking it on top of a die that has already been bonded onto the package area P of the substrate S.

[0023] The transport unit 50 has transport claws 51 that grip and transport the substrate S, and a transport lane 52 along which the substrate S moves. The substrate S moves in the X direction by driving a nut (not shown) of the transport claws 51 provided on the transport lane 52 with a ball screw (not shown) provided along the transport lane 52. With this configuration, the substrate S moves from the substrate supply unit 60 along the transport lane 52 to the bonding position, and after bonding, moves to the substrate unloading unit 70 and hands the substrate S over to the substrate unloading unit 70.

[0024] The substrate supply unit 60 removes the substrate S, which has been stored in a transport jig and carried in, from the transport jig and supplies it to the transport unit 50. The substrate unloading unit 70 stores the substrate S, which has been carried in by the transport unit 50, in the transport jig.

[0025] Next, the control unit 80 will be described with reference to Fig. 4. Fig. 4 is a block diagram showing a schematic configuration of a control system of the die bonder shown in Fig. 1.

[0026] The control system 8 includes a control unit (control device) 80, a drive unit 86, a signal unit 87, an optical system 88, etc. The control unit 80 broadly includes a control and arithmetic unit 81 mainly composed of a CPU (Central Processing Unit), a storage device 82, an input / output device 83, a bus line 84, and a power supply unit 85. The storage device 82 includes a main storage device 82a and an auxiliary storage device 82b. The main storage device 82a is composed of a RAM (Random Access Memory) that stores processing programs and the like. The auxiliary storage device 82b is composed of an HDD (Hard Disk Drive) or SSD (Solid State Drive) that stores control data, image data, etc. required for control.

[0027] The input / output device 83 includes a monitor 83a that displays the device status and other information, a touch panel 83b that inputs operator instructions, a mouse 83c that operates the monitor 83a, and an image capture device 83d that captures image data from the optical system 88. The input / output device 83 also includes a motor control device 83e and an I / O signal control device 83f. The motor control device 83e controls the XY table (not shown) of the wafer supply unit 10, the ZY drive axis of the bond head table, and the drive unit of the peeling unit 13. The I / O signal control device 83f captures or controls signals from a signal unit 87 that includes switches and volumes that control the brightness of various sensors and lighting devices. The optical system 88 includes a wafer recognition camera 14, a stage recognition camera 34, and a substrate recognition camera 44. The control / arithmetic unit 81 captures and calculates necessary data via the bus line 84, controls the pickup head 21, and sends information to the monitor 83a.

[0028] A part of the manufacturing process of a semiconductor device using the die bonder 1 (a method for manufacturing a semiconductor device) will be described with reference to Fig. 5. Fig. 5 is a flowchart showing a method for manufacturing a semiconductor device using the die bonder shown in Fig. 1. In the following description, the operation of each part constituting the die bonder 1 is controlled by a control unit 80.

[0029] (Wafer loading process: process S1) A wafer cassette containing wafer rings WR is loaded into wafer cassette lifter 11. The loaded wafer rings WR are then supplied to wafer holder 12. The wafer W is inspected in advance for each die by an inspection device such as a prober, and wafer map data indicating whether the die is good or bad is generated. This wafer map data is stored in a storage device of control unit 80.

[0030] (Substrate loading process: Process S2) The transport jig storing the substrate S is supplied to the substrate supply unit 60. The substrate S is removed from the transport jig at the substrate supply unit 60. Then, the substrate S is supplied (carried in) to the bonding unit 40 via the transport unit 50.

[0031] (Pickup process: process S3) After step S1, the wafer holder 12 is moved so that the desired die D can be picked up from the dicing tape DT. The die D is photographed by the wafer recognition camera 14, and the die D is positioned and its surface inspected based on the image data acquired by the photograph. The image data is processed to calculate the amount of deviation (in the X, Y, and θ directions) of the die D on the wafer holder 12 from the die position reference point of the die bonder, and the die is positioned accordingly. Note that the die position reference point is previously held at a predetermined position on the wafer holder 12 as the initial setting for the device. The image data is processed to inspect the surface of the die D.

[0032] The positioned die D is peeled off from the dicing tape DT by the peeling unit 13 and the pickup head 21. The die D peeled off from the dicing tape DT is attracted to and held by a collet 22 provided on the pickup head 21, and is transported to and placed on the intermediate stage 31.

[0033] The die D on the intermediate stage 31 is photographed by the stage recognition camera 34, and the die D is positioned and its surface inspected based on the image data acquired by photographing. The image data is processed to calculate the amount of deviation (in the X, Y, and θ directions) of the die D on the intermediate stage 31 from the die position reference point of the die bonder, and the die is positioned accordingly. Note that the die position reference point is previously held at a predetermined position on the intermediate stage 31 as the initial setting of the device. The image data is processed to inspect the surface of the die D.

[0034] After transporting the die D to the intermediate stage 31, the pickup head 21 is returned to the wafer supply unit 10. Following the procedure described above, the next die D is peeled off from the dicing tape DT, and thereafter, the dies D are peeled off one by one from the dicing tape DT following the same procedure.

[0035] (Bond process: Process S4) The substrate S is transported to the bond stage 46 by the transport unit 50. The substrate S placed on the bond stage 46 is imaged by the substrate recognition camera 44, and the positioning and surface inspection of the substrate S are performed based on the image data acquired by the image capture. The image data is processed to calculate the amount of deviation (X, Y, and θ directions) of the substrate S from the substrate position reference point of the die bonder 1. Note that the substrate position reference point is previously held at a predetermined position of the bonding unit 40 as the initial setting of the device. The image data is processed to perform surface inspection of the substrate S.

[0036] The suction position of the bond head 41 is corrected based on the deviation amount of the die D on the intermediate stage 31 calculated in step S3, and the die D is suctioned by the collet 42. The bond head 41, which has suctioned the die D from the intermediate stage 31, bonds the die D to a predetermined location on the substrate S supported by the bond stage 46. Here, the predetermined location on the substrate S is the package area P of the substrate S, or an area where a die D has already been placed and the die D is to be bonded in addition to that, or a bonding area for the die D to be stacked and bonded. The die D bonded to the substrate S is photographed by the substrate recognition camera 44, and an inspection is performed based on the image data acquired by photographing to determine whether the die D has been bonded in the desired location, etc.

[0037] After bonding the die D to the substrate S, the bond head 41 is returned to the intermediate stage 31. Following the procedure described above, the next die D is picked up from the intermediate stage 31 and bonded to the substrate S. This is repeated until a die D is bonded to all the package areas P of the substrate S.

[0038] (Substrate unloading process: Process S5) The transfer section 50 transfers the substrate S with the die D bonded thereto from the bonding section 40 to the substrate transfer section 70. In the substrate transfer section 70, the substrate S is taken out and stored in a transfer jig, and then the substrate S is transferred out. The transfer jig storing the substrate S is transferred out of the die bonder 1.

[0039] As described above, the die D is mounted on the substrate S and is carried out from the die bonder 1. Thereafter, for example, a transport jig storing the substrate S on which the die D is mounted is transported to a wire bonding process, where the electrodes of the die D are electrically connected to the electrodes of the substrate S via Au wires or the like. Then, the substrate S is transported to a molding process, where the die D and the Au wires are sealed with molding resin (not shown), thereby completing a semiconductor package.

[0040] Surface inspection for scratches may be performed at least at one of the die position recognition locations—the wafer supply unit 10, the intermediate stage unit 30, and the bonding unit 40—but it is more preferable to perform it at all locations. Performing inspection at the wafer supply unit 10 allows for early detection of scratches. Performing inspection at the intermediate stage unit 30 allows for detection of scratches that could not be detected at the wafer supply unit 10 or that occurred after the pickup process (i.e., scratches that did not become apparent before the die bonding process) before bonding. Performing inspection at the bonding unit 40 allows for detection of scratches that could not be detected at the wafer supply unit 10 or the intermediate stage unit 30 (i.e., scratches that did not become apparent before the die bonding process) or that occurred after the die bonding process before bonding the next die or before the substrate is ejected.

[0041] Below, the surface inspection for scratches will be explained using the wafer supply unit 10 as an example, but the intermediate stage unit 30 and bonding unit 40 can also be inspected with a similar configuration.

[0042] A dark-field inspection system using the dark-field method will be described with reference to Figs. 6 to 8. Fig. 6 is a diagram showing an example of the configuration of a dark-field inspection system. The upper side of Fig. 6 is a top view, and the lower side is a front view. Fig. 7 is a diagram showing an image captured in the dark-field inspection system shown in Fig. 6. Fig. 8 is a diagram explaining the diffused light width and incident light width.

[0043] As shown in FIG. 6, the wafer recognition camera 14 is disposed above the surface of the die D to be inspected. The wafer recognition camera 14 is composed of a camera body 141 and a lens 142. The field of view CV of the wafer recognition camera 14 includes the die D to be inspected and part or all of the surrounding dies Dp adjacent to it. The illumination device 15 is an oblique illumination device such as an oblique light bar, and irradiates illumination light IL near the outside of the die D to be inspected at a predetermined angle (first predetermined angle) with respect to the optical axis OA. Here, the illumination light IL is irradiated toward the surrounding dies Dp adjacent to the X2 side of the die D. The light-emitting surface of the illumination device 15 extends in the Y direction. The irradiation direction of the illumination light IL in the horizontal direction is the X1 direction. Note that the die D has a square or rectangular shape in a plan view.

[0044] Because the surface of the die D has extremely strong specular reflection characteristics, most light is specularly reflected, including some diffusely reflected light, and does not enter the lens 142, resulting in a dark image as shown in Figure 7. In contrast, scratches K on the surface of the die D have diffuse reflection characteristics. As shown in Figure 8, with diffuse reflection, the reflection angle of the reflected light on the subject surface SP has a width. Here, diffuse reflection only considers the width of the main light ray (light that is incident light INL and is reflected in the specular direction on the surface of the die D). In this specification, the diffusion width angle θd of the reflected light is referred to as the diffuse light width or reflected light NA.

[0045] scratch The diffuse reflected light of K has directionality along the reflection angle of the specular reflected light, but because the NA of the diffuse reflected light of the scratch K spreads, the diffuse reflected light enters the lens 142 and appears bright. This makes it possible to perform dark-field inspection of the scratch K with the surface of the die D as the background.

[0046] To clarify the illumination for surface inspection in this embodiment, the problem of illumination for detecting flaws will be explained using Fig. 9. Fig. 9 is a diagram for explaining the change in flaw detection sensitivity depending on the illumination direction.

[0047] 9A is provided on the X2 side of the die D. The illumination surface of the illumination device 15 extends in the Y direction (first direction). The illumination direction (incident direction) of the illumination light IL in the horizontal direction is the X1 direction (second direction). The side (first side) SD1 of the die D facing the illumination device 15 extends in the Y direction (first direction).

[0048] The die D may be composed of a memory cell region MR and a logic circuit region CR. The surface of the memory cell region MR has a large specular reflection component. The logic circuit region CR is an area where circuit patterns, wiring, and pads are located. In the logic circuit region CR, the reflected light has a large diffuse reflection component, similar to the scratch K. Furthermore, slight irregularities on the surface of the logic circuit region CR cause specular reflection in a direction other than the horizontal direction of the die surface. As a result, the reflected light is focused by the lens 142, and the logic circuit region CR appears bright, as shown in Figure 9A. This makes it difficult to distinguish between the logic circuit region CR and the scratch K in the background, reducing inspection sensitivity.

[0049] In other words, when oblique illumination is applied, the memory cell region MR reflects less light, but the logic circuit region CR reflects more light, resulting in a brighter image. The logic circuit region CR has similar reflection characteristics to the flaw K, and the brightness ratio (contrast ratio) between the background and the flaw K is large in the memory cell region MR. However, in the logic circuit region CR, the brightness ratio between the background and the flaw K is small, resulting in a decrease in inspection sensitivity. For this reason, the flaw K on the memory cell region MR is visible, but the flaw K on the logic circuit region CR is difficult to visualize.

[0050] Next, illumination for surface inspection in this embodiment will be described with reference to Fig. 9. The horizontal incidence angle of illumination light IL shown in Fig. 9B is slightly tilted from the X1 direction to the Y2 direction. The horizontal incidence angle of illumination light IL shown in Fig. 9C is greatly tilted from the X1 direction to the Y2 direction.

[0051] The reflection characteristics of the light reflected from the logic circuit region CR and the light reflected from the scratch K vary greatly depending on the horizontal angle of incidence of the incident illumination light IL. This is because the fine three-dimensional structure of the surface of the logic circuit region CR and the fine three-dimensional structure of the scratch K strongly reflect incident light perpendicular to the side of the convex portion toward the lens 142 directly above. Because the fine structures of the scratch K and the logic circuit region CR are similar, the reflected light exhibits similar properties, but the wall surface of the three-dimensional structure of the scratch K is not as uniform as that of the logic circuit region CR. For this reason, there is a slight difference in the spread of the reflected light between the reflection characteristics of the scratch K and the logic circuit region CR, with the diffusion angle of the reflected light being slightly larger for the scratch K.

[0052] Here, most of the pattern wiring in the logic circuit region CR is parallel or perpendicular to the direction along the edge of the die (X direction or Y direction). Therefore, even if the incident direction of the illumination light IL in the horizontal direction is slightly rotated, the light reflected in the direction of the lens 142 in the logic circuit region CR is reduced.

[0053] The scratches K are generated, for example, when pressure is applied from below the die D, so that they grow in accordance with the stacking structure or silicon crystal direction of the die D, and tend to form in a direction close to the direction along the edge of the die D (X direction or Y direction). Therefore, the reflection characteristics of the scratches K are similar to those of the logic circuit region CR. However, because the scratches K are not controlled grooves, the reflection angle width of the reflected light is slightly wider and not uniform than that of the logic circuit region CR. Therefore, with respect to the rotation of the incident direction of the illumination light IL in the horizontal direction, the reflection angle width of the scratches K is wider than that of the logic circuit region CR, and light remains reflected toward the lens 142 for a small angle.

[0054] In other words, the NA of the reflected light from the scratch K is slightly larger than the NA of the reflected light from the logic circuit region CR. Because the NA of the reflected light from the logic circuit region CR is small, even a slight deviation in the incident angle of the illumination light IL prevents light from entering the lens 142, resulting in a dark image of the logic circuit region CR, as shown in FIG. 9B. Due to the difference in the NA of the reflected light, the incident angle at which the image begins to darken is slightly larger than that of the logic circuit region CR. This difference is used to separate the reflected light from the scratch K and the reflected light from the logic circuit region CR, allowing the scratch K and the logic circuit region CR to be distinguished from each other. The illumination light IL may be diffused light, but in this case, it should have a narrow incident light width (preferably 15° or narrower). In this specification, the angular width θw of the light incident from the light source light-emitting surface LS onto the object surface SP, as shown in FIG. 8B, is referred to as the incident light width or incident light NA.

[0055] 9C, when the angle deviation of the illumination light IL becomes larger, the images of the scratches K on the surface of the memory cell region MR and the scratches K on the surface of the logic circuit region CR become darker. It becomes difficult to distinguish between the logic circuit region CR as a background and the scratches K, and the inspection sensitivity decreases.

[0056] The vertical irradiation direction of illumination light IL from illumination device 15 is tilted at a predetermined angle (first predetermined angle) with respect to the optical axis of wafer recognition camera 14. The first predetermined angle may be a high angle of 5 degrees or more and 45 degrees or less, or a low angle of 45 degrees or more and 95 degrees or less, but a low angle is preferable.

[0057] The horizontal direction of illumination light IL from the illumination device 15 is tilted at a predetermined angle (second predetermined angle) with respect to the direction (X direction) in which the side (second side) SD2 of the die D extends. The second predetermined angle is preferably, for example, between 1 degree and 20 degrees. This creates the state shown in FIG. 9B, and scratches are detected by binary processing the image captured by the wafer recognition camera 14.

[0058] In order to obtain the second predetermined angle suited to the properties of various dies, a rotation mechanism may be provided in the lighting device or the like, and the angle at which reflected light disappears in the logic circuit area may be determined by teaching.

[0059] The rotation mechanism for changing the irradiation direction of illumination light IL in the horizontal direction will be described with reference to Figs. 10 to 12. Fig. 10 is a diagram showing a first example of rotating the illumination device in the horizontal direction. Fig. 11 is a diagram showing a second example of rotating the illumination device in the horizontal direction. Fig. 12 is a diagram showing a third example of rotating the die in the horizontal direction.

[0060] 10 to 12 show an example in which two lighting devices 15_1 and 15_2 are provided. The lighting device 15_1 is provided on the X2 side of the die D, and the lighting device 15_2 is provided on the Y1 side of the die D. This makes it possible to detect not only flaws extending in the Y direction but also flaws extending in the X direction. Note that lighting devices may also be provided on the X1 and Y2 sides of the die D.

[0061] As shown in FIG. 10, the lighting devices 15_1 and 15_2 include a rotation mechanism that rotates in the horizontal direction around the horizontal center of the lighting devices 15_1 and 15_2 as the rotation center.

[0062] As shown in FIG. 11, the lighting devices 15_1 and 15_2 are provided with a rotation mechanism that rotates in the horizontal direction around the center of the die D as the rotation center.

[0063] 12, lighting devices 15_1 and 15_2 are fixed, and a rotation mechanism is provided that rotates die D in the horizontal direction around the center of die D. A driving unit such as a rotation mechanism included in wafer holder 12 can be used. For surface inspection of scratches in intermediate stage unit 30, a rotation mechanism included in intermediate stage 31 can be used.

[0064] <Modification> Below, several representative modified examples of the embodiment are given. In the following description of the modified examples, the same reference numerals as those in the above-described embodiment may be used for parts having the same configurations and functions as those described in the above-described embodiment. Furthermore, the description of such parts may be appropriately cited within the scope of not being technically inconsistent. Furthermore, a part of the above-described embodiment and all or part of the multiple modified examples may be appropriately applied in a composite manner within the scope of not being technically inconsistent.

[0065] In the embodiment, an example has been described in which the illumination direction is changed by rotating the illumination device 15 or the die D, but if the illumination is diffused light illumination, the illumination device 15 or the die D may be moved linearly or the lighting position of the illumination device 15 may be changed.

[0066] This will be explained using Figure 13. Figure 13 is a diagram illustrating another example of changing the illumination direction from the illumination device relative to the die. Figure 13A is a diagram illustrating an example of moving the illumination device relative to the die. Figure 13B is a diagram illustrating an example of changing the lighting position of the illumination device. Illumination device 15 shown in Figure 13 is placed on the X2 side of die D, and the illumination surface of illumination device 15 extends in the Y direction.

[0067] As shown in A of Figure 13, the illumination device 15 is moved in the Y direction (Y1 direction) so that the width of the incident light excludes the area directly to the side. For example, even if the logic circuit area CR is in an area of ​​the die D (area RA surrounded by a rectangle) located on the Y2 side of the perpendicular line (dashed line) at the Y2 end of the illumination device 15, scratches can be detected. By moving the illumination device 15, the area RA moves, making it possible to detect scratches in the entire logic circuit area CR of the die D. Alternatively, the illumination device 15 may be fixed and the die D moved in the Y direction (Y2 direction).

[0068] 13B, a portion of the illumination of the illumination device 15 is turned off, and the incident light width excludes the area directly to the side. For example, the length of the illumination surface of the illumination device 15 in the Y direction is made longer than the Y direction of the die D, and the illuminated area 15a is provided on the end side in the Y1 direction and the end side in the Y2 direction. Even if the logic circuit area CR is located in the area of ​​the die D (area RA surrounded by a rectangle) located on the unlit side of the perpendicular line (dashed line) at the boundary between the illuminated area 15a and the unlit area 15b, scratches can be detected. By moving the boundary between the illuminated area 15a and the unlit area 15b of the illumination device 15, the area RA moves, and scratches can be detected throughout the entire logic circuit area CR of the die D.

[0069] The number of lighting areas 15a may be increased so that the light emitting surface of the lighting device 15 lights up in a striped pattern. By lighting up the striped pattern alternately, the number of times images are taken can be reduced, and the inspection speed can be increased.

[0070] The invention made by the present inventors has been specifically described above based on embodiments and modifications, but it goes without saying that the present disclosure is not limited to the above embodiments and modifications, and various modifications are possible.

[0071] For example, in the embodiment, die appearance inspection recognition is performed after die position recognition, but die appearance inspection recognition may be performed after die position recognition.

[0072] Furthermore, although a DAF is attached to the back surface of the wafer in the embodiment, the DAF may be omitted.

[0073] In addition, although the embodiment includes one pickup head and one bonding head, there may be two or more of each. Also, although the embodiment includes an intermediate stage, there may be no intermediate stage. In this case, the pickup head and bonding head may be combined.

[0074] In addition, although bonding is performed with the front side of the die facing up in the embodiment, it is also possible to flip the die after picking it up and bond it with the back side facing up. In this case, there is no need to provide an intermediate stage. This device is called a flip-chip bonder.

[0075] In addition, although the embodiments have been described using a die bonder (semiconductor manufacturing equipment) that places a die on a substrate as an example, the present invention can also be applied to an inspection device that inspects the surface of a wafer (die) before it is loaded into the die bonder, or an inspection device that inspects the surface of a die that has been loaded onto a substrate that has been loaded from the die bonder. [Explanation of symbols]

[0076] 1. Die bonder (semiconductor manufacturing equipment) 14. Wafer recognition camera (imaging device) 15. Lighting equipment 80 Control unit

Claims

1. an imaging device that captures an image of a die having, in a plan view, a first side extending in a first direction and a second side along a second direction intersecting the first direction; an illumination device that is an oblique lighting device having a rectangular light-emitting surface composed of long sides and short sides, the long side of the light-emitting surface being arranged to face the first side, and that is arranged to irradiate illumination light at a first predetermined angle with respect to an optical axis of the imaging device; a control unit configured to adjust a direction in which illumination light is irradiated onto the first side of the die in a plan view; A semiconductor manufacturing device comprising:

2. 2. The semiconductor manufacturing apparatus of claim 1, The illumination device is configured to irradiate illumination light at a second predetermined angle with respect to the second direction in a plan view.

3. 3. The semiconductor manufacturing apparatus according to claim 2, the lighting device has a rotation mechanism, The control unit is configured to adjust the second predetermined angle by the rotation mechanism.

4. 3. The semiconductor manufacturing apparatus according to claim 2, Further, a wafer holder having a rotation mechanism is provided, The control unit is configured to adjust the second predetermined angle by the rotation mechanism.

5. 3. The semiconductor manufacturing apparatus according to claim 2, Further, an intermediate stage having a rotation mechanism is provided, The control unit is configured to adjust the second predetermined angle by the rotation mechanism.

6. 2. The semiconductor manufacturing apparatus of claim 1, The semiconductor manufacturing apparatus is configured such that the illumination device is movable relative to the die in the first direction.

7. 2. The semiconductor manufacturing apparatus of claim 1, The lighting device is a semiconductor manufacturing device configured to change a lighting area.

8. The semiconductor manufacturing apparatus according to any one of claims 1 to 7, the die has a memory area and a logic circuit area; the control unit is configured to capture multiple images of the die using the imaging device while changing the horizontal irradiation direction of the illumination light from the illumination device, and to obtain the angle at which reflected light from the logic circuit area disappears based on changes in brightness of the logic circuit area in the captured images.

9. an imaging device that captures an image of a die having, in a plan view, a first side extending in a first direction and a second side along a second direction intersecting the first direction; an illumination device that is an oblique lighting device having a rectangular light-emitting surface composed of long sides and short sides, the long side of the light-emitting surface being arranged to face the first side, and that is arranged to irradiate illumination light at a first predetermined angle with respect to an optical axis of the imaging device; a control unit configured to adjust a direction in which illumination light is irradiated onto the first side of the die in a plan view; An inspection device comprising:

10. a step of carrying a wafer ring into a semiconductor manufacturing apparatus including: an imaging device that images a die having, in a plan view, a first side extending in a first direction and a second side along a second direction intersecting the first direction; an illumination device that is an oblique light illuminator having a rectangular light-emitting surface composed of long sides and short sides, the long side of the light-emitting surface being arranged to face the first side, and that is arranged to irradiate illumination light at a first predetermined angle with respect to an optical axis of the imaging device; and a control unit configured to be able to adjust the direction in which the illumination light is irradiated onto the first side of the die in a plan view; a step of inspecting for scratches on a die attached to a dicing tape held on the wafer ring; A method for manufacturing a semiconductor device comprising:

Citation Information

Patent Citations

  • Semiconductor manufacturing device and method for manufacturing semiconductor device

    JP2020013841A