Oscillation circuit

The oscillator circuit uses separate power supplies with different voltage-temperature characteristics for capacitance and resistance inverters, addressing the challenge of stabilizing oscillation frequency and reducing mask and area requirements, achieving ±1% accuracy for high-precision clocks.

JP2025152794APending Publication Date: 2025-10-10ROHM CO LTD
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Patent Information

Application Number
JP2024054873
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-28
Publication Date
2025-10-10

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Abstract

To provide an oscillation circuit that can suppress increases in the number of masks and area when stabilizing the oscillation frequency against temperature changes, compared to using two types of resistors with opposite temperature characteristics.SOLUTION: An oscillation circuit includes a capacitance provided in a positive feedback path, a resistance provided in a negative feedback path, an input inverter having an input connected to one end of the capacitance and one end of the resistance, a capacitance inverter having an output connected to the other end of the capacitance, and a resistance inverter having an output connected to the other end of the resistance, and the capacitance inverter and the resistance inverter are respectively supplied with power supplies having different voltage-temperature characteristics.SELECTED DRAWING: Figure 6
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Description

[Technical Field]

[0001] The technology of the present disclosure relates to an oscillator circuit. [Background technology]

[0002] Patent Document 1 states that "the oscillator comprises first to fourth inverters 1 to 4 connected in series, a capacitor 5 connected between the input terminal of the first inverter 1 and the output terminal of the second inverter 2, and a resistor circuit 6 connected between the input terminal of the first inverter 1 and the output terminal of the third inverter 3, and by configuring the resistor circuit 6 as a circuit combining a first resistor 7 having a negative temperature coefficient of resistance and a second resistor 8 having a positive temperature coefficient of resistance, the time constant becomes stable against temperature changes and the stability of the oscillation frequency is improved." [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-333298 Summary of the Invention [Problem to be solved by the invention]

[0004] Conventionally, a technique has been known for RC oscillator circuits to stabilize the oscillation frequency against temperature changes by canceling out the temperature characteristics using two types of resistors with opposite temperature characteristics. However, this conventional technique has the problem of requiring an increased number of masks because two types of resistors are used, and also of a larger area because a semiconductor resistor and a metal resistor with a low resistance are used.

[0005] Therefore, the present disclosure aims to provide an oscillation circuit that can suppress increases in the number of masks and area when stabilizing the oscillation frequency against temperature changes, compared to when using two types of resistors with opposite temperature characteristics. [Means for solving the problem]

[0006] The oscillator circuit according to the present disclosure comprises a capacitance provided in a positive feedback path, a resistance provided in a negative feedback path, an input inverter having an input connected to one end of the capacitance and one end of the resistance, a capacitance inverter having an output connected to the other end of the capacitance, and a resistance inverter having an output connected to the other end of the resistance, and the capacitance inverter and the resistance inverter are each supplied with power supplies having different voltage-temperature characteristics. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 2 is a diagram showing an example of a circuit configuration of an oscillator circuit 100′ according to a comparative example. [Figure 2] FIG. 4 is a diagram showing an example of an operating waveform in an oscillator circuit 100' according to a comparative example. [Figure 3] FIG. 10 is a diagram illustrating an example of an oscillation frequency error in an oscillator circuit 100′ according to a comparative example. [Figure 4] 10 is a diagram showing an example of an oscillation frequency error when the voltage temperature characteristics of the normal power supply VDDL are changed. FIG. [Figure 5] FIG. 10 is a diagram showing a change in oscillation frequency error relative to the slope of the normal power supply VDDL. [Figure 6] 1 is a diagram showing an example of a circuit configuration of an oscillator circuit 100 according to a first embodiment. [Figure 7] FIG. 2 is a diagram illustrating an example of a circuit configuration of a power supply system according to the present embodiment. [Figure 8] FIG. 2 is a diagram illustrating an example of a circuit configuration of a bandgap unit. [Figure 9] FIG. 2 is a diagram illustrating an example of a circuit configuration of a regulator unit. [Figure 10] 10 is a diagram showing an example of an operation waveform when the power supply voltage of the capacitor inverter 120 is lowered. FIG. [Figure 11] 10 is a diagram showing an example of an operation waveform when the power supply voltage of the capacitor inverter 120 is increased. FIG. [Figure 12]10 is a diagram showing an example of an oscillation frequency error when the temperature characteristics of the first regulated power supply VDDC are changed. FIG. [Figure 13] FIG. 10 is a diagram showing a change in an oscillation frequency error with respect to the gradient of the first regulated power supply VDDC. [Figure 14] FIG. 10 is a diagram illustrating the relationship between variations in band gap and oscillation frequency error. [Figure 15] FIG. 10 is a diagram showing an example of a circuit configuration of an oscillator circuit 100 according to a second embodiment. [Figure 16] 10 is a diagram showing an example of an operation waveform when the power supply voltage of the resistor inverter 140 is lowered. FIG. [Figure 17] 10 is a diagram showing an example of an operating waveform when the power supply voltage of the resistor inverter 140 is increased. FIG. [Figure 18] 10 is a diagram illustrating an example of an oscillation frequency error when the temperature characteristic of the second regulated power supply VDDR is changed. FIG. [Figure 19] FIG. 10 is a diagram showing a change in an oscillation frequency error with respect to the slope of the second regulated power supply VDDR. [Figure 20] FIG. 10 is a diagram illustrating the relationship between variations in band gap and oscillation frequency error. DETAILED DESCRIPTION OF THE INVENTION

[0008] An example of an embodiment of the technology of the present disclosure will be described below with reference to the drawings. Note that the same reference numerals are used to designate identical or equivalent components and parts in each drawing. Furthermore, the dimensional proportions of the drawings may be exaggerated for the sake of explanation and may differ from the actual proportions.

[0009] It should be noted that, where the term "connection" is used hereafter, this term means an electrical connection and may be broadly interpreted to include not only a direct connection but also an indirect connection (e.g., a connection via a passive component).

[0010] Furthermore, when the term "between" is used from here on, the term may be interpreted as meaning the positional relationship of the electrical connection, not the positional relationship of the physical arrangement.

[0011] Generally, applications that use UART (Universal Asynchronous Receiver Transmitter) communication require clock accuracy to prevent communication errors. However, ultra-high-precision clocks such as crystal oscillators with an accuracy of ±200 ppm or less are often not required. Instead, high-precision clocks with an accuracy of ±1% or less, such as ceramic oscillators, are often required.

[0012] Recently, microcontrollers with built-in oscillator circuits that meet ±1% accuracy have been released. Demand for these microcontrollers is expected to remain strong. However, achieving ±1% accuracy with a built-in microcontroller poses the challenge of how to flatten the temperature characteristics of the oscillator frequency.

[0013] The oscillation frequency of a conventional RC oscillator circuit was adjusted by trimming resistors. For example, the oscillation accuracy at room temperature (25°C) can be increased by increasing the trimming accuracy. However, the oscillation frequency of an oscillator circuit has temperature characteristics.

[0014] Here, the temperature characteristics of the oscillation frequency of a conventional RC oscillator circuit have been adjusted by the following methods. The first method, as described in Patent Document 1, is to use two types of resistors with opposite temperature characteristics for the resistance of the RC oscillator, thereby canceling and adjusting the temperature characteristics. However, this method requires two types of resistors, which raises concerns about an increase in the number of masks, and also poses the problem of a larger surface area due to the use of a semiconductor resistor and a metal resistor with a low resistance value.

[0015] The second method is to adjust the temperature characteristics of the hysteresis width of the threshold of the comparator, which receives an oscillation signal distorted by the resistance and capacitance of the RC oscillator, by creating a resistor ladder using two types of resistors with opposite temperature characteristics. However, this method requires two types of resistors, which raises concerns about an increase in the number of masks, and also raises the issue of a larger surface area because the resistor ladder that generates the reference voltage uses semiconductor resistors and low-resistance metal resistors. Furthermore, if the resistor ladder that generates the reference voltage that creates the comparator threshold is made larger in order to reduce current consumption, the surface area will increase even further.

[0016] The third method is to use a CI oscillator circuit to adjust the gradient of the temperature characteristics of the current. However, this method has the problem that when the current is small, variations in the current can lead to a decrease in yield.

[0017] The fourth method is to adjust the temperature characteristics of the power supply voltage of the entire RC oscillator circuit. However, this method is not expected to be effective for low-speed oscillation, and there is a concern that the operating margin may be insufficient. To address this issue, we will use simulation to adjust the temperature characteristics of the low-speed RC oscillation frequency.

[0018] 1 is a diagram showing an example of a circuit configuration of an oscillator circuit 100′ according to a comparative example. The oscillator circuit 100′ includes an input inverter 110, a capacitance inverter 120, a negative feedback inverter 130, a resistor inverter 140, an output inverter 150, a resistor R, a capacitor Cs, and a capacitor Cvr.

[0019] The capacitor Cvr has one end connected to the terminal RC and the other end connected to a reference potential. The input inverter 110 has an input connected to the terminal RC and an output connected to the terminal A. The capacitor inverter 120 has an input connected to the terminal A and an output connected to the terminal C. The capacitor Cs has one end connected to the terminal RC and the other end connected to the terminal C. The negative feedback inverter 130 has an input connected to the terminal A and an output connected to the terminal B. The resistor inverter 140 has an input connected to the terminal B and an output connected to the terminal D. The resistor R has one end connected to the terminal RC and the other end connected to the terminal D. The output inverter 150 has an input connected to the terminal A and an output connected to the terminal OUT, which is the output terminal of the oscillation circuit 100′.

[0020] Here, a positive feedback path is formed by the input inverter 110, the capacitance inverter 120, and the capacitance Cs. Also, a negative feedback path is formed by the input inverter 110, the negative feedback inverter 130, the resistance inverter 140, and the resistance R. This allows the oscillation circuit 100' to function as an RC oscillation circuit.

[0021] Thus, the oscillator circuit 100' includes a capacitance Cs provided in the positive feedback path, a resistance R provided in the negative feedback path, an input inverter 110 whose input is connected to one end of the capacitance Cs and one end of the resistance R, a capacitance inverter 120 whose output is connected to the other end of the capacitance Cs, and a resistance inverter 140 whose output is connected to the other end of the resistance R.

[0022] The oscillator circuit 100' may further include a negative feedback inverter 130 having an input connected to the output of the input inverter 110 and an output connected to the input of the resistor inverter 140. The oscillator circuit 100' may further include an output inverter 150 having an input connected to the output of the input inverter 110 and an output connected to the output terminal.

[0023] In the oscillator circuit 100′ according to the comparative example, a common power supply, that is, a normal power supply VDDL, is supplied to all inverters, that is, the input inverter 110, the capacitance inverter 120, the negative feedback inverter 130, the resistor inverter 140, and the output inverter 150. Here, the normal power supply VDDL is assumed to be a power supply whose voltage-temperature characteristics are not adjusted.

[0024] 2 is a diagram showing an example of operating waveforms in an oscillator circuit 100' according to a comparative example. In this diagram, the horizontal axis represents time, and the vertical axis represents voltage. In addition, this diagram shows, from top to bottom, voltage waveforms at terminal RC, terminal A, terminal B, terminal C, terminal D, and terminal out.

[0025] The operation of the oscillator circuit 100' will be explained using this diagram. First, current flows into terminal RC via resistor R, and the voltage at terminal RC gradually rises. Then, when the voltage at terminal RC becomes slightly higher than the threshold value of the input inverter 110, the output of the input inverter 110 becomes "L". Then, the output of the capacitance inverter 120 immediately becomes "H". This causes the voltage at terminal RC to suddenly jump up via capacitance Cs. In parallel with this, the output of the resistance inverter 140 becomes "L". As a result, the voltage at terminal RC gradually drops via resistor R.

[0026] Next, when the voltage at terminal RC becomes slightly lower than the threshold value of input inverter 110, the output of input inverter 110 becomes "H". Then, the output of capacitance inverter 120 becomes "L" first. As a result, the voltage at terminal RC suddenly drops via capacitance Cs. In parallel with this, the output of resistor inverter 140 becomes "H". As a result, the voltage at terminal RC gradually rises via resistor R.

[0027] The main purpose of using such an oscillator circuit 100' is to generate a clock. However, as shown in this figure, the signal at terminal RC is an analog signal and therefore cannot be used as a clock. Therefore, terminal OUT, which is connected from terminal RC via input inverter 110 and output inverter 150, is used as the clock output terminal.

[0028] Here, the clock period of terminal OUT, i.e., the clock oscillation frequency, is determined by the period at which terminal RC changes. At this time, terminal RC repeatedly charges and discharges with a time constant determined by resistance R and capacitances Cs and Cvr, so the oscillation frequency of oscillator circuit 100' is determined almost entirely by resistance R, capacitance Cs, and capacitance Cvr. In this case, if the oscillation frequency of oscillator circuit 100' is f, the oscillation frequency can be expressed by the following logical formula. However, the oscillation frequency of oscillator circuit 100' is not flat with respect to temperature changes and contains an error.

number

[0029] 3 is a diagram showing an example of an oscillation frequency error in an oscillator circuit 100' according to a comparative example. In this diagram, the horizontal axis represents temperature in units of °C, and the vertical axis represents oscillation frequency error in units of %.

[0030] This figure shows the simulation results of the oscillation frequency error when the normal power supply VDDL is not changed at 1.5 V at a low temperature of -40°C, a normal temperature of 25°C, and a high temperature of 90°C. This figure shows that an error of about -0.8% occurs at a low temperature of -40°C, and an error of about 0.2% occurs at a high temperature of 90°C.

[0031] In this simulation, the error was within this range. However, this is the result of a simple simulation that does not take into account the temperature characteristics of the resistors. If the temperature characteristics of the resistors were included, an error of about -2% at a low temperature of -40°C and about 1.5% at a high temperature of 90°C would likely occur. As a result, the total error would exceed ±1%, and as a result, there is concern that UART communication may fail if such a clock is used. Therefore, adjusting the temperature characteristics of the RC oscillator circuit is considered an important technology.

[0032] Here, it is conceivable that the oscillation frequency error can be reduced by changing the characteristics of the normal power supply VDDL with respect to temperature. Specifically, it is assumed that a higher voltage of the normal power supply VDDL reduces delays in elements such as inverters, or reduces the output impedance of the resistor inverter 140, thereby increasing the oscillation frequency. Conversely, it is assumed that a lower voltage of the normal power supply VDDL reduces the oscillation frequency.

[0033] Using this mechanism, we simulate by giving the normal power supply VDDL a slope of the voltage temperature characteristics, such as increasing the voltage of the normal power supply VDDL to reduce the frequency error when the temperature is low because the oscillation frequency is low, and decreasing the voltage of the normal power supply VDDL to reduce the frequency error when the temperature is high because the oscillation frequency is high.

[0034] 4 is a diagram showing an example of the oscillation frequency error when the voltage temperature characteristics of the normal power supply VDDL are changed. In this figure, the definitions of the axes are the same as in FIG. 3, so the explanation will be omitted here.

[0035] In this figure, the solid line shows the simulation results of the oscillation frequency error when the normal power supply VDDL is changed to 1.3V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.7V at a high temperature of 90°C. The dotted line shows the simulation results of the oscillation frequency error when the normal power supply VDDL is changed to 1.4V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.6V at a high temperature of 90°C. The dashed line shows the simulation results of the oscillation frequency error when the normal power supply VDDL remains unchanged at 1.5V at a low temperature of -40°C, a room temperature of 25°C, and a high temperature of 90°C. The dashed line shows the simulation results of the oscillation frequency error when the normal power supply VDDL is changed to 1.6V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.4V at a high temperature of 90°C. In addition, the long dashed double-dashed line in this figure shows the simulation results of the oscillation frequency error when the normal power supply VDDL is changed to 1.7 V at a low temperature of -40°C, 1.5 V at a normal temperature of 25°C, and 1.3 V at a high temperature of 90°C.

[0036] According to this figure, it can be seen that the temperature characteristics of the oscillation frequency become closer to flat when the dotted line, i.e., when the normal power supply VDDL is changed to 1.6 V at a low temperature of -40°C, 1.5 V at a room temperature of 25°C, and 1.4 V at a high temperature of 90°C, or when the long dotted line, i.e., when the normal power supply VDDL is changed to 1.7 V at a low temperature of -40°C, 1.5 V at a room temperature of 25°C, and 1.3 V at a high temperature of 90°C, is used.

[0037] The solid line corresponds to applying a gradient of 200mV / 65°C to the normal power supply VDDL. The dotted line corresponds to applying a gradient of 100mV / 65°C to the normal power supply VDDL. The dashed line corresponds to applying a gradient of 0mV / 65°C to the normal power supply VDDL. The dotted line corresponds to applying a gradient of -100mV / 65°C to the normal power supply VDDL. The long dotted line corresponds to applying a gradient of -200mV / 65°C to the normal power supply VDDL. Here, the gradient of the normal power supply VDDL and the change in oscillation frequency error are summarized.

[0038] Figure 5 shows the change in oscillation frequency error with respect to the slope of the normal power supply VDDL. In this figure, the horizontal axis shows the slope of the voltage temperature characteristics of the normal power supply VDDL in units of [mV / 65°C]. Also, in this figure, the vertical axis shows the oscillation frequency error in units of [%].

[0039] In this figure, the solid line indicates the simulation results at a low temperature of -40°C, the dotted line indicates the simulation results at a normal temperature of 25°C, and the dashed line indicates the simulation results at a high temperature of 90°C.

[0040] This figure shows that by applying a gradient of about -150 mV / 65°C to the normal power supply VDDL, the oscillation frequency error can be kept within ±0.5%. Here, a gradient of -150 mV / 65°C corresponds to changing the normal power supply VDDL to 1.65 V at a low temperature of -40°C, 25 V at a normal temperature of 25°C, and 1.35 V at a high temperature of 90°C. However, if the normal power supply VDDL is changed to 1.35 V at a high temperature of 90°C, there is a concern that the operating margin may be insufficient.

[0041] 6 is a diagram showing an example of the circuit configuration of the oscillator circuit 100 according to the first embodiment. In this diagram, the same or equivalent components or parts as those in FIG. 1 are denoted by the same reference numerals, and descriptions thereof will be omitted hereinafter except for differences.

[0042] The oscillator circuit 100 according to the first embodiment differs from the oscillator circuit 100' according to the conventional example in that the power supply supplied to the capacitor inverter 120 is changed from the normal power supply VDDL to a first regulated power supply VDDC. That is, the power supply for the capacitor inverter 120 is an independent power supply separated from the normal power supply VDDL. What is important here is that the power supply for the capacitor inverter 120 and the power supply for the resistor inverter 140 are separated and isolated as separate power supplies in order to disrupt the balance between RC charging and discharging.

[0043] The normal power supply VDDL is a power supply whose voltage-temperature characteristic is not adjusted. On the other hand, the first regulated power supply VDDC is a power supply whose voltage-temperature characteristic is adjusted. That is, the oscillator circuit 100 according to the first embodiment includes a capacitance Cs provided in a positive feedback path, a resistance R provided in a negative feedback path, an input inverter 110 whose input is connected to one end of the capacitance Cs and one end of the resistance R, a capacitance inverter 120 whose output is connected to the other end of the capacitance Cs, and a resistance inverter 140 whose output is connected to the other end of the resistance R, and the capacitance inverter 120 and the resistance inverter 140 are respectively supplied with power supplies whose voltage-temperature characteristics are different from each other.

[0044] As mentioned above, the first regulated power supply VDDC is a power supply with an adjusted voltage-temperature characteristic. Therefore, a bandgap regulator or a power supply mechanism that combines a bandgap regulator and a regulator is required as a circuit to generate a power supply with an adjusted voltage-temperature characteristic.

[0045] Fig. 7 is a diagram showing an example of the circuit configuration of a power supply system according to this embodiment. Fig. 8 is a diagram showing an example of the circuit configuration of a bandgap unit. Fig. 9 is a diagram showing an example of the circuit configuration of a regulator unit. The power supply system, bandgap unit, and regulator unit may have the same circuit configuration as existing circuits, and therefore detailed description thereof will be omitted here.

[0046] In the present embodiment, a regulated power supply with an adjusted voltage-temperature characteristic may be supplied to one of the capacitance inverter 120 and the resistance inverter 140, and a normal power supply with an unadjusted voltage-temperature characteristic may be supplied to the other of the capacitance inverter 120 and the resistance inverter 140. However, in the first embodiment, a first regulated power supply VDDC is supplied to the capacitance inverter 120, and a normal power supply VDDL is supplied to the resistance inverter 140. That is, in the first embodiment, a slope of the voltage-temperature characteristic is given only to the power supply of the capacitance inverter 120.

[0047] By applying a slope to the voltage temperature characteristics only to the power supply of the capacitor inverter 120, it is expected that the oscillation frequency will change by changing the height of the voltage jump or the depth of the voltage jump, which is a sudden change caused by the capacitance Cs in positive feedback operation. The specific mechanism by which the oscillation frequency changes will be explained below.

[0048] 10 is a diagram showing an example of an operation waveform when the power supply voltage of the capacitor inverter 120 is lowered. In this diagram, the definitions of the axes are the same as in FIG. 2, so the explanation will be omitted here.

[0049] In this figure, the solid line indicates the simulation result when the power supply voltage of the capacitor inverter 120 is lowered, and the dotted line indicates the simulation result when the power supply voltage of the capacitor inverter 120 is not changed.

[0050] As shown in this figure, when the power supply voltage of the capacitor inverter 120 is lowered, the voltage jumps up and down due to the capacitance Cs become smaller, resulting in a shorter charge and discharge time. This shortens the oscillation period and increases the oscillation frequency. In actual RC oscillation, the oscillation frequency decreases at low temperatures, so this is canceled out by lowering the power supply voltage of the capacitor inverter 120, thereby increasing the oscillation frequency.

[0051] 11 is a diagram showing an example of an operating waveform when the power supply voltage of the capacitor inverter 120 is increased. In this diagram, the definitions of the axes are the same as in FIG. 2, so the explanation will be omitted here.

[0052] In this figure, the solid line indicates the simulation result when the power supply voltage of the capacitor inverter 120 is increased, and the dotted line indicates the simulation result when the power supply voltage of the capacitor inverter 120 is not changed.

[0053] As shown in this figure, when the power supply voltage of the capacitor inverter 120 is increased, the voltage jumps up and down due to the capacitance Cs become larger, resulting in a longer charge and discharge time. This increases the oscillation period and lowers the oscillation frequency. Therefore, in actual RC oscillation, the oscillation frequency increases at high temperatures, so by increasing the power supply voltage of the capacitor inverter 120, the oscillation frequency is lowered and canceled out.

[0054] In the comparative example, it is assumed that the power supply for the resistor inverter 140, which is the power supply for the resistor R that causes RC oscillation, and the power supply for the capacitor inverter 120, which is the power supply for the capacitor Cs, are both a common power supply VDDL, which determines the charging and discharging time of RC.

[0055] In contrast to this, in the first embodiment, in order to change the RC charge / discharge time, the slope of the voltage-temperature characteristics is changed between the normal power supply VDDL, which is the power supply for the resistor inverter 140, and the first regulated power supply VDDC, which is the power supply for the capacitor inverter 120. The aim of changing the slope of the voltage-temperature characteristics between the normal power supply VDDL and the first regulated power supply VDDC is to cancel the temperature characteristics of the oscillation frequency of the basic RC oscillator circuit by using the difference in temperature characteristics between the normal power supply VDDL and the first regulated power supply VDDC. This will be described in detail.

[0056] 12 is a diagram showing an example of an oscillation frequency error when the temperature characteristics of the first regulated power supply VDDC are changed. In this figure, the definitions of the axes are the same as in FIG. 3, so explanations will be omitted here.

[0057] In this figure, the solid line (thin line) shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.47V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.53V at a high temperature of 90°C. Also, in this figure, the dotted line (thin line) shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.475V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.525V at a high temperature of 90°C. Also, in this figure, the dashed line (thin line) shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.48V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.52V at a high temperature of 90°C. In addition, the dashed line (thin line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.485V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.515V at a high temperature of 90°C. In addition, the long-dashed line (thin line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.49V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.51V at a high temperature of 90°C. In addition, the long-dashed line (thin line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.495V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.505V at a high temperature of 90°C. In addition, the long dashed line (thin line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is left unchanged at 1.5 V at a low temperature of -40°C, a normal temperature of 25°C, and a high temperature of 90°C.

[0058] In addition, the solid line (bold line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.505V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.495V at a high temperature of 90°C. In addition, the dotted line (bold line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.51V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.49V at a high temperature of 90°C. In addition, the dashed line (bold line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.515V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.485V at a high temperature of 90°C. In addition, the dashed line (bold line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.52V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.48V at a high temperature of 90°C. In addition, the long-dashed line (bold line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.525V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.475V at a high temperature of 90°C. In addition, the long-dashed line (bold line) in this figure shows the simulation results of the oscillation frequency error when the first regulated power supply VDDC is changed to 1.53V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.47V at a high temperature of 90°C.

[0059] This figure shows that the temperature characteristics of the oscillation frequency change as the slope of the voltage temperature characteristics applied to the first regulated power supply VDDC is changed. In this case, this figure shows that the temperature characteristics of the oscillation frequency become flattest when the first regulated power supply VDDC is changed to 1.485V at a low temperature of -40°C, 1.5V at a normal temperature of 25°C, and 1.515V at a high temperature of 90°C, as shown by the dashed line (thin line).

[0060] The solid line (thin line) corresponds to applying a gradient of 30 mV / 65°C to the first regulated power supply VDDC. The dotted line (thin line) corresponds to applying a gradient of 25 mV / 65°C to the first regulated power supply VDDC. The dashed line (thin line) corresponds to applying a gradient of 20 mV / 65°C to the first regulated power supply VDDC. The dashed line (thin line) corresponds to applying a gradient of 15 mV / 65°C to the first regulated power supply VDDC. The long dashed line (thin line) corresponds to applying a gradient of 10 mV / 65°C to the first regulated power supply VDDC. The long chain line (thin line) corresponds to applying a gradient of 5 mV / 65°C to the first regulated power supply VDDC. The long chain double-dashed line (thin line) corresponds to applying a gradient of 0 mV / 65°C to the first regulated power supply VDDC.

[0061] The solid line (bold line) corresponds to applying a slope of -5mV / 65°C to the first regulated power supply VDDC. The dotted line (bold line) corresponds to applying a slope of -10mV / 65°C to the first regulated power supply VDDC. The dashed line (bold line) corresponds to applying a slope of -15mV / 65°C to the first regulated power supply VDDC. The dotted line (bold line) corresponds to applying a slope of -20mV / 65°C to the first regulated power supply VDDC. The long-dashed line (bold line) corresponds to applying a slope of -25mV / 65°C to the first regulated power supply VDDC. The long-dashed line (bold line) corresponds to applying a slope of -30mV / 65°C to the first regulated power supply VDDC. Here, the slope of the first regulated power supply VDDC and the change in oscillation frequency error are summarized.

[0062] 13 shows the change in oscillation frequency error with respect to the slope of the first regulated power supply VDDC. In this figure, the horizontal axis represents the slope of the voltage temperature characteristics of the first regulated power supply VDDC in units of [mV / 65°C]. Also, in this figure, the vertical axis represents the oscillation frequency error in units of [%].

[0063] In this figure, the solid line indicates the simulation results at a low temperature of -40°C, the dotted line indicates the simulation results at a normal temperature of 25°C, and the dashed line indicates the simulation results at a high temperature of 90°C.

[0064] As shown in this figure, when the slope of the first regulated power supply VDDC is smaller than 0 mV / 65°C, i.e., when the slope of the first regulated power supply VDDC is negative, the simulation results at a low temperature of -40°C and the simulation results at a high temperature of 90°C become far apart. Therefore, in the first embodiment, the capacitance inverter 120 may be supplied with a first regulated power supply VDDC whose voltage has a positive slope with respect to temperature. In this case, according to this figure, when a slope of 15 mV / 65°C is applied to the first regulated power supply VDDC, the simulation results at a low temperature of -40°C, a normal temperature of 25°C, and a high temperature of 90°C become closest.

[0065] 14 is a diagram showing the relationship between the variation in the band gap and the oscillation frequency error. In this figure, the definitions of the axes and waveforms are the same as those in FIG. 13, so the explanation will be omitted here.

[0066] This figure assumes that the first regulated power supply VDDC is generated using a bandgap with a target slope of 15mV / 65°C, with a base voltage of 1.5V at room temperature (25°C). In this figure, region X assumes that the temperature characteristics of the bandgap are trimmed, and indicates the region where the bandgap variation is ±1%. Regions Y and Z assume that the temperature characteristics of the bandgap are fixed, and indicate the regions where the bandgap variation is ±2% and ±3%, respectively.

[0067] In this figure, the graph with a positive horizontal axis breaks off at 30 mV / 65°C, but since the graph is almost a straight line, it will be treated as symmetrical.

[0068] Here, if we focus on region X, when the bandgap variation is ±1%, the first regulated power supply VDDC varies by a maximum of ±15 mV, which is ±1% of 1.5 V. In this case, it can be seen that the oscillation frequency error is in the range of -0.8% to 0.2%.

[0069] Furthermore, when we look at region Y, if the bandgap variation is ±2%, the first regulated power supply VDDC varies by a maximum of ±30 mV, which is ±2% of 1.5 V. In this case, it can be seen that the oscillation frequency error is in the range of -1.3% to 0.7%.

[0070] Furthermore, when we look at region Z, if the bandgap variation is ±3%, the first regulated power supply VDDC varies by a maximum of ±45 mV, which is ±3% of 1.5 V. In this case, we can see that the oscillation frequency error is in the range of -1.8% to 1.2%.

[0071] Therefore, to reliably keep the oscillation frequency error within ±1%, the positive slope of the first regulated power supply VDDC should be greater than 0 mV / 65°C and less than 30 mV / 65°C. Preferably, the positive slope of the first regulated power supply VDDC should be 15 mV / 65°C. Taking all of the above into consideration, it can be said that trimming the temperature characteristics of the bandgap is ideal for reliably keeping the oscillation frequency error within ±1%.

[0072] The oscillation frequency is determined by the relative relationship between the temperature characteristics of the first regulated power supply VDDC supplied to the capacitor inverter 120 and the temperature characteristics of the normal power supply VDDL supplied to the resistor inverter 140. Therefore, it is necessary to trim the temperature characteristics of not only the band gap that generates the first regulated power supply VDDC but also the band gap that generates the normal power supply VDDL. The temperature characteristics of the band gap are adjusted as follows.

[0073] It is generally known that the temperature characteristics change depending on, for example, the resistance value of resistor R3 in Figure 8 and the multiplier ratio of diodes D1 and D2. However, changing these parameters also changes the voltage at room temperature (25°C). Therefore, it is necessary to select and adjust the resistance values ​​of resistors R11 and R12 in Figure 7.

[0074] There are concerns about the impact of the difference between the normal power supply VDDL and the first regulated power supply VDDC, but there is a capacitance Cs between them that only passes AC components, so there is no impact on the terminal RC. There are also concerns about the voltage difference between the normal power supply VDDL and the first regulated power supply VDDC, but since the voltage difference is very small, it is thought that simply inserting a resistor will suffice. There is also concern about delays, but in that case, a level shifter can be inserted.

[0075] In this way, in the oscillator circuit 100 according to this embodiment, power supplies having different voltage-temperature characteristics are supplied to the capacitance inverter 120 and the resistance inverter 140. More specifically, a regulated power supply whose voltage-temperature characteristic is adjusted may be supplied to one of the capacitance inverter 120 and the resistance inverter 140, and a normal power supply whose voltage-temperature characteristic is not adjusted may be supplied to the other of the capacitance inverter 120 and the resistance inverter 140.

[0076] As a result, according to the oscillator circuit 100 of this embodiment, the power supply for the capacitor inverter 120 and the power supply for the resistor inverter 140 are separated and isolated as separate power supplies, which can disrupt the balance of RC charging and discharging. Therefore, according to the oscillator circuit 100 of this embodiment, the oscillation frequency can be stabilized against temperature changes by simply giving a slight gradient to one of the power supplies, compared to when adjusting the temperature characteristics of the power supply voltage of the entire RC oscillator circuit.

[0077] In particular, in the oscillator circuit 100 according to the first embodiment, a first regulated power supply VDDC whose voltage has a positive gradient with respect to temperature may be supplied to the capacitor inverter 120. As a result, according to the oscillator circuit 100 according to the first embodiment, the oscillation frequency can be stabilized by changing the height of the voltage jump or the depth of the voltage jump, which is a sudden change caused by the capacitor Cs in a positive feedback operation.

[0078] In this case, the positive slope may be greater than 0 mV / 65°C and less than 30 mV / 65°C. As a result, the oscillation circuit 100 according to the first embodiment can keep the oscillation frequency error within ±1%. In particular, it is preferable that the positive slope is 15 mV / 65°C. As a result, the oscillation circuit 100 according to the second embodiment can minimize the oscillation frequency error.

[0079] 15 is a diagram showing an example of the circuit configuration of an oscillator circuit 100 according to the second embodiment. In this diagram, the same reference numerals are used to designate components or parts that are the same as or equivalent to those in FIG. 1, and descriptions thereof will be omitted hereinafter except for differences.

[0080] The oscillator circuit 100 according to the second embodiment differs from the oscillator circuit 100' according to the conventional example in that the power supply supplied to the resistor inverter 140 is changed from the normal power supply VDDL to a second regulated power supply VDDR. That is, the power supply for the resistor inverter 140 is an independent power supply separated from the normal power supply VDDL. What is important here is that, as with the first embodiment, the power supply for the capacitor inverter 120 and the power supply for the resistor inverter 140 are separated and isolated as separate power supplies in order to disrupt the balance between RC charging and discharging.

[0081] The normal power supply VDDL is a power supply whose voltage-temperature characteristic is not adjusted. On the other hand, the second regulated power supply VDDR is a power supply whose voltage-temperature characteristic is adjusted. That is, the oscillator circuit 100 according to the second embodiment also includes a capacitance Cs provided in the positive feedback path, a resistance R provided in the negative feedback path, an input inverter 110 whose input is connected to one end of the capacitance Cs and one end of the resistance R, a capacitance inverter 120 whose output is connected to the other end of the capacitance Cs, and a resistance inverter 140 whose output is connected to the other end of the resistance R, and the capacitance inverter 120 and the resistance inverter 140 are respectively supplied with power supplies whose voltage-temperature characteristics are different from each other.

[0082] In the present embodiment, a regulated power supply with an adjusted voltage-temperature characteristic may be supplied to one of the capacitance inverter 120 and the resistor inverter 140, and a normal power supply with an unadjusted voltage-temperature characteristic may be supplied to the other of the capacitance inverter 120 and the resistor inverter 140. However, in the second embodiment, a second regulated power supply VDDR is supplied to the resistor inverter 140, and a normal power supply VDDL is supplied to the capacitance inverter 120. That is, in the second embodiment, a slope of the voltage-temperature characteristic is given only to the power supply of the resistor inverter 140.

[0083] By providing a slope of the voltage temperature characteristic only to the power supply of the resistor inverter 140, it is expected that the oscillation frequency will change by changing the speed of charging and discharging, which is a gradual change due to the negative feedback operation of the resistor R. The specific mechanism by which the oscillation frequency changes will be explained below.

[0084] 16 is a diagram showing an example of an operating waveform when the power supply voltage of the resistor inverter 140 is lowered. In this diagram, the definitions of the axes are the same as in FIG. 2, so the explanation will be omitted here.

[0085] In this figure, the solid line indicates the simulation result when the power supply voltage of the resistor inverter 140 is lowered, and the dotted line indicates the simulation result when the power supply voltage of the resistor inverter 140 is not changed.

[0086] As shown in this figure, when the power supply voltage of the resistor inverter 140 is lowered, the voltage jumps and drops due to the capacitance Cs remain the same, but the charging and discharging speed slows down, resulting in a longer charging and discharging time. This increases the oscillation period and lowers the oscillation frequency. In actual RC oscillation, the oscillation frequency increases at high temperatures, so lowering the power supply voltage of the resistor inverter 140 lowers the oscillation frequency and cancels this.

[0087] 17 is a diagram showing an example of an operating waveform when the power supply voltage of the resistor inverter 140 is increased. In this diagram, the definitions of the axes are the same as in FIG. 2, so a description thereof will be omitted here.

[0088] In this figure, the solid line indicates the simulation result when the power supply voltage of the resistor inverter 140 is increased, and the dotted line indicates the simulation result when the power supply voltage of the resistor inverter 140 is not changed.

[0089] As shown in this figure, when the power supply voltage of the resistor inverter 140 is increased, the voltage jumps and drops due to the capacitance Cs remain the same, but the charging and discharging speed increases, resulting in a shorter charging and discharging time. This shortens the oscillation period and increases the oscillation frequency. Therefore, in actual RC oscillation, the oscillation frequency decreases at low temperatures, so increasing the power supply voltage of the resistor inverter 140 increases the oscillation frequency and cancels this out.

[0090] In the comparative example, it is assumed that the power supply for the capacitance inverter 120, which is the power supply for the capacitance Cs that causes RC oscillation, and the power supply for the resistance inverter 140, which is the power supply for the resistance R, are both a common normal power supply VDDL, and this determines the charging and discharging time of RC.

[0091] In contrast to this, in the second embodiment, in order to change the RC charge / discharge time, the slope of the voltage-temperature characteristics is changed between the normal power supply VDDL, which is the power supply for the capacitance inverter 120, and the second regulated power supply VDDR, which is the power supply for the resistor inverter 140. The aim of changing the slope of the voltage-temperature characteristics between the normal power supply VDDL and the second regulated power supply VDDR is to cancel the temperature characteristics of the oscillation frequency of the basic RC oscillator circuit by using the difference in temperature characteristics between the normal power supply VDDL and the second regulated power supply VDDR. This will be explained in detail.

[0092] 18 is a diagram showing an example of an oscillation frequency error when the temperature characteristic of the second regulated power supply VDDR is changed. In this figure, the definitions of the axes are the same as in FIG. 3, so the explanation will be omitted here.

[0093] In this figure, the solid line (thin line) shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.47V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.53V at a high temperature of 90°C. Also, in this figure, the dotted line (thin line) shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.475V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.525V at a high temperature of 90°C. Also, in this figure, the dashed line (thin line) shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.48V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.52V at a high temperature of 90°C. In addition, the dashed line (thin line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.485V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.515V at a high temperature of 90°C. In addition, the long-dashed line (thin line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.49V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.51V at a high temperature of 90°C. In addition, the long-dashed line (thin line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.495V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.505V at a high temperature of 90°C. In addition, the long dashed line (thin line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is left unchanged at 1.5V at a low temperature of -40°C, a normal temperature of 25°C, and a high temperature of 90°C.

[0094] In addition, the solid line (bold line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.505V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.495V at a high temperature of 90°C. In addition, the dotted line (bold line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.51V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.49V at a high temperature of 90°C. In addition, the dashed line (bold line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.515V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.485V at a high temperature of 90°C. In addition, the dashed line (bold line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.52V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.48V at a high temperature of 90°C. In addition, the long-dashed line (bold line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.525V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.475V at a high temperature of 90°C. In addition, the long-dashed line (bold line) in this figure shows the simulation results of the oscillation frequency error when the second regulated power supply VDDR is changed to 1.53V at a low temperature of -40°C, 1.5V at a room temperature of 25°C, and 1.47V at a high temperature of 90°C.

[0095] This figure shows that the temperature characteristics of the oscillation frequency change as the slope of the voltage temperature characteristics applied to the second regulated power supply VDDR is changed. In this case, this figure shows that the temperature characteristics of the oscillation frequency become flattest when the second regulated power supply VDDR is changed from 1.515V at a low temperature of -40°C, to 1.5V at a normal temperature of 25°C, and to 1.485V at a high temperature of 90°C, as shown by the dashed line (bold line).

[0096] The solid line (thin line) corresponds to applying a gradient of 30 mV / 65°C to the second regulated power supply VDDR. The dotted line (thin line) corresponds to applying a gradient of 25 mV / 65°C to the second regulated power supply VDDR. The dashed line (thin line) corresponds to applying a gradient of 20 mV / 65°C to the second regulated power supply VDDR. The dashed line (thin line) corresponds to applying a gradient of 15 mV / 65°C to the second regulated power supply VDDR. The long dashed line (thin line) corresponds to applying a gradient of 10 mV / 65°C to the second regulated power supply VDDR. The long chain line (thin line) corresponds to applying a gradient of 5 mV / 65°C to the second regulated power supply VDDR. The long chain double-dashed line (thin line) corresponds to applying a gradient of 0 mV / 65°C to the second regulated power supply VDDR.

[0097] The solid line (bold line) corresponds to applying a slope of -5mV / 65°C to the second regulated power supply VDDR. The dotted line (bold line) corresponds to applying a slope of -10mV / 65°C to the second regulated power supply VDDR. The dashed line (bold line) corresponds to applying a slope of -15mV / 65°C to the second regulated power supply VDDR. The dotted line (bold line) corresponds to applying a slope of -20mV / 65°C to the second regulated power supply VDDR. The long-dashed line (bold line) corresponds to applying a slope of -25mV / 65°C to the second regulated power supply VDDR. The long-chain line (bold line) corresponds to applying a slope of -30mV / 65°C to the second regulated power supply VDDR. Here, the slope of the second regulated power supply VDDR and the change in oscillation frequency error are summarized.

[0098] 19 shows the change in oscillation frequency error with respect to the slope of the second regulated power supply VDDR. In this figure, the horizontal axis represents the slope of the voltage temperature characteristics of the second regulated power supply VDDR in units of [mV / 65°C]. The vertical axis represents the oscillation frequency error in units of [%].

[0099] In this figure, the solid line indicates the simulation results at a low temperature of -40°C, the dotted line indicates the simulation results at a normal temperature of 25°C, and the dashed line indicates the simulation results at a high temperature of 90°C.

[0100] As shown in this figure, when the slope of the second regulated power supply VDDR is greater than 0 mV / 65°C, i.e., when the slope of the second regulated power supply VDDR is positive, the simulation results at a low temperature of -40°C and a high temperature of 90°C become far apart. Therefore, in the second embodiment, the resistor inverter 140 may be supplied with a second regulated power supply VDDR whose voltage has a negative slope with respect to temperature. In this case, according to this figure, when a slope of -15 mV / 65°C is applied to the second regulated power supply VDDR, the simulation results at a low temperature of -40°C, a normal temperature of 25°C, and a high temperature of 90°C become closest.

[0101] 20 is a diagram showing the relationship between the variation in band gap and the oscillation frequency error. In this figure, the definitions of the axes and waveforms are the same as those in FIG. 13, so the explanation will be omitted here.

[0102] This figure assumes that the second regulated power supply VDDR is generated using a bandgap with a target slope of -15mV / 65°C, with a base voltage of 1.5V at room temperature (25°C). In this figure, region X assumes that the temperature characteristics of the bandgap are trimmed, and indicates the region where the bandgap variation is ±1%. Regions Y and Z assume that the temperature characteristics of the bandgap are fixed, and indicate the regions where the bandgap variation is ±2% and ±3%, respectively.

[0103] In this figure, the graph with a negative horizontal axis breaks off at -30 mV / 65°C, but since the graph is almost a straight line, it will be treated as symmetrical.

[0104] Here, if we focus on region X, when the bandgap variation is ±1%, the second regulated power supply VDDR varies by a maximum of ±15 mV, which is ±1% of 1.5 V. In this case, it can be seen that the oscillation frequency error is in the range of -0.8% to 0.2%.

[0105] Furthermore, in region Y, when the bandgap variation is ±2%, the second regulated power supply VDDR varies by a maximum of ±30 mV, which is ±2% of 1.5 V. In this case, it can be seen that the oscillation frequency error is in the range of -1.3% to 0.7%.

[0106] Furthermore, in region Z, when the bandgap variation is ±3%, the second regulated power supply VDDR varies by a maximum of ±45 mV, which is ±3% of 1.5 V. In this case, it can be seen that the oscillation frequency error is in the range of -1.8% to 1.2%.

[0107] Therefore, in order to reliably keep the oscillation frequency error within ±1%, the negative slope of the second regulated power supply VDDR should be greater than -30 mV / 65°C and less than 0 mV / 65°C. Preferably, the negative slope of the second regulated power supply VDDR should be -15 mV / 65°C. Taking all of the above into consideration, it can be said that trimming the temperature characteristics of the bandgap is ideal for reliably keeping the oscillation frequency error within ±1%.

[0108] In this way, in the oscillator circuit 100 according to this embodiment, power supplies having different voltage-temperature characteristics are supplied to the capacitance inverter 120 and the resistance inverter 140. More specifically, a regulated power supply whose voltage-temperature characteristic is adjusted may be supplied to one of the capacitance inverter 120 and the resistance inverter 140, and a normal power supply whose voltage-temperature characteristic is not adjusted may be supplied to the other of the capacitance inverter 120 and the resistance inverter 140.

[0109] As a result, according to the oscillator circuit 100 of this embodiment, the power supply for the capacitor inverter 120 and the power supply for the resistor inverter 140 are separated and isolated as separate power supplies, which can disrupt the balance of RC charging and discharging. Therefore, according to the oscillator circuit 100 of this embodiment, the oscillation frequency can be stabilized against temperature changes by simply giving a slight gradient to one of the power supplies, compared to when adjusting the temperature characteristics of the power supply voltage of the entire RC oscillator circuit.

[0110] In particular, in the oscillator circuit 100 according to the second embodiment, a second regulated power supply whose voltage has a negative gradient with respect to temperature may be supplied to the resistor inverter 140. As a result, according to the oscillator circuit 100 according to the second embodiment, the oscillation frequency can be stabilized by changing the rate of charging and discharging, which is a gradual change due to the resistor R in the negative feedback operation.

[0111] In this case, the negative slope may be greater than -30 mV / 65°C and less than 0 mV / 65°C. As a result, the oscillation circuit 100 according to the second embodiment can keep the oscillation frequency error within ±1%. In particular, it is preferable that the negative slope is -15 mV / 65°C. As a result, the oscillation circuit 100 according to the second embodiment can minimize the oscillation frequency error.

[0112] Up to this point, the first and second embodiments have been described as examples in which they can be implemented. As described above, in this embodiment, the voltage difference between the normal power supply VDDL and the first regulated power supply VDDC or the second regulated power supply VDDR is used, but ultimately, the present invention will be realized as long as there is a difference between the power supply voltage of the capacitance inverter 120 and the power supply voltage of the resistor inverter 140, so the method of supplying power is not limited to the above description.

[0113] Furthermore, with regard to the temperature characteristic trimming of the first regulated power supply VDDC and the second regulated power supply VDDR, both may be fixed or temperature characteristic trimming may be performed. Furthermore, if the oscillation frequency is monitored during temperature characteristic trimming, the normal power supply VDDL may be fixed and the temperature characteristic trimming of the first regulated power supply VDDC and the second regulated power supply VDDR may be performed, or the first regulated power supply VDDC and the second regulated power supply VDDR may be fixed and the temperature characteristic trimming of the normal power supply VDDL may be performed.

[0114] This disclosure also includes the following:

[0115] (Appendix 1) a capacitance provided in the positive feedback path; a resistor provided in the negative feedback path; an input inverter whose input is connected to one end of the capacitance and one end of the resistor; a capacitance inverter whose output is connected to the other end of the capacitance; a resistor inverter whose output is connected to the other end of the resistor; the capacitance inverter and the resistance inverter are supplied with power supplies having different voltage-temperature characteristics, respectively; Oscillator circuit. (Appendix 2) a regulated power supply having an adjusted voltage-temperature characteristic is supplied to one of the capacitance inverter and the resistance inverter; a normal power supply whose voltage-temperature characteristics are not adjusted is supplied to the other of the capacitance inverter and the resistance inverter; 10. The oscillator circuit of claim 1. (Appendix 3) The capacitor inverter is supplied with a first regulated power supply whose voltage has a positive slope with respect to temperature. 1. The oscillator circuit of claim 2. (Appendix 4) the positive slope is greater than 0 mV / 65°C and less than 30 mV / 65°C; 4. The oscillator circuit of claim 3. (Appendix 5) The positive slope is 15 mV / 65°C. 5. The oscillator circuit of claim 4. (Appendix 6) The resistor inverter is supplied with a second regulated power supply whose voltage has a negative slope with respect to temperature. 1. The oscillator circuit of claim 2. (Appendix 7) the negative slope is greater than -30mV / 65°C and less than 0mV / 65°C; 7. The oscillator circuit of claim 6. (Appendix 8) The negative slope is −15 mV / 65° C. 8. The oscillator circuit of claim 7. (Appendix 9) a negative feedback inverter having an input connected to the output of the input inverter and an output connected to the input of the resistor inverter; 9. The oscillator circuit according to any one of claims 1 to 8. (Appendix 10) an output inverter having an input connected to the output of the input inverter and an output connected to an output terminal; 10. The oscillator circuit according to any one of claims 1 to 9. [Explanation of symbols]

[0116] 100 Oscillator Circuit 110 Input Inverter 120 capacity inverter 130 Negative feedback inverter 140 Resistor Inverter 150 output inverter

Claims

1. a capacitance provided in the positive feedback path; a resistor provided in the negative feedback path; an input inverter whose input is connected to one end of the capacitance and one end of the resistor; a capacitance inverter whose output is connected to the other end of the capacitance; a resistor inverter whose output is connected to the other end of the resistor; the capacitance inverter and the resistance inverter are supplied with power supplies having different voltage-temperature characteristics, respectively; Oscillator circuit.

2. a regulated power supply having an adjusted voltage-temperature characteristic is supplied to one of the capacitance inverter and the resistance inverter; a normal power supply whose voltage-temperature characteristics are not adjusted is supplied to the other of the capacitance inverter and the resistance inverter; 2. The oscillator circuit according to claim 1.

3. The capacitor inverter is supplied with a first regulated power supply whose voltage has a positive slope with respect to temperature.

3. The oscillator circuit according to claim 2.

4. the positive slope is greater than 0 mV / 65°C and less than 30 mV / 65°C; 4. The oscillator circuit according to claim 3.

5. The positive slope is 15 mV / 65°C.

5. The oscillator circuit according to claim 4.

6. The resistor inverter is supplied with a second regulated power supply whose voltage has a negative slope with respect to temperature.

3. The oscillator circuit according to claim 2.

7. the negative slope is greater than −30 mV / 65° C. and less than 0 mV / 65° C.; 7. The oscillator circuit according to claim 6.

8. The negative slope is −15 mV / 65° C.

8. The oscillator circuit according to claim 7.

9. a negative feedback inverter having an input connected to the output of the input inverter and an output connected to the input of the resistor inverter; 9. The oscillator circuit according to claim 1.

10. an output inverter having an input connected to the output of the input inverter and an output connected to an output terminal; 9. The oscillator circuit according to claim 1.

Citation Information

Patent Citations

  • CR oscillator and manufacturing method thereof

    JP2005333298A