Multilayer ceramic electronic component, and method of producing multilayer ceramic electronic component
By integrating a copper-containing intermediate region between dielectric and electrode layers in multilayer ceramic components, the durability and life of these components are enhanced through reduced oxygen defect migration and improved insulation stability.
Patent Information
- Application Number
- JP2024054880
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-28
- Publication Date
- 2025-10-10
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Figure 2025152795000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a multilayer ceramic electronic component and a method for manufacturing a multilayer ceramic electronic component. [Background technology]
[0002] Multilayer ceramic electronic components have a structure in which dielectric layers and internal electrode layers are alternately stacked, and examples of multilayer ceramic electronic components include multilayer ceramic capacitors (MLCCs).
[0003] Multilayer ceramic electronic components such as multilayer ceramic capacitors are mounted and used in a variety of electronic devices, including high-frequency communication systems such as mobile phones, and in-vehicle electronic control devices. For this reason, multilayer ceramic electronic components are required to have improved durability, i.e., longer life, when used under repeated voltage application, and this has been studied for some time (see, for example, Patent Document 1). [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-052964 Summary of the Invention [Problem to be solved by the invention]
[0005] An object of the present disclosure is to provide a multilayer ceramic electronic component having excellent life characteristics. [Means for solving the problem]
[0006] The multilayer ceramic electronic component of the present disclosure comprises: Stacked along the first axis, general formula ABO 3-α A plurality of dielectric layers including a dielectric having a perovskite structure represented by (0≦α≦1); a plurality of internal electrode layers each containing nickel as a main component, the internal electrode layers being disposed between adjacent dielectric layers along the first axis; a first intermediate region containing copper and disposed between the dielectric layer and the internal electrode layer; When three-dimensional atom probe analysis is performed along the first axis from the internal electrode layer to the dielectric layer, The internal electrode layer is a region where the nickel concentration is 70 at% or more, The first intermediate region has a nickel concentration of less than 70 at % and 3-α a region sandwiched between a first boundary portion where the concentration of the B-site element is 20 at % and a second boundary portion where the copper concentration is a peak, in a region where the concentration of the B-site element is 20 at % or more in (0≦α≦1), The copper concentration at the peak of the copper concentration is 1.0 at% or more and 5.0 at% or less, The copper concentration at the peak position of the copper concentration is C(Cu), the concentration of the B-site element is C(B), and the general formula ABO 3-α If the concentration of the A-site element in (0≦α≦1) is C(A), The concentration C calculated by the following formula (1) is 10 at % or more and less than 35 at %.
[0007] C = C(Cu) + C(B) - C(A) (1) [Effects of the Invention]
[0008] According to the present disclosure, it is possible to provide a multilayer ceramic electronic component having excellent life characteristics. [Brief explanation of the drawings]
[0009] [Figure 1] FIG. 1 is a partial cross-sectional perspective view illustrating a multilayer ceramic capacitor according to one embodiment of the present disclosure. [Figure 2] FIG. 2 is a cross-sectional view illustrating a multilayer ceramic capacitor according to one embodiment of the present disclosure. [Figure 3]FIG. 3 is a cross-sectional view illustrating a multilayer ceramic capacitor according to one embodiment of the present disclosure. [Figure 4] FIG. 4 is a cross-sectional view illustrating details of an element body according to one embodiment of the present disclosure. [Figure 5] FIG. 5 is a flowchart of a method for manufacturing a multilayer ceramic capacitor according to one embodiment of the present disclosure. [Figure 6] FIG. 6 is a diagram illustrating a method for manufacturing a multilayer ceramic capacitor according to one embodiment of the present disclosure. [Figure 7] FIG. 7 shows an example of the measurement results of three-dimensional atom probe analysis of the multilayer ceramic capacitor obtained in Example 2. [Figure 8] FIG. 8 shows an example of the measurement results of three-dimensional atom probe analysis of the multilayer ceramic capacitor obtained in Example 9. DETAILED DESCRIPTION OF THE INVENTION
[0010] Embodiments of the present disclosure will be described in detail below, but the present disclosure is not limited thereto. In this specification and the drawings, components having substantially the same functional configurations may be denoted by the same reference numerals to avoid redundant description. The drawings also show, where appropriate, mutually orthogonal X-, Y-, and Z-axes. The X-, Y-, and Z-axes define a fixed coordinate system fixed to a multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component. When the multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component, has an approximately rectangular parallelepiped outer shape, the X-, Y-, and Z-axes may correspond to the length, width, and height of the capacitor. Hereinafter, a multilayer ceramic electronic component of this embodiment will be described using a multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component.
[0011] [Multilayer ceramic electronic components] (1) Structure of multilayer ceramic electronic components FIG. 1 is a partial cross-sectional perspective view illustrating a multilayer ceramic capacitor 100. FIGS. 2 and 3 are cross-sectional views illustrating the multilayer ceramic capacitor. FIG. 2 is a cross-sectional view taken along line AA in FIG. 1. FIG. 3 is a cross-sectional view taken along line BB in FIG. 1. As illustrated in FIGS. 1 to 3, the multilayer ceramic capacitor 100 includes an element body 10 having a substantially rectangular parallelepiped shape. Two opposing surfaces of the element body 10 are referred to as the top and bottom surfaces, and four surfaces connecting the top and bottom surfaces are referred to as side surfaces. Typically, the surface facing the circuit board when the multilayer ceramic capacitor is mounted on the circuit board is referred to as the bottom surface, but this is not limited to this. In the example illustrated in FIGS. 1 to 3, a first external electrode 20a and a second external electrode 20b are provided on two opposing side surfaces of the element body 10, namely, a first side surface 10a and a second side surface 10b (see FIG. 2). The first external electrode 20a extends from the first side surface 10a to the four adjacent surfaces. The second external electrode 20b extends from the second side surface 10b to four adjacent surfaces. However, the first external electrode 20a and the second external electrode 20b are spaced apart from each other. The external electrodes may be provided on any surface of the element body 10, not limited to the two opposing side surfaces.
[0012] The stacking direction in which the dielectric layers 11 and the internal electrode layers 12 are stacked is the first axis, and in Figures 1 to 3, the first axis, which is the stacking direction in which the dielectric layers 11 and the internal electrode layers 12 are stacked, is the Z axis, which is the direction in which the internal electrode layers face each other.
[0013] The axis perpendicular to the first axis, which is the stacking direction, is the second axis. In Figures 1 to 3, the second axis perpendicular to the first axis, which is the stacking direction, is the X-axis. The second axis is along the length direction of the element body 10, and is the axis along the direction in which the first side surface 10a and the second side surface 10b of the element body 10 face each other, and the direction in which the first external electrode 20a and the second external electrode 20b face each other.
[0014] The third axis is an axis perpendicular to the first axis, which is the stacking direction, and perpendicular to the second axis. The third axis is an axis along the width of the internal electrode layer 12. In Figures 1 to 3, the third axis, which is an axis perpendicular to the first axis, which is the stacking direction, and perpendicular to the second axis, is the Y axis, which is an axis along the direction in which the third side surface 10c and the fourth side surface 10d, which are the two side surfaces other than the first side surface 10a and the second side surface 10b, of the four side surfaces of the element body 10, face each other (see Figure 3). The X axis, Y axis, and Z axis are orthogonal to each other.
[0015] The stacking direction is not limited to the Z direction and can be any direction. Therefore, for example, the first axis, which is the stacking direction, may be the X axis in the X direction or the Y axis in the Y direction.
[0016] In this specification, for the purpose of explaining a general embodiment, figures illustrating a specific embodiment may be used, and the content described using the coordinate axis system used in the embodiment is applied to the general embodiment by replacing it with a general coordinate axis system in which the stacking direction is the first axis. For example, what is described as the X-axis, Y-axis, and Z-axis used in Figures 1 to 3 in a specific embodiment, where the stacking direction coincides with the Z-axis, can be replaced with the second axis, third axis, and first axis in the general embodiment.
[0017] The element body 10 has a configuration in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 are alternately stacked. The internal electrode layers 12 include a plurality of first internal electrode layers 12a and a plurality of second internal electrode layers 12b. The first internal electrode layers 12a and the second internal electrode layers 12b are alternately stacked. The edges of the first internal electrode layers 12a extend to the surface of the element body 10 on which the first external electrode 20a is provided, that is, the first side surface 10a in the examples of FIGS. 1 to 3. The edges of the second internal electrode layers 12b extend to the surface of the element body 10 on which the second external electrode 20b is provided, that is, the second side surface 10b in the examples of FIGS. 1 to 3. As a result, the first internal electrode layers 12a and the second internal electrode layers 12b are alternately electrically connected to the first external electrode 20a and the second external electrode 20b. Therefore, the multilayer ceramic capacitor 100 has a configuration in which capacitor units are stacked. In addition, in a laminate of dielectric layers 11 and internal electrode layers 12, the internal electrode layers 12 are arranged as the outermost layers in the lamination direction, and the outer surfaces of the laminate in the lamination direction, i.e., the upper and lower surfaces in the examples of FIGS. 1 to 3, are covered with cover layers 13. The cover layers 13 are mainly composed of a ceramic material. For example, the composition of the cover layers 13 may be the same as or different from that of the dielectric layers 11. Note that the configuration is not limited to that shown in FIGS. 1 to 3 as long as the first internal electrode layers 12a and the second internal electrode layers 12b are exposed in different regions on the surface of the laminate and are conductive to different external electrodes. The different regions on the surface of the laminate may be respective surface regions on opposing surfaces of the laminate, respective surface regions on adjacent surfaces of the laminate, or different surface regions on the same surface of the laminate. As long as the different external electrodes are spaced apart from each other, the first internal electrode layers 12a and the second internal electrode layers 12b may extend from the surfaces exposed in the surface region of the laminate to other surfaces.
[0018] As will be described in detail later, the element body 10 has a plurality of first intermediate regions 401 (see FIG. 4) between the dielectric layer 11 and the internal electrode layer 12. The first intermediate regions 401 are not shown in FIGS. 1 to 3.
[0019] The size of the multilayer ceramic capacitor 100 is not particularly limited, and may be, for example, 0.25 mm long, 0.125 mm wide, and 0.125 mm high; 0.4 mm long, 0.2 mm wide, and 0.2 mm high; 0.6 mm long, 0.3 mm wide, and 0.3 mm high; 1.0 mm long, 0.5 mm wide, and 0.5 mm high; 3.2 mm long, 1.6 mm wide, and 1.6 mm high; or 4.5 mm long, 3.2 mm wide, and 2.5 mm high. However, the above-listed sizes of the multilayer ceramic capacitor 100 are merely examples, and the multilayer ceramic capacitor is not limited to these sizes. The size of the multilayer ceramic capacitor 100 may be, for example, length > width ≥ height; width > length ≥ height; height > length ≥ width; or height > width ≥ length. Note that, for example, length represents the size in the X-axis direction, width represents the size in the Y-axis direction, and height represents the size in the Z-axis direction.
[0020] As described above, the multilayer ceramic capacitor 100 of this embodiment has a plurality of dielectric layers 11 stacked along the Z-axis, which is a first axis, and a plurality of internal electrode layers 12 arranged between adjacent dielectric layers 11 along the first axis. Furthermore, the multilayer ceramic capacitor 100 of this embodiment has a first intermediate region 401 arranged between the dielectric layers 11 and the internal electrode layers 12. The dielectric layers 11, the internal electrode layers 12, and the first intermediate region 401 will be described below.
[0021] In this specification, numbers such as "first" and "second" may be added to the names of components, such as "first intermediate region" and "second intermediate region," but this is added merely to identify the components being described and to avoid confusion, and does not indicate priority, location, etc. Therefore, when there is no risk of confusion or when referring to a group of components, it is also possible to simply write "intermediate region." (2) Dielectric layer The dielectric layer 11 is a compound represented by the general formula ABO 3-α This includes dielectrics with a perovskite structure represented by (0≦α≦1). (2-1) Components contained in the dielectric layer (Compounds with perovskite structure) When a compound having a perovskite structure has a stoichiometric composition, α, which indicates the amount of deviation from the stoichiometric composition, is 0 and is represented by the general formula ABO3. In the compound having a perovskite structure represented by the above general formula, α may be greater than 0 and equal to or less than 1. In other words, the compound having a perovskite structure represented by the above general formula may have more oxygen deficiencies than the stoichiometric composition.
[0022] Compounds with a perovskite structure include barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), and Ba, which forms a perovskite structure. 1-x-y Ca x Sr y Ti 1-z Zr z One or more types selected from O3 (0≦x≦1, 0≦y≦1, 0≦z≦1) and the like can be used.
[0023] Ba 1-x-y Ca x Sr y Ti 1-z Zr z O3 includes barium strontium titanate, barium calcium titanate, barium zirconate, barium titanate zirconate, calcium titanate zirconate, and barium calcium titanate zirconate. Note that any compound having a perovskite structure may contain oxygen deficiencies.
[0024] The dielectric layer 11 preferably contains barium titanate as a compound having a perovskite structure, as this compound has particularly excellent dielectric properties. The dielectric layer 11 may contain barium titanate as a main component, or may be composed solely of barium titanate. Barium titanate has excellent dielectric properties, such as an extremely high dielectric constant and low dielectric loss. Therefore, when the dielectric layer 11 contains barium titanate as a compound having a perovskite structure, the capacitance of the multilayer ceramic capacitor 100 can be increased. In this specification, "contained as a main component" means that the component is contained in the largest amount by substance ratio among the components contained. (Additives) The dielectric layer 11 may contain an additive as an optional component.
[0025] The additives that can be contained in the dielectric layer 11 are not particularly limited, but include zirconium (Zr), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (scandium (Sc), cerium (Ce), neodymium (Nd), yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), and the like. ), thulium (Tm), and ytterbium (Yb), or oxides containing one or more elements selected from cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), and silicon (Si), or glasses containing one or more elements selected from cobalt, nickel, lithium, boron, sodium, potassium, and silicon. (2-2) Thickness of the dielectric layer The thickness of the dielectric layer 11 is not particularly limited, but from the viewpoint of miniaturizing the multilayer ceramic capacitor 100 while increasing the number of layers to increase the capacitance, it is preferably 1.0 μm or less, and more preferably 0.8 μm or less.
[0026] Although there is no particular limitation on the lower limit of the thickness of the dielectric layer 11, from the viewpoint of improving productivity and yield, the minimum thickness can be set to 2 to 4 times the average diameter of the dielectric material particles used. For example, if the average diameter of the dielectric material particles used is 0.1 μm, the lower limit of the thickness of the dielectric layer 11 can be set to 0.2 μm or more to 0.4 μm or more.
[0027] The average diameter of the dielectric material particles can be determined by measuring the particle size of each dielectric material particle in a cross section of the multilayer ceramic capacitor 100 that includes a first axis that is equal to the stacking direction, and taking the average value. The particle size of the dielectric material particles can be measured using an optical microscope, a microscope, a scanning electron microscope (SEM), or the like, as appropriate. The particle size of the dielectric material particles can be taken as the Heywood diameter (the diameter of a circle with an area equal to the area of the dielectric material particle being evaluated) in the observed cross section. The average diameter, which is the average particle size of the dielectric material particles, can be taken as the arithmetic mean value of the particle sizes of 50 to 200 arbitrarily selected dielectric material particles.
[0028] The thickness of the dielectric layer 11 is evaluated in a cross section including a first axis parallel to the stacking direction. For example, it is preferable to evaluate either a cross section including a second axis perpendicular to the stacking direction or a cross section including a third axis perpendicular to the stacking direction and perpendicular to the second axis, due to ease of polishing and measurement. The former involves polishing the multilayer ceramic capacitor 100 along the third axis, while the latter involves polishing along the second axis. Five layers are selected from the center, top, and bottom of the exposed dielectric layer 11 in the first axis direction. If the number of dielectric layers 11 is even, six layers are selected for the center. The thickness of each selected dielectric layer is measured at three locations: the center, left end, and right end. The average of the measured thicknesses is defined as the thickness of each dielectric layer 11. The average thickness of all the selected and evaluated dielectric layers 11 can then be defined as the thickness of the dielectric layer 11 of the multilayer ceramic capacitor 100.
[0029] In the example shown in Figures 1 and 2, the first axis, which is the lamination direction, is the Z-axis direction, so this is an example in which the multilayer ceramic capacitor 100 is polished along the Y-axis, which is the third axis, to expose the XZ plane on which the dielectric layers 11 and the internal electrode layers 12 are laminated.
[0030] In this case, of the exposed XZ plane, five dielectric layers 11 are selected from the center along the Z axis, which is the first axis, and five dielectric layers 11 are selected from the top and bottom along the Z axis, which is the first axis. If the number of dielectric layers 11 is an even number, six layers may be selected from the center. In this case, the selected dielectric layers 11 are selected from within the capacitive section 14.
[0031] Then, for each of the selected dielectric layers 11, the thickness is measured along the X-axis, which is the second axis, at three locations that are ¼, ½, and ¾ of the length of the dielectric layer 11 along the X-axis from the end, and the average value is defined as the thickness of the dielectric layer 11. Using the same procedure, the thicknesses of all the selected dielectric layers 11 are measured, and the average value of all the selected and evaluated dielectric layers 11 can be defined as the thickness of the dielectric layers 11 in the evaluated multilayer ceramic capacitor 100. (3) Internal electrode layers (3-1) Components contained in the internal electrode layer 2, the region where the first internal electrode layer 12a connected to the first external electrode 20a and the second internal electrode layer 12b connected to the second external electrode 20b face each other is a region where capacitance is generated in the multilayer ceramic capacitor 100. Therefore, the region where capacitance is generated is referred to as a capacitance portion 14. In other words, the capacitance portion 14 is a region where adjacent internal electrode layers face each other across a dielectric layer 11 connected to different external electrodes.
[0032] The region where the first internal electrode layers 12a connected to the first external electrode 20a face each other in the stacking direction without the second internal electrode layer 12b connected to the second external electrode 20b intervening therebetween is referred to as the first end margin 15a. The region where the second internal electrode layers 12b connected to the second external electrode 20b face each other in the stacking direction without the first internal electrode layer 12a connected to the first external electrode 20a intervening therebetween is referred to as the second end margin 15b. Each end margin is a region where internal electrode layers connected to the same external electrode face each other in the stacking direction without the internal electrode layers connected to different external electrodes intervening therebetween. The first end margin 15a and the second end margin 15b are regions where internal electrodes of equal potential face each other and do not generate substantial capacitance.
[0033] The side margin 16 is a region provided outside the capacitive section 14 in a direction along the Y-axis in the example of Fig. 3, which is a third axis perpendicular to the stacking direction and perpendicular to the second axis. In other words, the side margin 16 is an outer region adjacent to the capacitive section 14 when viewed from the stacking direction, and is an outer region adjacent to the capacitive section 14 on the side where the internal electrode layer 12 is not drawn out. The side margin 16 is also a region that does not generate electrical capacitance.
[0034] The internal electrode layers 12 contain nickel as a main component. In addition to nickel, the internal electrode layers 12 can contain components used in the internal electrode layers of multilayer ceramic capacitors. In addition to nickel (Ni), the internal electrode layers 12 can also contain base metals such as tin (Sn) and tungsten (W) or alloys containing these. (3-2) Thickness of the internal electrode layer The thickness of the internal electrode layer 12 is not particularly limited, but from the viewpoint of miniaturizing the multilayer ceramic capacitor 100 while increasing the number of layers to increase the capacitance, it is preferably 0.8 μm or less, and more preferably 0.6 μm or less.
[0035] The lower limit of the thickness of the internal electrode layer 12 is not particularly limited, but for example, when a metal conductive paste is printed by a printing method such as screen printing or gravure printing, it can be 0.4 μm or more. For example, when it is formed by a thin film process such as sputtering or vapor deposition, it can be 0.1 μm or more, which is thinner than the thickness achieved by the printing method. The thickness of the internal electrode layer 12 is evaluated in a cross section including a first axis equal to the lamination direction, similar to the evaluation of the thickness of the dielectric layer 11. For example, it is preferable to evaluate in either a cross section that further includes a second axis set perpendicular to the lamination direction, or a cross section that further includes a third axis set perpendicular to the lamination direction and also perpendicular to the second axis, in terms of ease of polishing and measurement.
[0036] Five layers are selected from the center, upper end, and lower end of the exposed internal electrode layers 12 in the first axis direction. If the number of internal electrode layers 12 is an even number, six layers are selected from the center. Then, for each selected internal electrode layer 12, the thickness is measured at three locations: the center, the left end, and the right end, and the average value of the measured thicknesses is defined as the thickness of each internal electrode layer 12. Furthermore, the average value of the thicknesses of all the selected and evaluated internal electrode layers 12 can be defined as the thickness of the internal electrode layers 12 in the multilayer ceramic capacitor 100.
[0037] In the example shown in Figures 1 and 2, the first axis, which is the lamination direction, is the Z-axis direction, so this is an example in which the multilayer ceramic capacitor 100 is polished along the Y-axis, which is the third axis, to expose the XZ plane on which the dielectric layers 11 and the internal electrode layers 12 are laminated.
[0038] In this case, of the exposed XZ plane, five internal electrode layers 12 are selected as those located in the center along the Z axis, which is the first axis, and five internal electrode layers 12 are selected as those located at the top and bottom ends along the Z axis, which is the first axis. If the number of internal electrode layers 12 is an even number, six layers may be selected in the center. In this case, the selected internal electrode layers 12 are selected from within the capacitive section 14.
[0039] Then, for each of the selected internal electrode layers 12, the thickness is measured along the X-axis, which is the second axis, at three locations that are ¼, ½, and ¾ of the length of the internal electrode layer 12 along the X-axis from the end, and the average value is set as the thickness of the internal electrode layer 12. Using the same procedure, the thicknesses of all the selected internal electrode layers 12 are measured, and the average value of the thicknesses of all the selected and evaluated internal electrode layers 12 can be set as the thickness of the internal electrode layers 12 in the evaluated multilayer ceramic capacitor 100. (4) First and second intermediate areas (4-1) Arrangement of the first and second intermediate areas 4 shows an enlarged view of a portion of the dielectric layer 11 and the internal electrode layer 12 of the element body 10. FIG. 4 is an enlarged view of, for example, region C in FIG.
[0040] The multilayer ceramic capacitor 100 has a first intermediate region 401 disposed between the dielectric layer 11 and the internal electrode layer 12 .
[0041] The internal electrode layer 12 and the first intermediate region 401 may be in direct contact with each other, but a second intermediate region 402 may also be provided between the first intermediate region 401 and the internal electrode layer 12 .
[0042] 4 is a schematic diagram, and thus the first intermediate region 401 and the second intermediate region 402 are shown as continuous layers with a constant thickness, but are not limited to this configuration. The first intermediate region 401 and the second intermediate region 402 may be discontinuous, for example, and may have different thicknesses depending on the location. The first intermediate region 401 can be identified by three-dimensional atom probe analysis, which will be described later. Therefore, in the cross section of the multilayer ceramic capacitor 100, there is no need for a clear boundary line between the dielectric layer 11 and the first intermediate region 401 that can be identified by an SEM image or the like. The same is true for the boundary between the first intermediate region 401 and the second intermediate region 402 and between the second intermediate region 402 and the internal electrode layer 12.
[0043] The components contained in the first intermediate region 401 will be explained in "(5) Method for identifying the boundary between each layer." (5) How to identify the boundaries between layers The boundaries of the dielectric layer 11, the internal electrode layer 12, the first intermediate region 401, and the second intermediate region 402 can be identified by three-dimensional atom probe analysis, and the amounts of elements contained therein can also be analyzed.
[0044] The evaluation by three-dimensional atom probe analysis can be carried out using a sample including the vicinity of the interface between the dielectric layer 11 and the internal electrode layer 12, for example.
[0045] To identify the boundaries of each layer and analyze the content ratio of elements, a three-dimensional atom probe (3DAP) can be performed along the Z axis, which is the first axis, from the internal electrode layer 12 to the dielectric layer 11. That is, for example, in FIG. 4, a three-dimensional atom probe analysis can be performed using a sample including a first end 41 in the internal electrode layer 12 to a second end 42 in the dielectric layer 11 along the dotted line D.
[0046] Fig. 7 shows the results of three-dimensional atom probe analysis in Example 2, which will be described later. In Fig. 7, the vertical axis represents the concentration of each element among all the detected elements, i.e., the content ratio. The horizontal axis represents the position of the measurement point along the analysis direction when the three-dimensional atom probe analysis was performed, with a first boundary 72, which will be described later, set as 0. (Internal electrode layer) As shown in Fig. 7, the internal electrode layer 12 is a region where the nickel concentration is 70 at% or more. Therefore, as shown in Fig. 7, the internal electrode layer 12 is a region where the nickel concentration is 70 at% or more, with the line L71 passing through the point 71 where the nickel concentration is 70 at% as the boundary. (1st intermediate area) The first intermediate region 401 has a nickel concentration of less than 70 at % and is represented by the general formula ABO 3-α7, first intermediate region 401 is located within region 70 where the concentration of the B-site element is 20 at% or higher (0≦α≦1). Specifically, within region 70, first intermediate region 401 is located between a first boundary portion where the concentration of the B-site element is 20 at% and a second boundary portion where copper concentration peak 73 corresponds to the peak of the copper concentration. That is, as shown in FIG. 7, first intermediate region 401 is located between a line L72 passing through first boundary portion 72 where the titanium concentration is 20 at% and a line L73 passing through the second boundary portion where copper concentration peak 73 corresponds to the peak of the copper concentration.
[0047] In the following description, the dielectric layer 11 contains the compound of the general formula ABO 3-α The elements A and B other than oxygen contained in the dielectric expressed as (0≦α≦1) are described as A-site elements and B-site elements, respectively.
[0048] That is, the first intermediate region 401 is a region containing copper. The first intermediate region 401 is a region containing a B-site element, copper, and oxygen. The state of the B-site element and copper in the first intermediate region 401 is not particularly limited. It is conceivable that the B-site element and copper form a complex compound, such as a complex oxide, containing the B-site element and copper in the first intermediate region 401. In the first intermediate region 401, the B-site element and copper may exist in one or more states selected from the following: a simple element state without forming a compound; a complex compound, such as a complex oxide, containing the B-site element and copper; and a compound with other elements, forming a B-site element compound and a copper compound. Note that the B-site element and copper may be contained in different states in the first intermediate region 401, for example, and each element may be contained in multiple different forms, such as a simple element and a compound.
[0049] It is believed that by disposing the first intermediate region 401 containing copper between the dielectric layer 11 and the internal electrode layer 12, the electrical barrier height, i.e., the Schottky barrier, between the dielectric layer 11 and the internal electrode layer 12 is increased. Therefore, when a voltage is applied to the multilayer ceramic capacitor 100, the voltage applied to the dielectric layer 11 is reduced by the first intermediate region 401, making the dielectric layer 11 less likely to be damaged even when voltage is repeatedly applied to the multilayer ceramic capacitor 100. As a result, it is believed that the life of the multilayer ceramic capacitor 100 can be improved.
[0050] In conventional multilayer ceramic capacitors, when voltage is repeatedly applied, the dielectric layers may lose their electrical insulation and become conductive, resulting in insulation degradation. This is thought to occur when oxygen defects migrate from the dielectric layers to the vicinity of the interfaces of the internal electrode layers when voltage is applied, resulting in the oxygen defects being concentrated near the interfaces of the internal electrode layers.
[0051] In the multilayer ceramic capacitor 100 of this embodiment, a first intermediate region 401 is disposed between the dielectric layer 11 and the internal electrode layer 12. The first intermediate region 401 contains a B-site element, copper, and oxygen. It is believed that the presence of the first intermediate region 401 in the multilayer ceramic capacitor 100 of this embodiment prevents oxygen defects that move within the dielectric layer 11 from moving to the vicinity of the interface with the internal electrode layer 12 and becoming unevenly distributed when a voltage is applied to the multilayer ceramic capacitor 100. This suppresses insulation degradation and improves the life of the multilayer ceramic capacitor 100.
[0052] The reason why the multilayer ceramic capacitor 100 of this embodiment has the first intermediate region 401 and can prevent oxygen defects from migrating and being concentrated near the interface of the internal electrode layer 12 is not clear, but it is speculated as follows.
[0053] The first intermediate region 401 contains B-site elements, copper, and oxygen, of which copper is generally believed to function as an oxygen donor. Therefore, when oxygen defects migrate from the dielectric layer 11 to the internal electrode layer 12, oxygen is supplied from the copper in the first intermediate region 401 to the first intermediate region 401 and its vicinity, and oxygen is also supplied from the first intermediate region 401, thereby eliminating the oxygen defects. In other words, the migration of oxygen defects is hindered in the first intermediate region 401 and its vicinity, and at least some of the oxygen defects are eliminated. As a result, it is believed that oxygen defects can be prevented from being concentrated near the interface of the internal electrode layer 12, thereby improving the life of the multilayer ceramic capacitor 100.
[0054] From the viewpoint of enhancing the oxygen supply capacity in the first intermediate region 401 and particularly extending the life of the multilayer ceramic capacitor 100, the copper concentration at the copper concentration peak 73 in the first intermediate region 401 is preferably 1.0 at% or higher. However, if the copper concentration at the copper concentration peak 73 is excessively high, the copper concentration in the dielectric layer 11 will be high, which may actually shorten the life of the multilayer ceramic capacitor 100. For this reason, the copper concentration at the copper concentration peak 73 is preferably 5.0 at% or lower. If the first intermediate region 401 contains not only copper but also, for example, B-site elements of a perovskite structure and oxygen, the diffusion of copper alone into the dielectric layer 11 is suppressed. Although the details of this mechanism are unknown, copper diffuses easily into the B-site of the perovskite structure, but its diffusivity is lower than that of B-site elements. Therefore, if B-site elements are present in the first intermediate region 401, they diffuse preferentially over copper, which may potentially suppress the diffusion of copper alone into the dielectric layer 11.
[0055] Therefore, the copper concentration at copper concentration peak 73 determined by three-dimensional atom probe analysis is preferably 1.0 at% or more and 5.0 at% or less. In particular, from the viewpoint of extending the life of multilayer ceramic capacitor 100, the copper concentration at copper concentration peak 73 is more preferably 1.2 at% or more and 3.0 at% or less, and even more preferably 2.0 at% or more and 3.0 at% or less.
[0056] The copper concentration peak 73 is where the nickel concentration is less than 70 at% and the general formula ABO 3-α This is a peak where the copper concentration is locally higher than other parts in the region where the concentration of B-site elements in (0≦α≦1) is 20 at% or more. The presence or absence of a copper concentration peak can be determined by the following procedure. To make the determination, first, a three-dimensional atom probe analysis can be performed along the first axis from the internal electrode layer 12 to the dielectric layer 11.
[0057] From the measurement results, a point where the copper concentration is maximum is extracted from the region. If the copper concentration at the point where the copper concentration is maximum is 1.5 times or more the average copper concentration in a region that is +0.5 nm or more and +2 nm or less away from the first boundary 72 in the direction toward the dielectric layer 11, the point where the copper concentration is maximum can be determined as copper concentration peak 73. In other words, it can be determined that the copper concentration peak 73 exists.
[0058] If the copper concentration at the point where the copper concentration reaches its maximum value is less than 1.5 times the average copper concentration in a region located +0.5 nm or more and +2 nm or less away from the first boundary 72 in the direction toward the dielectric layer 11, it can be determined that there is no copper concentration peak 73. If there is no copper concentration peak 73, there is also no first intermediate region 401. In Figure 7, the direction of the dielectric layer 11 is the direction indicated by the block arrow E.
[0059] Therefore, the copper concentration at copper concentration peak 73 is 1.5 times or more the average copper concentration within a region of region 70 that is +0.5 nm or more and +2 nm or less away from first boundary 72 in the direction of dielectric layer 11 (hereinafter also referred to as the "copper concentration reference region").
[0060] This means that when the copper concentration at copper concentration peak 73 is 1.5 times or more the average copper concentration in the copper concentration reference region, copper is particularly unevenly distributed in first intermediate region 401. Therefore, even if many oxygen vacancies move to the vicinity of first intermediate region 401, it is believed that copper supplies oxygen to the oxygen vacancies, preventing the oxygen vacancy concentration (oxygen vacancy density) in the vicinity of first intermediate region 401 from increasing. As a result, insulation degradation is particularly suppressed, and the life of multilayer ceramic capacitor 100 can be improved.
[0061] In addition, the B-site elements also function as oxygen donors. Therefore, when the copper concentration at the position of copper concentration peak 73 is C(Cu), the concentration of the B-site elements is C(B), and the concentration of the A-site elements is C(A), the concentration C calculated by the following formula (1) is preferably 10 at % or more and less than 35 at %.
[0062] C = C(Cu) + C(B) - C(A) (1) It is considered that although the B-site elements contained in the first intermediate region 401 function as oxygen donors, the B-site elements of the dielectric material contained in the dielectric layer 11, for example, hardly function as oxygen donors.
[0063] Therefore, by setting the total concentration C (Cu) of the copper concentration C(Cu) at the position of the copper concentration peak 73 and C(B)-C(A), which corresponds to the concentration of the B-site element thought to function as an oxygen donor, to 10 at % or more, it is possible to particularly suppress the occurrence of insulation deterioration, thereby improving the life of the multilayer ceramic capacitor 100.
[0064] However, even if the concentration C is made too high, the effect of suppressing the occurrence of insulation deterioration is saturated, so the concentration C can be set to less than 35 at %. (Second intermediate area) The multilayer ceramic capacitor 100 of this embodiment may further include a second intermediate region 402 between the first intermediate region 401 and the internal electrode layer 12 .
[0065] By having the first intermediate region 401 in the multilayer ceramic capacitor 100 of this embodiment, the bonding strength between the dielectric layer 11 and the internal electrode layer 12 can be increased, and even if an external force is applied to the multilayer ceramic capacitor 100, damage, etc. can be prevented.
[0066] Although the reason for this is not clear, it is thought that the B-site elements and copper contained in the first intermediate region 401 fill the gaps that occur between the dielectric layer 11 and the internal electrode layer 12, thereby increasing the bonding strength between the two layers.
[0067] Furthermore, it is considered that the inclusion of the second intermediate region 402 in the multilayer ceramic capacitor 100 of this embodiment can make the change in composition from the dielectric layers 11 to the internal electrode layers 12 particularly gradual. Therefore, it is considered that it is possible to make it difficult for interfaces or the like that significantly reduce the bonding strength between the dielectric layers 11 and the internal electrode layers 12 to occur, and to increase the bonding strength between the dielectric layers 11 and the internal electrode layers 12.
[0068] The composition of the second intermediate region 402 is not particularly limited, and may contain some or all of the components contained in the first intermediate region 401 , the internal electrode layer 12 , and the dielectric layer 11 . (dielectric layer) The dielectric layer 11 is made of a material having the general formula ABO as the main component of the dielectric. 3-α This is a portion that includes a perovskite structure (0≦α≦1). The dielectric layer 11 may or may not be adjacent to the first intermediate region 401.
[0069] When the concentrations of elements contained in each layer or region are analyzed and quantified using energy-dispersive X-ray (EDX) analysis with a transmission electron microscope (TEM) or scanning transmission electron microscope (STEM), the concentrations may include the concentrations of elements in parts other than each layer or region contained in the sample. Therefore, quantification using the above analytical methods may result in low analytical accuracy. This is because, when preparing a sample for TEM / STEM observation, the sample is thinned, which may include parts other than the layer or region being evaluated on the backside of the sample, making it impossible to accurately evaluate the layer or region being evaluated. For example, when measuring an obviously large evaluation area, using TEM / STEM-EDX analysis is not a problem. However, to accurately analyze the elemental content of layers or regions such as the first intermediate region 401, 3D atom probe analysis is used to quantify the concentrations.
[0070] [Manufacturing method for multilayer ceramic capacitors] Next, a description will be given of a method for manufacturing the multilayer ceramic capacitor 100. Fig. 5 is a flowchart 50 illustrating an example of the method for manufacturing the multilayer ceramic capacitor 100. Fig. 6 is a diagram illustrating an example of the method for manufacturing the multilayer ceramic capacitor 100.
[0071] The method for manufacturing the multilayer ceramic capacitor of this embodiment can include a dielectric green sheet forming step, a thin film layer forming step, an internal electrode layer pattern forming step, and a firing step. The method for manufacturing the multilayer ceramic capacitor of this embodiment will be described below, including any steps other than the above steps. (1) Raw material powder preparation process (S1) In the raw material powder preparation step, first, a dielectric material for forming the dielectric layer 11 is prepared.
[0072] The dielectric layer 11 of the multilayer ceramic capacitor 100 manufactured by the manufacturing method of the multilayer ceramic capacitor of this embodiment is represented by the general formula ABO 3-α It can contain a dielectric material with a perovskite structure represented by the general formula ABO (0≦α≦1). 3-αThe dielectric material with a perovskite structure expressed by (0≦α≦1) has already been explained, so the explanation will be omitted.
[0073] The A-site elements and B-site elements contained in the dielectric layer 11 are usually ABO 3-α The dielectric layer 11 contains a sintered body of particles (0≦α≦1). For example, barium titanate is a tetragonal compound with a perovskite structure and exhibits a high relative dielectric constant. Barium titanate can generally be obtained by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been known for synthesizing the ceramic that is the main component of the dielectric layer 11, including the solid-phase method, the sol-gel method, and the hydrothermal method. Any of these methods can be used in this embodiment.
[0074] In the raw material powder preparation step, an additive element or a compound containing an additive element can be added to the obtained ceramic raw material powder. A predetermined additive compound can also be added to the obtained ceramic raw material powder depending on the purpose. Examples of the additive compound include oxides containing one or more elements selected from zirconium (Zr), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), and rare earth elements (scandium (Sc), cerium (Ce), neodymium (Nd), yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)); oxides containing one or more elements selected from cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), and silicon (Si); and glasses containing one or more elements selected from cobalt, nickel, lithium, boron, sodium, potassium, and silicon.
[0075] Furthermore, it is believed that the B-site elements contained in the first intermediate region 401 are mainly derived from the B-site elements contained in the dielectric green sheet that will become the dielectric layer 11. The B-site elements contained in the first intermediate region 401 can be derived from the B-site elements contained in the dielectric, but in order to reduce the loss of B-site elements in the dielectric, the raw material powder can also contain, as an additive component, a B-site element-containing component that will be diffused into the first intermediate region 401, etc. Examples of the B-site element-containing component contained in the raw material powder used to manufacture the dielectric layer 11 include a simple B-site element, a B-site element-containing compound, etc.
[0076] The dielectric material contained in the dielectric layer 11 can be, for example, barium titanate, in which case the B-site element is titanium. Therefore, for example, a titanium-containing component, which is a component containing a B-site element, can be added to the dielectric green sheet as an additive component. Examples of the titanium-containing component include titanium dioxide (TiO2) and simple titanium, and titanium-containing compounds, which are compounds containing titanium, are particularly suitable.
[0077] The ceramic material can be prepared, for example, by wet-mixing a ceramic raw material powder with additives containing additive elements, additive compounds, and B-site element-containing components, followed by drying and pulverization. For example, the ceramic material obtained as described above may be pulverized as necessary to adjust the particle size, or may be combined with a classification process to adjust the particle size. The above steps produce a raw material powder that is a dielectric material. (2) Dielectric green sheet forming process (S2) In the dielectric green sheet forming step, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer can be added to the raw material powder obtained in the raw material powder preparation step and wet-mixed. Note that in the raw material powder preparation step (S1), a binder or the like may also be added when mixing the ceramic raw material powder and the like, and then wet-mixed.
[0078] In the dielectric green sheet forming step, the obtained slurry is used to apply it to a substrate by, for example, a die coater method or a doctor blade method, and then dried to form a dielectric green sheet 61. The substrate is, for example, a polyethylene terephthalate (PET) film. Figures illustrating the dielectric green sheet forming step are omitted.
[0079] Therefore, the dielectric green sheet forming step (S2) is carried out by forming a dielectric green sheet using a compound represented by the general formula ABO 3-α It is possible to form a dielectric green sheet containing a dielectric material with a perovskite structure represented by (0≦α≦1).
[0080] As explained in the raw material powder preparation step (S1), the raw material powder may contain a component containing a B-site element. Therefore, the dielectric green sheet formed using the raw material powder may also contain a component containing a B-site element, such as a titanium-containing compound, in addition to the dielectric with a perovskite structure represented by the general formula above.
[0081] The ratio of the amount of substance of the B-site element of the dielectric having a perovskite structure to the amount of substance of the A-site element of the dielectric having a perovskite structure contained in the dielectric green sheet may be 1.001 or more and 1.005 or less. 3-α The ratio of the amount of substance of B-site elements to the amount of substance of A-site elements in a dielectric with a perovskite structure, expressed as (0≦α≦1), is stoichiometrically 1.0. Therefore, by making the ratio of the amount of substance of B-site elements to the amount of substance of A-site elements in the dielectric green sheet 1.001 or more, the dielectric will contain, in addition to the B-site elements contained in the dielectric, B-site elements derived from the added B-site element-containing components. Therefore, after the firing step (S8) described below, the first intermediate region 401 can be easily formed between the dielectric layer 11 and the internal electrode layer 12.
[0082] Furthermore, if the ratio of the amount of substance of the B-site elements to the amount of substance of the A-site elements contained in the dielectric green sheets is greater than 1.005, the concentration of the B-site elements in the dielectric layer 11 will be high, which may affect the dielectric properties of the dielectric layer. For this reason, it is preferable that the ratio of the amount of substance of the B-site elements to the amount of substance of the A-site elements contained in the dielectric green sheets is 1.005 or less. (3) Thin film layer formation process In the thin film layer forming step (S3), as shown in FIG. 6(A), a copper-containing thin film layer 62 is formed on the surface of a dielectric green sheet 61 by sputtering or vapor deposition, thereby producing a dielectric thin film layer sheet 610.
[0083] The thin film layer 62 formed in the thin film layer forming step (S3) becomes the copper source contained in the first intermediate region 401 and the second intermediate region 402.
[0084] The composition of the thin film layer 62 is not particularly limited, but it may be a layer containing copper oxide (CuO), for example.
[0085] Furthermore, in order to adjust the copper content contained in the thin film layer 62, the thin film layer 62 can also contain copper and nickel, which is a metal contained in the internal electrode layer 12.
[0086] The concentration of copper contained in the thin film layer is not particularly limited and can be selected according to the copper concentration required in the first intermediate region 401. For example, it is preferable that the concentration of copper contained in the thin film layer 62 is 1 at % or more and 6 at % or less relative to the nickel contained in the internal electrode layer pattern described below.
[0087] The thin film layer 62 is preferably formed on at least the portion of the surface of the dielectric green sheet 61 where the internal electrode layers are to be formed, and may be formed on the entire surface of the dielectric green sheet 61 where the internal electrode layers are to be formed.
[0088] The thin film layer forming step may be further performed after the internal electrode layer pattern forming step (S4) to form a thin film layer on the surface of the internal electrode layer pattern. For this reason, for example, the step of forming a thin film layer on the surface of the dielectric green sheet 61 may be referred to as the first thin film layer forming step, and the step of forming a thin film layer on the surface of the internal electrode layer pattern may be referred to as the second thin film layer forming step.
[0089] The second thin film layer forming process can be carried out in the same manner as the first thin film layer forming process, except that a thin film layer is formed on the surface of the internal electrode layer pattern. The first thin film layer forming process and the second thin film layer forming process may have different or the same film forming conditions for the thin film layer. (4) Internal electrode layer pattern formation process (S4) The first internal electrode layer 12a and the second internal electrode layer 12b can be mainly composed of nickel (Ni), or a base metal such as copper (Cu) or tin (Sn), or a nickel alloy containing these. Base metals such as copper (Cu) or tin (Sn) can also be added as additives.
[0090] The metal conductive paste for forming the precursors of the first internal electrode layer 12a and the second internal electrode layer 12b can be prepared by kneading, for example, nickel, other metal components, an organic binder, a solvent, etc. Nickel may be added in a simple substance state or in a compound state.
[0091] In the internal electrode layer forming process, as illustrated in FIG. 6(A), a metal conductive paste for forming an internal electrode layer pattern containing an organic binder can be printed on the surface of the thin film layer 62 of the dielectric-thin film layer sheet 610 by screen printing, gravure printing, or the like. As a result, a first internal electrode layer pattern 63a for the first internal electrode layer 12a or a second internal electrode layer pattern 63b for the second internal electrode layer 12b is arranged on the surface of the dielectric-thin film layer sheet 610. Ceramic particles can also be added as a co-material to the metal conductive paste. The main component of the ceramic particles is not particularly limited, but is preferably the same as the main component ceramic of the dielectric layer 11. When ceramic particles are added as a co-material, they can be added when kneading the metal conductive paste. The method for forming the internal electrode layer is not limited to printing, and plating, vacuum deposition, sputtering, or CVD may also be used.
[0092] Therefore, in the internal electrode layer pattern forming step (S3), an internal electrode layer pattern containing nickel as a main component is formed on the thin film layer 62 of the dielectric-thin film layer sheet 610, and the ceramic green sheet 60 can be produced.
[0093] Alternatively, a dielectric pattern paste for the reverse pattern layer can be obtained by adding a binder such as an ethyl cellulose-based binder and an organic solvent such as a terpineol-based binder to the raw material powder, which is the dielectric material obtained in the raw material powder preparation step (S1), and kneading the mixture in a roll mill. As shown in FIG. 6(A), the dielectric pattern paste can be printed on the peripheral area of the dielectric-thin film layer sheet 610 where the internal electrode layer pattern is not printed, thereby arranging the dielectric pattern 64 and filling in the step with the internal electrode layer pattern. The dielectric green sheet 61 on which the internal electrode layer pattern and the dielectric pattern 64 are printed is referred to as a lamination unit. (5) Lamination process (S5) In the lamination step (S5), as shown in Fig. 6(B), the lamination units can be laminated so that the internal electrode layers and the dielectric layers alternate, and so that the edges of the internal electrode layers are alternately exposed at both end faces in the length direction of the dielectric layers and alternately drawn out to a pair of external electrodes. Specifically, a dielectric green sheet 61 on which a first internal electrode layer pattern 63a and a dielectric pattern 64 are printed and a dielectric green sheet 61 on which a second internal electrode layer pattern 63b and a dielectric pattern 64 are printed are laminated in this order. For example, the number of layers in the lamination unit can be set to 100 to 500. (6) Crimping process (S6) In the compression bonding step, a predetermined number of cover sheets, for example, 2 to 10 layers, can be laminated on the top and bottom of the laminate in which the lamination units are stacked, and then thermally compressed. (7) Singulation process (S7) In the singulation step, the compressed body can be singulated. As a singulation method, an existing method such as dicing with a dicer or laser cutting can be used as appropriate. (8) Firing process (S8) In the firing step, the individual laminate, i.e., the laminate obtained by stacking ceramic green sheets, can be degreased and fired. In the firing step, the degreasing treatment and the firing treatment can be performed consecutively or separately. The conditions for degreasing and firing are not particularly limited.
[0094] The degreasing may be carried out in a nitrogen atmosphere at a temperature of 250°C or higher and 500°C or lower, for example.
[0095] For example, when the oxygen partial pressure is 2.7 x 10 -9 atm or more 5.0×10 -8 The firing temperature can be in the range of 1100°C or higher and 1350°C or lower, for example.
[0096] The firing temperature may be in the range of 1150°C or more and 1350°C or less.
[0097] If necessary, after firing under the above firing conditions, a reoxidation treatment may be carried out in a nitrogen atmosphere at 600° C. or higher and 1000° C. or lower.
[0098] Furthermore, it is preferable to raise the temperature at a rate of 15,000° C. / h or more until the firing temperature is reached, and it is preferable to hold the temperature at the firing temperature for 5 minutes or more and 10 minutes or less.
[0099] By setting the temperature rising rate to 15,000° C. / h or more and the holding time at the firing temperature to 5 minutes or more and 10 minutes or less, it is possible to prevent the copper contained in the thin film layer from diffusing excessively into other layers.
[0100] The size of the first intermediate region 401 and whether or not to include the second intermediate region 402 can be selected depending on the rate of temperature rise, the time for which the firing temperature is maintained, and the firing temperature.
[0101] There is no particular upper limit to the rate of temperature rise, but from the viewpoint of reducing damage to the firing furnace, it is preferable to set it to, for example, less than 18,000° C. / h. (9) External electrode formation process (S9) In the external electrode formation process, a pattern of a metal conductive paste for forming external electrode layers containing a metal such as nickel or copper and an organic binder is formed by screen printing, dipping, or the like, and then baked to form the external electrodes. The method for forming the external electrodes is not limited to printing or dipping, and plating, vacuum deposition, sputtering, or CVD may also be used. Alternatively, a conductive resin paste may be formed by screen printing, dipping, or the like, and the resin may be cured. If necessary, a copper, nickel, or tin layer may be formed by plating, or the like. This forms the first external electrode 20a and the second external electrode 20b. The multilayer ceramic capacitor 100 is completed through the above steps.
[0102] The above steps are merely examples, and the method for manufacturing the multilayer ceramic capacitor of this embodiment is not limited to the above. For example, the external electrodes can be formed by providing a base layer for the external electrodes on the surface of the singulated laminate and firing the base layer for the external electrodes simultaneously with firing the ceramic. In this case, in the external electrode formation step after the firing step, the external electrodes can be completed by forming a layer of copper, nickel, or tin on the base layer by plating.
[0103] [Other embodiments] Although the embodiments have been described in detail above, the present disclosure is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims.
[0104] For example, the above embodiment is applied to a multilayer ceramic capacitor having two terminal electrodes as external electrodes, but may be applied to a multilayer ceramic capacitor having three or more terminals.
[0105] Although the above embodiment describes a multilayer ceramic capacitor as an example of a multilayer ceramic electronic component, the present disclosure is applicable to multilayer ceramic electronic components in general, such as chip varistors, chip thermistors, and multilayer inductors. [Example]
[0106] The present invention will be explained below by giving specific examples, but the present invention is not limited to these examples. (1) Evaluation method (1-1) Three-dimensional atom probe analysis To perform the three-dimensional atom probe analysis, a needle-shaped sample with a tip diameter of 50 nm to 100 nm was fabricated using FIB, based on the multilayer ceramic capacitors fabricated in each of the examples and comparative examples, and included the vicinity of the interface between the dielectric layer 11 and the internal electrode layer 12. A high electric field was applied to the tip of the needle-shaped sample, a laser pulse was applied, the sample surface was ionized, and the atomic distribution was analyzed using a secondary detector, thereby performing the three-dimensional atom probe analysis.
[0107] The three-dimensional atom probe analyzer used was a LEAP5000XS (manufactured by AMETEK). The wavelength of the laser pulse applied to the needle-shaped sample was 355 nm. Figures 7 and 8 show the measurement results for Examples 2 and 9.
[0108] The concentration of each element in the measurement results was calculated so that the total of the elements Ba, Ti, O, Cu, and Ni detected by three-dimensional atom probe analysis was 100 at%. Examples of measurement results (hereinafter also referred to as "measurement results") regarding the change in concentration of each element depending on the measurement position obtained by three-dimensional atom probe analysis are shown in Figures 7 and 8.
[0109] Then, each layer was identified from the obtained measurement results.
[0110] Specifically, as shown in Figures 7 and 8, a line L71 passing through point 71 where the nickel concentration is 70 at% is used as the boundary line, and the region where the nickel concentration is 70 at% or more is defined as the internal electrode layer 12.
[0111] In region 70 where the nickel concentration is less than 70 at% and the titanium concentration of the B-site element is 20 at% or more, the region sandwiched between a first boundary 72 where the titanium concentration is 20 at% and a second boundary where copper concentration peak 73 is defined as first intermediate region 401. That is, as shown in Figures 7 and 8, first intermediate region 401 is defined as the region sandwiched between a straight line L72 passing through first boundary 72 where the titanium concentration is 20 at% and a straight line L73 passing through the second boundary where copper concentration peak 73 is defined.
[0112] The region between the internal electrode layer 12 and the first intermediate region 401, that is, the region where the nickel concentration is less than 70 at % and the titanium concentration is less than 20 at %, was defined as the second intermediate region 402.
[0113] To evaluate the structure near the interface between the dielectric layer 11 and the internal electrode layer 12 in each example, first, the presence or absence of the first intermediate region 401 was determined. That is, it was determined whether or not there was a copper concentration peak 73 in the region 70, and if there was a copper concentration peak 73, it was determined that there was a first intermediate region 401. Furthermore, if there was no copper concentration peak 73, it was determined that there was no first intermediate region 401. The evaluation results are shown in the column for presence or absence of the first intermediate region in Table 1.
[0114] The presence or absence of a copper concentration peak 73 was determined by the following procedure. From the measurement results, a point in the region 70 where the Cu concentration was maximum was extracted. If the Cu concentration at the point where the Cu concentration was maximum was higher than 1.5 times the average value of the Cu concentrations at measurement points within a range of +0.5 nm to +2 nm from the first boundary 72 in the direction toward the dielectric layer 11, as indicated by the block arrow E, the point where the Cu concentration was maximum was determined to be a copper concentration peak 73. The measurement points within a range of +0.5 nm to +2 nm from the first boundary 72 in the direction toward the dielectric layer 11 refer to measurement points located within a range of 0.5 nm to 2.0 nm away from the first boundary 72, based on the position of the first boundary 72.
[0115] In Table 1, the column "Copper concentration at Cu concentration peak" shows the copper concentration at copper concentration peak 73 of the first intermediate region.
[0116] Furthermore, assuming that the copper concentration at copper concentration peak 73 is C(Cu), the B-site element concentration is C(B), and the A-site element concentration is C(A), the concentration C obtained by the following formula (1) is calculated and shown in the "Concentration C" column of Table 1.
[0117] C = C(Cu) + C(B) - C(A) (1) In the following examples and comparative examples, barium titanate is used as the dielectric, so the A-site element is barium and the B-site element is titanium. Therefore, the above formula (1) can be expressed as C = C(Cu) + C(Ti) - C(Ba). Table 1 also shows the value of C(Ti) - C(Ba) in the "C(Ti) - C(Ba)" column.
[0118] The titanium concentration at the copper concentration peak 73 may also include titanium derived from barium titanate (BaTiO3) contained as a dielectric in the dielectric layer 11, so the value obtained by subtracting the barium concentration from the titanium concentration is used as described above. (1-2) Accelerated life test Fifty samples were prepared for each of the multilayer ceramic capacitors fabricated in the examples and comparative examples. An accelerated life test (HALT) was then performed on each of the selected samples. In the accelerated life test, a voltage of 10 V was applied to each of the 50 samples fabricated under the same conditions in a constant temperature oven at 125°C, and the time until insulation degradation occurred was measured.
[0119] During the evaluation, the insulation resistance was measured, and when the insulation resistance value became less than 1 MΩ, it was determined that insulation had deteriorated.
[0120] The average value of the time until insulation degradation occurred for the 50 samples evaluated was evaluated as the time until insulation degradation occurred, that is, the lifespan, for each example and comparative example sample.
[0121] The evaluation results are shown in the "Life" column of Table 1. The larger the value, the better the life characteristics.
[0122] When the life evaluation was 500 minutes or more, the life evaluation was evaluated as "good." When the life evaluation was less than 500 minutes, the life evaluation was evaluated as "poor."
[0123] If the lifespan is judged to be good, it can be said that the multilayer ceramic capacitor has excellent lifespan characteristics. (1-3) Bending test A bending test was conducted based on the JEITA AEC-Q200 REV E standard, Reliability Conformity Test Guide for Passive Elements, Bending Test for Printed Circuit Boards.
[0124] The bending test was performed by mounting a sample chip, a multilayer ceramic capacitor manufactured in each Example and Comparative Example, on a test substrate, deforming the test substrate in a direction perpendicular to the mounting surface of the substrate-mounted sample until it reached a bending depth of 2 mm, and then releasing the bending force. The sample chip was then embedded in resin, and its cross section was polished. The presence or absence of interlayer fracture between the dielectric layer and the internal electrode layer was confirmed using an electron microscope. Note that observation using the electron microscope was performed at 1000x magnification, and the entire cross section of the polished sample was observed to confirm the presence or absence of interlayer fracture within the cross section.
[0125] In each example and comparative example, 50 sample chips were evaluated, and the number of sample chips in which interlayer breakdown occurred between the dielectric layer and the internal electrode layer was counted.
[0126] The test substrate on which the sample chip is mounted is an FR4 substrate having a thickness of 1.6±0.2 mm (including the copper foil thickness), a copper foil thickness of 35±10 um, and external dimensions of 100 mm×40 mm. (1-4) Overall Judgment If the lifespan was judged as ◯ and the number of sample chips showing interlayer fracture between the dielectric layer and the internal electrode layer after the bending test was 5 or less, the multilayer ceramic capacitor was evaluated as ◯, as it had excellent life characteristics and excellent interlayer bonding strength. If the above requirements for ◯ were not met, the multilayer ceramic capacitor was evaluated as ×, as it was inferior in at least one of the lifespan characteristics or interlayer bonding strength. (2) Conditions for preparing samples [Example 1] A multilayer ceramic capacitor was manufactured according to the flow chart 50 shown in FIG.
[0127] Specifically, first, the dielectric barium titanate (BaTiO3), titanium dioxide (TiO2) which is a titanium-containing compound, and other additives such as rare earth oxides and SiO 2、MgO powder and organic solvents (ethanol, toluene) were mixed and pulverized using 1 mm diameter zirconia beads. Next, a binder (PVB) was added to the mixed and pulverized material to obtain a slurry (raw material powder preparation step). When preparing the raw material powder, the mixing ratio of barium titanate and titanium dioxide was adjusted so that the titanium concentration relative to the barium concentration in the dielectric green sheets and dielectric layers 11 would be the value shown in the "Ti / Ba ratio of dielectric layer" column in Table 1, in terms of the ratio of substance amounts.
[0128] The obtained slurry was applied onto a base film, and the slurry applied onto the base film was dried to obtain a dielectric green sheet having a thickness of 0.7 μm (dielectric green sheet forming step).
[0129] A thin film layer of copper oxide (CuO) was formed by vapor deposition on the surface of the dielectric green sheet in a portion where an internal electrode layer pattern was to be formed, to prepare a dielectric thin film layer sheet (first thin film layer forming step).
[0130] In the first thin film layer formation process, the thin film layer was formed so that the ratio of the copper concentration in the thin film layer to the nickel contained in the internal electrode layer pattern was 1 at%, which is the value shown in the ``Copper concentration in thin film layer'' column in Table 1.
[0131] A nickel-containing metal conductive paste was printed on the portion of the dielectric-thin film layer sheet where the thin film layer was formed, to form an internal electrode layer pattern containing copper on each of the dielectric-thin film layer sheets (internal electrode layer forming process). Furthermore, a copper oxide (CuO) thin film layer was formed on the surface of the internal electrode layer pattern by vapor deposition, to produce a ceramic green sheet that would become a laminate unit (second thin film layer forming process). The second thin film layer was formed under the same conditions as the first thin film layer, except that it was formed on the surface of the internal electrode layer pattern.
[0132] The ceramic green sheet has a dielectric green sheet and an internal electrode layer pattern formed on the surface of the dielectric green sheet, with thin film layers disposed on the upper and lower surfaces of the internal electrode layer pattern.
[0133] Next, ten laminate units were laminated to form a laminate (lamination step).
[0134] Then, the laminate was pressure-bonded and then cut into individual pieces to obtain chip-shaped green laminates (pressure-bonding step, cutting step).
[0135] Next, this chip-shaped green laminate was subjected to a degreasing treatment in a nitrogen atmosphere. Then, the chip-shaped green laminate after the degreasing treatment was placed in a firing furnace and fired (firing process). In the firing process, the temperature was raised to 1200°C at a heating rate of 15000°C / h and held at the firing temperature of 1200°C for 300 seconds. The firing atmosphere was a nitrogen atmosphere with an oxygen partial pressure of 5.0 x 10 -8 The experiment was carried out in a weakly reducing atmosphere at 1 atm.
[0136] After firing, the first external electrode 20a and the second external electrode 20b were formed on the laminate by plating (external electrode forming step).
[0137] The obtained multilayer ceramic capacitor had a chip shape of 1.0 mm × 0.5 mm × 0.5 mm, a dielectric layer 11 thickness of 0.7 μm, an internal electrode layer 12 thickness of 0.7 μm, and the number of laminated layers was 350. The thicknesses of the dielectric layer 11 and the internal electrode layer 12 were evaluated by the procedure already described.
[0138] The obtained multilayer ceramic capacitor was evaluated as described above, and the evaluation results are shown in Table 1. [Examples 2 to 10] In the dielectric layer forming process, the mixing ratio of barium titanate and titanium dioxide was adjusted when preparing the raw material powder so that the titanium concentration relative to the barium concentration in the dielectric green sheet and the dielectric layer 11 would be the value shown in the "Ti / Ba ratio of dielectric layer" column in Table 1. In addition, when forming the thin film layer, the copper concentration in the thin film layer relative to the nickel contained in the internal electrode layer pattern was adjusted to be the value shown in the "Copper concentration in thin film layer" column in Table 1.
[0139] Other than the above, a multilayer ceramic capacitor was produced and evaluated under the same conditions and procedures as in Example 1. The evaluation results are shown in Table 1. [Comparative Example 1] The first thin film layer forming step and the second thin film layer forming step were not performed.
[0140] Other than the above, a multilayer ceramic capacitor was produced and evaluated under the same conditions and procedures as in Example 1. The evaluation results are shown in Table 1. [Comparative Examples 2 to 6] In the dielectric layer forming step, the mixing ratio of barium titanate and titanium dioxide was adjusted when preparing the raw material powder so that the titanium concentration relative to the barium concentration in the dielectric layer 11 would be the value shown in the "Ti / Ba ratio of dielectric layer" column in Table 1. In addition, when forming the thin film layer, the ratio of the copper concentration in the thin film layer relative to the nickel contained in the internal electrode layer pattern was adjusted to be the value shown in the "Copper concentration of thin film layer" column in Table 1.
[0141] Other than the above, a multilayer ceramic capacitor was produced and evaluated under the same conditions and procedures as in Example 1. The evaluation results are shown in Table 1. Comparative Example 7 In the firing process, the firing atmosphere is set to an oxygen partial pressure of 1.0 x 10 -9 The experiment was carried out in a strongly reducing atmosphere at 1000 kJ / cm.
[0142] Other than the above, a multilayer ceramic capacitor was produced and evaluated under the same conditions and procedures as in Example 1. The evaluation results are shown in Table 1.
[0143] [Table 1] According to the results shown in Table 1, it was confirmed that the multilayer ceramic capacitors of Examples 1 to 10, which have a first intermediate region arranged between the dielectric layer 11 and the internal electrode layer 12, and in which the copper concentration at the copper concentration peak is 1.0 at% or more and 5.0 at% or less, and in which the concentration C calculated from equation (1) where the copper concentration at the copper concentration peak position is C(Cu), the titanium concentration is C(Ti), and the barium concentration is C(Ba), have excellent life characteristics.
[0144] Furthermore, the multilayer ceramic capacitors of Examples 1 to 10 were also able to reduce the occurrence of interlayer fracture when subjected to bending tests, and it was confirmed that they also had excellent interlayer bonding strength between the dielectric layers 11 and the internal electrode layers 12.
[0145] In contrast to this, it was confirmed that Comparative Example 1, which did not have a first intermediate layer, was inferior in both lifespan and interlayer bonding strength between the dielectric layer 11 and the internal electrode layer 12.
[0146] In addition, in Comparative Example 2, although the formation of the first intermediate region was confirmed, the copper concentration at the copper concentration peak was low at 0.5 at%, and therefore it was confirmed that both the lifespan and the interlayer bonding strength between the dielectric layer 11 and the internal electrode layer 12 were inferior.
[0147] In Comparative Example 3, the formation of the first intermediate region was confirmed, and the copper concentration at the copper concentration peak was sufficient at 1.2 at%, but it was confirmed that the concentration C was excessively high, resulting in a deterioration in both the lifespan and the interlayer bonding strength between the dielectric layer 11 and the internal electrode layer 12.
[0148] In Comparative Example 4, the formation of the first intermediate region was confirmed, but the copper concentration at the copper concentration peak was high at 6 at %, which is thought to be the reason why copper dissolved in the titanium site of the dielectric barium titanate in the dielectric layer 11, increasing oxygen defects and shortening the lifespan.
[0149] In Comparative Examples 5 and 6, the formation of the first intermediate region was confirmed, and the copper concentration at the copper concentration peak was sufficient at 1.2 at%, but because concentration C was low, the effect of eliminating oxygen defects was insufficient, and it is thought that this resulted in a shortened lifespan.
[0150] In Comparative Example 7, firing was performed in a strong reducing atmosphere, so copper was reduced, the first intermediate region was not formed, and copper segregated in the internal electrode layer. As a result, it was confirmed that both the life and the interlayer bonding strength between the dielectric layer 11 and the internal electrode layer 12 were inferior.
[0151] Aspects of the present disclosure are, for example, as follows.
[0152] <1> Stacked along the first axis, general formula ABO 3-α A plurality of dielectric layers including a dielectric having a perovskite structure represented by (0≦α≦1); a plurality of internal electrode layers each containing nickel as a main component, the internal electrode layers being disposed between adjacent dielectric layers along the first axis; a first intermediate region containing copper and disposed between the dielectric layer and the internal electrode layer; When three-dimensional atom probe analysis is performed along the first axis from the internal electrode layer to the dielectric layer, The internal electrode layer is a region where the nickel concentration is 70 at% or more, The first intermediate region has a nickel concentration of less than 70 at % and 3-α a region sandwiched between a first boundary portion where the concentration of the B-site element is 20 at % and a second boundary portion where the copper concentration is a peak, in a region where the concentration of the B-site element is 20 at % or more in (0≦α≦1), The copper concentration at the peak of the copper concentration is 1.0 at% or more and 5.0 at% or less, The copper concentration at the peak position of the copper concentration is C(Cu), the concentration of the B-site element is C(B), and the general formula ABO 3-α If the concentration of the A-site element in (0≦α≦1) is C(A), A multilayer ceramic electronic component in which the concentration C calculated by the following formula (1) is 10 at % or more and less than 35 at %.
[0153] C = C(Cu) + C(B) - C(A) (1) <2> the copper concentration at the peak of the copper concentration is 1.5 times or more of the average copper concentration in a region 0.5 nm or more and 2 nm or less away from the first boundary portion in the direction toward the dielectric layer; <1> The multilayer ceramic electronic component according to claim 1.
[0154] <3> a second intermediate region between the first intermediate region and the internal electrode layer; <1> or <2> The multilayer ceramic electronic component according to claim 1.
[0155] <4> The dielectric layer contains barium titanate. <1> from <3> 10. The multilayer ceramic electronic component according to claim 9, wherein
[0156] <5> a dielectric green sheet forming step of forming a dielectric green sheet containing titanium and barium; a thin film layer forming step of forming a copper-containing thin film layer on the surface of the dielectric green sheet by sputtering or vapor deposition to form a dielectric thin film layer sheet; an internal electrode layer pattern forming step of forming an internal electrode layer pattern containing nickel as a main component on the thin film layer of the dielectric-thin film layer sheet to prepare a ceramic green sheet; The ceramic green sheets were stacked together to form a laminate. The laminate was then heated under an oxygen partial pressure of 2.7×10 ―9 atm or more 5.0×10 -8 and a firing step of heating the material to a firing temperature of 1150°C or higher and 1350°C or lower at a heating rate of 15000°C / h or higher but lower than 18000°C / h in a weakly reducing atmosphere of 1000 atm or lower, and maintaining the material at the firing temperature for 5 minutes or higher and 10 minutes or lower.
[0157] <6> The thin film layer contains copper and nickel. <5> 10. A method for producing the multilayer ceramic electronic component according to claim 9. <7> the concentration of copper contained in the thin film layer relative to the nickel contained in the internal electrode layer pattern is 1 at % or more and 6 at % or less; <5> or <6> 10. A method for producing the multilayer ceramic electronic component according to claim 9.
[0158] <8> The dielectric green sheet contains a titanium-containing compound in addition to the dielectric having a perovskite structure. <5> from <7> 1. A method for producing a multilayer ceramic electronic component according to claim 1,
[0159] <9> the ratio of the amount of titanium to the amount of barium contained in the dielectric green sheet is 1.001 or more and 1.005 or less; <5> from <8> 1. A method for producing a multilayer ceramic electronic component according to claim 1, [Explanation of symbols]
[0160] 100 Multilayer ceramic capacitors 10 Base 10a First side 10b Second side 11 Dielectric layer 12 Internal electrode layer 12a 1st internal electrode layer 12b Second internal electrode layer 13 Cover Layer 14 Capacity part 15a First End Margin 15b Second End Margin 16 Side Margin 20a 1st external electrode 20b 2nd external electrode C area D straight line 41 First end 42 Second end 401 1st intermediate area 402 Second intermediate area 50 Flowchart S1 Raw material powder preparation process S2 Dielectric green sheet forming process S3 Thin film layer formation process S4 Internal electrode layer formation process S5 Lamination process S6 Crimping process S7 Singulation process S8 Firing process S9 External electrode formation process 60 Ceramic green sheet 61 Dielectric green sheet 62 thin film layer 610 Dielectric - Thin Film Layer Sheet 63a First internal electrode layer pattern 63b Second internal electrode layer pattern 64 Dielectric Pattern 70 areas 71 points 72 First Boundary 73 Copper concentration peak (second boundary) L71 straight line L72 straight line L73 straight line E Block Arrow
Claims
1. Stacked along a first axis, the general formula ABO 3-α A plurality of dielectric layers including a dielectric having a perovskite structure represented by (0≦α≦1); a plurality of internal electrode layers each containing nickel as a main component, the internal electrode layers being disposed between adjacent dielectric layers along the first axis; a first intermediate region that is disposed between the dielectric layer and the internal electrode layer and contains copper; When three-dimensional atom probe analysis is performed along the first axis from the internal electrode layer to the dielectric layer, The internal electrode layer is a region in which the nickel concentration is 70 at% or more, The first intermediate region has a nickel concentration of less than 70 at % and a structure represented by the general formula ABO 3-α a region sandwiched between a first boundary portion where the concentration of the B-site element is 20 at % and a second boundary portion where the copper concentration is a peak, in a region where the concentration of the B-site element is 20 at % or more in (0≦α≦1), The copper concentration at the peak of the copper concentration is 1.0 at% or more and 5.0 at% or less, The copper concentration at the peak position of the copper concentration is C(Cu), the concentration of the B-site element is C(B), and the general formula ABO 3-α When the concentration of the A-site element in (0≦α≦1) is C(A), A multilayer ceramic electronic component having a concentration C calculated by the following formula (1) of 10 at % or more and less than 35 at %. C=C(Cu)+C(B)-C(A)...(1)
2. 2. The multilayer ceramic electronic component according to claim 1, wherein the copper concentration at the peak of the copper concentration is 1.5 times or more of the average copper concentration in a region 0.5 nm or more and 2 nm or less away from the first boundary portion in the direction toward the dielectric layer.
3. 3. The multilayer ceramic electronic component according to claim 1, further comprising a second intermediate region between the first intermediate region and the internal electrode layer.
4. 3. The multilayer ceramic electronic component according to claim 1, wherein the dielectric layers contain barium titanate.
5. General formula ABO 3-α a dielectric green sheet forming step of forming a dielectric green sheet containing a dielectric having a perovskite structure represented by (0≦α≦1); a thin film layer forming step of forming a copper-containing thin film layer on the surface of the dielectric green sheet by sputtering or vapor deposition to form a dielectric-thin film layer sheet; an internal electrode layer pattern forming step of forming an internal electrode layer pattern containing nickel as a main component on the thin film layer of the dielectric-thin film layer sheet to prepare a ceramic green sheet; The laminate of the ceramic green sheets was heated at an oxygen partial pressure of 2.7 × 10 ―9 ATM or more 5.0×10 -8 and a firing step of heating the mixture to a firing temperature of 1,150°C or higher and 1,350°C or lower at a heating rate of 15,000°C / h or higher but lower than 18,000°C / h in a weakly reducing atmosphere of 1000 atm or lower, and holding the mixture at the firing temperature for 5 minutes or higher and 10 minutes or lower.
6. 6. The method for producing a multilayer ceramic electronic component according to claim 5, wherein the thin film layers contain copper and nickel.
7. 7. The method for producing a multilayer ceramic electronic component according to claim 5, wherein the concentration of copper contained in said thin film layers relative to the concentration of nickel contained in said internal electrode layer patterns is 1 at % or more and 6 at % or less.
8. 7. The method for producing a multilayer ceramic electronic component according to claim 5, wherein the dielectric green sheets contain a titanium-containing compound in addition to the dielectric material having a perovskite structure.
9. 7. The method for producing a multilayer ceramic electronic component according to claim 5, wherein a ratio of the amount of substance of a B-site element in the dielectric having a perovskite structure contained in the dielectric green sheets to the amount of substance of an A-site element in the dielectric having a perovskite structure is 1.001 or more and 1.005 or less.
Citation Information
Patent Citations
Dielectric ceramic and method for producing the same, and monolithic ceramic capacitor
JP2010052964A