Light-emitting device

Abstract

To provide a display device using a light-emitting element capable of suppressing luminance unevenness among pixels.SOLUTION: A first wiring includes a first region having a large film thickness and a second region having a small film thickness. A first electrode included in a light-emitting element disposed above the first wiring is connected to the first wiring through a contact hole formed in a first insulating film. The first region having the large film thickness includes an area overlapping the contact hole, and a gradient angle θt at an end portion of the first region having the large film thickness satisfies 0°<θt<90°.SELECTED DRAWING: Figure 17

Description

[Technical Field]

[0001] The present invention relates to a semiconductor display device in which a light emitting element is provided in each pixel. [Background technology]

[0002] An active matrix semiconductor display device is made up of tens to millions of pixels arranged in a matrix. Each pixel is provided with a switching element and a display element. Therefore, even after the video signal is input to the pixel, the display element remains in a constant voltage state or current state. Since the display maintains its brightness, the active matrix type is flexible enough to accommodate larger and higher-definition semiconductor display devices. This is becoming the mainstream of semiconductor display devices in the future.

[0003] One of the problems that arises with the increase in size of semiconductor display devices is the increase in wiring resistance. For example, the gate potential of a transistor that functions as a switching element may drop. If the potential of the wiring (scanning line) connected to the port electrode drops, the signal input to the scanning line This causes distortion in the signal waveform, making it impossible to control the switching of the transistor at the correct timing. In particular, the scanning lines have gates of transistors that all pixels in the horizontal direction have. As the number of pixels increases due to the high definition of semiconductor display devices, The number of transistors connected to each scan line also increases. This makes it more difficult to accurately control the switching of the transistor. becomes.

[0004] If the scanning lines can be made of a material with a lower resistivity, the potential drop can be reduced. However, the gate electrode of the transistor in the pixel and the scanning line are usually on the same layer. The conductive film formed on the substrate is processed (patterned) into a desired shape by etching or other methods. The gate electrode is formed by a heat treatment performed in the manufacturing process of the transistor. Since heat resistance to the extent that it can withstand the temperature is required, it can be used for gate electrodes and scanning lines. The types of materials were limited.

[0005] In the following Patent Document 1, there is disclosed a method for manufacturing a semiconductor device including an auxiliary wiring formed on a layer different from that of the scanning line, and a semiconductor device including the scanning line and the auxiliary wiring formed on a layer different from that of the scanning line. A liquid crystal display device is described in which a drop in the potential of the scanning line is suppressed by connecting the [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Publication No. 10-198292 Summary of the Invention [Problem to be solved by the invention]

[0007] Meanwhile, semiconductor display devices using light-emitting elements as display elements have high visibility and are ideal for thinning. It is suitable for use in a wide range of applications, and there is no restriction on the viewing angle. e) and liquid crystal display devices. The specific configurations proposed for active matrix semiconductor display devices vary by manufacturer. Although it varies depending on the pixel, it usually has at least a light emitting element and a transistor that controls the input of a video signal to the pixel. a transistor (switching transistor) and a transistor that controls the current value supplied to the light-emitting element. A transistor (drive transistor) is provided in each pixel.

[0008] A liquid crystal element is a display element that displays gray scales according to the magnitude of the voltage applied between a pair of electrodes. On the other hand, light-emitting elements display grayscales according to the magnitude of current flowing between a pair of electrodes. Therefore, a semiconductor display device using a light-emitting element has fewer pixels than a liquid crystal display device. Therefore, as the semiconductor display device becomes larger, the current that is supplied to the device becomes larger. When the total area of ​​the display element to be displayed increases, the current value supplied to the pixel increases depending on the gradation to be displayed. As a result, the potential of the wiring (power supply line) that supplies current to the pixel increases significantly. This causes unevenness in the brightness between pixels in the display area.

[0009] In view of the above-mentioned problems, the present invention aims to suppress uneven brightness between pixels caused by a drop in the potential of the wiring. Let's say. [Means for solving the problem]

[0010] In order to solve the above problem, a power supply line to which a power supply potential is applied is connected to a pixel array in which a plurality of pixels are arranged. Furthermore, the power supply lines are electrically connected within the display area. The wiring (auxiliary power supply line) for electrical connection and the gate of the transistor in the pixel An interlayer insulating film is formed on the electrode, and the power supply line is connected to the auxiliary power supply line and the gate electrode. The auxiliary power supply line is formed on the interlayer insulating film located in a layer further above the auxiliary power supply line. Wiring (auxiliary wiring) formed on the interlayer insulating film is electrically or directly connected. In this specification, when referring to electrical connection, it means direct connection unless otherwise specified. This also includes the state in which the

[0011] The electrical connection between the power supply lines may be made between all adjacent power supply lines, Even if you divide all the power lines into several groups and test with the power lines belonging to each group, In particular, the level of the power supply potential applied to the power supply line differs depending on the color of light obtained from each pixel. When the power supply lines are connected to a common power supply potential, the power supply lines are electrically connected via an auxiliary power supply line. The color of the light obtained from the pixel depends on the type of electroluminescent layer used in the light-emitting element. By changing the type, it can be made different, or the light emitted from the light emitting element can be That is, by using a color filter that can transmit only light of a specific wavelength, different It can be done.

[0012] Also, on the scanning line connected to the gate electrode of the transistor functioning as a switching element an interlayer insulating film is formed on the insulating film, and wiring (auxiliary wiring for scanning lines) formed on the interlayer insulating film is The scanning lines may be electrically or directly connected.

[0013] Furthermore, the thickness of the power supply line, auxiliary wiring, or auxiliary wiring for scanning line formed on the interlayer insulating film is It is desirable that the thickness is 0.8 μm or more and 1.5 μm or less.

[0014] Furthermore, the power supply lines, auxiliary wiring, or auxiliary wiring for scanning lines formed on the interlayer insulating film are formed on the interlayer insulating film. A single conductive film formed on an insulating film or multiple laminated conductive films is processed into a desired shape (pattern). The gate electrode and auxiliary electrode are formed under the interlayer insulating film. The source line or the scanning line is formed by a single conductive film formed before the interlayer insulating film or by a plurality of laminated conductive films. The conductive film is processed (patterned) into a desired shape. , auxiliary wiring, or auxiliary wiring for scanning lines, is the electrical conductivity of at least one conductive film used for a gate electrode, an auxiliary power line, or a scanning line. Higher conductivity is desirable. [Effects of the Invention]

[0015] In the disclosed invention, the power supply lines are electrically connected to each other using auxiliary power supply lines formed in a lower layer. By connecting the power supply line effectively, it is possible to prevent uneven brightness in the display area caused by a drop in the potential of the power supply line. In addition, the auxiliary power supply line can be directly connected to the auxiliary wiring on the same layer as the power supply line. Alternatively, by electrically connecting the auxiliary power supply line, the potential of the auxiliary power supply line may be decreased, and the potential of the power supply line may be decreased. Therefore, the difference in brightness between pixels caused by the drop in potential of the wiring can be prevented more effectively. By suppressing unevenness, it is possible to provide a semiconductor display device with a large display area and high image quality. It is possible.

[0016] In addition, the scanning lines are electrically or directly connected to the auxiliary wiring for the scanning lines formed in a layer above the scanning lines. By connecting the scan line, the potential of the scanning line drops, and the switching transistor This can prevent the timing of the operation from becoming uncontrollable. [Brief explanation of the drawings]

[0017] [Figure 1] 2A and 2B are an enlarged view and a cross-sectional view of a display area of ​​the semiconductor display device according to the first embodiment. [Figure 2] 1 is a circuit diagram of a display area of ​​a semiconductor display device according to a first embodiment. [Figure 3] 1 is a circuit diagram of a display area of ​​a semiconductor display device according to a first embodiment. [Figure 4] FIG. 2 is an enlarged view of a display area of ​​the semiconductor display device according to the first embodiment. [Figure 5] 10A to 10C illustrate a manufacturing method of a semiconductor display device according to Embodiment 2. [Figure 6] 10A to 10C illustrate a manufacturing method of a semiconductor display device according to Embodiment 2. [Figure 7] 10A to 10C illustrate a manufacturing method of a semiconductor display device according to Embodiment 2. [Figure 8] 10A to 10C illustrate a manufacturing method of a semiconductor display device according to Embodiment 2. [Figure 9] 10A to 10C illustrate a manufacturing method of a semiconductor display device according to Embodiment 2. [Figure 10] 10A to 10C illustrate a manufacturing method of a semiconductor display device according to Embodiment 2. [Figure 11] 10A to 10C illustrate a manufacturing method of a semiconductor display device according to Embodiment 2. [Figure 12] FIG. 10 is a circuit diagram of a pixel included in a semiconductor display device according to Embodiment 3. [Figure 13] FIG. 10 is a top view of a pixel included in a semiconductor display device according to Embodiment 3. [Figure 14] FIG. 10 is a cross-sectional view of a pixel included in a semiconductor display device according to Embodiment 3. [Figure 15] FIG. 11 is an enlarged view of a display area of ​​a semiconductor display device according to a third embodiment. [Figure 16] 10A to 10C illustrate a manufacturing method of a semiconductor display device according to Embodiment 4. [Figure 17] FIG. 11 is a cross-sectional view of a light-emitting element and wiring of a semiconductor display device according to a fifth embodiment. [Figure 18] 2A to 2C are diagrams illustrating a method for manufacturing a semiconductor display device according to Example 1. [Figure 19] 2A to 2C are diagrams illustrating a method for manufacturing a semiconductor display device according to Example 1. [Figure 20] FIG. 10 is a block diagram of a semiconductor display device according to a second embodiment. [Figure 21] 10A and 10B are a top view and a cross-sectional view of a semiconductor display device according to a third embodiment. [Figure 22] 10 is a diagram of an electronic device using a semiconductor display device according to a fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0018] Hereinafter, embodiments and examples will be described with reference to the drawings. and the present invention may be practiced in various different ways without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications can be made to the modes and details of the present invention. Therefore, it should not be construed as being limited to the description of the present embodiment and examples.

[0019] The semiconductor display device includes a panel on which light-emitting elements are formed and a controller included in the panel. Furthermore, the semiconductor device shown in this embodiment also includes a module in which an IC or the like is mounted. The display device is a state before the light emitting element is completed in the process of manufacturing the semiconductor display device. Specifically, the element substrate includes a pair of light emitting elements. Only one of the electrodes may be formed, or the conductive material that will become the one electrode may be formed. The state after the conductive film was formed and before the one electrode was formed by patterning. That's fine.

[0020] (Embodiment 1) The structure of a pixel included in a semiconductor display device will be described with reference to FIG. 1. 1 is an example of an enlarged top view of a part of a display area of ​​a semiconductor display device according to the present invention. A cross-sectional view taken along dashed line A1-A2 in FIG. 1(A) and a cross-sectional view taken along dashed line B1-B2 in FIG. 1(B) and a cross-sectional view taken along dashed line C1-C2 in FIG. 1(A) is shown in FIG. 1(C).

[0021] The semiconductor display device shown in FIG. 1 has a plurality of signal lines 101, a plurality of power supply lines 102, and It has a plurality of scanning lines 103 and a plurality of auxiliary power supply lines 104. Each of the pixels 100 is connected to one of the signal lines 101, one of the power supply lines 102, and one of the scanning lines 103. At least have a job.

[0022] The power supply line 102 of any pixel 100 is connected to the auxiliary power supply line 104. The power supply line 102 is electrically connected to another power supply line 102. In FIG. 102 and the auxiliary power line 104 are directly connected, so that the power lines 102 are electrically connected to each other. However, one of the power supply lines 102 and the auxiliary power supply line 104 may be connected via separate wiring. In addition, in FIG. 1, adjacent power supply lines 102 may be electrically connected to each other via a Although they are electrically connected, it is not necessary for all the power supply lines 102 in the display area to be electrically connected. There is no.

[0023] In the disclosed invention, at least two power supply lines 102 are connected via an auxiliary power supply line 104. By electrically connecting the power supply lines 102, the amount of current to be supplied to the pixels can be significantly reduced. Even if the potential difference is different, the potential difference that occurs in the power supply line 102 due to the potential drop is Therefore, the difference between the potentials of the display area 102 can be prevented. This can prevent uneven brightness.

[0024] Each pixel 100 also includes a light emitting element 105 and a control circuit for controlling the input of a video signal to the pixel 100. A switching transistor 106 and a driving circuit for controlling the current value supplied to the light emitting element 105 1A, the light-emitting element 105 and the light-emitting transistor 107 are In FIG. 1, each pixel has two transistors. The pixel 100 will be described as an example, but the present invention is not limited to this configuration. The display device has at least one transistor for controlling the input of a video signal to each pixel 100. It is sufficient if the light emitting element has a transistor that controls the current value supplied to the light emitting element. .

[0025] The gate electrode 108 of the switching transistor 106 is directly connected to the scanning line 103. In this specification, the gate electrode is a gate insulating film. A single conductive film or multiple laminated conductive films in contact with the film, with a gate insulating film between them This refers to the part that overlaps with the semiconductor film that is the active layer. The conductive film functions as the scanning line 103 and the gate electrode 108. However, the scanning line 103 and the gate electrode 108 are directly connected. 8 are formed of conductive films separated from each other, and the scanning line 103 and the gate electrode 108 are The scanning line 103 and the gate electrode 104 may be electrically connected via another wiring. The scanning line 103 and the gate electrode 108 are formed of different conductive films. They may be electrically connected directly or via separate wiring.

[0026] Furthermore, each pixel 100 has an auxiliary wiring 109 directly connected to the auxiliary power supply line 104 and a scanning line 1 and the auxiliary wiring 110 for the scanning lines, which is directly connected to the auxiliary power supply 103. Although the line 104 is directly connected to the auxiliary wiring 109, the auxiliary power line 104 is connected to a different wiring. 1, the scanning line 10 may be electrically connected to the auxiliary wiring 109 via the 3 is directly connected to the auxiliary wiring 110 for the scanning line, but the scanning line 103 is connected to another different wiring. The wiring 110 may be electrically connected to the auxiliary wiring 110 for scanning lines via a wiring 112 .

[0027] In the semiconductor display device shown in this embodiment mode, the auxiliary power line 104 is directly or electrically connected to By providing the auxiliary wiring 109, the combined resistance of the auxiliary power supply line 104 and the auxiliary wiring 109 is Therefore, the potential drop of the auxiliary power supply line 104 can be prevented, and the power supply A drop in the potential of the line 102 can be prevented.

[0028] The semiconductor display device shown in FIG. 1 has a configuration including auxiliary wiring 110 for scanning lines. However, in the semiconductor display device described in this embodiment mode, as long as it has at least the auxiliary wiring 109, However, the auxiliary wiring 110 for the scanning lines may not necessarily be provided. By providing the wiring 110, the combined resistance of the scanning line 103 and the auxiliary wiring 110 for the scanning line can be reduced. Therefore, the potential drop of the scanning line 103 causes the switching transistor To prevent the switching of the starter 106 from being unable to be controlled at the correct timing, You can do this.

[0029] In this embodiment, at least the power supply line 102, the auxiliary wiring 109, and the auxiliary wiring 101 for the scanning line are 10 is formed on an interlayer insulating film 111. In FIG. In addition to the auxiliary wiring 110 for the scanning lines, the signal lines 101 are also formed on the interlayer insulating film 111. Therefore, in this embodiment, the power supply line 102, the auxiliary wiring 109, the auxiliary wiring for the scanning line, The auxiliary wiring 110 and the signal line 101 are formed on a single conductive film or a laminated conductive film formed on an interlayer insulating film. The conductive film can be formed by processing (patterning) a plurality of conductive films into a desired shape. The power supply line 102, the auxiliary wiring 109, the auxiliary wiring 110 for the scanning line, and the signal line 101 are connected to one main In this embodiment, at least the gate electrode 108 and the complementary gate electrode 109 are formed. The auxiliary power supply line 104 and the scanning line 103 are formed under the interlayer insulating film 111. In this embodiment, the gate electrode 108, the auxiliary power supply line 104, and the scanning line 103 are formed on the insulating film. Before the formation of the conductive film, a single conductive film or a plurality of laminated conductive films is processed into a desired shape. Therefore, the gate electrode 108, the auxiliary power supply line 104, and the scanning line 103 can be formed with one mask. Therefore, the semiconductor display device of this embodiment can be formed with fewer masks than the conventional one. It can be produced without increasing the amount of

[0030] The gate electrode 108 is formed by a process for manufacturing the switching transistor 106. Therefore, a single conductive film or a laminated film is required to have heat resistance enough to withstand the heat treatment. The plurality of conductive films are processed (patterned) into a desired shape to form a gate electrode 108. When the scanning line 103 and the auxiliary power supply line 104 are formed together, the gate electrode 108 and the scanning line 10 There are limitations on the types of materials that can be used for the wire 3 and the auxiliary power supply wire 104. The gate electrode 108, the scanning line 103 and the auxiliary power line 104 are formed of a material with a lower resistivity. However, in this embodiment, the switching transistor 106 and the driving The power supply line 10 is formed on the interlayer insulating film 111 formed on the driving transistor 107. 2, auxiliary wiring 109 and auxiliary wiring 110 for scanning lines are formed. The wiring 109 and the auxiliary wiring 110 for the scanning line are formed by fabricating the switching transistor 106. Since they are formed later, the gate electrode 108, the scanning line 103, and the auxiliary power supply line 104 have high resistance. Therefore, the power supply line 102, the auxiliary wiring 109, the auxiliary wiring 11 for the scanning line The materials that can be used for the gate electrode 108, the scanning line 103, and the It is possible to select a material having a lower resistivity than the auxiliary power supply line 104. By fabricating the auxiliary wiring 109 and the auxiliary wiring 110 for the scanning line using the same material, the auxiliary power supply line 104 and the auxiliary wiring The combined resistance of the auxiliary wiring 109 and the combined resistance of the scanning line 103 and the auxiliary wiring 110 for the scanning line are further reduced. Therefore, the potential drop of the power supply line 102 and the potential drop of the scanning line 103 can be prevented. It is possible.

[0031] In the semiconductor display device shown in FIG. 1, an auxiliary power supply line formed under the interlayer insulating film 111 104, the scanning line 103, and other wirings. An auxiliary wiring 109 formed on an interlayer insulating film 111 , and wiring for lowering the combined resistance of the scanning line auxiliary wiring 110 and the like is connected. In this embodiment, the wiring such as the signal line 101 formed on the interlayer insulating film 111 is provided with an interlayer insulating film. A wiring formed under the insulating film 111 may be connected to reduce the combined resistance. .

[0032] Next, the level of the power supply potential applied to the power supply line varies depending on the color of light obtained from each pixel. In this case, the power supply lines to which a common power supply potential is applied are connected via an auxiliary power supply line. The case of electrically connecting will be described.

[0033] First, Figure 2 shows the circuit diagram of the display area when all adjacent power lines are electrically connected. In the display area shown in FIG. 2, signal lines S1 to S6 and power lines V1 to V6 The signal lines and the power lines provided in the display area are The number of source lines and scanning lines is not limited to the configuration shown in FIG. 00 is one of the signal lines S1 to S6, one of the power supply lines V1 to V6, and the scanning line G The scanning line G1 has at least one of scanning lines G2 to G3.

[0034] Each pixel 200 also includes at least one switching transistor 201 and at least one The switching element 203 also includes a driving transistor 202 and a light emitting element 203. The gate electrode of the transistor 201 is connected to one of the scanning lines G1 to G3. The source region and the drain region of the switching transistor 201 are connected to the signal lines S1 to The other end is connected to the gate electrode of the driving transistor 202. One of the source region and drain region of the driving transistor 202 is connected to the power supply line V1 to One end is connected to the power supply line V6, and the other end is connected to the pixel electrode of the light emitting element 203. The pixel 200 has a storage capacitor 204, and one electrode of the storage capacitor 204 is connected to a power supply line. The other electrode is connected to one of the power supply lines V1 to V6, and the other electrode is connected to the gate voltage of the driving transistor 202. The configuration of the pixel 200 shown in FIG. This is merely an example of a pixel having such a configuration, and the present invention is not limited to the pixel configuration shown in FIG.

[0035] In the display area shown in FIG. 2, all of the power supply lines V1 to V6 are connected via the auxiliary power supply line 205. Furthermore, in the display area shown in FIG. 2, auxiliary power supply lines 205 are This shows an example in which adjacent power supply lines are electrically connected at multiple points. Rather than electrically connecting the wires at only one point, as shown in Figure 2, When the power supply lines are electrically connected in this manner, the amount of current to be supplied to the pixels 200 is large for each power supply line. Even if the width is different, the potential difference that occurs in the power supply line due to the potential drop is Therefore, the brightness in the display area caused by the potential drop can be prevented. This can prevent unevenness.

[0036] Next, in Figure 3, the power lines corresponding to the colors R (red), G (green), and B (blue) are electrically connected to each other. The circuit diagram of the display area when the auxiliary power line 2 is connected is shown in Figure 3. All the components except for 05 are the same as those shown in Figure 2. In the display area shown in Figure 3, The line V1 and the power line V4 supply current to the pixel 200 corresponding to R (red). The power supply line V2 and the power supply line V5 supply current to the pixel 200 corresponding to G (green). The power supply line V3 and the power supply line V6 supply current to the pixel 200 corresponding to B (blue).

[0037] The power supply line V1 and the power supply line V4 corresponding to R (red) are powered by the auxiliary power supply line 205. Also, the power supply line V2 and power supply line V5 corresponding to G (green) are electrically connected. It is electrically connected by the power line 205. Also, the power line V3 corresponding to B (blue) is The power supply line V6 is electrically connected to the auxiliary power supply line 205.

[0038] In the semiconductor display device having the display area shown in FIG. Even if the power supply potentials are different, the potential that occurs in the power supply line due to the potential drop This can prevent the potential difference from being different between the power supply lines corresponding to each color. This makes it possible to prevent uneven brightness in the display area for each color due to the drop.

[0039] The color of the light obtained from the pixel can be changed by changing the type of electroluminescent layer used in the light emitting element 203. In this case, the wavelength of the light emitted from the light emitting element 203 can be made different. The range itself differs for each pixel 200 corresponding to each color. A color filter that can transmit light with priority within a specific wavelength range from among the light that is incident on it. By using a filter, the color of the light obtained from the pixel 200 can be changed. In this case, the wavelength range of the light emitted from the light emitting element 203 is the same for all the pixels 200. It may be the same for pixels 200 corresponding to multiple colors. The range of wavelengths of light emitted from the element 203 varies for each pixel 200 corresponding to each color. The wavelength of the light emitted from the light emitting element 203 may be a wavelength of 1000 nm or a color filter may be used. Even if the range of each pixel 200 corresponding to each color is different, by using a color filter in combination, By doing so, the color purity of the light obtained from the pixel 200 can be improved.

[0040] 3, a semiconductor device having pixels 200 from which R (red), G (green), and B (blue) light can be obtained is shown. Although the present invention has been described using an example of a display device, the present invention is not limited to this configuration. A semiconductor display device having pixels 200 that emit magenta (reddish purple) and yellow light. Alternatively, in addition to R (red), G (green), and B (blue), W (white) light can be obtained. The display device may be a semiconductor display device having the pixel 200.

[0041] In the display area shown in FIG. 3, the auxiliary power supply lines 205 are connected in multiple ways to each other. This shows an example of electrical connections at several points. Adjacent power lines are connected at one point. As shown in Figure 3, rather than electrically connecting at only one point, This is because even if the magnitude of the current to be supplied to the pixel 200 differs significantly for each power supply line, The potential difference that occurs in the power supply lines due to the potential drop is Therefore, the brightness in the display area caused by the potential drop can be prevented. These can be prevented by color.

[0042] FIG. 4 shows an example of a top view of the display area shown in the circuit diagram of FIG.

[0043] The semiconductor display device of this embodiment shown in FIG. 4 has a plurality of signal lines 301 and a power supply line 302 in the display area. 302a, power line 302b, power line 302c, multiple scanning lines 303, auxiliary power line 304a , auxiliary power supply lines 304b and 304c. Each pixel 300 is connected to one of the signal lines 301, the power supply line 302a, the power supply line 302b, and the power supply line 303. 02c and one of scan lines 303.

[0044] In FIG. 4, the power supply lines 302a, 302b, and 302c are connected to the power supply lines 302a, 302b, and 302c. Furthermore, the power supply line 302a is connected to the auxiliary power supply line 304a via the auxiliary power supply line 304a. The power supply line 302b is electrically connected to another adjacent power supply line 302a. The power supply line 304b is electrically connected to another adjacent power supply line 302b. The line 302c is electrically connected to another adjacent power line 302c via an auxiliary power line 304c. To be continued.

[0045] In FIG. 4, the power line 302a and the auxiliary power line 304a, the power line 302b and the auxiliary power line 304b are connected to each other. 4b, the power supply line 302c and the auxiliary power supply line 304c are directly connected to each other, The adjacent power lines 302a, the adjacent power lines 302b, or the adjacent power lines 302b However, the power supply line 302a and the power supply line 302c are electrically connected to each other. Power line 302b, power line 302c, auxiliary power line 304a, auxiliary power line 304b, auxiliary power The line 304c may be electrically connected to the line 304a via separate wiring.

[0046] Furthermore, each pixel 300 is connected to an auxiliary power line 304a, an auxiliary power line 304b, and an auxiliary power line 304 auxiliary wiring 309a, auxiliary wiring 309b, and auxiliary wiring 309c directly connected to , and auxiliary wiring 310 for scanning lines directly connected to the scanning lines 303. The auxiliary power line 304a, the auxiliary power line 304b, and the auxiliary power line 304c are directly connected to the auxiliary wiring 309a , auxiliary wiring 309b, and auxiliary wiring 309c, but the auxiliary power supply line 304 a, the auxiliary power supply line 304b and the auxiliary power supply line 304c are connected to the auxiliary wiring 30 9a, auxiliary wiring 309b, and auxiliary wiring 309c may be electrically connected to each other. In addition, in FIG. 4, the scanning line 303 is directly connected to the auxiliary wiring 310 for the scanning line. Even if 303 is electrically connected to the auxiliary wiring for scanning lines 310 through a different wiring, good.

[0047] In the semiconductor display device of this embodiment, auxiliary power supply lines 304a, 304b, and auxiliary power supply lines 304c are connected. Auxiliary wiring 309a and auxiliary wiring 309b are directly or electrically connected to the power line 304c. By providing auxiliary wiring 309b and auxiliary wiring 309c, the combined power of auxiliary power line 304a and auxiliary wiring 309a the combined resistance of the auxiliary power line 304b and the auxiliary wiring 309b; the combined resistance of the auxiliary power line 304c and the auxiliary Therefore, the combined resistance of the auxiliary power supply line 304a and the wiring 309c can be reduced. , the auxiliary power supply line 304b, the auxiliary power supply line 304c, and the power supply line 302 a) It is possible to prevent a drop in the potential of the power supply line 302b and the power supply line 302c.

[0048] The semiconductor display device shown in FIG. 4 has a configuration including auxiliary wiring 310 for scanning lines. However, in the semiconductor display device of this embodiment, at least the auxiliary wiring 309a and the auxiliary wiring 309 b. It is sufficient to have the auxiliary wiring 309c, and it is not necessary to have the auxiliary wiring 310 for the scanning line. However, by providing the auxiliary wiring 310 for the scanning lines, the scanning lines 303 and the scanning lines 304 can be Therefore, the combined resistance with the auxiliary wiring 310 for the scanning line can be reduced. The voltage drop makes it difficult to control the transistor switching at the correct timing. This can prevent this from happening.

[0049] In this embodiment, at least the power supply line 302a, the power supply line 302b, the power supply line 302c, The auxiliary wiring 309a, the auxiliary wiring 309b, the auxiliary wiring 309c, and the auxiliary wiring 310 for scanning lines are 4, the power supply line 302a, the power supply line 302b, and the power supply line 302 are formed on the interlayer insulating film. c, auxiliary wiring 309a, auxiliary wiring 309b, auxiliary wiring 309c, auxiliary wiring for scanning lines 310 In addition, the signal line 301 is also formed on the interlayer insulating film. In this embodiment, the power supply line 302a, the power supply line 302b, the power supply line 302c, the auxiliary wiring 309a, the auxiliary wiring 309b, the auxiliary wiring 309c, the auxiliary wiring 309d, the auxiliary wiring 309e, the auxiliary wiring 309f, the auxiliary wiring 309g, the auxiliary wiring 309h ... The auxiliary wiring 309b, the auxiliary wiring 309c, the auxiliary wiring 310 for the scanning line, and the signal line 301 are interlayer insulated. A single conductive film formed on the insulating film or multiple laminated conductive films is processed into the desired shape ( Therefore, the power supply line 302a, the power supply line 302b, the power supply line 302c, auxiliary wiring 309a, auxiliary wiring 309b, auxiliary wiring 309c, auxiliary wiring for scanning lines The line 310 and the signal line 301 can be formed with one mask.

[0050] In this embodiment, at least the gate electrode 308, the auxiliary power supply line 304a, and the auxiliary power supply line 304b, auxiliary power supply line 304c, and scanning line 303 are formed under the interlayer insulating film. In the embodiment, the gate electrode 308, the auxiliary power line 304a, the auxiliary power line 304b, the auxiliary power The source line 304c and the scanning line 303 are formed by a single conductive film or a laminated film before forming the interlayer insulating film. The gate electrode 308 can be formed by processing a plurality of conductive films into a desired shape. , auxiliary power line 304a, auxiliary power line 304b, auxiliary power line 304c, and scanning line 303 are Therefore, the semiconductor display device of this embodiment can be formed by using only one mask. This allows the production of a semiconductor device without increasing the number of blocks compared to conventional semiconductor devices.

[0051] The gate electrode 308 is made of a material that can withstand heat treatments performed in the manufacturing process of a transistor. Therefore, a single conductive film or a plurality of laminated conductive films is required. By processing (patterning) into a desired shape, the gate electrode 308 and the scanning line 303 and When the auxiliary power supply lines 304a, 304b, and 304c are formed, the gate Electrode 308, scanning line 303, auxiliary power line 304a, auxiliary power line 304b, auxiliary power line 30 There are limitations on the types of materials that can be used for the gate electrode 308. , the scanning line 303, the auxiliary power line 304a, the auxiliary power line 304b, and the auxiliary power line 304c. However, in this embodiment, it is difficult to form the transistor with a material having a low resistivity. Further on the formed interlayer insulating film, power supply lines 302a, 302b, and 30 2c, auxiliary wiring 309a, auxiliary wiring 309b, auxiliary wiring 309c, auxiliary wiring for scanning lines 31 Therefore, the power supply line 302a, the power supply line 302b, the power supply line 302c, the auxiliary wiring 3 The auxiliary wiring 309a, the auxiliary wiring 309b, the auxiliary wiring 309c, and the auxiliary wiring 310 for the scanning line are transistors. Since they are formed after the gate electrode 308, the scanning line 303, and the auxiliary power line 304 are formed, a. The auxiliary power supply line 304b and the auxiliary power supply line 304c do not require as high heat resistance. , power line 302a, power line 302b, power line 302c, auxiliary wiring 309a, auxiliary wiring 30 Materials that can be used for the wiring 309b, auxiliary wiring 309c, and auxiliary wiring 310 for scanning lines are relatively easy to find. The gate electrode 308, the scanning line 303, the auxiliary power supply line 304a, and the auxiliary power supply line 304 b. It is possible to select a material with a lower resistivity than the auxiliary power line 304c. The auxiliary wiring 309a, the auxiliary wiring 309b, the auxiliary wiring 309c, and the auxiliary wiring 309a for the scanning line are made of a thin material. 10, the combined resistance of the auxiliary power supply line 304a and the auxiliary wiring 309a, The combined resistance of the auxiliary power line 304b and the auxiliary wiring 309b, and the combined resistance of the auxiliary power line 304c and the auxiliary wiring 309c The combined resistance of the scanning line 303 and the auxiliary wiring 310 for the scanning line can be further reduced. Therefore, the potentials of the power supply lines 302a, 302b, and 302c drop, and the potentials of the scanning lines 303 A drop in potential can be prevented.

[0052] (Embodiment 2) Next, a method for manufacturing a semiconductor display device will be described in detail. A transistor (TFT) is shown as an example of a semiconductor element, but the semiconductor display device of the present invention uses The semiconductor elements that can be used are not limited to these. For example, in addition to TFTs, memory elements, diodes, etc. , resistors, capacitors, inductors, etc. can be used.

[0053] First, as shown in FIG. 5A, an insulating film 401, a semiconductor film 402, and a semiconductor layer 403 are formed on a heat-resistant substrate 400. The insulating film 401 and the semiconductor film 402 can be formed in succession. is.

[0054] The substrate 400 may be made of, for example, barium borosilicate glass or aluminoborosilicate glass. A glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. An insulating film formed on the surface of a metal substrate, including a plate, or an insulating film formed on the surface of a silicon substrate The flexible substrate including synthetic resin such as plastic may be Generally, the heat resistance temperature tends to be lower than that of the above substrates, but the processing temperature in the manufacturing process If it can be tolerated, it can be used.

[0055] As a plastic substrate, polyester such as polyethylene terephthalate (PET) is used. Polyether, polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate Carbonate (PC), nylon, polyether ether ketone (PEEK), polysulfone Polypropylene (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene Polyethylene terephthalate (PBT), polyimide, acrylonitrile butadiene styrene resin, Examples include polyvinyl chloride, polypropylene, polyvinyl acetate, and acrylic resin.

[0056] The insulating film 401 is formed by removing alkali metals such as Na and alkaline earth metals contained in the substrate 400. Diffusion into the semiconductor film 402 and adversely affecting the characteristics of semiconductor elements such as transistors. Therefore, the diffusion of alkali metals and alkaline earth metals into the semiconductor film 402 is prevented. The insulating film 401 is formed using silicon nitride, silicon nitride oxide, or the like, which can suppress the damage. , glass substrate, stainless steel substrate or plastic substrate, alkali metal or alkaline When using a substrate that contains some alkali-earth metals, the From this point of view, it is effective to provide an insulating film 401 between the substrate 400 and the semiconductor film 402. However, when using a substrate 400 such as a quartz substrate where the diffusion of impurities is not a significant problem, It is not necessarily necessary to set one up.

[0057] The insulating film 401 may be a single insulating film or a laminate of multiple insulating films. The insulating film 401 may be formed by depositing silicon oxide using a CVD method, a sputtering method, or the like. silicon nitride (SiN) x , Si3N4, etc.), silicon oxynitride (SiO x N y )(x>y>0 ), silicon oxynitride (SiN x O y ) (x>y>0) do.

[0058] In this embodiment, a silicon oxynitride film having a thickness of 100 nm, a silicon nitride oxide film having a thickness of 50 nm, The insulating film 401 is formed by stacking silicon oxynitride films each having a thickness of 100 nm in order. The film thickness and the number of layers are not limited to those described above. For example, instead of the silicon oxynitride film in the lower layer, In addition, a siloxane resin with a film thickness of 0.5 to 3 μm is applied by spin coating, slit coating, The film may be formed by a droplet discharge method, a printing method, or the like. , silicon nitride film (SiN x , Si3N4, etc.) may also be used. Alternatively, a silicon oxide film may be used. It is desirable that the value be within this range, and it can be freely selected.

[0059] Silicon oxide films are made by combining silane and oxygen, TEOS (tetraethoxysilane) and oxygen, etc. Using mixed gases, thermal CVD, plasma CVD, atmospheric pressure CVD, bias ECR CVD, etc. The silicon nitride film can be formed by a method typically using silane and ammonia. It can be formed by plasma CVD using a mixed gas of nitriding and nitriding. Silicon films and silicon nitride oxide films are typically formed using a mixture of silane and dinitrogen monoxide gas. It can be formed by Zuma CVD.

[0060] The semiconductor film 402 is preferably formed after the insulating film 401 is formed without being exposed to the air. The thickness of the semiconductor film 402 is 20 to 200 nm (preferably 40 to 170 nm, preferably The semiconductor film 402 may be an amorphous semiconductor or a polysemiconductor. It may be a crystalline semiconductor. In addition, the semiconductor may be silicon germanium. When silicon germanium is used, the concentration of germanium is 0.01 to 1.005. It is preferable that the content is about 4.5 atomic %.

[0061] The semiconductor film 402 may be crystallized by a known technique. There are a laser crystallization method using laser light and a crystallization method using a catalytic element. The crystallization method using silicon and the laser crystallization method can also be used in combination. When using a substrate with excellent heat resistance such as quartz as 400, heat bonding using an electric furnace is required. Crystallization method, lamp annealing crystallization method using infrared light, crystallization method using catalytic elements, 950℃ A crystallization method in which high-temperature annealing is combined may also be used.

[0062] For example, when laser crystallization is used, the semiconductor film 402 is exposed to the laser before the laser crystallization. In order to enhance the resistance to the semiconductor film 402, a heat treatment is performed at 550° C. for 4 hours. Then, using a solid-state laser capable of continuous oscillation, the second to fourth harmonics of the fundamental wave are generated. By irradiating light, large crystal grains can be obtained. For example, Nd:Y The second harmonic (532 nm) and third harmonic (355 nm) of the VO4 laser (fundamental wave 1064 nm) It is desirable to use a laser beam emitted from a continuous wave YVO4 laser. The laser light is converted into a harmonic by a nonlinear optical element to obtain a laser light with an output of 10 W. Preferably, the laser beam is shaped into a rectangular or elliptical shape on the irradiation surface by an optical system, and then the semiconductor The film 402 is irradiated with the energy density at this time of 0.01 to 100 MW / cm 2 degree( Preferably 0.1 to 10 MW / cm 2 ) is required. And the scanning speed is set to 10 to 200 The irradiation is performed at a speed of approximately 0 cm / sec.

[0063] As a continuous wave gas laser, an Ar laser, a Kr laser, etc. can be used. Continuous wave solid-state lasers include YAG lasers, YVO4 lasers, YLF lasers, and YAlO 3 laser, forsterite (Mg2SiO4) laser, GdVO4 laser, Y2O3 laser Laser, glass laser, ruby ​​laser, alexandrite laser, Ti:sapphire laser The above can be used.

[0064] Pulse-oscillation lasers include Ar lasers, Kr lasers, excimer lasers, and CO 2 laser, YAG laser, Y2O3 laser, YVO4 laser, YLF laser, YAlO3 Laser, glass laser, ruby ​​laser, alexandrite laser, Ti:sapphire laser A laser, a copper vapor laser or a gold vapor laser can be used.

[0065] In addition, the oscillation frequency of the pulsed laser light is set to 10 MHz or more, and the number of Laser crystallization is performed using a frequency band significantly higher than the frequency band of tens to hundreds of Hz. It is also possible to irradiate the semiconductor film 402 with pulsed laser light and then It is said that the time it takes to solidify is between several tens and several hundreds of nanoseconds. By using the above, the semiconductor film 402 is melted by the laser light and then solidified. Therefore, the solid-liquid interface in the semiconductor film 402 is continuously formed. Since the sample can be moved automatically, the crystal grains have grown continuously in the scanning direction. A semiconductor film 402 is formed. Specifically, the width of the included crystal grains in the scanning direction is 10 A collection of crystal grains with a width of about 1 to 5 μm in the direction perpendicular to the scanning direction. The single crystal grains are formed by continuously growing along the scanning direction. This results in a semiconductor film 4 with almost no grain boundaries at least in the TFT channel direction. 02 can be formed.

[0066] Laser crystallization is performed by irradiating a laser beam of a fundamental wave of continuous wave and a laser beam of a harmonic of continuous wave in parallel. Alternatively, a laser beam of a fundamental wave of continuous oscillation and a harmonic of pulse oscillation may be used. The laser beam may be irradiated in parallel with the laser beam.

[0067] The laser beam may be irradiated in an atmosphere of an inert gas such as a rare gas or nitrogen. This makes it possible to suppress roughness of the semiconductor surface caused by laser light irradiation, and to reduce the interface state density. This makes it possible to suppress variations in threshold values ​​caused by variations.

[0068] By the above-described laser light irradiation, the semiconductor film 402 with improved crystallinity is formed. In addition, the semiconductor film 402 is previously formed by a sputtering method, a plasma CVD method, a thermal CVD method, or the like. Alternatively, a polycrystalline semiconductor may be used.

[0069] In this embodiment, the semiconductor film 402 is crystallized, but it may be an amorphous silicon film without being crystallized. Alternatively, the microcrystalline semiconductor film may be used as it is for the process described later. TFTs using silicon dioxide have fewer manufacturing processes than TFTs using polycrystalline semiconductors, so they are less expensive. This has the advantage of being able to reduce the amount of waste and increase the yield.

[0070] Amorphous semiconductors can be obtained by glow discharge decomposition of a gas containing silicon. Examples of silicon-containing gases include SiH4 and Si2H6. It may be used after being diluted with nitrogen, hydrogen, or helium.

[0071] Next, an impurity element that imparts p-type conductivity or an impurity element that imparts n-type conductivity is added to the semiconductor film 402. The channel doping is performed by adding a low concentration of This may be done entirely or selectively on a part of the semiconductor film 402. The impurity elements used are boron (B), aluminum (Al), gallium (Ga), etc. Impurity elements that give n-type conductivity include phosphorus (P) and arsenic (As). Here, boron (B) is used as the impurity element, and the boron 1×10 16 ~5×10 17 / cm 3 Add it so that it is contained at a concentration of

[0072] Next, as shown in FIG. 5(B), the semiconductor film 402 is processed (patterned) into a predetermined shape. Island-shaped semiconductor films 403 and 404 are formed. FIG. 8 shows the semiconductor film 403 and the semiconductor film 404. 404 is a cross-sectional view taken along the dashed line A1-A2 in FIG. 8, and corresponds to a top view of a pixel in which the dashed line A1-A2 is formed. A cross-sectional view taken along the line B1-B2 and a cross-sectional view taken along the line C1-C2 are shown in FIG. 5(B). In FIG. 8, the semiconductor film 450 functions as one electrode of a storage capacitor.

[0073] Then, as shown in FIG. 5C, a transistor is formed using the semiconductor film 403 and the semiconductor film 404. The transistor 405 and the transistor 406 are formed. Along with 406, an auxiliary power line 407 is also formed.

[0074] Specifically, a gate insulating film 408 is formed so as to cover the semiconductor film 403 and the semiconductor film 404. Then, a plurality of patterned films having a desired shape are formed on the gate insulating film 408. The conductive film 409 and the conductive film 410 are formed. The conductive film 410 functions as a gate electrode 411 of the transistor 405. The conductive film 409 and the conductive film 410 overlapping with each other serve as a gate electrode 412 of the transistor 406. In addition, the conductive film formed in a region different from the semiconductor film 403 and the semiconductor film 404 functions as a conductive film. The conductive film 409 and the conductive film 410 function as an auxiliary power line 407 .

[0075] Then, a conductive film 409, a conductive film 410, or a resist film is formed and patterned. As a mask, an impurity layer is formed on the semiconductor film 403 and the semiconductor film 404 to give n-type or p-type conductivity. Impurity regions that are doped with materials and function as source regions, drain regions, and even LDD regions Here, the transistor 405 is an n-type transistor, and the transistor 406 is a p-type transistor. do.

[0076] FIG. 9 shows a pixel in which a transistor 405, a transistor 406, and an auxiliary power line 407 are formed. 9. The cross-sectional view taken along dashed line A1-A2 and the cross-sectional view taken along dashed line B1-B2 in FIG. 9, a cross-sectional view taken along the dashed line C1-C2 is shown in FIG. 5(C). The conductive film 409 and the conductive film 410 overlap with the semiconductor film 450. This corresponds to the other electrode 451. In FIG. The gate electrode 412 is formed by a continuous conductive film 409 and a continuous conductive film 410. The region where the gate insulating film 408 is sandwiched between the body film 450 and the electrode 451 serves as a storage capacitor. 9. The scanning line 452 shown in FIG. 9 is formed of the conductive film 4 9, the scanning line 452 and the transistor 410 are formed. The gate electrode 411 of the gate electrode 405 is formed by a continuous conductive film 409 and a conductive film 410. are.

[0077] The gate insulating film 408 is made of, for example, silicon oxide, silicon nitride, silicon nitride oxide, or silicon oxynitride. Silicon or the like is used as a single layer or in a laminated state. When the layer is laminated, for example, from the substrate 400 side, Therefore, it is preferable to form a three-layer structure of a silicon oxide film, a silicon nitride film, and a silicon oxide film. For example, a method using silicon oxide can be used. When forming a gate insulating film by plasma CVD, TEOS (Tetraethyl O A mixture of rhososilicate and O2 was used, and the reaction pressure was 40 Pa and the substrate temperature was 300-400℃, high frequency (13.56MHz) and power density 0.5-0.8W / cm 2 and form.

[0078] The gate insulating film 408 is formed by performing high density plasma treatment on the semiconductor film 403 and the semiconductor film The surface of 404 may be oxidized or nitrided. For example, rare gases such as He, Ar, Kr, and Xe, and oxygen, nitrogen oxide, ammonia, nitrogen, and hydrogen. In this case, the plasma is excited by introducing microwaves. This allows for the generation of high density plasma at low electron temperatures. Oxygen radicals (which may contain OH radicals) and nitrogen radicals (NH The surfaces of the semiconductor films 403 and 404 are oxidized or deoxidized by the oxidizing agent (which may contain radicals). By nitriding or nitriding, an insulating film of 1 to 20 nm, typically 5 to 10 nm, is formed on the semiconductor film 4. 03, is formed so as to contact the semiconductor film 404. This insulating film of 5 to 10 nm is used as the gate insulating film. It is used as the veneer 408.

[0079] The oxidation or nitridation of the semiconductor film by the high-density plasma treatment described above proceeds as a solid-phase reaction. The interface state density between the insulating film and the semiconductor film can be made extremely low. By directly oxidizing or nitriding the semiconductor film using the ZOLL process, the thickness of the insulating film formed can be increased. In addition, when the semiconductor film has crystallinity, high density plasma treatment can be performed. By oxidizing the surface of the semiconductor film through a solid-state reaction using This prevents the rapid progress of the oxidation process and forms a gate insulating film with good uniformity and low interface state density. The insulating film formed by the high density plasma treatment can be used to remove a part of the gate insulating film. The transistors formed by including the above-mentioned elements in all the layers can suppress variations in characteristics.

[0080] Aluminum nitride can also be used as the gate insulating film 408. The thermal conductivity of the silicon is relatively high, and the heat generated by the transistor can be efficiently dissipated. Also, after forming silicon oxide or silicon oxynitride that does not contain aluminum, aluminum nitride is A layer of tungsten may be used as the gate insulating film.

[0081] In this embodiment, the gate electrode is formed by using two stacked conductive films 409 and 410. An electrode 411, a gate electrode 412, an auxiliary power supply line 407, an electrode 451, and a scanning line 452 are formed. However, the present invention is not limited to this structure. A single layer of conductive film may be used, or three or more conductive films may be stacked. In the case of a three-layer structure in which two or more conductive films are laminated, the molybdenum film, the aluminum film, and the molybdenum film are laminated. It is advisable to adopt a laminated structure of silicon films.

[0082] The gate electrode 411, the gate electrode 412, the auxiliary power supply line 407, the electrode 451, and the scanning line 452 are The conductive film to be formed is made of tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), and Molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb ) or the like can be used. In addition, alloys containing the above metals as the main components may be used, or Alternatively, a compound containing an impurity element such as phosphorus that provides conductivity to the semiconductor film may be used. The insulating film 11 may be formed using a semiconductor such as polycrystalline silicon doped with an element.

[0083] In this embodiment, the first conductive film 409 is made of tantalum nitride or tantalum (Ta). The second conductive film 410 is made of tungsten (W). In addition to the examples shown in this embodiment, tungsten nitride and tungsten, molybdenum nitride, Examples include aluminum and molybdenum, aluminum and tantalum, and aluminum and titanium. Since tungsten and tantalum nitride have high heat resistance, they can be used in the process after forming the two-layer conductive film. In addition, a heat treatment for thermal activation can be performed by combining two conductive films. For example, silicon and nickel silicide doped with impurities that give n-type conductivity are used. Also used are silicon doped with impurities to give n-type and tungsten silicide. It is possible.

[0084] The conductive films 409 and 410 can be formed by a CVD method, a sputtering method, or the like. In this embodiment, the first conductive film 409 is formed to a thickness of 20 to 100 nm, and the second conductive film 409 is formed to a thickness of 20 to 100 nm. The first conductive film 410 is formed to a thickness of 100 to 400 nm.

[0085] The gate electrode 411, the gate electrode 412, the auxiliary power supply line 407, the electrode 451, the scanning line 4 As a mask used when forming 52, silicon oxide, silicon oxynitride, etc. are used instead of resist. In this case, a mask such as silicon oxide or silicon oxynitride may be used as a mask. Although a mask formation process is added, the mask film is less likely to be lost during etching than the resist. Therefore, the gate electrode 411, the gate electrode 412, and the auxiliary power supply line 414 having the desired shape can be formed. 07, electrodes 451, and scanning lines 452 can be formed. By using a discharge method, the gate electrode 411, the gate electrode 412, the auxiliary power supply line 407, and the electrode The droplet discharge method is a method of forming droplets containing a predetermined composition. It means a method of forming a predetermined pattern by ejecting or spraying ink from a fine hole. This category includes the Jet method.

[0086] The gate electrode 411, the gate electrode 412, the auxiliary power supply line 407, the electrode 451, the scanning line 4 When forming 52, the optimum etching method and etcher are selected depending on the material of the conductive film used. The type of conductive material can be selected appropriately. Hereinafter, tantalum nitride is used as the first conductive film 409, An example of an etching method when tungsten is used as the second conductive film 410 is as follows. This will be explained in detail.

[0087] First, a tantalum nitride film is formed, and then a tungsten film is formed on the tantalum nitride film. Then, a mask is formed on the tungsten film, and a first etching is performed. In this example, the first etching condition is used first, and then the second etching condition is used. The etching conditions were ICP (Inductively Coupled Plasma) (Inductively coupled plasma) etching method is used, and the etching gases are CF4, Cl2, and O2. The gas flow ratio was set to 25:25:10 (sccm) at a pressure of 1 Pa. Plasma was generated by applying 500 W of RF (13.56 MHz) power to the coil-type electrode. Then, a 150W RF (13.56W) power source was also installed on the substrate side (sample stage). MHz) power is applied and a substantially negative self-bias voltage is applied. By using the etching conditions, the tungsten film is etched so that its edges have a tapered shape. It can be switched.

[0088] Next, etching is performed under the second etching conditions. CF4 and Cl2 were used as the mixing gases, and the gas flow ratio was 30:30 (sccm ) and 500 W of RF (13.56 MHz) power was applied to the coil-shaped electrode at a pressure of 1 Pa. Plasma is generated by inserting the electrode into the substrate and etching is performed for approximately 30 seconds. Also, 20W of RF (13.56MHz) power was applied, essentially applying a negative self-bias voltage. Under the second etching condition, in which CF4 and Cl2 were mixed, the tungsten film and the tungsten nitride film were The tantalum film is also etched to the same extent.

[0089] In the first etching, the mask is shaped appropriately to prevent the applied voltage from being applied to the substrate side. The effect of the bias voltage is such that the edges of the tantalum nitride film and the tungsten film are aligned at an angle of 15 to 200°C. The gate insulating film 408 has a tapered shape of about 45°. The exposed portion is covered with other tantalum nitride films and tungsten films. It is etched and becomes thinner by about 20 to 50 nm.

[0090] Then, a second etching is performed without removing the mask. The tungsten film is selectively etched using CF4, Cl2, and O2 as the etching gas. In this case, the tungsten film is preferentially etched by the second etching, but the tungsten nitride film is The tantalum film is hardly etched.

[0091] By the above-described first etching and second etching, the conductive film 4 using tantalum nitride is formed. and a conductive film 410 made of tungsten and having a width narrower than that of the conductive film 409. It is possible.

[0092] Then, the conductive film 409 formed by the first etching and the second etching described above By using the conductive film 410 as a mask, the source region can be formed without forming a new mask. The impurity regions functioning as the semiconductor film 403, the drain region, and the LDD region are formed in the semiconductor film 404. It can be made into different sizes within 04.

[0093] After the impurity regions are formed, they may be activated by heat treatment. After forming a 50 nm silicon oxynitride film, the film was heated at 550°C for 4 hours in a nitrogen atmosphere. Heat treatment may be carried out.

[0094] In addition, a silicon nitride film containing hydrogen was formed to a thickness of 100 nm, and then heated at 410°C for 1 hour. The semiconductor film 403 and the semiconductor film 404 are hydrogenated by heat treatment in a nitrogen atmosphere. Alternatively, in a nitrogen atmosphere with an oxygen concentration of 1 ppm or less, preferably 0.1 ppm or less. Then, heat treatment is carried out at 400 to 700°C (preferably 500 to 600°C), and then 3 to 400°C. Heat treatment is carried out in an atmosphere containing 100% hydrogen at 300 to 450°C for 1 to 12 hours. In this way, the semiconductor film 403 and the semiconductor film 404 may be hydrogenated. In addition, dangling bonds can be terminated by thermally excited hydrogen. As a means for this, plasma hydrogenation (using hydrogen excited by plasma) may be performed. The activation treatment may be performed after the insulating film 413 is formed.

[0095] The heat treatment may be performed by a thermal annealing method using an annealing furnace, a laser annealing method, or Rapid thermal annealing (RTA) can be used. Not only hydrogenation but also activation of impurity elements added to the semiconductor films 403 and 404 It can be done.

[0096] Through the above series of steps, the n-channel transistor 405 and the current supplied to the light-emitting element are formed. A p-channel transistor 406 for controlling the transistor can be formed. The method for manufacturing the star is not limited to the above-described steps.

[0097] Next, as shown in FIG. 6A, the transistor 405, the transistor 406, the auxiliary power line 4 6A, an electrode 451, a scanning line 452, and the like are arranged to cover the electrode 451 and the scanning line 452. An insulating film 413 is formed to cover the insulating film 452. The insulating film 413 is not necessarily required. However, by forming the insulating film 413, impurities such as alkali metals and alkaline earth metals are removed. , it is possible to prevent the current from entering the transistor 405 and the transistor 406. The insulating film 413 may be made of silicon nitride, silicon nitride oxide, aluminum nitride, aluminum oxide, It is desirable to use silicon oxide, silicon oxynitride, etc. In this embodiment, the thickness is 600 nm. A silicon oxynitride film having a thickness of about 1000 nm is used as the insulating film 413. In this case, the hydrogenation step is performed as follows: This may be performed after the silicon oxynitride film is formed.

[0098] Next, the transistor 405, the transistor 406, and the auxiliary power supply line 407 are covered. Although not shown in FIG. 6A, an insulating film is further formed to cover the electrodes 451 and the scanning lines 452. An insulating film 414 is formed on the insulating film 413. The insulating film 414 is made of acrylic, polyimide, or vinyl. Heat-resistant organic materials such as cyclobutene, polyamide, and epoxy can be used. In addition to the above organic materials, low-k materials, siloxane resins, Silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, PSG (phosphor glass), BPSG ( The siloxane resin can be made of silicon, boron nitride, alumina, etc. It is a material whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O). In addition, fluorine, fluoro groups, organic groups (e.g., alkyl groups, aromatic hydrocarbon groups), It is also possible to have at least one of these materials. The insulating film 414 may be formed by this.

[0099] The insulating film 414 can be formed by a CVD method, a sputtering method, a SOG method, a spin method, or the like, depending on the material. Coating, dipping, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife coater - etc. can be used.

[0100] In this embodiment, the insulating films 413 and 414 function as interlayer insulating films. A single layer insulating film may be used as the interlayer insulating film, or a laminate of three or more layers of insulating films may be used as the interlayer insulating film. It may also be used as a membrane.

[0101] Next, the insulating film 413 and the semiconductor film 404 are removed so that the semiconductor film 403 and the semiconductor film 404 are partially exposed. A contact hole is formed in the insulating film 414. The gas to be used is preferably a mixture of CHF3 and He, but is not limited to this. As shown in FIG. 6(B), the semiconductor The conductive film 415 and the conductive film 416 contacting the conductive film 403 are connected to the auxiliary conductive film 416 through the contact holes. The conductive films 417 and 418 in contact with the power supply line 407 are connected to the semiconductor device through the contact holes. A conductive film 419 and a conductive film 418 are formed in contact with the conductive film 404 .

[0102] FIG. 10 corresponds to a top view of a pixel in which the conductive films 415 to 419 are formed. A cross-sectional view taken along line A1-A2, a cross-sectional view taken along dashed line B1-B2, and a cross-sectional view taken along dashed line C1-C2. A cross-sectional view is shown in FIG. 6(B). As shown in FIG. 10, the conductive film 416 is The conductive film 409 and the conductive film 410 function as a gate electrode 412. The conductive film 415 functions as a signal line. The conductive film 417 functions as an auxiliary wiring. The conductive film 418 functions as a power supply line, and the conductive film 418 functions as another power supply line. 10, the lead wire 404 is electrically connected to the auxiliary power supply line 407. The conductive film 420, together with the conductive films 415 to 419, is connected to the scanning line 4 through the contact hole. The conductive film 420 is formed so as to be connected to the gate electrode 52. The conductive film 420 functions as an auxiliary wiring for the scanning line. do.

[0103] The conductive films 415 to 420 can be formed by a CVD method, a sputtering method, or the like. Specifically, the conductive films 415 to 420 may be made of aluminum (Al), tungsten (W), or the like. W, titanium (Ti), tantalum (Ta), molybdenum (Mo), nickel (Ni) , platinum (Pt), copper (Cu), gold (Au), silver (Ag), manganese (Mn), neodymium ( Nd), carbon (C), silicon (Si), etc. can be used. An alloy containing the above elements may be used, or a compound containing the above elements may be used. 420 is a single film having the above element, or a stack of multiple films having the above element. , can be used.

[0104] Examples of alloys with aluminum as the main component include aluminum-based alloys containing nickel. Also, there are those that are mainly composed of aluminum and nickel, and one of carbon and silicon. Examples include aluminum and aluminum alloys. Silicon has a low resistance and is inexpensive, so it is a suitable material for forming the conductive films 415 to 420. In particular, aluminum silicon is suitable for forming the conductive films 415 to 420 by patterning. When etching, the occurrence of hillocks during resist baking is prevented compared to aluminum films. In addition, instead of silicon (Si), about 0.5% of C is added to the aluminum film. You can also mix in u.

[0105] The conductive films 415 to 420 are, for example, a barrier film, an aluminum silicon film, and a barrier film. The laminated structure of the barrier film, aluminum silicon film, titanium nitride film and barrier film. The barrier film may be made of titanium, titanium nitride, molybdenum, or molybdenum. This film is made of butanol nitride. The aluminum silicon film is sandwiched between the film. Forming a barrier film can better prevent the occurrence of hillocks on aluminum and aluminum silicon. In addition, a barrier film can be formed using titanium, which is a highly reducing element. Even if a thin oxide film is formed on the semiconductor film 403 and the semiconductor film 404, the barrier film The titanium contained in the conductive film reduces the oxide film, forming conductive film 415, conductive film 416, conductive film 418, and conductive film 419. The conductive film 419 can be in good contact with the semiconductor film 403 and the semiconductor film 404. In addition, a plurality of barrier films may be stacked. In that case, for example, the conductive film 4 15~The conductive film 420 is made of titanium, titanium nitride, aluminum silicon, titanium, nitride from the bottom up. It can be made into a five-layer structure of titanium dioxide.

[0106] The electrical conductivity of at least one of the conductive films 415 to 420 is insulated. The gate electrode 411 and the gate electrode 412 are formed below the insulating film 413 and the insulating film 414. 2. At least one conductive material used for the auxiliary power line 407, the electrode 451 and the scanning line 452 It is desirable that the electrical conductivity of the conductive film 415 to the conductive film 420 is higher than that of the conductive film 415. The thickness of each of these portions is the thickness of the gate electrode 411, the gate electrode 412, the auxiliary power supply line 40 7, it is desirable that the thickness is thicker than the film thickness of either the electrode 451 or the scanning line 452. Specifically, the thickness of any one of the conductive films 415 to 420 is 0.8 μm or more and 1.5 μm or less. It is desirable that the thickness of the conductive films 415 to 420 is set to be equal to or less than 100 μm. This increases the electrical conductivity, and reduces the combined resistance of the auxiliary power line and auxiliary wiring, and the scanning line and auxiliary wiring. The combined resistance of the auxiliary wiring can be reduced.

[0107] In this embodiment, from the side closer to the insulating film 414, a titanium film with a thickness of about 100 nm, a 7 An aluminum film with a thickness of about 00nm to 1000nm and a titanium film with a thickness of about 100nm are laminated. By patterning these laminated films, conductive films 415 to 420 are formed. do.

[0108] Next, as shown in FIG. 7(A), a conductive film (not shown) is applied to cover the conductive films 415 to 419. An insulating film 421 is formed to cover the conductive film 420, and then a part of the conductive film 419 is A contact hole is formed in the insulating film 421 so as to expose the insulating film 421. A pixel electrode 422 is formed so as to be in contact with the conductive film 419 in the hole.

[0109] The insulating film 421 can be formed using an organic resin film, an inorganic insulating film, or a siloxane-based insulating film. For organic resin films, for example, acrylic, epoxy, polyimide, polyamide, Polyvinylphenol, benzocyclobutene, etc. can be used. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, and DLC (diamond-like carbon) are used instead. The insulating film 421 may be a film containing carbon, as shown in FIG. The film can be formed by a CVD method, a sputtering method, a droplet discharge method, a printing method, or the like. The insulating film 421 prevents substances such as moisture and oxygen that accelerate deterioration of the light-emitting element from being absorbed by other It is more desirable to use a film that is less permeable than an insulating film. Silicon nitride, diamond-like carbon (DLC), and aluminum nitride formed by the TA method It is preferable to use the following as the insulating film 421.

[0110] In this embodiment, indium tin oxide (ITSO) containing silicon oxide is formed by sputtering. ) to form a light-transmitting conductive film, and then patterning the conductive film to form a pixel. An electrode 422 is formed. In addition to ITSO, indium tin oxide (ITO), zinc oxide ( ZnO), indium zinc oxide (IZO), gallium-doped zinc oxide (GZO), etc. Alternatively, a transparent conductive oxide material other than ITSO may be used for the pixel electrode 422. As the electrode 422, in addition to the transparent oxide conductive material, for example, titanium nitride, zirconium nitride, In addition to single layer films made of one or more of Ti, W, Ni, Pt, Cr, Ag, Al, etc., nitride Lamination of titanium and aluminum-based films, titanium nitride film and aluminum-based film A three-layer structure of a transparent oxide conductive film and a titanium nitride film can be used. When light is extracted from the pixel electrode 422 side using a material other than the material, the thickness of the film is set to a level that allows light to pass through (preferably Preferably, it is formed to a thickness of about 5 nm to 30 nm.

[0111] When ITO is used for the pixel electrode 422, silicon oxide is applied to the ITO as a target. In this embodiment, a material containing In2O3 and SnO2 A target containing SiO2 in a weight ratio of 85:10:5 was used, and the flow rate of Ar was 50sccm, O2 flow rate 3sccm, sputtering pressure 0.4Pa, sputtering power 1 kW, and the film formation rate was 30 nm / min. The film thickness was 105 nm. A film can be formed.

[0112] The conductive film 419 is provided at a portion thereof in contact with the pixel electrode 422 with an ionized material such as aluminum. When a metal with a relatively high conductivity is used, a transparent oxide conductive material is used for the pixel electrode 422. However, in this embodiment, the conductive film 419 is easily electrolytically corroded. Conductive film 419 is formed by stacking a titanium film, an aluminum film, and a titanium film in this order from the bottom side. The conductive film 419 is covered with an insulating film 421. The titanium film and the pixel electrode 422 are connected through a contact hole formed in the insulating film 421. Therefore, the ionization tendency is relatively small in a metal film such as titanium film. A metal film such as an aluminum film, which has a relatively high tendency to become ionized, is sandwiched between the insulating film and the By covering the conductive film 419 with the insulating film 421, the conductive film 419 can be prevented from contacting the pixel electrode 422 and other conductive layers. It can prevent electrolytic corrosion from occurring when it comes into contact with the body. By using a metal film such as an aluminum film with high resistance as the conductive film 419, the resistance value of the conductive film 419 can be reduced. can be lowered.

[0113] Note that the conductive film that becomes the pixel electrode 422 contains a conductive polymer. A conductive composition can also be used. The conductive composition is used to form the conductive film that will become the pixel electrode 422. The resistance is 10,000Ω / □ or less, and the transmittance at a wavelength of 550 nm is 70% or more. It is preferable that the sheet resistance is lower. The resistivity of the conductive polymer is preferably 0.1 Ω·cm or less.

[0114] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, as a π-electron conjugated conductive polymer, polyaniline and its derivatives, polypyrrole and / or its derivatives, polythiophene and / or its derivatives, copolymers of two or more of these Examples include fusion.

[0115] Specific examples of π-conjugated conductive polymers include polypyrrole, poly(3-methylpyrrole), Poly(3-butylpyrrole), poly(3-octylpyrrole), poly(3-decylpyrrole) ), poly(3,4-dimethylpyrrole), poly(3,4-dibutylpyrrole), poly( 3-hydroxypyrrole), poly(3-methyl-4-hydroxypyrrole), poly(3- methoxypyrrole), poly(3-ethoxypyrrole), poly(3-octoxypyrrole) , poly(3-carboxylpyrrole), poly(3-methyl-4-carboxylpyrrole) , poly(N-methylpyrrole), polythiophene, poly(3-methylthiophene), poly (3-butylthiophene), poly(3-octylthiophene), poly(3-decylthiophene) thiophene), poly(3-dodecylthiophene), poly(3-methoxythiophene), poly(3 -ethoxythiophene), poly(3-octoxythiophene), poly(3-carboxyl thiophene), poly(3-methyl-4-carboxylthiophene), poly(3,4-ethylthiophene) dioxythiophene), polyaniline, poly(2-methylaniline), poly(2-methylaniline) Poly(2-isobutylaniline), Poly(3-isobutylaniline) , poly(2-anilinesulfonic acid), poly(3-anilinesulfonic acid), etc.

[0116] The above-mentioned π-conjugated conductive polymer may be used alone as a conductive composition for the pixel electrode 422. In addition, organic resins are used to adjust the film properties such as the uniformity of the thickness of the conductive composition film and the film strength. It can be used by adding.

[0117] The organic resin is a thermosetting resin if it is compatible with or can be mixed and dispersed with the conductive polymer. It may be a thermoplastic resin or a photocurable resin. Ethylene terephthalate, polybutylene terephthalate, polyethylene naphthalate, etc. Polyester resins, polyimides, polyimide-imide and other polyimide resins, polyamides Polyamide resins such as polyamide 6,6, polyamide 12, polyamide 11, polyfluoride Polyvinylidene fluoride, polyvinyl fluoride, polytetrafluoroethylene, ethylene tetrafluoroethylene Fluorine resins such as chloroethylene copolymer, polychlorotrifluoroethylene, polyvinyl alcohol Alcohol, polyvinyl ether, polyvinyl butyral, polyvinyl acetate, polyvinyl chloride vinyl resins such as acrylic, epoxy resins, xylene resins, aramid resins, polyurethane resins, Polyurea resin, melamine resin, phenolic resin, polyester, acrylic resin, and copolymers thereof.

[0118] Furthermore, in order to adjust the electrical conductivity of the conductive composition, an acceptor or By doping with donor dopants, the conjugated electrons of π-conjugated conducting polymers can be The redox potential may be changed.

[0119] Acceptor dopants include halogen compounds, Lewis acids, protonic acids, and organic cyano compounds. Examples of halogen compounds include chlorine, bromine, and methyl methyl acrylate. Examples of Lewis acids include iodine, iodine, iodine chloride, iodine bromide, and iodine fluoride. Phosphorus pentafluoride, arsenic pentafluoride, antimony pentafluoride, boron trifluoride, boron trichloride, boron tribromide Examples of protonic acids include hydrochloric acid, sulfuric acid, nitric acid, phosphoric acid, and fluoroboric acid. Inorganic acids such as hydrofluoric acid and perchloric acid, and organic acids such as organic carboxylic acids and organic sulfonic acids Examples of the organic carboxylic acid and organic sulfonic acid include the above-mentioned carboxylic acid compounds. The organic cyano compounds can be used as the hydroxy compounds and sulfonic acid compounds. Compounds containing two or more cyano groups can be used. For example, tetracyanoethylene, tetracyanoethylene, Tetracyanoethylene oxide, tetracyanobenzene, tetracyanoquinodimethane, tetracyano cyanoazanaphthalene and the like.

[0120] As the donor dopant, alkali metals, alkaline earth metals, quaternary amine compounds, etc. Some examples include:

[0121] The conductive composition is dissolved in water or an organic solvent (alcohol-based solvent, ketone-based solvent, ester-based solvent) The pixel electrode 422 is formed by a wet method by dissolving the compound in a solvent such as a hydrocarbon solvent or an aromatic solvent. A conductive film can be formed.

[0122] The solvent for dissolving the conductive composition is not particularly limited, and the conductive polymer It is sufficient to use a solvent that dissolves polymeric resin compounds such as organic resins. Alcohol, ethanol, propylene carbonate, N-methylpyrrolidone, dimethylform Amides, dimethylacetamide, cyclohexanone, acetone, methyl ethyl ketone, Conductive compounds are dissolved in a single or mixed solvent such as ethyl isobutyl ketone or toluene. That's fine.

[0123] The conductive composition is dissolved in a solvent as described above, and then the conductive composition is applied by a coating method, a droplet ejection method, or the like. The film can be formed by a wet method such as an ink jet method or a printing method. The solvent may be dried by heat treatment or under reduced pressure. In the case of a curable material, a heat treatment may be further carried out, and in the case of a photocurable material, a light irradiation treatment may be carried out.

[0124] After forming the conductive film that will become the pixel electrode 422, the surface is planarized by the CMP method. The surface may be polished by wiping with a polyvinyl alcohol-based porous material.

[0125] Next, as shown in FIG. 7A, a film is formed on the insulating film 421 so as to cover a part of the pixel electrode 422. A partition wall 423 having an opening is formed. The pixel electrode 422 is The partition wall 423 is made of an organic resin film, an inorganic insulating film, or a siloxane-based insulating film. The organic resin film can be formed using, for example, acrylic, polyimide, For the inorganic insulating film such as polyamide, silicon oxide, silicon nitride oxide, or the like can be used. In particular, a photosensitive organic resin film is used for the partition wall 423, and an opening is formed above the pixel electrode 422. The sidewall of the opening is formed as an inclined surface with a continuous curvature, This can prevent the element electrodes 422 from being connected to the common electrode 425 that will be formed later. In this case, the mask can be formed by a droplet discharge method or a printing method. The electrode itself can also be formed by a droplet discharge method or a printing method.

[0126] FIG. 11 corresponds to a top view of a pixel in which a pixel electrode 422 and a partition wall 423 are formed. Cross-sectional view along dashed line A1-A2, cross-sectional view along dashed line B1-B2, cross-sectional view along dashed line C1-C2 7A shows a cross-sectional view of the partition wall 423. As shown in FIG. 11, the partition wall 423 is formed on the insulating film 414. The conductive film 415 to the conductive film 420 are formed so as to cover the conductive film 415 to the conductive film 420. In order to reduce the resistance, the thickness of the conductive films 415 to 420 is set to 0.8 μm or more and 1.5 μm or less. Even if the thickness is increased to about 100 nm or less, the electroluminescent layer 424 to be formed later will not be 5. The film thickness becomes extremely thin due to the step formed between the conductive film 420 and the insulating film 414. Alternatively, it is possible to prevent breakage of the step.

[0127] Next, before forming the electroluminescent layer 424, moisture adsorbed on the partition wall 423 and the pixel electrode 422 is removed. In order to remove carbon dioxide and oxygen, heat treatment is carried out in the air or in a vacuum ( Specifically, the substrate temperature is set to 200°C to 450°C, preferably Preferably, the heat treatment is carried out at 250 to 300°C for about 0.5 to 20 hours in a vacuum atmosphere. Or 3 x 10 -7 Torr or less, preferably 3×10 -8 Torr or less Then, after the heat treatment in a vacuum atmosphere, the electroluminescent layer 424 is When forming the electroluminescent layer 424, the substrate is kept in a vacuum atmosphere until just before the electroluminescent layer 424 is formed. In addition, the pixel voltage can be adjusted before or after the vacuum bake. The pole 422 may be irradiated with ultraviolet light.

[0128] 7B, the opening of the partition wall 423 is in contact with the pixel electrode 422. In this way, the electroluminescent layer 424 is formed. The electroluminescent layer 424 is composed of a single layer. Alternatively, a plurality of layers may be laminated, and each layer may contain not only organic materials but also inorganic materials. The luminescence in the electroluminescent layer 424 may include singlet excitation. The emission (fluorescence) when returning from the excited state to the ground state and the emission when returning from the triplet excited state to the ground state When it is made up of multiple layers, the pixel electrode 4 corresponds to the cathode. An electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer are laminated on the substrate 22 in this order. When the pixel electrode 422 corresponds to an anode, the electroluminescent layer 424 is used as a hole injection layer, The layer is formed by laminating a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer in this order.

[0129] The electroluminescent layer 424 is made of a polymer organic compound, a medium molecular organic compound (not sublimable, Organic compounds with chain lengths of 10 μm or less), low molecular weight organic compounds, inorganic compounds Whichever of these is used, it is possible to form the film by a droplet discharge method. The material, low molecular weight organic compound, and inorganic compound may be formed by a vapor deposition method.

[0130] Then, as shown in FIG. 7(B), a common electrode 425 is formed so as to cover the electroluminescent layer 424. The common electrode 425 is generally made of a metal, alloy, electrically conductive compound, or Specifically, alkali metals such as Li and Cs can be used. Alkaline earth metals such as Mg, Ca, Sr, and alloys containing these metals (Mg:A It can also be formed using rare earth metals such as Yb and Er, in addition to rare earth metals such as Al:Li and Yb. In addition, by forming a layer containing a material with high electron injection properties in contact with the common electrode 425, A normal conductive film using aluminum or a transparent oxide conductive material can also be used. .

[0131] In the opening of the partition wall 423, the pixel electrode 422, the electroluminescent layer 424, and the common electrode 425 overlap. By overlapping with each other, a light emitting element 426 is formed.

[0132] The light from the light emitting element 426 may be extracted from the pixel electrode 422 side. The above three configurations may be from the common electrode 425 side or from both sides. In accordance with the desired configuration, the material and thickness of the pixel electrode 422 and the common electrode 425 are selected. The thickness and thickness of the film should be selected accordingly.

[0133] After the light emitting element 426 is formed, an insulating film may be formed on the common electrode 425. The insulating film is a material that prevents substances such as moisture and oxygen, which can accelerate the deterioration of light-emitting elements, from being absorbed by other insulating films. A film that is relatively difficult to transmit light is used. Typical examples include DLC film, carbon nitride film, RF switch film, etc. It is desirable to use a silicon nitride film formed by sputtering. and a membrane that is more permeable to substances such as moisture and oxygen than the membrane. It is also possible to use these as the insulating film by laminating them.

[0134] In practice, once the state shown in Figure 7(B) is completed, it is necessary to take care not to expose it to the outside air. Highly airtight protective film with little outgassing (lamination film, UV curable resin film) It is preferable to package (enclose) the product in a protective film (such as a film) or a cover material.

[0135] Through the above process, a semiconductor display device can be manufactured.

[0136] In this embodiment, the transistors 405 and 406 in the display area are fabricated. In addition to the transistors in the display area, the driver circuits and other integrated circuits The transistors used in the circuit can also be formed together. and transistors used in driver circuits and other integrated circuits. It is not necessary to make the thickness of the gate insulating film 408 the same for all the gate insulating films. In transistors used in driving circuits and other integrated circuits, The thickness of the gate insulating film 408 may be made smaller than that of the transistor.

[0137] In addition, by using an SOI (Silicon on Insulator) substrate, Crystalline semiconductors can also be used as the semiconductor films 402 and 403. For example, UNIBOND, ELTRAN (Epitaxi), which are represented by SmartCut, al Layer Transfer), Dielectric Isolation Method, PACE (Plasma As Bonding methods such as SIM (Sisted Chemical Etching) and Using the OX (Separation by Implanted Oxygen) method, etc. It can be made by

[0138] Furthermore, the semiconductor element manufactured by the above method can be mounted on a flexible substrate such as plastic. The semiconductor display device may be formed by transferring the pattern onto a substrate. A metal oxide film is provided between the substrate and the semiconductor element, and the metal oxide film is crystallized. A method of weakening the semiconductor element and then peeling and transferring it. and removing the amorphous silicon film by irradiation with laser light or etching. This method involves mechanically separating the substrate and the semiconductor element and transferring it to the substrate. Separating the semiconductor element from the substrate by scraping or etching it with a solution or gas. The transfer method can be used in various ways, such as the method of fabricating a light-emitting element. It is advisable to do this before

[0139] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0140] (Embodiment 3) In this embodiment, the number of transistors included in a pixel and the connection relationship thereof are different from those in the first embodiment. The configuration of the semiconductor display device in the different case will be described below.

[0141] FIG. 12 shows a circuit diagram of a pixel included in the semiconductor display device of this embodiment mode. The pixel has a signal line Si (i=1 to x), a first power supply line Vai (i=1 to x), and a second power supply line Vai (i=1 to x). The source line Vbi (i=1 to x), the first scanning line Gaj (j=1 to y), and the second scanning line Gb j (j=1 to y). Furthermore, the pixel shown in FIG. The light-emitting element 506 includes at least a first transistor 501 to a second transistor 505. The pixel shown in FIG. 12 has a gate electrode of the transistor 505 and a second power supply line Vbi. Although a storage capacitor 507 is provided, the storage capacitor 507 is not necessarily required.

[0142] The gate electrode of the transistor 501 is connected to the signal line Si. One of the source region and drain region of 501 is connected to the first power supply line Vai, and the other The other end is connected to one of the source and drain regions of transistor 502. The gate electrode of the transistor 502 is connected to the first scanning line Gaj. The other of the source and drain regions of 502 is the source and drain region of transistor 503. The transistor 504 is connected to one of the source and drain regions of the transistor 504. The gate electrode of the transistor 503 is connected to the first scanning line Gaj. The other of the source region and the drain region of the transistor 503 is connected to the second power supply line Vbi. The gate electrode of the transistor 504 is connected to the second scanning line Gbj. The other of the source region and drain region of the transistor 504 is connected to the transistor 505. The source and drain regions of transistor 505 are connected to the gate electrode of transistor 505. One end is connected to the second power supply line Vbi, and the other end is connected to the pixel electrode of the light emitting element 506. are.

[0143] The transistors 502 and 503 have opposite polarities. When one is on, the other is off.

[0144] Next, a top view of the display area shown in the circuit diagram of FIG. 12 is shown as an example in FIG. 13. 13 is a cross-sectional view taken along dashed line A1-A2 in FIG. 14(A), and a cross-sectional view taken along dashed line B1-B2 in FIG. 14(B) is shown, and a cross-sectional view taken along the dashed line C1-C2 is shown in FIG. 14(C). The element 506 is connected to a pixel electrode, a common electrode, and a transistor to which current is supplied by the pixel electrode and the common electrode. However, in Fig. 13 and Fig. 14, various wirings and transistor wirings are not shown. To clarify the layout, only the layout of the pixel electrode 522 of the light emitting element 506 is shown. are.

[0145] In the semiconductor display device of this embodiment shown in FIGS. 13 and 14, a current is supplied to the light emitting element 506. A second power supply line Vbi for supplying power is connected directly to the auxiliary power supply line 508. Although not shown in FIGS. 13 and 14, the auxiliary power supply line 508 is It is connected to a second power supply line Vbi different from the second power supply line Vbi shown in the figure, These two second power supply lines Vbi are electrically connected to each other via an auxiliary power supply line 508. 13 and 14, the second power supply line Vbi and the auxiliary power supply line 508 are directly connected. In this example, the second power supply lines Vbi are electrically connected to each other by connecting the first power supply lines Vbi to each other. One of the second power supply lines Vbi and the auxiliary power supply line 508 are electrically connected via another wiring. It's okay to have it.

[0146] In this embodiment, at least two second power supply lines Vbi are connected to the auxiliary power supply line 508. By electrically connecting the second power supply lines Vbi, the amount of current to be supplied to the pixels is Even if the potential is significantly different, the potential that occurs in the second power supply line Vbi due to the potential drop Therefore, the difference between the second power supply lines Vbi can be prevented from being different from each other. This can prevent uneven brightness in the display area caused by this.

[0147] Furthermore, in the semiconductor display device of this embodiment shown in FIGS. 13 and 14, the auxiliary power supply line 508 and an auxiliary wiring 509 for the scanning line directly connected to the first scanning line Gaj. The wiring 510 and the auxiliary wiring 511 for the scanning line directly connected to the second scanning line Gbj are included. 13 and 14, the auxiliary power supply line 508 is directly connected to the auxiliary wiring 509. However, the auxiliary power supply line 508 is electrically connected to the auxiliary wiring 509 via a different wiring. 13 and 14, the first scanning line Gaj may be directly connected to the auxiliary wiring for the scanning line. 510, but the first scanning line Gaj is connected to the scanning line auxiliary line through a different wiring. The second scanning line 510 may be electrically connected to the auxiliary wiring 510. The line Gbj is directly connected to the auxiliary wiring 511 for the scanning line, but the second scanning line Gbj is connected to another The scanning line auxiliary wiring 511 may be electrically connected to the scanning line auxiliary wiring 511 via a different wiring.

[0148] In the semiconductor display device of this embodiment, the auxiliary power supply line 508 is directly or electrically connected to the By providing the auxiliary wiring 509, the combined resistance of the auxiliary power supply line 508 and the auxiliary wiring 509 is Therefore, the potential drop of the auxiliary power supply line 508 can be prevented, and the second voltage This can prevent a drop in the potential of the power supply line Vbi.

[0149] In the semiconductor display device shown in FIGS. 13 and 14, the auxiliary wiring 510 for the scanning lines and the Although the semiconductor display device of this embodiment has a configuration including auxiliary wiring 511 for the It is sufficient to have at least the auxiliary wiring 509, and it is not necessary to have the auxiliary wiring 510 for the scanning lines and the scanning line However, the auxiliary wiring for scanning lines 510 or the auxiliary wiring for scanning lines 511 may not be provided. By providing the auxiliary wiring 511 for the scanning lines, the first scanning line Gaj and the auxiliary wiring 510 for the scanning lines or the combined resistance of the second scanning line Gbj and the auxiliary wiring 511 for scanning lines is reduced. Therefore, the potential drop of the first scanning line Gaj causes the transistor The switching of the transistor 502 or the switching of the transistor 503 is performed at the correct timing. In addition, the voltage of the second scanning line Gbj can be prevented from being lost. The drop in potential makes it difficult to control the switching of transistor 504 with accurate timing. This can prevent the problem from becoming worse.

[0150] In this embodiment, at least the second power supply line Vbi, the auxiliary wiring 509, the auxiliary wiring for the scanning line, Wiring 510 and auxiliary wiring 511 for scanning lines are formed on an interlayer insulating film 512. In FIG. 14, the second power supply line Vbi, the auxiliary wiring 509, the auxiliary wiring 510 for the scanning lines, In addition to the auxiliary wiring 511, a part 520 of the first power supply line Vai and the signal line Si are also insulated from the interlayer insulating film. In this embodiment, the second power supply line V bi, auxiliary wiring 509, auxiliary wiring for scanning lines 510, auxiliary wiring for scanning lines 511, signal line Si , a part 520 of the first power line Vai is connected to a single conductive film formed on the interlayer insulating film 512. Alternatively, it can be formed by processing (patterning) multiple laminated conductive films into a desired shape. Therefore, the second power supply line Vbi, the auxiliary wiring 509, the auxiliary wiring 510 for the scanning lines, The auxiliary wiring 511, the signal line Si, and a part 520 of the first power supply line Vai are formed using one mask. It can be achieved.

[0151] In this embodiment, the gate electrode 513 of the transistor 501 and the a gate electrode 514 of the transistor 502; a gate electrode 515 of the transistor 503; The two gate electrodes 516 of the transistor 504 and the gate electrode of the transistor 505 517, one electrode 518 of the storage capacitor 507, the auxiliary power supply line 508, the first scanning line G aj, the second scanning line Gbj, and a part 521 of the first power supply line Vai are disposed under the interlayer insulating film 512. Therefore, in this embodiment, the gate electrodes 513 to 517 and the electrode 51 8, auxiliary power line 508, first scanning line Gaj, second scanning line Gbj, first power line Vai Before forming the interlayer insulating film 512, a part 521 of the conductive film or a plurality of laminated conductive films is formed. Therefore, the gate electrode 513 to the gate Electrode 517, electrode 518, auxiliary power line 508, first scanning line Gaj, second scanning line Gbj Therefore, the part 521 of the first power supply line Vai can be formed using one mask. The semiconductor display device of this embodiment can be manufactured without increasing the number of masks compared to the conventional method. can be done.

[0152] A part of the second power supply line Vbi functions as the other electrode of the storage capacitor 507. The area where the power supply line Vbi of the second transistor, the gate insulating film 519, and the electrode 518 overlap is the holding The electrode 518 functions as a capacitor 507. The electrode 518 and the gate electrode 517 of the transistor 505 , which are formed from a continuous conductive film.

[0153] The gate electrodes 513 to 517 are connected to the transistors 501 to 505. It is required to have heat resistance to the extent that it can withstand the heat treatment carried out in the manufacturing process of 05. A single conductive film or a plurality of laminated conductive films is processed (patterned) into a desired shape. As a result, the gate electrodes 513 to 517 as well as the auxiliary power supply line 508 and the first scanning line Ga When forming the second scanning line Gbj, the gate electrodes 513 to 517, the auxiliary electrodes Types of materials that can be used for the source line 508, the first scan line Gaj, and the second scan line Gbj Therefore, there is a limit to the gate electrodes 513 to 517 and the auxiliary power supply line 50. 8. The first scanning line Gaj and the second scanning line Gbj can be formed of a material with a lower resistivity. However, in this embodiment, the transistors 501 to 505 are formed on the On the interlayer insulating film 512, the second power supply line Vbi, the auxiliary wiring 509, the scanning line The auxiliary wiring 510 for the scanning lines and the auxiliary wiring 511 for the scanning lines are formed. The auxiliary wiring 509, the auxiliary wiring for the scanning line 510, and the auxiliary wiring for the scanning line 511 are connected to the transistor 5 Since the gate electrode 513 is formed after the transistor 505 is fabricated, The pole 517, the auxiliary power line 508, the first scanning line Gaj, and the second scanning line Gbj have high heat resistance. Therefore, the second power supply line Vbi, the auxiliary wiring 509, the auxiliary wiring 509 for the scanning line are not required. 10. The material that can be used for the auxiliary wiring 511 for the scanning line has a relatively high degree of freedom, and Electrode 513 to gate electrode 517, auxiliary power supply line 508, first scanning line Gaj, second scanning line It is possible to select a material with a lower resistivity than Gbj. 509, auxiliary wiring for scanning lines 510, and auxiliary wiring for scanning lines 511 are fabricated. The combined resistance of the line 508 and the auxiliary wiring 509, the first scanning line Gaj and the auxiliary wiring 510 for the scanning line The combined resistance of the second scanning line Gbj and the auxiliary wiring 511 for scanning lines is further reduced. Therefore, the potential drop of the second power supply line Vbi and the potential drop of the first scanning line Gaj Therefore, it is possible to prevent a drop in the potential of the second scanning line Gbj.

[0154] 13 and 14, a part of the pixel electrode 522, the second power supply line Vbi, the auxiliary wiring 5 09, auxiliary wiring 510 for scanning lines, auxiliary wiring 511 for scanning lines, part 5 of the first power supply line Vai 20, the signal line Si is covered by a partition wall 523. Then, the pixel electrode 522 is formed. In the region where the pixel electrode 522 is not covered by the partition wall 523, a part of the pixel electrode 522 is exposed. In the region 524, the electroluminescent layer and the common electrode formed after the partition wall 523 are It is directly laminated on the pixel electrode 522. Therefore, the pixel electrode 522, the electroluminescent layer, and the common electrode In the area 524 where the poles directly overlap, the light emitting element 506 is formed.

[0155] As shown in FIGS. 13 and 14, the partition wall 523 is formed on the second insulating film 512. The power supply line Vbi, the auxiliary wiring 509, the auxiliary wiring 510 for the scanning line, the auxiliary wiring 511 for the scanning line, The power supply line Vai is formed to cover a part 520 of the power supply line Vai and the signal line Si. Therefore, in order to reduce the resistance value, the second power supply line Vbi, the auxiliary wiring 509, the auxiliary wiring for the scanning line 510, auxiliary wiring for scanning lines 511, a part of the first power supply line Vai 520, and the film thickness of the signal line Si Even if the thickness is increased to 0.8 μm or more and 1.5 μm or less, the electric field formed later The light-emitting layer is connected to the second power supply line Vbi, the auxiliary wiring 509, the auxiliary wiring 510 for the scanning line, and the auxiliary wiring 510 for the scanning line. The auxiliary wiring 511, a part 520 of the first power supply line Vai, and a portion between the signal line Si and the interlayer insulating film 512 This prevents the film thickness from becoming extremely thin or from being cut off due to the step formed on the surface. can.

[0156] FIG. 13 shows an example in which a plurality of auxiliary power supply lines 508 are arranged side by side. The level of the power supply potential given to the first power supply line Vbi is equal to the level of the power supply potential given to the second power supply line Vbi. When the power supply potential is different from the power supply potential, the second power supply line Vbi and the like to which a common power supply potential is applied are The second power supply line Vbi shown in FIG. The auxiliary power supply lines 508 other than the auxiliary power supply line 508 to which the power supply is connected are supplied with other common power supply potentials. The second power supply lines Vbi can be used to electrically connect the second power supply lines Vbi to each other.

[0157] In Figure 15, the second power supply lines Vbi corresponding to the colors R (red), G (green), and B (blue) are connected to each other. The top view of the display area when electrically connected is shown as an example. In Figure 15, R (red) Corresponding second power supply lines Vb(R), G(green) Corresponding second power supply lines Vb(G), B(blue) ) are applied to the second power supply lines Vb(B) corresponding to the first and second power supply lines Vb(B), respectively. Furthermore, the second power supply line Vb(R) is connected to the adjacent other power supply lines via the auxiliary power supply line 508r. The second power supply Vb(R) is electrically connected to the second power supply Vb(R) corresponding to R(red). The line Vb(G) is connected to a second power supply corresponding to another adjacent G (green) via an auxiliary power supply line 508g. The second power supply line Vb(B) is electrically connected to the auxiliary power supply line Vb(G). 508b, it is electrically connected to the second power supply line Vb(B) corresponding to the other adjacent B (blue) Connected.

[0158] In FIG. 15, the second power supply line Vb(R), the second power supply line Vb(G), the second power supply line Vb (B) and the auxiliary power line 508r, the auxiliary power line 508g, and the auxiliary power line 508b, By directly connecting the adjacent second power supply lines Vb(R) to each other or the adjacent second power supply lines Vb(R) to each other, Electrically connect the first power supply lines Vb(G) together or the second power supply lines Vb(B) together. However, the second power supply line Vb(R) and the second power supply line Vb(G) , the second power supply line Vb(B), the auxiliary power supply line 508r, the auxiliary power supply line 508g, the auxiliary power supply line 5 08b may be electrically connected via separate wirings.

[0159] Furthermore, in FIG. 15, auxiliary power supply lines 508r, 508g, and 508b are 5 shows auxiliary wiring 509r, auxiliary wiring 509g, and auxiliary wiring 509b that are directly connected to each other. In FIG. 15, the auxiliary power supply line 508r, the auxiliary power supply line 508g, and the auxiliary power supply line 508 b is directly connected to the auxiliary wiring 509r, the auxiliary wiring 509g, and the auxiliary wiring 509b, respectively. However, the auxiliary power line 508r, the auxiliary power line 508g, and the auxiliary power line 508b are different wirings. The auxiliary wiring 509r, the auxiliary wiring 509g, and the auxiliary wiring 509b are electrically connected to each other via wires. may be connected to

[0160] In the semiconductor display device of this embodiment, auxiliary power supply lines 508r, 508g, and Auxiliary wiring 509r and auxiliary wiring 509b are directly or electrically connected to the power line 508b. 09g, by providing the auxiliary wiring 509b, the combination of the auxiliary power line 508r and the auxiliary wiring 509r the combined resistance of the auxiliary power line 508g and the auxiliary wiring 509g, the combined resistance of the auxiliary power line 508b and the auxiliary Therefore, the combined resistance of the auxiliary power supply line 508r and the wiring 509b can be reduced. , auxiliary power supply line 508g, auxiliary power supply line 508b, and thus the second power supply line Preventing a drop in the potential of Vb(R), the second power supply line Vb(G), and the second power supply line Vb(B) can be done.

[0161] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0162] (Fourth embodiment) In this embodiment, the thickness of each of the wirings formed on the interlayer insulating film is made to be different in parts. A method for manufacturing a semiconductor display device that can achieve this will be described.

[0163] First, as shown in FIG. 16(A), a transistor 1601 and a film covering the transistor 1601 are An interlayer insulating film 1602 is formed on the insulating film 1602, and a conductive film 1603 is formed on the insulating film 1602. The conductive film 1603 is connected to the interlayer insulating film 1602 through a contact hole formed in the interlayer insulating film 1602. The transistor 1601 is connected to the semiconductor film 1604. 1. The interlayer insulating film 1602 and the conductive film 1603 are formed by the method shown in Embodiment 2, for example. It can be formed using

[0164] Note that FIG. 16 shows an example in which the conductive film 1603 is formed using three stacked conductive films. However, in this embodiment mode, even if the conductive film 1603 is formed of one conductive film, Alternatively, the conductive film may be formed by using two laminated conductive films or four or more laminated conductive films. The electrical conductivity of at least one of the conductive films used in the conductive film 1603 is The gate electrode 1605 of the transistor 1601 is formed below the insulating film 1602. It is desirable that the electrical conductivity is higher than that of at least one of the conductive films used. The thickness of any part of the conductive film 1603 is equal to or less than that of any part of the gate electrode 1605. Specifically, the thickness of any part of the conductive film 1603 is preferably thicker than the thickness of the conductive film 1603. It is desirable that the thickness of the conductive film 1603 is 0.8 μm or more and 1.5 μm or less. By increasing the thickness, the electrical conductivity can be increased.

[0165] In this embodiment, from the side closer to the interlayer insulating film 1602, a titanium film with a thickness of about 100 nm, Aluminum film with a thickness of about 700nm to 1000nm and titanium film with a thickness of about 100nm The stacked film is used as a conductive film 1603 .

[0166] Next, as shown in FIG. 16(A), a resist 1606 is applied onto the conductive film 1603. The resist 1606 can be a positive resist or a negative resist. In this embodiment, a positive resist is used. The substrate 1606 is partially exposed to light.

[0167] A multi-tone mask has three exposure levels: exposed, intermediately exposed, and unexposed. This mask can produce multiple (typically two types) Therefore, it is possible to form a resist mask having a region of thickness of 1000 nm. By using a photomask, it is possible to reduce the number of photomasks.

[0168] Typical examples of multi-tone masks include gray-tone masks and half-tone masks. The tone mask is composed of a light-transmitting substrate and a light-shielding portion and a diffraction grating formed thereon. The light transmittance is 0% in the light-shielding area. On the other hand, the diffraction grating is made up of slits, The spacing between light-transmitting portions such as dots and meshes is set to be equal to or less than the resolution limit of the light used for exposure. By doing so, it is possible to control the light transmittance. , dots, meshes, or non-periodic slits, dots, meshes. The light-transmitting substrate may be a light-transmitting substrate such as quartz. The light-shielding portion and the diffraction grating are formed using a light-shielding material that absorbs light, such as chromium or chromium oxide. When the gray-tone mask is irradiated with exposure light, the light-shielding portion is transparent. The transmittance is 0%, and the light transmittance is 100% in the area where the light-shielding portion and the diffraction grating are not provided. %. In addition, the light transmittance of the diffraction grating can be adjusted in the range of 10 to 70%. The light transmittance of the diffraction grating can be adjusted by adjusting the slits, dots, or This can be achieved by adjusting the mesh spacing and pitch.

[0169] On the other hand, a half-tone mask is a mask that is made up of a substrate having light-transmitting properties and a semi-transmitting portion and a mask formed thereon. The semi-transparent part is made of MoSiN, MoSi, MoSiO, MoSiON , CrSi, etc. The light-shielding part is made of a material that absorbs light, such as chromium or chromium oxide. When the half-tone mask is irradiated with exposure light, In the light-shielding portion, the light transmittance is 0%, and in the area where the light-shielding portion and the semi-transparent portion are not provided, In the semi-transparent area, the light transmittance is 100%. It is possible to adjust the light transmittance. The light transmittance in the semi-transparent portion can be adjusted by This can be adjusted depending on the material of the part.

[0170] After exposure using a multi-tone mask, development is performed to obtain a film thickness of 100 μm as shown in FIG. 16(B). A resist mask 1608 having different regions can be formed. The conductive film 1603 is etched using the mask 1608, thereby forming a thin film as shown in FIG. The conductive film 1609 and the conductive film 1610 are formed as shown in FIG. are connected to the semiconductor film 1604 via contact holes.

[0171] Next, the resist mask 1608 is ashed. As a result, the area of ​​the resist is reduced. The thickness of the resist mask 1608 on the conductive film 1609 is reduced. The resist in the unremoved area is partially removed, and the resist mass is reduced as shown in Figure 16(C). A block 1611 is formed.

[0172] Next, the conductive film 1609 is further etched using the resist mask 1611. As a result, as shown in FIG. 16C, a conductive film 1612 having a partially thin film thickness is formed on the conductive film 1609. If the amount of ashing of the resist mask 1608 is large, The area of ​​the resist mask 1611 on the conductive film 1610 is smaller than the area of ​​the conductive film 1610. Therefore, in the etching using the resist mask 1611, the conductive film 1610 The edges may also be etched.

[0173] In FIG. 16C, when the conductive film 1609 is etched, the interlayer insulating film 1602 Although the example shows only a portion of the conductive film remaining, the present invention is not limited to this configuration. The two upper conductive films may also be partially left.

[0174] Then, as shown in FIG. 16(D), after removing the resist mask 1611, the conductive film 161 An insulating film 1613 is formed on the interlayer insulating film 1602 so as to cover the insulating film 1602 and the conductive film 1610. Then, a contact hole is formed in the insulating film 1613, and a conductive layer is formed in the contact hole. A pixel electrode 1614 connected to the thin part of the film 1612 is formed on the insulating film 1613. do.

[0175] Then, a partition wall 1615 is formed on the insulating film 1613 so as to cover a part of the pixel electrode 1614. The partition wall 1615 has an opening, and the pixel electrode 1614 is partially exposed through the opening. The partition wall 1615 is formed between at least a thick portion of the conductive film 1612 and a thin portion of the conductive film 1612. The conductive film 1610 is formed so as to overlap with the conductive film 1610. The thickness of the thick part of the film 1612 and the thickness of the conductive film 1610 are set to 0.8 μm or more and 1.5 μm or less. Even if the thickness is increased to the lower limit, the electroluminescent layer 1616 formed later will not overlap the conductive film 16 12 and a step formed between the conductive film 1610 and the interlayer insulating film 1602. This can prevent the film thickness from becoming extremely thin or the film from being cut off.

[0176] Furthermore, since the pixel electrode 1614 is connected to the thin part of the conductive film 1612, A pixel electrode 1614 is formed between the thin part of the conductive film 1612 and the interlayer insulating film 1602. The resulting step prevents the film thickness from becoming extremely thin or from being cut off. do.

[0177] Next, an electroluminescent layer 1616 and a common electrode 1617 are formed on the pixel electrode 1614 and the partition wall 1615. 7 are formed in order to be laminated. The pixel electrode 1614 and the electroluminescent layer 1616 are The portion directly overlapping the conductive electrode 1617 functions as a light emitting element 1618 .

[0178] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0179] (Embodiment 5) In this embodiment, various wirings formed on an interlayer insulating film are used to convert light emitted from a light emitting element. A configuration that can efficiently extract light from a semiconductor display device will be described below.

[0180] FIG. 17 shows a light emitting element included in the semiconductor display device of this embodiment and a light emitting element provided in the vicinity of the light emitting element. The light-emitting element 1700 includes a pixel electrode 1701 and a wiring. The pixel has an electroluminescent layer 1702 and a common electrode 1703. The wiring 1704 is It is made up of multiple regions with different film thicknesses. Specifically, in FIG. 17, the wiring 1704 is made up of multiple regions with different film thicknesses. It has a thick region 1704a and a thin region 1704b.

[0181] The wiring 1704 is covered with an insulating film 1705, and a contact formed in the insulating film 1705 The wiring 1704 and the pixel electrode 1701 formed on the insulating film 1705 are connected through the hole. In FIG. 17, the wiring 1704 has a thicker region 1704a and a Although the example shows a case where the contact hole overlaps the insulating film, the present invention is not limited to this configuration. The thin film region 1704b of the wiring 1704 does not overlap with the contact hole. It's okay to have it.

[0182] In addition, a part of the pixel electrode 1701 and a region 1704a of the wiring 1704 with a large film thickness are , and is covered by the partition wall 1706. Therefore, the exposed portion is overlapped with the electroluminescent layer 1702 and the common electrode 1703. The overlapping portions function as a light emitting element 1700. The portion functioning as 00 overlaps with the thin film region 1704b of the wiring 1704. It has become.

[0183] A region 1704a of the wiring 1704 with a large thickness is covered with a partition wall 1706. In order to reduce the resistance, the film thickness of the wiring 1704 in the region 1704a is set to 0.8 Even when the thickness is increased to about 1.5 μm or more, the electroluminescent layer 1 702, the film thickness is extremely large due to the step formed between the region 1704a and the region 1704b. This can prevent the film from becoming thin or breaking apart.

[0184] The wiring 170 has a thick region 1704a and a thin region 1704b. 4. By using multi-tone masks such as gray-tone masks and half-tone masks, It can be formed without increasing the number of blocks.

[0185] In addition, a semiconductor film 1709 is formed on the substrate 1707. The wiring 1704 is covered with an insulating film 1710 and an interlayer insulating film 1711. 711, and formed on the gate insulating film 1710 and the interlayer insulating film 1711. The wiring 1704 and the semiconductor film 1709 are connected through a contact hole. Depending on the type of the line 1704, the line formed on the gate insulating film 1710 together with the gate electrode may The wiring 1704 is connected to the wiring via a contact hole formed in the interlayer insulating film 1711. It may be continued.

[0186] In addition, in FIG. 17, the pixel electrode 1701 and the common electrode 1703 are transparent, and the wiring The wiring 1704 is formed using a material that reflects light. The thin region 1704b and the thick region 1704a are adjacent to each other. At the end 1708 where the substrate 1707 is located, light emitted from the electroluminescent layer 1702 is Therefore, the semiconductor display device shown in this embodiment mode can be used to reflect light in the opposite direction. In this device, light extracted from the semiconductor display device is emitted directly from the electroluminescent layer 1702 to the substrate 170. 7 and the light emitted from the electroluminescent layer 1702 and then passing through the wiring 170 4 and emitted in the direction opposite to the substrate 1707.

[0187] Furthermore, in this embodiment, the end 17 of the thick region 1704a of the wiring 1704 is 1708, i.e., the slope angle between the surface formed by the edge 1708 and the substrate 1707. The angle θt is set to 0°<θt<90°, and more preferably 50°<θt<60°. By this structure, the light emitted from the electroluminescent layer 1702 is focused in the lateral direction (the maximum surface area of ​​the substrate 1707). The light traveling in the direction parallel to the plane of intersection is reflected at the end 1708 of the wiring 1704. and emitted in a direction away from the substrate 1707.

[0188] In addition, in the end portion 1708 of the region 1704a and the region 1704b, the electroluminescent layer 1702 The material used for the wiring 1704 is appropriately selected so that the light emitted from the wiring 1704 is reflected. The wiring 1704 may be made of aluminum (Al), tungsten (W), titanium (Ti), or titanium. Ta (Ta), Molybdenum (Mo), Nickel (Ni), Platinum (Pt), Copper (Cu), Gold (Au), silver (Ag), manganese (Mn), neodymium (Nd), carbon (C), silicon (S i) and the like can be used. In addition, alloys containing the above elements as main components can also be used. The wiring 1704 may be a single film containing the above element, or a compound containing the above element. Alternatively, a plurality of films containing the above elements may be stacked.

[0189] When silicon oxide is used for the insulating film 1705, depending on the material used for the wiring 1704, The surface of the wiring 1704 is oxidized, and light is less likely to be reflected on the surface of the wiring 1704. By using silicon nitride as the insulating film 1705, the wiring 1704 This prevents oxidation on the surface of the wiring 1704 and makes it easier for light to be reflected on the surface of the wiring 1704. Alternatively, the wiring 1704 may be made of platinum (Pt), gold (Au), silver (Ag), or the like, which is resistant to oxidation. By using a thick material, oxidation on the surface of the wiring 1704 can be prevented. When a material that is difficult to be broken is used for the wiring 1704, silicon oxide, which has higher light transmittance than silicon nitride, is used as an insulator. It can be used for the membrane 1705.

[0190] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes. [Example]

[0191] In this embodiment, a semiconductor substrate (bond substrate) is transferred to a support substrate (base substrate). A method for manufacturing a semiconductor display device in which a semiconductor element is formed using a film will be described.

[0192] 18A, an insulating film 901 is formed on a bond substrate 900. 901 is made of insulating materials such as silicon oxide, silicon oxynitride, silicon nitride oxide, and silicon nitride. The insulating film 901 may be formed using a single insulating film or a plurality of insulating films. For example, in this embodiment, the side closer to the bond substrate 900 is Therefore, silicon oxynitride, which has a higher oxygen content than nitrogen, and silicon nitride, which has a higher nitrogen content than oxygen An insulating film 901 is used in which silicon oxide is laminated in this order.

[0193] For example, when silicon oxide is used as the insulating film 901, the insulating film 901 is formed by a mixture of silane and oxygen, TEO Using a mixed gas of S (tetraethoxysilane) and oxygen, etc., thermal CVD, plasma CVD, and normal The film can be formed by a vapor deposition method such as pressure CVD or bias ECRCVD. In this case, the surface of the insulating film 901 may be densified by oxygen plasma treatment. When used as the film 901, a mixed gas of silane and ammonia is used, and the film is formed by plasma CVD or the like. The insulating film 901 can be formed by vapor deposition. If the gas mixture is silane and ammonia, or silane and nitrogen oxide, It can be formed by a vapor phase growth method such as plasma CVD.

[0194] The insulating film 901 is an oxide film formed by chemical vapor deposition using organic silane gas. Silicon may also be used. The organic silane gas is tetraethoxysilane (TEOS: Chemical formula: Si(OC2H5)4), tetramethylsilane (TMS: Chemical formula: Si(CH3)4 ), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane OMCTS, hexamethyldisilazane (HMDS), triethoxysilane ( SiH(OC2H5)3), trisdimethylaminosilane (SiH(N(CH3)2)3 Silicon-containing compounds such as

[0195] Next, as shown in FIG. 18A, hydrogen or a rare gas is applied to the bond substrate 900 as shown by the arrows. Alternatively, hydrogen ions or rare gas ions are irradiated to a certain depth from the surface of the bond substrate 900. The embrittlement layer 902 having microvoids is formed in the region. is determined by the acceleration voltage of the irradiation. The thickness of the semiconductor film 908 transferred from the semiconductor substrate 900 to the base substrate 904 is determined. The voltage is set in consideration of the thickness of the semiconductor film 908. The thickness of the semiconductor film 908 is 10 nm. The thickness is set to 200 nm, preferably 10 nm to 50 nm. When irradiating the plate 900, the dose is 3×10 16 〜1×10 17 / cm 2 The idea is desirable.

[0196] In the above step of forming the embrittlement layer 902, the bond substrate 900 is provided with high concentration hydrogen or Since the surface of the bond substrate 900 is irradiated with a rare gas, hydrogen ions, or rare gas ions, If the surface roughness becomes too large, sufficient strength may not be obtained in the bond between the substrate and the base substrate 904. By providing the insulating film 901, ions of hydrogen or a rare gas, or ions of hydrogen and a rare gas can be easily ionized. The surface of the bond substrate 900 is protected when the base substrate 904 is irradiated with the light. 0 can be satisfactorily joined.

[0197] Next, as shown in FIG. 18(B), an insulating film 903 is formed on the insulating film 901. The insulating film 3 is made of an insulating material such as silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride, similar to the insulating film 901. The insulating film 903 is formed using a single insulating film. Alternatively, a plurality of insulating films may be stacked. Silicon oxide produced by chemical vapor deposition using organic silane gas may also be used. In this embodiment, the insulating film 903 is formed by chemical vapor deposition using organic silane gas. Silicon oxide is used.

[0198] The insulating film 901 or the insulating film 903 is made of an insulating material with high barrier properties such as silicon nitride or silicon nitride oxide. By using the insulating film, it is possible to form a semiconductor film 909 later without adding alkali metals or alkaline earth metals. Impurities such as these can be prevented from entering from the base substrate 904.

[0199] In this embodiment, the insulating film 903 is formed after the embrittlement layer 902 is formed. The insulating film 903 is not necessarily provided. However, the insulating film 903 is formed after the embrittlement layer 902 is formed. Therefore, the surface of the insulating film 901 is thicker than the insulating film 901 formed before the formation of the embrittlement layer 902. Therefore, by forming the insulating film 903, the strength of the bonding to be performed later can be improved. It can be improved.

[0200] Next, before bonding the bond substrate 900 and the base substrate 904 together, The plate 900 may be subjected to a hydrogen treatment. The hydrogen treatment may be performed by, for example, subjecting the plate 900 to a hydrogen atmosphere. Place at 350°C for about 2 hours.

[0201] Then, as shown in FIG. 18C, the bond substrate 900 and the base substrate 904 are bonded to each other by an insulating film. The insulating film 903 is sandwiched between the two layers and bonded together as shown in FIG. The bond substrate 900 and the base substrate 904 are bonded to each other. It can be adjusted.

[0202] The bond is formed using van der Waals forces, so it is a strong bond even at room temperature. Since the above bonding can be performed at a low temperature, the base substrate 904 Various materials can be used. For example, the base substrate 904 is an aluminosilicate. Glass substrates such as phosphate glass, barium borosilicate glass, and aluminoborosilicate glass In addition, a substrate such as a quartz substrate or a sapphire substrate can be used. 04 can be made of a semiconductor substrate such as silicon, gallium arsenide, or indium phosphide. This can be done.

[0203] An insulating film is also formed on the surface of the base substrate 904, and the insulating film and the insulating film 903 are In this case, the base substrate 904 may be made of any material other than the above-mentioned material. Alternatively, a metal substrate including a stainless steel substrate may be used. Also, flexible substrates such as plastic may be used. The substrate made of synthetic resin generally tends to have a lower heat resistance temperature compared to the above substrates. If the substrate can withstand the processing temperature in the manufacturing process, it can be used as the base substrate 904. As a plastic substrate, polyethylene terephthalate (PET) is a typical example. Polyester, polyethersulfone (PES), polyethylene naphthalate (PE N), polycarbonate (PC), polyether ether ketone (PEEK), polysul Polypropylene (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene Polyethylene terephthalate (PBT), polyimide, acrylonitrile butadiene styrene resin , polyvinyl chloride, polypropylene, polyvinyl acetate, acrylic resin, etc.

[0204] The bond substrate 900 may be a single crystal semiconductor substrate such as silicon or germanium, or a polycrystalline A semiconductor substrate can be used. In addition, compounds such as gallium arsenide and indium phosphide can be used. A single crystal semiconductor substrate or a polycrystalline semiconductor substrate formed of a compound semiconductor is used as a bond substrate 900. The bond substrate 900 can be made of silicon having a distortion in the crystal lattice. Semiconductor substrates such as silicon germanium, which is silicon doped with germanium, are used. Strained silicon has a larger lattice constant than silicon. It can be formed by deposition on a germanium or silicon nitride film.

[0205] After the base substrate 904 and the bond substrate 900 are bonded to each other, heat treatment or pressure treatment is performed. The strength of the bond can be improved by performing a heat treatment or a pressure treatment. do.

[0206] After the above-mentioned bonding, a heat treatment is performed to form adjacent microvoids in the embrittlement layer 902. As a result, the volume of the microvoids increases, as shown in Figure 19(A). The bond substrate 900 is cleaved at the embrittlement layer 902, and the bond substrate 900 is broken into two pieces. The semiconductor film 908 is separated. The heat treatment temperature is set to the heat-resistant temperature of the base substrate 904 or lower. For example, the heat treatment may be carried out in the range of 400°C to 600°C. The semiconductor film 908 is transferred to the base substrate 904 together with the insulating film 901 and the insulating film 903. Thereafter, in order to further strengthen the bond between the insulating film 903 and the base substrate 904, It is preferable to perform the heat treatment at a temperature of 0.5 to 600.degree.

[0207] The crystal orientation of the semiconductor film 908 can be controlled by the crystal orientation of the bond substrate 900. A bond substrate 900 having a crystal plane orientation suitable for the semiconductor element to be formed is appropriately selected and used. The mobility of the transistor varies depending on the crystal plane orientation of the semiconductor film 908. To obtain a transistor with higher mobility, the channel direction and crystal plane orientation must be taken into consideration. The bonding direction of the bond substrate 900 is determined.

[0208] Next, the surface of the transferred semiconductor film 908 is planarized. Planarization is not necessarily required. By performing the planarization, the semiconductor film 908 and the gate insulating film 909 are formed in a transistor to be formed later. The interface characteristics of the insulating film can be improved. Specifically, planarization is achieved by chemical mechanical polishing (C This can be done by MP (Chemical Mechanical Polishing). The thickness of the semiconductor film 908 is reduced by the above-described planarization.

[0209] In this embodiment, the semiconductor film 908 is peeled off from the bond substrate 900 by forming the embrittlement layer 902. This section describes the case where the Smart Cut method is used to separate the Layer Transfer), Dielectric Isolation Method, PACE (Plasma Assay Using other bonding methods such as the Directed Chemical Etching method The semiconductor film 908 may be attached to the base substrate 904 .

[0210] Next, as shown in FIG. 19(B), the semiconductor film 908 is processed (patterned) into a desired shape. By this, an island-shaped semiconductor film 909 is formed.

[0211] The semiconductor film 909 formed through the above process is used to form various semiconductor elements such as transistors. FIG. 19C shows a transistor formed using a semiconductor film 909. 9 shows an example of the data 910.

[0212] By using the above-described manufacturing method, the semiconductor element included in the semiconductor display device of the above embodiment can be can be produced.

[0213] This embodiment can be implemented in appropriate combination with any of the above embodiment modes. [Example]

[0214] In this embodiment, the overall configuration of a semiconductor display device will be described. A block diagram of an example semiconductor display device is shown as an example.

[0215] The semiconductor display device shown in FIG. 20A has a pixel portion (display) having a plurality of pixels each having a light-emitting element. A scanning line driver circuit 710 selects each pixel line by line, and a scanning line driver circuit 720 selects each pixel line by line. The signal line driver circuit 720 controls the input of video signals to the pixels.

[0216] In FIG. 20A, a signal line driver circuit 720 includes a shift register 721, a first memory circuit 722, a second memory circuit 723, a D / A (Digital to Analog) conversion circuit The shift register 721 receives a clock signal S-CLK, a start signal S-CLK, and a The shift register 721 receives the pulse signals S-SP. A timing signal in which pulses are shifted sequentially according to LK and start pulse signal S-SP. and outputs it to the first memory circuit 722. The order in which the pulses of the timing signal appear is The direction may be switched in accordance with a scanning direction switching signal.

[0217] When a timing signal is input to the first memory circuit 722, the first memory circuit 722 stores the pulses of the timing signal. Thus, the video signals are sequentially written into the first memory circuit 722 and stored therein. Although the video signal may be written in order to the plurality of memory elements included in the memory circuit 722, The memory elements included in the memory circuit 722 are divided into several groups. It is also possible to input video signals in parallel, so-called divisional driving. For example, if memory elements are divided into groups of four, the number of divisions is four. It will be driven.

[0218] The video signal is not written to all the memory elements of the first memory circuit 722 until the writing is completed. The time at this point is called the line period. In reality, a horizontal blanking period is added to the line period. The period may be included in the line period.

[0219] When one line period ends, the pulse of the signal S-LS input to the second memory circuit 723 Therefore, the video signal stored in the first memory circuit 722 is stored in the second memory circuit 723. The first video signal is written and stored at the same time. The memory circuit 722 stores the next data in accordance with the timing signal from the shift register 721. During this second line period, the second memory circuit The video signal written and held in the circuit 723 is input to the D / A conversion circuit 724. do.

[0220] The D / A conversion circuit 724 converts the input digital video signal into an analog video signal. The signal is converted into a signal and input to each pixel in the pixel section 700 via a signal line.

[0221] It should be noted that the D / A conversion circuit 724 is not provided, and the video signal is input to the pixel section 700 as a digital signal. You can use force.

[0222] In addition, the signal line driver circuit 720 uses a shift register 721 to shift pulses sequentially. Alternatively, another circuit capable of outputting a signal corresponding to the above may be used.

[0223] In addition, in FIG. 20A, the pixel unit 700 is directly connected to the rear stage of the D / A conversion circuit 724. However, the present invention is not limited to this configuration. A circuit for performing signal processing on the video signal output from the An example of a circuit is a buffer that can shape a waveform.

[0224] Next, the operation of the scanning line driving circuit 710 will be described. and inputting the selection signal to each of the plurality of scanning lines to select pixels for each line. When a pixel is selected by a selection signal, a transistor whose gate is connected to one of the scanning lines is turned on, and a video signal is input to the pixel.

[0225] In this embodiment, all the selection signals input to the plurality of scanning lines are sent to one scanning line driving circuit 71. 0 has been described, the present invention is not limited to this configuration. The driver circuit 710 may generate selection signals to be input to a plurality of scanning lines.

[0226] In addition, when a plurality of scanning lines are provided for each pixel, a scanning line driving circuit corresponding to each scanning line is provided. A plurality of such circuits may be provided.

[0227] The pixel section 700, the scanning line driver circuit 710, and the signal line driver circuit 720 are formed on the same substrate. Alternatively, either may be formed on a different substrate.

[0228] Next, a block diagram of a semiconductor display device different from that shown in FIG. 20(A) is shown in FIG. 20(B) as an example. The semiconductor display device shown in FIG. 20B has a pixel portion (display region) having a plurality of pixels. 600, a scanning line driving circuit 610 capable of selecting a plurality of pixels for each line, and a selection and a signal line driver circuit 620 that controls the input of video signals to the pixels in the selected line. do.

[0229] The signal line driver circuit 620 includes a shift register 621, a sampling circuit 622, and an analog The shift register 6 includes at least a memory circuit 623 that can store a shift signal. A clock signal S-CLK and a start pulse signal S-SP are input to the shift register 21. The register 621 operates in accordance with the clock signal S-CLK and the start pulse signal S-SP. , a timing signal in which the pulses are shifted sequentially is generated and input to the sampling circuit 622. The sampling circuit 622 outputs the signal line driving circuit 6 The analog video signal input to 20 is sampled for one line period. When the video signal for a line period is completely sampled, the sampled video signal are simultaneously output to the memory circuit 623 in accordance with the signal S-LS and are stored therein. The video signal held in the pixel portion 600 is input to the pixel portion 600 via a signal line.

[0230] In this embodiment, the sampling circuit 622 detects all of the video signals for one line period. After sampling, the sampled video signals are simultaneously stored in the lower storage circuit 623. Although the description will be given taking the case of inputting as an example, the present invention is not limited to this configuration. After sampling the video signal corresponding to each pixel in the circuit 622, one line period is Even if the sampled video signal is input to the memory circuit 623 at the lower stage each time without waiting, good.

[0231] The video signal may be sampled for each corresponding pixel in turn, or may be sampled for each pixel in one line. The pixels may be divided into several groups, and the process may be performed in parallel for each pixel corresponding to each group. .

[0232] In FIG. 20B, the pixel portion 600 is directly connected to the rear stage of the memory circuit 623. The present invention is not limited to this configuration. A circuit for performing signal processing on the analog video signal can be provided. An example of such a buffer is a buffer that can shape a waveform.

[0233] Then, in parallel with the input of a video signal from the memory circuit 623 to the pixel portion 600, The sampling circuit 622 resamples the video signal corresponding to the next line period. can be done.

[0234] Next, the operation of the scanning line driving circuit 610 will be described. and inputting the selection signal to each of the plurality of scanning lines to select pixels for each line. When a pixel is selected by a selection signal, a transistor whose gate is connected to one of the scanning lines is turned on, and a video signal is input to the pixel.

[0235] In this embodiment, all the selection signals input to the plurality of scanning lines are transmitted to one scanning line driving circuit 61. 0 has been described, the present invention is not limited to this configuration. The driver circuit 610 may generate selection signals to be input to a plurality of scanning lines.

[0236] In addition, when a plurality of scanning lines are provided for each pixel, a scanning line driving circuit corresponding to each scanning line is provided. A plurality of such circuits may be provided.

[0237] The pixel section 600, the scanning line driving circuit 610, and the signal line driving circuit 620 are formed on the same substrate. Alternatively, either may be formed on a different substrate.

[0238] This embodiment can be implemented in appropriate combination with the above embodiment modes or embodiments. . [Example]

[0239] In this embodiment, the appearance of a semiconductor display device will be described with reference to FIG. The transistor and the light emitting element formed on the first substrate are connected to the second substrate. 21(B) is a top view of a panel sealed with a sealant between the panels. This corresponds to the cross-sectional view at A2.

[0240] A pixel portion (display area) 4002 and a signal line driver circuit 4003 are provided on a first substrate 4001. A sealant 4020 is provided to surround the gate electrode 4003 and the scanning line driver circuit 4004 . In addition, a second wiring is provided on the pixel portion 4002, the signal line driver circuit 4003, and the scanning line driver circuit 4004. Therefore, the pixel portion 4002, the signal line driver circuit 4003, the driving circuit 4004, the driving circuit 4006, the driving circuit 4008, the driving circuit 4009, the driving circuit 4010, the driving circuit 4011, the driving circuit 4012, the driving circuit 4013, the driving circuit 4014, the driving circuit 4015, the driving circuit 4016, the driving circuit 4017, the driving circuit 4018, the driving circuit 4019, the driving circuit 4020, the driving circuit 4021, the driving circuit 4022, the driving circuit 4023, the driving circuit 4024, the driving circuit 4025, the driving circuit 4026, the driving circuit 4027, the driving circuit 4028, the driving circuit 4029, the driving circuit 4030, the driving circuit 4031 The scan line driving circuit 4004 is disposed between the first substrate 4001 and the second substrate 4006. The sealing material 4020 seals the filling material 4007 together.

[0241] A pixel portion 4002, a signal line driver circuit 4003, a scanning Each of the line driver circuits 4004 has a plurality of transistors. A transistor 4008 included in the signal line driver circuit 4003 and a transistor 4009 included in the pixel portion 4002 A transistor 4009 and a transistor 4010 are shown as examples.

[0242] The light emitting element 4011 is connected to the source region or a pixel electrode 4030 electrically connected to the drain region, an electroluminescent layer 4013, The light emitting element 4011 has a common electrode 4012. The light emitting element 4011 has the same structure as that shown in this embodiment. The direction of light extracted from the light emitting element 4011 and the structure of the transistor 4009 are not limited to the above. The configuration of the light emitting element 4011 can be changed appropriately in accordance with the polarity and the like.

[0243] The signal line driver circuit 4003, the scanning line driver circuit 4004 or the pixel portion 4002 are also supplied with Although not shown in the cross-sectional view of FIG. 21(B), various signals and voltages are drawn out and distributed. It is supplied from a connection terminal 4016 via lines 4014 and 4015 .

[0244] In this embodiment, the connection terminal 4016 is the same as the common electrode 4012 of the light emitting element 4011. The lead wiring 4014 is formed from the same conductive film as the wiring 4017. The lead wiring 4015 is made of the transistor 4009. The gate electrodes of the transistors 4010 and 4008 are formed from the same conductive film. It has been done.

[0245] The connection terminal 4016 is electrically connected to a terminal of the FPC 4018 via an anisotropic conductive film 4019. are electrically connected.

[0246] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). However, the light emitting element 4011 can be made of stainless steel, ceramics, or plastic. The second substrate 4006 located in the direction of light extraction from the substrate must be transparent. Therefore, the second substrate 4006 is made of a glass plate, a plastic plate, a polyester film, or the like. It is desirable to use a light-transmitting material such as rubber or acrylic film.

[0247] In addition to inert gases such as nitrogen and argon, filler 4007 can also be used, such as ultraviolet curing resin. In this embodiment, nitrogen is used as the filler 4007. This shows an example of

[0248] This embodiment can be implemented in appropriate combination with the above embodiment modes or embodiments. . [Example]

[0249] By using the semiconductor display device described in the above embodiment modes and examples, a large display area can be obtained. Therefore, a display device with high image quality can be provided. The semiconductor display device is a display device, a notebook personal computer, a device equipped with a recording medium, Image playback devices (typically DVD: Digital Versatile Disc, etc.) It is preferable to use the recording medium in a device having a display capable of reproducing the image from the recording medium. In addition, the semiconductor display device shown in the above embodiment modes and examples can be used. Electronic devices that can be used include mobile phones, portable game consoles, e-books, video cameras, digital cameras, etc. Cameras such as still cameras, goggle-type displays (head-mounted displays) , navigation systems, sound reproduction devices (car audio, audio components, etc.), etc. Specific examples of these electronic devices are shown in Figure 22.

[0250] FIG. 22A shows a display device, which includes a housing 5001, a display unit 5002, and a speaker unit 5003. The semiconductor display device shown in the above embodiment modes and examples is used in the display portion 5002. Display devices include those for personal computers, those for receiving TV broadcasts, and those for broadcasting. This includes all display devices for displaying information, such as advertisements.

[0251] FIG. 22(B) shows a notebook personal computer, which includes a main body 5201, a housing 5202, The display unit 5203, the keyboard 5204, the mouse 5205, etc. The semiconductor display device shown in the embodiment can be used for the display portion 5203 .

[0252] FIG. 22(C) shows a portable image playback device (specifically, a DVD playback device) equipped with a recording medium. There is a main body 5401, a housing 5402, a display unit 5403, and a recording medium (DVD, etc.) reading unit. 5404, operation keys 5405, speaker unit 5406, etc. The reproduction device also includes a home game machine. The display device can be used for the display portion 5403 .

[0253] As described above, the scope of application of the present invention is extremely wide, and it can be used in electronic devices in all fields. It is Noh.

[0254] This embodiment can be implemented in appropriate combination with the above embodiment modes or embodiments. . [Explanation of symbols]

[0255] 100 pixels 101 Signal line 102 Power line 103 scan lines 104 Auxiliary power line 105 Light-emitting element 106 Switching transistor 107 Drive transistor 108 gate electrode 109 Auxiliary wiring 110 Auxiliary wiring for scanning line 111 Interlayer insulating film 200 pixels 201 Switching transistor 202 Drive transistor 203 Light-emitting element 204 Holding capacity 205 Auxiliary power line 300 pixels 301 Signal Line 302a power line 302b power line 302c power wire 303 scan lines 304 Auxiliary power line 304a Auxiliary power line 304b Auxiliary power line 304c auxiliary power line 308 Gate electrode 309a Auxiliary wiring 309b Auxiliary wiring 309c Auxiliary wiring 310 Auxiliary wiring for scanning lines

Claims

1. a first transistor, a second transistor, a light-emitting element, a power supply line, a first conductive film, and a second conductive film; one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor; one of a source electrode and a drain electrode of the second transistor is electrically connected to the power supply line; the other of the source electrode and the drain electrode of the second transistor is electrically connected to the light-emitting element; the first transistor is a top-gate type and has a first gate electrode and a second gate electrode; the first conductive film is electrically connected to the first gate electrode and the second gate electrode; the second conductive film is electrically connected to the power supply line, a third conductive film having functions as the first gate electrode and the second gate electrode has a region in contact with the first conductive film on an upper surface of the third conductive film; the first conductive film has a region overlapping with a region between a first region of the third conductive film having a function as the first gate electrode and a second region of the third conductive film having a function as the second gate electrode, in a plan view; the fourth conductive film having a function as a power supply line intersects with the fifth conductive film having a function as a power supply line; the fourth conductive film has a region in contact with the second conductive film on an upper surface of the fourth conductive film, each of the first conductive film and the second conductive film has a region in contact with an upper surface of a first insulating film; Light-emitting device.

2. a first transistor, a second transistor, a light-emitting element, a power supply line, a first conductive film, and a second conductive film; one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor; one of a source electrode and a drain electrode of the second transistor is electrically connected to the power supply line; the other of the source electrode and the drain electrode of the second transistor is electrically connected to the light-emitting element; the first transistor is a top-gate type and has a first gate electrode and a second gate electrode; the first conductive film is electrically connected to the first gate electrode and the second gate electrode; the second conductive film is electrically connected to the power supply line, a third conductive film having functions as the first gate electrode and the second gate electrode has a region in contact with the first conductive film on an upper surface of the third conductive film; the first conductive film has a region overlapping with a region between a first region of the third conductive film having a function as the first gate electrode and a second region of the third conductive film having a function as the second gate electrode, in a plan view; the fourth conductive film having a function as a power supply line intersects with the fifth conductive film having a function as a power supply line; the fourth conductive film has a region in contact with the second conductive film on an upper surface of the fourth conductive film, the fourth conductive film extends across a plurality of pixels, each of the first conductive film and the second conductive film has a region in contact with an upper surface of a first insulating film; Light-emitting device.

3. a first transistor, a second transistor, a light-emitting element, a power supply line, a first conductive film, and a second conductive film; one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor; one of a source electrode and a drain electrode of the second transistor is electrically connected to the power supply line; the other of the source electrode and the drain electrode of the second transistor is electrically connected to the light-emitting element; the first transistor is a top-gate type and has a first gate electrode and a second gate electrode; the first conductive film is electrically connected to the first gate electrode and the second gate electrode; the second conductive film is electrically connected to the power supply line, a third conductive film having functions as the first gate electrode and the second gate electrode has a region in contact with the first conductive film on an upper surface of the third conductive film; the first conductive film has a region overlapping with a region between a first region of the third conductive film having a function as the first gate electrode and a second region of the third conductive film having a function as the second gate electrode, in a plan view; the first region and the second region are connected via a third region included in the third conductive film, the fourth conductive film having a function as a power supply line intersects with the fifth conductive film having a function as a power supply line; the fourth conductive film has a region in contact with the second conductive film on an upper surface of the fourth conductive film, each of the first conductive film and the second conductive film has a region in contact with an upper surface of a first insulating film; Light-emitting device.

4. a first transistor, a second transistor, a light-emitting element, a power supply line, a first conductive film, and a second conductive film; one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor; one of a source electrode and a drain electrode of the second transistor is electrically connected to the power supply line; the other of the source electrode and the drain electrode of the second transistor is electrically connected to the light-emitting element; the first transistor is a top-gate type and has a first gate electrode and a second gate electrode; the first conductive film is electrically connected to the first gate electrode and the second gate electrode; the second conductive film is electrically connected to the power supply line, a third conductive film having functions as the first gate electrode and the second gate electrode has a region in contact with the first conductive film on an upper surface of the third conductive film; the first conductive film has a region overlapping with a region between a first region of the third conductive film having a function as the first gate electrode and a second region of the third conductive film having a function as the second gate electrode, in a plan view; the first region and the second region are connected via a third region included in the third conductive film, the fourth conductive film having a function as a power supply line intersects with the fifth conductive film having a function as a power supply line; the fourth conductive film has a region in contact with the second conductive film on an upper surface of the fourth conductive film, the fourth conductive film extends across a plurality of pixels, each of the first conductive film and the second conductive film has a region in contact with an upper surface of a first insulating film; Light-emitting device.

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