Integrated circuit and power source circuit

Abstract

To provide an integrated circuit in which coil sounding is suppressed.SOLUTION: A switching control circuit 29a for switching a transistor of a power source circuit that generates an output voltage at a target level from AC voltage, includes a drive circuit 106 that turns on the transistor when an inductor current becomes below a prescribed value and turns off the transistor after the elapse of a period corresponding to the output voltage, a first detection circuit 103 that detects whether or not the on period of the transistor is shorter than a first period, and a first clocking circuit 104 that counts a second period when it is detected that the on period is shorter than the first period. When it is detected that the on period is shorter than the first period, the drive circuit 106 turns on the transistor on the basis of the fact that the second period has been counted, irrespective of the inductor current. The second period is shorter than a period corresponding to the highest frequency of an audible frequency band.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to an integrated circuit and a power supply circuit. [Background technology]

[0002] A power supply circuit that generates an output voltage of a target level from an AC voltage generally includes a transistor that is switched depending on the output voltage, and a coil (see, for example, Patent Documents 1 to 3). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-262548 [Patent Document 2] Japanese Patent Application Laid-Open No. 2013-188082 [Patent Document 3] Japanese Patent Application Laid-Open No. 2012-105424 Summary of the Invention [Problem to be solved by the invention]

[0004] When the load connected to the power supply circuit becomes light, the transistor switching may be stopped to prevent the output voltage from exceeding the target level. When the transistor switching is stopped and the output voltage drops, the transistor switching is restarted. In such a case, if the frequency corresponding to the transistor switching cycle falls within the audible frequency range, the coil will generate audible noise.

[0005] The present invention has been made in view of the above-mentioned problems in the prior art, and an object of the present invention is to provide an integrated circuit that suppresses coil noise. [Means for solving the problem]

[0006] In order to solve the above-mentioned problems, one aspect of the switching control circuit of the present invention is a switching control circuit that switches on the transistor of a power supply circuit that generates an output voltage of a target level from the AC voltage, the switching control circuit comprising: an inductor to which a rectified voltage from a full-wave rectifier circuit that rectifies AC voltage is applied; and a transistor that controls the inductor current flowing through the inductor, the switching control circuit comprising: a drive circuit that turns on the transistor when the inductor current becomes smaller than a predetermined value, and turns off the transistor when a period corresponding to the output voltage has elapsed; a first detection circuit that detects whether the on-period of the transistor is shorter than a first period; and a first timing circuit that times a second period when it is detected that the on-period is shorter than the first period, the drive circuit turns on the transistor based on the fact that the second period has been timed, regardless of the inductor current, when it is detected that the on-period is shorter than the first period, the second period being shorter than a period corresponding to the highest frequency in the audio frequency band.

[0007] Another aspect of the power supply circuit of the present invention is a power supply circuit that generates an output voltage of a target level from an AC voltage, comprising: an inductor to which a rectified voltage from a full-wave rectifier circuit that rectifies the AC voltage is applied; a transistor that controls an inductor current flowing through the inductor; and a switching control circuit that switches on and off the transistor, wherein the switching control circuit includes a drive circuit that turns on the transistor when the inductor current becomes smaller than a predetermined value and turns off the transistor when a period corresponding to the output voltage has elapsed; a first detection circuit that detects whether an on-period of the transistor is shorter than a first period; and a first timing circuit that times a second period when it is detected that the on-period is shorter than the first period, wherein the drive circuit turns on the transistor based on the fact that the second period has been timed, regardless of the inductor current, when it is detected that the on-period is shorter than the first period, and the second period is shorter than a period corresponding to the highest frequency of the audio frequency band. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide an integrated circuit that suppresses coil noise.

[0009] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a diagram illustrating an example of the configuration of an AC-DC converter 10. FIG. [Figure 2] FIG. 2 is a diagram illustrating an example of the configuration of a power factor correction IC 29a. [Figure 3] FIG. 10 is a diagram illustrating an example of the operation of the power factor correction IC 29a. [Figure 4] FIG. 10 is a diagram illustrating an example of the operation of the power factor correction IC 29a. [Figure 5] FIG. 10 is a diagram illustrating an example of the operation of the power factor correction IC 29a. [Figure 6] FIG. 2 is a diagram illustrating an example of the configuration of a power factor correction IC 29b. [Figure 7] FIG. 10 is a diagram illustrating an example of the operation of the power factor correction IC 29b. DETAILED DESCRIPTION OF THE INVENTION

[0011] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention. Furthermore, identical or equivalent components, members, etc. shown in each drawing are given the same reference numerals, and redundant explanations will be omitted as appropriate.

[0012] In this specification, the term "connection" is used, and unless otherwise specified, "connection" means "electrical connection." In this specification, when a voltage or signal has a high logic level, it is referred to as an "H" level, and when the logic level is a low logic level, it is referred to as an "L" level.

[0013] ===This Embodiment=== FIG. 1 is a diagram showing an example of the configuration of an AC-DC converter 10. The AC-DC converter 10 is a boost chopper type power supply circuit that generates an output voltage Vout at a target level from an AC voltage Vac of an AC power supply 11. The AC-DC converter 10 supplies an output current Iout to a load 12 and applies an output voltage Vout to the load 12.

[0014] Here, the AC power supply 11 is a commercial AC power supply for applying an AC voltage Vac to the AC-DC converter 10. The AC voltage Vac is, for example, a voltage of 100 to 277V and a frequency of 50 to 60Hz. Also, the load 12 is, for example, an electronic device that operates with a DC-DC converter or a DC voltage.

[0015] <<Configuration of AC-DC Converter 10>> The AC-DC converter 10 includes an inductor 21, capacitors 22, 24, 28, 34, 35, a full-wave rectifier circuit 23, a transformer 25, resistors 26, 31 to 33, a diode 27, a power factor correction IC 29a, and a MOS transistor 30.

[0016] ==Input to the Full-Wave Rectifier Circuit 23== The inductor 21 and the capacitor 22 remove noise from the voltage Vac and the current supplied from the AC power supply 11 to the full-wave rectifier circuit 23. From the AC power supply 11 through the inductor 21 and the capacitor 22, a voltage with noise removed from the voltage Vac and an input current Iin are supplied to the full-wave rectifier circuit 23.

[0017] ==Configuration from the Full-Wave Rectifier Circuit 23 to the Load 12== The full-wave rectifier circuit 23 full-wave rectifies a predetermined AC voltage Vac and applies it as a rectified voltage Vrec to the main coil L1 of the capacitor 24 and the transformer 25. Note that the full-wave rectifier circuit 23 is a general diode bridge circuit composed of four diodes.

[0018] The capacitor 24 smoothes the rectified voltage Vrec applied by the full-wave rectifier circuit 23 and removes noise.

[0019] The transformer 25 includes a main coil L1 and an auxiliary coil L2 magnetically coupled to the main coil L1. In this embodiment, the auxiliary coil L2 is wound so that the polarity of the voltage generated in the auxiliary coil L2 is opposite to the polarity of the voltage generated in the main coil L1.

[0020] The auxiliary coil L2 is connected to a terminal ZCD of a power factor correction IC 29a (described later) via a resistor 26. A current corresponding to the inductor current IL flowing through the main coil L1 flows through the auxiliary coil L2, and therefore a voltage Vzcd corresponding to the inductor current IL is applied to the terminal ZCD.

[0021] The main coil L1 of the transformer 25, together with a MOS transistor 30 (described later), a diode 27, and a capacitor 28, constitute a boost chopper circuit. As a result, the charging voltage of the capacitor 28 is boosted to a DC output voltage Vout and supplied to the load 12.

[0022] The power factor correction IC 29a is an integrated circuit that controls the switching of the MOS transistor 30 so that the level of the output voltage Vout becomes a target level (e.g., 400 V) while correcting the power factor of the AC-DC converter 10. The power factor correction IC 29a drives the MOS transistor 30 based on the inductor current IL flowing through the main coil L1 and the output voltage Vout.

[0023] The power factor correction IC 29a includes terminals COMP, FB, OUT, and ZCD. The power factor correction IC 29a also has terminals other than the terminals COMP, FB, OUT, and ZCD (for example, a power terminal, a GND terminal, etc.), but these other terminals are omitted from the drawing. The power factor correction IC 29a corresponds to a "switching control circuit."

[0024] The MOS transistor 30 is a power transistor for controlling the power to the load 12 of the AC-DC converter 10. Specifically, the MOS transistor 30 controls the inductor current IL flowing through the main coil L1 of the transformer 25.

[0025] In this embodiment, the MOS transistor 30 is an N-type MOS (Metal Oxide Semiconductor) transistor, but is not limited to this. That is, the MOS transistor 30 may be any transistor that can control power, and may be, for example, a bipolar transistor. Here, the gate electrode of the MOS transistor 30 is connected to the terminal OUT of the power factor correction IC 29a.

[0026] A voltage Vdr is applied from a power factor correction IC 29a to the gate electrode of the MOS transistor 30. The power factor correction IC 29a controls the power to the load 12 by controlling the timing at which the voltage level of the voltage Vdr is changed.

[0027] Resistors 31 and 32 form a voltage divider circuit that generates a feedback voltage Vfb in response to the output voltage Vout and is used to switch the MOS transistor 30. The voltage divider circuit applies the divided voltage Vfb as a feedback voltage to the terminal FB of the power factor correction IC 29a.

[0028] The resistor 33 and the capacitors 34 and 35 are elements for phase compensation used in feedback control. The resistor 33 and the capacitor 34 are connected in series between the terminal COMP and the ground. The capacitor 35 is connected in parallel to the resistor 33 and the capacitor 34.

[0029] Although the details of the power factor correction IC 29a will be described later, the power factor correction IC 29a turns on the MOS transistor 30 when the inductor current IL flowing through the main coil L1 of the transformer 25 reaches a predetermined value (for example, almost zero; hereinafter, "almost zero" will be referred to as "zero"), and then the power factor correction IC 29a turns off the MOS transistor 30 based on the voltage Vcomp of the terminal COMP.

[0030] ==Configuration of Power Factor Correction IC29a== 2 shows an example of the configuration of the power factor correction IC 29a. The power factor correction IC 29a includes a hysteresis comparator 100, an OR circuit 101, timers 102 and 104, a detection circuit 103, a selector 105, and a drive circuit .

[0031] The hysteresis comparator 100 is a circuit that detects whether the inductor current IL has become zero based on the voltage Vzcd applied to the terminal ZCD. Because the auxiliary coil L2 is electromagnetically coupled to the main coil L1, the voltage Vzcd applied to the terminal ZCD corresponds to the inductor current IL flowing through the main coil.

[0032] Specifically, the hysteresis comparator 100 compares the voltage Vzcd with thresholds Vthl and Vthh that correspond to the reference voltage Vref0, and detects whether the inductor current IL has become zero.

[0033] When the inductor current IL decreases to zero, the voltage Vzcd becomes lower than the threshold Vthl, and the hysteresis comparator 100 outputs an “H” level signal Sz to the OR circuit 101. On the other hand, when the inductor current IL increases and the voltage Vzcd exceeds the threshold Vthh, the hysteresis comparator 100 outputs an “L” level signal Vz to the OR circuit 101.

[0034] Furthermore, the threshold value Vthl is a lower threshold value of the hysteresis comparator 100 according to the reference voltage Vref0 applied to the hysteresis comparator 100. Similarly, the threshold value Vthh is a higher threshold value of the hysteresis comparator 100 according to the reference voltage Vref0.

[0035] In this way, the hysteresis comparator 100 compares the voltage Vzcd with the two thresholds Vthl and Vthh, so that the hysteresis comparator 100 does not erroneously fluctuate its output even if the voltage Vzcd fluctuates by a small amount due to noise. Therefore, the hysteresis comparator 100 can reduce the effect of noise on the voltage Vzcd.

[0036] The OR circuit 101 is a circuit that calculates the logical sum of a pulse signal St from a timer 102 (described later) and a signal Sz. Therefore, when the pulse signal St or the signal Sz from the timer 102 is input, the OR circuit 101 outputs a signal Sa of an “H” level to a selector 105 (described later).

[0037] The timer 102 is a circuit that outputs a pulse signal St to turn on the MOS transistor 30 when the hysteresis comparator 100 cannot detect that the inductor current IL has become zero after the MOS transistor 30 has turned off. Specifically, the timer 102 outputs a pulse signal St to turn on the MOS transistor 30 when the inductor current IL does not become zero even after a predetermined period T1 (e.g., 10 μsec) has elapsed since the MOS transistor 30 turned off.

[0038] On the other hand, when the MOS transistor 30 is turned on and the drive signal Vq1 is at a high level during the predetermined period T1, the timer 102 resets the counting of the predetermined period T1, and resumes counting when the drive signal Vq1 is at a low level. Therefore, when the MOS transistor 30 is turned on during the predetermined period T1, the timer 102 stops outputting the pulse signal St. The timer 102 corresponds to a "second timing circuit," and the predetermined period T1 corresponds to a "third period."

[0039] The detection circuit 103 is a circuit that detects whether the on-period Ton of the MOS transistor 30 is shorter than a predetermined on-period Ton0. Specifically, when the on-period Ton becomes shorter than the on-period Ton0, the detection circuit 103 outputs a signal Sb of "H" level. On the other hand, after outputting the "H" level signal Sb, when the MOS transistor 30 is turned on, the detection circuit 103 outputs a signal Sb of "L" level if the on-period Ton becomes longer than the on-period Ton0. The on-period Ton0 corresponds to the "first period."

[0040] ==Timer 104== The timer 104 is a circuit that measures a predetermined period T2 (described later). When an "H" level drive signal Vq1 is input, the timer 104 resets the measurement of the predetermined period T2 and restarts the measurement. If an "H" level drive signal Vq1 is not input during the predetermined period T2, the timer 104 outputs a pulse signal Sc. The predetermined period T2 is longer than the predetermined period T1 (e.g., 10 μsec) and shorter than a period corresponding to a frequency (preferably, 25 kHz) higher than the highest frequency (e.g., 20 kHz) in the audible frequency band (e.g., 20 to 20 kHz). The timer 104 corresponds to a "first timing circuit," and the predetermined period T2 corresponds to a "second period."

[0041] The selector 105 outputs either the signal Sa from the OR circuit 101 or the signal Sc from the timer 104 as the signal Sset based on the detection result of the detection circuit 103. Specifically, when the on-period Ton of the MOS transistor 30 becomes longer than the on-period Ton0 and the detection circuit 103 outputs a signal Sb of the "L" level, the selector 105 outputs the signal Sa as the signal Sset. On the other hand, when the on-period Ton of the MOS transistor 30 becomes shorter than the on-period Ton0 and the detection circuit 103 outputs a signal Sb of the "H" level, the selector 105 outputs the pulse signal Sc as the signal Sset.

[0042] ==Driver circuit 106== The drive circuit 106 is a circuit that switches the MOS transistor 30 based on the pulse signal Sset from the selector 105 and the feedback voltage Vfb. Specifically, when the pulse signal Sset is input, the drive circuit 106 turns on the MOS transistor 30, and when a period according to the feedback voltage Vfb has elapsed, the drive circuit 106 turns off the MOS transistor 30. The drive circuit 106 includes an oscillator (OSC) 200, an error amplifier circuit 201, a comparator 202, an SR flip-flop 203, and a buffer 204.

[0043] The oscillator 200 is a circuit that outputs an oscillation voltage Vramp whose voltage level changes at a predetermined slope when the MOS transistor 30 is turned on. Specifically, when the MOS transistor 30 is on (i.e., when the drive signal Vq1 is at "H" level), the oscillator 200 outputs the oscillation voltage Vramp from a predetermined level V0. On the other hand, when the MOS transistor 30 is off (i.e., when the signal Vq1 is at "L" level), the oscillator 200 sets the voltage level of the oscillation voltage Vramp to a predetermined level V0. The predetermined level V0 is higher than the voltage level of the ground voltage.

[0044] The error amplifier circuit 201 is a transconductance amplifier that discharges the capacitors 34 and 35 in FIG. 1 via the terminal COMP so that the on-period of the MOS transistor 30 becomes shorter when the output voltage Vout becomes higher than a target level.

[0045] Specifically, when the feedback voltage Vfb corresponding to the output voltage Vout is lower than the reference voltage Vref1, the error amplifier circuit 201 charges the capacitors 34 and 35 with the current Ierr. On the other hand, when the feedback voltage Vfb is higher than the reference voltage Vref1, the error amplifier circuit 201 discharges the capacitors 34 and 35 with the current Ierr. The voltage at the terminal COMP is defined as the voltage Vcomp.

[0046] The comparator 202 is a circuit that compares the oscillation voltage Vramp output by the oscillator 200 with the voltage Vcomp, and outputs a signal Sreset when the voltage level of the oscillation voltage Vramp reaches the voltage level of the voltage Vcomp according to the feedback voltage Vfb. Specifically, the comparator 202 outputs an "L" level signal Sreset to the SR flip-flop 203 when the voltage level of the oscillation voltage Vramp is lower than the voltage level of the voltage Vcomp.

[0047] On the other hand, when the voltage level of the oscillation voltage Vramp becomes higher than the voltage level of the voltage Vcomp, the comparator 202 outputs an “H” level signal Sreset to the SR flip-flop 203 to turn off the MOS transistor 30 .

[0048] The SR flip-flop 203 is a circuit that changes the Q output based on the pulse signal Sset and the signal Sreset and outputs it as the drive signal Vq1. Specifically, when the selector 105 outputs the pulse signal Sset, the SR flip-flop 203 outputs the drive signal Vq1 at the “H” level.

[0049] On the other hand, when the comparator 202 outputs the "H" level signal Sreset, the SR flip-flop 203 outputs the "L" level drive signal Vq1. The SR flip-flop 203 is a reset-priority flip-flop.

[0050] Therefore, when the voltage Vcomp becomes lower than the voltage V0, the comparator 202 always outputs the signal Sreset at the "H" level, and as a result, the SR flip-flop 203 always outputs the drive signal Vq1 at the "L" level.

[0051] On the other hand, when the output voltage Vout drops, causing the voltage Vcomp to exceed the voltage V0 and the voltage level of the oscillation voltage Vramp to be lower than the voltage level of the voltage Vcomp, the comparator 202 outputs a low-level signal Sreset. Furthermore, when the hysteresis comparator 100 outputs a high-level signal Sz, the SR flip-flop 203 outputs a high-level drive signal Vq1. As a result, the MOS transistor 30 is turned on.

[0052] However, how the output voltage Vout drops varies depending on the system of the AC-DC converter 10. Therefore, without the detection circuit 103, the timer 104, and the selector 105, the cycle from when the MOS transistor 30 is first turned on until it is turned on again may correspond to a frequency in the audio frequency band. Furthermore, if the MOS transistor 30 is switched intermittently in this way, there is a possibility that the main coil L1 will make a noise.

[0053] The buffer 204 is a circuit that applies a voltage Vdr to the MOS transistor 30 to turn on the MOS transistor 30 when a drive signal Vq1 of the “H” level is input, and applies a voltage Vdr to the MOS transistor 30 to turn off the MOS transistor 30 when a drive signal Vq1 of the “L” level is input.

[0054] <<<Normal operation of the power factor correction IC29a>>> 3 is a diagram showing an example of the operation of the power factor correction IC 29a. In FIG. 3, since the on-period Ton is longer than the on-period Ton0, the detection circuit 103 outputs the signal Sb at the “L” level.

[0055] At time t0, the inductor current IL becomes nearly zero, and the hysteresis comparator 100 outputs a high-level signal Sz. This causes the OR circuit 101 to output a high-level signal Sa, and the selector 105 to output a signal Sset. When the signal Sset is output, the SR flip-flop 203 outputs a high-level drive signal Vq1, and the buffer 204 outputs a voltage Vdr that turns on the MOS transistor 30. When the MOS transistor 30 turns on, the inductor current IL increases. The oscillator 200 then begins to output an oscillation voltage Vramp, whose voltage level changes at a predetermined slope from a predetermined level V0.

[0056] At time t1, when the voltage level of the oscillation voltage Vramp matches the voltage level of the voltage Vcomp, the comparator 202 outputs a high-level signal Sreset. The SR flip-flop 203 then outputs a low-level drive signal Vq1, and the buffer 204 outputs a voltage Vdr that turns off the MOS transistor 30. When the MOS transistor 30 turns off, the inductor current IL begins to decrease. The oscillator 200 also sets the voltage level of the oscillation voltage Vramp to a predetermined level V0. Similar operations are repeated from time t2 onward.

[0057] <<<Operation of the power factor correction IC29a during abnormal conditions>>> 4 is a diagram showing an example of the operation of the power factor correction IC 29a in an abnormal state (for example, when the power supply is turned on, which is a different state from normal state). In FIG. 4, since the on-period Ton is longer than the on-period Ton0, the detection circuit 103 outputs a signal Sb at an “L” level.

[0058] At time t10, when a period T1 has elapsed since the MOS transistor 30 was turned off, the timer 102 completes timing of the period T1 and outputs a pulse signal St. When the timer 102 outputs the pulse signal St, the OR circuit 101 outputs a signal Sa at an "H" level, and the selector 105 outputs a signal Sset. Then, the MOS transistor 30 is turned on.

[0059] As described above, a situation in which the inductor current IL does not become zero even after the period T1 has elapsed since the MOS transistor 30 was turned off may occur at startup, and in this case, the MOS transistor 30 is turned on based on the pulse signal St output by the timer 102. Also, when the temperature of the main coil L1 rises and the inductance value of the main coil L1 increases due to the temperature characteristics, the timer 102 may output the pulse signal St if the rate at which the inductor current IL decreases becomes smaller.

[0060] When the MOS transistor 30 is turned on, the inductor current IL increases, and the oscillator 200 starts to output the oscillation voltage Vramp, the voltage level of which changes at a predetermined gradient from a predetermined level V0.

[0061] At time t11, when the voltage level of the oscillation voltage Vramp matches the voltage level of the voltage Vcomp, the comparator 202 outputs a high-level signal Sreset. The MOS transistor 30 then turns off. When the MOS transistor 30 turns off, the inductor current IL begins to decrease. The oscillator 200 also sets the voltage level of the oscillation voltage Vramp to voltage V0. Similar operations are then repeated.

[0062] In this way, the timer 102 outputs the signal St when the hysteresis comparator 100 fails to detect that the inductor current IL has become zero and the predetermined period T1 has elapsed since the MOS transistor 30 was turned off. As a result, even if the power factor correction IC 29a fails to detect that the inductor current IL has suddenly become zero within the predetermined period T1, the power factor correction IC 29a continues to operate the AC-DC converter 10 without reducing the output voltage Vout.

[0063] <<<Operation of power factor correction IC29a when the on-period Ton is shorter than the on-period Ton0>>> FIG. 5 is a diagram showing an example of the operation of the power factor correction IC 29a.

[0064] At time t20, when the inductor current IL becomes nearly zero and the hysteresis comparator 100 outputs a high-level signal Sz, the OR circuit 101 outputs a high-level signal Sa, and the selector 105 outputs a signal Sset. When the signal Sset is output, the SR flip-flop 203 outputs a high-level drive signal Vq1, and the buffer 204 outputs a voltage Vdr that turns on the MOS transistor 30. When the MOS transistor 30 turns on, the inductor current IL increases. Then, the oscillator 200 starts outputting an oscillation voltage Vramp, whose voltage level changes at a predetermined slope from a predetermined level V0.

[0065] At time t21, when the voltage level of the oscillation voltage Vramp matches the voltage level of the voltage Vcomp, the comparator 202 outputs a high-level signal Sreset. The SR flip-flop 203 then outputs a low-level drive signal Vq1, and the buffer 204 outputs a voltage Vdr that turns off the MOS transistor 30. When the MOS transistor 30 turns off, the inductor current IL begins to decrease. The oscillator 200 also sets the voltage level of the oscillation voltage Vramp to a predetermined level V0.

[0066] At time t22, the power factor correction IC 29a operates in the same manner as at time t20.

[0067] At time t23, the voltage level of the oscillation voltage Vramp matches the voltage level of the voltage Vcomp, and the comparator 202 outputs an "H" level signal Sreset. Then, the MOS transistor 30 turns off. When the MOS transistor 30 turns off, the inductor current IL begins to decrease. The oscillator 200 also sets the voltage level of the oscillation voltage Vramp to a predetermined level V0. At time t23, the MOS transistor 30 turns off, and the on-period Ton becomes shorter than the on-period Ton0, and the detection circuit 103 outputs an "H" level signal Sb.

[0068] Therefore, even if the voltage Vzcd corresponding to the inductor current IL rings after time t23, the hysteresis comparator 100 outputs a high-level signal Sz, and the OR circuit 101 outputs a high-level signal Sa, the selector 105 does not output a high-level signal Sset.

[0069] At time t24, when the period T2 has elapsed since time t22 when the MOS transistor 30 is turned on, the timer 104 outputs a pulse signal Sc. When the timer 104 outputs the pulse signal Sc, the selector 105 outputs an "H" level signal Sset. The MOS transistor 30 is then turned on. Since it is highly likely that the output voltage Vout has decreased and the voltage Vcomp has increased during the period T2 from time t22, when the MOS transistor 30 is turned on at time t14, the on-period Ton of the MOS transistor 30 is highly likely to be longer than the on-period Ton0.

[0070] At time t25, when the on-period Ton0 has elapsed since the MOS transistor 30 was turned on, the detection circuit 103 outputs a signal Sb at an "L" level.

[0071] At time t26, the voltage level of the oscillation voltage Vramp matches the voltage level of the voltage Vcomp, and the comparator 202 outputs a high-level signal Sreset. The MOS transistor 30 then turns off. When the MOS transistor 30 turns off, the inductor current IL begins to decrease. The oscillator 200 also sets the voltage level of the oscillation voltage Vramp to a predetermined level V0.

[0072] Thus, when the on-period Ton becomes shorter than the on-period Ton0, the detection circuit 103 outputs a signal Sb of "H" level, and the selector 105 outputs only the pulse signal Sc from the timer 104 as the signal Sset. Therefore, for example, the period from time t22 to time t24 becomes the period T2 (preferably, a period corresponding to, for example, 25 kHz). As a result, regardless of the system of the AC-DC converter 10, the minimum frequency of the switching frequency of the MOS transistor 30 becomes higher than the maximum frequency (20 kHz) of the audible frequency band. Therefore, the audible noise of the main coil L1 is suppressed.

[0073] === Variations === ===Configuration of Power Factor Correction IC29b=== The power factor correction IC 29a has been described above. Fig. 6 is a diagram showing an example of the configuration of a power factor correction IC 29b, which is a modified example of the power factor correction IC 29a. The power factor correction IC 29b includes a hysteresis comparator 100, an OR circuit 101, timers 102 and 104, a detection circuit 107, a selector 105, and a drive circuit 106.

[0074] The detection circuit 107 is a circuit that detects whether the voltage Vcomp is higher than the reference voltage Vref2. Specifically, when the voltage Vcomp becomes lower than the reference voltage Vref2, the detection circuit 107 outputs a signal Sd of "H" level. On the other hand, after outputting the "H" level signal Sd, when the SR flip-flop 203 changes the drive signal Vq1 from "H" level to "L" level, the detection circuit 107 outputs a signal Sd of "L" level.

[0075] <<<Operation of power factor correction IC29b when voltage Vcomp is lower than reference voltage Vref2>>> 7 is a diagram showing an example of the operation of the power factor correction IC 29b. Note that the operation of the power factor correction IC 29b from time t30 to t32 is similar to the operation of the power factor correction IC 29a from time t20 to t22 in FIG.

[0076] At time t33 when the voltage Vcomp becomes lower than the reference voltage Vref2, the detection circuit 107 outputs an “H” level signal Sd. Therefore, even if the voltage Vzcd corresponding to the inductor current IL rings after time t23, the hysteresis comparator 100 outputs an “H” level signal Sz, and the OR circuit 101 outputs an “H” level signal Sa, the selector 105 does not output an “H” level signal Sset.

[0077] At time t34, the voltage level of the oscillation voltage Vramp matches the voltage level of the voltage Vcomp, and the comparator 202 outputs an "H" level signal Sreset. Then, the MOS transistor 30 turns off. When the MOS transistor 30 turns off, the inductor current IL begins to decrease. The oscillator 200 also sets the voltage level of the oscillation voltage Vramp to a predetermined level V0.

[0078] At time t35, when the period T2 has elapsed since time t32 when the MOS transistor 30 is turned on, the timer 104 outputs a pulse signal Sc. When the timer 104 outputs the pulse signal Sc, the selector 105 outputs an "H" level signal Sset. Then, the MOS transistor 30 is turned on. During the period T2 from time t32, the output voltage Vout decreases, and it is highly likely that the voltage Vcomp will become higher than the reference voltage Vref2.

[0079] At time t36 when the voltage level of the oscillation voltage Vramp matches the voltage level of the voltage Vcomp, the comparator 202 outputs a high-level signal Sreset. The MOS transistor 30 is then turned off. The detection circuit 103 outputs a low-level signal Sd. When the MOS transistor 30 is turned off, the inductor current IL begins to decrease. The oscillator 200 also sets the voltage level of the oscillation voltage Vramp to a predetermined level V0.

[0080] In this way, when the voltage Vcomp becomes lower than the reference voltage Vref2, the detection circuit 107 outputs a signal Sd of "H" level, and the selector 105 outputs only the pulse signal Sc from the timer 104 as the signal Sset. Therefore, for example, the period from time t22 to time t25 corresponds to period T2 (preferably, a period corresponding to, for example, 25 kHz). As a result, similar to the case where the power factor correction IC 29a is used, the minimum frequency of the switching frequency of the MOS transistor 30 is higher than the maximum frequency of the audio frequency band (for example, 20 kHz), regardless of the system of the AC-DC converter 10. Therefore, even when the power factor correction IC 29b is used, the audible noise of the main coil L1 is suppressed similar to the case where the power factor correction IC 29a is used.

[0081] ==Summary== The AC-DC converter 10 of this embodiment has been described above. The power factor correction IC 29a includes a drive circuit 106, a detection circuit 103, and a timer 104. When the timer 104 times a period T2 that is shorter than the period corresponding to the highest frequency in the audible frequency band, the drive circuit 106 turns on the MOS transistor 30. This makes it possible to provide an integrated circuit that suppresses coil noise.

[0082] The power factor correction IC 29a also includes a timer 102. When the timer 102 times the period T1, the drive circuit 106 turns on the MOS transistor 30. As a result, even if the power factor correction IC 29a cannot suddenly detect that the inductor current IL becomes zero within the predetermined period T1, the power factor correction IC 29a can continue to operate the AC-DC converter 10 without reducing the output voltage Vout.

[0083] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that the technical scope of the present invention may include forms incorporating such modifications and improvements and their equivalents without departing from the spirit of the invention.

[0084] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. [Explanation of symbols]

[0085] 10 AC-DC converter 11 AC power supply 12 Load 21 Choke coil 22, 24, 28, 34, 35 Capacitors 23 Full wave rectifier circuit 25 Transformer 26,31~33 Resistance 27 Diode 29a, 29b Power factor correction IC 30 MOS transistors 100 Hysteresis Comparator 101 OR circuit 102,104 Timer 103,107 Detection circuit 105 Selector 106 Drive circuit 200 Oscillators 201 Error amplifier circuit 202 Comparator 203 SR Flip-Flop 204 buffer

Claims

1. A switching control circuit for a power supply circuit that generates an output voltage of a target level from the AC voltage, the power supply circuit including an inductor to which a rectified voltage from a full-wave rectifier circuit that rectifies an AC voltage is applied, and a transistor that controls an inductor current flowing through the inductor, the switching control circuit switching the transistor, a drive circuit that turns on the transistor when the inductor current becomes smaller than a predetermined value, and turns off the transistor when a period corresponding to the output voltage has elapsed; a detection circuit that detects whether the on-period of the transistor is shorter than a first period; a first timer circuit that measures a second period when it is detected that the on-period is shorter than the first period; Equipped with The drive circuit if the on-period is detected to be shorter than the first period, turning on the transistor based on the second period being timed regardless of the inductor current; the second period is shorter than a period corresponding to the highest frequency in the audible frequency band; Switching control circuit.

2. 2. The switching control circuit according to claim 1, a second timer circuit that times a third period shorter than the second period when the transistor is turned off; Equipped with The drive circuit If the on-period is longer than the first period, turning on the transistor based on the fact that the third period has been timed. Switching control circuit.

3. A power supply circuit that generates an output voltage of a target level from an AC voltage, an inductor to which a rectified voltage from a full-wave rectifier circuit that rectifies the AC voltage is applied; a transistor for controlling an inductor current flowing through the inductor; a switching control circuit that switches the transistor; Equipped with The switching control circuit a drive circuit that turns on the transistor when the inductor current becomes smaller than a predetermined value, and turns off the transistor when a period corresponding to the output voltage has elapsed; a detection circuit that detects whether the on-period of the transistor is shorter than a first period; a first timer circuit that measures a second period when it is detected that the on-period is shorter than the first period; Including, The drive circuit if the on-period is detected to be shorter than the first period, turning on the transistor based on the second period being timed regardless of the inductor current; the second period is shorter than a period corresponding to the highest frequency in the audible frequency band; power circuit.

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