Semiconductor light-receiving device

The semiconductor light-receiving element addresses high dark current by incorporating a high-bandgap III-V compound semiconductor layer and a step layer to reduce thermal excitation and tunneling current, enhancing its operational efficiency.

JP2025160690APending Publication Date: 2025-10-23SUMITOMO ELECTRIC INDUSTRIES LTD
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Patent Information

Application Number
JP2024063409
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-04-10
Publication Date
2025-10-23

AI Technical Summary

Technical Problem

Existing semiconductor light-receiving elements suffer from high dark current due to thermal excitation of carriers to carrier capture levels.

Method used

A semiconductor light-receiving element is designed with a III-V compound semiconductor layer having a larger bandgap energy than the light-absorbing layer, accompanied by an undoped third III-V compound semiconductor layer and optionally a step layer to facilitate hole flow, reducing thermal excitation and tunneling current.

Benefits of technology

The design effectively reduces dark current by minimizing carrier thermal excitation and tunneling current, improving the element's performance and reliability.

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Abstract

To provide a semiconductor light-receiving device capable of reducing dark current.SOLUTION: A semiconductor light-receiving device includes: an indium phosphide substrate; a first III-V compound semiconductor layer of a first conductivity type; a second III-V compound semiconductor layer of a second conductivity type; a light-absorbing layer provided between the first III-V compound semiconductor layer and the second III-V compound semiconductor layer and including a III-V compound semiconductor; and a third III-V compound semiconductor layer provided between the light-absorbing layer and the second III-V compound semiconductor layer, the third III-V compound semiconductor layer being non-doped. The first III-V compound semiconductor layer is provided between the indium phosphide substrate and the light-absorbing layer. The third III-V compound semiconductor layer has a band gap energy larger than a maximum value of a band gap energy of the III-V compound semiconductor included in the light-absorbing layer.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor light receiving element. [Background technology]

[0002] Non-Patent Document 1 discloses a photodetector including an indium phosphide (InP) substrate. An n-type indium gallium arsenide (InGaAs) layer, a superlattice layer, a light absorption layer, a p-type indium aluminum arsenide (InAlAs) layer, a p-type aluminum arsenide antimonide (AlAsSb) layer, and a p-type InGaAs layer are sequentially formed on the InP substrate. The superlattice layer includes an InGaAs layer and a gallium arsenide antimonide (GaAsSb) layer. The light absorption layer is an undoped InGaAs layer. The AlAsSb layer functions as an electron barrier layer. [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] Jingyi Wang, et al, "InP-Based Broadband Photodetectors With InGaAs / GaAsSb Type-IISuperlattice" IEEE Electron Device Letters, Vol.43, No.5, 2022, pp.757-760 Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides a semiconductor light-receiving element capable of reducing dark current. [Means for solving the problem]

[0005] A semiconductor light-receiving element according to one aspect of the present disclosure includes an indium phosphide substrate, a first III-V compound semiconductor layer of a first conductivity type, a second III-V compound semiconductor layer of a second conductivity type, a light-absorbing layer provided between the first III-V compound semiconductor layer and the second III-V compound semiconductor layer and containing a III-V compound semiconductor, and an undoped third III-V compound semiconductor layer provided between the light-absorbing layer and the second III-V compound semiconductor layer, wherein the first III-V compound semiconductor layer is provided between the indium phosphide substrate and the light-absorbing layer, and the third III-V compound semiconductor layer has a bandgap energy greater than a maximum value of the bandgap energy of the III-V compound semiconductor included in the light-absorbing layer. [Effects of the Invention]

[0006] According to the present disclosure, a semiconductor light-receiving element capable of reducing dark current is provided. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a cross-sectional view schematically showing a semiconductor light-receiving element according to an embodiment. [Figure 2] FIG. 2 is a cross-sectional view schematically showing a light absorption layer included in the semiconductor light receiving element of FIG. [Figure 3] FIG. 3 is a cross-sectional view schematically showing a step layer included in the semiconductor light-receiving element of FIG. [Figure 4] FIG. 4 is a cross-sectional view schematically showing a semiconductor light-receiving element according to another embodiment. [Figure 5] FIG. 5 is a diagram showing an example of the structure of a part of the semiconductor light-receiving element of the second experiment. [Figure 6] FIG. 6 is a graph showing an example of the relationship between the layer number and the energy at the top of the valence band in the semiconductor light-receiving element of the second experiment. [Figure 7] FIG. 7 is a diagram showing an example of a part of an energy band diagram of the light absorption layer in the semiconductor light receiving element of the second experiment. [Figure 8]FIG. 8 is a diagram showing an example of a part of an energy band diagram of the step layer in the semiconductor light-receiving element of the second experiment. [Figure 9] FIG. 9 is a graph showing an example of an energy band diagram of the semiconductor light-receiving element of the first experiment. [Figure 10] FIG. 10 is a graph showing an example of an energy band diagram of the semiconductor light-receiving element of the second experiment. [Figure 11] FIG. 11 is a graph showing an example of an energy band diagram of the semiconductor light-receiving element of the third experiment. [Figure 12] FIG. 12 is a graph showing an example of the distribution of electron concentration and hole concentration in the semiconductor light-receiving element of the first experiment. [Figure 13] FIG. 13 is a graph showing an example of the distribution of electron concentration and hole concentration in the semiconductor light-receiving element of the second experiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.

[0009] (1) A semiconductor light-receiving element includes an indium phosphide substrate, a first III-V compound semiconductor layer of a first conductivity type, a second III-V compound semiconductor layer of a second conductivity type, a light-absorbing layer provided between the first III-V compound semiconductor layer and the second III-V compound semiconductor layer and containing a III-V compound semiconductor, and an undoped third III-V compound semiconductor layer provided between the light-absorbing layer and the second III-V compound semiconductor layer, wherein the first III-V compound semiconductor layer is provided between the indium phosphide substrate and the light-absorbing layer, and the third III-V compound semiconductor layer has a band gap energy larger than the maximum value of the band gap energy of the III-V compound semiconductor contained in the light-absorbing layer.

[0010] In the semiconductor light-receiving element, the third III-V compound semiconductor layer has a large band gap energy. Therefore, the energy of the carrier capture level that can be formed in the third III-V compound semiconductor layer is high, making it difficult for carriers to be thermally excited to the carrier capture level. As a result, the tunneling current caused by the carrier capture level can be reduced, and therefore the dark current can be reduced.

[0011] (2) In the above (1), the device may further include a fourth III-V compound semiconductor layer of the second conductivity type provided between the third III-V compound semiconductor layer and the second III-V compound semiconductor layer.

[0012] (3) In the above (2), the fourth III-V compound semiconductor layer may have a thickness smaller than that of the third III-V compound semiconductor layer.

[0013] In this case, the amount of holes accumulated in the light absorption layer can be reduced.

[0014] (4) In any one of the above (1) to (3), the third III-V compound semiconductor layer may include a ternary III-V compound semiconductor containing aluminum.

[0015] In this case, the crystallinity of the third III-V compound semiconductor layer is improved compared to the quaternary III-V compound semiconductor.

[0016] (5) In any one of the above (1) to (4), the third III-V compound semiconductor layer may have a thickness of 300 nm or more.

[0017] (6) In any one of the above (1) to (5), the device may further include at least one undoped fifth III-V group compound semiconductor layer provided between the light absorption layer and the third III-V group compound semiconductor layer, and the upper edge of the valence band of the at least one fifth III-V group compound semiconductor layer may have an energy level between the upper edge of the valence band of the light absorption layer and the upper edge of the valence band of the third III-V group compound semiconductor layer.

[0018] In this case, holes in the light absorption layer can easily flow to the third III-V compound semiconductor layer via the fifth III-V compound semiconductor layer, thereby reducing the amount of holes accumulated in the light absorption layer.

[0019] (7) In the above (6), the at least one undoped III-V group 5 compound semiconductor layer may have a quantum well structure.

[0020] In this case, the crystallinity of the Group VIII-V compound semiconductor layer is improved compared to a bulk semiconductor.

[0021] (8) In the above (6) or (7), the at least one undoped fifth III-V group compound semiconductor layer may include a plurality of undoped fifth III-V group compound semiconductor layers, each of the plurality of undoped fifth III-V group compound semiconductor layers may include a sixth III-V group compound semiconductor layer containing the same III-V group compound semiconductor material as the third III-V group compound semiconductor layer, and the thickness of the sixth III-V group compound semiconductor layer may monotonically increase from the light absorption layer toward the third III-V group compound semiconductor layer.

[0022] [Details of the embodiments of the present disclosure] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same or equivalent elements are designated by the same reference numerals, and redundant description will be omitted.

[0023] FIG. 1 is a cross-sectional view schematically illustrating a semiconductor light-receiving element according to an embodiment. FIG. 2 is a cross-sectional view schematically illustrating a light-absorbing layer included in the semiconductor light-receiving element of FIG. 1. The semiconductor light-receiving element 100 illustrated in FIG. 1 is, for example, a photodiode. The semiconductor light-receiving element 100 includes an indium phosphide (InP) substrate 10, a first III-V compound semiconductor layer 12 of a first conductivity type, a light-absorbing layer 16, a non-doped third III-V compound semiconductor layer 20, and a second III-V compound semiconductor layer 24 of a second conductivity type. The first conductivity type is, for example, n-type. The second conductivity type is the opposite conductivity type to the first conductivity type, for example, p-type. The light-absorbing layer 16 is provided between the first III-V compound semiconductor layer 12 and the second III-V compound semiconductor layer 24. The first III-V compound semiconductor layer 12 is provided between the InP substrate 10 and the light-absorbing layer 16. The third III-V compound semiconductor layer 20 is provided between the light absorbing layer 16 and the second III-V compound semiconductor layer 24 .

[0024] The semiconductor photodetector 100 may further include at least one of a III-V compound semiconductor layer 14, a step layer 18, or a second conductivity type fourth III-V compound semiconductor layer 22. The III-V compound semiconductor layer 14 is provided between the first III-V compound semiconductor layer 12 and the light absorption layer 16. The step layer 18 is provided between the light absorption layer 16 and the third III-V compound semiconductor layer 20. The fourth III-V compound semiconductor layer 22 is provided between the third III-V compound semiconductor layer 20 and the second III-V compound semiconductor layer 24. In the first direction D1, the InP substrate 10, the first III-V compound semiconductor layer 12, the III-V compound semiconductor layer 14, the light absorption layer 16, the step layer 18, the third III-V compound semiconductor layer 20, the fourth III-V compound semiconductor layer 22, and the second III-V compound semiconductor layer 24 may be arranged in this order. Adjacent layers in the first direction D1 may be in contact with each other. The first direction D1 may be a direction from the InP substrate 10 toward the second III-V compound semiconductor layer 24. The first direction D1 may be perpendicular to the major surface of the InP substrate 10. The first direction D1 may be a thickness direction of the light absorption layer 16. The first direction D1 may be a crystal growth direction.

[0025] The first III-V compound semiconductor layer 12 may include a main body 12a and a protrusion 12b on the main body 12a. A III-V compound semiconductor layer 14, a light absorption layer 16, a step layer 18, a third III-V compound semiconductor layer 20, a fourth III-V compound semiconductor layer 22, and a second III-V compound semiconductor layer 24 are provided on the protrusion 12b in this order. The protrusion 12b, the III-V compound semiconductor layer 14, the light absorption layer 16, the step layer 18, the third III-V compound semiconductor layer 20, the fourth III-V compound semiconductor layer 22, and the second III-V compound semiconductor layer 24 form a mesa MS.

[0026] The semiconductor light-receiving element 100 may include an insulating film 50 covering the mesa MS and the main body 12a. The insulating film 50 may be a silicon oxide film. The insulating film 50 may have an opening 50a on the main body 12a and an opening 50b on the top surface of the mesa MS. An electrode 30 connected to the main body 12a is provided in the opening 50a. An electrode 40 connected to the second III-V compound semiconductor layer 24 is provided in the opening 50b. A reverse bias voltage may be applied between the electrode 30 and the electrode 40.

[0027] The semiconductor photodetector 100 can detect incident light L. The incident light L may be visible light or infrared light having a wavelength of 0.4 to 4 μm. The incident light L may travel in a first direction D1. The incident light L may pass through the InP substrate 10 and enter the light absorption layer 16. The semiconductor photodetector 100 may have a cutoff wavelength (absorption edge wavelength) of 2 to 4 μm. The semiconductor photodetector 100 can be used in a spectroscopy system of a gas analyzer, an imaging system, or an optical communication system.

[0028] The InP substrate 10 may be a semi-insulating substrate. The InP substrate 10 may include iron-doped InP. The primary surface of the InP substrate 10 may be a (100) plane. A first III-V compound semiconductor layer 12 is provided on the primary surface of the InP substrate 10.

[0029] The first III-V compound semiconductor layer 12 may be a contact layer. The first III-V compound semiconductor layer 12 is a first conductivity type gallium indium arsenide (Ga x In 1-x The first III-V compound semiconductor layer 12 may be a gallium (Ga) or InAs (GaInAs) layer. x is the gallium (Ga) composition. x is greater than 0 and less than 1. x may be 0.46 to 0.49. The dopant concentration in the first III-V compound semiconductor layer 12 is 5×10 17 From 3 x 10 19 cm -3 The thickness of the main body 12a of the first III-V compound semiconductor layer 12 may be 0.05 to 3 μm.

[0030] The III-V compound semiconductor layer 14 is made of undoped Ga x In 1-x It may be an As layer. x is the gallium (Ga) composition. x is greater than 0 and less than 1. x may be 0.46 to 0.49. The thickness of the III-V compound semiconductor layer 14 may be 0.01 to 0.2 μm.

[0031] The light absorbing layer 16 includes a III-V compound semiconductor. The light absorbing layer 16 may be an undoped III-V compound semiconductor layer. In this specification, "undoped" means that the layer is not intentionally doped with a dopant. Therefore, an "undoped" layer has a dopant concentration of 1×10 15 cm -3 may have an n-type carrier concentration of less than 1 x 10 15 cm -3 The light absorbing layer 16 may have a quantum well structure such as a type II superlattice structure, or may be a bulk semiconductor layer. As shown in FIG. 2, the superlattice structure of the light absorbing layer 16 is formed by using undoped Ga x In 1-x As (or GaInAs) layer L1 and undoped gallium arsenide antimonide (GaAs y Sb 1-yAlternatively, the layer L2 may include a GaAsSb layer. x is the gallium (Ga) composition. x is greater than 0 and less than 1. x may be 0.4 to 0.7. y is the arsenic (As) composition. y may be 0.2 to 0.6. Ga x In 1-x As layer L1 and GaAs y Sb 1-y The layers L2 may be arranged alternately along the first direction D1. The lower surface of the light absorbing layer 16 closest to the first III-V compound semiconductor layer 12 may include a Ga x In 1-x An As layer L1 may be positioned on the semiconductor layer. x In 1-x The As layer L1 can be formed with good crystallinity. y Sb 1-y A layer L2 may be positioned. y Sb 1-y A semiconductor layer with good crystallinity can be formed on the layer L2. x In 1-x As layer L1 and GaAs y Sb 1-y The number of pairs (periods) of the layer L2 may be 200 to 400. x In 1-x The thickness of the As layer L1 may be 3 to 8 nm. y Sb 1-y The thickness of the layer L2 may be 3 to 8 nm. y Sb 1-y The thickness of the layer L2 is Ga x In 1-x The thickness of the As layer L1 may be the same as or different from that of the As layer L1.

[0032] The third III-V compound semiconductor layer 20 may be a cap layer. When the light absorbing layer 16 has a bulk III-V compound semiconductor, the third III-V compound semiconductor layer 20 has a band gap energy larger than the band gap energy of the bulk III-V compound semiconductor. When the light absorbing layer 16 has a quantum well structure such as a type II superlattice structure, the third III-V compound semiconductor layer 20 has a band gap energy larger than the band gap energy of the superlattice structure. The third III-V compound semiconductor layer 20 is made of Ga 0.47 In 0.53 The third III-V compound semiconductor layer 20 may have a bandgap energy larger than the bandgap energy (0.73 eV) of As. The third III-V compound semiconductor layer 20 may have a bandgap energy of 1 eV or more. The third III-V compound semiconductor layer 20 may contain a ternary III-V compound semiconductor or a quaternary III-V compound semiconductor. When the third III-V compound semiconductor layer 20 contains a ternary III-V compound semiconductor, the crystallinity of the third III-V compound semiconductor layer 20 is improved compared to when the third III-V compound semiconductor layer 20 contains a quaternary III-V compound semiconductor. The third III-V compound semiconductor layer 20 may contain aluminum. The third III-V compound semiconductor layer 20 contains aluminum indium arsenide (Al z In 1-z The third III-V compound semiconductor layer 20 may include aluminum indium arsenide antimonide (AlInAs or AlInAs), aluminum indium arsenide antimonide (AlInAsSb), or aluminum gallium arsenide antimonide (AlGaAsSb). z is the aluminum (Al) composition. z is greater than 0 and less than 1. z may be 0.4 to 0.7. The third III-V compound semiconductor layer 20 may have a thickness of 300 nm or more, or may have a thickness of 1000 nm or less.

[0033] The fourth III-V compound semiconductor layer 22 may be a cap layer. The fourth III-V compound semiconductor layer 22 may contain the same III-V compound semiconductor material as the III-V compound semiconductor material contained in the third III-V compound semiconductor layer 20. The fourth III-V compound semiconductor layer 22 may be an AlInAs layer of a second conductivity type. The fourth III-V compound semiconductor layer 22 may contain beryllium (Be) as a dopant. The dopant concentration in the fourth III-V compound semiconductor layer 22 is 1×10 17 From 1×10 19 cm -3 The fourth III-V compound semiconductor layer 22 may have a thickness smaller than that of the third III-V compound semiconductor layer 20. The fourth III-V compound semiconductor layer 22 may have a thickness of 50 nm or more, or may have a thickness of 500 nm or less.

[0034] The second III-V compound semiconductor layer 24 may be a contact layer. The second III-V compound semiconductor layer 24 is a GaAs layer of the second conductivity type. x In 1-x The second III-V compound semiconductor layer 24 may be an As (or GaInAs) layer. x is the gallium (Ga) composition ratio. x is greater than 0 and less than 1. x may be 0.46 to 0.49. The second III-V compound semiconductor layer 24 may have a dopant concentration higher than the dopant concentration of the fourth III-V compound semiconductor layer 22. The dopant concentration in the second III-V compound semiconductor layer 24 is 5×10 17 From 3 x 10 19 cm -3 The second III-V compound semiconductor layer 24 may have a thickness of 0.1 to 3 μm.

[0035] FIG. 3 is a cross-sectional view schematically illustrating a step layer included in the semiconductor light-receiving element of FIG. 1. As illustrated in FIG. 3, the step layer 18 may include a plurality of undoped group 5 III-V compound semiconductor layers SL1 to SL5, or may be a bulk semiconductor layer. The plurality of group 5 III-V compound semiconductor layers SL1 to SL5 are arranged in order in the direction opposite to the first direction D1. The group 5 III-V compound semiconductor layer SL1 may be in contact with the third group 5 III-V compound semiconductor layer 20. The group 5 III-V compound semiconductor layer SL5 may be in contact with the light-absorbing layer 16. The step layer 18 may include at least one of the plurality of group 5 III-V compound semiconductor layers SL1 to SL5. Each of the group 5 III-V compound semiconductor layers SL1 to SL5 may have a quantum well structure such as a superlattice structure. When the group 5 III-V compound semiconductor layers SL1 to SL5 have a quantum well structure, the crystallinity of the group 5 III-V compound semiconductor layers SL1 to SL5 is improved compared to a bulk semiconductor.

[0036] The fifth III-V compound semiconductor layer SL1 may include a plurality of III-V compound semiconductor layers SL11 and a plurality of III-V compound semiconductor layers SL12. The III-V compound semiconductor layers SL11 and the III-V compound semiconductor layers SL12 are alternately arranged in the first direction D1. The III-V compound semiconductor layer SL11 is located on the lower surface of the fifth III-V compound semiconductor layer SL1 closest to the light absorption layer 16. The III-V compound semiconductor layer SL12 is located on the upper surface of the fifth III-V compound semiconductor layer SL1 closest to the second III-V compound semiconductor layer 24.

[0037] The fifth III-V compound semiconductor layer SL2 may include a plurality of III-V compound semiconductor layers SL21 and a plurality of III-V compound semiconductor layers SL22. The III-V compound semiconductor layers SL21 and the III-V compound semiconductor layers SL22 are alternately arranged in the first direction D1. The III-V compound semiconductor layer SL21 is located on the lower surface of the fifth III-V compound semiconductor layer SL2 closest to the light absorption layer 16. The III-V compound semiconductor layer SL22 is located on the upper surface of the fifth III-V compound semiconductor layer SL2 closest to the second III-V compound semiconductor layer 24.

[0038] The fifth III-V compound semiconductor layer SL3 may include a plurality of III-V compound semiconductor layers SL31 and a plurality of III-V compound semiconductor layers SL32. The III-V compound semiconductor layers SL31 and the III-V compound semiconductor layers SL32 are alternately arranged in the first direction D1. The III-V compound semiconductor layer SL31 is located on the lower surface of the fifth III-V compound semiconductor layer SL3 closest to the light absorption layer 16. The III-V compound semiconductor layer SL32 is located on the upper surface of the fifth III-V compound semiconductor layer SL3 closest to the second III-V compound semiconductor layer 24.

[0039] The fifth III-V compound semiconductor layer SL4 may include a plurality of III-V compound semiconductor layers SL41 and a plurality of III-V compound semiconductor layers SL42. The III-V compound semiconductor layers SL41 and the III-V compound semiconductor layers SL42 are alternately arranged in the first direction D1. The III-V compound semiconductor layer SL41 is located on the lower surface of the fifth III-V compound semiconductor layer SL4 closest to the light absorption layer 16. The III-V compound semiconductor layer SL42 is located on the upper surface of the fifth III-V compound semiconductor layer SL4 closest to the second III-V compound semiconductor layer 24.

[0040] The fifth III-V compound semiconductor layer SL5 may include a plurality of III-V compound semiconductor layers SL51 and a plurality of III-V compound semiconductor layers SL52. The III-V compound semiconductor layers SL51 and the III-V compound semiconductor layers SL52 are alternately arranged in the first direction D1. The III-V compound semiconductor layer SL51 is located on the lower surface of the fifth III-V compound semiconductor layer SL5 closest to the light absorption layer 16. The III-V compound semiconductor layer SL52 is located on the upper surface of the fifth III-V compound semiconductor layer SL5 closest to the second III-V compound semiconductor layer 24.

[0041] The upper end of the valence band of each of the fifth III-V compound semiconductor layers SL1 to SL5 may have an energy between the upper end of the valence band of the light absorption layer 16 and the upper end of the valence band of the third III-V compound semiconductor layer 20. The energies of the upper ends of the valence bands of the fifth III-V compound semiconductor layers SL1 to SL5 may decrease in order in the first direction D1. The upper end of the valence band of the fifth III-V compound semiconductor layer SL1 may be lower than the upper end of the valence band of the fifth III-V compound semiconductor layer SL2. The upper end of the valence band of the fifth III-V compound semiconductor layer SL2 may be lower than the upper end of the valence band of the fifth III-V compound semiconductor layer SL3. The upper end of the valence band of the fifth III-V compound semiconductor layer SL3 may be lower than the upper end of the valence band of the fifth III-V compound semiconductor layer SL4. The energy of the upper end of the valence band of the fifth III-V compound semiconductor layer SL4 may be lower than the energy of the upper end of the valence band of the fifth III-V compound semiconductor layer SL5. The upper ends of the valence bands of the fifth III-V compound semiconductor layers SL1 to SL5 may decrease stepwise in the first direction D1.

[0042] The energy Ec of the bottom of the conduction band and the energy Ev of the top of the valence band of each of the III-V compound semiconductor layers SL1 to SL5 are determined by band calculation of each SL (superlattice).

[0043] The III-V compound semiconductor layers SL11, SL21, SL31, SL41, and SL51 (sixth III-V compound semiconductor layer) may contain the same III-V compound semiconductor material as the III-V compound semiconductor material contained in the third III-V compound semiconductor layer 20. Examples of the III-V compound semiconductor layers SL11, SL21, SL31, SL41, and SL51 include AlInAs, AlInAsSb, and AlGaAsSb, respectively. The thicknesses of the III-V compound semiconductor layers SL11, SL21, SL31, SL41, and SL51 may monotonically increase from the light absorption layer 16 toward the third III-V compound semiconductor layer 20.

[0044] An example of the III-V compound semiconductor included in the III-V compound semiconductor layers SL12, SL22, SL32, SL42, and SL52 includes GaAsSb. The thicknesses of the III-V compound semiconductor layers SL12, SL22, SL32, SL42, and SL52 may monotonically decrease from the light absorption layer 16 toward the third III-V compound semiconductor layer 20.

[0045] In the semiconductor light-receiving element 100, the third III-V compound semiconductor layer 20 has a large band gap energy. Therefore, the energy of the carrier capture level that can be formed in the third III-V compound semiconductor layer 20 becomes high (see FIG. 9). Therefore, carriers are less likely to be thermally excited to the carrier capture level. As a result, the tunneling current caused by the carrier capture level can be reduced, thereby reducing the dark current. The carrier capture level is located between the upper end of the valence band and the lower end of the conduction band. The carrier capture level can be formed by lattice defects formed on the sidewall of the mesa MS by etching.

[0046] When the fourth III-V compound semiconductor layer 22 has a thickness smaller than that of the third III-V compound semiconductor layer 20, the amount of holes accumulated in the light absorption layer 16 can be reduced.

[0047] When the semiconductor light receiving element 100 includes the step layer 18, holes in the light absorbing layer 16 can easily flow from the fifth III-V compound semiconductor layer SL1 to the third III-V compound semiconductor layer 20 via SL5, thereby reducing the amount of holes accumulated in the light absorbing layer 16.

[0048] Fig. 4 is a cross-sectional view schematically showing a semiconductor light receiving element according to another embodiment. The semiconductor light receiving element 100A shown in Fig. 4 may have the same configuration as the semiconductor light receiving element 100 shown in Fig. 1, except that it includes a third III-V compound semiconductor layer 120 instead of the third III-V compound semiconductor layer 20.

[0049] The third III-V compound semiconductor layer 120 includes a main body 120a and a protruding portion 120b on the main body 120a. The protruding portion 12b of the first III-V compound semiconductor layer 12, the III-V compound semiconductor layer 14, the light absorption layer 16, the step layer 18, and the main body 120a of the third III-V compound semiconductor layer 120 form a mesa MS1. The mesa MS1 is provided on the InP substrate 10. The protruding portion 120b of the third III-V compound semiconductor layer 120, the fourth III-V compound semiconductor layer 22, and the second III-V compound semiconductor layer 24 form a mesa MS2. The mesa M2 is provided on the mesa M1. In a direction perpendicular to the first direction D1, the mesa MS2 has a maximum dimension smaller than that of the mesa MS1. A step is formed between the mesas MS1 and MS2.

[0050] In the semiconductor photodetector 100A, the third III-V compound semiconductor layer 120 has a large bandgap energy. Therefore, the energy of the carrier capture level that can be formed in the third III-V compound semiconductor layer 120 is high. Therefore, carriers are less likely to be thermally excited to the carrier capture level. As a result, the tunneling current caused by the carrier capture level can be reduced, thereby reducing the dark current. Furthermore, in the semiconductor photodetector 100A, the distance from the central axis of the mesa MS1 extending along the first direction D1 to the sidewall of the mesa MS1 can be increased. The electrical characteristics of the semiconductor photodetector 100A mainly depend on the electric field applied near the central axis of the mesa MS1. Therefore, in the semiconductor photodetector 100A, the influence of lattice defects that can be formed on the sidewall of the mesa MS1 on the electrical characteristics of the semiconductor photodetector 100A can be reduced.

[0051] Various experiments conducted to evaluate the semiconductor light receiving elements 100 and 100 A will be described below, but the experiments described below do not limit the present invention.

[0052] (First experiment) The semiconductor light receiving element of the first experiment had the following configuration similar to the semiconductor light receiving element 100 except that it did not have the step layer 18. InP substrate 10: Fe-doped InP substrate, First III-V compound semiconductor layer 12: n-type GaInAs layer, III-V compound semiconductor layer 14: i-type GaInAs layer, Light absorption layer 16: Ga x In 1-x As (x=0.468) layer and GaAs y Sb 1-y Type II superlattice structure containing (y=0.513) layers, 237 periods, Third III-V compound semiconductor layer 20: i-type AlInAs layer, thickness 500 nm, The fourth III-V compound semiconductor layer 22: a p-type AlInAs layer having a thickness of 200 nm; Second III-V compound semiconductor layer 24: a p-type GaInAs layer.

[0053] (Second experiment) The semiconductor light-receiving element of the second experiment has the same configuration as the semiconductor light-receiving element of the first experiment, except for the step layer 18. FIG. 5 shows a structural example of a part of the semiconductor light-receiving element of the second experiment. The structural example shown in FIG. 5 corresponds to the light absorption layer 16, the step layer 18, the third III-V compound semiconductor layer 20, and the fourth III-V compound semiconductor layer 22. In FIG. 5, the energy Ec of the bottom of the conduction band and the energy Ev of the top of the valence band are 0.47 In 0.53 The calculation was performed with the Ev of As set to 0 eV. Figure 6 is a graph showing an example of the relationship between the layer number and the energy at the top of the valence band shown in Figure 5. Figures 7 and 8 show examples of part of the energy band diagrams of the light absorption layer and the step layer, respectively.

[0054] (Third experiment) The semiconductor photodetector of the third experiment has the same configuration as the semiconductor photodetector of the first experiment, except that it has an i-type GaInAs layer and a p-type GaInAs layer instead of the i-type AlInAs layer (third III-V compound semiconductor layer 20) and the p-type AlInAs layer (fourth III-V compound semiconductor layer 22), respectively.

[0055] (First experiment results) Energy band diagrams were created by simulation for the semiconductor photodetectors of Experiments 1 to 3. The temperature T used in the simulations was 300 Kelvin (K). The bias voltage Vb applied to the semiconductor photodetector was -1 V. The simulation results are shown in Figures 9 to 11.

[0056] 9 to 11 are graphs showing examples of energy band diagrams of the semiconductor light-receiving elements of the first to third experiments, respectively. In the graphs of FIGS. 9 to 11, the horizontal axis represents the position (μm) in the thickness direction of the light absorption layer 16 (the opposite direction to the first direction D1). The position of the top surface of the p-type GaInAs layer (second III-V compound semiconductor layer 24) is designated as 0. The vertical axis represents energy (eV). In the graphs, Ec represents the energy at the bottom of the conduction band, and Ev represents the energy at the top of the valence band.

[0057] As shown in Figure 9, in the first experiment, carrier trap levels indicated by dashed lines were formed in the i-type AlInAs layer and the p-type AlInAs layer. On the other hand, as shown in Figure 11, in the third experiment, carrier trap levels indicated by dashed lines were formed in the i-type GaInAs layer and the p-type GaInAs layer. As can be seen from Figures 9 and 11, the energy of the carrier trap levels in the first experiment is higher than that in the third experiment. Therefore, in the first experiment, carriers are less likely to be thermally excited to the carrier trap levels than in the third experiment. As a result, the tunneling current caused by the carrier trap levels can be reduced, and therefore the dark current can be reduced.

[0058] As shown in FIG. 9 , in the first experiment, the difference between the energy Ev of the upper end of the valence band of the i-type AlInAs layer and the energy Ev of the upper end of the valence band of the i-type AlInAs layer is relatively large between the light-absorbing layer 16 and the i-type AlInAs layer. As a result, holes in the valence band of the light-absorbing layer 16 are less likely to flow into the i-type AlInAs layer. This increases the amount of holes accumulated in the light-absorbing layer 16. On the other hand, as shown in FIG. 10 , in the second experiment, a step layer 18 is provided between the light-absorbing layer 16 and the i-type AlInAs layer. The energy Ev of the upper end of the valence band of the step layer 18 decreases stepwise from the light-absorbing layer 16 to the i-type AlInAs layer. As a result, holes in the valence band of the light-absorbing layer 16 are more likely to flow through the step layer 18 into the i-type AlInAs layer. This reduces the amount of holes accumulated in the light-absorbing layer 16.

[0059] (Second experiment results) The electron concentration and hole concentration were calculated by simulation for the semiconductor light-receiving elements of Experiments 1 and 2. The simulation results are shown in Figures 12 and 13.

[0060] 12 and 13 are graphs showing examples of the distribution of electron concentration and hole concentration in the semiconductor light-receiving elements of the first and second experiments, respectively. In the graphs of FIGS. 12 and 13, the horizontal axis indicates the same position (μm) as the horizontal axis of the graphs of FIGS. 9 to 11. The vertical axis indicates the electron concentration (cm -3 ) or Hall concentration (cm -3 ) is shown.

[0061] As shown in Figure 12, in the first experiment, the hole concentration peaked at 1 μm and was 1 × 10 17 cm -3 This indicates that the amount of holes accumulated near the boundary between the light absorption layer 16 and the i-type AlInAs layer is large. On the other hand, as shown in FIG. 13, in the second experiment, the hole concentration peaked at a position 1 μm away from the light absorption layer 16, reaching 3×10 14 cm -3 This indicates that the amount of holes accumulated near the boundary between the light absorption layer 16 and the i-type AlInAs layer is small. This shows that the step layer 18 can reduce the amount of holes accumulated in the light absorption layer 16.

[0062] Although the exemplary embodiments of the present invention have been described in detail above, the present invention is not limited to the above embodiments.

[0063] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above meaning, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0064] 10...InP substrate 12...First III-V compound semiconductor layer 12a...Main body 12b...Protrusion 14...III-V compound semiconductor layer 16...Light absorbing layer 18…Stairs layer 20...Third III-V group compound semiconductor layer 22...Fourth III-V compound semiconductor layer 24...Second III-V compound semiconductor layer 30...electrode 40...Electrode 50...insulating film 50a...Opening 50b…Opening 100...Semiconductor light receiving element 100A...Semiconductor photodetector 120...Third III-V group compound semiconductor layer 120a...Main body 120b…Protrusion D1…first direction L…Incoming light L1…Ga x In 1-x As layer L2...GaAs y Sb 1-y layer MS…Mesa MS1…Mesa MS2…Mesa SL1: 5th III-V compound semiconductor layer SL2: 5th III-V compound semiconductor layer SL3: 5th III-V compound semiconductor layer SL4: 5th III-V compound semiconductor layer SL5: 5th III-V compound semiconductor layer SL11: III-V compound semiconductor layer SL12: III-V compound semiconductor layer SL21: III-V compound semiconductor layer SL22: III-V compound semiconductor layer SL31: III-V compound semiconductor layer SL32…III-V group compound semiconductor layer SL41: III-V compound semiconductor layer SL42: III-V compound semiconductor layer SL51...III-V compound semiconductor layer SL52...III-V compound semiconductor layer

Claims

1. an indium phosphide substrate; a first conductivity type III-V compound semiconductor layer; a second III-V compound semiconductor layer of a second conductivity type; a light absorbing layer including a III-V compound semiconductor, the light absorbing layer being provided between the first III-V compound semiconductor layer and the second III-V compound semiconductor layer; a non-doped third III-V compound semiconductor layer provided between the light absorption layer and the second III-V compound semiconductor layer; Equipped with the first III-V compound semiconductor layer is provided between the indium phosphide substrate and the light absorption layer; the third III-V compound semiconductor layer has a band gap energy greater than the maximum value of the band gap energy of the III-V compound semiconductor contained in the light absorption layer;

2. 2. The semiconductor light-receiving element according to claim 1, further comprising a fourth III-V compound semiconductor layer of a second conductivity type provided between said third III-V compound semiconductor layer and said second III-V compound semiconductor layer.

3. 3. The semiconductor light-receiving element according to claim 2, wherein said fourth III-V compound semiconductor layer has a thickness smaller than a thickness of said third III-V compound semiconductor layer.

4. 4. The semiconductor light-receiving element according to claim 1, wherein the third III-V compound semiconductor layer includes a ternary III-V compound semiconductor containing aluminum.

5. 4. The semiconductor light-receiving element according to claim 1, wherein the third III-V compound semiconductor layer has a thickness of 300 nm or more.

6. the light absorbing layer and the third III-V compound semiconductor layer are disposed between the light absorbing layer and the third III-V compound semiconductor layer; 4. The semiconductor light-receiving element according to claim 1, wherein an upper edge of a valence band of the at least one fifth III-V compound semiconductor layer has an energy between an upper edge of a valence band of the light absorption layer and an upper edge of a valence band of the third III-V compound semiconductor layer.

7. 7. The semiconductor light-receiving element according to claim 6, wherein said at least one undoped Group V III-V compound semiconductor layer has a quantum well structure.

8. the at least one undoped Group 5 III-V compound semiconductor layer includes a plurality of undoped Group 5 III-V compound semiconductor layers; each of the plurality of undoped fifth III-V group compound semiconductor layers includes a sixth III-V group compound semiconductor layer containing the same III-V group compound semiconductor material as the third III-V group compound semiconductor layer; 7. The semiconductor light-receiving element according to claim 6, wherein the thickness of said sixth III-V compound semiconductor layer monotonically increases from said light absorption layer toward said third III-V compound semiconductor layer.