Method for manufacturing semiconductor element including plasma etching process

Abstract

To provide a method for manufacturing a semiconductor element including a plasma etching process.SOLUTION: A method for manufacturing a semiconductor device includes the steps of: forming an inorganic layer on a support layer; forming an organic mask pattern on the inorganic layer; and performing plasma etching of the inorganic layer using the organic mask pattern as an etching mask with a large etching selection ratio to form a space pattern exposing the support layer in the inorganic pattern and between the inorganic patterns. The plasma etching of the inorganic layer is performed using a mixture gas including a main etching gas having a C2H2F4 gas and an auxiliary etching gas having an O2 gas or an oxygen-containing gas, and a ratio of the main etching gas to the auxiliary etching gas is 1 to 5.SELECTED DRAWING: Figure 1A

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device including a plasma etching process. [Background technology]

[0002] As semiconductor devices become more highly integrated, the critical dimension (CD) of patterns formed on semiconductor substrates becomes smaller. This makes the process of forming fine patterns on semiconductor substrates important. Plasma etching processes can be used to form fine patterns on semiconductor substrates.

[0003] In plasma etching, fine patterns can only be reliably formed by using an etching gas with a high etching selectivity. In addition, the global warming potential of the etching gas must be low in order to have an impact on the global environment. Summary of the Invention [Problem to be solved by the invention]

[0004] SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device, in which a plasma etching process is performed using an etching gas having a high etching selectivity and a low global warming potential. [Means for solving the problem]

[0005] In order to achieve the above object, a method for manufacturing a semiconductor device according to an embodiment of the present invention includes the steps of: forming an inorganic layer on a support layer; forming an organic mask pattern on the inorganic layer; and plasma etching the inorganic layer with a high etching selectivity using the organic mask pattern as an etching mask to form inorganic patterns and space patterns exposing the support layer between the inorganic patterns. The plasma etching of the inorganic layer is performed using a mixed gas including a main etching gas having C2H2F4 gas and an auxiliary etching gas having O2 gas or an oxygen-containing gas, and the ratio of the main etching gas to the auxiliary etching gas is 1 to 5.

[0006] A method for manufacturing a semiconductor device according to an embodiment of the present invention includes the steps of: forming a first organic layer on a support layer; patterning the first organic layer to form a first organic pattern; forming an inorganic layer on the support layer to cover the first organic pattern; etching back the inorganic layer to form inorganic patterns on both sidewalls of the first organic pattern; forming a second organic layer to cover the first organic pattern and the inorganic pattern and fill a space between the inorganic patterns; etching back the second organic layer to form a second organic pattern between the inorganic patterns; and selectively removing the inorganic pattern by plasma etching with a higher etch selectivity for the inorganic pattern than for the first and second organic patterns to form a space pattern between the first and second organic patterns. The plasma etching of the inorganic pattern is performed using a mixed gas including a main etching gas containing C2H2F4 gas and an auxiliary etching gas containing O2 gas or an oxygen-containing gas, and the ratio of the main etching gas to the auxiliary etching gas is between 1 and 5.

[0007] A method for manufacturing a semiconductor device according to one embodiment of the present invention includes the steps of: forming a first organic layer on a support layer; patterning the first organic layer to form a first organic pattern; forming an inorganic layer on the support layer to cover the first organic pattern; forming a second organic layer on the support layer to cover the first organic pattern and the inorganic layer and fill spaces between the first organic patterns; sequentially etching back the second organic layer and the inorganic layer to form inorganic patterns and second organic patterns, wherein the second organic pattern is formed between the inorganic patterns and the inorganic pattern is formed between the first organic pattern and the second organic pattern; and performing plasma etching with a high etching selectivity of the inorganic pattern relative to the first organic pattern and the second organic pattern to selectively remove the inorganic pattern located between the first organic pattern and the second organic pattern, thereby forming a space pattern between the first organic pattern and the second organic pattern. The plasma etching of the inorganic pattern is performed using a mixed gas including a main etching gas having C2H2F4 gas and an auxiliary etching gas having O2 gas or an oxygen-containing gas, and the ratio of the main etching gas to the auxiliary etching gas is 1 to 5. [Effects of the Invention]

[0008] The method for manufacturing a semiconductor device according to the present invention can easily form fine patterns by performing a plasma etching process using an etching gas having a high etching selectivity between etched films and a low global warming potential, and can easily control the critical dimensions of line and space patterns. [Brief explanation of the drawings]

[0009] [Figure 1A] 1 is a cross-sectional view schematically showing an example of a plasma etching apparatus used in a method for manufacturing a semiconductor device including a plasma etching step according to the present invention. [Figure 1B]1 is a cross-sectional view schematically showing an example of a plasma etching apparatus used in a method for manufacturing a semiconductor device including a plasma etching step according to the present invention. [Figure 2] 1 is a plan view illustrating a semiconductor device according to an embodiment of the present invention; [Figure 3] 3 is a cross-sectional view illustrating a method for manufacturing a semiconductor device including a fine patterning process taken along line AA' of FIG. 2. FIG. [Figure 4] 3 is a cross-sectional view illustrating a method for manufacturing a semiconductor device including a fine patterning process taken along line AA' of FIG. 2. FIG. [Figure 5] 5 is a diagram for explaining an etching gas used in the plasma etching process of FIG. 4. [Figure 6] 1 is a plan view illustrating a semiconductor device according to an embodiment of the present invention; [Figure 7] 7 is a cross-sectional view illustrating a method for manufacturing a semiconductor device including a fine patterning process taken along line BB' of FIG. 6. FIG. [Figure 8] 7 is a cross-sectional view illustrating a method for manufacturing a semiconductor device including a fine patterning process taken along line BB' of FIG. 6. FIG. [Figure 9] 1 is a plan view illustrating a semiconductor device according to an embodiment of the present invention; [Figure 10] 10 is a cross-sectional view illustrating a method for manufacturing a semiconductor device including a fine patterning process taken along line CC' of FIG. 9. FIG. [Figure 11] 10 is a cross-sectional view illustrating a method for manufacturing a semiconductor device including a fine patterning process taken along line CC' of FIG. 9. FIG. [Figure 12] 4 is a graph showing an etching selectivity depending on an etching gas during a plasma etching process of an inorganic layer made of a silicon oxide layer in a method for manufacturing a semiconductor device according to the present invention. [Figure 13] 4 is a graph showing an etching selectivity depending on an etching gas during a plasma etching process of an inorganic layer made of a silicon oxide layer in a method for manufacturing a semiconductor device according to the present invention. [Figure 14]4 is a graph showing an etching selectivity depending on an etching gas during a plasma etching process of an inorganic layer made of a silicon nitride layer or a silicon oxynitride layer in a method for manufacturing a semiconductor device according to the present invention. [Figure 15] 4 is a graph showing an etching selectivity depending on an etching gas during a plasma etching process of an inorganic layer made of a silicon nitride layer or a silicon oxynitride layer in a method for manufacturing a semiconductor device according to the present invention. [Figure 16] 3 is a graph showing an etching rate of an inorganic layer, such as a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer, depending on an etching gas during a plasma etching process in a method for manufacturing a semiconductor device according to the present invention. [Figure 17] 1 is a plan view illustrating a semiconductor device according to an embodiment of the present invention; [Figure 18] FIG. 18 is a cross-sectional view taken along the line DD' in FIG. [Figure 19] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 20] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 21] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 22] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 23] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 24] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 25] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 26] 1 is a plan view illustrating a semiconductor device according to an embodiment of the present invention; [Figure 27]FIG. 27 is a cross-sectional view taken along line EE' in FIG. 26. [Figure 28] 1 is a plan view illustrating a semiconductor device according to an embodiment of the present invention; [Figure 29] FIG. 29 is a cross-sectional view taken along the line FF' in FIG. 28. [Figure 30] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 31] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 32] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments of the present invention may be implemented by any one of them alone, or by a combination of two or more of them. Therefore, the technical concept of the present invention should not be interpreted as being limited to one embodiment.

[0011] In this specification, the singular form of an element may include the plural form unless the context clearly dictates otherwise. In this specification, the drawings are exaggerated to more clearly explain the present invention. The same reference numerals are used for the same elements in the drawings, and redundant descriptions thereof will be omitted.

[0012] FIG. 1A is a cross-sectional view schematically showing an example of a plasma etching apparatus used in a method for manufacturing a semiconductor device including a plasma etching step according to the present invention.

[0013] Specifically, an inductively coupled plasma (ICP) etching apparatus is presented as an example of the plasma etching apparatus PTA. The plasma etching apparatus PTA includes a process chamber 10 having a gas inlet 16 and a gas outlet 18.

[0014] The process chamber 10 may have an internal space 6. The internal space 6 also serves as a processing chamber for plasma etching. The process chamber 10 may be grounded. A process gas, for example, an etching gas, may be introduced into the process chamber 10 through a gas inlet 16 and may be discharged to the outside through a gas outlet 18. The process chamber 10 may be maintained at a high vacuum to prevent process defects that may occur due to contaminants such as particles during plasma etching.

[0015] A radio-frequency electrode unit 26 and an electrostatic chuck 14 may be provided within the process chamber 10. The radio-frequency electrode unit 26 and the electrostatic chuck 14 may be used as a first electrode and a second electrode, respectively, and may be provided facing each other. The radio-frequency electrode unit 26 may be provided on the dielectric window 20 above the process chamber 10. The radio-frequency electrode unit 26 may be composed of radio-frequency antennas 22 and 24.

[0016] The high frequency antennas 22, 24 may be configured as an internal antenna 22 corresponding to the center of the substrate 12 and an external antenna 24 located outside the internal antenna 22 and corresponding to a corner of the substrate 12. A high frequency power source 30 that applies high frequency power, i.e., power at an RF (Radio Frequency) frequency, is connected to the high frequency electrode portion 26 via an impedance matching device 28.

[0017] The RF power applied via the RF power supply 30 may be power having a frequency of 27 MHz or higher. For example, the RF power applied via the RF power supply 30 may be power having a frequency of 60 MHz. When the RF antennas 22, 24 are configured as an internal antenna 22 and an external antenna 24, the magnetic field can be controlled more precisely to make the plasma density on the substrate 12 uniform.

[0018] A substrate 12, for example, a wafer, can be mounted on the electrostatic chuck 14. The wafer can be as large as 300 mm in diameter. The wafer can be a silicon wafer. A bias power supply 34 that applies high-frequency power can be connected to the electrostatic chuck 14 via an impedance matching box 32.

[0019] The high frequency power applied via the bias power supply 34 may be power having a frequency of 100 KHz to 10 MHz. For example, the high frequency power applied via the bias power supply 34 may be power having a frequency of 2 MHz. The impedance matching devices 28 and 32 may not be provided, if necessary.

[0020] The process gas, i.e., the etching gas, injected into the process chamber 10 can be turned into plasma by the plasma applicator 40. The plasma applicator 40 can include a high frequency power supply 30 electrically connected to a high frequency electrode portion 26.

[0021] When power is applied to the high frequency electrode 26 via the high frequency power supply 30, the process gas injected into the process chamber 10 can be converted into plasma. When high frequency or low frequency power is applied to the electrostatic chuck 14 via the bias power supply 34, the plasma generated in the process chamber 10 can be more effectively guided toward the substrate 12.

[0022] FIG. 1B is a cross-sectional view schematically showing an example of a plasma etching apparatus used in the method for manufacturing a semiconductor device including a plasma etching step according to the present invention.

[0023] Specifically, a capacitively coupled plasma (CCP) etching apparatus is presented as an example of the plasma etching apparatus PTA-1. The plasma etching apparatus PTA-1 may be the same as the plasma etching apparatus PTA shown in FIG. 1 except that it has a high-frequency electrode unit 26-1 made up of a flat electrode and the electrostatic chuck 14 is grounded. In FIG. 1B, the same reference numerals as in FIG. 1A indicate the same components.

[0024] The plasma etching apparatus PTA-1 includes a process chamber 10 provided with a gas inlet 16 and a gas outlet 18. The process chamber 10 may have an internal space 6. The internal space 6 also serves as a processing chamber for plasma etching.

[0025] A high frequency electrode unit 26-1 and an electrostatic chuck 14 can be provided in the process chamber 10. The plasma etching apparatus PTA-1 uses a flat electrode as the high frequency electrode unit 26-1.

[0026] The process gas, i.e., the etching gas, injected into the process chamber 10 can be converted into plasma by the plasma applicator 40. The plasma applicator 40 can include a high-frequency power supply 30 electrically connected to the high-frequency electrode unit 26-1. When power is applied to the high-frequency electrode unit 26-1 via the high-frequency power supply 30, the process gas injected into the process chamber 10 can be converted into plasma.

[0027] FIG. 2 is a plan view showing a semiconductor device according to an embodiment of the inventive concept.

[0028] Specifically, the semiconductor element EM1 may include an inorganic pattern 44a and a space pattern 48 disposed on a support layer (42 in FIGS. 3 and 4). The inorganic pattern 44a and the space pattern 48 may be formed by a method for manufacturing a semiconductor element, including a plasma etching process, as described below. The method for manufacturing a semiconductor element may include a fine patterning process.

[0029] The inorganic pattern 44a may be a plurality of patterns spaced apart from one another in a first direction (X direction) on the support layer (42 in FIGS. 3 and 4). In some embodiments, the inorganic pattern 44a may include a single layer of silicon oxide. In some embodiments, the inorganic pattern 44a may include a single layer of silicon nitride (SiN) or silicon oxynitride (SiON).

[0030] The inorganic pattern 44a may have a first critical dimension (CD1) in a first direction (X-direction). In some embodiments, the first critical dimension CD1 may be several nanometers to several tens of nanometers. In some embodiments, the first critical dimension CD1 may be 20 nm or less. In some embodiments, the first critical dimension CD1 may be 2 nm to 20 nm.

[0031] The inorganic pattern 44a may be a pattern extending in a second direction (Y direction) perpendicular to the first direction (X direction) in a plan view. For convenience, only three inorganic patterns 44a are shown in the first direction (X direction) in FIG. 2, but more inorganic patterns may be arranged. The inorganic pattern 44a may be a linear pattern LP1 in a plan view.

[0032] The space patterns 48 may be disposed between the inorganic patterns 44a. The space patterns 48 may be a plurality of patterns spaced apart from each other in a first direction (X direction) on the support layer (42 in FIGS. 3 and 4). The space patterns 48 may have a second critical dimension (CD2) in the first direction (X direction).

[0033] In some embodiments, the second critical dimension CD2 may be several nanometers to several tens of nanometers. In some embodiments, the second critical dimension CD2 may be 20 nm or less. In some embodiments, the second critical dimension CD2 may be 2 nm to 20 nm.

[0034] The space pattern 48 may be a pattern extending in a second direction (Y direction) perpendicular to the first direction (X direction) in a plan view. The space pattern 48 may be a line-type space pattern SP1 in a plan view.

[0035] In some embodiments, the first critical dimension CD1 of the inorganic pattern 44a and the second critical dimension CD2 of the space pattern 48 may be the same. In some embodiments, the first critical dimension CD1 of the inorganic pattern 44a and the second critical dimension CD2 of the space pattern 48 may be different.

[0036] 3 and 4 are cross-sectional views illustrating a method for manufacturing a semiconductor device including a fine patterning process along line A-A' in FIG. 2, and FIG. 5 is a diagram illustrating an etching gas used in the plasma etching process of FIG. 4.

[0037] 3, a method for manufacturing a semiconductor device EM1 includes forming an inorganic layer 44 on a support layer 42. The support layer 42 may be a substrate. The support layer 42 may correspond to the substrate 12 in FIGS. 1A and 1B. The substrate may include a semiconductor such as Si or Ge, or a compound semiconductor such as SiGe, SiC, GaAs, InAs, or InP. In some embodiments, the substrate may be made of at least one of a III-V material and a IV material.

[0038] The III-V material may be a compound containing at least one of In, Ga, and Al as a group III element and at least one of As, P, and Sb as a group V element. The group IV material may be Si or Ge. In some embodiments, the substrate may have a silicon-on-insulator (SOI) structure.

[0039] In some embodiments, inorganic layer 44 may comprise a single layer of silicon oxide. In some embodiments, inorganic layer 44 may comprise a single layer of silicon nitride (SiN) or silicon oxynitride (SiON). In some embodiments, inorganic layer 44 is formed to a thickness of T1. In some embodiments, T1 may be tens to hundreds of microns.

[0040] An organic mask pattern 46 is formed on the inorganic layer 44. The organic mask pattern 46 may be formed using a photoetching process after forming an organic layer on the inorganic layer 44. The organic mask pattern 46 is formed to a thickness of T2. In some embodiments, T2 may be several nm to several hundred nm, or several μm to several hundred μm.

[0041] In some embodiments, the organic mask pattern 46 may be made of a spin-on hard mask (SOH) material. The SOH material may refer to a material made of a hydrocarbon compound or its derivatives having a relatively high carbon content of about 85 to 99 wt % based on the total weight.

[0042] In some embodiments, the organic mask patterns 46 may be made of an Amorphous Carbon Layer (ACL) material or a photoresist material. ACL materials and photoresist materials also contain a large amount of carbon and may have properties similar to those of SOH materials. The organic mask patterns 46 may have a first critical dimension CD1 in a first direction (X direction). Spaces between the organic mask patterns 46 may have a second critical dimension CD2.

[0043] 4, the inorganic layer (44 in FIG. 3) is plasma-etched using the organic mask pattern 46 as an etching mask to form an inorganic pattern 44a and a space pattern 48. The inorganic pattern 44a is also a pattern extending perpendicularly in a third direction (Z direction) perpendicular to the first direction (X direction) on the support layer 42. The inorganic pattern 44a may have a first critical dimension (CD1) in the first direction (X direction). The inorganic pattern 44a may be a line-shaped pattern LP1 in a plan view on the support layer 42.

[0044] The space pattern 48 may be formed between the inorganic patterns 44a in the first direction (X direction) and expose the support layer 42. The space pattern 48 may be a line-type space pattern SP1 in a plan view on the support layer 42. The space pattern 48 may have a second critical dimension (CD2) in the first direction (X direction).

[0045] The inorganic pattern 44a and the space pattern 48 can be formed by plasma etching the inorganic layer (44 in FIG. 3) using the plasma etching apparatus of FIG. 1A or 1B.

[0046] During plasma etching, in order to increase the etching selectivity of the inorganic layer (44 in FIG. 3) relative to the organic mask pattern 46 and to reduce global warming potential, a mixed gas of C2H2F4 gas as the main etching gas and O2 gas or an oxygen-containing gas as the auxiliary etching gas is used. In some embodiments, the oxygen-containing gas may include at least one of CO2, CO, COF2, SO2, HO, NO, NO2, and NO. The oxygen-containing gas is not limited to the molecular structures of the gases previously listed, as long as it contains oxygen and can generate oxygen plasma. In some embodiments, plasma etching may be performed using a main etching gas further including CF4 gas, C4F8 gas, and Ar gas.

[0047] When C2H2F4 gas is decomposed by plasma, CF x , CHF x The plasma decomposition species (or plasma dissociation species) such as SiF are mainly generated in the silicon oxide layer, which is the inorganic layer (44 in FIG. 3). x The plasma decomposition species can etch the inorganic layer by generating volatile substances such as SiF and CO2 in the inorganic layer (44 in FIG. 3) such as silicon nitride (SiN) or silicon oxynitride (SiON). x Volatile substances such as NH3, HCN, etc. may be generated to etch the inorganic layer (44 in FIG. 3).

[0048] Here, the etching characteristics of C2H2F4 gas used as the main etching gas in the plasma etching process of the present invention will be described in detail with reference to Figure 5. To explain the etching characteristics of C2H2F4 gas, the etching characteristics of CHF3 gas will also be described as a comparative example.

[0049] First, the CHF gas of the comparative example is bonded in a form such as F-CF-H. The bond energy between CF and F is 125.7 kcal / mol, and the bond energy between CF and H is 101.7 kcal / mol. On the other hand, the C2H2F4 gas is bonded in a form such as CH3-CH2F. The bond energy between CH3 and CH2F is 93.5 kcal / mol.

[0050] From this perspective, C2H2F4 gas has a lower bond energy than CHF3 gas, i.e., the bond energy of atoms and molecules constituting C2H2F4 gas is lower than the bond energy of atoms and molecules constituting CHF3 gas.

[0051] Therefore, C2H2F4 gas can be easily converted into plasma compared to CHF3 gas, and is advantageous for etching the inorganic layer (44 in FIG. 3). That is, C2H2F4 gas can generate a higher concentration of plasma etching species compared to CHF3 gas, further increasing the etching reaction rate, and can effectively etch the inorganic layer (44 in FIG. 3).

[0052] As a result, when C2H2F4 gas is used as an etching gas during plasma etching, the etching selectivity, which is defined as the ratio of the thickness T1 of the inorganic pattern 44a to the thickness T2 of the organic mask pattern 46, can be increased.

[0053] Second, as mentioned above, CHF3 gas does not decompose well in the air due to its high binding energy and remains in the atmosphere for a long time, which can result in a high global warming potential of 11,700. Global warming potential is an index that estimates the magnitude of the warming effect relative to CO2 by standardizing the global warming effect per CO2 molecule as 1. CHF3 gas has a global warming potential of 11,700, making it a substance with a fairly high greenhouse effect.

[0054] On the other hand, C2H2F4 gas decomposes easily in the air due to its low binding energy, as mentioned above, and has a low global warming potential of about 1300. As a result, C2H2F4 gas has less impact on global warming than CHF3 gas.

[0055] Third, when CHF3 gas and C2H2F4 gas are plasmatized, CF3, which is an etching species for the silicon oxide layer constituting the inorganic layer 44, + , CF2 + , CF + is generated, and CHF2, which is an etching species for the silicon nitride layer (SiN) or silicon oxynitride layer (SiON) that constitutes the inorganic layer 44, is generated. + , CHF + may occur.

[0056] When C2H2F4 gas is plasmatized, the etching species of the silicon oxide layer constituting the inorganic layer 44, CF3 + , CF2 + , CF + and CHF2, which is an etching species for the silicon nitride layer (SiN) or silicon oxynitride layer (SiON) that constitutes the inorganic layer 44. + , CHF + This can increase the etching rate of the silicon oxide layer, silicon nitride layer (SiN), or silicon oxynitride layer (SiON) that constitutes the inorganic layer (44 in FIG. 3) with C2H2F4 gas compared to CHF3 gas.

[0057] As a result, when C2H2F4 gas is used as an etching gas during plasma etching, the etching selectivity, which is defined as the ratio of the thickness T1 of the inorganic pattern 44a to the thickness T2 of the organic mask pattern 46, can be increased.

[0058] Fourth, when the C2H2F4 gas is plasmatized, CH2F, a mask protecting species that protects the organic mask pattern 46, is generated. + , CH2 + In some embodiments, CHF may be used as a masking protecting species. + , CH2 + In addition to CH + may occur.

[0059] Thus, during plasma etching of the inorganic layer (44 in FIG. 3), a mask protection layer may be further formed on the organic mask pattern 46. As a result, when C2H2F4 gas is used as an etching gas during plasma etching, the etching selectivity, which is defined as the ratio of the thickness T1 of the inorganic pattern 44a to the thickness T2 of the organic mask pattern 46, may be increased.

[0060] As mentioned above, the advantages of using C2H2F4 gas as the main etching gas during plasma etching of the inorganic layer (44 in FIG. 3) have been explained. Also, the advantages of using O2 gas as the auxiliary etching gas during plasma etching of the inorganic layer (44 in FIG. 3) will be described later.

[0061] FIG. 6 is a plan view illustrating a semiconductor device according to an embodiment of the inventive concept.

[0062] Specifically, the semiconductor device EM2 may be the same as the semiconductor device EM1 of Fig. 2, except that the inorganic pattern 45 is composed of a double layer of a first inorganic pattern and a second inorganic pattern. In Fig. 6, the details described in Fig. 2 will be briefly explained or omitted.

[0063] The semiconductor element EM2 may include an inorganic pattern 45 and a space pattern 48 disposed on a support layer (42 in FIGS. 7 and 8). The inorganic pattern 45 and the space pattern 48 may be formed by a semiconductor element manufacturing method including a plasma etching process, as described below. The semiconductor element manufacturing method may include a fine patterning process.

[0064] The inorganic pattern 45 may be a plurality of patterns spaced apart from one another in a first direction (X direction) on a support layer (42 in FIGS. 7 and 8). In some embodiments, the inorganic pattern 45 may include a double layer of a first inorganic pattern made of a silicon nitride (SiN) or silicon oxynitride (SiON) layer and a second inorganic pattern made of a silicon oxide layer. The inorganic pattern 45 may have a first critical dimension (CD1) in the first direction (X direction).

[0065] The inorganic pattern 45 may be a pattern extending in a second direction (Y direction) perpendicular to the first direction (X direction) in a plan view. The inorganic pattern 45 may be a linear pattern LP1-1 in a plan view.

[0066] The space patterns 48 may be disposed between the inorganic patterns 45. The space patterns 48 may be a plurality of patterns spaced apart from each other in a first direction (X direction) on the support layer (42 in FIGS. 7 and 8). The space patterns 48 may have a second critical dimension (CD2) in the first direction (X direction).

[0067] The space pattern 48 may be a pattern extending in a second direction (Y direction) perpendicular to the first direction (X direction) in a plan view. The space pattern 48 may be a line-type space pattern SP1-1 in a plan view.

[0068] 7 and 8 are cross-sectional views illustrating a method for manufacturing a semiconductor device including a fine patterning process taken along line BB' of FIG.

[0069] Specifically, the manufacturing method of the semiconductor device EM2 may be the same as the manufacturing method of the semiconductor device EM1 shown in Figures 3 to 5, except that the inorganic pattern 45 is formed of a double layer of a first inorganic pattern 43a and a second inorganic pattern 44a. In Figures 7 and 8, the details described in Figures 3 and 4 will be briefly explained or omitted.

[0070] 7, the method for manufacturing a semiconductor device EM2 includes forming a first inorganic layer 43 on a support layer 42. The support layer 42 may be a substrate. In some embodiments, the first inorganic layer 43 is formed of a silicon nitride layer (SiN) or a silicon oxynitride layer (SiON). In some embodiments, the first inorganic layer 43 is formed to a thickness of T3. In some embodiments, T3 may be several nanometers to several hundred nanometers, or several micrometers to several hundred micrometers.

[0071] A second inorganic layer 44 is formed on the first inorganic layer 43. In some embodiments, the second inorganic layer 44 is made of a silicon oxide layer. In some embodiments, the second inorganic layer 44 is formed to a thickness of T1. The first inorganic layer 43 and the second inorganic layer 44 may have a total thickness of T4. In some embodiments, T4 may be a thickness of several nm to several hundred nm, or several μm to several hundred μm.

[0072] An organic mask pattern 46 is formed on the second inorganic layer 44. The organic mask pattern 46 may be formed using a photoetching process after forming an organic layer on the second inorganic layer 44. The organic mask pattern 46 is formed to a thickness of T2.

[0073] In some embodiments, the organic mask pattern 46 may be made of a spin-on hard mask (SOH) material. In some embodiments, the organic mask pattern 46 may be made of an amorphous carbon layer (ACL) material or a photoresist material. The ACL material and the photoresist material also contain a large amount of carbon and may have properties similar to those of the SOH material.

[0074] The organic mask patterns 46 may have a first critical dimension CD1 in a first direction (X direction), and the spaces between the organic mask patterns 46 may have a second critical dimension CD2.

[0075] 8, the second inorganic layer (44 in FIG. 7) and the first inorganic layer (43 in FIG. 7) are plasma-etched using the organic mask pattern 46 as an etching mask to form an inorganic pattern 45 and a space pattern 48. The inorganic pattern 45 may include a first inorganic pattern 43a and a second inorganic pattern 44a. The first inorganic pattern 43a is a silicon nitride pattern, and the second inorganic pattern 44a is a silicon oxide pattern.

[0076] The inorganic pattern 45 is also a pattern that extends vertically in a third direction (Z direction) perpendicular to the first direction (X direction) on the support layer 42. The inorganic pattern 45 may have a first critical dimension (CD1) in the first direction (X direction). The inorganic pattern 45 may be a line-shaped pattern LP1-1 on the support layer 42 in a plan view.

[0077] The space pattern 48 may be formed between the inorganic patterns 45 in the first direction (X direction) and expose the support layer 42. The space pattern 48 may be a line-type space pattern SP1-1 in a plan view on the support layer 42. The space pattern 48 may have a second critical dimension (CD2) in the first direction (X direction).

[0078] The inorganic pattern 45 and the space pattern 48 may be formed by plasma etching the second inorganic layer (44 in FIG. 7) and the first inorganic layer (43 in FIG. 7) using the plasma etching apparatus of FIG. 1A or 1B. During the plasma etching, an etching gas is used to increase the etching selectivity of the second inorganic layer (44 in FIG. 7) and the first inorganic layer (43 in FIG. 7) relative to the organic mask pattern 46 and to reduce the global warming potential.

[0079] The etching gas is a mixed gas containing C2H2F4 gas as the main etching gas and O2 gas or an oxygen-containing gas as the auxiliary etching gas. In some embodiments, the oxygen-containing gas may include at least one of CO2, CO, COF2, SO2, H2O, NO, NO2, and N2O. The oxygen-containing gas is not limited to the molecular structure of the gases listed above as long as it contains oxygen and generates oxygen plasma. In some embodiments, plasma etching may be performed by further including CF4 gas, C4F8 gas, and Ar gas in the main etching gas.

[0080] The advantages of using C2H2F4 gas as the main etching gas have been explained in FIG. 5, so the explanation will be omitted here.

[0081] Additionally, when the C2H2F4 gas is plasmatized, CF3, which is an etching species for the silicon oxide layer constituting the second inorganic layer (44 in FIG. 7), is generated. + , CF2 + , CF + The ratio of CHF2, which is an etching species for the silicon nitride layer (SiN) or silicon oxynitride layer (SiON) that constitutes the first inorganic layer (43 in FIG. 7), is + , CHF + The incidence rate may be higher than

[0082] This configuration can make the etching rates of the second inorganic layer (44 in FIG. 7) made of a silicon oxide layer and the first inorganic layer (43 in FIG. 7) made of a silicon nitride (SiN) or silicon oxynitride (SiON) layer uniform. As a result, when using C2H2F4 gas as an etching gas during plasma etching, the etching selectivity, defined as the ratio of the thickness T4 of the inorganic pattern 45 to the thickness T2 of the organic mask pattern 46, can be increased.

[0083] The advantages of using O2 gas as an auxiliary etching gas during plasma etching of the second inorganic layer (44 in FIG. 7) and the first inorganic layer (43 in FIG. 7) will be described later.

[0084] FIG. 9 is a plan view illustrating a semiconductor device according to an embodiment of the inventive concept.

[0085] Specifically, when compared with the semiconductor device EM1 of Figure 2, the semiconductor device EM3 may be the same except that the inorganic pattern 49 is composed of a triple layer of a first inorganic pattern 43a, a second inorganic pattern 44a, and a third inorganic pattern 47a. In Figure 9, the contents described in Figure 2 will be briefly explained or omitted.

[0086] The semiconductor element EM3 may include an inorganic pattern 49 and a space pattern 48 disposed on a support layer (42 in FIGS. 10 and 11). The inorganic pattern 49 and the space pattern 48 may be formed by a semiconductor element manufacturing method including a plasma etching process, as described below. The semiconductor element manufacturing method may include a fine patterning process.

[0087] The inorganic pattern 49 may be a plurality of patterns spaced apart from one another in a first direction (X direction) on a support layer (42 in FIGS. 10 and 11). In some embodiments, the inorganic pattern 49 may include a triple layer including a first inorganic pattern made of a silicon nitride (SiN) or silicon oxynitride (SiON) layer, a second inorganic pattern made of a silicon oxide layer, and a third inorganic pattern made of a silicon oxide layer. The inorganic pattern 49 may have a first critical dimension (CD1) in the first direction (X direction).

[0088] The inorganic pattern 49 may be a pattern extending in a second direction (Y direction) perpendicular to the first direction (X direction) in a plan view. The inorganic pattern 49 may be a linear pattern LP1-1 in a plan view.

[0089] The space patterns 48 may be disposed between the inorganic patterns 49. The space patterns 48 may be a plurality of patterns spaced apart from each other in a first direction (X direction) on the support layer (42 in FIGS. 10 and 11). The space patterns 48 may have a second critical dimension (CD2) in the first direction (X direction).

[0090] The space pattern 48 may be a pattern extending in a second direction (Y direction) perpendicular to the first direction (X direction) in a plan view. The space pattern 48 may be a line-type space pattern SP1-1 in a plan view.

[0091] 10 and 11 are cross-sectional views illustrating a method for manufacturing a semiconductor device including a fine patterning process taken along line CC' of FIG.

[0092] Specifically, the method for manufacturing the semiconductor device EM3 may be the same as the method for manufacturing the semiconductor device EM1 shown in Figures 3 to 5, except that the inorganic pattern 49 is a triple layer of the first inorganic pattern 43a, the second inorganic pattern 44a, and the third inorganic pattern 47a. In Figures 10 and 11, the details described in Figures 3 and 4 will be briefly explained or omitted.

[0093] 10, the method for manufacturing a semiconductor device EM3 includes forming a first inorganic layer 43 on a support layer 42. The support layer 42 may be a substrate. In some embodiments, the first inorganic layer 43 is formed of a silicon nitride layer (SiN) or a silicon oxynitride layer (SiON). In some embodiments, the first inorganic layer 43 is formed to a thickness of T3. In some embodiments, T3 may be several nanometers to several hundred nanometers, or several micrometers to several hundred micrometers.

[0094] A second inorganic layer 44-1 is formed on the first inorganic layer 43. In some embodiments, the second inorganic layer 44-1 is a silicon oxide layer. In some embodiments, the second inorganic layer 44 is formed to a thickness of T1.

[0095] A third inorganic layer 47 is formed on the second inorganic layer 44-1. The third inorganic layer 47 may be formed thicker than the second inorganic layer 44. The third inorganic layer 47 may be a silicon oxide layer formed using a different formation method or source material from the second inorganic layer 44. For example, the second inorganic layer 44 may be a silicon oxide layer formed using TEOS (Tetramethyl orthosilicate), and the third inorganic layer 47 may be a silicon oxide layer formed using SiH4 gas and O2 gas.

[0096] In some embodiments, the third inorganic layer 47 is formed to a thickness of T5. In some embodiments, T5 is several nm to several hundred nm, or several μm to several hundred μm. The first inorganic layer 43, the second inorganic layer 44, and the third inorganic layer 47 may have a total thickness of T6. In some embodiments, T6 may be several nm to several hundred nm, or several μm to several hundred μm.

[0097] An organic mask pattern 46 is formed on the third inorganic layer 47. The organic mask pattern 46 may be formed using a photoetching process after forming an organic layer on the third inorganic layer 47. The organic mask pattern 46 is formed to a thickness of T2.

[0098] In some embodiments, the organic mask pattern 46 may be made of a spin-on hard mask (SOH) material. In some embodiments, the organic mask pattern 46 may be made of an amorphous carbon layer (ACL) material or a photoresist material. The ACL material and the photoresist material also contain a large amount of carbon and may have properties similar to those of the SOH material.

[0099] The organic mask patterns 46 may have a first critical dimension CD1 in a first direction (X direction), and the spaces between the organic mask patterns 46 may have a second critical dimension CD2.

[0100] Referring to FIG. 11, the third inorganic layer (47 in FIG. 10), the second inorganic layer (44 in FIG. 10), and the first inorganic layer (43 in FIG. 10) are plasma etched using the organic mask pattern 46 as an etching mask to form an inorganic pattern 49 and a space pattern 48.

[0101] The inorganic pattern 49 may include a first inorganic pattern 43a, a second inorganic pattern 44a, and a third inorganic pattern 47a. The first inorganic pattern 43a is a silicon nitride pattern. The second inorganic pattern 44a and the third inorganic pattern 47a are silicon oxide patterns.

[0102] The inorganic pattern 49 is also a pattern that extends vertically in a third direction (Z direction) perpendicular to the first direction (X direction) on the support layer 42. The inorganic pattern 49 may have a first critical dimension (CD1) in the first direction (X direction). The inorganic pattern 49 may be a line-shaped pattern LP1-2 on the support layer 42 in a plan view.

[0103] The space patterns 48 may be formed between the inorganic patterns 49 in the first direction (X direction) and expose the support layer 42. The space patterns 48 may be line-type space patterns SP1-2 in a plan view on the support layer 42. The space patterns 48 may have a second critical dimension (CD2) in the first direction (X direction).

[0104] The inorganic pattern 49 and the space pattern 48 can be formed by plasma etching the third inorganic layer (47 in FIG. 10), the second inorganic layer (44 in FIG. 10), and the first inorganic layer (43 in FIG. 10) using the plasma etching apparatus of FIG. 1A or FIG. 1B.

[0105] An etching gas is used to increase the etching selectivity of the third inorganic layer (47 in FIG. 10), the second inorganic layer (44 in FIG. 10), and the first inorganic layer (43 in FIG. 10) relative to the organic mask pattern 46 during plasma etching, thereby reducing the global warming potential. The etching gas may be a mixed gas containing C2H2F4 gas as the main etching gas and O2 gas or an oxygen-containing gas as the auxiliary etching gas.

[0106] In some embodiments, the oxygen-containing gas may include at least one of CO, CO, COF, SO, HO, NO, NO, and NO. The oxygen-containing gas is not limited to the molecular structures of the gases listed above, as long as it contains oxygen and can generate oxygen plasma. In some embodiments, plasma etching may be performed by further including CF, CF, and Ar gases in the main etching gas.

[0107] The advantages of using C2H2F4 gas as the main etching gas have been explained in FIG. 5, so a duplicate explanation will be omitted.

[0108] Additionally, when C2H2F4 gas is plasmatized, CF3, which is an etching species for the silicon oxide layer constituting the third inorganic layer (47 in FIG. 10) and the second inorganic layer (44 in FIG. 10), is also used. + , CF2 + , CF + The ratio of CHF2, which is an etching species for the silicon nitride layer (SiN) or silicon oxynitride layer (SiON) that constitutes the first inorganic layer (43 in FIG. 10), is + , CHF + The incidence rate may be higher than

[0109] When configured in this manner, the etching rates of the third inorganic layer (47 in FIG. 10) and the second inorganic layer (44 in FIG. 10) made of a silicon oxide layer and the first inorganic layer (43 in FIG. 10) made of a silicon nitride layer (SiN) or a silicon oxynitride layer (SiON) can be made uniform.

[0110] Therefore, when C2H2F4 gas is used as an etching gas during plasma etching, the etching selectivity, which is defined as the ratio of the thickness T6 of the inorganic pattern 49 to the thickness T2 of the organic mask pattern 46, can be increased.

[0111] In addition, the advantages of using O2 gas as an auxiliary etching gas during plasma etching of the third inorganic layer (47 in Figure 10), the second inorganic layer (44 in Figure 10), and the first inorganic layer (43 in Figure 10) will be described later.

[0112] FIG. 12 is a graph showing etching selectivity by etching gas during a plasma etching process of an inorganic layer made of a silicon oxide layer in a method for manufacturing a semiconductor device according to the present invention.

[0113] Specifically, as described above, in the embodiment of the present invention, when plasma etching an inorganic layer made of a silicon oxide layer, a mixed gas containing C2H2F4 gas (HFC gas) as a main etching gas and O2 gas or an oxygen-containing gas as an auxiliary etching gas can be used as an etching gas.

[0114] In some embodiments, the oxygen-containing gas may include at least one of CO, CO, COF, SO, HO, NO, NO, and NO. The oxygen-containing gas is not limited to the molecular structures of the gases listed above, as long as it contains oxygen and can generate oxygen plasma. In some embodiments, plasma etching may be performed by further including CF, CF, and Ar gases in the main etching gas.

[0115] As mentioned above, as a comparative example, when plasma etching an inorganic layer made of a silicon oxide layer, a mixed gas containing CHF3 gas as the main etching gas and O2 gas as the auxiliary etching gas can be used. In Figure 12, the X axis shows the mixture ratio of C2H2F4 gas (HFC gas) to O2 gas and the mixture ratio of CHF3 gas (HFC gas) to O2 gas.

[0116] 12 is a graph illustrating the etching selectivity of a silicon oxide layer relative to an organic mask pattern made of an Amorphous Carbon Layer (ACL) material, where the Y-axis represents the etching selectivity of a silicon oxide layer relative to an organic mask pattern made of an Amorphous Carbon Layer (ACL) material.

[0117] It can be seen that in the embodiment of the present invention, as the mixture ratio of C2H2F4 gas (HFC gas) to O2 gas increases from about 1 to about 5, the etching selectivity ratio increases from about 1 to about 6. On the other hand, in the comparative example, as the mixture ratio of CHF3 gas (HFC gas) to O2 gas increases from about 1 to about 5, the etching selectivity ratio increases from about 1 to about 2.

[0118] Therefore, when plasma etching an inorganic layer made of a silicon oxide layer as in the embodiment of the present invention, using a mixed gas containing CHF gas as a main etching gas and O gas as an auxiliary etching gas can etch the silicon oxide layer more effectively without damaging the organic mask pattern than in the comparative example.

[0119] FIG. 13 is a graph showing etching selectivity by etching gas during a plasma etching process of an inorganic layer made of a silicon oxide layer in a method for manufacturing a semiconductor device according to the present invention.

[0120] Specifically, the X-axis represents the mixture ratio of C2H2F4 gas (HFC gas) to O2 gas and the mixture ratio of CHF3 gas (HFC gas) to O2 gas, and the Y-axis represents the etching selectivity of a silicon oxide film to an organic mask pattern made of a photoresist (PR) material.

[0121] It can be seen that in the embodiment of the present invention, the etching selectivity increases from about 0.3 to about 0.8 as the mixture ratio of C2H2F4 gas (HFC gas) to O2 gas increases from about 1 to about 3. On the other hand, it can be seen that in the comparative example, the etching selectivity increases from about 0.2 to about 0.5 as the mixture ratio of CHF3 gas (HFC gas) to O2 gas increases from about 1 to about 5.

[0122] Therefore, when plasma etching an inorganic layer made of a silicon oxide layer as in the embodiment of the present invention, using a mixed gas containing CHF gas as a main etching gas and O gas as an auxiliary etching gas can etch the silicon oxide layer more effectively without damaging the organic mask pattern than the comparative example.

[0123] FIG. 14 is a graph showing etching selectivity by etching gas during a plasma etching process of an inorganic layer made of a silicon nitride layer or a silicon oxynitride layer in a method for manufacturing a semiconductor device according to the present invention.

[0124] Specifically, the X-axis represents the mixture ratio of C2H2F4 gas (HFC gas) to O2 gas and the mixture ratio of CHF3 gas (HFC gas) to O2 gas, and the Y-axis represents the etch selectivity of a silicon nitride layer to an organic mask pattern made of an Amorphous Carbon Layer (ACL) material.

[0125] It can be seen that in the embodiment of the present invention, the etching selectivity ratio increases from about 2.5 to about 4.0 as the mixture ratio of C2H2F4 gas (HFC gas) to O2 gas increases from about 1 to about 5. On the other hand, it can be seen that in the comparative example, the etching selectivity ratio increases from about 1.0 to about 2.9 as the mixture ratio of CHF3 gas (HFC gas) to O2 gas increases from about 1 to about 5.

[0126] Therefore, when plasma etching an inorganic layer made of a silicon nitride layer or a silicon oxynitride layer as in the embodiment of the present invention, using a mixed gas containing C2H2F4 gas as a main etching gas and O2 gas as an auxiliary etching gas can etch the silicon nitride layer more effectively without damaging the organic mask pattern than in the comparative example.

[0127] FIG. 15 is a graph showing etching selectivity by etching gas during a plasma etching process of an inorganic layer made of a silicon nitride layer in a method for manufacturing a semiconductor device according to the present invention.

[0128] Specifically, the X-axis represents the mixture ratio of C2H2F4 gas (HFC gas) to O2 gas and the mixture ratio of CHF3 gas (HFC gas) to O2 gas, and the Y-axis represents the etch selectivity of the silicon nitride layer to the organic mask pattern made of photoresist (PR) material.

[0129] It can be seen that in the embodiment of the present invention, the etching selectivity increases from about 0.5 to about 0.8 as the mixture ratio of C2H2F4 gas (HFC gas) to O2 gas increases from about 1 to about 2.5, while in the comparative example, the etching selectivity increases from about 0.3 to about 0.7 as the mixture ratio of CHF3 gas (HFC gas) to O2 gas increases from about 1 to about 2.5.

[0130] Therefore, when plasma etching an inorganic layer made of a silicon nitride layer or a silicon oxynitride layer as in the embodiment of the present invention, using a mixed gas containing C2H2F4 gas (HFC gas) as a main etching gas and O2 gas as an auxiliary etching gas can etch the silicon nitride layer more effectively without damaging the organic mask pattern than the comparative example.

[0131] FIG. 16 is a graph showing the etching rate of an inorganic layer made of a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer according to an etching gas during a plasma etching process in a method for manufacturing a semiconductor device according to the present invention.

[0132] Specifically, the X-axis represents the etching rate of a silicon nitride layer (SiN) or a silicon oxynitride layer (SiON). The Y-axis represents the etching rate of a silicon oxide layer (SiO). When C2H2F4 gas is used as the etching gas as in an embodiment of the present invention, the etching rate of the silicon nitride layer (SiN) or the silicon oxynitride layer (SiON) increases as indicated by the reference line PL, and the etching rate of the silicon oxide layer (SiO2) also increases. That is, the etching rates of the silicon nitride layer (SiN) or the silicon oxynitride layer (SiON) and the silicon oxide layer (SiO2) can be simultaneously controlled and increased.

[0133] For example, when C2H2F4 gas is used as the etching gas, the etching rate of a silicon nitride layer (SiN) or a silicon oxynitride layer (SiON) can be increased from about 200 A / min to about 4500 A / min, and the etching rate of a silicon oxide layer (SiO2) can also be increased from about 200 A / min to about 3800 A / min.

[0134] In contrast, in the comparative example, when CHF gas is used as the etching gas, the relationship between the etching rate of a silicon nitride layer (SiN) or silicon oxynitride layer (SiON) and the etching rate of a silicon oxide layer (SiO2) cannot be obtained. Therefore, when plasma etching an inorganic layer consisting of a silicon nitride layer (SiN) or silicon oxynitride layer (SiON) and a silicon oxide layer (SiO2) as in the embodiment of the present invention, using C2H2F4 gas as the etching gas can uniformly etch the silicon nitride layer or silicon oxynitride layer (SiON) and the silicon oxide layer at the same rate without damaging the organic mask pattern, as in the comparative example.

[0135] FIG. 17 is a plan view showing a semiconductor device according to an embodiment of the technical concept of the present invention, and FIG. 18 is a cross-sectional view taken along line DD' of FIG.

[0136] Specifically, the semiconductor element EM4 may include a first organic pattern 62a, a second organic pattern 70a, and a space pattern 72 disposed on a support layer 42. The first organic pattern 62a, the second organic pattern 70a, and the space pattern 72 may be formed by a semiconductor element manufacturing method including a plasma etching process, as described below.

[0137] The method for manufacturing a semiconductor device may include a fine patterning process. The support layer 42 may be a substrate. The support layer 42 may correspond to the substrate 12 in FIGS. 1A and 1B. The support layer 42 may be made of the materials described above.

[0138] The first organic patterns 62a may be a plurality of patterns spaced apart from one another in a first direction (X direction) on the support layer 42. The first organic patterns 62a may have a third critical dimension (CD3) in the first direction (X direction).

[0139] In some embodiments, the third critical dimension CD3 may be several nanometers to several tens of nanometers. In some embodiments, the third critical dimension CD3 may be 20 nm or less. In some embodiments, the third critical dimension CD3 may be 2 nm to 20 nm.

[0140] The first organic pattern 62a may be a pattern extending in a second direction (Y direction) perpendicular to the first direction (X direction) in a plan view, as shown in Fig. 17. The first organic pattern 62a may also be a pattern extending in a third direction (Z direction) perpendicular to the first direction (X direction) in a cross-sectional view, as shown in Fig. 18. The first organic pattern 62a may be a first line-type pattern LP1-3 in a plan view, as shown in Fig. 17.

[0141] The second organic pattern 70a may be disposed in the first direction (X direction) and spaced apart from the first organic pattern 62a by a space pattern 72. The second organic pattern 70a may be a plurality of patterns spaced apart from each other in the first direction (X direction) on the support layer 42. As shown in FIG. 18, the second organic pattern 70a may also be a pattern extending in a third direction (Z direction) perpendicular to the first direction (X direction) in a cross-sectional view.

[0142] The second organic pattern 70a may have a fifth critical dimension (CD5) in the first direction (X direction). In some embodiments, the fifth critical dimension CD5 may be several nanometers to several tens of nanometers. In some embodiments, the fifth critical dimension CD5 may be 20 nm or less. In some embodiments, the fifth critical dimension CD5 may be 2 nm to 20 nm.

[0143] The second organic pattern 70a may be a pattern extending in a second direction (Y direction) perpendicular to the first direction in a plan view, as shown in Fig. 17. The second organic pattern 70a may also be a pattern extending in a third direction (Z direction) perpendicular to the first direction (X direction) in a cross-sectional view, as shown in Fig. 18. The second organic pattern 70a may be a second line-type pattern LP2-3 in a plan view, as shown in Fig. 17.

[0144] The space pattern 72 may be disposed between the first organic pattern 62a and the second organic pattern 70a. The space pattern 72 may be a plurality of patterns spaced apart from each other in the first direction (X direction) on the support layer 42.

[0145] The space pattern 72 may have a fourth critical dimension (CD4) in the first direction (X direction). In some embodiments, the fourth critical dimension CD4 may be several nanometers to several tens of nanometers. In some embodiments, the fourth critical dimension CD4 may be 20 nm or less. In some embodiments, the fourth critical dimension CD4 may be 2 nm to 20 nm.

[0146] 17, the space pattern 72 may be a pattern extending in a second direction (Y direction) perpendicular to the first direction (X direction) in a plan view. The space pattern 72 may be a line-type space pattern SP1-3 in a plan view, as shown in FIG. 17. In some embodiments, the third critical dimension CD3 of the first organic pattern 62a, the fifth critical dimension CD5 of the second organic pattern 70a, and the fourth critical dimension CD4 of the space pattern 72 may be the same as each other.

[0147] In some embodiments, the third critical dimension CD3 of the first organic pattern 62a, the fifth critical dimension CD5 of the second organic pattern 70a, and the fourth critical dimension CD4 of the space pattern 72 may be different from each other.

[0148] In some embodiments, the first organic pattern 62a and the second organic pattern 70a may be made of the same organic material, or may be made of different organic materials.

[0149] In some embodiments, the first organic pattern 62a and the second organic pattern 70a may be made of a spin-on hard mask (SOH) material, which may refer to a hydrocarbon compound or a derivative thereof having a relatively high carbon content of about 85 to 99 wt% based on the total weight.

[0150] In some embodiments, the first organic pattern 62a and the second organic pattern 70a may be made of an Amorphous Carbon Layer (ACL) material or a photoresist material instead of an SOH material. The ACL material and the photoresist material also contain a large amount of carbon and may have properties similar to those of the SOH material.

[0151] 19 to 25 are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the technical concept of the present invention.

[0152] Specifically, Figures 19 to 25 are provided to explain a method for manufacturing the semiconductor device EM4 of Figures 17 and 18. In Figures 19 to 25, the contents explained in Figures 17 and 18 will be briefly explained or omitted.

[0153] 19, a first organic layer 62, a hard mask layer 64, and a photoresist layer 66 are sequentially formed on a support layer 42. The support layer 42 may be a substrate, for example, a silicon substrate. The hard mask layer 64 may be a silicon hard mask layer. The hard mask layer 64 and the photoresist layer 66 are provided to pattern the first organic layer 62.

[0154] The first organic layer 62 may be formed using a spin-on hard mask (SOH) material, an amorphous carbon layer (ACL) material, or a photoresist material. For example, the first organic layer 62 made of an SOH material may be formed by applying an organic compound through a spin coating process or other deposition process to form an organic compound layer, and then performing at least one bake process.

[0155] The organic compound may be a hydrocarbon compound or a derivative thereof containing an aromatic ring such as phenyl, benzene, or naphthalene, and may be a substance having a relatively high carbon content of about 85 to 99 wt % based on the total weight of the organic compound.

[0156] 20 and 21, as shown in Fig. 20, a hard mask pattern 64a and a photoresist pattern 66a are formed on the first organic layer 62. The photoresist pattern 66a may be formed using a photolithography tool.

[0157] The hard mask pattern 64a may be formed by using the photoresist pattern 66a as an etching mask to etch the hard mask layer 64. The hard mask pattern 64a and the photoresist pattern 66a may have a third critical dimension CD3 in the first direction (X direction).

[0158] 21, the first organic layer (62 in FIG. 19) is etched using the hard mask pattern 64a and the photoresist pattern 66a as an etching mask to form a plurality of first organic patterns 62a. The first organic patterns 62a may be spaced apart from one another in the first direction (X direction) on the support layer 42. The first organic patterns 62a may be formed by the patterning process of the first organic layer (62 in FIG. 19) as described above.

[0159] The first organic pattern 62a may be formed by first patterning the first organic layer (62 in FIG. 19) as described above. The first organic pattern 62a may have a third critical dimension CD3, similar to the hard mask pattern 64a and the photoresist pattern 66a.

[0160] 22, the hard mask pattern (64a in FIG. 21) and the photoresist pattern (66a in FIG. 21) are removed. The hard mask pattern (64a in FIG. 21) and the photoresist pattern (66a in FIG. 21) may be removed by a wet etching process.

[0161] Subsequently, an inorganic layer 68 is formed on the support layer 40 to cover the first organic pattern 62a. The inorganic layer 68 may be formed on both sidewalls and an upper surface of the first organic pattern 62a and on the support layer 42. The inorganic layer 68 may be formed to a first thickness TH1.

[0162] The inorganic layer 68 may be formed to a first thickness TH1 on both sidewalls of the first organic pattern 62a. The first thickness TH1 may be several nanometers to several tens of nanometers. The inorganic layer 68 is formed on both sidewalls of the first organic pattern 62a, but is formed so as not to fill the gaps between the first organic patterns 62a.

[0163] In some embodiments, inorganic layer 68 may be a silicon oxide layer. In some embodiments, inorganic layer 68 may be a silicon nitride layer (SiN) or a silicon oxynitride layer (SiON). Inorganic layer 68 may be formed using chemical vapor deposition or atomic layer deposition.

[0164] 23, the inorganic layer (68 in FIG. 22) is etched back to form a plurality of inorganic patterns 68a. The inorganic layer (68 in FIG. 22) formed on the top surface of the first organic pattern 62a and the inorganic layer (68 in FIG. 22) formed on the top surface of the support layer 42 may be removed by etching back. The inorganic patterns 68a may be formed by patterning the inorganic layer (68 in FIG. 22) using an etch-back process.

[0165] The inorganic patterns 68a may contact both sidewalls of the first organic pattern 62a and be spaced apart from each other in the first direction (X direction). The inorganic patterns 68a may be formed self-aligned with the first organic pattern 62a. The inorganic patterns 68a may also be called inorganic spacer patterns.

[0166] The inorganic pattern 68a may have a fourth critical dimension CD4 in the first direction (X direction). The fourth critical dimension CD4 may be determined by the first thickness TH1 of the inorganic layer (68 in FIG. 22). The fourth critical dimension CD4 may be the same as the third critical dimension CD3.

[0167] Etching back the inorganic layer (68 in FIG. 22) may form a first opening 69 between the inorganic patterns 68a. The first opening 69 may be formed in a self-aligned manner with the inorganic patterns 68a. The first opening 69 may have a fifth critical dimension CD5 in the first direction (X direction). The fifth critical dimension CD5 may be the same as the third critical dimension CD3 and the fourth critical dimension CD4.

[0168] A first pattern structure pst1 including one first organic pattern 62a and two inorganic patterns 68a formed on both sidewalls of the first organic pattern 62a may be formed by etching back the inorganic layer (68 in FIG. 22). A second pattern structure pst2 may be formed spaced apart from the first pattern structure pst1 in the first direction by etching back the inorganic layer (68 in FIG. 22).

[0169] The second pattern structure pst2 may be composed of one first organic pattern 62a and two inorganic patterns 68a formed on both side walls of the first organic pattern 62a. A first opening 69 may be formed between the first pattern structure pst1 and the second pattern structure pst2.

[0170] 24, a second organic layer 70 is formed to cover the first organic pattern 62a and the inorganic pattern 68a and to fill the spaces between the inorganic patterns 68a. The second organic layer 70 may be formed on the first pattern structure pst1 and the second pattern structure pst2 and to fill the first openings 69.

[0171] The second organic layer 70 may be formed using a spin-on hard mask (SOH) material, an amorphous carbon layer (ACL) material, or a photoresist material. The second organic layer 70 may be made of the same material as the first organic layer 62 or a different material.

[0172] 25, the second organic layer (70 in FIG. 24) is etched back to form a plurality of second organic patterns 70a. The second organic layer (70 in FIG. 24) formed on the top surfaces of the first organic pattern 62a and the inorganic pattern 68a may be removed by etching back.

[0173] The second organic patterns 70a may be formed between the inorganic patterns 68a and may be spaced apart from each other in the first direction (X direction). The second organic patterns 70a may have a fifth critical dimension CD5 in the first direction (X direction). The fifth critical dimension CD5 of the second organic patterns 70a may be the same as the third critical dimension CD3 and the fourth critical dimension CD4.

[0174] 18, the inorganic pattern (68a in FIG. 17) is selectively etched and removed on the support layer 40. The inorganic pattern (68a in FIG. 25) can be selectively removed by plasma etching, with the etching selectivity of the inorganic pattern (68a in FIG. 25) being higher than that of the first organic pattern 62a and the second organic pattern 70a.

[0175] The inorganic pattern (68a in FIG. 25) can be etched using the etching gas described above, that is, a mixed gas containing C2H2F4 gas as the main etching gas and O2 gas or an oxygen-containing gas as the auxiliary etching gas.

[0176] In some embodiments, the oxygen-containing gas may include at least one of CO, CO, COF, SO, H O, NO, NO, and N O. The oxygen-containing gas is not limited to the molecular structure of the gases listed above, as long as it contains oxygen and can generate oxygen plasma.

[0177] In some embodiments, the plasma etching may be performed using a main etching gas that further includes CF4 gas, C4F8 gas, and Ar gas. The etching selectivity of the film quality during plasma etching has been described with reference to FIGS. 12 to 15, so a description thereof will be omitted here.

[0178] By removing the inorganic pattern (68a in FIG. 25), the first organic pattern 62a and the second organic pattern 70a can become the first line-type pattern LP1-3 and the second line-type pattern LP2-3, respectively.

[0179] By removing the inorganic pattern (68a in FIG. 25), a plurality of space patterns 72 may be formed between the first organic pattern 62a and the second organic pattern 70a. The space patterns 72 may be line-type space patterns SP1-SP3. The space patterns 72 may have a fourth critical dimension CD4 in the first direction (X direction).

[0180] FIG. 26 is a plan view showing a semiconductor device according to one embodiment of the technical concept of the present invention, and FIG. 27 is a cross-sectional view taken along line EE' of FIG.

[0181] Specifically, the semiconductor device EM5 may be the same as the semiconductor device EM4 of Figures 17 and 18 except for the critical dimensions of the spacer pattern 72-1 and the first organic pattern 62a-1. In Figures 26 and 27, the contents described in Figures 17 and 18 will be briefly explained or omitted.

[0182] The semiconductor element EM5 may include a first organic pattern 62a-1, a second organic pattern 70a-1, and a spacer pattern 72-1 disposed on a support layer 42. The first organic pattern 62a-1 may be a plurality of patterns spaced apart from each other in a first direction (X direction) on the support layer 42.

[0183] The first organic pattern 62a-1 may be a first line pattern LP1-4 in a plan view, as shown in Fig. 26. The first organic pattern 62a-1 is also a pattern extending in a third direction (Z direction) perpendicular to the first direction (X direction) in a cross-sectional view, as shown in Fig. 27.

[0184] The first organic pattern 62a-1 may have a third critical dimension (CD3) in the first direction (X direction). In some embodiments, the third critical dimension CD3 may be several nanometers to several tens of nanometers. In some embodiments, the third critical dimension CD3 may be 20 nm or less. In some embodiments, the third critical dimension CD3 may be 2 nm to 20 nm.

[0185] The second organic pattern 70a-1 may be spaced apart from the first organic pattern 62a-1 in the first direction (X direction) by a spacer pattern 72-1. The second organic pattern 70a-1 may be a second line pattern LP2-4 in a plan view, as shown in FIG. 26. The second organic pattern 70a-1 may also be a pattern extending in a third direction (Z direction) perpendicular to the first direction (X direction) in a cross-sectional view, as shown in FIG. 27.

[0186] The second organic pattern 70a-1 may have a fifth critical dimension CD5 in the first direction (X direction). The fifth critical dimension CD5 may be greater than the third critical dimension CD3. In some embodiments, the fifth critical dimension CD5 may be several nanometers to several tens of nanometers. In some embodiments, the fifth critical dimension CD5 may be 20 nm or less. In some embodiments, the fifth critical dimension CD5 may be 2 nm to 20 nm.

[0187] The space pattern 72-1 may be disposed between the first organic pattern 62a-1 and the second organic pattern 70a-1. The space pattern 72-1 may be a line-type space pattern SP1-4 in a plan view, as shown in FIG. 26. The space pattern 72-1 may have a fourth critical dimension CD4' in the first direction (X direction). The fourth critical dimension CD4' is smaller than the third critical dimension CD3.

[0188] In some embodiments, the fourth critical dimension CD4' can be several nanometers to tens of nanometers. In some embodiments, the fourth critical dimension CD4' can be 20 nm or less. In some embodiments, the fourth critical dimension CD4' can be 2 nm to 20 nm.

[0189] FIG. 28 is a plan view showing a semiconductor device according to one embodiment of the technical concept of the present invention, and FIG. 29 is a cross-sectional view taken along line FF' in FIG.

[0190] 17 and 18, the semiconductor device EM6 may be the same as the semiconductor device EM4 except that a trench pattern 74 is further formed between the first organic pattern 62a-2 and the second organic pattern 70a-2. In FIGS. 28 and 29, the details described in FIGS. 17 and 18 will be briefly described or omitted.

[0191] The semiconductor element EM6 may include a first organic pattern 62a-2, a second organic pattern 70a-2, a space pattern 72-2, and a trench pattern 74 arranged on a support layer 42. The first organic pattern 62a-2 may be a first line-type pattern LP1-5 in a plan view, as shown in FIG. 28. The second organic pattern 70a-2 may be a second line-type pattern LP2-5 in a plan view, as shown in FIG.

[0192] The spacer pattern 72-2 and the trench pattern 74 may be disposed between the first organic pattern 62a-2 and the second organic pattern 70a-2. The spacer pattern 72-2 and the trench pattern 74 may be a plurality of patterns spaced apart from each other in the first direction (X direction) on the support layer 42 and extending in the second direction (Y direction).

[0193] The space pattern 72-2 may be a line-type space pattern SP1-5 in plan view, as shown in Fig. 28. The trench pattern 74 may be a line-type trench pattern TSP1 in plan view, as shown in Fig. 28.

[0194] 29, the trench pattern 74 may be formed by etching the target layer tag1, which is part of the support layer 42, using the first organic pattern 62a-2 and the second organic pattern 70a-2 as a mask. The trench pattern 74 may have the same fourth critical dimension CD4 as the space pattern 72-2.

[0195] 29, the target layer tag1 may include a first target pattern ta1 located below the first organic pattern 62a-2 and a second target pattern ta2 located below the second organic pattern 70a-2. The first target pattern ta1 and the second target pattern ta2 are made of the same material as the support layer 42.

[0196] The first target pattern ta1 may be a first line-type target pattern TLP1 extending in the second direction (Y direction), and the second target pattern ta2 may be a second line-type target pattern TLP2 extending in the second direction (Y direction).

[0197] 30 to 32 are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

[0198] 19 to 25, the semiconductor device manufacturing method of Figures 30 to 32 may be the same except that the first organic layer (62 in Figure 19) and the second organic layer (70 in Figure 24) are formed of different materials and the order of the etch-back process of the inorganic layer (68 in Figure 22) is changed. In Figures 30 to 32, the details described in Figures 19 to 25 will be briefly explained or omitted.

[0199] 30, the manufacturing processes of Figures 19 to 22 are first performed. During the manufacturing processes of Figures 19 to 22, the first organic layer (62 in Figure 19) may be formed using a SOH (Spin On Hard Mask) material, an ACL (Amorphous Carbon Layer) material, or a photoresist material.

[0200] In this embodiment, the first organic layer (62 in FIG. 19) is made of a spin-on hard mask (SOH) material. Through the manufacturing processes of FIGS. 19 to 22, the first organic pattern 62a has a third critical dimension CD3, and an inorganic layer 68 may be formed on the first organic pattern 62a to a first thickness TH1.

[0201] Next, a second organic layer 70 is formed on the support layer 42 so as to cover the first organic patterns 62a and the inorganic layer 68 and to fill the spaces between the first organic patterns 62a. The second organic layer 70 is formed on the inorganic layer 68 so as to fill the spaces between the first organic patterns 62a. The second organic layer 70 is made of a different material from the first organic layer (62 in FIG. 19) or the first organic patterns 62a.

[0202] The second organic layer 70 may be formed using a spin-on hard mask (SOH) material, an amorphous carbon layer (ACL) material, or a photoresist material. In this embodiment, the second organic layer 70 is made of an amorphous carbon layer (ACL) material.

[0203] 31, the second organic layer (70 in FIG. 30) is etched back to form a plurality of second organic patterns 70a. The inorganic layer 68 is etched back to form a plurality of inorganic patterns 68a. The second organic layer (70 in FIG. 30) and the inorganic layer 68 are etched back sequentially.

[0204] The second organic pattern 70a may have a fifth critical dimension CD5. The second organic pattern 70a may be located between the inorganic patterns 68a. The inorganic pattern 68a may be located between the first organic pattern 62a and the second organic pattern 70a.

[0205] 32, the inorganic pattern 68a located between the first organic pattern 62a and the second organic pattern 70a on the support layer 42 is selectively removed. The inorganic pattern 68a located between the first organic pattern 62a and the second organic pattern 70a can be selectively removed by plasma etching, which has a higher inorganic pattern etching selectivity than the first organic pattern 62a and the second organic pattern 70a.

[0206] The inorganic pattern 68a located between the first organic pattern 62a and the second organic pattern 70a may be etched using the etching gas described above, for example, a mixed gas having C2H2F4 gas as a main etching gas and O2 gas or an oxygen-containing gas as an auxiliary etching gas.

[0207] In some embodiments, the oxygen-containing gas may include at least one of CO2, CO, COF2, SO2, H2O, NO, NO2, and N2O. The oxygen-containing gas is not limited to the molecular structures of the gases previously listed, as long as it contains oxygen and can generate oxygen plasma. In some embodiments, plasma etching may be performed by further including CF4 gas, C4F8 gas, and Ar gas in the main etching gas. The etching selectivity of film quality during plasma etching has been described with reference to FIGS. 12 to 15, so a description thereof will be omitted here.

[0208] A plurality of space patterns 72 may be formed between the first organic pattern 62a and the second organic pattern 70a. When the inorganic pattern 68a located between the first organic pattern 62a and the second organic pattern 70a is selectively removed, a lower inorganic pattern 78b may be left under the second organic pattern 70a.

[0209] The space pattern 72 may be a line-type space pattern SP1-7. The space pattern 72 may have a fourth critical dimension CD4. The first organic pattern 62a may be a first line-type pattern LP1-7. The second organic pattern 70a and the lower inorganic pattern 78b may be second line-type patterns LP2-7a and LP2-7b. The second organic pattern 70a may have a fifth critical dimension CD5.

[0210] As mentioned above, exemplary embodiments have been disclosed in the drawings and specification. Although specific terms have been used to describe the embodiments in this specification, these terms are merely used to describe the technical idea of ​​the present invention and are not used to limit the meaning or the scope of the present invention as set forth in the claims.

[0211] Therefore, a person skilled in the art would understand that various modifications and equivalent embodiments are possible. Therefore, the true technical scope of protection of the present invention should be determined by the technical spirit of the claims. [Explanation of symbols]

[0212] 42 Support layer 43a, 44a, 45, 47a, 49 Inorganic patterns 46 Organic Mask Patterns 48 Space Pattern 62a First Organic Pattern 70a Second organic pattern 72 Space Pattern 74 Trench Pattern

Claims

1. forming an inorganic layer on a support layer; forming an organic mask pattern on the inorganic layer; and performing plasma etching on the inorganic layer with a high etching selectivity using the organic mask pattern as an etching mask to form inorganic patterns and space patterns exposing the support layer between the inorganic patterns; The plasma etching of the inorganic layer is ２ H ２ F ４ A main etching gas having O ２ a gas mixture containing an auxiliary etching gas having a main etching gas or an oxygen-containing gas, and a ratio of the main etching gas to the auxiliary etching gas is 1 to 5.

2. 2. The method of claim 1, wherein the inorganic layer is a single layer of a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer; a double layer of a silicon oxide layer and a silicon nitride layer or a silicon oxynitride layer; or a triple layer of a silicon nitride layer or a silicon oxynitride layer, a first silicon oxide layer, and a second silicon oxide layer.

3. The main etching gas is CF ４ Gas, C ４ F ８ 2. The method of claim 1, wherein the plasma etching is performed using a gas containing argon and argon.

4. 2. The method of claim 1, wherein the organic mask pattern is made of a spin-on hard mask (SOH) material, an amorphous carbon layer (ACL) material, or a photoresist material.

5. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the inorganic pattern and the space pattern have the same critical dimension, and the inorganic pattern and the space pattern are linear patterns in a plan view.

6. forming a first organic layer on a support layer; patterning the first organic layer to form a first organic pattern; forming an inorganic layer on the support layer to cover the first organic pattern; etch-back the inorganic layer to form inorganic patterns on both sidewalls of the first organic pattern; forming a second organic layer to cover the first organic pattern and the inorganic pattern and to fill spaces between the inorganic patterns; etch-back the second organic layer to form a second organic pattern between the inorganic patterns; and selectively removing the inorganic pattern by plasma etching with a higher etching selectivity of the inorganic pattern than the first organic pattern and the second organic pattern, thereby forming a space pattern between the first organic pattern and the second organic pattern, The plasma etching of the inorganic pattern is ２ H ２ F ４ A main etching gas having O ２ a gas mixture containing an auxiliary etching gas having a main etching gas or an oxygen-containing gas, and a ratio of the main etching gas to the auxiliary etching gas is 1 to 5.

7. 7. The method of claim 6, wherein the inorganic layer is formed of a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer, the first organic layer and the second organic layer are formed of a spin-on hard mask (SOH) material, an amorphous carbon layer (ACL) material, or a photoresist material, and the first organic layer and the second organic layer are formed of different materials.

8. 7. The method of claim 6, further comprising etching a portion of the support layer using the first and second organic patterns as an etching mask to form a trench pattern.

9. forming a first organic layer on a support layer; patterning the first organic layer to form a first organic pattern; forming an inorganic layer on the support layer to cover the first organic pattern; forming a second organic layer on the support layer to cover the first organic patterns and the inorganic layer and to fill spaces between the first organic patterns; forming an inorganic pattern and a second organic pattern by sequentially etching back the second organic layer and the inorganic layer, the second organic pattern being formed between the inorganic patterns, and the inorganic pattern being formed between the first organic pattern and the second organic pattern; and selectively removing the inorganic pattern located between the first organic pattern and the second organic pattern by plasma etching with a large etching selectivity of the inorganic pattern relative to the first organic pattern and the second organic pattern, thereby forming a space pattern between the first organic pattern and the second organic pattern, The plasma etching of the inorganic pattern is ２ H ２ F ４ A main etching gas having O ２ a gas mixture containing an auxiliary etching gas having a main etching gas or an oxygen-containing gas, and a ratio of the main etching gas to the auxiliary etching gas is 1 to 5.

10. 10. The method of claim 9, wherein when the inorganic pattern located between the first organic pattern and the second organic pattern is selectively removed by the plasma etching, a lower inorganic pattern remains below the second organic pattern.

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