Semiconductor device

Abstract

To provide a semiconductor device with large on-state current.SOLUTION: A semiconductor device includes an oxide semiconductor film, a source electrode and a drain electrode on the oxide semiconductor film, an interlayer insulating film disposed covering the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film on the oxide semiconductor film, a barrier insulating film on the oxide semiconductor film, and a gate electrode on the gate insulating film. The barrier insulating film is disposed between the source electrode and the gate insulating film and between the drain electrode and the gate electrode. The interlayer insulating film has an opening formed overlapping with a region between the source electrode and the drain electrode. The barrier insulating film, the gate insulating film, and the gate electrode are disposed in the opening of the interlayer insulating film. The gate insulating film is in contact with the interlayer insulating film over the barrier insulating film.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a transistor, a semiconductor device, and an electronic device. One embodiment of the present invention relates to a method for manufacturing a semiconductor device. , and regarding modules.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, electronic device etc. may be said to have a semiconductor device.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to an object, a method, or a manufacturing method. , process, machine, manufacture, or composition of matter (This is related to the above.) [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, and memories are mainly used. The CPU is a semiconductor integrated circuit (at least a transistor) separated from a semiconductor wafer. It is an assembly of semiconductor elements having a capacitor and memory, and on which electrodes serving as connection terminals are formed.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, e.g. It is mounted on a printed wiring board and used as one of the components in various electronic devices.

[0006] In addition, a transistor is formed using a semiconductor thin film formed on a substrate having an insulating surface. The transistor is used in integrated circuits (ICs) or image display devices (simply It is widely used in electronic devices such as display devices. Silicon-based semiconductor materials are widely known as usable semiconductor thin films, but other materials and Oxide semiconductors have been attracting attention as a solution.

[0007] Furthermore, a transistor including an oxide semiconductor has a very low leakage current in a non-conducting state. For example, the leakage current of a transistor using an oxide semiconductor is known to be small. A low-power CPU that utilizes this characteristic has been disclosed (see Patent Document 1). ) In addition, for example, the low leakage current of a transistor using an oxide semiconductor The application of this technology has led to the disclosure of a storage device that can retain stored content for a long period of time. (See Patent Document 2).

[0008] In recent years, with the trend toward smaller and lighter electronic devices, there has been a demand for even higher density integrated circuits. There is also a demand for improved productivity in the manufacture of semiconductor devices including integrated circuits. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-257187 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-151383 Summary of the Invention [Problem to be solved by the invention]

[0010] An object of one embodiment of the present invention is to provide a semiconductor device with large on-state current. Another object of one embodiment of the present invention is to provide a semiconductor device having high field-effect mobility. Another embodiment of the present invention is to provide a semiconductor device with favorable frequency characteristics. Another object of one embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. Another object of one embodiment of the present invention is to provide a semiconductor device having high reliability. Another object of the present invention is to provide a semiconductor device that consumes low power. Another object of the present invention is to provide a device having transistor characteristics. Another object of the present invention is to provide a semiconductor device with little variation in characteristics. An object of one embodiment is to provide a semiconductor device that can be miniaturized or highly integrated. Another object of one embodiment of the present invention is to provide a manufacturing method of the semiconductor device. do.

[0011] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. It is possible to extract other issues from the drawings, claims, etc. [Means for solving the problem]

[0012] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film, a source electrode and a drain electrode over the oxide semiconductor film, and a gate insulating film. an insulating layer provided to cover the electrode, the oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film on the oxide semiconductor film; a barrier insulating film on the oxide semiconductor film; a gate electrode on the source insulating film, and a barrier insulating film between the source electrode and the gate insulating film; and the interlayer insulating film is disposed between the source electrode and the drain electrode and the gate electrode. An opening is formed so as to overlap the region between the gate electrodes, and the barrier insulating film and the gate insulating film are The film and the gate electrode are disposed in an opening in the interlayer insulating film, and the gate insulating film is The semiconductor device is in contact with the interlayer insulating film above the film.

[0013] In the above, the barrier insulating film is made of silicon nitride, silicon nitride oxide, and silicon oxide. It is preferable that the composition includes any one selected from the following:

[0014] In the above, the upper portions of the interlayer insulating film and the barrier insulating film are tapered. It is preferable that

[0015] In the above, the side surface of the source electrode on the gate electrode side and the gate of the drain electrode An oxide film is preferably formed on the side surface on the electrode side, and the thickness of the oxide film is preferably 4 nm or less.

[0016] In the above, the upper surface of the interlayer insulating film, the upper portion of the gate insulating film, and the upper surface of the gate electrode Preferably, an aluminum oxide film is disposed in contact with the surface.

[0017] In the above, the oxide semiconductor film may contain any one of In, Ga, and Zn. It is preferable to have one or more of the above.

[0018] Another aspect of the present invention is a semiconductor device including a first insulating film, a second insulating film on the first insulating film, and a second insulating film on the second insulating film. An oxide semiconductor film is formed on the insulating film, and a first conductive film is formed on the oxide semiconductor film. The first insulating layer, the oxide semiconductor film, and the first conductive film are processed into an island shape. A conductor layer and a first conductive layer are formed, and a first insulating film, a first insulating layer, an oxide semiconductor layer, and forming an interlayer insulating film covering the first conductive layer, and forming a first insulating layer, an oxide film, and the like on the interlayer insulating film. An opening is formed in the first conductive layer so as to overlap the compound semiconductor layer and the first conductive layer, and the opening is formed in the first conductive layer so as to overlap the opening. The source and drain electrodes are formed by etching the regions, and the interlayer insulating film and A third insulating film is formed to cover the oxide semiconductor layer, and anisotropic etching is performed on the third insulating film. Then, a barrier insulating film is formed in contact with the sidewall of the opening, and the oxide semiconductor layer is subjected to wet etching. A fourth insulating film is formed by performing a masking process to cover the interlayer insulating film, the barrier insulating film, and the oxide semiconductor layer. a second conductive film is formed covering the fourth insulating film; The conductive film is polished until the top surface of the interlayer insulating film is exposed, and the gate insulating film and the gate electrode are This is a method for manufacturing a semiconductor device.

[0019] In the above, it is preferable that the third insulating film contains silicon nitride. In this case, the third insulating film is preferably formed by using the PEALD method.

[0020] In the above, a dry etching process is performed as anisotropic etching, and the dry In the etching process, an etching selectivity of the third insulating film to the first insulating film, and and the third insulating film preferably has an etching selectivity of 10 or more with respect to the oxide semiconductor layer. In the above, the interlayer insulating film and the burr are preferably removed by dry etching. It is preferable that the upper portion of the insulating film be tapered.

[0021] In the above, it is preferable to use diluted ammonia water for the wet etching process. In the above, it is preferable to perform microwave treatment after the formation of the fourth insulating film. I wish. [Effects of the Invention]

[0022] According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device with high field-effect mobility can be provided. According to one embodiment of the present invention, a semiconductor device with favorable frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided. According to one embodiment of the present invention, a semiconductor device with little variation in transistor characteristics can be provided. Alternatively, according to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device can be provided. A manufacturing method can be provided.

[0023] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description. The above is self-evident from the description, drawings, claims, etc. From the above descriptions, it is possible to extract other effects. [Brief explanation of the drawings]

[0024] [Figure 1] 1A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 1B to 1D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 2] FIG. 2 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 3] Figure 3A is a diagram explaining the classification of IGZO crystal structures, Figure 3B is a diagram explaining the XRD spectrum of a CAAC-IGZO film, and Figure 3C is a diagram explaining the electron microbeam diffraction pattern of a CAAC-IGZO film. [Figure 4] 4A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 4B to 4D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 5] 5A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 5B to 5D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 6A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 6B to 6D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7] 7A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 7B to 7D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 8] 8A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 8B to 8D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 9A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 9B to 9D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10]10A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 10B to 10D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 11A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 11B to 11D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12] 12A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 12B to 12D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 13] 13A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 13B to 13D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 14] 14A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 14B to 14D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 15] 15A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 15B to 15D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 16] 16A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 16B to 16D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 17] 17A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 17B to 17D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 18] FIG. 18 is a top view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 19] FIG. 19 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 20] FIG. 20 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 21]FIG. 21 is a schematic diagram illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 22] 22A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 22B and 22C are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 23] 23A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 23B to 23D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 24] 24A and 24B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 25] 25A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 25B to 25D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 26] FIG. 26 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 27] FIG. 27 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 28] FIG. 28 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 29] 29A and 29B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 30] FIG. 30 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 31] 31A and 31B are block diagrams illustrating a configuration example of a storage device according to one embodiment of the present invention. [Figure 32] 32A to 32H are circuit diagrams illustrating configuration examples of a memory device according to one embodiment of the present invention. [Figure 33] 33A and 33B are schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 34] 34A and 34B are diagrams illustrating an example of an electronic component. [Figure 35] 35A to 35E are schematic diagrams of a memory device according to one embodiment of the present invention. [Figure 36] 36A to 36H illustrate electronic devices according to one embodiment of the present invention. [Figure 37] 37A and 37B are cross-sectional STEM images of a sample according to an embodiment of the present invention. [Figure 38] 38A and 38B are cross-sectional STEM images of a sample according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0025] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be practiced in various different ways without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

[0026] In the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in the drawings as a schematic illustration, and are not limited to the shapes or values ​​shown in the drawings. For example, In the actual manufacturing process, layers or resist masks are removed by etching or other processes. There may be some loss without illustration, but in order to make it easier to understand, this may not be reflected in the illustration. In the drawings, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings. The same functions are used in common between the two screens, and their repeated explanations may be omitted. In such cases, the hatch pattern may be the same and no particular symbol may be assigned.

[0027] In addition, in order to facilitate understanding of the invention, particularly in top views or perspective views, some of the structures may be In some cases, the description of the components may be omitted. In addition, some hidden lines may be omitted. do.

[0028] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second" The term "the" or "third" can be used interchangeably in the description. The ordinal numbers listed may not match the ordinal numbers used to identify an aspect of the present invention. There may be cases where this is the case.

[0029] In addition, in this specification, terms indicating arrangement such as "above" and "below" refer to the relationship between components. The positional relationship is used for convenience in describing the same with reference to the drawings. The relationship changes depending on the direction in which each component is depicted. The terms are not limited to those described above, and can be rephrased appropriately depending on the situation.

[0030] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification. Therefore, it is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the drawings or text are also disclosed in the drawings or text. Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, etc.). , conductive film, layer, etc.).

[0031] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal The channel forming region is formed in the channel. A current can be passed between the source and the drain through the channel forming region. In this specification and the like, the channel formation region refers to a region through which current mainly flows.

[0032] Also, the source and drain functions may differ if transistors of different polarities are employed, or This may happen if the direction of the current changes during circuit operation. In this specification and the like, the terms source and drain may be used interchangeably. There is.

[0033] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). The source (source region or source electrode) in the region where the source is formed or the channel forming region This refers to the distance between the transistor and the drain (drain region or drain electrode). In a transistor, the channel length does not necessarily have the same value in all regions. The channel length of the transistor may not be determined to a single value. In the case of the channel formation region, the channel length is either one value, a maximum value, a minimum value, or is the average value.

[0034] The channel width is, for example, the width of the semiconductor (or transistor) in a top view of the transistor. The area where the gate electrode overlaps with the semiconductor (the part of the semiconductor where current flows when the semiconductor is on). In the channel forming region, the channel is formed in a direction perpendicular to the channel length direction. The length of the formation region. In one transistor, the channel width is the length of the entire region. In other words, the channel width of a transistor does not necessarily take the same value. Therefore, in this specification, the channel width is determined based on the channel forming region. The value is any one of the values, the maximum value, the minimum value, or the average value.

[0035] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the transistor is The channel width shown in a top view of the star (hereinafter also referred to as the "apparent channel width") For example, if the gate electrode covers the side of the semiconductor, the effective When the channel width becomes larger than the apparent channel width and its effect cannot be ignored For example, in a transistor that is miniaturized and in which the gate electrode covers the side of the semiconductor, The proportion of the channel formation region formed on the side surface may become large. The effective channel width is larger than the upper channel width.

[0036] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, the effective Channel width is difficult to measure accurately.

[0037] In this specification, when simply referring to the channel width, it refers to the apparent channel width. In this specification, when simply referred to as a channel width, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, The channel width and other parameters can be determined by analyzing cross-sectional TEM images. can.

[0038] The impurities in a semiconductor refer to, for example, anything other than the main component that constitutes the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. This can cause the defect level density of the semiconductor to increase or the crystallinity to decrease. When the semiconductor is an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, For example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, oxide semiconductors, There are transition metals other than the main component of the conductor, such as hydrogen, lithium, sodium, and silicon. These include sulphur, boron, phosphorus, carbon, and nitrogen. Water can also act as an impurity. In addition, for example, impurities can cause oxygen vacancies (V O :oxygen A vacancy may form.

[0039] In this specification, an oxynitride is a compound containing more oxygen than nitrogen. For example, silicon oxynitride has a composition in which oxygen is more abundant than nitrogen. Nitrogen oxide has a higher nitrogen content than oxygen in its composition. For example, silicon nitride oxide has a composition in which the nitrogen content is higher than the oxygen content. many.

[0040] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." The term "conductor" can also be replaced with "conductive film" or "conductive layer." The term "semiconductor" can also be replaced with "semiconductor film" or "semiconductor layer." can.

[0041] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10 degrees or more and 10 degrees or less. Therefore, it includes cases where the angle is between -5 degrees and 5 degrees. In addition, "approximately parallel" means that two straight lines are arranged at an angle of between -30 degrees and 30 degrees. Also, "perpendicular" means that two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it includes the case where the angle is between 85 degrees and 95 degrees. "Perpendicular" refers to two straight lines that form an angle between 60 degrees and 120 degrees.

[0042] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the semiconductor layer of a transistor, Such a metal oxide may be referred to as an oxide semiconductor. In this case, the transistor may be referred to as a transistor having a metal oxide or an oxide semiconductor. can be done.

[0043] In this specification, normally off means that no potential is applied to the gate, or When a ground potential is applied to the gate, the drain current per 1 μm of channel width that flows through the transistor is The input current is 1×10 at room temperature. -20 A or less, 1 x 10 at 85°C -18 Below A , or 1 × 10 at 125°C -16 This means that it is A or below.

[0044] (Embodiment 1) In this embodiment, a transistor 20 according to one embodiment of the present invention will be described with reference to FIGS. 1 to 25. An example of a semiconductor device having 0 and a manufacturing method thereof will be described.

[0045] One embodiment of the present invention is, for example, a transistor including an oxide semiconductor layer and a A semiconductor device including a transistor using an oxide semiconductor layer can be provided. When impurities or oxygen vacancies exist in a region where a channel is formed in the oxide semiconductor layer, In addition, the electrical characteristics may be easily changed and the reliability may be deteriorated. , a defect in which hydrogen enters an oxygen vacancy (hereinafter referred to as V O H) and form a carrier As a result, a channel is formed in the oxide semiconductor layer. If the region contains oxygen vacancies, the transistor will have normally-on characteristics (when no current is applied to the gate electrode). (a characteristic in which a channel exists even without applying voltage, and current flows through the transistor) Therefore, in the region where the channel is formed in the oxide semiconductor layer, impurities, oxygen vacancies, and V O It is preferable that H is reduced as much as possible. The region in the layer where the channel is formed has a reduced carrier concentration and is i-type (intrinsic) or Qualitatively, it is preferable that it be type i.

[0046] On the other hand, oxygen released by heating (hereinafter referred to as excess oxygen) is present in the vicinity of the oxide semiconductor layer. By providing an insulator containing SiO2 and performing heat treatment, the gate insulating film is formed from the insulator. Oxygen is supplied to the oxide semiconductor layer through the insulating film, and oxygen vacancies and V O H can be reduced can.

[0047] However, when oxygen is supplied from the insulator to the gate insulating film, Oxygen may also diffuse into the source and drain electrodes that are in contact with the gate. As a result, the side surfaces of the source and drain electrodes on the channel forming region side are excessively oxidized, and the thickness The formation of such a thick oxide film may cause the source voltage to drop. This hinders the movement of electrons between the gate and drain electrodes and the channel forming region. This can lead to a decrease in the on-state current of the transistor, a decrease in the field-effect mobility, or poor frequency characteristics. Furthermore, the formation of a crystalline oxide on the source and drain electrodes may cause a problem. Variations in the thickness of the oxide film can cause variations in the electrical characteristics of transistors. be.

[0048] Therefore, in the oxide semiconductor layer, a region that functions as a channel formation region and It is preferable that sufficient oxygen is supplied to the vicinity of the source electrode and the drain electrode. It is preferable to prevent the side surface of the silicon nitride film on the channel forming region side from being excessively oxidized.

[0049] Therefore, in the semiconductor device described in this embodiment, the source electrode and the drain electrode A barrier insulating film for reducing oxygen diffusion is provided in contact with the side surface on the channel forming region side. By using this structure, the insulator containing oxygen, which is released by heating, is oxidized through the gate insulating film. When oxygen is diffused into the oxide semiconductor layer, the insulator and the gate insulating film This can reduce the diffusion of oxygen into the source and drain electrodes. By this, the channel formation in the oxide semiconductor layer is The region that functions as the source electrode and the vicinity thereof are supplied with sufficient oxygen. This can prevent the drain electrode from being excessively oxidized.

[0050] In this specification, the term "barrier insulating film" refers to an insulating film having barrier properties. In this specification, the term "barrier property" refers to the function of suppressing the diffusion of a corresponding substance (low permeability). It also refers to the capture and fixation of the corresponding substance (gettering). This refers to the function.

[0051] <Configuration example of semiconductor device> The structure of a semiconductor device having a transistor 200 will be described with reference to FIG. 1A. 1B to 1D are cross-sectional views of the semiconductor device. Here, FIG. 1B is a cross-sectional view of the area indicated by the dashed line A1-A2 in FIG. 1A. 1C is also a cross-sectional view of the transistor 200 in the channel length direction. 1 is a cross-sectional view of a portion indicated by a dashed line in A4, and is a cross-section in the channel width direction of the transistor 200. 1D is a cross-sectional view of the portion indicated by the dashed line A5-A6 in FIG. 1A. Note that in the top view of Figure 1A, some elements have been omitted for clarity.

[0052] The semiconductor device according to one embodiment of the present invention includes an insulator 212 on a substrate (not shown) and a the insulator 214 on the transistor 200; an insulator 280, an insulator 282 on the insulator 280, and an insulator 283 on the insulator 282; and an insulator 285 on the insulator 283. 0, insulator 282, insulator 283, and insulator 285 function as interlayer insulating films. In addition, a conductor 240 (conductor 240a and conductor 240b). Note that conductor 240 functions as a plug. Insulators 241 (insulators 241a and 241b) are provided in contact with the side surfaces of the substrate. Further, on the insulator 285 and the conductor 240, a wiring Conductors 246 (conductors 246a and 246b) that function as lines are provided. .

[0053] In contact with the inner walls of the openings of the insulators 280, 282, 283, and 285 An insulator 241a is provided on the conductor 240a, and the first conductor of the conductor 240a is in contact with the side surface of the insulator 241a. A second conductor, ie, conductor 240a, is provided on the inner side. Insulator 280, insulator 282, and insulator 283 are in contact with the inner walls of the openings of insulator 241b. a first conductor of the conductor 240b is provided in contact with a side surface of the insulator 241b; Further inside, a second conductor of the conductor 240b is provided. 0, a configuration in which a first conductor of the conductor 240 and a second conductor of the conductor 240 are stacked However, the present invention is not limited to this. It may be configured as a single layer or a laminated structure of three or more layers. In this case, they may be distinguished by assigning ordinal numbers in the order of their formation.

[0054] [Transistor 200] As shown in FIGS. 1A-1D, transistor 200 includes an insulator 21 on an insulator 214. 6, and the conductor 205 (conductor 205a, conductor the insulator 216 and the conductor 205. an insulator 222, an insulator 224 on the insulator 222, and an oxide 230a on the insulator 224; Oxide 230b on oxide 230a and oxide 243 on oxide 230b (oxide 243 a, and oxide 243b), conductor 242a on oxide 243a, and conductor 242a the insulator 271a on the oxide 243b, the conductor 242b on the oxide 243b, and the insulator on the conductor 242b. The oxide 271b and the insulator 250 (insulator 250a and insulator 250b) on the oxide 230b. b) and an insulator disposed between the insulator 250 and the conductor 242a or the conductor 242b. 262, and a conductor 260 (conductive) located on the insulator 250 and overlapping a part of the oxide 230b. The insulating layer 222, the insulating layer 224, the oxide layer 230a, and the conductor layer 260b are , oxide 230b, oxide 243a, oxide 243b, conductor 242a, conductor 242b , and an insulator 275 disposed to cover the insulators 271a and 271b. .

[0055] In the following, the oxide 230a and the oxide 230b will be collectively referred to as the oxide 230. In addition, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. In addition, the insulator 271a and the insulator 271b may be collectively referred to as the insulator 271. do.

[0056] Insulator 280 and insulator 275 are provided with openings that reach oxide 230b. The insulator 262, the insulator 250, and the conductor 260 are disposed within the opening. In the channel length direction of the transistor 200, the insulator 271a, the conductor 242a, and and oxide 243a, and insulator 271b, conductor 242b, and oxide 243b. There is provided an insulator 262, a conductor 260, and an insulator 250. The insulator 250 is It has a region that contacts the side surface of the conductor 260 and a region that contacts the bottom surface of the conductor 260.

[0057] The oxide 230 is made up of an oxide 230a disposed on the insulator 224 and an oxide 230b disposed on the insulator 224. and an oxide layer 230b disposed thereon. By having the oxide 230a, the oxide can be removed from the structure formed below the oxide 230a. This can suppress the diffusion of impurities into 230b.

[0058] In the transistor 200, the oxide 230 is divided into oxide 230a and oxide 23 0b are stacked, the present invention is not limited to this. For example, a single layer of oxide 230b or a laminated structure of three or more layers may be provided. Alternatively, the oxide 230a and the oxide 230b may each have a stacked structure.

[0059] The conductor 260 functions as a first gate (also called a top gate) electrode. 205 functions as a second gate (also called a back gate) electrode. 250 functions as a first gate insulating film, and insulators 224 and 222 function as a second gate insulating film. The conductor 242a functions as a gate insulating film for the source electrode or the drain electrode. The conductor 242b functions as one of the source and drain electrodes. In addition, at least a part of the region of the oxide 230 overlapping with the conductor 260 is a channel. It functions as a rubbing region.

[0060] The transistor 200 includes an oxide 230 (oxide 230a and and oxide 230b) and a metal oxide (hereinafter also referred to as an oxide semiconductor) that functions as a semiconductor. It is preferable to use

[0061] In addition, the metal oxide that functions as a semiconductor has a band gap of 2 eV or more, preferably It is preferable to use a material with a band gap of 2.5 eV or more. By using a metal oxide, the off-state current of a transistor can be reduced.

[0062] The oxide 230 may be, for example, In-M-Zn, which has indium, element M, and zinc. Oxides (element M is aluminum, gallium, yttrium, tin, copper, vanadium, Sodium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, la tantalum, tungsten, or magnesium It is preferable to use a metal oxide such as one or more selected from the group consisting of aluminum, etc. 230 may be In-Ga oxide, In-Zn oxide, or indium oxide. .

[0063] Here, the atomic ratio of In to element M in the metal oxide used for the oxide 230b is is greater than the atomic ratio of In to element M in the metal oxide used for oxide 230a. It is preferable that it is large.

[0064] In this way, by disposing the oxide 230a under the oxide 230b, the oxide 230a Diffusion of impurities and oxygen from structures formed below the oxide 230b This can suppress dispersion.

[0065] In addition, the oxide 230a and the oxide 230b have a common element other than oxygen (main component). By doing so, the defect level density at the interface between the oxide 230a and the oxide 230b is reduced. The defect state density at the interface between the oxide 230a and the oxide 230b can be reduced. Therefore, the influence of interface scattering on carrier conduction is small, resulting in a high on-current. is obtained.

[0066] Moreover, it is preferable that the oxide 230b has crystallinity. CAAC-OS(c-axis aligned crystalline oxi It is preferable to use a semiconductor.

[0067] CAAC-OS has a highly crystalline and dense structure, and does not contain impurities or defects (e.g., For example, oxygen deficiency (V O ) and other metal oxides with little content. In particular, after the formation of the metal oxide, Heat treatment at a temperature at which the metal oxide does not become polycrystallized (for example, 400°C or higher and 600°C or lower). By treating the CAAC-OS, it is possible to give it a more highly crystalline and dense structure. In this way, the density of the CAAC-OS is increased, and the impurities in the CAAC-OS are removed. The diffusion of substances or oxygen can be further reduced.

[0068] On the other hand, it is difficult to identify clear grain boundaries in CAAC-OS. Therefore, the decrease in electron mobility due to the CAAC-OS is unlikely to occur. Metal oxides have stable physical properties. Therefore, metal oxides with CAAC-OS Heat resistant and highly reliable.

[0069] In addition, crystalline oxides such as CAAC-OS contain impurities or defects (such as oxygen vacancies). Since it has a dense structure with high crystallinity and few defects, it is suitable for source electrodes or drain electrodes. It is possible to suppress the extraction of oxygen from the oxide 230b by the electrode. Even if heat treatment is performed, oxygen is reduced from being extracted from the oxide 230b. The transistor 200 is stable against high temperatures (so-called thermal budget) during the manufacturing process. It is fixed.

[0070] As described above, the oxide 230b is formed by transferring oxygen from an insulator containing excess oxygen to the channel forming region. At this time, the oxygen is preferably supplied to the conductor 2 through the barrier insulating film. Therefore, in this embodiment, the diffusion of excess oxygen into the silicon dioxide gas 42 is preferably suppressed. As an insulator, an insulator 280 is provided, and oxygen is introduced into the oxide 230b through the insulator 250a. Furthermore, an insulator 262 functioning as a barrier insulating film against oxygen is provided. The diffusion of oxygen into the conductor 242 is suppressed.

[0071] Here, the diffusion of oxygen in the transistor 200 according to this embodiment will be explained with reference to FIG. FIG. 2 is an enlarged view of the vicinity of the channel formation region in FIG. 1B. Note that the arrows in FIG. 2 indicate The symbols indicate the main diffusion paths of oxygen.

[0072] As shown in FIG. 2, oxygen contained in the insulator 280 flows from the insulator 280 to the insulator 250a. The oxide 230b diffuses from the insulator 250a to the oxide 230b. Since the insulator 262 is provided in contact with the surface, the oxygen contained in the insulator 250a is In this way, the oxide 230b can be prevented from diffusing into the insulator 242. When oxygen is supplied from the region in contact with the conductor 250a, the conductor 242a and the conductor 242 A channel forming region can be formed in the region between b.

[0073] It is preferable that the insulator 250b also functions as a barrier insulating film against oxygen. By adopting such a configuration, oxygen contained in the insulator 250a is diffused into the conductor 260. In addition, the insulator 275 and the insulator 271 also have a barrier against oxygen. It is preferable that the insulator 280 functions as an insulating film. The contained oxygen diffuses into the conductor 242 and the oxide 230 without passing through the insulator 250a. This can suppress the risk of

[0074] The insulator 262 is provided between the conductor 242a and the insulator 250a and between the conductor 242b and the insulator 250a. The insulator 262 is disposed between the bodies 250a and 250b. The insulator 262 is formed of oxygen (e.g., oxygen atoms, oxygen molecules, etc.). an insulating material having a function of suppressing the diffusion of at least one of the above (i.e., the material is difficult for the oxygen to permeate) It is preferable to use the insulator 262. The insulator 262 may be a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, or the like. Diffusion of impurities such as atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms It is preferable that the compound has a function of suppressing the above.

[0075] The insulator 262 may be, for example, aluminum oxide, magnesium oxide, or hafnium oxide. Silicon, gallium oxide, indium gallium zinc oxide, silicon nitride, and silicon oxide nitride For example, silicon nitride, which has a high oxygen barrier property, can be used. It is preferable to use aluminum oxide or aluminum oxide. and an aluminum oxide layer is disposed in contact with the aluminum oxide layer. Alternatively, a silicon nitride layer may be disposed so that the silicon nitride layer is in contact with the insulator 250a. When aluminum oxide is used for 262, it may have an amorphous structure.

[0076] When silicon nitride is used for the insulator 262, the oxygen diffusion process shown in FIG. As a result, oxidation may progress in part or all of the insulator 262. In this case, the transistor After formation of the capacitor 200, some or all of the insulator 262 may be made of silicon oxynitride or silicon nitride. It may become silicon dioxide.

[0077] The insulator 262 is formed by, for example, atomic layer deposition (ALD), which has good coating properties. It is preferable to use the ALD method. However, PEALD (Plasma Enhanced Evaporation and Lamination), which allows for a relatively low deposition temperature, is also used. The ALD method is more preferable. The method for forming the insulator 262 is not limited to the ALD method. Instead, sputtering and chemical vapor deposition (CVD) are used. r Deposition), molecular beam epitaxy (MBE) beam epitaxy, pulsed laser deposition (PLD) Deposition method may be used as appropriate.

[0078] The insulator 262 includes an oxide 243a, an oxide 243b, a conductor 242a, and a conductor 242b. , in contact with the side surfaces of the insulators 271a, 271b, 275, and 280. The insulator 262 is preferably provided in contact with at least the side surface of the conductor 242. By adopting such a configuration, the conductor 242 and the insulator 250a are spaced apart. Then, oxygen diffuses from the insulator 250a to the conductor 242, and the oxygen diffuses from the conductor 242 to the conductor 260 side. This can prevent excessive oxide film from being formed on the side surface. The thickness of the oxide film formed on the side surface of the 260 side is preferably less than 10 nm, and It is more preferably less than 100 m, and even more preferably less than 4 nm.

[0079] As shown in FIG. 2, the upper side of the insulator 262 may have a tapered shape. 2, the upper portion of the insulator 280 is also tapered to the side of the insulator 262. In some cases, a tapered shape that is roughly continuous with the original shape may be formed. The size of the opening at the top of the insulator 280 is determined by the size of the opening formed in the conductor 242 or the insulator 275. In other words, the upper part of the side of the insulator 280 is larger than the size of the opening in FIG. 1B, and the shape recedes in the A1 direction, A2 direction, and A3 direction shown in FIG. 1C. In this specification, the term "tapered shape" refers to a shape in which at least a part of the side surface of the structure is tapered relative to the substrate surface. For example, the inclined side surface and the substrate surface form a Preferably the angle is less than 90°.

[0080] In FIG. 2, the insulators 262 and 280 have tapered upper portions. However, the present invention is not limited to this. The tops of the body 262 and the insulator 280 may also have curved surfaces.

[0081] When the upper side of the insulator 262 is tapered, as shown in FIG. In some cases, the top of the insulating member 280 may be lower than the top surface of the insulating member 280. It is preferable that the insulator 250a contacts the insulator 262 above. 0, the top surfaces of the insulator 250a, the insulator 250b, the conductor 260a, and the conductor 260b The heights of the insulators 262 and 263 are approximately the same, and their uppermost surfaces are in contact with the insulator 282. By adopting such a structure, the insulator 28 does not come into contact with the insulator 282 as shown in FIG. At the contact point between the insulator 280 and the insulator 250a, oxygen is diffused from the insulator 280 to the insulator 250a. Therefore, the insulator 280 can supply oxygen to the oxide 230b while the conductive The insulator 262 can prevent the side surfaces of the body 242 from oxidizing.

[0082] As described above, oxygen is supplied to the oxide 230b, and the conductor 242a and the conductor 24 A channel forming region is formed in the region between oxide 2b. 30b is a region 230bc that functions as a channel forming region of the transistor 200, and a region A region that is provided to sandwich the region 230bc and functions as a source region or a drain region. The region 230ba has a conductive layer 230b and a conductive layer 230c. In other words, the region 230bc overlaps the conductor 242a and the conductor 260. The region 230ba is provided in the region between the conductors 242a and 242b. The region 230ba is provided so as to overlap the conductor 242a. The region 230bb is provided so as to overlap the conductor 242b.

[0083] The region 230bc, which functions as a channel forming region, is formed by the region 230ba and the region 230 Compared to bb, it has fewer oxygen vacancies or a lower impurity concentration, resulting in a high resistance with a low carrier concentration. Also, the region 230ba and the region 230b functioning as a source region or a drain region are The region 230bb has many oxygen vacancies or contains impurities such as hydrogen, nitrogen, or metal elements. This region has a high concentration, which increases the carrier concentration and reduces the resistance. The regions 30ba and 230bb have higher and lower carrier concentrations than the region 230bc. It is an area of ​​resistance.

[0084] Here, the carrier concentration of the region 230bc that functions as a channel forming region is 1×10 18 cm -3 Preferably, it is 1×10 or less. 17 cm -3 Less than is preferable 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 More preferably, it is less than 1×10 12 cm -3 It is even more preferable that it is less than Regarding the lower limit of the carrier concentration of the region 230bc that functions as a channel forming region, There is no particular limitation on the size, but for example, 1×10 -9 cm -3 It can be said that:

[0085] In this embodiment, as described above, the insulator 280 containing oxygen that is desorbed by heating is The region 230bc and its vicinity are supplied with sufficient oxygen, and the region 230 This prevents the side surface on the bc side from being excessively oxidized. c) oxygen vacancies, and V O H is removed to make the region 230bc i-type or substantially i-type. Furthermore, the contact resistance between the conductor 242 and the oxide 230b can be reduced. Therefore, fluctuations in the electrical characteristics of the transistor 200 can be suppressed, and reliability can be improved. In addition, in the transistor 200, the on-state current and the field-effect mobility can be reduced. Alternatively, deterioration of frequency characteristics can be suppressed.

[0086] With the above structure, a semiconductor device with a large on-state current can be provided. Alternatively, a semiconductor device having a large field effect mobility can be provided. It is possible to provide a semiconductor device having good characteristics. Alternatively, a semiconductor device with good reliability can be provided. Cut.

[0087] In addition, a carrier concentration is equal to or lower than the carrier concentration of the region 230ba and the region 230bb. Even if a region with a carrier concentration equal to or higher than that of the region 230bc is formed, That is, the area is a region between the area 230bc and the area 230ba or the area 230bb. The junction region functions as a junction region. The junction region has a hydrogen concentration equal to that of the region 230ba and the region 23 The hydrogen concentration is equal to or lower than that of the 0bb region, and is equal to or lower than that of the 230bc region. The junction region may be higher or lower than the oxygen vacancy in the region 230b. a and region 230bb, and the oxygen vacancies in region 230bc are equal to or less than those in region 230bb. It may be equal to or greater than the oxygen deficiency.

[0088] In FIG. 2, the regions 230ba, 230bb, and 230bc are oxide 2 30b, the present invention is not limited to this. For example, each of the above regions may be formed not only with oxide 230b but also with oxide 230a. .

[0089] In addition, it may be difficult to clearly detect the boundaries of each region in the oxide 230. The concentrations of metal elements and impurity elements such as hydrogen and nitrogen detected in each region are The change is not limited to a stepwise change for each region, but may be continuous within each region. The closer to the channel forming region, the more metal elements, hydrogen, nitrogen, etc. It is sufficient that the concentration of the impurity element is reduced.

[0090] As shown in FIG. 2, in a cross-sectional view of the transistor in the channel length direction, oxide 2 A groove is formed in the region of 30b where it overlaps with the insulator 250 and the insulator 262, and the insulating layer 30b is formed in the groove. In some cases, a part of the insulator 250 and the insulator 262 is embedded. The insulating material 260 is formed in contact with the bottom surface of the groove, and the insulating material 262 is formed in contact with the side wall of the groove. In this case, it is preferable that the film thickness of the insulator 250 is approximately the same as the depth of the groove. By adopting such a configuration, when forming an opening for embedding the conductor 260 etc. Even if a damaged area is formed on the surface of the oxide 230b at the bottom of the opening, the damaged area This can improve the electrical characteristics of the transistor 200 due to the damaged region. It is possible to suppress sexual defects.

[0091] In FIG. 2 and the like, the side surface of the lower part of the opening into which the conductor 260 and the like are embedded is covered with the oxide 23. 0b is formed on the surface of the substrate 10. However, this embodiment is not limited to this. For example, the opening may have a U-shape with a gently curved bottom. In addition, for example, the side surface of the lower part of the opening is inclined with respect to the surface on which the oxide 230b is to be formed. That's fine.

[0092] Also, as shown in FIG. 1C, in a cross-sectional view of the transistor 200 in the channel width direction, The oxide 230b may have a curved surface between the side surface and the top surface of the oxide 230b. The edges of the side surfaces and the edges of the top surface may be curved (also called rounded).

[0093] The radius of curvature of the curved surface is greater than 0 nm, and the oxide 2 in the region overlapping with the conductor 242 30b, or less than half the length of the region not having the curved surface. The radius of curvature of the curved surface is preferably more than 0 nm and not more than 20 nm. , preferably 1 nm or more and 15 nm or less, and more preferably 2 nm or more and 10 nm or less. By forming the insulating material 250 and the conductor 260 in this shape, the oxide 230b This can improve the coverage of the surface.

[0094] The oxide 230 preferably has a stacked structure of multiple oxide layers with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the metal element that is the main component The atomic ratio of the element M to be used in the oxide 230b is the same as that of the metal oxide used in the oxide 230b. It is preferable that the atomic ratio of element M to the group element is larger than that of element M. In the metal oxide used, the atomic ratio of element M to In is It is preferable that the atomic ratio of element M to In in the metal oxide is larger than that of element M. In the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is In the metal oxide used in 230a, the atomic ratio of In to element M is greater than that preferable.

[0095] Here, at the junction between the oxide 230a and the oxide 230b, the conduction band minimum is gradually In other words, the conduction band edge at the junction between the oxide 230a and the oxide 230b changes as follows: In other words, it can be said that the acid changes or bonds continuously. When the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b is reduced, good.

[0096] Specifically, the oxide 230a and the oxide 230b have a common element as a main component other than oxygen. By using the oxide 2, it is possible to form a mixed layer with a low defect level density. When 30b is an In-M-Zn oxide, the oxide 230a is an In-M-Zn oxide, M-Zn oxide, oxide of element M, In-Zn oxide, indium oxide, etc. good.

[0097] Specifically, the oxide 230a is In:M:Zn=1:3:4 [atomic ratio] or or a composition in the vicinity thereof, or In:M:Zn=1:1:0.5 [atomic ratio] or in the vicinity thereof In addition, a metal oxide having a composition similar to that of In:M:Zn may be used as the oxide 230b. 1:1:1 [atomic ratio] or a composition close to that, or In:M:Zn=4:2:3 [ In:M:Zn=5:1:3 [atomic ratio] or a composition close to that, or In:M:Zn=5:1:3 [atomic ratio] A metal oxide having a composition close to or equal to the desired atomic composition may be used. The range of the numerical ratio includes ±30%. Furthermore, it is preferable to use gallium as the element M.

[0098] When a metal oxide film is formed by sputtering, the above atomic ratio is The atomic ratio of the metal oxide is not limited to the atomic ratio of the sputtering target used for forming the metal oxide film. It may also be the atomic ratio of the dots.

[0099] By configuring the oxide 230a and the oxide 230b as described above, the oxide 230a and the oxide Therefore, the defect level density at the interface with the oxide 230b can be reduced. The influence of disturbances on carrier conduction is reduced, and the transistor 200 has a large on-current and and high frequency characteristics can be obtained.

[0100] In the transistor 200, the oxide 230 is divided into oxide 230a and oxide 23 0b are stacked, the present invention is not limited to this. For example, a single layer of oxide 230b or a laminated structure of three or more layers may be provided. In addition, each of the oxide 230a and the oxide 230b may have a stacked structure. In addition, when the oxide 230 has a laminated structure of three or more layers, the insulating layer 230 is formed of an insulating material similar to the insulator 250. A portion of the stacked structure of oxide 230 is placed in the opening formed in the body 280 and the insulator 275. It may be formed.

[0101] Insulator 212, insulator 214, insulator 271, insulator 275, insulator 282, and insulator At least one of the insulators 283 is provided to prevent impurities such as water and hydrogen from entering from the substrate side or the transistor side. As a barrier insulating film that suppresses diffusion from above the transistor 200 into the transistor 200 Therefore, the insulators 212, 214, 271, and At least one of the insulator 275, the insulator 282, and the insulator 283 is a hydrogen atom, a hydrogen molecule, or the like. , water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms, etc. The insulating material has the function of suppressing the diffusion of impurities (the impurities are difficult to penetrate). Alternatively, oxygen (for example, at least one of an oxygen atom, an oxygen molecule, etc.) It is preferable to use an insulating material that has a function of suppressing the diffusion of oxygen (i.e., that is difficult for the oxygen to permeate). I wish.

[0102] Insulator 212, insulator 214, insulator 271, insulator 275, insulator 282, and insulator The insulating material 283 may be, for example, aluminum oxide, magnesium oxide, hafnium oxide, Gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon nitride oxide For example, the insulator 212, the insulator 275, and the insulator 283 can be used. It is preferable to use silicon nitride or the like, which has a higher hydrogen barrier property. For example, insulators 214, 271, and 282 may be used to capture and store hydrogen. Aluminum oxide or magnesium oxide, which has a high adhesive property, can be used. This is preferable. Impurities such as water and hydrogen can be easily absorbed through the insulators 212 and 214. This can prevent diffusion from the substrate side to the transistor 200 side. Impurities such as water and hydrogen are trapped in the interlayer insulating film located outside the insulator 283. It is possible to suppress diffusion to the transistor 200 side. The oxygen contained in the insulating layer 212 diffuses to the substrate side through the insulating layer 214. Alternatively, oxygen contained in the insulator 280 or the like can be suppressed by the insulator 282 or the like. Diffusion above the transistor 200 can be suppressed through the The transistor 200 has a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. The insulators 212, 214, 271, 275, 282, and It is preferable to have a structure in which the insulating material 283 surrounds the insulating material 283 .

[0103] Here, the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, and at least one of the insulators 283 is made of an oxide having an amorphous structure. For example, AlO x (x is any number greater than 0), or MgO y (y is 0 It is preferable to use metal oxides such as amorphous metals (any number greater than 100). In metal oxides having the structure, oxygen atoms have dangling bonds, and the dangling bonds In some cases, the ring bonds have the property of capturing or fixing hydrogen. A metal oxide having a semiconductor structure is used as a component of the transistor 200 or By providing the transistor 200 therearound, hydrogen contained in the transistor 200 or The hydrogen present around the transistor 200 can be captured or fixed. It is preferable to capture or fix hydrogen contained in the channel forming region of the sintered body 200. A metal oxide having an amorphous structure is used as a component of the transistor 200, and By providing the transistor 200 with the above-mentioned, it is possible to obtain a transistor with good characteristics and high reliability. The semiconductor device can be fabricated.

[0104] In addition, the insulators 212, 214, 271, 275, 282, and At least one of the insulating layer 281 and the insulating layer 282 is preferably amorphous. A polycrystalline region may be formed. At least one of the insulating material 271, the insulating material 275, the insulating material 282, and the insulating material 283 is amorphous. It may also be a multi-layer structure in which a layer of a ceramic structure and a layer of a polycrystalline structure are stacked. It may also have a laminated structure in which a layer of polycrystalline structure is formed on a layer of amorphous structure.

[0105] Insulator 212, insulator 214, insulator 271, insulator 275, insulator 282, and insulator The insulator 283 may be formed by, for example, sputtering. Since hydrogen is not used as a deposition gas, the insulators 212, 214, and 271 , the hydrogen concentration in the insulators 275, 282, and 283 can be reduced. The film formation method is not limited to sputtering, but may be CVD, MBE, For example, the insulator 275 may be formed by a method such as PLD or ALD. It may be deposited using a good ALD method.

[0106] It may also be desirable to reduce the resistivity of the insulator 212 and the insulator 283. For example, the resistivity of the insulator 212 and the insulator 283 is set to approximately 1×10 13 Ωcm By doing so, in a process using plasma or the like in a semiconductor device manufacturing process, the insulator 212 and and insulator 283 are connected to conductor 205, conductor 242, conductor 260, or conductor 246. Insulator 212 and insulator 283 may be able to mitigate charge buildup. The resistivity of the 10 Ωcm or more 1×10 15 Ωcm or less.

[0107] In addition, the insulators 216 and 280 have a lower dielectric constant than the insulator 214. By using a material with a low dielectric constant as the interlayer insulating film, the parasitic capacitance generated between wirings can be reduced. For example, the insulators 216 and 280 can be made of silicon oxide, Silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, Carbon-doped silicon oxide, carbon- and nitrogen-doped silicon oxide, vacancy-containing acid Silicon dioxide or the like may be used as appropriate.

[0108] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. The conductor 205 is preferably embedded in an opening formed in the insulator 216. It should be noted that a part of the conductor 205 may be embedded in the insulator 214. .

[0109] The conductor 205 includes a conductor 205a, a conductor 205b, and a conductor 205c. The conductor 205a is provided in contact with the bottom surface and sidewall of the opening. The conductive material 205a is provided so as to be embedded in a recess formed in the conductive material 205a. The upper surface of the conductor 205b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. 05c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is the height of the top of the conductor 205a and the height of the insulator 21. 6. In other words, the conductor 205b is located at the same height as the conductor 205a and the conductor The configuration is wrapped in 205c.

[0110] Here, the conductors 205a and 205c are hydrogen atoms, hydrogen molecules, water molecules, nitrogen Diffusion of impurities such as atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms, etc. It is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (e.g., A conductive material having a function of suppressing the diffusion of at least one of oxygen atoms, oxygen molecules, etc. is used. It is preferable that

[0111] The conductor 205a and the conductor 205c are made of a conductive material having a function of reducing the diffusion of hydrogen. By using the material, impurities such as hydrogen contained in the conductor 205b are absorbed into the insulator 224, etc. Diffusion into the oxide 230 can be prevented through the conductor 205a and By using a conductive material having a function of suppressing oxygen diffusion for the conductor 205c, It is possible to prevent the conductor 205b from being oxidized and the conductivity from decreasing. Examples of conductive materials having a suppressing function include titanium, titanium nitride, tantalum, and nitride. It is preferable to use tantalum chloride, ruthenium, ruthenium oxide, etc. The conductive material 205a and the conductive material 205c may be a single layer or a multilayer. For example, the conductor 205a and the conductor 205c may be made of titanium nitride.

[0112] The conductor 205b is a conductive material mainly composed of tungsten, copper, or aluminum. For example, tungsten is preferably used for the conductor 205b. stomach.

[0113] Conductor 205 may function as a second gate electrode. The potential applied to the conductor 5 is changed independently of the potential applied to the conductor 260. By this, the threshold voltage (Vth) of the transistor 200 can be controlled. By applying a negative potential to the conductor 205, the It is possible to increase the Vth of the transistor 200 and reduce the off-state current. Therefore, applying a negative potential to the conductor 205 increases the current density of the conductor 260 compared to when no negative potential is applied. This can reduce the drain current when the potential applied to is 0V.

[0114] As shown in FIG. 1A, the conductor 205 is formed by the conductor 242a of the oxide 230 and the conductor It is preferable that the area is larger than the area that does not overlap with the conductive material 242b. As shown in FIG. 1, the conductor 205 intersects with the channel width direction of the oxide 230a and the oxide 230b. It is preferable that the oxide 2 is extended in the region outside the dividing edge. On the outside of the side surface of the channel width direction of the conductor 30, the conductor 205 and the conductor 260 are It is preferable that the first gate electrode and the second gate electrode overlap each other via an insulator. The electric field of the conductor 260 acting as an electrode and the electric field of the conductor 20 acting as a second gate electrode The electric field of 5 can electrically surround the channel forming region of oxide 230. In this specification, the electric fields of the first gate and the second gate form a channel forming region. The structure of a transistor that electrically surrounds the region is called a surrounded channel ( This is called the S-channel structure.

[0115] In this specification, a transistor with an S-channel structure is a transistor with a pair of gate electrodes. The electric field of one and the other of the transistor electrodes electrically surrounds the channel forming region. The S-channel structure disclosed in this specification is a fin-type structure. The S-channel structure is different from the planar structure. In other words, the transistor is less susceptible to the short channel effect. It is possible.

[0116] As shown in FIG. 1C, the conductor 205 is extended to function as wiring. However, the present invention is not limited to this, and a conductor that functions as a wiring may be provided under the conductor 205. In addition, the conductor 205 does not necessarily have to be provided for each transistor. For example, the conductor 205 may be shared by multiple transistors. stomach.

[0117] In the transistor 200, the conductor 205 includes a conductor 205a, a conductor 205b, and conductor 205c are stacked in the illustrated configuration, but the present invention is not limited to this. For example, the conductor 205 may be provided as a single layer, two layers, or a laminated structure of four or more layers. For example, the conductor 205c may be omitted and the conductor 205a and the conductor 205b may be connected to each other. In this case, the top of the conductor 205a and the bottom of the conductor 205b may be the same. It is sufficient to have a configuration in which the upper surfaces are roughly aligned.

[0118] The insulators 222 and 224 function as gate insulating films.

[0119] The insulator 222 suppresses the diffusion of hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). It is preferable that the insulator 222 has a function of inhibiting oxygen (for example, oxygen atoms, It is preferable that the material has a function of suppressing the diffusion of at least one of oxygen molecules, etc. For example, Insulator 222 inhibits the diffusion of hydrogen and / or oxygen more than insulator 224. It is preferable that the function be

[0120] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is preferable to use an insulator containing an oxide. Examples of the insulator include aluminum oxide and hafnium oxide. oxides containing sulphur, aluminium and hafnium (hafnium aluminate) When the insulator 222 is formed using such a material, 2 is the release of oxygen from the oxide 230 to the substrate side or from the periphery of the transistor 200. It functions as a layer that suppresses the diffusion of impurities such as hydrogen into the oxide 230. By providing the gate electrode 22, impurities such as hydrogen are prevented from diffusing into the inside of the transistor 200. This can suppress the generation of oxygen vacancies in the oxide 230. , the insulator 224 or the oxide 230 can be prevented from reacting with oxygen. do.

[0121] Alternatively, the insulator may be, for example, aluminum oxide, bismuth oxide, or germanium oxide. , niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, oxide Zirconium may be added, or these insulators may be nitrided. The insulator 222 may be silicon oxide, silicon oxynitride, or silicon nitride. may be used in a laminated form.

[0122] The insulator 222 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT Insulators including so-called high-k materials such as (Ba,Sr)TiO3 and (Ba,Sr)TiO3 (BST) The insulating layer may be a single layer or a multilayer. However, thinning the gate insulator may cause problems such as leakage current. By using a high-k material as an insulator that functions as a body, the thickness of the This makes it possible to reduce the gate potential during transistor operation.

[0123] The insulator 224 in contact with the oxide 230 is, for example, silicon oxide, silicon oxynitride, etc. By providing an insulator 224 containing oxygen in contact with the oxide 230, This reduces oxygen vacancies in the oxide 230 and improves the reliability of the transistor 200. The insulator 224 is processed into an island shape so as to overlap with the oxide 230a. In this case, it is preferable that the insulator 275 is disposed on the side surface of the insulator 224 and the top surface of the insulator 222. By adopting such a configuration, the volume of the insulator 224 can be significantly reduced. Insulator 224 and insulator 280 can be separated by insulator 275. The oxygen contained in the insulator 280 diffuses into the insulator 224, and the oxygen in the insulator 224 becomes excessive. It can prevent it from becoming too much.

[0124] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, it is not limited to a laminated structure made of the same material, but may be a laminated structure made of different materials. In FIG. 1B and other figures, the insulator 224 is overlapped with the oxide 230a to form an island shape. However, the present invention is not limited to this. If the amount of oxygen contained in the insulator 224 can be adjusted appropriately, the insulator 224 can be used as a pattern, similar to the insulator 222. It may be configured not to perform scanning.

[0125] In addition, during the manufacturing process of the transistor 200, when the surface of the oxide 230 is exposed, The heat treatment is preferably carried out at a temperature of, for example, 100° C. or higher and 600° C. or lower. The heat treatment is preferably performed at a temperature of 350° C. or higher and 550° C. or lower. Or in an inert gas atmosphere, or oxidizing gas is 10 ppm or more, 1% or more, or For example, it is preferable to carry out the heat treatment in an oxygen atmosphere. This supplies oxygen to the oxide 230, eliminating oxygen vacancies (V O ) can be reduced. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or nitrogen gas. After heat treatment in an active gas atmosphere, oxidizing gas was added at 10p to compensate for the oxygen that was released. The treatment may be carried out in an atmosphere containing at least pm, at least 1%, or at least 10% of an oxidizing gas. After heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more, Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere.

[0126] In addition, by subjecting the oxide 230 to oxygen addition treatment, oxygen vacancies in the oxide 230 are filled with oxygen. In other words, "V O +O→null” reaction. Furthermore, the supplied oxygen reacts with the hydrogen remaining in the oxide 230. This allows the hydrogen to be removed as H2O (dehydration). The hydrogen remaining in the substance 230 recombines with the oxygen vacancy to form V. O inhibits the formation of H It is possible.

[0127] Oxide 243a and oxide 243b are provided on oxide 230b. The oxide 43a and the oxide 243b are spaced apart with the conductor 260 interposed therebetween.

[0128] The oxide 243 (oxide 243a and oxide 243b) has a function of suppressing oxygen permeation. It is preferable that the conductor 242 functioning as a source electrode or a drain electrode. The oxide 243 having the function of suppressing oxygen permeation is disposed between the oxide 230b and the oxide 230a. This may reduce the electrical resistance between the conductor 242 and the oxide 230b. With such a structure, the electrical characteristics and signal quality of the transistor 200 can be improved. The reliability can be improved.

[0129] The oxide 243 may be a metal oxide containing the element M. In particular, the element M may be an aluminum oxide. Aluminum, gallium, yttrium, or tin can be used. It is preferable that the concentration of element M is higher than that of oxide 230b. Gallium may also be used. In addition, the oxide 243 may be a metal oxide such as In-M-Zn oxide. Specifically, in the metal oxide used for the oxide 243, The atomic ratio of the element M to In in the metal oxide used for the oxide 230b is The atomic ratio of the oxide 243 is preferably larger than that of the element M. The thickness of the oxide 243 is preferably 0.5 nm or more. Preferably, it is 5 nm or less, more preferably 1 nm or more and 3 nm or less, and even more preferably 1 nm or more. The oxide 243 preferably has a crystallinity. When 43 has crystallinity, it can suitably suppress the release of oxygen in the oxide 230. For example, if the oxide 243 has a hexagonal crystal structure, the oxide in the oxide 230 It may be possible to suppress the release of elements.

[0130] The conductor 242a is provided in contact with the upper surface of the oxide 243a, and the conductor 242b is provided on the upper surface of the oxide 243a. It is preferable that the conductors 242a and 242b are provided in contact with the upper surfaces of the conductors 242a and 243b. , function as the source electrode and drain electrode of the transistor 200, respectively.

[0131] The conductor 242 (conductor 242a and conductor 242b) may be, for example, tantalum. nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten nitrides containing tantalum and aluminum, nitrides containing titanium and aluminum In one aspect of the present invention, nitrides containing tantalum are particularly preferred. Also, for example, ruthenium oxide, ruthenium nitride, strontium and ruthenium Oxides containing lanthanum, oxides containing lanthanum and nickel, etc. may also be used. , because it is a conductive material that is resistant to oxidation, or a material that maintains its conductivity even when it absorbs oxygen. ,preferable.

[0132] Here, it is preferable to use a film with a large compressive stress as the conductor 242. For example, It is preferable to use tantalum nitride formed by sputtering. The stress causes distortion in the crystal structure of the region 230ba and the region 230bb, Oxygen vacancies V O As a result, the region 230ba and V occurring in region 230bb O As the amount of H increases, the area 230ba and the area 230bb The carrier concentration can be increased to make it n-type.

[0133] The hydrogen contained in the oxide 230b and the like is transferred to the conductor 242a or the conductor 242b. In particular, the conductor 242a and the conductor 242b may contain nitrogen containing tantalum. By using the oxide, hydrogen contained in the oxide 230b etc. is converted into the conductor 242a or the conductor The diffused hydrogen is easily diffused into the conductor 242a or the conductor 242b. In other words, hydrogen contained in the oxide 230b etc. can bond with nitrogen, which is a conductor. It may be absorbed by 242a or conductor 242b.

[0134] In addition, no curved surface is formed between the side surface of the conductor 242 and the top surface of the conductor 242. By forming the conductor 242 without the curved surface, it is possible to This allows the cross-sectional area of ​​the conductor 242 in the cross section in the channel width direction to be increased. This increases the conductivity of the conductor 242 and increases the on-state current of the transistor 200. It is possible.

[0135] The insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is The insulator 271 is provided in contact with the upper surface of the conductor 242b. In this case, the insulator 271 is preferably an amorphous insulating metal oxides, such as aluminum oxide or magnesium oxide, having a structure In particular, aluminum oxide having an amorphous structure can be used as the insulator 271. By using aluminum or amorphous aluminum oxide, hydrogen can be absorbed more effectively. This is preferable because it can be captured or fixed in place, which allows for good properties and reliability. Therefore, a high-performance transistor 200 and a semiconductor device can be manufactured.

[0136] The insulator 271 preferably functions as a barrier insulating film against oxygen. Therefore, it is preferable that the insulator 271 has a function of suppressing the diffusion of oxygen. Preferably, the insulator 271 has a function of suppressing oxygen diffusion more effectively than the insulator 280. In this case, the insulator 271 may be, for example, a nitride containing silicon such as silicon nitride. Objects may also be used.

[0137] The insulator 275 is formed on the top surface of the insulator 222, the side surface of the insulator 224, the side surface of the oxide 230a, Side of oxide 230b, side of oxide 243, side of conductor 242, side of insulator 271 The insulator 275 is provided in contact with the insulators 262, 250, and An opening is formed in the area where the conductor 260 is to be provided.

[0138] In addition, the insulator 275 preferably functions as a barrier insulating film that suppresses the permeation of oxygen. The insulator 275 acts as a barrier insulating film to suppress the diffusion of impurities such as water and hydrogen. It is preferable that the catalyst has a function of capturing impurities such as hydrogen. The insulator 275 may be, for example, aluminum oxide or silicon nitride. It may be used as a single layer or a laminated layer. For example, an aluminum oxide film having an amorphous structure A silicon nitride film may be formed on the silicon nitride film. This structure allows for a higher hydrogen permeability than a single layer of aluminum oxide or silicon nitride. This is preferable because it can improve the oxygen barrier properties.

[0139] By providing the insulators 271, 275, and 262 as described above, oxygen The conductor 242 can be wrapped in an insulator that has a barrier property against the The oxygen contained in the conductor 224, the insulator 280, and the insulator 250a diffuses into the conductor 242. This prevents the insulator 224, the insulator 280, and the insulator The oxygen contained in 250a directly oxidizes the conductor 242, increasing its resistivity and The reduction in current can be suppressed.

[0140] In addition, impurities such as hydrogen are captured in the region sandwiched between the insulator 212 and the insulator 275. By providing the insulators 214, 271, and 275 having the functions of insulating impurities such as hydrogen contained in the body 224 or the insulator 216, and In this case, the amount of hydrogen in the insulator 275 can be set to a constant value. It is preferable that a portion of the aluminum oxide has an amorphous structure.

[0141] The insulator 250 has an insulator 250a and an insulator 250b on the insulator 250a. The insulator 250a functions as a gate insulating film. It is preferable that the insulating material 2 is disposed in contact with the side surface of the insulating material 280. The film thickness of 50 is preferably 1 nm or more and 20 nm or less.

[0142] The insulator 250a may be silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride. Silicon oxide containing fluorine, silicon oxide containing vacancies, etc. can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat. It is preferable that the insulator 250a has a low carbon content in the film.

[0143] However, one embodiment of the present invention is not limited to this. The insulator 250a may have carbon in the film. For example, the carbon concentration of the insulator 250a is preferably determined by SIMS analysis. is 1 x 10 18 atoms / cm 3 5x10 or more 20 atoms / cm 3 Below, more preferred Preferably 5 x 10 18 atoms / cm 3 More than 1×10 20 atoms / cm 3 Below The carbon concentration in the film of the insulator 250a can be measured by SIMS analysis or the like. can be done.

[0144] The insulator 250a, like the insulator 224, is a material containing impurities such as water and hydrogen. Preferably, the intensity is reduced.

[0145] The insulator 250a is formed using an insulator that allows oxygen to easily diffuse when heated. 250b is preferably formed using an insulator that has the function of suppressing the diffusion of oxygen. By adopting such a configuration, when oxygen contained in the insulator 250a is diffused, the conductive The diffusion of oxygen into the oxide 230 can be suppressed. The decrease in the amount of oxygen can be suppressed. For example, the insulator 250b can suppress oxidation of the insulator 260. The structure can be provided using a variety of materials.

[0146] When silicon oxide or silicon oxynitride is used for the insulator 250a, The insulator 250b may be made of an insulating material, such as a high-k material having a high relative dielectric constant. The heat insulator is made of a laminated structure of the insulator 250a and the insulator 250b. It is possible to obtain a stable laminated structure with a high dielectric constant. It is possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator. become.

[0147] The insulator 250b may be, for example, hafnium, aluminum, gallium, or yttrium. um, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium Metal oxides or oxides containing one or more metals selected from the group consisting of cadmium, cadmium, and cadmium-containing metals. Metal oxides that can be used as 230 can be used. In particular, aluminum It is preferable to use an insulator containing oxides of one or both of silicon and hafnium. The insulators include aluminum oxide, hafnium oxide, aluminum and hafnium. It is preferable to use hafnium oxide (hafnium aluminate) or the like. b) a stack of a hafnium oxide film and a silicon nitride film provided on the hafnium oxide film; A membrane may also be used.

[0148] 1B and 1C, the insulator 250 is illustrated as having a two-layer laminated structure. However, the insulator 250 may be formed as a single layer or a laminated structure of three or more layers. Good too.

[0149] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 can be suppressed. In other words, the decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. In addition, oxidation of the conductor 260 due to oxygen in the insulator 250 can be suppressed.

[0150] The metal oxide may function as a part of the first gate electrode. For example, the metal oxide that can be used as the oxide 230 may be the same as the above metal oxide. In this case, the conductor 260a can be formed by sputtering. This reduces the electrical resistance of the metal oxide, making it a conductor. The electrode can be called an Oxide Conductor (Oxide Conductor) electrode.

[0151] By including the metal oxide, the influence of the electric field from the conductor 260 is not weakened. This can improve the on-current of the transistor 200. The physical thickness of the metal oxide maintains the distance between the conductor 260 and the oxide 230. This makes it possible to suppress leakage current between the conductor 260 and the oxide 230. By providing a laminated structure of the insulator 250 and the metal oxide, the conductor 260 and the oxide the physical distance between the conductor 260 and the oxide 230, and the electric field strength from the conductor 260 to the oxide 230. can be easily adjusted appropriately.

[0152] Conductor 260 is disposed on insulator 250b and serves as the first gate of transistor 200. The conductor 260 functions as a base electrode. For example, the conductor 260a is preferably a conductive material. It is preferable that the base 260b is disposed so as to enclose the bottom and sides of the body 260b. As shown in FIG. 1C, the top surface of the conductor 260 is substantially flush with the top surface of the insulator 250 . In addition, in FIG. 1B and FIG. 1C, the conductor 260 is made up of two conductors, 260a and 260b. Although it is shown as a layer structure, it may be a single layer structure or a laminated structure of three or more layers.

[0153] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. It is preferable to use a conductive material that has the function of suppressing the diffusion of impurities such as copper atoms. Alternatively, the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use a conductive material having the function.

[0154] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can prevent the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include titanium and nitride. Titanium, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. are preferably used. It's nice.

[0155] In addition, since the conductor 260 also functions as wiring, a conductor with high conductivity should be used. For example, the conductor 260b is preferably made primarily of tungsten, copper, or aluminum. The conductor 260b may have a laminated structure. For example, a laminated structure of titanium or titanium nitride and the above conductive material may be used.

[0156] In addition, in the transistor 200, the conductor 260 is formed on the insulator 280, etc. The conductor 260 is formed in a self-aligned manner so as to fill the opening. Thus, the conductor 260 is aligned in the region between the conductor 242a and the conductor 242b. As shown in Figure 2, the upper part of the opening In the case where the opening is wider at the bottom, the conductor 260 is also wider at the top than at the bottom. It becomes a shape.

[0157] 1C, insulator 2 When the bottom surface of the conductor 260 is taken as the reference, the conductor 260 and the oxide 230b overlap. The height of the bottom surface of the non-contact region is preferably lower than the height of the bottom surface of the oxide 230b. A conductor 260 that functions as a gate electrode is connected to the oxide 230b via an insulator 250 or the like. By covering the side and top surfaces of the channel forming region, the electric field of the conductor 260 is oxidized. Therefore, the entire channel forming region of the transistor 200 The on-state current of the insulator 222 can be increased, and the frequency characteristics can be improved. As a standard, the oxide 230a and the oxide 230b do not overlap with the conductor 260. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in the thin region is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, more preferably 5 The thickness is between 100 nm and 200 nm.

[0158] Insulator 280 is disposed on insulator 275 and separates insulator 262, insulator 250, and conductor 262. An opening is formed in the area where the insulator 260 is to be provided. In this case, the top surface of the insulator 280 may be planarized. It is preferable that the upper surface of the insulator 280 is approximately flush with the upper surface of the conductor 260. Preferably, it is in contact with the insulator 250a on 262.

[0159] The insulator 280 that functions as an interlayer insulating film preferably has a low dielectric constant. By using a thin material for the interlayer insulating film, the parasitic capacitance that occurs between wirings can be reduced. The edge 280 is preferably made of the same material as the insulator 216. Silicon oxide and silicon oxynitride are preferred because they are thermally stable. Materials such as silicon, silicon oxynitride, and silicon oxide with vacancies are desorbed by heating. This is preferable because it allows for easy formation of a region containing oxygen.

[0160] The insulator 280 may have excess oxygen, similar to the insulator 224. 280 is preferably a material having a reduced concentration of impurities such as water and hydrogen. 280 can be made of silicon oxide, silicon oxynitride, or other oxides containing silicon. By providing the insulator 280 in contact with the insulator 250a, The oxygen can be supplied to the oxide 230. By reducing the element defect, the reliability of the transistor 200 can be improved.

[0161] The insulator 282 is disposed on the top surface of the insulator 280, the top surface of the insulator 250, and the top surface of the conductor 260. The insulator 282 is, for example, an insulator such as aluminum oxide. The insulator 282 may be formed of aluminum oxide by sputtering. By filming, excess oxygen can be contained in the insulator 280. The insulator 282 is made of water, As a barrier insulating film that suppresses the diffusion of impurities such as hydrogen from above into the insulator 280 It is preferable that the catalyst has a function of capturing impurities such as hydrogen. In addition, the insulator 282 preferably functions as a barrier insulating film that suppresses oxygen permeation. In the region between the insulator 212 and the insulator 283, hydrogen or the like is in contact with the insulator 280. By providing the insulator 282 having the function of capturing impurities, the insulator 280 and the like can be prevented from being included in the insulator 282. It is possible to capture impurities such as hydrogen that are released into the atmosphere and keep the amount of hydrogen in the area at a constant value. In particular, the insulator 282 can be aluminum oxide having an amorphous structure, or By using amorphous aluminum oxide, hydrogen can be captured or fixed more effectively. This is preferable because it may be possible to bond the A resistor 200 and a semiconductor device can be fabricated.

[0162] The insulator 283 prevents impurities such as water and hydrogen from diffusing from above into the insulator 280. The insulator 283 functions as a barrier insulating film. The insulating layer 283 may be a silicon-containing nitride such as silicon nitride or silicon nitride oxide. For example, a film formed by sputtering is preferably used as the insulator 283. Silicon nitride may be used. The insulator 283 is formed by sputtering, It is possible to form a silicon nitride film that has high conductivity and is less likely to form voids. 283, a silicon nitride film was formed by sputtering, and then a silicon nitride film was formed by ALD. A silicon nitride film may be laminated. By using such a structure, sputtering Even if defects, such as voids, occur in the silicon nitride film formed by the coating method, AL has good coating properties. The voids are filled with silicon nitride film formed by the D method to improve sealing performance. This is preferable because it is possible to

[0163] The insulator 285 is provided on the insulator 283. The insulator 285 is, for example, It is preferable to use the same material as that of the insulating layer 10. In particular, silicon oxide and silicon oxynitride are preferable. 1B and 1C, the insulator 285 is preferably used because it is thermally stable. However, the present invention is not limited to this structure. Alternatively, the conductor 246 may be provided in contact with the insulator 283 .

[0164] The conductors 240a and 240b are mainly made of tungsten, copper, or aluminum. It is preferable to use a conductive material containing the conductive material 240a and the conductive material 240b. 0b may have a laminated structure.

[0165] In addition, when the conductor 240 has a laminated structure, the conductor in contact with the insulator 241 contains water, It is preferable to use a conductive material that has the function of suppressing the permeation of impurities such as silicon. Examples include tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, and ruthenium oxide. It is preferable to use a conductive material that has the function of suppressing the permeation of impurities such as water and hydrogen. The insulating material may be used in a single layer or a laminated layer. Impurities such as hydrogen are mixed into the oxide 230 through the conductors 240a and 240b. This can prevent the

[0166] The insulator 241a and the insulator 241b may be an insulator 275 or the like. For example, the insulators 241a and 241b may be formed of a barrier insulating film such as An insulator such as silicon nitride, aluminum oxide, or silicon nitride oxide may be used. For example, an aluminum oxide film and a silicon nitride film are used as the insulators 241a and 241b. The insulator 241a and the insulator 241b may be a laminated film of the insulator 283. , and the insulator 282 and the insulator 271 are provided in contact with each other. Impurities such as water and hydrogen are absorbed into the oxide 23 through the conductors 240a and 240b. In particular, silicon nitride has a high barrier property against hydrogen. In addition, the oxygen contained in the insulator 280 is preferably This can prevent it from being absorbed by 240b.

[0167] In addition, the conductive material 240a and the conductive material 240b are in contact with each other at the upper surface thereof and function as wiring. Conductor 246 (conductor 246a and conductor 246b) may be arranged. 46 uses conductive materials whose main components are tungsten, copper, or aluminum. The conductor may also have a laminated structure, for example, titanium or titanium nitride. The conductive material may be a laminate of a metal and the conductive material. It may be formed so as to be embedded in the opening.

[0168] <Materials for semiconductor devices> The following describes constituent materials that can be used in semiconductor devices.

[0169] <<Substrate>> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or A conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, and silicon substrates. Fire substrate, stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), resin substrate Semiconductor substrates include those made of silicon or germanium. semiconductor substrates, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of gallium oxide, zinc oxide, and gallium oxide are also available. A semiconductor substrate having an insulating region inside the semiconductor substrate, for example, SOI (Silicon on Insulator) Conductive substrates include graphite substrates and metal substrates. , alloy substrates, conductive resin substrates, etc. Or, substrates having metal nitrides, metal oxides, etc. Furthermore, there are substrates in which a conductor or semiconductor is provided on an insulating substrate. Substrate, substrate with conductor or insulator provided on semiconductor substrate, substrate with semiconductor or insulator provided on conductive substrate There are also substrates with elements mounted on them. The elements provided on the substrate may include a capacitance element, a resistance element, a switch element, a light-emitting element, and the like. There are various types of memory elements.

[0170] <<Insulators>> Insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. These include metal oxide nitrides, metal oxynitrides, and metal oxynitrides.

[0171] For example, as transistors become smaller and more highly integrated, the gate insulator becomes thinner. This can cause problems such as leakage current. By using high-k materials, the voltage required for transistor operation can be reduced while maintaining the physical film thickness. On the other hand, the insulator that functions as the interlayer insulating film is made of a material with a low relative dielectric constant. By doing so, the parasitic capacitance between the wirings can be reduced. The material should be selected accordingly.

[0172] Insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. oxides with aluminum, aluminum and hafnium, oxides with silicon and hafnium, oxides with silicon and hafnium, Examples include oxynitrides with hafnium, or nitrides with silicon and hafnium.

[0173] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, Silicon oxide doped with carbon and nitrogen, silicon oxide with vacancies, or resin be.

[0174] In addition, transistors using metal oxides suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of stabilizing the electrical characteristics of the transistor, Insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include: For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, Phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum Insulators containing tantalum, neodymium, hafnium, or tantalum are used, either in a single layer or in a multilayer configuration. Specifically, an insulating material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen is used. As a body, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, Metal oxides such as tantalum nitride, aluminum nitride, silicon nitride oxide, silicon nitride, etc. The following metal nitrides can be used.

[0175] In addition, the insulator that functions as the gate insulator has a region containing oxygen that is desorbed by heating. For example, it is preferable that the insulating material has a region containing oxygen that is desorbed by heating. By forming a structure in which silicon oxide or silicon oxynitride is in contact with the oxide 230, the oxide The oxygen deficiency of 230 can be compensated for.

[0176] <<Conductors>> Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, Zirconium, Beryllium, Indium, Ruthenium, Iridium, Strontium Metal elements selected from ammonium, lanthanum, etc., or alloys containing the above-mentioned metal elements It is preferable to use an alloy or the like that combines the above-mentioned metal elements. For example, tantalum nitride titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel, or an oxide containing lanthanum and nickel. Tantalum, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitride, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation or absorb oxygen. It is a material that maintains conductivity even after oxidation, and is therefore preferred. Highly conductive semiconductors, such as polycrystalline silicon, nickel silicide, Silicide may also be used.

[0177] Alternatively, a plurality of conductive layers made of the above materials may be stacked. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated layer that combines the material containing the metal element and the conductive material containing nitrogen is also available. In addition, a material containing the above-mentioned metal element, a conductive material containing oxygen, and a material containing nitrogen may be used. A laminated structure may be formed by combining a conductive material containing a silicon dioxide.

[0178] When an oxide is used for the channel formation region of a transistor, The conductor that functions as a conductive material is a material containing the above-mentioned metal element and a conductive material containing oxygen. In this case, it is preferable to use a laminated structure in which a conductive material containing oxygen is used. It is preferable to provide the conductive material containing oxygen on the channel forming region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel formation region.

[0179] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate electrode. It is preferable to use a conductive material containing a metal element and oxygen. Conductive materials containing metal elements and nitrogen may also be used. For example, titanium nitride or titanium nitride. Conductive materials containing nitrogen, such as indium tin oxide, tin oxide, etc., may also be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc Lead oxide and silicon-doped indium tin oxide may also be used. Indium gallium zinc oxide may also be used. By using such a material, In some cases, hydrogen contained in the metal oxide can be captured by the catalyst. In some cases, it may be possible to capture hydrogen that enters from insulators on the other side.

[0180] <<Metal oxides>> The oxide 230 is a metal oxide (oxide semiconductor) that functions as a semiconductor. The following describes metals applicable to the oxide 230 and oxide 243 according to the present invention. The oxide will be explained.

[0181] The metal oxide preferably contains at least indium or zinc. It is preferable that the alloy contains aluminum and zinc. It is preferable that the alloy contains boron, titanium, iron, nickel, or the like. Nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, One selected from aluminum, tantalum, tungsten, magnesium, cobalt, etc. Or, multiple types may be included.

[0182] Here, the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. The element M can be aluminum, gallium, yttrium, or The element M is tin. Other elements that can be used for M include boron, titanium, iron, and nickel. Ru, Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium However, the elements M and tantalum are also included. In some cases, a combination of the above elements may be used.

[0183] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). Nitrogen-containing metal oxides are also called metal oxide nitrides (m etal oxynitride).

[0184] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to FIG. 3A. FIG. 3A shows an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn). FIG. 1 is a diagram illustrating the classification of crystal structures of gallium nitrides.

[0185] As shown in Figure 3A, oxide semiconductors can be broadly divided into "amorphous" and " ", "Crystalline" and "Crystal" Also, "Amorphous" includes completely amorp Also, "Crystalline" includes CAAC (c-ax is-aligned crystalline), nc(nanocrystalli ne), and CAC (cloud-aligned composite) ( excluding single crystal and poly crystal l). The classification of "Crystalline" includes single crystal, Polycrystalline and completely amorphous materials are excluded. Also, "Crystal" includes single crystal and poly Contains crystals.

[0186] The structures within the bold frame in Figure 3A are classified into two types: "Amorphous" and "Crystalline". It is an intermediate state between "crystal" and "new crystal" This structure belongs to the line phase. It is completely different from stable "Amorphous" and "Crystal". This can be rephrased as a different structure.

[0187] The crystal structure of the film or substrate can be determined by X-ray diffraction (XRD). The crystallinity can be evaluated using the crystallinity spectrum. The GIXD (Grazing-Incidence) of CAAC-IGZO films The XRD spectrum obtained by the GIXD measurement is shown in Figure 3B. This is also called the Seemann-Bohlin method. The obtained XRD spectrum is simply referred to as the XRD spectrum. The composition of the C-IGZO film is approximately In:Ga:Zn=4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 3B is 500 nm.

[0188] As shown in Figure 3B, the XRD spectrum of the CAAC-IGZO film shows clear crystallinity. Specifically, the XRD spectrum of the CAAC-IGZO film shows the following peaks: A peak indicating the c-axis orientation is detected near 2θ=31°. The peak near 2θ=31° is asymmetric with respect to the angle at which the peak intensity is detected.

[0189] The crystal structure of the film or substrate was also analyzed by nanobeam electron diffraction (NBED). Diffraction patterns (ultra-small) observed by electron diffraction It can be evaluated by the electron diffraction pattern. The folding pattern is shown in Figure 3C. Figure 3C shows the NBED in which the electron beam is incident parallel to the substrate. The diffraction pattern observed by the CAAC-IGZO film shown in Figure 3C is The composition is approximately In:Ga:Zn=4:2:3 [atomic ratio]. In this case, electron diffraction is performed with a probe diameter of 1 nm.

[0190] As shown in Figure 3C, the diffraction pattern of the CAAC-IGZO film shows multiple c-axis orientations. spots are observed.

[0191] <<Oxide semiconductor structure>> When focusing on the crystal structure, oxide semiconductors may be classified differently from those shown in FIG. 3A. For example, oxide semiconductors are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors and pseudo-non-crystalline oxide semiconductors. amorphous-like oxide semiconductor (a-like OS) semiconductor), amorphous oxide semiconductor, etc.

[0192] Here, for details on the above-mentioned CAAC-OS, nc-OS, and a-like OS, , and provide an explanation.

[0193] [CAAC-OS] The CAAC-OS has multiple crystalline regions, each of which has a c-axis aligned in a specific direction. The specific direction is the thickness direction of the CAAC-OS film. , in the normal direction to the surface on which the CAAC-OS film is formed, or in the normal direction to the surface of the CAAC-OS film. The crystalline region is a region in which the atomic arrangement has periodicity. When viewed as a crystal arrangement, the crystalline region is also a region with a uniform lattice arrangement. The OS has a region where multiple crystalline regions are connected in the ab-plane direction, and this region has strain. The distortion may occur in a region where multiple crystal regions are connected. The area where the orientation of the lattice arrangement changes between a region with one lattice arrangement and a region with a different lattice arrangement. In other words, the CAAC-OS has a c-axis orientation and no clear orientation in the ab-plane direction. It is an oxide semiconductor that has not been

[0194] Each of the plurality of crystalline regions is made up of one or more minute crystals (maximum diameter 10 When a crystalline region is made up of a single microcrystal (crystals less than 1 nm in size), The maximum diameter of the crystalline region is less than 10 nm. When such crystal regions are formed, the size of the crystal regions may be on the order of several tens of nanometers.

[0195] In-M-Zn oxide (element M is aluminum, gallium, yttrium, sulphur, CAAC-OS is a material selected from the group consisting of aluminum, titanium, and other materials. A layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the O layer) are formed. A layered crystal structure (also called a layered structure) is formed by stacking a layer having an element (hereinafter referred to as an (M, Zn) layer) and a layer having an element (hereinafter referred to as an (M, Zn) layer). Indium and element M are mutually substitutable. The (M,Zn) layer may contain indium. The In layer contains the element M. The In layer may contain Zn. In high-resolution TEM images, this is observed as a lattice pattern.

[0196] For example, when the structure of the CAAC-OS film is analyzed using an XRD device, the θ / 2θ phase In the out-of-plane XRD measurement using a can, two peaks indicating the c-axis orientation were observed. The peak indicating the c-axis orientation is detected at or near θ=31°. ) may vary depending on the type and composition of the metal elements that make up the CAAC-OS.

[0197] For example, in the electron diffraction pattern of the CAAC-OS film, multiple bright spots (spots) Note that one spot and another spot are the incident electron beams that have passed through the sample. The spot (also called the direct spot) is the center of symmetry, and the points are observed at positions that are point-symmetric. can be.

[0198] When the crystalline region is observed from the specific direction, the lattice arrangement within the crystalline region is a hexagonal lattice. However, the unit cell is not necessarily a regular hexagon, and may be a non-regular hexagon. The above distortion may have a lattice arrangement such as a pentagon or heptagon. -In OS, clear grain boundaries were confirmed even near the strain. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the arrangement of oxygen atoms in the CAAC-OS is close-packed in the ab-plane direction. or the bond distance between atoms changes due to the substitution of metal atoms. This is thought to be because distortion can be tolerated.

[0199] The crystal structure in which clear grain boundaries are observed is called polycrystal. The grain boundaries act as recombination centers, trapping carriers and forming transistors. It is highly likely that this will cause a decrease in on-state current and a decrease in field effect mobility. CAAC-OS, which has no visible grain boundaries, has a crystalline structure suitable for the semiconductor layer of a transistor. It is one of the crystalline oxides containing Zn to form CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are made of In oxide. This is preferable because it can suppress the generation of grain boundaries more effectively than oxides.

[0200] CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, the CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. In addition, the crystallinity of oxide semiconductors is degraded by the incorporation of impurities or the generation of defects. Therefore, CAAC-OS is an oxidized material with few impurities and defects (such as oxygen vacancies). Therefore, oxide semiconductors with CAAC-OS have stable physical properties. Therefore, oxide semiconductors having CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is designed to withstand the high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when a CAAC-OS is used for an OS transistor, This allows for greater freedom.

[0201] [nc-OS] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). In other words, nc-OS has a periodic atomic arrangement in the region of 3 nm or less. It has small crystals. The size of the minute crystals is, for example, 1 nm or more and 10 nm or less. Since the size of these tiny crystals is between 1 nm and 3 nm, they are also called nanocrystals. In nc-OS, there is no regularity in the crystal orientation between different nanocrystals. Therefore, depending on the analytical method, nc-OS may be considered as a-like In some cases, it is difficult to distinguish between OS and amorphous oxide semiconductors. For example, in an nc-OS film, On the other hand, when structural analysis is performed using an XRD device, out-of- In the plane XRD measurement, no peaks indicating crystallinity were detected. In contrast, electron beams with a probe diameter larger than that of nanocrystals (e.g., 50 nm or larger) are used. When performing selected area electron diffraction (also called selected area electron diffraction), a diffraction pattern like a halo pattern appears. On the other hand, for the nc-OS film, the size of the nanocrystals is close to or smaller than that of the nanocrystals. Electron beam diffraction (nano-beam diffraction) using an electron beam with a small probe diameter (for example, 1 nm to 30 nm) When electron beam diffraction is performed, a ring-shaped area is detected around the direct spot. In some cases, an electron diffraction pattern is obtained in which multiple spots are observed within a single electron beam.

[0202] [a-like OS] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. A-like OS has pores or low density regions. The OS has lower crystallinity than the nc-OS and CAAC-OS. The OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0203] <<Oxide semiconductor structure>> Next, the details of the above-mentioned CAC-OS will be explained. Regarding the formation of

[0204] [CAC-OS] CAC-OS is a type of metal oxide in which the elements constituting the metal oxide are 0.5 nm to 10 nm in size. Preferably, the material is unevenly distributed in a size of 1 nm to 3 nm or in the vicinity thereof. In the following, it is assumed that one or more metal elements are unevenly distributed in a metal oxide. The region having the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A mixed state of particles with sizes of less than 1 m or close to that size is called a mosaic or patch state. .

[0205] Furthermore, CAC-OS is a material that is separated into a first region and a second region. The first region has a structure distributed throughout the film (also called a cloud structure). In other words, the CAC-OS has a structure in which the first area and the second area are mixed. It is a composite metal oxide having the following composition.

[0206] Here, the I ratio of the metal elements constituting the CAC-OS in the In-Ga-Zn oxide is The atomic ratios of n, Ga, and Zn are defined as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region has [In] higher than the [In] in the second region. In this region, [Ga] is larger than [Ga] in the first region. In addition, the second region has a larger [Ga] than the [Ga] in the first region and a smaller [I [n] is smaller than [In] in the first region.

[0207] Specifically, the first region is mainly composed of indium oxide, indium zinc oxide, etc. The second region is a region containing gallium oxide, gallium zinc oxide, etc. In other words, the first region is called a region in which In is the main component. The second region can be rephrased as a region containing Ga as the main component. It is possible.

[0208] Note that there are cases where a clear boundary between the first region and the second region cannot be observed. .

[0209] For example, in the case of CAC-OS in In-Ga-Zn oxide, energy dispersive X-ray diffraction (EDX) Optical method (EDX:Energy Dispersive X-ray spectrosc) The EDX mapping obtained using the opy revealed a region containing In as the main component (the first region). The structure has a structure in which a first region (a first region) and a region (a second region) mainly composed of Ga are unevenly distributed and mixed. It can be confirmed that this is the case.

[0210] When CAC-OS is used in a transistor, the conductivity due to the first region and the conductivity due to the second region are The insulating properties due to the region act complementary to each other to provide a switching function (On In other words, the CAC-OS and has a conductive function in a part of the material and an insulating function in a part of the material, and By separating the conductive function from the insulating function, Therefore, by using CAC-OS in transistors, This allows for a high on-state current (I on ), high field-effect mobility (μ), and good switching This allows for realizing a switching operation.

[0211] Oxide semiconductors have a variety of structures, each of which has different characteristics. The oxide semiconductors in Two or more of AC-OS, nc-OS, and CAAC-OS may be included.

[0212] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0213] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be realized. Furthermore, a highly reliable transistor can be realized.

[0214] An oxide semiconductor with a low carrier concentration is used for the channel formation region of a transistor. For example, the carrier concentration of the channel formation region of the oxide semiconductor is preferably 1×10 17 c m -3 Less than 1 × 10 15 cm -3 or less, more preferably 1 × 10 13 cm -3 Less than or equal to 1×10 11 cm -3 or less, more preferably 1 × 10 10 c m -3 Less than 1 x 10 -9 cm -3 The carrier of the oxide semiconductor film In the case of lowering the concentration, the impurity concentration in the oxide semiconductor film is lowered, and the defect state density In this specification and the like, a low impurity concentration and a low defect level density are An oxide semiconductor having a low carrier concentration is referred to as a highly purified intrinsic oxide semiconductor or a substantially highly purified intrinsic oxide semiconductor. This may be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0215] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Therefore, the trap level density may also be low.

[0216] In addition, the time required for the charges trapped in the trap levels of the oxide semiconductor to disappear is Therefore, the trap level density is high. A transistor in which a channel formation region is formed in an oxide semiconductor has unstable electrical characteristics. This may be the case.

[0217] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor In order to reduce the impurity concentration in the oxide semiconductor, it is effective to reduce It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0218] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0219] When silicon or carbon, which is one of the Group 14 elements, is contained in an oxide semiconductor, Defect states are formed in the oxide semiconductor. and the concentration of silicon or carbon in the region near the interface with the channel formation region of the oxide semiconductor. The silicon or carbon concentration of the The concentration obtained by ion mass spectrometry was 2 × 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0220] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect levels are formed. Therefore, alkali metals or alkaline earth metals may be included. Transistors using oxide semiconductors, which are widely used in semiconductors, tend to be normally on. Therefore, the alkali metal or alkali metal in the channel formation region of the oxide semiconductor obtained by SIMS The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 1 6 atoms / cm 3 Do the following:

[0221] In addition, when nitrogen is contained in an oxide semiconductor, electrons that serve as carriers are generated, and As a result, the nitrogen-containing oxide semiconductor becomes a semiconductor. The transistors used for the oxide semiconductors tend to be normally on. Therefore, if nitrogen is contained, trap levels may be formed. Therefore, the electrical properties of the oxide semiconductor obtained by SIMS may become unstable. The nitrogen concentration in the channel formation region is set to 5×10 19 atoms / cm 3 Less than, preferably 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 Do the following:

[0222] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the electron carrier In addition, some of the hydrogen atoms may bond with the oxygen atoms that bond with the metal atoms, forming chiral ions. Therefore, it is necessary to use an oxide semiconductor containing hydrogen. Therefore, the transistors with the oxide semiconductor channel are likely to be normally on. It is preferable that the hydrogen in the hole formation region is reduced as much as possible. In the channel formation region of the oxide semiconductor, the hydrogen concentration obtained by SIMS is 1×1 0 20 atoms / cm 3 Less than 5 x 10 19 atoms / cm 3 Less than, more than Preferably 1 x 10 19 atoms / cm 3 less than 5 × 10 18 ato ms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0223] By using an oxide semiconductor with sufficiently reduced impurities for a channel formation region of a transistor, This makes it possible to impart stable electrical properties.

[0224] <<Other semiconductor materials>> The semiconductor materials that can be used for the oxide 230 are not limited to the above-mentioned metal oxides. As the compound 230, a semiconductor material having a band gap (a semiconductor that is not a zero-gap semiconductor) For example, semiconductors of elemental elements such as silicon, gallium arsenide, etc. Compound semiconductors, layered materials (also called atomic layer materials, two-dimensional materials, etc.) that function as semiconductors It is preferable to use layered materials that function as semiconductors. is preferably used as the semiconductor material.

[0225] In this specification, the term "layered material" is a general term for a group of materials having a layered crystal structure. The layered crystalline structure is formed by layers formed by covalent or ionic bonds. Stacking occurs through bonds weaker than covalent and ionic bonds, such as Le Waals forces Layered materials have high electrical conductivity within the unit layer, that is, two-dimensional electrical conduction. It functions as a semiconductor and has high two-dimensional electrical conductivity. By using the above-mentioned compound semiconductor layer, a transistor with a large on-state current can be provided.

[0226] Layered materials include graphene, silicene, and chalcogenides. is a compound containing chalcogen. Chalcogen is also a general term for elements belonging to Group 16. and includes oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Chalcogenides include transition metal chalcogenides and group 13 chalcogenides. .

[0227] The oxide 230 may be, for example, a transition metal chalcogenide that functions as a semiconductor. Specific examples of transition metal chalcogenides that can be used as the oxide 230 include: These include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoS e2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically W S2), tungsten selenide (typically WSe2), tungsten telluride (typically is WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically Typical examples include ZrSe2).

[0228] <Method for manufacturing semiconductor device> Next, a manufacturing method of the semiconductor device of one embodiment of the present invention shown in FIGS. 1A to 1D will be described with reference to FIGS. 4A to 17A, 4B to 17B, 4C to 17C, and 4D to 17D. This will be explained using:

[0229] 4A to 17A show top views, and FIGS. 4B to 17B show top views of the components shown in FIGS. 1 is a cross-sectional view corresponding to the portion indicated by the dashed line A1-A2 in FIG. 1A, 4A to 17A are cross-sectional views in the channel length direction. 1 is a cross-sectional view corresponding to the portion indicated by the dashed line A3-A4 in FIG. 4A to 17A are cross-sectional views in the width direction of the panel. 4A to 17A are cross-sectional views of the portion indicated by the dashed line in FIG. Some elements have been omitted for clarity of illustration.

[0230] In the following, insulating materials for forming insulators and conductive materials for forming conductors are used. The semiconductor materials used to form semiconductors are deposited by sputtering, CVD, MBE, etc. The film can be formed by using a suitable method such as a PLD method or an ALD method.

[0231] The sputtering method uses RF sputtering, which uses a high frequency power source. the ring method, the DC sputtering method using a DC power supply, and the method using a pulsed current applied to the electrode. There is a pulsed DC sputtering method that changes the pressure. The RF sputtering method is mainly used for insulating films. DC sputtering is mainly used to form conductive metal films. In addition, the pulsed DC sputtering method is mainly used to deposit oxides, nitrides, carbides, etc. It is used when depositing a compound film using the reactive sputtering method.

[0232] The CVD method is a plasma CVD (PECVD) method that uses plasma. Enhanced CVD (sometimes called plasma chemical vapor deposition), which uses heat Thermal CVD (TCVD) is a method that uses a thin film of silicon dioxide, and Photo-CVD (Ph Furthermore, depending on the source gas used, it can be classified into metal CVD (MC CVD) and other methods. VD: Metal CVD) method, organometallic CVD (MOCVD: Metal Organ It can be divided into two methods: (organic chemical vapor deposition) and (metal organic chemical vapor deposition). .

[0233] The plasma CVD method can produce high-quality films at relatively low temperatures. This film formation method does not use a plasma, so it is possible to reduce plasma damage to the object being treated. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device ) may become charged up by receiving an electric charge from the plasma. When accumulated electric charges destroy wiring, electrodes, elements, etc. included in a semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. In addition, the thermal CVD method can increase the yield of semiconductor devices. Since no plasma damage occurs in the film, a film with few defects can be obtained.

[0234] In addition, the ALD method involves reacting precursors and reactants using only thermal energy. Thermal ALD method, P using plasma-excited reactants The EALD method or the like can be used.

[0235] In addition, the ALD method utilizes the self-regulating properties of atoms to deposit atoms one layer at a time. This allows for ultra-thin film deposition, film deposition on structures with high aspect ratios, and pinholes. It is possible to form films with few defects such as holes, and to form films with excellent coverage, and to form films at low temperatures. The PEALD method uses plasma, which allows film formation at lower temperatures. In addition, the precursors used in the ALD method contain impurities such as carbon. Therefore, films formed by the ALD method may be different from films formed by other film formation methods. The amount of impurities may be higher than that of the film that has been treated. X-ray Photoelectron Spectros (XPS) This can be done using the copy function.

[0236] The CVD and ALD methods are film formation methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is less affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it suitable for forming thin films with high aspect ratios. However, the ALD method is relatively slow in forming films. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a high deposition rate. may be preferable.

[0237] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having the following composition. By changing the flow rate ratio of the source gases while oxidizing, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film using a vacuum, the time required for transport and pressure adjustment is eliminated, so the time required for film formation is shorter. Therefore, the productivity of the semiconductor device can be improved. There is.

[0238] First, a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate (FIG. 4A). (See FIGS. 4A to 4D.) The insulator 212 is preferably formed by sputtering. By using a sputtering method that does not require the use of hydrogen as a deposition gas, the insulator 21 However, the insulator 212 is formed by sputtering. The method is not limited to the deposition method, but may be a CVD method, an MBE method, a PLD method, an ALD method, or the like. That's fine.

[0239] In this embodiment, a silicon target is used as the insulator 212 in an atmosphere containing nitrogen gas. Silicon nitride is deposited by pulsed DC sputtering. By using the ring method, particle generation caused by arcing on the target surface is suppressed. This allows for a more uniform film thickness distribution. By using high frequency voltage, the rise and fall of discharge can be made steeper. This allows for more efficient supply of power to the electrodes, improving the sputtering rate and film quality. It is possible.

[0240] By using an insulator such as silicon nitride that is difficult for impurities such as water and hydrogen to penetrate, Therefore, the diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212 can be suppressed. In addition, the insulator 212 is made of an insulator that is difficult for copper to penetrate, such as silicon nitride. Therefore, a metal that easily diffuses, such as copper, is used for the conductor in the layer (not shown) below the insulator 212. Even if the metal is present, it is possible to prevent the metal from diffusing upward through the insulator 212.

[0241] Next, an insulator 214 is formed on the insulator 212 (see FIGS. 4A to 4D). The film 214 is preferably formed by sputtering. By using a sputtering method that does not require the use of a silicon dioxide gas, the hydrogen concentration in the insulator 214 can be reduced. However, the method for forming the insulator 214 is not limited to the sputtering method. Alternatively, a CVD method, an MBE method, a PLD method, an ALD method, or the like may be used as appropriate.

[0242] In this embodiment, the insulator 214 is an aluminum target in an atmosphere containing oxygen gas. Using a sintered body, an aluminum oxide film is formed by pulsed DC sputtering. By using the sputtering method, the film thickness distribution becomes more uniform, and the sputtering rate and film thickness are Here, RF (Radio Frequency) power is applied to the substrate. For example, when depositing the lower layer of the insulator 214, RF power may be applied. Alternatively, RF power may be applied when depositing the upper layer of the insulator 214. The amount of oxygen implanted into the layer below the insulator 214 is controlled by the magnitude of the applied RF power. The RF power is 0 W / cm 2 Over 1.86W / cm 2 The following applies. That is, the RF power used in forming the insulator 214 converts oxygen into a material suitable for the transistor characteristics. Therefore, the amount of oxygen that is suitable for improving the reliability of the transistor can be varied. The RF frequency is preferably 10 MHz or higher. The higher the RF frequency, the less damage it causes to the board. It is possible.

[0243] As the insulator 214, an amorphous structure having a high function of capturing and fixing hydrogen is used. It is preferable to use a metal oxide having the above structure, for example, aluminum oxide. The hydrogen contained in the oxide 230 is captured or fixed, and the hydrogen is diffused into the oxide 230. In particular, the insulator 214 is made of aluminum oxide having an amorphous structure. By using aluminum oxide or amorphous aluminum oxide, hydrogen can be absorbed more effectively. This is preferable because it may be possible to capture or fix the Therefore, a highly efficient transistor 200 and a semiconductor device can be manufactured.

[0244] Next, the insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. It is preferable to use a sputtering method that does not require the use of hydrogen as a deposition gas. By using this method, the hydrogen concentration in the insulator 216 can be reduced. The deposition of 216 is not limited to the sputtering method, but can also be performed by CVD, MBE, PL Method D, ALD, etc. may also be used as appropriate.

[0245] In this embodiment, a silicon target is used as the insulator 216 in an atmosphere containing oxygen gas. A silicon oxide film is formed by pulse DC sputtering using the pulse DC sputtering method. By using the ring method, the film thickness distribution becomes more uniform, and the sputtering rate and film quality are improved. It is possible.

[0246] The insulators 212, 214, and 216 are continuous and not exposed to the atmosphere. For example, a multi-chamber film forming apparatus may be used. This reduces hydrogen in the insulators 212, 214, and 216. Furthermore, it is possible to reduce the amount of hydrogen that gets mixed into the film between each film formation process. .

[0247] Next, an opening is formed in the insulator 216, reaching the insulator 214. The opening may be, for example, a groove or Also, the opening may refer to the area where an opening is formed. The openings may be formed by wet etching, but dry etching is more suitable. In addition, the insulator 214 is preferably formed by etching the insulator 216. It is preferable to select an insulator that functions as an etching stopper film when forming the groove. For example, when silicon oxide or silicon oxynitride is used for the insulator 216 that forms the groove, In this case, the insulator 214 is silicon nitride, aluminum oxide, or hafnium oxide. It is preferable that a recess be formed in the insulator 214 so as to overlap the opening of the insulator 216. be.

[0248] The dry etching equipment is a capacitively coupled plasma (CCP) device with parallel plate electrodes. (Capacitively Coupled Plasma) etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency voltage may be applied to one of the parallel plate type electrodes. Alternatively, a parallel plate electrode may be used. Alternatively, a high frequency voltage of the same frequency may be applied to each of the parallel plate electrodes. Alternatively, a high-density plasma source may be provided. A dry etching apparatus having a high density plasma source can be used. The plasma processing device is, for example, an inductively coupled plasma (ICP) type. A plasma etching device or the like can be used.

[0249] After the opening is formed, a conductive film that will become the conductor 205a is formed. The film preferably contains a conductor that has the function of suppressing oxygen permeation. For example, nitride tungsten nitride, titanium nitride, etc. can be used. Conductors that have the function of suppressing the The conductor 20 may be a laminated film of aluminum, copper, or molybdenum-tungsten alloy. The conductive film 5a is formed by the sputtering method, CVD method, MBE method, PLD method, ALD method, etc. This can be done using methods such as the

[0250] In this embodiment, a titanium nitride film is formed as the conductive film that becomes the conductor 205a. By providing such a metal nitride in contact with the bottom and side surfaces of the conductor 205b, the insulator 2 16 or the like can prevent the conductor 205b from being oxidized. Even if a metal that easily diffuses, such as copper, is used as the conductive material 205b, the metal does not migrate from the conductive material 205a to the conductive material 205b. It can prevent it from spreading outside.

[0251] Next, a conductive film that will become the conductor 205b is formed. , Tantalum, Tungsten, Titanium, Molybdenum, Aluminum, Copper, Molybdenum Tungsten The conductive film can be formed by plating or sputtering. The deposition method can be performed using a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, a tungsten film is formed as the conductive film that becomes the conductor 205b.

[0252] Next, a conductive film that will become the conductor 205a and a conductive film that will become the conductor 205b are formed by CMP processing. A portion of the conductive film is removed to expose the insulator 216 (see FIGS. 4A to 4D). As a result, the conductors 205a and 205b remain only in the openings. The P treatment may remove a portion of the insulator 216 .

[0253] Next, etching is performed to remove the upper portion of the conductor 205b (see FIGS. 5A to 5D). As a result, the upper surface of the conductor 205b is in contact with the upper surface of the conductor 205a and the insulator 216. The conductor 205b is etched by dry etching or wet etching. However, dry etching is preferable for fine processing. .

[0254] Next, the conductor 205c is formed on the insulator 216, the conductor 205a, and the conductor 205b. The conductive film that becomes the conductor 205c is formed by depositing a conductive film that becomes the conductor 205a. Similarly, it is desirable to include a conductor that has the function of suppressing oxygen permeation.

[0255] In this embodiment, a titanium nitride film is formed as the conductive film that becomes the conductor 205c. By using such a metal nitride as the upper layer of the conductor 205b, the insulating layer 222 and the like can be formed. In this case, the conductor 205b can be prevented from being oxidized. Even if a metal such as copper that easily diffuses is used, the metal is prevented from diffusing out of the conductor 205c. It can be prevented.

[0256] Next, a part of the conductive film that will become the conductor 205c is removed by CMP processing, and an insulator 216 is exposed (see FIGS. 6A to 6D). As a result, the conductor 205 is only exposed in the opening. Thus, the conductive material 205a, the conductive material 205b, and the conductive material 205c remain. Further, the conductor 205b can be formed by connecting the conductors 205a and Therefore, impurities such as hydrogen are absorbed from the conductor 205b. Preventing substances from diffusing outside the conductor 205a and the conductor 205c, and Also, to prevent oxygen from entering the conductor 205c from outside and oxidizing the conductor 205b. It should be noted that the CMP process may remove a portion of the insulator 216.

[0257] If the conductor 205c is not provided, the steps shown in FIGS. 5 and 6 may be skipped.

[0258] Next, an insulator 222 is formed on the insulator 216 and the conductor 205 (FIGS. 7A to 7C). 7D.) As the insulator 222, one or both of aluminum and hafnium It is preferable to form an insulator containing oxide. As insulators containing both oxides, aluminum oxide, hafnium oxide, and aluminum It is preferable to use oxides containing hafnium (hafnium aluminate) and the like. Insulators containing oxides of either or both aluminum and hafnium are highly resistant to oxygen, hydrogen, and The insulator 222 has a barrier property against hydrogen and water. By having Water is prevented from diffusing into the inside of the transistor 200 through the insulator 222, and oxidation is prevented. The generation of oxygen vacancies in the material 230 can be suppressed.

[0259] The insulator 222 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, the insulator 222 is formed by the ALD method. Then, a hafnium oxide film is formed.

[0260] Subsequently, it is preferable to carry out a heat treatment. The heat treatment is preferably carried out at a temperature of 250°C or higher and 650°C or lower. Preferably, the temperature is 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. The heat treatment is carried out in an atmosphere of nitrogen gas or inert gas, or in an atmosphere of oxidizing gas for 10 minutes. ppm or more, 1% or more, or 10% or more. For example, nitrogen gas and oxygen When heat treatment is performed in a mixed gas atmosphere, the oxygen gas content should be about 20%. The heat treatment may be carried out under reduced pressure, or under nitrogen gas or an inert gas atmosphere. After heat treatment in the atmosphere, oxidizing gas is added at 10 ppm or more, 1 % or more, or 10% or more.

[0261] It is also preferable that the gas used in the heat treatment is highly purified. The moisture content of the gas used in the heat treatment is 1 ppb or less, preferably 0.1 ppb or less. The concentration of the purified gas is preferably 0.05 ppb or less. By carrying out this treatment, it is possible to prevent moisture and the like from being absorbed into the insulator 222 as much as possible. can.

[0262] In this embodiment, as the heat treatment, after the insulator 222 is formed, a mixture of nitrogen gas and oxygen gas is The flow rate ratio is set to 4 slm:1 slm, and the treatment is carried out at a temperature of 400°C for 1 hour. By this process, impurities such as water and hydrogen contained in the insulator 222 can be removed. In addition, when an oxide containing hafnium is used as the insulator 222, the heat treatment As a result, part of the insulator 222 may be crystallized. It can also be performed at a timing such as after the film formation.

[0263] Next, an insulating film 224A is formed on the insulator 222 (see FIGS. 7A to 7D). The film 224A can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. In this embodiment, the insulating film 224A is formed by sputtering. The silicon oxide film is formed by sputtering, which does not require hydrogen as a deposition gas. By using the etching method, the hydrogen concentration in the insulating film 224A can be reduced. 4A will come into contact with oxide 230a in a later step, so the hydrogen concentration is reduced in this way. It is preferable that:

[0264] Next, an oxide film 230A and an oxide film 230B are formed in this order on the insulating film 224A (FIG. 7A). (See FIGS. 7A to 7D.) The oxide film 230A and the oxide film 230B are exposed to the atmospheric environment. It is preferable to form the oxide film 230A continuously without exposing it to the atmosphere. and preventing impurities or moisture from the atmospheric environment from adhering to the oxide film 230B. This allows the vicinity of the interface between the oxide film 230A and the oxide film 230B to be kept clean.

[0265] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MOC, or the like. This can be carried out using a VD method, an MBE method, a PLD method, an ALD method, or the like.

[0266] For example, the oxide film 230A and the oxide film 230B are formed by sputtering. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the oxygen ratio in the sputtering gas, the excess oxygen in the oxide film to be formed can be reduced. In addition, when the oxide film is formed by sputtering, For example, the above-mentioned In-M-Zn oxide target can be used.

[0267] During the deposition of the oxide film 230A, part of the oxygen contained in the sputtering gas is converted into the insulating film. Therefore, the oxygen contained in the sputtering gas The ratio should be 70% or more, preferably 80% or more, and more preferably 100%.

[0268] In addition, when the oxide film 230B is formed by sputtering, the oxide film 230B is formed by sputtering. The proportion of oxygen to be added is more than 30% and not more than 100%, preferably 70% or more and not more than 100%. When the film is formed using the above method, an oxygen-excess oxide semiconductor is formed. The transistor used in the channel formation region has relatively high reliability. In the case where the oxide film 230B is formed by a sputtering method, The proportion of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less. If the film is formed at a concentration of 0% or less, an oxygen-deficient oxide semiconductor is formed. Transistors that use compound semiconductors in the channel formation region have a relatively high field-effect mobility. Furthermore, by forming the film while heating the substrate, the crystallinity of the oxide film can be improved. It can be done.

[0269] In this embodiment, the oxide film 230A is formed by sputtering In:Ga: The film is formed using an oxide target with an atomic ratio of Zn=1:3:4. 0B, by the sputtering method, In:Ga:Zn=4:2:4.1 [atomic ratio The oxide film 230B is formed using an oxide target of In:Ga: An oxide target with an atomic ratio of Zn=1:1:1 may be used. By appropriately selecting the film formation conditions and atomic ratio, oxide 230a and oxide 230 It is advisable to form b to match the desired characteristics.

[0270] Next, an oxide film 243A is formed on the oxide film 230B (see FIGS. 7A to 7D). The film 243A is formed by sputtering, CVD, MBE, PLD, ALD, etc. The oxide film 243A has an atomic ratio of Ga to In of the oxide film 2 It is preferable that the atomic ratio of Ga to In is larger than that of 30B. The oxide film 243A is formed by sputtering a compound of In:Ga:Zn=1:3:4 [atomic The film is formed using an oxide target with a ratio of [number ratio]. The next step may be performed without forming the oxide film 243A.

[0271] The insulating film 224A, the oxide film 230A, the oxide film 230B, and the oxide film 243A are It is preferable to form the film by sputtering without exposing it to the atmosphere. A chamber-type film forming apparatus may be used. A, the oxide film 230B, and the oxide film 243A are formed by reducing the hydrogen in the film, and further, This can reduce the amount of hydrogen that gets mixed into the film between each film-forming step.

[0272] Next, it is preferable to perform a heat treatment. The temperature range is 250°C to 650°C, and the oxide film 243A does not become polycrystalline. The heat treatment is preferably performed at a temperature of 400° C. or higher and 600° C. or lower. Or in an inert gas atmosphere, or oxidizing gas is 10 ppm or more, 1% or more, or For example, heat treatment is carried out in a mixed atmosphere of nitrogen gas and oxygen gas. In this case, the oxygen gas concentration may be set to about 20%. The heat treatment may also be carried out under reduced pressure. Alternatively, the heat treatment may be carried out in a nitrogen gas or inert gas atmosphere, followed by desorption. To compensate for the lost oxygen, an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas is used. The heat treatment may be carried out in an atmosphere.

[0273] It is also preferable that the gas used in the heat treatment is highly purified. The moisture content of the gas used in the heat treatment is 1 ppb or less, preferably 0.1 ppb or less. The concentration of the purified gas is preferably 0.05 ppb or less. By performing the treatment, moisture and the like are removed from the oxide film 230A, the oxide film 230B, and the oxide film 243A. can be prevented as much as possible from being captured.

[0274] In this embodiment, the heat treatment is performed with a flow rate ratio of nitrogen gas to oxygen gas of 4 slm:1. The SLM is treated at a temperature of 500°C for 1 hour. 30A, oxide film 230B, and oxide film 243A, and impurities such as water and hydrogen are removed. Furthermore, the heat treatment improves the crystallinity of the oxide film 230B, This allows for a denser and more compact structure. This can reduce the diffusion of oxygen or impurities.

[0275] Next, a conductive film 242A is formed on the oxide film 243A (see FIGS. 7A to 7D). The deposition of the conductive film 242A is performed by sputtering, CVD, MBE, PLD, ALD, etc. For example, the conductive film 242A can be formed by sputtering. It is sufficient to form a film of tantalum nitride. Note that, before forming the conductive film 242A, a heat treatment may be performed. The heat treatment is preferably performed under reduced pressure, and the conductive film 242 is continuously formed without being exposed to the air. By performing such a process, a film A may be formed on the surface of the oxide film 243A, etc. The adsorbed moisture and hydrogen are removed, and the oxide film 230A, the oxide film 230B, and The moisture concentration and hydrogen concentration in the oxide film 243A can be reduced. In this embodiment, the temperature of the heat treatment is preferably 100° C. or more and 400° C. or less. °C.

[0276] Next, an insulating film 271A is formed on the conductive film 242A (see FIGS. 7A to 7D). The insulating film 271A is formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The insulating film 271A has a function of suppressing the permeation of oxygen. For example, the insulating film 271A is preferably formed by sputtering. Therefore, a film of aluminum oxide may be formed.

[0277] The conductive film 242A and the insulating film 271A are formed by sputtering without being exposed to the atmosphere. For example, a multi-chamber film forming apparatus can be used. This allows the conductive film 242A and the insulating film 271A to be etched by reducing hydrogen in the films. Furthermore, it is possible to reduce the amount of hydrogen that gets mixed into the film between each film formation step. In addition, when a hard mask is provided on the insulating film 271A, the film that becomes the hard mask is also exposed to the atmosphere. The films may be formed continuously without being exposed to heat.

[0278] Next, the insulating film 224A, the oxide film 230A, and the oxide film 230B are formed by lithography. The oxide film 243A, the conductive film 242A, and the insulating film 271A are processed into an island shape to form an insulator 2. 24, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 242B, and insulating layer An edge layer 271B is formed (see FIGS. 8A to 8D). Dry etching or wet etching can be used. The insulating film 224A, the oxide film 230A, the oxide film 230B, and the oxide film 230C are suitable for microfabrication. The processing of the conductive film 243A, the conductive film 242A, the insulating film 271A, and the insulating layer 271B is performed in the same manner as above. Each may be processed under different conditions.

[0279] In the lithography method, first, the resist is exposed to light through a mask. The resist mask is formed by removing or leaving the resist patterned area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, or the like can be formed. For example, KrF excimer laser light, ArF excimer laser light, etc. can be used to process the material into the desired shape. Laser beams, EUV (Extreme Ultraviolet) beams, etc. are used. A resist mask can be formed by exposing the resist to light. An immersion technique may be used in which a liquid (for example, water) is filled between the substrate and the light source. Instead of the electron beam or the ion beam, an electron beam or an ion beam may be used. When a beam is used, a mask is not required. Dry etching is performed using wet etching, etc. After the treatment, wet etching is performed, or after wet etching, dry etching is performed. This can be removed by performing a chipping process.

[0280] Furthermore, a hard mask made of an insulating or conductive material may be used under the resist mask. When a hard mask is used, an insulating film or a thin film that is a hard mask material is formed on the conductive film 242A. In the first method, a conductive film is formed, a resist mask is formed thereon, and a hard mask material is etched. By doing so, a hard mask having a desired shape can be formed. Chipping can be done after removing the resist mask, or with the resist mask left on. In the latter case, the resist mask may disappear during etching. After etching the film 242A, the hard mask may be removed by etching. If the hard mask material does not affect the subsequent process or can be used in the subsequent process, In this embodiment, the insulating layer 271B is formed as a hard mask. It is used as a ku.

[0281] Here, since the insulating layer 271B functions as a mask for the conductive layer 242B, the insulating layer 271B is not As shown in FIG. 8D, the conductive layer 242B does not have a curved surface between the side and top surfaces. The conductors 242a and 242b shown in FIGS. 1B and 1D are conductors having a side surface and a top surface that intersect. The end where the side surface and the top surface of the conductor 242 intersect is angular, so that the end The cross-sectional area of ​​the conductor 242 is larger than when the portion has a curved surface. The resistance of the body 242 is reduced, allowing the on-state current of the transistor 200 to be increased. Cut.

[0282] Also, the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 2 42B and the insulating layer 271B are formed so as to overlap at least a part of the conductor 205. In addition, the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B and the side surface of the insulating layer 271B are approximately perpendicular to the upper surface of the insulator 222. It is preferable that the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, The side surfaces of the conductive layer 242B and the insulating layer 271B are approximately perpendicular to the upper surface of the insulator 222. This allows for a smaller area and higher density when providing multiple transistors 200. Alternatively, the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive The angle formed by the side surface of the layer 242B and the insulating layer 271B and the top surface of the insulator 222 is small. In this case, the insulator 224, the oxide 230a, the oxide 230b, The oxide layer 243B, the conductive layer 242B, the side surfaces of the insulating layer 271B, and the top surface of the insulator 222 The angle between the surface and the surface is preferably 60 degrees or more and less than 70 degrees. In the subsequent process, the covering property of the insulator 275 etc. is improved, and defects such as voids are reduced. can.

[0283] In addition, by-products generated in the etching process include the insulator 224, the oxide 230a, and the acid. The oxide layer 243B, the conductive layer 242B, and the insulating layer 271B are layered on the sides of the oxide layer 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 271B. In this case, the layered by-products may be formed as insulator 224, oxide 23, etc. 0a, oxide 230b, oxide layer 243B, conductive layer 242B, and insulating layer 271B. It will be formed between the edges 275.

[0284] Next, an insulator 275 is formed to cover the insulator 224, the insulating layer 271B, and the like. (See FIGS. 9A to 9D.) Here, the insulator 275 is disposed on the top surface of the insulator 222 and the insulating It is preferable that the insulator 275 is in close contact with the side surface of the body 224. The insulator 275 is formed by a sputtering method. This can be done using a CVD method, an MBE method, a PLD method, an ALD method, or the like. It is preferable that 75 is made of an insulating film that has the function of suppressing oxygen permeation. The insulating layer 275 is formed by sputtering aluminum oxide. The silicon nitride film can be formed by using the EALD method. This improves the ability to suppress the diffusion of impurities such as water and hydrogen, as well as oxygen. There is.

[0285] In this way, the insulator 224, the oxide 230a, the oxide 230b, and the oxide layer 243B and the conductive layer 242B is covered with an insulator 275 having a function of suppressing the diffusion of oxygen. This allows the insulating layer 271B to be covered. This prevents the insulating layer 224 and the oxide from being formed in the subsequent process. 230a, oxide 230b, oxide layer 243B, and conductive layer 242B are covered with insulator 280. This can reduce the direct diffusion of oxygen from the above.

[0286] Next, an insulating film that will become the insulator 280 is formed on the insulator 275. The insulating film is formed as follows: This can be done using methods such as sputtering, CVD, MBE, PLD, and ALD. For example, a silicon oxide film can be formed as the insulating film by using a sputtering method. An insulating film to be the insulator 280 is formed by sputtering in an atmosphere containing oxygen. By doing so, the insulator 280 containing excess oxygen can be formed. By using a sputtering method that does not require the use of hydrogen, the hydrogen concentration in the insulator 280 can be reduced. Note that heat treatment may be performed before the insulating film is formed. The insulating film may be formed continuously under reduced pressure without being exposed to the atmosphere. By carrying out such a treatment, the moisture and water adsorbed on the surface of the insulator 275 are removed. The oxide 230a, the oxide 230b, the oxide layer 243B, and the insulator The water and hydrogen concentrations in the 224 can be reduced. The heat treatment conditions can be used.

[0287] Next, the insulating film that will become the insulator 280 is subjected to CMP processing to form the insulator 280 with a flat upper surface. (See FIGS. 9A to 9D.) Note that, for example, a sputtering method is used to form a film on the insulator 280. Silicon nitride is formed by a coating method, and the silicon nitride is then heated to C until it reaches the insulator 280. MP treatment may also be performed.

[0288] Next, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and the conductive layer 24 2B, a part of the oxide layer 243B, and a part of the oxide 230b are processed to form the oxide 230 An opening is formed so as to reach b. The opening is preferably formed so as to overlap with the conductor 205. By forming the opening, the insulator 271a, the insulator 271b, the conductor 242a, Conductor 242b, oxide 243a, and oxide 243b are formed (FIGS. 10A to 10C). See 0D.).

[0289] When forming the opening, the upper part of the oxide 230b is removed. The removal of the oxide 230b forms a groove in the oxide 230b. Depending on the depth of the groove, The groove may be formed in the forming step of the opening, or in a step different from the forming step of the opening. It may also be formed by

[0290] In addition, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and the conductive layer 24 Part of the oxide layer 243B, part of the oxide layer 230b, and part of the oxide layer 243B are processed by dry etching. Dry etching or wet etching can be used. The process is suitable for microfabrication. The processes may be performed under different conditions. For example, a part of the insulator 280 is processed by dry etching, and a part of the insulator 275 and the insulator A part of the oxide layer 243B and a part of the conductive layer 271B are processed by a wet etching method. A portion of 242B and a portion of oxide 230b may be processed by dry etching.

[0291] Here, the side of the oxide 230a, the top and side of the oxide 230b, and the side of the conductor 242 Adhesion of impurities to the surface of the insulating material 280, the side surface of the insulating material 280, etc., or diffusion of the impurities into these surfaces. A step of removing such impurities may be carried out. Etching can create damaged areas on the surface of oxide 230b. The impurities may include the insulator 280, the insulator 275, and the insulating layer 27. 1B, a component contained in the conductive layer 242B, and a component used in forming the opening. Components contained in the materials used in the equipment, gases or liquids used in etching The impurities include, for example, hafnium, arsenic, and the like. These include aluminum, silicon, tantalum, fluorine, and chlorine.

[0292] In particular, impurities such as aluminum or silicon may be present in the CAAC-O oxide 230b. Therefore, aluminum or silicon, which inhibits the CAAC-OS formation, It is preferable that harmful impurity elements are reduced or removed. For example, oxide 230 The concentration of aluminum atoms in b and its vicinity should be 5.0 atomic % or less. Preferably, it is 2.0 atomic % or less, more preferably 1.5 atomic % or less, and more preferably 1.0 atomic % or less. more preferably less than 0.3 atomic %.

[0293] Note that impurities such as aluminum or silicon inhibit the formation of CAAC-OS. , quasi-amorphous oxide semiconductor (a-like OS: amorphous-like ox The region of the metal oxide that has become a semiconductor (CAAC) is called the non-CAAC region. In the non-CAAC region, the crystalline structure is less dense, so V O H Therefore, the oxide 230 Preferably, the non-CAAC region of b is reduced or eliminated.

[0294] In contrast, it is preferable that the oxide 230b has a layered CAAC structure. In addition, it is preferable that the oxide 230b has a CAAC structure up to the bottom end of the drain. In the transistor 200, the conductor 242a or the conductor 242b and its vicinity That is, the area near the bottom end of the conductor 242a (conductor 242b) functions as a drain. It is preferable that the oxide 230b has a CAAC structure. The damaged area of ​​oxide 230b is removed, even at the drain edge, which significantly affects the CA By having an AC structure, it is possible to further suppress fluctuations in the electrical characteristics of the transistor 200. In addition, the reliability of the transistor 200 can be improved.

[0295] Next, an insulating film 262A is formed (see FIGS. 11A to 11D). Since the insulating film 262A is formed in contact with the side wall of the opening formed in the edge 280, etc., It is preferable to form the film using the ALD method, which has good coating properties. It is preferable to form the insulating film by using the EALD method. However, the present invention is not limited to this. 262A using sputtering, CVD, PECVD, MBE, PLD, etc. In some cases, it may be possible to form a film using this method.

[0296] In this embodiment, the insulating film 262A is formed by depositing silicon nitride by the PEALD method. do.

[0297] Next, a part of the insulating film 262A is removed by anisotropic etching, and a layer is formed on the side wall of the opening. This forms a sidewall-shaped insulator 262 (see FIGS. 12A to 12D). The anisotropic etching is preferably performed by dry etching. For this purpose, a halogen-based etching gas containing one or more of fluorine, chlorine, and bromine is used. In addition, oxygen gas, nitrogen gas, helium gas, etc. can be used in addition to halogen-based etching gases. Gas such as argon gas or hydrogen gas may be added as needed. In the etching process, the above-mentioned dry etching apparatus can be used.

[0298] Here, the etching rate of the insulating film 262A is The etching rate is preferably greater than that of the insulator 222, and in particular, the oxide 230b and It is preferable that the etching rate of the insulating layer 222 is significantly higher than that of the insulating layer 222. By this, when forming the insulator 262, the insulator 280, the oxide 230b, and the insulator This can prevent over-etching of 222.

[0299] In addition, the ions generated during etching of the insulating film 262A are ionized into the insulator 280 and the insulating film 262B. It is preferable that the impact be made on the corner of the edge of the opening of the edge body 262. For example, the corners can be polished to form a tapered shape. The electrode on the substrate side is supplied with a bias voltage. By applying a voltage of 0.1 V to the insulator 280, the corners can be removed relatively easily. By tapering the edge of the opening of the insulator 262, the insulator 250 a can be provided in contact with the upper part of the insulator 280, so that the insulator 25 Oxygen can be easily diffused into 0a.

[0300] In order to remove any damaged areas on the surface of the oxide 230b that may have been created during the etching process, a cleaning process is performed. The cleaning method is wet cleaning (wet etching) using cleaning fluid. (This can also be called "treatment"), plasma treatment using plasma, cleaning by heat treatment, etc. The above cleaning processes may be combined as appropriate. The part may be deep.

[0301] For wet cleaning, ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc. are mixed with carbonated water. Alternatively, the cleaning treatment may be carried out using an aqueous solution diluted with pure water, pure water, carbonated water, or the like. Alternatively, ultrasonic cleaning may be performed using an aqueous solution of these, pure water, or carbonated water. These cleaning methods may be combined as appropriate.

[0302] In this specification and the like, an aqueous solution obtained by diluting commercially available hydrofluoric acid with pure water is referred to as diluted hydrofluoric acid. Ammonia is sometimes called an acid, and the aqueous solution obtained by diluting commercially available aqueous ammonia with pure water is sometimes called diluted aqueous ammonia. The concentration and temperature of the aqueous solution depend on the impurities to be removed and the semiconductor device to be cleaned. The ammonia concentration of diluted ammonia water is 0.0 The concentration is 1% or more and 5% or less, preferably 0.1% or more and 0.5% or less. The hydrogen fluoride concentration of the hydrofluoric acid is 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or less. It should be between pm and 10 ppm.

[0303] For ultrasonic cleaning, a frequency of 200 kHz or more, preferably 900 kHz or more, is used. By using this frequency, damage to the oxide 230b etc. can be reduced. can be reduced.

[0304] The above-mentioned cleaning treatment may be carried out multiple times, and the cleaning solution may be changed for each cleaning treatment. For example, the first cleaning treatment may be a treatment using diluted hydrofluoric acid or diluted aqueous ammonia. The first cleaning treatment may be performed using pure water or carbonated water, and the second cleaning treatment may be performed using pure water or carbonated water.

[0305] In this embodiment, the cleaning process is performed by wet cleaning using diluted ammonia water. By carrying out the cleaning process, the oxide 230a, the oxide 230b, etc., which are attached or adhered to the surface, are removed. In addition, the oxide 230b surface damage area can be removed. This can remove the oxide 230b and improve the crystallinity near the surface of the oxide 230b.

[0306] The cleaning process is not limited to only after the formation of the insulator 262. For example, The cleaning process may be carried out in advance after the opening shown in FIG. 10 is formed.

[0307] After the etching or the cleaning, a heat treatment may be carried out. °C or higher and 500 °C or lower, preferably 300 °C or higher and 500 °C or lower, more preferably 350 °C or higher The heat treatment may be performed at a temperature of 400° C. or less. Alternatively, the treatment may be carried out in a nitrogen gas or inert gas atmosphere containing 10% oxidizing gas. The heat treatment may be carried out in an atmosphere containing at least ppm, at least 1%, or at least 10% of the metal. It is preferable to perform the process in a mixed atmosphere of oxygen gas and nitrogen gas. and oxygen is supplied to the oxide 230b to form an oxygen deficiency V O It is possible to reduce By carrying out such a heat treatment, the crystallinity of the oxide 230b can be improved. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out in an oxygen atmosphere, followed by a large amount of heat treatment. Alternatively, the heat treatment may be carried out in a nitrogen atmosphere without exposing the substrate to air. If heat treatment is performed in a nitrogen atmosphere without exposure to the atmosphere after the treatment, The heat treatment in the nitrogen atmosphere may be performed for a longer time than the heat treatment in the nitrogen atmosphere.

[0308] Next, an insulating film 250A is formed (see FIGS. 13A to 13D). The heat treatment may be carried out under reduced pressure without exposure to the atmosphere. The insulating film 250A may be formed continuously after the heat treatment. By performing such a treatment, the surface of the oxide 230b, etc. and removing the moisture and hydrogen adsorbed on the oxide 230a and the oxide 230b. The temperature of the heat treatment is 100°C or higher. The temperature is preferably at most 400°C.

[0309] The insulating film 250A can be formed by a sputtering method, a CVD method, a PECVD method, an MBE method, or a PLD method. The insulating film 250A can be formed by using an ALD method or the like. It is preferable to form the film by a film forming method using a gas in which the insulating layer is reduced or removed. The hydrogen concentration in the insulating film 250A can be reduced. Since the insulator 250a is in contact with the insulator 30b, the hydrogen concentration is reduced. It is suitable.

[0310] Moreover, it is preferable that the insulating film 250A be formed by the ALD method. The thickness of the insulator 250 that functions as the gate insulating film of the transistor 200 is extremely thin (e.g., For example, it is necessary to make the size between 5 nm and 30 nm, and to minimize the variation. In contrast, the ALD method involves exchanging a precursor with a reactant (such as an oxidant). This is a film formation method in which the layers are introduced alternately, and the film thickness is adjusted by the number of times this cycle is repeated. Therefore, it is possible to precisely adjust the film thickness. 13B and 13C, the precision of the thickness of the gate insulating film required by 13C can be achieved. 13C, the insulating film 250A is formed in the opening formed by the insulator 280 and the like. The bottom and side surfaces of the opening must be coated with a film with good coverage. Since the atomic layers can be deposited one by one, the insulating film 250A is This allows for the formation of a film with good coating properties.

[0311] In addition, for example, a gas containing hydrogen such as SiH4 (or Si2H6) is used as a deposition gas. When the insulating film 250A is formed by the PECVD method, the film forming gas containing hydrogen is The hydrogen radicals are decomposed in the atmosphere, generating a large amount of hydrogen radicals. Oxygen in the oxide 230b is extracted and V O When H is formed, the hydrogen in the oxide 230b However, when the insulating film 250A is formed using the ALD method, the concentration of the prismatic The generation of hydrogen radicals can be suppressed both when the reactant is introduced and when the gas is introduced. Therefore, by forming the insulating film 250A using the ALD method, the water in the oxide 230b This can prevent the element concentration from becoming too high.

[0312] In this embodiment, the insulating film 250A is formed by depositing silicon oxide by the PEALD method. do.

[0313] If the impurities are not removed before the insulating film 250A is formed, the oxide 230 a, the oxide 230b, the conductor 242, the insulator 280, etc., and the insulator 250a, the impurities Things may remain.

[0314] Next, it is preferable to perform microwave treatment in an atmosphere containing oxygen (FIGS. 13A to 13C). Here, microwave processing refers to the generation of high-density plasma using microwaves, for example. This refers to processing using a device with a power source that generates electricity. Microwaves refer to electromagnetic waves with frequencies between 300 MHz and 300 GHz. do.

[0315] The dotted lines shown in Figs. 13B to 13D indicate high frequency oxygen plasma such as microwaves and RF. Microwave treatment is a process for the production of high density plastics using microwaves. It is preferable to use a microwave processing device having a power source that generates microwaves. The frequency of the microwave processing device is 300 MHz or more and 300 GHz or less, preferably 2.4 GHz or more and 2.5 GHz or less, for example, 2.45 GHz. The power of the power source that applies microwaves to the processing device is preferably 1000W or more and 10000W or less. Alternatively, the microwave processing device should be set to 2000W or more and 5000W or less. By using high density plasma, high density oxygen Radicals can be generated. In addition, high-density plasma can be generated by applying RF to the substrate side. The oxygen ions generated by the ion exchange can be efficiently guided into the oxide 230b.

[0316] The microwave treatment is preferably carried out under reduced pressure, preferably at a pressure of 60 Pa or more. Preferably 133 Pa or more, more preferably 200 Pa or more, and even more preferably 400 Pa or more For example, the pressure may be 10 Pa or more and 1000 Pa or less, and preferably 300 Pa or more. The treatment temperature should be 750°C or less, preferably 500°C or less. The oxygen plasma treatment may be carried out at a temperature of, for example, about 400°C. For example, the temperature is preferably 100°C or higher and 750°C or lower. Alternatively, the temperature may be 300°C or higher and 500°C or lower.

[0317] Furthermore, for example, the microwave treatment may be carried out using oxygen gas and argon gas. Here, the oxygen flow rate ratio (O2 / O2+Ar) should be greater than 0% and less than 100%. Preferably, the oxygen flow ratio (O2 / O2+Ar) is set to be greater than 0% and equal to or less than 50%. More preferably, the oxygen flow rate ratio (O2 / O2+Ar) is set to 10% or more, and 40% or more. More preferably, the oxygen flow rate ratio (O2 / O2+Ar) should be 10% or more. In this way, microwave treatment in an oxygen-containing atmosphere can In addition, the carrier concentration in the region 230bc can be reduced by the microwave treatment. In this case, by preventing excessive amounts of oxygen from being introduced into the chamber, the region 230ba Furthermore, it is possible to prevent the carrier concentration in the region 230bb from being excessively reduced.

[0318] As shown in FIGS. 13B to 13D, microwave treatment in an oxygen-containing atmosphere The oxygen gas is converted into plasma using high frequency waves such as microwaves, RF, etc., and the oxygen plasma is The ion beam can be applied to the region of oxide 230b between conductor 242a and conductor 242b. At this time, microwaves or high frequencies such as RF may be irradiated onto the region 230bc. That is, high frequency oxygen such as microwave or RF can be applied to the region 230bc shown in FIG. Plasma, microwaves, etc. can be used to create a V in 230 bc O H can be split off and hydrogen H can be removed from the region 230bc. In the area 230bc, O H → H + V O " reaction occurs, and the region 230b V in c O Therefore, oxygen vacancies and Yobi V O H can be reduced, and the carrier concentration can be reduced. The oxygen radicals generated by the oxygen plasma or the insulator 250 are added to the formed oxygen vacancies. By supplying oxygen contained in the The rear density can be reduced.

[0319] On the other hand, the conductors 242a and 242b are formed on the regions 230ba and 230bb shown in FIG. The conductor 242b is provided in the atmosphere containing oxygen. When performing microwave processing, it is necessary to shield against the effects of microwaves, RF, oxygen plasma, etc. Therefore, the conductor 242 is preferably a film having a frequency of 300 MHz or more. GHz or less, for example, between 2.4GHz and 2.5GHz. It is preferable that

[0320] As shown in FIGS. 13B to 13D, the conductors 242a and 242b are It shields the effects of microwaves, high frequency oxygen plasmas, etc., such as RF, so these effects are limited to the area. This does not extend to the regions 230ba and 230bb. , in the region 230ba and the region 230bb, V O Reduction of H and excessive oxygen supply Since this does not occur, a decrease in the carrier concentration can be prevented.

[0321] In this way, oxygen vacancies and V are selectively formed in the oxide semiconductor region 230bc. O H It can be removed to make the region 230bc i-type or substantially i-type. The regions 230ba and 230bb function as source and drain regions. This suppresses the supply of oxygen and maintains the n-type structure. The variation in the electrical characteristics of the transistor 200 is suppressed, and the electrical characteristics of the transistor 200 are prevented from varying within the substrate surface. This can help prevent this.

[0322] As shown in FIG. 13B, an insulator 262 is provided in contact with the side surface of the conductor 242. By this, oxygen formed by microwave treatment diffuses to the side surface of the conductor 242. This can prevent an excessively thick oxide film from being formed on the side surface of the conductor 242. Since it is possible to prevent the formation of a gate insulating film, the transistor 200 can be prevented from having a decrease in on-state current and a decrease in current. This can suppress a decrease in field effect mobility or a deterioration in frequency characteristics.

[0323] Therefore, a semiconductor device with a large on-state current can be provided. It is possible to provide a semiconductor device having a high frequency characteristic. Alternatively, a semiconductor device having good electrical characteristics can be provided. Alternatively, a semiconductor device with good reliability can be provided.

[0324] In addition, in microwave treatment, the electromagnetic interaction between microwaves and molecules in the oxide 230b This thermal energy may be transferred directly to the oxide 230b. The oxide 230b may be heated by the gas. This is sometimes called annealing. By performing microwave treatment in an atmosphere containing oxygen, In some cases, the same effect as annealing can be obtained. In this case, this thermal energy is transferred to the hydrogen in the oxide 230b, and the activated hydrogen It is believed that it is released from the oxide 230b.

[0325] Next, an insulating film 250B is formed (see FIGS. 14A to 14D). The film is formed using the sputtering method, CVD method, MBE method, PLD method, ALD method, etc. The insulating film 250B is made of an insulator having a function of suppressing the diffusion of oxygen. By adopting such a structure, the oxygen contained in the insulator 250a However, it is possible to suppress the diffusion of the oxide 230 into the conductor 260. In addition, the decrease in the amount of oxygen contained in the insulator 250a can be suppressed. For example, the insulating film 250A can suppress oxidation of the insulator 260. The insulating film 250B is formed using a material that can be used for the insulator 222. The structure can be provided using a variety of materials.

[0326] Specifically, the insulating film 250B may be made of hafnium, aluminum, gallium, yttrium, or the like. um, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium Metal oxides or oxides containing one or more metals selected from the group consisting of cadmium, cadmium, and cadmium-containing metals. Metal oxides that can be used as 230 can be used. In particular, aluminum It is preferable to use an insulator containing oxides of one or both of Cr and Hafnium.

[0327] In this embodiment, the insulating film 250B is formed by depositing hafnium oxide using a thermal ALD method.

[0328] After the insulating film 250B is formed, a microwave treatment may be performed (see FIGS. 14A to 14D). The microwave treatment is carried out under the conditions of the microwave treatment carried out after the formation of the insulating film 250A. Alternatively, the insulating film 250A may be formed without the microwave treatment that is performed after the formation of the insulating film 250A. After the film formation of 250B, microwave treatment may be performed.

[0329] In addition, after the insulating film 250A is formed and after the insulating film 250B is formed, microwaves After the treatment, a heat treatment may be carried out while maintaining the reduced pressure. In the insulating film 250A, the insulating film 250B, the oxide 230b, and the oxide 230a In addition, a part of the hydrogen is removed by the conductor 242 (conductor 2 42a and conductor 242b). Even if the heating step is repeated multiple times while maintaining the reduced pressure after the treatment, By repeatedly performing the heat treatment, the insulating film 250A, the oxide 230b, and the oxide The hydrogen in the oxide 230a can be removed more efficiently. The temperature is preferably 300°C or higher and 500°C or lower. The microwave annealing may also serve as the heat treatment. If 30b etc. are sufficiently heated, the heat treatment may not be performed.

[0330] In addition, the quality of the insulating film 250A and the insulating film 250B is improved by microwave treatment. By doing so, it is possible to suppress the diffusion of hydrogen, water, impurities, etc. By a post-process such as forming a conductive film or a post-treatment such as a heat treatment, This prevents hydrogen, water, impurities, etc. from diffusing into the oxide 230b, the oxide 230a, etc. It is possible.

[0331] Next, a conductive film that will become the conductor 260a and a conductive film that will become the conductor 260b are formed in this order. The conductive film that becomes the conductor 260a and the conductive film that becomes the conductor 260b are formed by sputtering. This can be done by using a method such as a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, a conductive film that becomes the conductor 260a is formed by the ALD method, and a CVD method is used. A conductive film that will become the conductor 260b is formed.

[0332] Next, by CMP processing, insulating film 250A, insulating film 250B, and conductor 260a are formed. The conductive film and the conductive film that will become the conductor 260b are polished until the insulator 280 is exposed. The insulator 250a, the insulator 250b, the conductor 260a, and the conductor 260b are 15A to 15D. As a result, the insulator 250 is formed by the oxide 230. b and the oxide 230b is disposed to cover the inner walls (side walls and bottom surface) of the groove portion. The conductor 260 fills the opening and the groove through the insulator 250. The polishing is performed so that the top surface of the insulator 262 is not exposed. It is preferable to do so.

[0333] Next, heat treatment may be performed under the same conditions as the above heat treatment. The heat treatment is carried out in a nitrogen atmosphere at a temperature of 400°C for 1 hour. The moisture concentration and hydrogen concentration in the insulator 280 can be reduced. After the heat treatment, the insulator 282 may be formed without exposure to the air.

[0334] Next, an insulator 282 is formed on the insulator 250, the conductor 260, and the insulator 280. (See FIGS. 16A to 16D.) The insulator 282 is formed by a sputtering method, a C This can be done by using a VD method, an MBE method, a PLD method, an ALD method, or the like. The film formation is preferably carried out by sputtering. By using a good sputtering method, the hydrogen concentration in the insulator 282 can be reduced. In addition, the insulator 282 is formed in an oxygen-containing atmosphere by sputtering. In this way, oxygen can be added to the insulator 280 while the film is being formed. In this case, the substrate is heated while the insulator 2 is heated. It is preferable to deposit 82.

[0335] In this embodiment, the insulator 282 is an aluminum target in an atmosphere containing oxygen gas. Using a sintered body, an aluminum oxide film is formed by pulsed DC sputtering. By using the sputtering method, the film thickness distribution becomes more uniform, and the sputtering rate and film thickness are The RF power applied to the substrate is 1.86 W / cm 2 and Preferably, 0 W / cm 2 More than 0.31W / cm 2 RF power should be reduced. By doing so, the amount of oxygen injected into the insulator 280 can be suppressed. The insulator 282 is formed in a two-layer laminate structure. The lower layer of the insulator 282 is applied to the substrate. RF power: 0 W / cm 2 The upper layer of the insulator 282 is formed as a film by applying RF power to the substrate. 0.31W / cm 2 The film is formed as follows.

[0336] Next, it is preferable to perform a heat treatment. The heat treatment is performed under the same conditions as the heat treatment described above. In this embodiment, the treatment is carried out in a nitrogen atmosphere at a temperature of 400° C. for 1 hour. Do the following.

[0337] By this heat treatment, as shown in FIG. 2, the insulator 282 is formed. Oxygen is diffused into the insulator 280 and the insulator 250a, and is selected into the channel forming region of the oxide 230. Furthermore, an insulator 262 is provided in contact with the side surface of the conductor 242. By this, the acid diffused from the insulator 280 to the insulator 250a by the heat treatment can be This can prevent the element from diffusing to the side surface of the conductor 242. Since the formation of an oxide film with an excessive thickness on the side surface of the transistor 42 can be prevented, 200, the decrease in on-state current, the decrease in field effect mobility, or the deterioration of frequency characteristics, etc. can be suppressed.

[0338] Therefore, a semiconductor device with a large on-state current can be provided. It is possible to provide a semiconductor device having a high frequency characteristic. Alternatively, a semiconductor device having good electrical characteristics can be provided. Alternatively, a semiconductor device with good reliability can be provided.

[0339] The heat treatment may be performed not only after the formation of the insulator 282 but also after the formation of the insulator 283. You may go.

[0340] Next, an insulator 283 is formed on the insulator 282 (see FIGS. 16A to 16D). The insulator 283 is formed by sputtering, CVD, MBE, PLD, or AL. The insulator 283 can be formed by sputtering. It is preferable to use a sputtering method that does not require the use of hydrogen as a deposition gas. This reduces the hydrogen concentration in the insulator 283. In addition, the insulator 283 is made of multiple layers. For example, a silicon nitride film may be formed by sputtering, and the silicon nitride film may be A silicon nitride film may be formed on the contact using a CVD method.

[0341] Next, an insulator 285 is formed on the insulator 283. The insulating film is formed by sputtering. This can be done by using a deposition method, CVD method, MBE method, PLD method, ALD method, etc. For example, a silicon oxide film may be formed as the insulating film by using a CVD method.

[0342] Next, the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and An opening is formed in the insulator 285 to reach the conductor 242 (see FIGS. 17A to 17D). The openings can be formed by lithography. The shape of the opening is circular when viewed from above, but is not limited to this. For example, the opening may have a substantially circular shape such as an oval, a polygonal shape such as a square, or a rectangular shape when viewed from above. The corners of the polygon may be rounded.

[0343] Next, an insulating film that will become the insulator 241 is formed, and the insulating film is anisotropically etched to form the insulator 17A to 17D. Deposition of an insulating film that will become the insulator 241. This is done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. The insulating film that becomes the insulator 241 has a function of suppressing oxygen permeation. For example, an insulating film made of aluminum oxide is preferably formed by the ALD method. Alternatively, it is preferable to form a silicon nitride film by using the PEALD method. Silicon nitride is preferred because it has a high barrier property against hydrogen.

[0344] The anisotropic etching of the insulating film that becomes the insulator 241 may be, for example, dry etching. By providing an insulator 241 on the side wall of the opening, oxygen from the outside can be prevented from entering. This suppresses the permeation of the conductor 240a and the conductor 240b to be formed next, thereby preventing oxidation. In addition, the conductor 240a and the conductor 240b may be formed of a material contained in the insulator 280 or the like. This can prevent impurities such as water and hydrogen from diffusing.

[0345] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. The conductive film that becomes the conductor 240b has a function of suppressing the permeation of impurities such as water and hydrogen. It is desirable to use a laminated structure containing a conductive material such as tantalum nitride or titanium nitride. The conductor 24 may be a laminate of tungsten, molybdenum, copper, or the like. The conductive film that becomes 0 is formed by the sputtering method, CVD method, MBE method, PLD method or AL method. This can be done using Method D or the like.

[0346] Next, a CMP process is performed to remove the conductive film that will become the conductors 240a and 240b. A portion of the insulating film is removed to expose the top surface of the insulating film 285. As a result, the conductive film remains only in the opening. By virtue of this, the conductors 240a and 240b can be formed with flat upper surfaces. (See FIGS. 17A to 17D.) Note that the CMP process Part of the surface may be removed.

[0347] Next, a conductive film that will become the conductor 246 is formed. It can be performed using methods such as sputtering, CVD, MBE, PLD, or ALD. can.

[0348] Next, the conductive film that will become the conductor 246 is processed by lithography to form the conductor 240a and a conductor 246b in contact with the upper surface of the conductor 240b. At this time, the conductor 246a and the conductor 246b do not overlap with the insulator 285. A portion of the insulation 285 in the thin area may be removed.

[0349] Through the above steps, a semiconductor device including the transistor 200 shown in FIGS. 1A to 1D is manufactured. 4A to 17A, 4B to 17B, 4C to 17C, and 4D to 17D, a semiconductor device manufactured by the method for manufacturing the semiconductor device described in this embodiment mode is In this way, the transistor 200 can be manufactured.

[0350] <Microwave processing equipment> A microwave processing apparatus that can be used in the manufacturing method of the semiconductor device will be described below. and explain.

[0351] First, we will look at manufacturing equipment that can reduce the amount of impurities that get mixed in during the manufacturing of semiconductor devices, etc. The configuration will be described with reference to FIGS.

[0352] FIG. 18 is a schematic top view of a single-wafer multi-chamber manufacturing apparatus 2700. The manufacturing equipment 2700 includes a cassette port 2761 for accommodating substrates and a substrate alignment unit. and an atmosphere-side substrate supply chamber 2701 having an alignment port 2762 for performing the alignment. The substrate supply chamber 2701 is connected to the atmospheric substrate transfer chamber 2702, which transfers the substrate. and a load lock chamber in which the pressure inside the chamber is switched from atmospheric pressure to reduced pressure or from reduced pressure to atmospheric pressure. 2703a, and the substrate is removed, and the pressure in the chamber is reduced to atmospheric pressure, or atmospheric pressure to atmospheric pressure. The unload lock chamber 2703b is switched to a reduced pressure, and the transfer chamber 2703b transfers the substrate in a vacuum. 704, chamber 2706a, chamber 2706b, and chamber 2706c. , and chamber 2706d.

[0353] The atmospheric substrate transfer chamber 2702 is provided with a load lock chamber 2703a and an unload lock chamber 2703b. The load lock chamber 2703a and the unload lock chamber 2703b are connected to the 3b is connected to a transfer chamber 2704, which is connected to a chamber 2706a, a chamber Bar 2706b connects chamber 2706c and chamber 2706d.

[0354] A gate valve GV is provided at the connection between each chamber, and the atmosphere-side substrate supply chamber 270 1 and the atmosphere side substrate transfer chamber 2702, each chamber can be independently maintained in a vacuum state. In addition, a transfer robot 2763a is provided in the atmospheric substrate transfer chamber 2702. The transfer room 2704 is provided with a transfer robot 2763b. and a transfer robot 2763b, which can transfer substrates within the manufacturing equipment 2700. do.

[0355] The back pressure (total pressure) of the transfer chamber 2704 and each chamber is, for example, 1×10 -4 Pa or less , preferably 3 x 10 -5 Pa or less, more preferably 1×10 -5 Pa or less. In addition, gas molecules having a mass-to-charge ratio (m / z) of 18 in the transfer chamber 2704 and each chamber The partial pressure of (atoms) is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Below Pa, More preferably, 3 × 10 -6 The transfer chamber 2704 and each chamber The partial pressure of a gas molecule (atom) with m / z 28 is, for example, 3 x 10 -5 Below Pa, Preferably 1 x 10 -5 Pa or less, more preferably 3×10 -6 Pa or less. The partial pressure of gas molecules (atoms) with m / z of 44 in the transfer chamber 2704 and each chamber is , e.g., 3 x 10 -5 Pa or less, preferably 1×10 -5 Pa or less, more preferably 3×10 -6 Pa or less.

[0356] The total pressure and partial pressure in the transfer chamber 2704 and each chamber were measured using a mass spectrometer. For example, a quadrupole mass spectrometer (Q-mass spectrometer) manufactured by ULVAC, Inc. Also known as s.) Qulee CGM-051 can be used.

[0357] In addition, the transfer chamber 2704 and each chamber are constructed to minimize external or internal leaks. For example, the leak rates of the transfer chamber 2704 and each chamber are , 3×10 -6 Pa·m 3 / s or less, preferably 1 × 10 -6 Pa·m 3 / s or less For example, the leak rate of a gas molecule (atom) with m / z 18 is 1×10 -7 P a·m 3 / s or less, preferably 3 × 10 -8 Pa·m 3 / s or less. Also, for example, The leak rate of gas molecules (atoms) with m / z of 28 is 1×10 -5 Pa·m 3 / s or less , preferably 1 x 10 -6 Pa·m 3 / s or less. For example, if the m / z is 44, The leak rate of gas molecules (atoms) is 3×10 -6 Pa·m 3 / s or less, preferably 1× 10 -6 Pa·m 3 / s or less.

[0358] The leak rate was calculated from the total pressure and partial pressure measured using the mass spectrometer mentioned above. The leak rate depends on the external leak and the internal leak. The risk is the inflow of gas from outside the vacuum system due to a small hole or poor sealing. Internal leaks are leaks from partitions such as valves in the vacuum system or gases released from internal components. To keep the leak rate below the above-mentioned value, external and internal leaks must be eliminated. It is necessary to take measures from both sides.

[0359] For example, the opening and closing parts of the transfer chamber 2704 and each chamber are sealed with metal gaskets. Metal gaskets should be coated with iron fluoride, aluminum oxide, or chromium oxide. It is preferable to use a metal gasket coated with a metal. Metal gaskets have a higher adhesion than O-rings. In addition, iron fluoride, aluminum oxide, chromium oxide, etc. By using a metal passivation coated with a This suppresses the release of gas and reduces internal leakage.

[0360] In addition, the components constituting the manufacturing equipment 2700 are made of aluminum, which emits less gas containing impurities. The alloys used are aluminum, chromium, titanium, zirconium, nickel, or vanadium. The metal with low outgassing rate containing the above-mentioned impurities is covered with an alloy containing iron, chromium, nickel, etc. Alloys containing iron, chromium, and nickel are strong and heat resistant. In order to reduce the surface area, the surface irregularities of the material can be polished. By reducing the amount of gas released, it is possible to reduce the amount of gas released.

[0361] Alternatively, the components of the manufacturing apparatus 2700 may be made of iron fluoride, aluminum oxide, chromium oxide, etc. It may be coated with, for example.

[0362] It is preferable that the components of the manufacturing apparatus 2700 are made of metal only, for example, quartz. When installing a viewing window made of iron fluoride, the surface is coated with iron fluoride to suppress gas emissions. It is recommended to coat it thinly with aluminum oxide or chromium oxide.

[0363] The adsorbed substances present in the transfer chamber 2704 and each chamber are adsorbed to the inner walls, etc. Although it does not affect the pressure of the transfer chamber 2704 and each chamber, This causes gas release when the chamber is evacuated. Therefore, the leak rate is proportional to the pumping speed. Although there is no relation between the two, a pump with high exhaust capacity is used to pump the transfer chamber 2704 and each chamber. It is important to desorb as much of the adsorbed matter as possible and evacuate the gas in advance. To promote desorption of adsorbates, the transfer chamber 2704 and each chamber may be baked. Baking can increase the desorption rate of adsorbed substances by about 10 times. The heating may be performed at a temperature of 100°C or higher and 450°C or lower. When adsorbed substances are removed while being introduced into each chamber, they are difficult to desorb by simply evacuating. The desorption rate of water and other substances can be further increased. By heating the temperature to the same level as King's, the desorption rate of the adsorbed substances can be further increased. Here, it is preferable to use a rare gas as the inert gas.

[0364] Alternatively, an inert gas such as a heated rare gas or oxygen may be introduced into the transfer chamber 27. After a certain time has passed, the pressure in the transfer chamber 2704 and each chamber is increased. It is preferable to evacuate the chamber. and the adsorbed substances in each chamber can be desorbed. This process can reduce impurities present in the bar. This process should be repeated at least 2 times but no more than 30 times. It is effective to repeat the process preferably 5 to 15 times. An inert gas having a temperature of 40°C or higher and 400°C or lower, preferably 50°C or higher and 200°C or lower By introducing oxygen etc., the pressure in the transfer chamber 2704 and each chamber is kept below 0.1 Pa. and 10 kPa or less, preferably 1 Pa or more and 1 kPa or less, and more preferably 5 Pa or more and 10 kPa or less. The pressure is maintained for 1 minute to 300 minutes, preferably 5 minutes to 120 minutes. After that, the transfer chamber 2704 and each chamber are heated for 5 minutes or more and 300 minutes or more. The air is evacuated for a period of time of 10 minutes to 120 minutes.

[0365] Next, the cross section of the chamber 2706b and the chamber 2706c shown in FIG. This will be explained using a schematic diagram.

[0366] The chambers 2706b and 2706c are used to apply microwaves to the object to be treated. The chambers 2706b and 2706c are chambers where processing can be performed. The only difference between the 2706c and the 2706c is the atmosphere used during microwave processing. Since these are common to both, they will be explained together below.

[0367] Chamber 2706b and chamber 2706c are connected to a slot antenna plate 2808. , a dielectric plate 2809, a substrate holder 2812, and an exhaust port 2819. Outside the chambers 2706b and 2706c, a gas supply source 2801 and A valve 2802, a high frequency generator 2803, a waveguide 2804, and a mode converter 2805 , a gas pipe 2806, a waveguide 2807, a matching box 2815, and a high frequency power supply 2816, a vacuum pump 2817, and a valve 2818 are provided.

[0368] The high frequency generator 2803 is connected to the mode converter 2805 via the waveguide 2804. The mode converter 2805 is connected to a slot antenna plate 2808 via a waveguide 2807. The slot antenna plate 2808 is placed in contact with the dielectric plate 2809. The gas supply source 2801 is connected to a mode converter 2805 via a valve 2802. Then, the gas passing through the mode converter 2805, the waveguide 2807, and the dielectric plate 2809 Pipe 2806 delivers gas to chamber 2706b and chamber 2706c. The vacuum pump 2817 also supplies the chamber with air via a valve 2818 and an exhaust port 2819. It has the function of exhausting gases and the like from the member 2706b and the chamber 2706c. The high frequency power supply 2816 is connected to the substrate holder 2812 via a matching box 2815. Connected.

[0369] The substrate holder 2812 has a function of holding the substrate 2811. For example, It has the function of electrostatically chucking or mechanically chucking the object. It also has a heating mechanism 2813 inside, It has the function of heating the substrate 2811 .

[0370] Examples of vacuum pumps 2817 include dry pumps, mechanical booster pumps, Ion pump, titanium sublimation pump, cryopump or turbomolecular pump In addition to the vacuum pump 2817, a cryotrap can be used. Water can be efficiently pumped out by using a cryopump and a cryotrap. This is particularly preferred.

[0371] The heating mechanism 2813 may be, for example, a heating mechanism that uses a resistance heating element or the like. Alternatively, heat can be transferred by heat conduction or heat radiation from a medium such as a heated gas, as follows: For example, a GRTA (Gas Rapid Therma) l Annealing) or LRTA (Lamp Rapid Thermal Annealing) RTA (Rapid Thermal Annealing) GRTA uses high-temperature gas for heat treatment. Inert gas is used.

[0372] The gas supply source 2801 is connected to a refiner via a mass flow controller. The gas used has a dew point of -80°C or less, preferably -100°C or less. For example, oxygen gas, nitrogen gas, and rare gas (such as argon gas) are preferably used. Just use it.

[0373] The dielectric plate 2809 may be made of, for example, silicon oxide (quartz), aluminum oxide (aluminum), or the like. The dielectric plate 28 may be made of yttrium oxide (yttria) or yttrium oxide (yttria). Another protective layer may be formed on the surface of the substrate 9. The protective layer may be a layer of magnesium oxide. Sium, titanium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, Silicon oxide, aluminum oxide, yttrium oxide, or the like may be used. 2809 is exposed to a particularly high density region of the high density plasma 2810 described later. Therefore, providing a protective layer can mitigate damage. This can suppress the increase in the number of

[0374] The high frequency generator 2803 can be used for frequencies in the range of 0.3 GHz to 3.0 GHz, for example, 0.7 GHz. Generates microwaves between 1.1GHz and 2.2GHz, or between 2.8GHz and 2.2GHz. The microwave generated by the high frequency generator 2803 is guided through the waveguide 2804. The mode converter 2805 converts the TE mode The transmitted microwaves are converted into TEM mode. Then, the microwaves pass through the waveguide 280 7 to the slot antenna plate 2808. The slot antenna plate 2808 has a plurality of The microwave passes through the slot holes and the dielectric plate 2809. Then, an electric field is generated below the dielectric plate 2809, and a high density plasma 2810 is generated. The high density plasma 2810 can be generated by the gas supply source 2801. There are ions and radicals depending on the gas species. For example, oxygen radicals exist. do.

[0375] At this time, the substrate 2811 is exposed to ions and radicals generated in the high-density plasma 2810. By this, it is possible to modify the film on the substrate 2811. It may be preferable to apply a bias to the substrate 2811 side using the high frequency power supply 28 For example, an RF power source with a frequency of 13.56 MHz or 27.12 MHz is used for 16. By applying a bias to the substrate side, the ions in the high density plasma 2810 are converted into the It is possible to efficiently reach the depths of the openings in the film on the plate 2811, etc.

[0376] For example, in chamber 2706b or chamber 2706c, gas source 2801 By introducing oxygen from the plasma, oxygen radical treatment using high density plasma 2810 can be performed. can.

[0377] Next, the chamber 2706a and the chamber 2706d are shown in cross-sectional view in FIG. This will be explained using a diagram.

[0378] The chambers 2706a and 2706d are used for, for example, irradiating the object to be treated with electromagnetic waves. It is possible to perform a shot in this chamber. The only difference between this and 706d is the type of electromagnetic wave. Because there are many parts, we will explain them together below.

[0379] Chamber 2706a and chamber 2706d may contain one or more lamps 2820 , a substrate holder 2825, a gas inlet 2823, and an exhaust port 2830. , outside chamber 2706a and chamber 2706d, a gas supply source 2821 , a valve 2822, a vacuum pump 2828, and a valve 2829 are provided.

[0380] The gas supply source 2821 is connected to a gas inlet 2823 via a valve 2822 . The vacuum pump 2828 is connected to an exhaust port 2830 via a valve 2829. 2820 is disposed opposite to a substrate holder 2825. The substrate holder 2825 is The substrate holder 2825 has a function of holding the substrate 2824. The substrate holder 2825 also has a heating mechanism inside. 2826 and has the function of heating the substrate 2824.

[0381] The lamp 2820 has a function of emitting electromagnetic waves such as visible light or ultraviolet light. For example, a light source having a wavelength of 10 nm or more and 2500 nm or less, or 500 nm or less Emits electromagnetic waves with a peak between 2000 nm and 40 nm or between 340 nm and 400 nm. A light source having this function may be used.

[0382] For example, the lamp 2820 may be a halogen lamp, a metal halide lamp, or a xenon lamp. Arc lamps, carbon arc lamps, high-pressure sodium lamps, or high-pressure mercury lamps A light source of this type may be used.

[0383] For example, the electromagnetic waves emitted from the lamp 2820 may be partially or completely transmitted to the substrate 2824. By being absorbed by the substrate 2824, the film on the substrate 2824 can be modified. For example, It is possible to form or reduce impurities, or remove impurities. When this is done, defects can be efficiently generated or reduced, or impurities can be removed.

[0384] Alternatively, for example, the substrate holder 2825 may be heated by electromagnetic waves emitted from the lamp 2820. The substrate 2824 may be heated by generating heat inside the substrate holder 2825. The heat mechanism 2826 may not be included.

[0385] For the vacuum pump 2828, please refer to the description of the vacuum pump 2817. The mechanism 2826 is described with reference to the description of the heating mechanism 2813. Please refer to the description of the gas supply source 2801.

[0386] The microwave processing apparatus that can be used in this embodiment is not limited to the above. The microwave processing device 2900 shown in FIG. , quartz tube 2901, gas supply source 2801, valve 2802, high frequency generator 2803, waveguide Tube 2804, gas tube 2806, vacuum pump 2817, valve 2818, and exhaust port 28 19. The microwave processing device 2900 also has a quartz tube 2901 in which a plurality of substrates are arranged. Substrate holder 2 holds 2811 (2811_1 to 2811_n, n is an integer of 2 or more). The microwave processing device 2900 also has a heating element 902 on the outside of the quartz tube 2901. The device may include a means 2903.

[0387] The microwave generated by the high frequency generator 2803 is transmitted through the waveguide 2804 to the quartz tube 2 The vacuum pump 2817 is driven via a valve 2818. It is connected to an exhaust port 2819 and the pressure inside the quartz tube 2901 can be adjusted. The gas supply source 2801 is connected to a gas pipe 2806 via a valve 2802. The desired gas can be introduced into the quartz tube 2901. This allows the substrate 2811 in the quartz tube 2901 to be heated to a desired temperature. The gas supplied from the gas supply source 2801 may be heated by a heating means 2903. The microwave processing device 2900 performs a heat treatment and a microwave treatment on the substrate 2811. The microwave treatment can be performed simultaneously after the substrate 2811 is heated. After the microwave treatment is performed on the substrate 2811, the substrate 2811 can be subjected to a heat treatment. This can be done.

[0388] The substrates 2811_1 to 2811_n are all used to form semiconductor devices or memory devices. The substrates may be processed substrates, or some of the substrates may be dummy substrates. 1 and the substrate 2811_n are dummy substrates, and the substrates 2811_2 to 2811_n are The substrate 2811_1, the substrate 2811_2, the substrate 2811_3, the substrate 2811_4, the substrate 2811_5, the substrate 2811_6, the substrate 2811_7, the substrate 2811_8, the substrate 2811_9, the substrate 2811_1, the substrate 2811_2, the substrate 2811_1, the substrate 2811 1_n-1 and the substrate 2811_n are used as dummy substrates, and the substrates 2811_3 to 28 11_n-2 may be used as a processing substrate. By using a dummy substrate, microwave processing or During the heat treatment or heating process, multiple substrates are uniformly treated, reducing variations between the substrates. For example, the high frequency generator 2803 and the processing unit closest to the waveguide 2804 are preferably By placing a dummy substrate on the substrate, the substrate to be processed is prevented from being directly exposed to microwaves. This is preferable because it can be controlled.

[0389] By using the above manufacturing equipment, it is possible to suppress the inclusion of impurities in the processed object while improving the film quality. This makes it possible to:

[0390] <Modification of Semiconductor Device> An example of a semiconductor device according to one embodiment of the present invention will be described below with reference to FIGS. 22 to 25. I will explain.

[0391] <Semiconductor Device Modification 1> An example of a semiconductor device according to one embodiment of the present invention will be described below with reference to FIGS. .

[0392] 22A shows a top view of the semiconductor device 500. The x-axis shown in FIG. The y-axis is perpendicular to the x-axis. 2B is a cross-sectional view corresponding to the portion indicated by the dashed line A1-A2 in FIG. 22A. 22A. FIG. 22C is also a cross-sectional view of the transistor 200 in the channel length direction. This is a cross-sectional view corresponding to the portion indicated by the dashed dotted line in A4, and is also a cross-sectional view of the opening region 400. It should be noted that in the top view of FIG. 22A, some elements have been omitted for clarity.

[0393] 22A to 22C, the semiconductor device shown in <Configuration Example of Semiconductor Device> The same reference numerals are used to designate structures having the same functions as those constituting the semiconductor device. In the item, the constituent materials of the semiconductor device are explained in detail in <Example of the configuration of the semiconductor device>. The above materials can be used.

[0394] The semiconductor device 500 shown in FIGS. 22A to 22C is the same as the semiconductor device shown in FIGS. 1A to 1D. The semiconductor device 500 shown in FIGS. 22A to 22C is a modified example of the semiconductor device 500. The opening region 400 formed in the insulator 280 is the same as that of the semiconductor device shown in FIGS. 1A to 1D. In addition, a sealing portion 265 is formed so as to surround the plurality of transistors 200. This is different from the semiconductor device shown in FIGS. 1A to 1D in that:

[0395] The semiconductor device 500 includes a plurality of transistors 200 arranged in a matrix, and It has a plurality of opening regions 400. It also functions as the gate electrode of the transistor 200. A plurality of conductors 260 are provided extending in the y-axis direction. The oxide 230 and the conductor 260 are formed in a region that does not overlap with each other. The transistor 200, the plurality of conductors 260, and the plurality of opening regions 400 are surrounded by a The sealing portion 265 is formed. The transistor 200, the conductor 260, and the opening The number, arrangement, and size of the regions 400 are not limited to the structure shown in FIG. 22, and may be any other structure. This may be set appropriately in accordance with the design of the body device 500.

[0396] As shown in FIGS. 22B and 22C, the sealing portion 265 includes a plurality of transistors 200, Remove the insulators 216, 222, 275, 280, and 282. In other words, the insulator 283 is provided so as to surround the insulator 216 and the insulator 22. 2, and is provided to cover the insulators 275, 280, and 282. In addition, in the sealing portion 265, the insulator 283 is in contact with the upper surface of the insulator 214. In 265, an insulator 274 is provided between an insulator 283 and an insulator 285. The upper surface of the insulator 274 is approximately flush with the top surface of the insulator 283. For the insulating layer 240, an insulator similar to the insulator 280 can be used.

[0397] By using such a structure, the plurality of transistors 200 are connected by the insulator 283 and the insulator 2 14 and insulator 212. Here, insulator 283, insulator 214 and one or more of the insulators 212 function as a barrier insulating film against hydrogen. This allows hydrogen contained outside the region of the sealing portion 265 to be absorbed into the region of the sealing portion 265. This can prevent the material from being mixed into the interior of the container.

[0398] As shown in FIG. 22C, the insulator 282 has an opening in the opening region 400. In addition, in the opening region 400, the insulator 280 overlaps the opening of the insulator 282, forming a groove. The depth of the groove of the insulator 280 may be such that the top surface of the insulator 275 is exposed even if the depth is large. For example, the thickness should be between 1 / 4 and 1 / 2 of the maximum thickness of the insulator 280. Just do that.

[0399] 22C, the insulator 283 is disposed inside the opening region 400 and is separated from the insulator 28 2, the side of the insulator 280, and the top surface of the insulator 280. In 00, a part of the insulator 274 is formed so as to fill the recess formed in the insulator 283. At this time, the upper surface of the insulator 274 formed in the opening region 400 and the insulating The heights of the top surfaces of the edge bodies 283 may be approximately the same.

[0400] Such an opening region 400 is formed, and the insulator 280 is exposed through the opening of the insulator 282. In this state, a heat treatment is performed to supply oxygen to the oxide 230, and the insulator 2 A portion of the oxygen contained in 80 can be diffused outward from the open region 400. The channel-shaped insulator 280 containing oxygen that is desorbed by heating is then removed from the oxide semiconductor layer. The area that functions as the growth area and its vicinity must be supplied with sufficient oxygen and an excess amount of oxygen must be avoided. Therefore, it is possible to prevent the supply of the element.

[0401] At this time, hydrogen contained in the insulator 280 is bonded with oxygen, and the hydrogen is transferred through the opening region 400. The hydrogen that has combined with oxygen is released as water. The hydrogen contained in the insulator 280 is reduced, and the hydrogen contained in the insulator 280 is converted into the oxide 230. This can reduce contamination.

[0402] In addition, in FIG. 22A, the shape of the opening region 400 in a top view is substantially rectangular. However, the present invention is not limited to this. The shape may be rectangular, oval, circular, diamond, or a combination thereof. The area and spacing of the opening regions 400 are determined based on the semiconductor device including the transistor 200. For example, when the density of the transistors 200 is small, In the small area, the area of ​​the opening area 400 is increased, or the interval between the opening areas 400 is decreased. In addition, for example, in a region where the density of the transistors 200 is high, the opening region 40 This can be achieved by narrowing the area of ​​the 0 or widening the spacing between the open areas.

[0403] <Modification 2 of Semiconductor Device> An example of a semiconductor device according to one embodiment of the present invention will be described below with reference to FIGS. .

[0404] 23A shows a top view of the semiconductor device. Also, FIG. 23B shows the A1-A2 23A. Also, FIG. 23C is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. 23A. 23D is a cross-sectional view corresponding to the portion indicated by the dashed line A5-A6 in FIG. 23A is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. Some elements have been omitted for this reason.

[0405] 23A to 23D, the semiconductor device shown in <Configuration Example of Semiconductor Device> The same reference numerals are used to designate structures having the same functions as those constituting the semiconductor device. In the item, the constituent materials of the semiconductor device are explained in detail in <Example of the configuration of the semiconductor device>. The above materials can be used.

[0406] The semiconductor device shown in FIGS. 23A to 23D is a variation of the semiconductor device shown in FIGS. 1A to 1D. The semiconductor device shown in FIGS. 23A to 23D is an example of the semiconductor device shown in FIGS. 1A to 1D. The difference between the device and the device is that it does not have the oxide 243. By not providing the oxide 243, The electrical resistance between the conductor 242 and the oxide 230b can be reduced. In the semiconductor device 200, a decrease in on-state current, a decrease in field effect mobility, or a deterioration in frequency characteristics occurs. It may be possible to suppress the following.

[0407] The semiconductor device shown in FIGS. 23A to 23D is the same as the semiconductor device shown in FIGS. 1A to 1D. The insulator 241c is provided between the insulator 241a and the conductor 240a. The difference is that an insulator 241d is provided between the insulator 1b and the conductor 240b. The insulator 241a (insulator 241b) and the insulator 241c (insulator 241d) have a high resistance to oxygen. It is preferable to use a barrier insulating film and a barrier insulating film against hydrogen in combination.

[0408] For example, the insulators 241a and 241b may be aluminum oxide films formed by the ALD method. The insulators 241c and 241d are made of aluminum and formed by the PEALD method. By using such a structure, oxidation of the conductor 240 can be suppressed. Furthermore, the incorporation of hydrogen into the conductor 240 can be reduced.

[0409] <Semiconductor Device Modification 3> An example of a semiconductor device according to one embodiment of the present invention will be described below with reference to FIGS. .

[0410] The semiconductor device shown in FIGS. 24A and 24B is the same as the semiconductor device shown in FIGS. 23A to 23D. 24A and 24B are enlarged views corresponding to the cross-sectional view shown in FIG. 23B. Figure.

[0411] 23A to 23D, the semiconductor device shown in <Configuration Example of Semiconductor Device> The same reference numerals are used to designate structures having the same functions as those constituting the semiconductor device. In the item, the constituent materials of the semiconductor device are explained in detail in <Example of the configuration of the semiconductor device>. The above materials can be used.

[0412] The semiconductor device shown in FIG. 24A differs from the semiconductor devices shown in FIGS. 23A to 23D in that The difference is that 262 is a laminated film of an insulator 262a and an insulator 262b on the insulator 262a. become.

[0413] The insulator 262a has a bottom surface in contact with the oxide 230b, and a side surface in contact with the conductor 242 and the insulator 271. , insulator 275, and insulator 280. Insulator 262b is in contact with the lower surface and the conductive The side of the conductor 242 is in contact with the insulator 262a, and the side of the conductor 260 is in contact with the insulator 250a. To contact.

[0414] The insulators 262a and 262b can be used for the insulator 262 described above. Here, the insulator 262b is not in contact with the oxide 230b. Therefore, even if a nitride such as silicon nitride is used for the insulator 262b, the insulator 26 The nitrogen contained in 2b does not diffuse into the oxide 230b. An excessive amount of nitrogen diffuses into the channel formation region, causing the transistor 200 to become normally on. This can prevent this.

[0415] For example, the insulator 262a is made of aluminum oxide formed by a thermal ALD method. Silicon nitride film formed by PEALD method can be used as 262b. A laminated film of an aluminum oxide film formed by the D method and a silicon nitride film formed by the PEALD method is anisotropically etched to form the insulators 262a and 262b. In the step shown in FIG. 12, the aluminum oxide film that will become the insulator 262a is This can function as an etching stopper when forming insulator 2. Using 62b as a mask, a part of the aluminum oxide film is removed by wet etching. By doing so, the insulator 262a can be formed. 280, oxide 230b, and insulator 222 from being over-etched. can be done.

[0416] In the above process, the aluminum oxide film is not wet-etched. In this case, the heat treatment performed in the steps of FIG. 12 and subsequent steps may result in the structure shown in FIG. 24B. In this way, the surface layer of the oxide 230b (hereinafter referred to as region 230d) is alloyed (alloyed Here, an In-Ga-Zn oxide is used as the oxide 230b. In this case, the region 230d becomes an In-Ga-Zn-Al oxide and serves as a channel forming region. In addition, the region 230d may be alloyed to form the oxide 230b. This can prevent the indium contained in the insulating material 250a from diffusing into the insulating material 250a.

[0417] The semiconductor device shown in FIG. 24A differs from the semiconductor devices shown in FIGS. 23A to 23D in the following respects: The difference is that an insulator 250c is provided between the insulator 250b and the conductor 260a.

[0418] The lower surface of the insulator 250c contacts the insulator 250b, and the upper surface contacts the conductor 260a. The insulator 250c may be any insulator that can be used for the insulator 250b. It is preferable to use a barrier insulating film against hydrogen as the insulator 250c. As a result, impurities such as hydrogen contained in the conductor 260 are absorbed into the insulators 250b, 250a, and oxide 230b. A silicon nitride film formed by the PEALD method may be used.

[0419] When the insulator 250c is provided, an insulating film 250B is formed as shown in FIG. After microwave processing, silicon nitride is used as an insulating film to be the insulator 250c. The film may be formed by the ALD method. Alternatively, an insulating film may be formed to become the insulator 250c.

[0420] <Modification 4 of the semiconductor device> An example of a semiconductor device according to one embodiment of the present invention will be described below with reference to FIG. 25. .

[0421] 25A shows a top view of the semiconductor device. Also, FIG. 25B shows the A1-A2 25A. Also, FIG. 25C is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. 25A. 25D is a cross-sectional view corresponding to the portion indicated by the dashed line A5-A6 in FIG. 25A is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. Some elements have been omitted for this reason.

[0422] In the semiconductor device shown in FIGS. 25A to 25D, The same reference numerals are used to designate structures having the same functions as those constituting the semiconductor device. In the item, the constituent materials of the semiconductor device are explained in detail in <Example of the configuration of the semiconductor device>. The above materials can be used.

[0423] The semiconductor device shown in FIGS. 25A to 25D is a variation of the semiconductor device shown in FIGS. 1A to 1D. The semiconductor device shown in FIGS. 25A to 25D is an example of the semiconductor device shown in FIGS. 1A to 1D. The difference from the above device is that the upper part of the insulator 262 is in contact with the insulator 282. By doing so, the amount of oxygen supplied from the insulator 280 to the insulator 250a can be reduced. Therefore, the oxide 230 contains enough oxygen before oxygen is supplied from the insulator 280. In this case, the configuration shown in FIGS. 25A to 25D may be used.

[0424] In any of the steps shown in FIGS. 11 to 16, the insulator 2 containing silicon nitride is As the oxidation of insulator 262 progresses, part or all of insulator 262 becomes silicon oxynitride or silicon nitride. In this case, the upper part of the insulator 262, for example, the upper part of the insulator 262, The portion of 62 in contact with the insulator 280 and the insulator 250a is silicon oxynitride or nitride. It is sufficient to use a structure in which silicon oxide is used.

[0425] The insulator 262 is silicon oxynitride or silicon nitride oxide, so that the insulator 280 Therefore, oxygen can be supplied to the insulator 250a from the insulator 262. By controlling the progress of oxidation, the amount of oxygen supplied from the insulator 280 to the oxide 230 can be controlled. It is possible.

[0426] According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device with high field-effect mobility can be provided. According to one embodiment of the present invention, a semiconductor device with favorable frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided. According to one embodiment of the present invention, a semiconductor device with little variation in transistor characteristics can be provided. Alternatively, according to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. A conductor device can be provided.

[0427] The configurations, methods, and the like described in this embodiment may be used in combination with other configurations, methods, and the like described in this embodiment. The present invention may be appropriately combined with the configurations and methods shown in the embodiments or the configurations and methods shown in the examples. It can be used.

[0428] (Embodiment 2) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0429] [Storage device 1] An example of a semiconductor device (memory device) according to one embodiment of the present invention is illustrated in FIG. In this semiconductor device, the transistor 200 is provided above the transistor 300, and the capacitance element The transistor 100 is provided above the transistor 300 and the transistor 200. The transistor 200 may be the transistor 200 described in the previous embodiment. This can be done.

[0430] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer including an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This allows the memory contents to be retained for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently.

[0431] In the semiconductor device shown in FIG. 26, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the first gate of the transistor 200. 006 is electrically connected to the second gate of the transistor 200. The gate of transistor 300 and the other of the source and drain of transistor 200 are connected to a capacitor. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. It is electrically connected to the other.

[0432] In addition, the memory device shown in FIG. 26 has a memory cell array arranged in a matrix. It can be configured.

[0433] <Transistor 300> The transistor 300 is provided on a substrate 311 and includes a conductor 316 that functions as a gate. , an insulator 315 serving as a gate insulator, and a semiconductor region 311 consisting of a portion of a substrate 311. 3, and a low resistance region 314a which functions as a source region or a drain region, and a low The transistor 300 may be a p-channel or n-channel It can be of any type.

[0434] Here, the transistor 300 shown in FIG. 26 has a semiconductor region 313 ( The side and top surfaces of the semiconductor region 313 are insulated. The conductor 316 is provided so as to cover the edge 315. Materials for adjusting the work function may also be used. It is also called a FIN type transistor because it uses a convex part. In addition, the insulating layer may have an insulating material that functions as a mask for forming the convex portions. Here, we have shown a case where a protrusion is formed by processing a part of a semiconductor substrate, but it is also possible to process an SOI substrate. A semiconductor film having a convex shape may be formed by the above process.

[0435] The transistor 300 shown in FIG. 26 is an example, and the structure is not limited to this. Appropriate transistors may be used depending on the structure or driving method.

[0436] <Capacitor element 100> The capacitor 100 is provided above the transistor 200. a conductor 110 serving as the first electrode and a conductor 120 serving as the second electrode; The insulator 130 functions as a dielectric. It is preferable to use an insulator that can be used as the insulator 275 shown in the embodiment.

[0437] Also, for example, the conductor 112 provided on the conductor 240 and the conductor 110 are formed at the same time. Note that the conductor 112 can be used in the capacitor 100, the transistor 200, and The wiring 301 functions as a plug or wiring that is electrically connected to the transistor 300. In addition, the conductor 112 and the conductor 110 correspond to the conductor 246 shown in the previous embodiment. .

[0438] In FIG. 26, the conductor 112 and the conductor 110 are shown as single-layer structures, but the present invention is not limited to this configuration. For example, a conductive material having a barrier property and a conductive material having a high conductivity may be used. Conductors with barrier properties between weak conductors and highly conductive conductors with good adhesion may form a highly conductive material.

[0439] The insulator 130 may be, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum nitride oxide, nitride Aluminum oxide, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride The material may be aluminum or the like, and may be provided as a laminated layer or a single layer.

[0440] For example, the insulator 130 may be made of a material with high dielectric strength such as silicon oxynitride and a material with high dielectric strength such as silicon oxynitride. It is preferable to use a laminated structure with a high-k material. The element 100 has a high dielectric constant (high-k) insulator, which ensures sufficient capacitance. By using an insulator with a high dielectric strength, the dielectric strength is improved, and the electrostatic breakdown of the capacitance element 100 is prevented. This can suppress the destruction.

[0441] In addition, oxide is used as an insulator for high dielectric constant (high-k) materials (materials with high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxide, Oxynitride with Aluminum and Hafnium, Silicon and Hafnium oxides having silicon and hafnium, oxide nitrides having silicon and hafnium, or oxide nitrides having silicon and hafnium Nitrides containing fluorine are also included.

[0442] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and oxynitride. silicon dioxide, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, silicon oxide with vacancies Examples include concrete or resin.

[0443] <Wiring layer> Between each structure, a wiring layer including an interlayer film, wiring, plugs, etc. is provided. In addition, multiple wiring layers can be provided depending on the design. Conductors that function as wiring or wiring may be grouped together and given the same symbol. In addition, in this specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, when a part of the conductor functions as a wiring, or when the conductor Some may also function as plugs.

[0444] For example, an insulator 320, an insulator 322, an insulator 323, and an insulator 324 are provided over the transistor 300 as interlayer films. The insulating member 320, the insulating member 324, and the insulating member 326 are stacked in this order. The insulators 322, 324, and 326 are connected to the capacitive element 100 or the transistor. The conductive material 328 and the conductive material 330 are embedded in the conductive material 328 and the conductive material 330. The conductors 328 and 330 function as plugs or wiring.

[0445] In addition, the insulator that functions as an interlayer film acts as a planarizing film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be subjected to chemical mechanical polishing (CMP) to improve flatness. The surface may be planarized by a planarization process using a CMP method or the like.

[0446] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In this case, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring.

[0447] Similarly, the insulators 210, 212, 214, and 216 are electrically conductive. The conductive material 218 and the conductive material (conductive material 205) that constitutes the transistor 200 are embedded. Note that the conductor 218 is electrically connected to the capacitor 100 or the transistor 300. The conductor 120 and the insulator 130 function as a plug or wiring. An insulator 150 is provided on 130 .

[0448] Here, similar to the insulator 241 shown in the above embodiment, the conductor 2 An insulator 217 is provided in contact with the side surface of the insulator 18. The insulator 217 is 212, insulator 214, and insulator 216 are provided in contact with the inner walls of the openings formed therein. That is, the insulator 217 is made up of the conductor 218, the insulator 210, the insulator 212, and the insulator 214 and the insulator 216. 18, the insulator 217 is in contact with the side of the conductor 205. Sometimes it may be formed.

[0449] The insulator 217 may be, for example, silicon nitride, aluminum oxide, or silicon nitride oxide. The insulator 217 may be an insulator such as silicon. Since the insulating member 210 and the insulating member 222 are provided in contact with each other, the insulating member 210 and the insulating member 222 are not Impurities such as water or hydrogen from the conductor 218 are mixed into the oxide 230. In particular, silicon nitride is preferred because it has a high barrier property against hydrogen. In addition, oxygen contained in the insulator 210 or the insulator 216 is absorbed into the conductor 218. This can prevent it from being

[0450] Insulator 217 can be formed in a similar manner to insulator 241. For example, PEA Silicon nitride is deposited using the LD method, and anisotropic etching is performed to reach the conductor 356. An opening can be formed to allow the hole to be opened.

[0451] Insulators that can be used as the interlayer film include oxides, nitrides, and oxides that have insulating properties. Examples of such materials include metal nitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0452] For example, by using a material with a low relative dielectric constant for the insulator that functions as an interlayer film, Therefore, depending on the function of the insulator, the material It is recommended to select:

[0453] For example, the insulators 150, 210, 352, and 354 have relatively It is preferable to have an insulator with a low dielectric constant, for example silicon oxynitride. , silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, carbon and and silicon oxide with nitrogen added, silicon oxide or resin with pores. Alternatively, the insulator is preferably silicon oxide, silicon oxynitride, or silicon nitride oxide. silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, Lamination of silicon oxide with added silicon and nitrogen or silicon oxide with pores and resin Silicon oxide and silicon oxynitride are thermally stable. Therefore, by combining it with resin, it is possible to create a laminated structure that is thermally stable and has a low dielectric constant. Examples of resins include polyester, polyolefin, polyamide (nylon), Examples include polyethylene, aramid, polyimide, polycarbonate, or acrylic.

[0454] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Therefore, the insulators 214, 212, and 350 can be filled with hydrogen and the like. An insulator having a function of suppressing the permeation of impurities and oxygen may be used.

[0455] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttria oxide ammonium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tungsten oxide Metal oxides such as talc, silicon nitride oxide, silicon nitride, etc. can be used. .

[0456] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Sodium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metal elements selected from the group consisting of ruthenium and lithium can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as silicon, Silicides such as nickel silicide may also be used.

[0457] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., include metal materials, alloy materials, metal nitride materials, or Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. It is preferable to use a high melting point material such as tungsten or molybdenum, which is also electrically conductive. It is preferable to use tungsten, which has a low resistance, or aluminum or copper. It is preferable to form the wiring from a conductive material. By using a low-resistance conductive material, the wiring resistance can be reduced. It is possible.

[0458] <Wiring or plug in layer provided with oxide semiconductor> When an oxide semiconductor is used for the transistor 200, excess An insulator having an oxygen region may be provided. In this case, the insulator having the excess oxygen region and an insulator having a barrier property is provided between the insulator having the excess oxygen region and a conductor provided on the insulator. It is preferable to provide such a function.

[0459] For example, in FIG. 26, insulator 285 and insulator 28 It is preferable to provide an insulator 241 between the insulator 241 and the conductor 240. 22, the insulator 275, the insulator 282, and the insulator 283 are provided in contact with each other, The insulator 224 and the transistor 200 are sealed with an insulator having barrier properties. The structure can be:

[0460] In other words, by providing the insulator 241, the excess oxygen contained in the insulator 280 is absorbed by the conductor 24 Furthermore, by having the insulator 241, it is possible to suppress the absorption of impurities. The diffusion of hydrogen, which is a substance, into the transistor 200 via the conductor 240 is suppressed. It is possible.

[0461] The insulator 241 is made of a material that suppresses the diffusion of impurities such as water or hydrogen, and oxygen. For example, silicon nitride, silicon nitride oxide, It is preferable to use aluminum oxide or hafnium oxide. In particular, silicon nitride Magnesium oxide is preferred because it has a high barrier property against hydrogen. aluminum, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide Metal oxides such as tantalum oxide, neodymium oxide, or tantalum oxide can be used.

[0462] As described in the above embodiment, the transistor 200 includes the insulator 212 and the insulator 214, the insulator 282, and the insulator 283 may be sealed. By this configuration, hydrogen contained in the insulator 285, the insulator 150, etc. is absorbed by the insulator 280, etc. This can reduce contamination.

[0463] Here, the insulator 283 and the insulator 282 are connected to the conductor 240, the insulator 214 and the The conductor 218 penetrates the insulator 212, but as described above, the insulator 241 penetrates the conductor 218. 40, and the insulator 217 is provided in contact with the conductor 218. 212, insulator 214, insulator 216, and insulator 218 are connected via conductor 240 and conductor 218. 82 and the hydrogen mixed inside the insulator 283 can be reduced. Insulator 212, insulator 214, insulator 282, insulator 283, insulator 241, and The transistor 200 is sealed with an insulator 217, and impurities such as hydrogen contained in the insulator 285 are removed. It is possible to reduce contamination from outside.

[0464] <Dicing line> In the following, a large-area substrate is divided into individual semiconductor elements to form multiple semiconductor devices. Dicing lines (scribe lines, dividing lines) are provided when extracting chips. The dividing method is as follows: First, grooves (dicing lines) for dividing the semiconductor elements are formed on the substrate, and then the dicing In some cases, the substrate is cut by a grinder and divided (divided) into a plurality of semiconductor devices.

[0465] Here, for example, as shown in FIG. 26, the area where the insulator 283 and the insulator 214 contact each other It is preferable to design the chip so that the dicing line overlaps the chip. In the vicinity of the region that will become the dicing line provided on the outer edge of the memory cell having the capacitor 200, , insulator 282, insulator 280, insulator 275, insulator 222, and insulator 216. Provide an opening.

[0466] That is, insulator 282, insulator 280, insulator 275, insulator 222, and insulator 2 Insulator 214 and insulator 283 are in contact with each other at the opening formed in insulator 16. For example, In this case, the insulator 214 and the insulator 283 may be formed using the same material and the same method. The body 214 and the insulator 283 are provided using the same material and in the same method, thereby improving adhesion. It is possible.

[0467] This structure allows the insulators 212, 214, 282, and 283 to , can encase the transistor 200. Insulator 212, insulator 214, insulator 2 At least one of the insulating material 282 and the insulating material 283 has a function of suppressing the diffusion of oxygen, hydrogen, and water. Therefore, the substrate can be formed for each circuit region in which the semiconductor element shown in this embodiment mode is formed. By dividing the substrate, even if it is processed into multiple chips, hydrogen or This can prevent impurities such as water from entering and diffusing into the transistor 200.

[0468] In addition, this structure can prevent excess oxygen in the insulator 280 from diffusing to the outside. Therefore, the excess oxygen in the insulator 280 effectively reduces the channel area in the transistor 200. The oxygen is supplied to the oxide on which the channel in transistor 200 is formed. This reduces the oxygen vacancies in the oxide that forms the transistor. The oxide in which the channel is formed has low defect level density and stable characteristics. In other words, the change in the electrical characteristics of the transistor 200 can be suppressed. At the same time, reliability can be improved.

[0469] In the memory device shown in FIG. 26, the shape of the capacitor element 100 is a planar type. The storage device shown in the embodiment is not limited to this. For example, as shown in FIG. Alternatively, the shape of the capacitor element 100 may be a cylinder. The configuration below the insulator 150 is similar to that of the semiconductor device shown in FIG.

[0470] The capacitance element 100 shown in FIG. 27 includes an insulator 150 on an insulator 130 and a The insulator 142 and the conductor disposed in the opening formed in the insulator 150 and the insulator 142. Conductor 115, insulator 145 on conductor 115 and insulator 142, and The wiring board 100 includes a conductor 125 and an insulator 152 on the conductor 125 and the insulator 145. The conductor 115 and the insulator 142 are inserted into the openings formed in the insulator 150 and the insulator 142. 5, and at least a portion of the conductor 125 is disposed on the insulator 152. 154 is disposed on the insulating material 154, and a conductor 153 and an insulator 156 are disposed on the insulating material 154. , the conductor 140 is made up of the insulator 130, the insulator 150, the insulator 142, the insulator 145, and the insulator 152 and in an opening formed in an insulator 154.

[0471] The conductor 115 functions as the lower electrode of the capacitor 100, and the conductor 125 functions as the 0, and the insulator 145 functions as a dielectric of the capacitive element 100. The capacitor 100 has openings in the insulators 150 and 142, not only on the bottom surface but also on the The upper and lower electrodes are also configured to face each other on the side with a dielectric material between them. Therefore, the deeper the opening, the greater the capacitance per area. In this way, the capacitance of the capacitor 100 can be increased. By increasing the capacitance per unit area, miniaturization or high integration of semiconductor devices can be achieved. can be promoted.

[0472] The insulator 152 may be made of an insulator that can be used for the insulator 280. The edge 142 acts as an etch stop when forming the opening in the insulator 150. It is preferable to use an insulator that can be used for the insulator 214.

[0473] The openings formed in the insulators 150 and 142 have a rectangular shape when viewed from above. Alternatively, the shape may be a polygon other than a square, or the corners of the polygon may be curved. Here, when viewed from above, the opening may have a circular shape including an ellipse. It is preferable that the overlapping area between the gate and the transistor 200 is large. As a result, the area occupied by the semiconductor device having the capacitor element 100 and the transistor 200 can be reduced. This can be done.

[0474] The conductor 115 is disposed in contact with the openings formed in the insulators 142 and 150. It is preferable that the upper surface of the conductor 115 is substantially flush with the upper surface of the insulator 142. The lower surface of the conductor 115 contacts the conductor 110 through the opening in the insulator 130. The conductive layer 5 is preferably formed by the ALD method or the CVD method. Any conductor that can be used for 05 may be used.

[0475] The insulator 145 is disposed to cover the conductor 115 and the insulator 142. For example, It is preferable to form the insulator 145 by using the ALD method, the CVD method, or the like. 45 is, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, Zirconium oxide, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, Aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride For example, the insulator 1 may be made of aluminum or the like, and may be formed as a laminated layer or a single layer. 45, zirconium oxide, aluminum oxide, zirconium oxide are layered in this order. An insulating film having such a structure can be used.

[0476] The insulator 145 is made of a material with high dielectric strength, such as silicon oxynitride, or a material with high dielectric strength. It is preferable to use a material with a high dielectric constant (high-k). A stack of dielectric (high-k) materials may also be used.

[0477] In addition, oxide is used as an insulator for high dielectric constant (high-k) materials (materials with high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxide, Oxynitride with Aluminum and Hafnium, Silicon and Hafnium oxides having silicon and hafnium; oxide nitrides having silicon and hafnium; By using such high-k materials, the insulator 1 Even if the insulator 145 is made thick, the capacitance of the capacitor element 100 can be sufficiently ensured. By making the thickness of the conductive material 115 and the conductive material 125 thicker, the leakage current occurring between the conductive material 115 and the conductive material 125 is suppressed. It is possible.

[0478] On the other hand, materials with high dielectric strength include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, Examples include silicon oxide doped with carbon and nitrogen, silicon oxide with pores, and resin. For example, silicon nitride (SiN x ), which was produced using the PEALD method Silicon oxide (SiO x ), silicon nitride (SiN x ) Insulating films laminated in this order can be used. By using the above, the dielectric strength is improved and electrostatic breakdown of the capacitor element 100 can be suppressed. .

[0479] The conductor 125 is arranged to fill the openings formed in the insulators 142 and 150. The conductor 125 is connected to the wiring 10 via the conductor 140 and the conductor 153. The conductor 125 is formed by using the ALD method or the CVD method. For example, a conductor that can be used for the conductor 205 may be used. stomach.

[0480] The conductor 153 is provided on an insulator 154 and is covered with an insulator 156. The conductor 153 may be made of any conductor that can be used for the conductor 112. The insulator 156 may be an insulator that can be used for the insulator 152. 53 is in contact with the upper surface of the conductor 140, and It serves as a terminal of the transistor 300.

[0481] [Storage device 2] An example of a semiconductor device (memory device) according to one embodiment of the present invention is illustrated in FIG.

[0482] <Memory device configuration example> 28 is a cross-sectional view of a semiconductor device having a memory device 290. The memory device 290 is a capacitor device in addition to the transistor 200 shown in FIGS. 1A-1D. 28 corresponds to a cross-sectional view of the transistor 200 in the channel length direction. do.

[0483] The capacitance device 292 is made up of a conductor 242b and an insulator 27 disposed on the conductor 242b. 1b, an insulator 275 provided to cover the conductor 242b and the insulator 271b, and an insulator and a conductive material 294 on the substrate 275. That is, the capacitance device 292 is a MIM (metal-insulator-metal) The capacitor is made up of a metal-insulator-metal capacitor. One of the pair of electrodes of 292, that is, the conductor 242b, is the source electrode of the transistor. The dielectric layer of the capacitance device 292 can also serve as a transistor electrode. 271 and 275. Therefore, in the manufacturing process of the capacitor device 292, a part of the manufacturing process of the transistor is Since the capacitor and the capacitor element can be used for both purposes, the semiconductor device can be manufactured with high productivity. One of the pair of electrodes of the device 292, that is, the conductor 242b, is the solenoid of the transistor. Since it also serves as the source electrode, the area in which the transistor and the capacitance device are arranged is reduced. It is possible to do this.

[0484] The conductor 294 may be made of a material that can be used for the conductor 242. That's fine.

[0485] <Modifications of memory devices> In the following, the configuration of the memory device described above will be explained with reference to FIGS. 29A, 29B, and 30. The transistor 200 according to one embodiment of the present invention and the capacitor device An example of a semiconductor device having a device 292 will be described. 30, the semiconductor device shown in FIG. 30 can be used in the same manner as in the previous embodiments and the memory device configuration example. The structures having the same functions as the structures constituting the semiconductor device shown in FIG. 28 are designated by the same reference numerals. In this section, the transistor 200 and the capacitance device 292 The constituent materials are described in detail in the previous embodiments and in the <Configuration Example of Memory Device>. The above materials can be used.

[0486] <<Memory Device Variation 1>> In the following, a transistor 200a, a transistor 200b, and a capacitor according to one embodiment of the present invention will be described. An example of a semiconductor device 600 having a capacitance device 292a and a capacitance device 292b is shown in FIG. This will be explained with reference to FIG. 29A.

[0487] FIG. 29A shows a transistor 200a, a transistor 200b, a capacitance device 292a, 10 is a cross-sectional view in the channel length direction of a semiconductor device 600 having a capacitance device 292b. Here, the capacitance device 292a is composed of the conductor 242a and a The insulator 271a and the insulator 272a are provided to cover the conductor 242a and the insulator 271a. 5 and a conductor 294a provided on the insulator 275. 92b is a conductor 242b, an insulator 271b provided on the conductor 242b, and a conductor 242b and the insulator 271b, and an insulator 275 provided on the insulator 275. and a conductor 294b.

[0488] As shown in FIG. 29A, the semiconductor device 600 is a symmetrical structure of a line A3-A4. The transistor 200a has a symmetrical configuration. The source electrode or the drain electrode of the transistor 200b is connected to the conductor 242c. The insulator 271c is provided on the conductor 242c. In addition, an oxide 243c is provided under the conductor 242c. The connection between the electric body 246 and the transistors 200a and 200b is also made by plugs. The conductor 240 functions as both a transistor and a transistor. By configuring the capacitor, two capacitance devices, and the connections between the wiring and plugs as described above, miniaturization is possible. Alternatively, a semiconductor device that can be highly integrated can be provided.

[0489] The transistor 200a, the transistor 200b, the capacitance device 292a, and the capacitance device The configuration and effect of each of the vise 292b are shown in FIGS. 1A to 1D and 2. 8 can be taken into consideration.

[0490] <<Memory Device Variation 2>> In the above, the transistor 200a and the transistor 20 0b, the capacitance device 292a, and the capacitance device 292b are given. The semiconductor device is not limited to this. For example, as shown in FIG. 29B, 600 and a semiconductor device having the same configuration as the semiconductor device 600 are connected via a capacitance section. In this specification, the transistor 200a and the transistor 200b A semiconductor device having the capacitance device 292a and the capacitance device 292b is called a cell. The transistor 200a, the transistor 200b, the capacitance device 292a, and the capacitance device The configuration of device 292b is the same as that of transistors 200a and 200b described above. , the description of the capacitance device 292a and the capacitance device 292b can be taken into consideration. .

[0491] FIG. 29B shows a transistor 200a, a transistor 200b, a capacitance device 292a, and a semiconductor device 600 having a capacitance device 292b, and a semiconductor device 600 having a similar structure to the semiconductor device 600. FIG. 1 is a cross-sectional view in which cells having a configuration are connected via a capacitance portion.

[0492] As shown in FIG. 29B, one electrode of the capacitance device 292b included in the semiconductor device 600 The conductor 294b functions as a semiconductor device 600 having a similar configuration. It also serves as one electrode of the capacitance device of the capacitor 01. , a conductor 292a that functions as one electrode of a capacitance device 292a included in the semiconductor device 600. 94a is the semiconductor device adjacent to the left side of the semiconductor device 600, that is, in the A1 direction in FIG. 29B. The right side of the semiconductor device 601 also serves as one electrode of the capacitance device of the semiconductor device. In FIG. 29B, the cells in the A2 direction have the same configuration. An array (also called a memory device layer) can be constructed. By using this configuration, the distance between adjacent cells can be reduced, which improves the projection of the cell array. The shadow area can be reduced, enabling high integration. The configuration of (a) is arranged in a matrix to form a matrix cell array. can be done.

[0493] As described above, in the configuration shown in this embodiment, the transistor 200a and the transistor 20 0b, capacitance device 292a and capacitance device 292b are formed to The area can be reduced, and the miniaturization or high integration of a semiconductor device having a cell array can be achieved. do.

[0494] The cell array may be configured not only as a plane but also as a stacked structure. As shown in FIG. 30, a plurality of cell arrays ( By stacking the cell arrays 610_1 to 610_n, the cell array Cells can be integrated and arranged without increasing the occupied area. Rays can be constructed.

[0495] The configurations, methods, etc. shown in this embodiment may be used in conjunction with other configurations, methods, and other implementations shown in this embodiment. The present invention may be used in combination with the configurations and methods shown in the above embodiments or the configurations and methods shown in the examples. It is possible.

[0496] (Embodiment 3) In this embodiment, the present invention will be explained with reference to FIGS. 31A, 31B, and 32A to 32H. According to one embodiment of the present invention, a transistor using an oxide as a semiconductor (hereinafter referred to as an OS transistor) ), and a storage device to which a capacitive element is applied (hereinafter referred to as an OS memory device) The OS memory device includes at least a capacitive element and a The memory device has an OS transistor that controls the charging and discharging of the element. The flash current is extremely small, so the OS memory device has excellent retention characteristics and is non-volatile. It can be made to function as such.

[0497] <Storage device configuration example> 31A shows an example of the configuration of an OS memory device. 1, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 1420, It has column circuitry 1430, output circuitry 1440, and control logic circuitry 1460. .

[0498] The column circuitry 1430 includes, for example, a column decoder, a precharge circuit, a sense amplifier, a write The precharge circuit has a function of precharging the wiring. The amplifier has the function of amplifying the data signal read from the memory cell. The lines are wirings connected to memory cells in the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal RDA TA to the outside of the storage device 1400. It has a decoder, a word line driver circuit, etc., and can select a row to be accessed.

[0499] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 The high power supply voltage (VDD) for the 11 and the high power supply voltage (VIL) for the memory cell array 1470 are The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The data signal WDATA is input to the write circuit. do.

[0500] The control logic circuit 1460 receives externally input control signals (CE, WE, R E) to generate control signals for the row decoder and column decoder. The control signal WE is a write enable signal, and the control signal R E is a read enable signal. The signal is not limited to this, and other control signals may be input as required.

[0501] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc.

[0502] In FIG. 31A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. However, the present embodiment is not limited to this. For example, As shown in FIG. 31B, a memory cell array 1470 is overlapped on a part of the peripheral circuit 1411. For example, the memory cell array 1470 may be provided so as to overlap the memory cell array 1470. A sense amplifier may be provided.

[0503] 32A to 32H show examples of memory cell configurations that can be applied to the above-described memory cell MC. I will explain.

[0504] [DOSRAM] 32A to 32C show examples of circuit configurations of memory cells in a DRAM. DRAM using a memory cell with one OS transistor and one capacitor element is called DOSRAM. (Registered trademark, Dynamic Oxide Semiconductor Random The memory cell 147 shown in FIG. 1 includes a transistor M1 and a capacitance element CA. It has a gate (sometimes called a top gate) and a back gate.

[0505] The first terminal of the transistor M1 is connected to the first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring CAL.

[0506] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CA. When writing and reading data, the wiring LL may be at ground potential. The wiring BGL applies a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, The threshold voltage of transistor M1 can be increased or decreased.

[0507] Here, the memory cell 1471 shown in FIG. 32A corresponds to the memory device shown in FIG. That is, the transistor M1 corresponds to the transistor 200, and the capacitance element CA corresponds to the capacitance device 29. It corresponds to 2.

[0508] Furthermore, the memory cells MC are not limited to the memory cells 1471, and the circuit configuration may be changed. For example, the memory cell MC can be configured as follows, as in the memory cell 1472 shown in FIG. The back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. Also, for example, the memory cell MC may be a memory cell 1473 shown in FIG. A transistor M having a single gate structure, i.e., a transistor without a back gate, The memory cell may be configured as 1.

[0509] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. By using an OS transistor as the transistor M1, This makes it possible to make the leakage current of the transistor M1 very small. The transistor M1 allows the data to be retained for a long time, reducing the frequency of refreshing the memory cells. In addition, the refresh operation of the memory cells can be made unnecessary. In addition, since the leakage current is very small, the memory cells 1471 and 147 2. The memory cell 1473 can store multi-value data or analog data. do.

[0510] In addition, in the DOSRAM, as described above, the memory cell array 1470 is overlapped with the By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0511] [NOSRAM] 32D to 32G show the circuit of a gain cell type memory cell having two transistors and one capacitor. The memory cell 1474 shown in FIG. 32D includes a transistor M2 and a transistor The transistor M2 has a top gate ( It may be simply called a gate.) and a back gate. A memory device having a gain cell type memory cell using an OS transistor as the transistor M2. , NOSRAM(Nonvolatile Oxide Semiconductor It is sometimes called RAM.

[0512] The first terminal of the transistor M2 is connected to the first terminal of the capacitance element CB, and the transistor M The second terminal of the transistor M2 is connected to the wiring WBL, and the gate of the transistor M3 is connected to the wiring WOL. The back gate of the transistor M2 is connected to the wiring BGL. The second terminal of transistor B is connected to the line CAL. The first terminal of transistor M3 is connected to the line R BL, the second terminal of the transistor M3 is connected to the line SL, and the second terminal of the transistor M The gate of 3 is connected to the first terminal of the capacitance element CB.

[0513] The wiring WBL functions as a write bit line, and the wiring RBL functions as a read bit line. The wiring WOL functions as a word line. The wiring CAL functions as the second wiring of the capacitance element CB. It functions as a wiring for applying a predetermined potential to the terminal. When reading out data, it is preferable to apply a high level potential to the wiring CAL. During data retention, it is preferable to apply a low level potential to the wiring CAL. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 The voltage can be increased or decreased.

[0514] Here, the memory cell 1474 shown in FIG. 32D corresponds to the memory device shown in FIG. That is, the transistor M2 is connected to the transistor 200, and the capacitance element CB is connected to the capacitance element 100. , the transistor M3 is connected to the transistor 300, the wiring WBL is connected to the wiring 1003, and the wiring WOL is connected to the wiring 1004, the wiring BGL is connected to the wiring 1006, the wiring CAL is connected to the wiring 1005, and the wiring R BL corresponds to the wiring 1002, and wiring SL corresponds to the wiring 1001.

[0515] Furthermore, the memory cells MC are not limited to the memory cells 1474, and the circuit configuration may be changed as appropriate. For example, the memory cell MC can be configured as a memory cell 1475 shown in FIG. In addition, the back gate of the transistor M2 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell 1476 shown in FIG. As shown in the figure, a transistor with a single gate structure, i.e., a transistor without a back gate, For example, the memory cell MC may be configured as shown in FIG. As shown in FIG. 2G, the wiring WBL and the wiring RBL are connected to one wiring BIL. It may also be configured as a single unit.

[0516] When the semiconductor device described in the above embodiment is used for the memory cell 1474 or the like, The transistor 200 is used as the transistor M2, and the transistor 300 is used as the transistor M3. The capacitance element CB can be a capacitance element 100. By using an OS transistor, the leakage current of transistor M2 is made very small. This allows the written data to be stored for a long time by the transistor M2. Since the memory cells can be maintained at the same level, the frequency of refreshing the memory cells can be reduced. Furthermore, the refresh operation of the memory cells can be eliminated. Since the memory cell 1474 is always small, it can store multi-value data or analog data. The same applies to memory cells 1475 to 1477.

[0517] The transistor M3 is a transistor having silicon in the channel forming region (hereinafter referred to as The conductivity type of the Si transistor may be The Si transistor may be an n-channel type or a p-channel type. The field effect mobility may be higher than that of a read transistor. A Si transistor may be used as the transistor M3 that functions as a By using a Si transistor for transistor M3, a transistor can be stacked on top of transistor M3. Since the memory cell can be provided with the transistor M2, the area occupied by the memory cell can be reduced, and the memory device can be made more efficient. Integration can be achieved.

[0518] The transistor M3 may be an OS transistor. When an OS transistor is used for the transistor M3, the memory cell array 1470 is The circuit can be constructed using only transistors.

[0519] FIG. 32H shows an example of a gain cell type memory cell with three transistors and one capacitor. The memory cell 1478 shown in FIG. 32H includes transistors M4 through M6, and The memory cell 1478 has a wiring and a capacitor CC. The capacitor CC is provided as needed. The wiring is electrically connected to BIL, wiring RWL, wiring WWL, wiring BGL, and wiring GNDL. The wiring GNDL is a wiring that applies a low level potential. Instead of the wiring BIL, the wiring RBL and the wiring WBL may be electrically connected.

[0520] The transistor M4 is an OS transistor having a back gate. The back gate and gate of the transistor M4 are electrically connected to the wiring BGL. Alternatively, the transistor M4 may have a back gate. It's not necessary.

[0521] The transistors M5 and M6 are n-channel Si transistors. Alternatively, the transistors M4 to M5 may be p-channel Si transistors. The transistor M6 may be an OS transistor. In this case, the memory cell array 1470 is configured as an n-type transistor. The circuit can be constructed using only transistors.

[0522] When the semiconductor device described in the above embodiment is used for the memory cell 1478, the transistor M The transistor M4 is a transistor 200, and the transistors M5 and M6 are transistors M1 and M2. The transistor 300 can be used as the capacitor element CC, and the capacitor element 100 can be used as the capacitor element CC. By using an OS transistor as the transistor M4, the leakage current of the transistor M4 can be reduced. The flow can be very small.

[0523] Note that the configurations of the peripheral circuit 1411, the memory cell array 1470, and the like shown in this embodiment are These circuits, and the wiring and circuits connected to the circuits, The arrangement or function of road elements etc. may be changed, deleted or added as required.

[0524] Generally, in semiconductor devices such as computers, various memory devices are used depending on the application. The semiconductor device according to one embodiment of the present invention is, for example, a semiconductor device that is used as a memory for a processor such as a CPU. Embedded memory as a register, SRAM (Static Random Access Memory) Memory), DRAM (Dynamic Random Access Memo) ry), and can be suitably used for 3D NAND memory.

[0525] The memory embedded as a register in a CPU or other processing unit is used to temporarily store the results of calculations. Therefore, the frequency of access from the processor is high. The registers hold the setting information of the arithmetic processing unit. It also has functions.

[0526] SRAM is used, for example, for caches. Caches are used to store data stored in main memory. It has the function of duplicating and storing some of the information stored in the database. By replicating the data, you can increase the speed at which data can be accessed.

[0527] DRAM is used for main memory, for example. Main memory reads data from storage. DRAM has the function of storing programs and data. Around 0.1 to 0.3 Gbit / mm 2 is.

[0528] 3D NAND memory is used for storage, for example. It has the function of storing necessary data and various programs used by the processing unit. Therefore, storage requires a large memory capacity and high recording density rather than an operating speed. The recording density of the memory devices used for storage is approximately 0.6 to 6.0 Gbit. / mm 2 is.

[0529] A storage device according to one embodiment of the present invention has high operating speed and can retain data for a long period of time. In one aspect of the present invention, a storage device is provided that has a hierarchy in which a cache is located and a hierarchy in which a main memory is located. The present invention can be suitably used as a storage device located in a boundary area including both. In one embodiment of the storage device, both the hierarchy where the main memory is located and the hierarchy where the storage is located are The present invention can be suitably used as a storage device located in a boundary area including the above.

[0530] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0531] (Fourth embodiment) In this embodiment, the semiconductor device of the present invention is mounted using FIGS. 33A and 33B. 1 shows an example of a chip 1200. The chip 1200 has multiple circuits (systems) implemented therein. In this way, the technology of integrating multiple circuits (systems) on a single chip is called system integration. It is sometimes called System on Chip (SoC).

[0532] As shown in FIG. 33A, the chip 1200 includes a CPU 1211, a GPU 1212, and one or more a plurality of analog arithmetic units 1213, one or more memory controllers 1214, one or more has a plurality of interfaces 1215, one or more network circuits 1216, etc. do.

[0533] The chip 1200 is provided with bumps (not shown), and as shown in FIG. First surface of printed circuit board (PCB) 1201 In addition, a plurality of bumps 1202 are provided on the back surface of the first surface of the PCB 1201. It is connected to the motherboard 1203.

[0534] The motherboard 1203 is equipped with memory devices such as a DRAM 1221 and a flash memory 1222. For example, the DRAM 1221 may be provided with a DOSR as shown in the previous embodiment. For example, the flash memory 1222 may be configured as The NOSRAM shown in FIG.

[0535] The CPU 1211 preferably has multiple CPU cores. It is preferable that the CPU 1211 and the GPU 1 have multiple GPU cores. Each of the CPs 212 may have a memory for temporarily storing data. The memory common to U1211 and GPU1212 is provided on chip 1200. The memory may be the aforementioned NOSRAM or DOSRAM. The GPU1212 is also suitable for parallel calculation of large amounts of data, and is ideal for image processing and multiplication. The GPU 1212 can be used for image processing using the oxide semiconductor of the present invention. By providing a logic circuit and a multiply-and-accumulate circuit, image processing and multiply-and-accumulate operations can be performed with low power consumption. It becomes possible to execute.

[0536] In addition, the CPU 1211 and GPU 1212 are mounted on the same chip, The wiring between the CPU1211 and GPU1212 can be shortened, and Data transfer from CPU 1211 to GPU 1212, memory After the data transfer between the GPUs and the calculations in GPU1212, the GPU1212 transfers the data to CPU12. The calculation results can be transferred to 11 at high speed.

[0537] The analog calculation unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital The analog calculation unit 1213 has one or both of a digital / analog conversion circuit. The product-sum calculation circuit may be provided in the

[0538] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. , and a circuit that functions as an interface to the flash memory 1222.

[0539] The interface 1215 includes a display device, a speaker, a microphone, a camera, a computer, and the l...

Claims

1. an oxide semiconductor film; a source electrode and a drain electrode on the oxide semiconductor film; an interlayer insulating film on the oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film on the oxide semiconductor film; a first insulating film on the oxide semiconductor film; a gate electrode on the gate insulating film; an insulating film on the interlayer insulating film, the interlayer insulating film has an opening formed therein, the opening overlapping a region between the source electrode and the drain electrode; the first insulating film has a region in contact with the source electrode and the drain electrode, the top of the first insulating film is lower than the top of the gate insulating film; the top of the first insulating film is lower than the top of the interlayer insulating film; a sidewall of the opening having a region where the gate insulating film and the interlayer insulating film are in contact with each other; a region where the insulating film and the interlayer insulating film are in contact with each other; Semiconductor device.

2. In claim 1, The semiconductor device, wherein the first insulating film includes any one selected from the group consisting of silicon nitride, silicon nitride oxide, and silicon oxide.

3. In claim 1, The upper portion of the first insulating film has a tapered shape.

4. an oxide semiconductor film; a source electrode and a drain electrode on the oxide semiconductor film; a first insulating film on the source electrode and the drain electrode; an interlayer insulating film on the oxide semiconductor film, the source electrode, the drain electrode, and the first insulating film; a gate insulating film on the oxide semiconductor film; a second insulating film on the oxide semiconductor film; a gate electrode on the gate insulating film; a third insulating film on the interlayer insulating film, the interlayer insulating film has an opening formed therein, the opening overlapping a region between the source electrode and the drain electrode; the second insulating film has a region in contact with the source electrode, the drain electrode, and the first insulating film; the top of the second insulating film is lower than the top of the gate insulating film; the top of the second insulating film is lower than the top of the interlayer insulating film; a sidewall of the opening having a region where the gate insulating film and the interlayer insulating film are in contact with each other; a region where the third insulating film and the interlayer insulating film are in contact with each other; Semiconductor device.

5. In claim 4, The second insulating film includes any one selected from the group consisting of silicon nitride, silicon nitride oxide, and silicon oxide.

6. In claim 4, The upper portion of the second insulating film is tapered.

7. In any one of claims 1 to 6, The oxide semiconductor film includes indium oxide.

8. In any one of claims 1 to 7, The semiconductor device has an upper portion of the opening that is wider than a lower portion of the opening.

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