Method for manufacturing power semiconductor element

Abstract

To provide a method for manufacturing a power semiconductor element that can be manufactured at low temperatures, and to provide a method for manufacturing a power semiconductor element that can form an active layer at low temperatures.SOLUTION: In a method for manufacturing a power semiconductor element using a vapor deposition apparatus equipped with a chamber, the chamber is made of a transparent material and has a dome-shaped upper body, and the method includes the steps of injecting a source gas containing one or more of Ga, In, Zn, and Si into the chamber, and injecting a reactant gas containing one or more of As, P, O, and C into the chamber.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a power semiconductor device, and more particularly to a method for manufacturing a power semiconductor device in which an active layer is formed by atomic layer deposition. [Background technology]

[0002] A field effect transistor includes an active layer formed on a substrate, source and drain electrodes formed on the active layer, a gate electrode formed on the active layer so as to be positioned between the source and drain electrodes, and a well region provided between the source and drain electrodes and the active layer.

[0003] The active layer is formed by metal organic chemical vapor deposition (MOCVD). At this time, the active layer is deposited by depositing a thin film while the substrate temperature is adjusted to a high temperature of about 1200°C. In other words, the active layer can be deposited on the substrate when the substrate is maintained at a high temperature of about 1200°C.

[0004] However, forming an active layer while the substrate is heated to a high temperature can damage the substrate or the thin film formed on the substrate. This can lead to a decrease in the performance of the field-effect transistor or to defects. In particular, when a field-effect transistor is used for power conversion or control in electronic devices, damage caused by forming the active layer at a high temperature can significantly reduce the quality or performance of the transistor. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 2571583 Summary of the Invention [Problem to be solved by the invention]

[0006] The present invention provides a method for manufacturing a power semiconductor element (semiconductor element for electric power) that can be manufactured at low temperatures.

[0007] The present invention provides a method for manufacturing a power semiconductor device that allows an active layer to be formed at a low temperature. [Means for solving the problem]

[0008] A method for manufacturing a power semiconductor device according to one aspect of the present invention is a method for manufacturing a power semiconductor device using a vapor deposition apparatus equipped with a chamber, the chamber being made of a transparent material and having a dome-shaped upper body, and including the steps of injecting a source gas containing one or more of Ga, In, Zn, and Si into the chamber, and injecting a reactant gas containing one or more of As, P, O, and C into the chamber.

[0009] The deposition apparatus may include an antenna disposed on an upper portion of the upper body, and after the step of injecting the source gas, the deposition apparatus may further include the step of generating plasma in the chamber using the antenna.

[0010] The deposition apparatus may include an antenna disposed on an upper portion of the upper body, and after the step of injecting the reactant gas, the step of generating plasma in the chamber using the antenna may be included.

[0011] The deposition apparatus may include a first gas injection unit and a second gas injection unit disposed in the chamber, and may include a step of injecting the source gas through the first gas injection unit and a step of injecting the reactant gas through the second gas injection unit.

[0012] The chamber may include a dome-shaped lower body having a slope whose height gradually decreases toward the center in the width direction, and the deposition apparatus may include a heating unit disposed below the exterior of the chamber.

[0013] Another aspect of the present invention relates to a method for manufacturing a power semiconductor element using a vapor deposition apparatus including a chamber, a first plate having a plurality of holes and disposed inside the chamber, a nozzle inserted into the plurality of holes, and a second plate disposed between an upper wall of the chamber and the first plate, and includes the steps of injecting a source gas containing one or more of Ga, In, Zn, and Si into the chamber, and injecting a reactant gas containing one or more of As, P, O, and C into the chamber.

[0014] The deposition apparatus may include an RF power supply unit, the RF power supply unit being connected to the first plate and the second plate being grounded, and after the step of injecting the source gas, a step of generating plasma in the chamber may be included.

[0015] The deposition apparatus may include an RF power supply unit, the RF power supply unit being connected to a first plate and the second plate being grounded, and after the step of injecting the reactant gas, a step of generating plasma in the chamber may be included.

[0016] The deposition apparatus may include a first path that is a passage within the nozzle and a second path that is a space outside the nozzle inside the hole, and may include a step of injecting the source gas through the first path and a step of injecting the reactant gas through the second path.

[0017] The deposition apparatus may include a support stage disposed within the chamber to support a substrate, and a heater disposed within the support stage. [Effects of the Invention]

[0018] According to an embodiment of the present invention, an active layer can be formed at a low temperature. This prevents the substrate or thin films formed thereon from being damaged by high-temperature heat. Furthermore, the power or time required to heat the substrate for forming the active layer can be reduced, thereby shortening the overall process time.

[0019] Furthermore, the active layer can be formed by crystallization, that is, a crystallized active layer can be formed while forming the active layer at a low temperature. [Brief explanation of the drawings]

[0020] [Figure 1] 1 is a conceptual diagram showing a substrate on which an active layer is formed by a method according to an embodiment of the present invention. [Figure 2] 1 is a cross-sectional view illustrating an example of a field-effect transistor manufactured by a method according to an embodiment of the present invention. [Figure 3] 1A and 1B are conceptual diagrams illustrating a method for forming an active layer of a field effect transistor according to an embodiment of the present invention. [Figure 4] FIG. 10 is a conceptual diagram showing a modified example in which a buffer layer is formed between the active layer and the substrate. [Figure 5] FIG. 10 is a diagram illustrating an example of a field effect transistor according to a modified example of the embodiment. [Figure 6] 1 is a diagram schematically illustrating a deposition apparatus used in a method for manufacturing a power semiconductor element according to an embodiment of the present invention. [Figure 7] FIG. 10 is a diagram schematically illustrating another example of a vapor deposition apparatus used in the method for manufacturing a power semiconductor element according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0021] Hereinafter, the embodiments of the present invention will be described in more detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and can be embodied in various different forms. The following embodiments are provided merely to complete the disclosure of the present invention and to fully convey the scope of the invention to those skilled in the art. The drawings may be exaggerated in order to explain the embodiments of the present invention, and the same reference numerals in the drawings refer to the same components.

[0022] The present invention relates to a method for manufacturing a power semiconductor device, and more particularly to a method for manufacturing a power semiconductor device including a method for forming an active layer by atomic layer deposition (ALD).

[0023] FIG. 1 is a conceptual diagram showing a substrate on which an active layer is formed by a method according to an embodiment of the present invention.

[0024] Referring to FIG. 1, the active layer 10 is a layer formed on a substrate S, and may be a layer constituting a power semiconductor element, more specifically, a field-effect transistor. Such an active layer 10 can be formed by atomic layer deposition (ALD). When forming the active layer 10 by atomic layer deposition, plasma may be generated after the injection of reactant gas is interrupted or terminated. In this case, plasma using hydrogen (H2) gas is used. The active layer 10 may be formed by generating hydrogen plasma (hereinafter referred to as hydrogen plasma).

[0025] Fig. 2 is a cross-sectional view showing an example of a field-effect transistor manufactured by a method according to an embodiment of the present invention, and Fig. 3 is a conceptual diagram illustrating a method for forming an active layer of a field-effect transistor by a method according to an embodiment of the present invention.

[0026] A method for manufacturing a power semiconductor device having an active layer formed by a method according to an embodiment of the present invention will be described below with reference to Figures 1 to 3. Hereinafter, a field effect transistor, which is one type of power semiconductor device, will be described as an example.

[0027] Referring to FIG. 2, a field effect transistor manufactured by a method according to an embodiment of the present invention may include a substrate S, an active layer 10 formed on the substrate S, source and drain electrodes 41, 42 formed above the active layer 10 and spaced apart from each other in the horizontal direction, a gate electrode 50 formed above the active layer 10 and positioned between the source electrode 41 and the drain electrode 42, well layers 21, 22 formed between the source electrode 41 and the active layer 10 and between the drain electrode 42 and the active layer 10, respectively, and a gate insulating layer 30 formed between the active layer 10, the well layers 21, 22, and the gate electrode 50 so as to be positioned between the source electrode 41 and the drain electrode 42.

[0028] Here, the well layer 21 formed in contact with the source electrode 41 or below the source electrode 41 may be a layer that functions as the source of the field-effect transistor. Also, the well layer 22 formed in contact with the drain electrode 42 or below the drain electrode 42 may be a layer that functions as the drain of the field-effect transistor.

[0029] The substrate S may be a substrate containing silicon (Si) or a p-type substrate. More specifically, the substrate may be a p-type SiC substrate.

[0030] The active layer 10 may be formed as a layer or thin film of any one of gallium arsenic (GaAs), indium phosphide (InP), aluminum gallium indium phosphide (AlGaInP), indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), and silicon carbide (SiC). That is, the active layer 10 may be formed as any one of a GaAs layer, an InP layer, an AlGaInP layer, an IGZO layer, an IZO layer, and a SiC layer.

[0031] The active layer 10 may be formed by atomic layer deposition (ALD). When forming the active layer 10 by atomic layer deposition, plasma may be generated after the injection of the reactant gas is interrupted or terminated. At this time, plasma using hydrogen (H) gas (hereinafter referred to as hydrogen plasma) may be generated to form the active layer 10.

[0032] The method for forming the active layer 10 using atomic layer deposition will be described in more detail with reference to FIG. 3. The step of forming the active layer 10 may include a step of injecting a source gas, a step of injecting a purge gas (first purge), a step of injecting a reactant gas, and a step of injecting a purge gas (second purge). The step of forming the active layer 10 may also include a step of generating plasma after the step of injecting the reactant gas. In this case, the step of generating plasma may be performed, for example, after the reactant gas is injected and the second purge is completed. In such a case, the injection of the source gas, the injection of the purge gas (first purge), the injection of the reactant gas, the injection of the purge gas (second purge), and the generation of plasma may be performed in this order. Furthermore, the plasma generated after the second purge may be hydrogen plasma. That is, when generating plasma after the second purge is completed, hydrogen gas may be injected and the hydrogen gas may be discharged to generate plasma.

[0033] Furthermore, plasma may be generated in the step of injecting the reactant gas, that is, the reactant gas may be injected and then discharged to generate plasma.

[0034] When forming the active layer 10, the above-described sequence of "injection of source gas - injection of purge gas (first purge) - injection of reactant gas - injection of purge gas (second purge) - generation of plasma" may be combined into one process cycle for forming the active layer 10. Furthermore, by repeating the above-described process cycle multiple times, multiple atomic layer depositions are performed. Then, by adjusting the number of times the process cycle is performed, the active layer 10 having the desired thickness can be formed.

[0035] In the process cycle described above, if the reactant gas is injected after the injection of the source gas and the injection of the purge gas (first purge), a reaction occurs between the source gas and the reactant gas on the substrate S to generate a reactant, for example, AlGaInP. This reactant is then deposited or evaporated on the substrate S, thereby forming a thin film made of AlGaInP on the substrate S.

[0036] Meanwhile, in the past, when depositing a thin film to form an active layer on a substrate, the temperature inside the chamber or the substrate was maintained at a high temperature of approximately 1200°C. In other words, unless the temperature inside the chamber or the substrate was maintained at a high temperature of 1200°C, a thin film could not be deposited on the upper surface of the substrate. When forming an active layer at such a high temperature, there is a risk that the substrate or the thin film formed on the substrate may be damaged, and there is also a risk that the active layer may be damaged. This leads to a problem of a deterioration in the function or quality of the device.

[0037] However, in some embodiments, plasma is generated when depositing a thin film using atomic layer deposition. That is, plasma, e.g., hydrogen plasma, is generated after the reactant gas is injected or after the injection of the reactant gas is terminated. More specifically, plasma using hydrogen gas is generated after the injection of the reactant gas and the injection of the purge gas (secondary purge) are terminated.

[0038] In this case, the plasma can improve the reaction rate between the source gas and the reactant gas, allowing the reactant gas to be easily deposited or attached to the substrate S. Therefore, the active layer 10 can be formed by atomic layer deposition when the temperature inside the chamber 100 or the substrate S is low, for example, 600°C or lower. More preferably, the active layer 10 can be formed by atomic layer deposition at a temperature between 300°C and 550°C. That is, the active layer 10 can be formed at a low temperature, rather than forming the active layer 10 by heating the substrate to a high temperature as in the conventional method. This prevents damage to the substrate S, the thin film formed on the substrate, or the active layer 10 due to high heat.

[0039] In addition, the plasma can cause the thin film deposited on the substrate S to be crystalline due to the reaction between the source gas and the reactant gas. More specifically, it can cause the formation of a polycrystalline active layer 10. That is, when forming the active layer 10 by atomic layer deposition, plasma can be generated after injecting the reactant gas, and the plasma can form a crystalline or polycrystalline active layer 10.

[0040] Furthermore, the plasma can decompose and easily remove impurities remaining inside the chamber 100. Therefore, contamination by impurities can be prevented or suppressed during the formation of the deposited film, i.e., the active layer 10.

[0041] In the above, the generation of plasma after the end of the secondary purge or after the injection of the reactant gas has been described. However, the present invention is not limited to this, and hydrogen plasma may be generated in a step between the injection of the source gas and the injection of the reactant gas. More specifically, hydrogen plasma may be generated between the source gas injection step and the primary purge step. In other words, one process cycle may consist of "injection of source gas - generation of plasma - injection of purge gas (primary purge) - injection of reactant gas - injection of purge gas (secondary purge)."

[0042] As another example, hydrogen plasma may be generated between the primary purge step and the reactant gas injection step, so that one process cycle may consist of "injection of source gas - injection of purge gas (primary purge) - generation of plasma - injection of reactant gas - injection of purge gas (secondary purge)."

[0043] As yet another example, plasma may be generated in a step between the injection of source gas and the injection of reactant gas, and after the injection of reactant gas. That is, the process cycle may be "injection of source gas - generation of plasma - injection of purge gas (first purge) - injection of reactant gas - injection of purge gas (second purge) - generation of plasma," or "injection of source gas - injection of purge gas (first purge) - generation of plasma - injection of reactant gas - injection of purge gas (second purge) - generation of plasma."

[0044] When forming the active layer 10 through the process cycle as described above, the materials of the source gas and reactant gas may be determined depending on the type of the active layer 10 to be formed.

[0045] The active layer 10 may be formed of any one of a GaAs layer, an InP layer, an AlGaInP layer, an IGZO layer, an IZO layer, and a SiC layer. In such a case, the source gas may be a gas containing one or more of Ga, In, Zn, and Si. That is, the source gas may be a gas containing one or more of Ga-containing gas, In-containing gas, Al, Ga, and In-containing gas (AlGaIn-containing gas), In, Ga, and Zn-containing gas (IGZ-containing gas), In and Zn-containing gas (IZ-containing gas), and Si-containing gas. The reactant gas may be a gas containing one or more of As, P, O, and C. That is, the reactant gas may be a gas containing one or more of As-containing gas, P-containing gas, O-containing gas, and C-containing gas.

[0046] For example, when forming a GaAs layer as the active layer 10, a Ga-containing gas may be used as the source gas and an As-containing gas may be used as the reactant gas. When forming an InP layer as the active layer 10, a Ga-containing gas may be used as the source gas and an In-containing gas may be used as the reactant gas. As another example, when forming an AlGaInP layer as the active layer 10, a Al-containing gas, a Ga-containing gas, or an In-containing gas may be used as the source gas and a P-containing gas may be used as the reactant gas. As yet another example, when forming an IGZO layer as the active layer 10, a In-containing gas, a Ga-containing gas, or a Zn-containing gas may be used as the source gas and an O-containing gas may be used as the reactant gas. When forming an IZO layer as the active layer 10, a In-containing gas or a Zn-containing gas may be used as the source gas and an O-containing gas may be used as the reactant gas. Furthermore, when forming a SiC layer as the active layer 10, a Si-containing gas may be used as the source gas and a C-containing gas may be used as the reactant gas.

[0047] Here, as the Ga-containing gas, for example, a gas containing trimethyl gallium (Ga(CH3)3) (TMGa) may be used, and as the In-containing gas, for example, trimethyl indium (In(CH3)3) (TMIn) and diethylaminopropyldimethylindium may be used. A gas containing at least one of (Diethylamino Propyl Dimethyl Indium) (DADI) may be used. Furthermore, as the Al-containing gas, for example, a gas containing TMA (Trimethyl Aluminum, Al(CH3)3) may be used, and as the Zn-containing gas, a gas containing at least one of diethyl zinc (Diethyl Zinc; Zn(C2H5)2) (DEZ) and dimethyl zinc (Dimethyl Zinc; Zn(CH3)2) (DMZ) may be used. And as the Si-containing gas, for example, a gas containing at least one of SiH4 and Si2H6 may be used.

[0048] The As-containing gas may be a gas containing either AsH3 or AsH4, the P-containing gas may be a gas containing phosphine (PH3), the O-containing gas may be oxygen, and the C-containing gas may be a gas containing SiH3CH3.

[0049] As described above, when forming the active layer 10 of a GaAs layer, a Ga-containing gas is used as the source gas, when forming the active layer 10 of an InP layer, an In-containing gas is used as the source gas, and when forming the active layer 10 of a SiC layer, a Si-containing gas is used as the source gas. Therefore, when forming the active layer 10 from any one of a GaAs layer, an InP layer, and a SiC layer, it can be said that one type of source gas is used.

[0050] As another example, when forming the active layer 10 as an AlGaInP layer, three types of gases are used as source gases: an Al-containing gas, a Ga-containing gas, and an In-containing gas. As another example, when forming the active layer 10 as an IGZO layer, three types of gases are used as source gases: an In-containing gas, a Ga-containing gas, and a Zn-containing gas. Therefore, when forming the active layer 10 as an AlGaInP layer or an IGZO layer, it can be explained that two or more types of source gases are used.

[0051] When forming the active layer 10 using or injecting a plurality of source gases, a source gas in which a plurality of source gases are mixed may be injected to form the active layer 10. Details of the method of mixing and injecting a plurality of source gases will be described later in the description of the deposition apparatus.

[0052] Furthermore, when forming the active layer 10, a doping gas may be injected to form a doped active layer. In this case, the doping gas may be a gas containing any one of Mg, Si, In, Al, and Zn. More specifically, a doping gas containing Si may be polysilane (H3Si-(SiH2) n A gas containing bis(cyclopentadienyl)magnesium (CpMg) may be used as a doping gas containing Mg. In more detail, the second doping gas may be a mixture of one or more gases selected from the group consisting of Si, In, Al, and Zn.

[0053] The doping gas may be mixed with the source gas and injected together. Needless to say, the source gas and the doping gas may be injected in separate steps. That is, the active layer 10 may be formed using a process cycle of "injection of source gas - injection of doping gas - injection of purge gas (first purge) - injection of reactant gas - injection of purge gas (second purge) - plasma generation."

[0054] The above process cycle is then repeated multiple times to form the active layer 10. Preferably, the first process cycle for forming the active layer 10 is performed without injecting a doping gas. That is, the first process cycle for forming the active layer 10 may be "injection of source gas-injection of purge gas (first purge)-injection of reactant gas-injection of purge gas (second purge)-generation of plasma," in which the doping gas is injected together with the source gas or is not injected separately. From subsequent cycles, the doping gas is injected together with the source gas or is injected after the source gas. Therefore, when the active layer 10 is formed on the active layer 10, the thin film deposited in the first process cycle may be an undoped thin film, and the thin films deposited in subsequent process cycles may be doped thin films.

[0055] As shown in Fig. 2, the active layer 10 may be provided in a stepped shape so that the height of the surface varies. In other words, the active layer 10 can be described as including a first layer 11 formed on the upper surface of the substrate S and a second layer 12 formed in a partial region of the first layer 11. Therefore, the thickness of the region in the active layer 10 where the second layer 12 is formed may be thicker than the other regions. In other words, the active layer 10 may be provided in a stepped shape such that the height of the region where the second layer 12 is formed is higher than the portion where only the first layer 11 is formed.

[0056] The shape of the active layer 10 is not limited to the stepped shape as described above, and may be any shape as long as well layers 21, 22 are provided between the source electrode 41 and the active layer 10 and between the drain electrode 42 and the active layer 10.

[0057] The well layers 21 and 22 may be layers commonly referred to as well regions in field-effect transistors. In this case, the well regions are formed on the active layer by atomic layer deposition, and are therefore referred to as well layers 21 and 22 for ease of explanation. The well layers 21 and 22 may be provided so as to be located between the source and drain electrodes 41 and 42 and the active layer 10. Therefore, the well layers 21 and 22 may be provided so as to be located between the first layer 11 of the active layer 10 and the source electrode 41, and between the first layer 11 and the drain electrode 42, as shown in FIG. 2 .

[0058] Such well layers 21, 22 may be formed by doping the same material as the active layer 10 with n-type or p-type impurities. For example, if the active layer 10 is formed of AlGaInP, the well layers 21, 22 may be formed by doping AlGaInP with impurities, such as Si, to make it n-type. Furthermore, the n-type well layers 21, 22 may be formed by mixing one or more of In, Al, and Zn gases as the doping gas. Therefore, the well layers 21, 22 can be described as n-type AlGaInP layers doped with Si.

[0059] The well layers 21 and 22 may be formed by atomic layer deposition. That is, the well layers 21 and 22 may be formed by the following process: "injection of source gas - injection of purge gas (primary purge) - injection of reactant gas - injection of purge gas" The well layers 21 and 22 may be formed using a process cycle including "second purge" and "secondary purge." At this time, the source gas, reactant gas, and purge gas injected for forming the well layers 21 and 22 may be the same gases as those used for forming the active layer 10. Also, a doping gas may be injected together with the source gas injection step. That is, the source gas and the doping gas may be mixed and the mixed gas may be injected.

[0060] Needless to say, the source gas and the doping gas may be injected in separate steps. That is, the doping gas may be injected after the source gas is injected. Therefore, the well layers 21 and 22 can be formed using a process cycle of "injection of source gas - injection of doping gas - injection of purge gas (first purge) - injection of reactant gas - injection of purge gas (second purge)."

[0061] The above process cycle is repeated multiple times to form the well layers 21 and 22. Preferably, the first process cycle for forming the well layers 21 and 22 is performed without injecting a doping gas. That is, the first process cycle for forming the well layers 21 and 22 may be "source gas injection-purge gas injection (first purge)-reactant gas injection-purge gas injection (second purge)," in which the doping gas is injected together with the source gas or is not injected separately. From subsequent cycles, the doping gas is injected together with the source gas or is injected after the source gas injection. Therefore, when the well layers 21 and 22 are formed on the active layer 10, the thin film deposited in the first process cycle may be an undoped thin film, and the thin films deposited in subsequent process cycles may be doped thin films.

[0062] Furthermore, when forming the well layers 21 and 22, plasma may be generated when injecting the reactant gas, or plasma may be further generated after the secondary purge. The plasma generated after the secondary purge may be hydrogen plasma.

[0063] The well layers 21 and 22 thus formed function as source and drain regions in the field-effect transistor. That is, the well layer 21 formed below the source electrode 41 functions as the source of the field-effect transistor, and the well layer 22 formed below the drain electrode 42 functions as the drain of the field-effect transistor.

[0064] In the above, it has been described that the well layers 21, 22 provided below the source electrode 41 and the drain electrode 42 are provided as n-type layers. However, the present invention is not limited to this, and the well layers 21, 22 may be provided as p-type layers depending on the type of field effect transistor to be manufactured.

[0065] The gate insulating layer 30 may be formed on the active layer 10. More specifically, the gate insulating layer 30 may be formed to be located between the gate electrode 50 and the active layer 10 in the vertical direction. The gate insulating layer 30 may also be formed to be located between the source electrode 41 and the drain electrode 42 in the width direction or length direction. The gate insulating layer 30 may be formed of any one of SiO2, SiON, and Al2O3. The gate insulating layer 30 may be formed by any one of a chemical vapor deposition (CVD) method, a metal organic chemical vapor deposition (MOCVD) method, and an atomic layer deposition (ALD) method.

[0066] The source and drain electrodes 41, 42 may be formed on the well layers 21, 22 such that the gate insulating layer 30 and the gate electrode 50 are located between them. That is, the source electrode 41 may be formed on one side of the gate insulating layer 30, and the drain electrode 42 may be formed on the other side. In this case, the source and drain electrodes 41, 42 may be formed from a material containing metal, for example, at least one of Ti and Au. The source and drain electrodes 41, 42 may also be formed by, for example, chemical vapor deposition (CVD), metalorganic chemical vapor deposition, or the like. The film may be formed by a metal organic chemical vapor deposition (MOCVD) method, an atomic layer deposition (ALD) method, a sputtering deposition method, or the like.

[0067] The gate electrode 50 may be formed on the gate insulating layer 30. In other words, the gate electrode 50 may be formed on the gate insulating layer 30 so as to be located between the source electrode 41 and the drain electrode 42. In this case, the gate electrode 50 may be formed from a material containing metal, for example, a material containing at least one of Ti and Au. The gate electrode 50 may also be formed by sputtering deposition.

[0068] Fig. 4 is a conceptual diagram showing a modified example in which a buffer layer is formed between the active layer and the substrate, and Fig. 5 is a diagram showing an example of a field effect transistor according to a modified example of the embodiment.

[0069] 4 and 5, a buffer layer 60 may be formed between the substrate S and the active layer 10. As shown in Fig. 5, the field effect transistor according to the modified example may include the buffer layer 60 formed between the substrate S and the active layer 10. That is, the field effect transistor according to the modified example is different from the embodiment in that it includes the buffer layer 60 formed between the substrate S and the active layer 10, but the other configurations are the same.

[0070] The buffer layer 60 is a layer formed on the substrate S before the active layer 10 is formed, and may be a seed layer that assists in more effective crystallization of the active layer 10 formed by atomic layer deposition. In other words, the buffer layer 60 may be a seed layer that further assists in crystallization of the active layer 10 in addition to crystallization by hydrogen plasma when the active layer 10 is formed by atomic layer deposition. Such a buffer layer 60 may be formed of AlN, and may be formed by atomic layer deposition, chemical vapor deposition, or the like.

[0071] When the active layer 10 is deposited on the crystalline buffer layer 60 by atomic layer deposition, the active layer 10 can grow in the crystal direction of the underlying buffer layer 60. This makes it easier to form a crystalline, more specifically, polycrystalline, active layer 10.

[0072] Although the above description has been given using a field effect transistor as an example of a power semiconductor element, the present invention is not limited thereto, and the manufacturing method according to the embodiment can be applied to manufacturing a wide variety of power semiconductor elements including an active layer, not limited to field effect transistors.

[0073] FIG. 6 is a diagram schematically illustrating a vapor deposition apparatus used in the method for manufacturing a power semiconductor element according to an embodiment of the present invention.

[0074] The deposition apparatus may be an apparatus for depositing a thin film by atomic layer deposition (ALD). In this case, the deposition apparatus may be an apparatus for forming at least the active layer 10 of a power semiconductor element, for example, a field-effect transistor. Alternatively, the deposition apparatus may be an apparatus for forming the active layer 10 and well layers 21 and 22.

[0075] As shown in FIG. 6, such a deposition apparatus may include a chamber 100, a support stage 200 disposed within the chamber 100 to support a substrate S, an injection unit 300 disposed opposite the support stage 200 to inject a process gas (hereinafter referred to as a process gas) into the chamber 100, a gas supply unit 400 for supplying the process gas to the injection unit 300, first and second gas supply pipes 500a and 500b connected to the injection unit 300 with different paths and for supplying the gas from the gas supply unit 400 to the injection unit 300, and an RF power supply unit 600 for supplying power to generate plasma within the chamber 100.

[0076] The deposition apparatus may further include a driving unit 700 that causes the support stage 200 to perform at least one of raising and lowering and rotating operations, and an exhaust unit (not shown) that is arranged to be connected to the chamber 100.

[0077] The chamber 100 may have an internal space in which a thin film can be formed on the substrate S carried inside. For example, the cross-sectional shape may be a square, pentagon, hexagon, or the like. Needless to say, the internal shape of the chamber 100 can be changed in various ways, and it is preferable that the shape be set to correspond to the shape of the substrate S.

[0078] The supporter 200 is disposed inside the chamber 100 facing the sprayer 300 and supports the substrate S placed inside the chamber 100. A heater 210 may be provided inside the supporter 200. When the heater 210 is operated, the substrate S placed on the supporter 200 and the inside of the chamber 100 can be heated.

[0079] In addition to the heater 210 provided on the support table 200, a separate heater may be provided inside or outside the chamber 100 as a means for heating the substrate S or the inside of the chamber 100.

[0080] The injection section 300 may include a first plate 310 having a plurality of holes (hereinafter referred to as holes) 311 arranged in the extension direction of the support base 200 and spaced apart from each other, and arranged inside the chamber 100 facing the support base 200, a plurality of nozzles 320 arranged so that at least a portion of each nozzle is inserted into each of the plurality of holes 311, and a second plate 330 arranged inside the chamber 100 so as to be positioned between the upper wall of the chamber 100 and the first plate 310.

[0081] The injection unit 300 may further include an insulating unit 340 located between the first plate 310 and the second plate 330 .

[0082] Here, the first plate 310 may be connected to the RF power supply unit 600, and the second plate 330 may be grounded. The insulating unit 340 may serve to prevent electrical connection between the first plate 310 and the second plate 330.

[0083] The first plate 310 may be in the form of a plate extending in the extension direction of the support base 200. The first plate 310 is provided with a plurality of holes 311, and each of the plurality of holes 311 may be provided so as to penetrate the first plate 310 in the up-down direction. The plurality of holes 311 may be aligned in the extension direction of the first plate 310 or the support base 200.

[0084] Each of the plurality of nozzles 320 may have a shape extending in the vertical direction, a passage through which gas can pass, and a shape with open upper and lower ends. Each of the plurality of nozzles 320 may be arranged so that at least its lower portion is inserted into a hole 311 formed in the first plate 310, and its upper portion is connected to the second plate 330. For this reason, the nozzles 320 can be described as having a shape that protrudes downward from the second plate 330.

[0085] The outer diameter of nozzle 320 may be set to be smaller than the inner diameter of hole 311. When nozzle 320 is arranged so as to be inserted inside hole 311, the outer circumferential surface of nozzle 320 may be arranged so as to be separated from the wall around hole 311 (i.e., the inner wall of first plate 310). This allows the inside of hole 311 to be separated into a space outside nozzle 320 and a space inside nozzle 320.

[0086] In the internal space of hole 311, the passage within nozzle 320 is a passage through which gas from first gas supply pipe 500a moves and is sprayed. The space outside nozzle 320 in the internal space of hole 311 is a passage through which gas from second gas supply pipe 500b moves and is sprayed. Therefore, hereinafter, the passage within nozzle 320 is referred to as first path 360a, and the space inside hole 311 outside nozzle 320 is referred to as second path 360b.

[0087] The second plate 330 may be disposed so that its upper surface is separated from the upper wall of the chamber 100 and its lower surface is separated from the first plate 310. This makes it possible to provide an empty space between the second plate 330 and the first plate 310 and between the second plate 330 and the upper wall of the chamber 100.

[0088] Here, the space above the second plate 330 is a space where the gas from the first gas supply pipe 500a diffuses and moves (hereinafter referred to as diffusion space 350), and may be in communication with the upper openings of the plurality of nozzles 320. In other words, the diffusion space 350 is a space in communication with the plurality of first paths 360a. Therefore, the gas that has passed through the first gas supply pipe 500a can be diffused in the extension direction of the second plate 330 in the diffusion space 350, and then pass through the plurality of first paths 360a and be sprayed downward.

[0089] In addition, a deep hole (not shown) that is a passage through which gas moves is provided inside the second plate 330, and the deep hole may be connected to the second gas supply pipe 500b and communicate with the second path 360b. Therefore, the gas from the second gas supply pipe 500b can be sprayed toward the substrate S through the deep hole in the second plate 330 and the second path 360b.

[0090] The gas supply unit 400 supplies gases required for depositing a thin film by atomic layer deposition. The gas supply unit 400 may include a source gas reservoir 410 for storing a source gas, a reactant gas reservoir 420 for storing a reactant gas that reacts with the source gas, a purge gas reservoir 430 for storing a purge gas, a first transfer pipe 470a arranged to connect the source gas reservoir 410 to the first gas supply pipe 500a, and a second transfer pipe 470b arranged to connect the reactant gas reservoir 420 and the purge gas reservoir 430 to the second gas supply pipe 500b.

[0091] Here, the purge gas stored in the purge gas storage section 430 may be, for example, N2 gas or Ar gas.

[0092] The gas supply unit 400 may also include a plasma generation gas storage unit 440 that stores a gas (hereinafter referred to as a plasma generation gas) to be supplied in a step of generating plasma inside the chamber 100 after the injection of the reactant gas or after the secondary purge. In this case, the plasma generation gas may be, for example, hydrogen gas.

[0093] The gas supply unit 400 may include a doping gas storage unit 450 that stores a doping gas, and a mixer 460 that is disposed in the first transfer pipe 470a so as to mix a plurality of gases.

[0094] Here, the gas stored in the doping gas storage section 450 varies depending on the substance to be doped. For example, a gas containing an n-type dopant substance may be stored in the doping gas storage section 450, and may be a gas containing Si. In this case, for example, polysilane (H3Si-(SiH2) n A gas containing SiH3 may be used. As another example, a gas containing a p-type dopant material may be stored in the doping gas storage section 450, for example, a gas containing Mg. In this case, a gas containing Cp2Mg may be used as the Mg-containing gas. The doping gas may also be a mixture of one or more gases selected from the group consisting of Si, In, Al, and Zn.

[0095] The gas supply unit 400 may also include a plurality of first connecting pipes 480a connecting each of the source gas storage unit 410 and the doping gas storage unit 450 to the first transfer pipe 470a, a valve disposed in each of the plurality of first connecting pipes 480a, a plurality of second connecting pipes 480b connecting each of the reactant gas storage unit 420, the purge gas storage unit 430, and the gas storage unit for plasma generation 440 to the second transfer pipe 470b, and a valve disposed in each of the plurality of second connecting pipes 480b.

[0096] The source gas reservoir 410 may be provided in plural. The source gas reservoirs 410a, 410b, and 410c may be configured to store different types of source gases. A first connecting pipe 480a may be connected to each of the source gas reservoirs 410a, 410b, and 410c, and the first connecting pipes 480a connected to each of the source gas reservoirs 410a, 410b, and 410c may be connected to a first transfer pipe 470a.

[0097] The mixing unit 460 may be a means for mixing gases from the plurality of source gas reservoirs 410a, 410b, and 410c, or for mixing gas from the source gas reservoir 410 with gas from the doping gas reservoir 450. Such a mixing unit 460 may be provided to have an internal space in which gases can be mixed. Furthermore, the mixing unit 460 may be arranged to connect a first connection pipe 480a connected to each of the plurality of source gas reservoirs 410a, 410b, and 410c and the doping gas reservoir 450 to a first transfer pipe 470a. Therefore, multiple types of gases flowing into the mixing unit 460 can be mixed inside the mixing unit 460 and then transferred to the first gas supply pipe 500a via the first transfer pipe 470a.

[0098] FIG. 7 is a diagram schematically illustrating another example of a vapor deposition apparatus used in the method for manufacturing a power semiconductor element according to an embodiment of the present invention.

[0099] The vapor deposition apparatus for forming the active layer 10 and well layers 21 and 22 of the power semiconductor element according to the embodiment is not limited to the apparatus shown in FIG. 6, and the vapor deposition apparatus shown in FIG. 7 may also be used.

[0100] Referring to FIG. 7, the deposition apparatus may include a chamber 100, a support 200 disposed within the chamber 100 for supporting a substrate S, first and second gas injection units 300a and 300b disposed within the chamber 100 facing the support 200, a gas supply unit 400 for supplying process gas to the first and second gas injection units 300a and 300b, an antenna 610 having a coil for inducing an electric field within the chamber 100 to generate plasma, and a power supply unit 620 connected to the antenna 610.

[0101] The deposition apparatus may also include a heating unit 500 arranged opposite the support stage 200, a driving unit 700 that raises and lowers and rotates the support stage 200, and an exhaust unit 800 that exhausts gases and impurities from inside the chamber 100.

[0102] The chamber 100 is cylindrical and has an internal space in which a thin film can be formed on a substrate S loaded therein. For example, the chamber 100 may be dome-shaped, as shown in FIG. 7 . More specifically, the chamber 100 may include a chamber body 110, an upper body 120 disposed on the upper side of the chamber body 110, and a lower body 130 disposed on the lower side of the chamber body 110. The chamber body 110 may be cylindrical and open at the top and bottom. The upper body 120 may be disposed to cover the upper opening of the chamber body 110, and the lower body 130 may be disposed to cover the lower opening of the chamber body 110. The upper body 120 may be dome-shaped with a slope whose height gradually increases toward the center in the width direction. The lower body 130 may also be dome-shaped with a slope whose height gradually decreases toward the center in the width direction. The chamber 100, i.e., the chamber body 110, the upper body 120, and the lower body 130, may be made of a transparent material that can transmit light, such as quartz.

[0103] The gas supply unit 400 may be provided in the same configuration as that described in Fig. 6. That is, the gas supply unit 400 may include a source gas storage unit 410 storing a source gas, a reactant gas storage unit 420 storing a reactant gas that reacts with the source gas, a purge gas storage unit 430 storing a purge gas, a first transfer pipe 470a arranged to connect the source gas storage unit 410 and the first gas injection unit 300a, and a second transfer pipe 470b arranged to connect the reactant gas storage unit 420, the purge gas storage unit 430, and the second gas injection unit 300b.

[0104] The gas supply unit 400 may also include a plasma generation gas storage unit 440 that stores a gas (hereinafter referred to as a plasma generation gas) to be supplied in a step of generating plasma inside the chamber 100 after the injection of the reactant gas or after the secondary purge. In this case, the plasma generation gas may be, for example, hydrogen gas.

[0105] The gas supply unit 400 may include a doping gas storage unit 450 that stores a doping gas, and a mixer 460 that is disposed in the first transfer pipe 470a so as to mix a plurality of gases.

[0106] Furthermore, the gas supply unit 400 may include a plurality of first connecting pipes 480a connecting each of the source gas storage unit 410 and the doping gas storage unit 450 to the first transfer pipe 470a, a valve disposed in each of the plurality of first connecting pipes 480a, a plurality of second connecting pipes 480b connecting each of the reactant gas storage unit 420, the purge gas storage unit 430, and the gas storage unit for plasma generation 440 to the second transfer pipe 470b, and a valve disposed in each of the plurality of second connecting pipes 480b.

[0107] The antenna 610 may be disposed on the upper part of the upper body 120 of the chamber 100. In this case, the antenna 610 may be provided in a spiral shape wound with a plurality of turns, or may be configured to include a plurality of circular coils arranged in a concentric circle and connected to each other. Needless to say, the antenna 610 is not limited to a spiral coil or a concentric circular coil, and antennas of various other shapes may be used.

[0108] One end of the antenna 610 may be connected to the power supply 620, and the other end may be connected to a ground terminal. Therefore, when power, for example, RF power, is supplied to the antenna 610 through the power supply 620, the gas injected into the chamber 100 is ionized or discharged, generating plasma inside the chamber 100.

[0109] The heating unit 500 is a means for heating the interior of the chamber 100 and the support table 200, and may be disposed outside the chamber 100. More specifically, the heating unit 500 may be disposed below the exterior of the chamber 100 so that at least a portion of the heating unit 500 faces the support table 200. Such a heating unit 500 may be a means including a plurality of lamps, and the plurality of lamps may be arranged in a line in the width direction of the support table 200. The plurality of lamps may include halogen lamps or the like that emit radiant heat.

[0110] A method for manufacturing a power semiconductor device according to an embodiment of the present invention will be described below with reference to Figures 2 and 3. The method will be described using the vapor deposition apparatus shown in Figure 6, taking a field effect transistor as an example.

[0111] First, the heater 210 provided on the support stage 200 is operated to heat the support stage 200. At this time, the heater is operated so that the temperature of the support stage 200 or the substrate S to be placed on the support stage 200 becomes a process temperature, for example, 500°C to 520°C.

[0112] Next, the substrate S, for example, a substrate S made of SiC, is loaded into the chamber 100 and placed on the support stage 200. At this time, one or more substrates S may be provided on the support stage 200. Thereafter, when the substrate S placed on the support stage 200 reaches a target process temperature, for example, 500°C to 520°C, an active layer 10 is formed on the substrate S.

[0113] At this time, the active layer 10 is formed using atomic layer deposition. The atomic layer deposition is performed in the following order: injection of source gas, injection of purge gas (first purge), injection of reactant gas, and injection of purge gas (second purge). At this time, plasma is generated inside the chamber 100 after the second purge. That is, the process cycle for forming the active layer 10 by atomic layer deposition may be "injection of source gas - injection of purge gas (first purge) - injection of reactant gas - injection of purge gas (second purge) - generation of plasma." The above-described process cycle is repeated multiple times to form the active layer 10 with a desired thickness.

[0114] Hereinafter, a method for forming the active layer 10 by injecting the process gas into the chamber 100 using the injector 300 and the gas supply unit 400 will be described in more detail. Here, the case of forming the active layer 10 made of AlGaInP will be described as an example.

[0115] First, source gases are injected into the chamber 100. To this end, the Al-containing gas stored in the first source gas storage section 410, the Ga-containing gas stored in the second source gas storage section 410, and the In-containing gas stored in the third source gas storage section 410 are each supplied to the mixing section 460. As a result, the three types of source gases, i.e., the Al-containing gas, the Ga-containing gas, and the In-containing gas, are mixed inside the mixing section 460.

[0116] The mixed source gas flows through the first transfer pipe 470a and the first gas supply pipe 500a into the diffusion space 350 in the injection unit 300. Then, the mixed source gas is diffused in the diffusion space 350, and then passes through the plurality of nozzles 320, i.e., the plurality of first paths 360a, and is injected toward the substrate S.

[0117] When the injection of the source gas is interrupted or terminated, a purge gas is supplied through the purge gas reservoir 430 to inject the purge gas into the chamber 100 (first purge). At this time, the purge gas discharged from the purge gas reservoir 430 may pass through the second connecting pipe 480b, the second transfer pipe 470b, and the second gas supply pipe 500b, and then be injected downward through the second path 360b.

[0118] Next, a reactant gas, for example, a P-containing gas, is provided from the reactant gas reservoir 420 and injected into the chamber 100. At this time, the reactant gas may be injected into the chamber 100 through the same path as the purge gas. That is, the reactant gas may pass through the second connecting pipe 480b, the second transfer pipe 470b, and the second gas supply pipe 500b, and then be injected downward through the second path 360b. When the reactant gas is injected, a reaction occurs between the source gas adsorbed on the substrate S and the reactant gas, generating a reactant, i.e., AlGaInP. The reactant is then deposited or evaporated on the substrate S, thereby forming a thin film made of AlGaInP on the substrate S.

[0119] As described above, when the reactant gas is injected into the chamber 100, the RF power supply unit 600 may be operated to supply RF power to the first plate 310. When RF power is supplied to the first plate 310, plasma may be generated in the second passage 360b in the injection unit 300 and in the space between the first plate 310 and the support 200.

[0120] When the injection of the reactant gas is stopped, the purge gas is supplied through the purge gas reservoir 430 to inject the purge gas into the chamber 100 (second purge). At this time, by-products generated by the reaction between the source gas and the reactant gas can be discharged to the outside of the chamber 100 by the second purge.

[0121] After the second purge is completed, gas, for example, hydrogen gas, is supplied from the plasma generation gas reservoir 440, and the RF power supply is operated to supply RF power to the first plate 310. As a result, plasma using the hydrogen gas, i.e., hydrogen plasma, is generated inside the chamber 100.

[0122] In this way, by generating plasma inside the chamber 100 after the injection of the reactant gas or after the secondary purge, the active layer 10 can be formed on the substrate S even at a low temperature of 600° C. or less. Also, a crystalline, more specifically polycrystalline, active layer 10 can be formed.

[0123] The process cycle described above, which is performed in the order of "injection of source gas, injection of purge gas (first purge), injection of reactant gas, injection of purge gas (second purge), and generation of plasma," may be repeated multiple times. The number of times the process cycle is performed may be determined depending on the target layer thickness.

[0124] Once the active layer 10 has been formed to the desired thickness, a portion of the active layer 10 is etched. For example, the active layer 10 is etched to a desired thickness in a region outside the central region of the active layer 10 in the width or length direction. To achieve this, for example, a mask is provided that closes the central region of the active layer 10 and opens the remaining regions, and the mask is placed above the active layer 10. Then, an etching gas is sprayed from above the active layer 10 to etch the portion of the active layer 10 exposed in the open region. This etching is performed so that the active layer 10 facing the open region of the mask remains with the desired thickness. The etching gas may be a combination of at least one or two of SF, Cl, CF, and O, and plasma may be applied.

[0125] By such etching, the active layer 10 may be provided in a form including a first layer 11 formed on the upper surface of the substrate S and a second layer 12 formed in a central region of the first layer 11. Therefore, the active layer 10 may have a stepped shape, in which the height of the region where the second layer 12 is formed is higher than the portion where only the first layer 11 is formed.

[0126] As described above, the step of etching a portion of the active layer may be performed in an apparatus separate from the deposition apparatus shown in Figure 6. The etching apparatus may also be an apparatus in situ connected to the deposition apparatus.

[0127] After the etching is completed, well layers 21 and 22 are formed on the first layer 11 of the active layer 10. At this time, the well layers 21 and 22 may be formed by, for example, atomic layer deposition, or may be formed using the same deposition apparatus as that used to form the active layer 10.

[0128] A method for forming the well layers 21 and 22 will be described below, using the deposition apparatus shown in Fig. 6. In this case, the well layers 21 and 22 will be formed as n-type AlGaInP layers as an example.

[0129] First, the substrate S on which the active layer 10 is formed is loaded into the chamber 100 and placed on the support 200. Then, a mask is placed on the active layer 10, with the area facing the second layer 12 of the active layer 10 closed and the remaining area open.

[0130] Next, the source gases are injected into the chamber 100. To this end, first, the Al-containing gas stored in the first source gas storage section 410, the Ga-containing gas stored in the second source gas storage section 410, the In-containing gas stored in the third source gas storage section 410, and the Si-containing gas stored in the doping gas storage section 450 are each supplied to the mixing section 460. As a result, the Al-containing gas, Ga-containing gas, In-containing gas, and Si-containing gas are mixed inside the mixing section 460. The mixed gas passes through the first transfer pipe 470a, the first gas supply pipe 500a, and the first path 360a of the injection section 300 and is injected toward the substrate S.

[0131] Thereafter, purge gas is supplied from the purge gas reservoir 430 and injected into the chamber 100 through the second path 360b of the injection unit 300 (primary purge).

[0132] Next, a reactant gas, for example, a P-containing gas, is provided from the reactant gas reservoir 420 and injected into the chamber 100 through the second path 360b of the injection unit 300. At this time, RF power may be supplied to the first plate 310 to generate plasma.

[0133] When the reactant gas is injected, a reaction occurs between the source gas adsorbed on the substrate S and the reactant gas, generating a reactant, i.e., AlGaInP. Since the source gas and the doping gas are mixed and injected, the reactant becomes AlGaInP doped with Si. Therefore, well layers 21, 122 made of n-type AlGaInP can be formed on the first layer 11 of the active layer 10.

[0134] When the injection of the reactant gas is completed, the purge gas is supplied from the purge gas reservoir 430 and injected into the chamber 100 (secondary purge).

[0135] Once the secondary purge is complete, a step of generating plasma inside the chamber 100 may be added. That is, gas, for example, hydrogen gas, is supplied from the plasma generation gas reservoir 440 and injected into the chamber 100, and RF power is supplied to the first plate 310. As a result, plasma using the hydrogen gas, i.e., hydrogen plasma, is generated inside the chamber 100.

[0136] Thereafter, a process cycle of "injection of source gas (mixture of source gas and doping gas), injection of purge gas (first purge), injection of reactant gas, injection of purge gas (second purge), and generation of plasma" is repeated multiple times to form well layers 21 and 22 with the desired thickness. At this time, well layers 21 and 22 may be provided in a shape that surrounds second layer 12 above first layer 11 of active layer 10, as shown in FIG.

[0137] In the above, a description has been given of generating plasma after the second purge when forming the well layers 21 and 22. However, the present invention is not limited to this, and the step of generating plasma after the second purge may be omitted.

[0138] After the well layers 21 and 22 are formed, a gate insulating layer 30 is formed on the active layer 10 and the well layers 21 and 22. In this case, the gate insulating layer 30 may be formed of, for example, Al2O3, and may be formed by any one of chemical vapor deposition, metalorganic chemical vapor deposition, and atomic layer deposition.

[0139] After this, a portion of the gate insulating layer 30 is etched. For example, the gate insulating layer 30 formed in the peripheral portion at the top of the well layers 21 and 22 is etched. Therefore, as shown in FIG. 1 , the gate insulating layer 30 is provided on the second layer 12 of the active layer 10, and at this time, the gate insulating layer 30 can be provided to have a length even shorter than that of the second layer 12.

[0140] Next, a source electrode 41 is formed on one side of the gate insulating layer 30 above the well layers 21 and 22, and a drain electrode 42 is formed on the other side. At this time, the source and drain electrodes 41 and 42 may be formed using at least one of Ti and Au, and may be formed by, for example, a sputtering deposition method.

[0141] Then, the gate electrode 50 is formed on the gate insulating layer 30. In this case, the gate electrode 50 may be formed using the same material and method as the source and drain electrodes 41, 42. For example, the gate electrode 50 may be formed from at least one of Ti and Au, and may be formed by sputtering deposition.

[0142] As described above, according to the method for manufacturing a power semiconductor device according to the embodiment, the active layer 10 can be formed at a low temperature. Therefore, the substrate S or the thin films formed thereon can be prevented from being damaged by high-temperature heat. Furthermore, the power or time required to heat the substrate S to form the active layer 10 can be reduced, thereby shortening the overall process time.

[0143] Furthermore, the active layer 10 can be formed by crystallization. That is, a crystallized active layer can be formed while forming the active layer 10 at a low temperature. [Industrial Applicability]

[0144] According to an embodiment of the present invention, an active layer can be formed at a low temperature. This prevents the substrate or thin films formed thereon from being damaged by high-temperature heat. Furthermore, the power or time required to heat the substrate for forming the active layer can be reduced, thereby shortening the overall process time.

[0145] Furthermore, the active layer can be formed by crystallization, that is, a crystallized active layer can be formed while forming the active layer at a low temperature.

Claims

1. A method for manufacturing a power semiconductor element using a vapor deposition apparatus equipped with a chamber, the chamber is made of a transparent material and has a dome-shaped upper body; injecting a source gas containing one or more of Ga, In, Zn, and Si into the chamber; injecting a reactant gas containing one or more of As, P, O, and C into the chamber; A method for manufacturing a power semiconductor element, comprising:

2. the deposition device includes an antenna disposed on an upper portion of the upper body, The method for manufacturing a power semiconductor device according to claim 1 , further comprising the step of generating plasma in the chamber using the antenna after the step of injecting the source gas.

3. the deposition device includes an antenna disposed on an upper portion of the upper body, The method for manufacturing a power semiconductor device according to claim 1 , further comprising the step of generating plasma in the chamber using the antenna after the step of injecting the reactant gas.

4. the deposition apparatus includes a first gas injection unit and a second gas injection unit disposed in the chamber; injecting the source gas through the first gas injection portion; injecting the reactant gas through the second gas injection unit; The method for manufacturing a power semiconductor device according to claim 1 , comprising:

5. The chamber has a dome-shaped lower body having a slope whose height gradually decreases as it moves toward the center in the width direction, The method for manufacturing a power semiconductor element according to claim 1 , wherein the vapor deposition device includes a heating unit disposed below the outside of the chamber.

6. A method for manufacturing a power semiconductor using a vapor deposition apparatus including: a chamber; a first plate having a plurality of holes and disposed inside the chamber; a nozzle inserted into the plurality of holes; and a second plate disposed between an upper wall of the chamber and the first plate, injecting a source gas containing one or more of Ga, In, Zn, and Si into the chamber; injecting a reactant gas containing one or more of As, P, O, and C into the chamber; A method for manufacturing a power semiconductor element, comprising:

7. the deposition apparatus includes an RF power supply unit; the RF power supply is connected to the first plate and the second plate is grounded; The method for manufacturing a power semiconductor device according to claim 6 , further comprising the step of generating plasma in the chamber after the step of injecting the source gas.

8. the deposition apparatus includes an RF power supply unit; the RF power supply is connected to the first plate and the second plate is grounded; The method for manufacturing a power semiconductor device according to claim 6 , further comprising the step of generating plasma in the chamber after the step of injecting the reactant gas.

9. the deposition apparatus includes a first path that is a passage inside the nozzle and a second path that is a space outside the nozzle inside the hole, injecting the source gas through the first path; injecting the reactant gas through the second path; The method for manufacturing a power semiconductor element according to claim 6 , comprising:

10. The method for manufacturing a power semiconductor device according to claim 6 , wherein the deposition apparatus comprises a support stage disposed inside the chamber so as to be able to support a substrate, and a heater disposed inside the support stage.

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