Imaging element
The imaging element addresses noise interference and space utilization issues by isolating photoelectric conversion units with deep trench isolation and light-shielding, resulting in reduced noise and enhanced pixel efficiency.
Patent Information
- Application Number
- JP2025148050
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-09-08
- Publication Date
- 2025-11-07
AI Technical Summary
Existing imaging elements face challenges in effectively utilizing the space between pixels and managing noise interference between large and small area pixels, leading to suboptimal performance.
The imaging element incorporates a semiconductor substrate with photoelectric conversion units, transfer units, isolation units, and signal processing circuits, utilizing deep trench isolation and light-shielding portions to electrically and optically isolate photoelectric conversion units, reducing noise interference and enhancing pixel efficiency.
This configuration results in an imaging element with reduced noise and improved pixel performance, achieving better image quality by minimizing electrical and optical noise.
Smart Images

Figure 2025168552000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to an imaging device. [Background technology]
[0002] An imaging element is known in which large area pixels with relatively high sensitivity are arranged at one position of a checkerboard pattern, and small area pixels with relatively low sensitivity are arranged at the other position of the checkerboard pattern (for example, Patent Document 1). There has been a demand for effective use of the space between pixels. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-286104 Summary of the Invention
[0004] According to a first aspect of the present invention, an imaging element is an imaging element including a first semiconductor substrate having a plurality of photoelectric conversion units that convert light into electric charges, wherein the first semiconductor substrate has: a first semiconductor unit in which a first photoelectric conversion unit of the plurality of photoelectric conversion units is arranged; a transfer unit including a first transistor of a first conductivity type and transferring the electric charges converted by the first photoelectric conversion unit; a third semiconductor unit located between the first semiconductor unit and a second semiconductor unit in which a second photoelectric conversion unit of the plurality of photoelectric conversion units arranged adjacent to the first photoelectric conversion unit is arranged, and in which a first circuit including a second transistor of a second conductivity type different from the first conductivity type is arranged; a first isolation unit that electrically isolates the first semiconductor unit from the third semiconductor unit; and a second isolation unit that electrically isolates the second semiconductor unit from the third semiconductor unit. [Brief explanation of the drawings]
[0005] [Figure 1] FIG. 1 is a cross-sectional view schematically showing the configuration of an imaging device according to a first embodiment. [Figure 2] FIG. 1 is a diagram showing an overview of an imaging element according to a first embodiment. [Figure 3] FIG. 2 is a partially enlarged cross-sectional view of the image sensor according to the first embodiment. [Figure 4] FIG. 10 is a partially enlarged cross-sectional view of a first modified example of the imaging element. [Figure 5] FIG. 10 is a partially enlarged cross-sectional view of a second modified example of the imaging element. [Figure 6] FIG. 10 is a partially enlarged cross-sectional view of the image sensor according to the second embodiment. [Figure 7] FIG. 11 is a partially enlarged cross-sectional view of an image sensor according to a third embodiment. [Figure 8] FIG. 10 is a partially enlarged cross-sectional view of an image sensor according to a fourth embodiment. [Figure 9] FIG. 11 is a partially enlarged cross-sectional view of an imaging element according to a fifth embodiment. [Figure 10] FIG. 13 is a partially enlarged cross-sectional view of an image sensor according to a sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0006] (First embodiment of imaging device) FIG. 1 is a diagram showing an example of the configuration of a camera 1 which is a first embodiment of an imaging device. The X, Y, and Z directions indicated by arrows in Figure 1 are positive (+) directions. The X, Y, and Z directions are mutually orthogonal. The X, Y, and Z directions shown in the following figures are also the same as the X, Y, and Z directions shown in Figure 1.
[0007] The camera 1 comprises a photographing optical system (imaging optical system) 2, an image sensor 3, an imaging control unit 4, a memory 6, a display unit 7, and an operation unit 8. The photographing optical system 2 has multiple lenses including a focus adjustment lens (focus lens) and an aperture stop, and forms an image of a subject on the image sensor 3. The photographing optical system 2 may be detachable from the camera 1.
[0008] The imaging element 3 is an imaging element such as a CMOS image sensor or a CCD image sensor. The imaging element 3 receives a light beam that has passed through the photographing optical system 2 and captures an image of a subject formed by the photographing optical system 2. As will be described later, the imaging element 3 has a plurality of pixels, each having a photoelectric conversion unit, arranged two-dimensionally (in the row and column directions). The photoelectric conversion unit is composed of a photodiode (PD). The imaging element 3 photoelectrically converts the received light to generate a signal and outputs the generated signal to the imaging control unit 4.
[0009] The memory 6 is a recording medium such as a memory card. Image data, control programs, etc. are recorded in the memory 6. Writing data to the memory 6 and reading data from the memory 6 are controlled by the imaging control unit 4. The display unit 7 displays an image based on the image data, information related to shooting such as the shutter speed and aperture value, and a menu screen, etc. The operation unit 8 includes various setting switches such as a release button, a power switch, and switches for switching between various modes, and outputs signals based on the respective operations to the imaging control unit 4.
[0010] The imaging control unit 4 is configured with a processor such as a CPU, FPGA, or ASIC, and memories such as a ROM or RAM, and controls each unit of the camera 1 based on a control program. The imaging control unit 4 supplies a signal that controls the imaging element 3 to the imaging element 3, thereby controlling the operation of the imaging element 3. When taking a still image, taking a video, or displaying a through image (live view image) of the subject on the display unit 6, the imaging control unit 4 causes the imaging element 3 to capture an image of the subject and output a signal.
[0011] The imaging control unit 4 includes a generation unit 5 that generates image data by performing various types of image processing on the signal output from the imaging element 3. The image processing includes tone conversion processing, color interpolation processing, and the like.
[0012] (First embodiment of the imaging element) The configuration of the image sensor 3 of the first embodiment will be described with reference to Fig. 2. Fig. 2(a) is a view of the image sensor 3 of the first embodiment as seen from the imaging surface side, i.e., from the +Z side. The image sensor 3 has a plurality of pixels 9 arranged in the X direction and the Y direction. For example, 1000 or more pixels 9 may be arranged in each of the X direction and the Y direction.
[0013] A horizontal control unit HC is provided at the −X direction end of an area (pixel area) in which a plurality of pixels 9 are arranged, and a vertical control unit VC is provided at the +Y direction end of the area (pixel area). The horizontal control unit HC and vertical control unit VC are collectively referred to as an element control unit CU. For example, each of the plurality of pixels 9 may have spectral sensitivity characteristics defined by a so-called Bayer array, or may have spectral sensitivity characteristics different from the Bayer array. Furthermore, some of the pixels 9 may be pixels for focus detection using a so-called image plane phase difference method. The configuration of pixels for focus detection is well known, and therefore a description thereof will be omitted in this specification.
[0014] Below, we will explain the structure of four pixels (four pixels) 9Q, which are arranged adjacent to each other in two rows in the X direction and two columns in the Y direction and are shown enclosed in a dashed square as an example.
[0015] FIG. 3(a) is an enlarged cross-sectional view showing the XY cross section of the four pixels 9Q of the imaging element 3, and FIG. 3(b) is a cross-sectional view showing the XZ cross section at the AA cutting line in FIG. 3(a). Note that Figure 3(a) shows the XY cross section at the BB section line in Figure 3(b), but for ease of understanding, Figure 3(a) also shows signal processing circuits 13a to 13d, which will be described later, which are located on the -Z side of the XY cross section corresponding to the BB section line in Figure 3(b). Hereinafter, the four pixels 9 included in the four pixels 9Q will also be referred to as pixels 9a to 9d, respectively.
[0016] The imaging element 3 includes a semiconductor substrate 10 made of a semiconductor such as silicon and arranged generally parallel to the XY plane. The semiconductor substrate 10 includes a plurality of photoelectric conversion units 11a to 11d, each of which is made up of a photodiode as an example of a unit for photoelectrically converting light. Hereinafter, the photoelectric conversion units 11a to 11d will be collectively or individually referred to simply as photoelectric conversion unit 11. For example, the photoelectric conversion unit 11 photoelectrically converts light incident on the semiconductor substrate 10 from approximately the +Z direction. Each pixel 9 includes at least one photoelectric conversion unit 11. In the following, it is assumed that the pixels 9a to 9d include photoelectric conversion units 11a to 11d, respectively.
[0017] As an example, the pixel 9a includes a photoelectric conversion unit 11a, a microlens 14, a color filter 15, a transfer transistor TX, a storage unit FD, and a signal processing circuit 13a. As an example, the semiconductor substrate 10 is made of a p-type semiconductor with a relatively low concentration of impurity atoms, and the photoelectric conversion unit 11a is a region having the conductive properties of an n-type semiconductor formed in a part of the p-type semiconductor substrate 10.
[0018] The photoelectric conversion unit 11a functions as a so-called embedded photodiode. The microlens 14 is provided on the side (+Z side) where light is incident on the semiconductor substrate 10, and focuses the light incident on the semiconductor substrate 10 onto the photoelectric conversion unit 11a. The color filter 15 is provided between the photoelectric conversion unit 11a and the microlens 14, and defines the wavelength characteristics of the light incident on the photoelectric conversion unit 11a.
[0019] Charges generated by light incident on the photoelectric conversion unit 11a are transferred to the storage unit FD by the transfer transistor TX. A voltage formed by the charges transferred to the storage unit FD is converted into a current signal by the first transistor Tr1, and then read out by a readout circuit (not shown) via the second transistor Tr2 and wiring W3 and W4. Therefore, the first transistor Tr1 and the second transistor Tr2 constitute a part of the signal processing circuit 13a that processes a signal based on the charges generated in the photoelectric conversion unit 11a.
[0020] The transfer of the electric charges generated in the photoelectric conversion unit 11a to the accumulation unit FD is controlled by the voltage of a control signal applied to the gate G0 of the transfer transistor TX. Similarly, the conduction of the first transistor Tr1 and the second transistor Tr2 is controlled by the voltage of a control signal applied to their respective gates G1 and G2.
[0021] The source region and drain region (hereinafter collectively referred to as "source-drain region") of each of the above-mentioned transistors are regions having the conductive properties of an n-type semiconductor formed by implanting predetermined atoms such as phosphorus or arsenic near the surface on the -Z side of the semiconductor substrate 10, which is a p-type semiconductor. The wiring W2 is a wiring that electrically connects between the first transistor Tr1, the second transistor Tr2, etc. that are formed in the signal processing circuit 13a. The wiring W1 is a wiring that electrically connects between the storage unit FD and the drain of the first transistor Tr1. The signal processing circuit 13a, the wiring W3, and the wiring W4 are covered with an insulating film 18 except for the portions that need to be electrically connected to each other.
[0022] The circuit configuration of the transfer transistor TX and the signal processing circuit 13a may be the same as that of a general four-transistor CMOS image sensor including a transfer transistor, an amplifier transistor, a reset transistor, and a selection transistor, for example, and the configuration of the storage section FD may be that of a general floating diffusion section. Furthermore, the signal processing circuit 13a may include more components than those in a typical four-transistor CMOS image sensor, such as part of an AD converter circuit that converts analog signals into digital signals.
[0023] The configurations of the pixels 9b to 9d other than the pixel 9a are similar to that of the pixel 9a described above, except that they differ in the wavelength selection characteristics of the color filter 15. The other pixels 9b to 9d also have signal processing circuits 13b to 13d, respectively, that process signals based on the charges generated in the photoelectric conversion units 11b to 11d. Hereinafter, the signal processing circuits 13a to 13d will be collectively or individually referred to as simply signal processing circuit 13.
[0024] 3(b), a light-shielding portion 17 is provided at the boundary between adjacent pixels 9a to 9d between the semiconductor substrate 10 and the color filter 15. The light-shielding portion 17 can reduce the amount of light that has passed through the microlens 14 and color filter 15 of one pixel 9a to 9d entering the adjacent pixel.
[0025] For example, the light-shielding portion 17 may be formed of a metal film such as tungsten, or may be formed of a film containing a light-absorbing material such as carbon. In addition, in the area between the semiconductor substrate 10 and the color filter 15 where the light-shielding portion 17 is not provided, a light-transmitting portion 16 having approximately the same thickness (length in the Z direction) as the light-shielding portion 17 is provided for planarization.
[0026] In the imaging element 3 of the first embodiment, separation portions 12a to 12d are arranged so as to surround the photoelectric conversion portions 11a to 11d included in the respective pixels 9a to 9d in a plane (XY plane) parallel to the semiconductor substrate 10. Hereinafter, each of the separation portions 12a to 12d will be collectively or individually referred to simply as separation portion 12.
[0027] The isolation portions 12 are, for example, deep trench isolation (DTI), and electrically isolate one side of the isolation portion 12 from the other side of the semiconductor substrate 10. In the image sensor 3 of the first embodiment, the isolation portions 12 are arranged to surround the photoelectric conversion portions 11, so that the photoelectric conversion portions 11 and their neighboring first regions 10a inside the isolation portions 12 in the semiconductor substrate 10 are electrically isolated from the second regions 10b, which are semiconductor regions outside the isolation portions 12. In this specification, the second regions 10b of the semiconductor substrate 10, which are separated from the photoelectric conversion portions 11 and their neighboring first regions 10a by the isolation portions 12, are also simply referred to as "semiconductor regions."
[0028] As an example, the isolation portion 12 may be formed by partially carving (grooves) into the semiconductor substrate 10 from the -Z side surface or the +Z side surface thereof and embedding an insulating material such as SiO2 inside the carved groove. By further embedding tungsten metal or the like in the insulating material constituting the isolation portion 12, light blocking, i.e., optical isolation, can be achieved in addition to electrical isolation.
[0029] The photoelectric conversion unit 11a of pixel 9a can also be referred to as a first photoelectric conversion unit, and the photoelectric conversion unit 11b of pixel 9b can also be referred to as a second photoelectric conversion unit provided adjacent to the photoelectric conversion unit 11a, which is the first photoelectric conversion unit. Therefore, the imaging element 3 of the first embodiment can also be said to have a first photoelectric conversion unit 11a, a second photoelectric conversion unit 11b provided adjacent to the first photoelectric conversion unit 11a, and a plurality of separation units 12a, 12b provided between the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b.
[0030] In the image sensor 3 of the first embodiment, a signal processing circuit 13a that processes signals based on charges generated by the photoelectric conversion unit 11a is disposed in a second region 10b between the separators 12a and 12b. Similarly, signal processing circuits 13b to 13d that process signals based on charges generated by the other photoelectric conversion units 11b to 11d are also disposed in the second region 10b separated from the first region 10a by the separator 12.
[0031] In general, the signal processing circuit 13 is a source of electrical noise that fluctuates the voltage of the semiconductor substrate 10 due to fluctuations in the voltage applied to the gates G1 and G2 of the transistors Tr1 and Tr2 that constitute the signal processing circuit 13. However, in the image sensor 3 of the first embodiment, the separator 12 is disposed between the signal processing circuit 13 and the photoelectric conversion unit 11. Therefore, even if the voltage of the second region 10b where the signal processing circuit 13 is disposed fluctuates, the fluctuation in the voltage of the first region 10a where the photoelectric conversion unit 11 is disposed can be reduced. Therefore, the adverse effects of electrical noise generated by the signal processing circuit 13 on the photoelectric conversion unit 11 can be reduced.
[0032] As an example, the thickness of the semiconductor substrate 10 in the Z direction is about 3 μm or more. The separation portion 12 may be formed from the end face on the −Z side of the semiconductor substrate 10 to the end face on the +Z side, or may be formed from the end face on the −Z side of the semiconductor substrate 10 into the semiconductor substrate 10 to a depth of, for example, 1 μm or more, or 2 μm or more. As an example, the Z-direction length (depth) of the separation section 12 from the -Z side end face of the semiconductor substrate 10 may be set to 2 / 3 or more of the thickness of the semiconductor substrate 10 to further reduce the adverse effects on the photoelectric conversion section 11 of electrical noise generated in the signal processing circuit 13.
[0033] Depending on the configuration of the signal processing circuit 13, it may include an element that emits visible light or infrared light therein. For example, if the signal processing circuit 13 includes a current source circuit, the current source circuit may unintentionally emit light. For example, as described above, by further embedding tungsten metal or the like in the insulating member that constitutes the separation unit 12, it is possible to reduce the adverse effect on the photoelectric conversion unit 11 of light emitted within the signal processing circuit 13 (optical noise).
[0034] If it is important to reduce noise generated in the photoelectric conversion unit 11 due to light emitted by the light-emitting element in the signal processing circuit 13, the isolation unit 12 may be formed of a material with high light-blocking properties, such as metal. In this case, the isolation unit 12 reduces the electrical isolation function of the semiconductor substrate 10, but improves the light-blocking, i.e., optical isolation, function. Alternatively, the isolation unit 12 may be formed by embedding a metal in an insulating film formed by coating, for example, to provide electrical and optical isolation. The separators 12 may be arranged so as to surround each of the photoelectric conversion sections 11 in multiple layers.
[0035] (Modification 1 of the imaging element) Below, a first modification of the image sensor 3 will be described with reference to Fig. 4. The configuration of the first modification of the image sensor 3 is similar to that of the image sensor 3 of the first embodiment shown in Figs. 2 and 3, but the configuration of the separation section 12 is different from that of the image sensor 3 of the first embodiment.
[0036] 4 is an enlarged cross-sectional view showing the XY cross section of a portion of four pixels 9Q (see FIG. 2) in Modification 1 of the image sensor 3, and is a view similar to FIG. 3(a) showing the image sensor 3 of the first embodiment described above. In the following, the same components as those in the image sensor 3 of the first embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted where appropriate.
[0037] 4, in the first modification of the image sensor 3, two separation units 12a and 12b extending in the Y direction are arranged between two photoelectric conversion units 11a and 11b adjacent to each other in the X direction and between two photoelectric conversion units 11c and 11d adjacent to each other in the X direction. Note that the XZ cross section of the first modification taken along the AA cutting line in FIG. 4 is the same as the XZ cross section of the image sensor 3 of the first embodiment shown in FIG. 3(b).
[0038] The material and Z-direction length of the separators 12a to 12d in Modification 1 are the same as those of the separator 12 in the image sensor 3 of the first embodiment described above. Therefore, the first region 10a in which the photoelectric conversion section 11 is arranged is electrically or optically separated from the second region 10b by the separator 12.
[0039] In the first modification, the signal processing circuit 13 described above is also disposed in the second region 10b of the semiconductor substrate 10. Therefore, the separation unit 12 reduces the adverse effect on the photoelectric conversion unit 11 of electrical noise or optical noise generated from the transistors and the like included in the signal processing circuit 13.
[0040] The number of separation sections 12 arranged between two photoelectric conversion sections 11a, 11b adjacent to each other in the X direction and between two photoelectric conversion sections 11c, 11d adjacent to each other in the X direction is not limited to the two mentioned above, but may be more than two.
[0041] In the image sensor 3 of the first embodiment and the first modification, the separation units 12 are arranged along the X direction, which is the direction in which one photoelectric conversion unit 11a is arranged relative to another photoelectric conversion unit 11b. At least a portion of each of the separation units 12 extends along the Y direction, which is the direction intersecting the X direction. At least a portion of each of the plurality of separating portions 12 does not necessarily need to extend along the Y direction, but may extend in a direction intersecting with the X direction.
[0042] (Modification 2 of the imaging element) Below, modified example 2 of the image sensor 3 will be described with reference to Fig. 5. The configuration of modified example 2 of the image sensor 3 is similar to that of the image sensor 3 of the first embodiment shown in Figs. 2 and 3, but the configuration of the separation section 12 is different from that of the image sensor 3 of the first embodiment. Below, the same components as those of the image sensor 3 of the first embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted as appropriate.
[0043] Figure 5 is an enlarged cross-sectional view of the XY cross section of the four pixels 9Q (see Figure 2) in variant example 2 of the image sensor 3, and is a view similar to Figure 3(a) showing the image sensor 3 of the first embodiment described above. 5, in the second modification of the image sensor 3, separators 12a to 12d are arranged to surround the signal processing circuits 13a to 13d that process signals based on the charges generated in the photoelectric conversion units 11a to 11d, respectively. The material and length in the Z direction of the separators 12a to 12d in the second modification are the same as those of the separator 12 in the image sensor 3 of the first embodiment described above. Therefore, the first region 10a in which the photoelectric conversion unit 11 is arranged is electrically or optically, or electrically and optically, isolated from the second region 10b by the separator 12.
[0044] As a result, in the second modification as well, the separator 12 reduces the adverse effect on the photoelectric conversion unit 11 of electrical noise or optical noise generated from transistors and the like included in the signal processing circuit 13. The separators 12 may be arranged to surround each of the signal processing circuits 13 in multiple ways.
[0045] The imaging element 3 of the above-described first embodiment and variants 1 and 2 can also be said to have a plurality of separation sections 12 provided between the first photoelectric conversion section 11a and the second photoelectric conversion section 11b arranged adjacent to each other.
[0046] In the image sensor 3 of the first embodiment and modified examples 1 and 2 described above, the signal processing circuit 13 is arranged in the second region 10b of the semiconductor substrate 10, but the signal processing circuit 13 does not necessarily have to be arranged in the second region 10b. For example, the signal processing circuit 13 may be arranged on a second semiconductor substrate stacked on the semiconductor substrate 10, and the signal processing circuit may be arranged on this second semiconductor substrate. Even in this case, the separator 12 can reduce the adverse effect on the photoelectric conversion unit 11 of electrical noise caused by the electrical signals flowing through the wirings W3 and W4.
[0047] (Effects of the Image Sensors of the First Embodiment, Modification 1, and Modification 2) (1) The imaging element 3 of the first embodiment and variants 1 and 2 is an imaging element having a semiconductor substrate 10, and the semiconductor substrate 10 includes a first photoelectric conversion unit 11a that performs photoelectric conversion of light, a second photoelectric conversion unit 11b that is provided adjacent to the first photoelectric conversion unit 11a and also performs photoelectric conversion of light, and a plurality of separation units 12 that are provided between the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b. This configuration makes it possible to reduce noise entering the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b, thereby realizing an imaging element 3 with less noise.
[0048] (2) The separation unit 12 may be a region that electrically or optically, or electrically and optically separates the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b in the semiconductor substrate 10. In this case, it is possible to reduce electrical noise or optical noise that gets mixed into the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b, thereby realizing an image sensor 3 with less noise.
[0049] (3) The semiconductor substrate 10 may be configured to include a signal processing circuit 13a provided in a semiconductor region (second region 10b) between two of the plurality of separation units 12, for processing signals based on charges generated in the first photoelectric conversion unit 11a or the second photoelectric conversion unit 11b. In this case, the separation unit 12 can reduce the adverse effects on the first photoelectric conversion unit 11a of electrical noise or optical noise (light emission) that may be generated in the signal processing circuit 13a, thereby realizing an image sensor 3 with reduced noise.
[0050] (4) The first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b may be arranged in a first direction (X direction), and the plurality of separators 12 may be arranged in the first direction (X direction), with at least a portion of each of the plurality of separators 12 extending in a direction (Y direction) intersecting the first direction (X direction). In this case, the semiconductor region (second region 10b) between the plurality of separators 12 in the first direction (X direction) can be more effectively separated from the first region 10a in which the first photoelectric conversion unit 11a or the second photoelectric conversion unit 11b is arranged, thereby realizing an image sensor 3 with further reduced noise.
[0051] (5) One (12a) of the plurality of separators 12 may surround the first photoelectric conversion unit 11a on the semiconductor substrate 10, and another (12b) of the plurality of separators 12 may surround the second photoelectric conversion unit 11b on the semiconductor substrate 10. In this case, the semiconductor region (second region 10b) can be more effectively separated from the first region 10a in which the first photoelectric conversion unit 11a or the second photoelectric conversion unit 11b is disposed, thereby realizing an image sensor 3 with even further reduced noise.
[0052] (Image sensor of second embodiment) The imaging element 3 of the second embodiment will be described below with reference to Fig. 6. The configuration of the imaging element 3 of the second embodiment is generally similar to that of the imaging element 3 of the first embodiment shown in Figs. 2 and 3, but the shape of the light-shielding portion 17a is different from that of the light-shielding portion 17 of the imaging element 3 of the first embodiment. In the following, the same components as those of the imaging element 3 of the first embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted where appropriate.
[0053] Fig. 6 is an enlarged cross-sectional view showing the XZ cross section of a portion of four pixels 9Q (see Fig. 2) in the image sensor 3 of the second embodiment, and is a view similar to Fig. 3(b) of the image sensor 3 of the first embodiment described above. Note that the XY cross section of the image sensor 3 of the second embodiment taken along the BB cutting line in Fig. 6 is similar to the XY cross section of the image sensor 3 of the first embodiment shown in Fig. 3(a).
[0054] 6, in the image sensor 3 of the second embodiment, the light-shielding portion 17a is disposed on the +Z side surface of the semiconductor substrate 10 so as to cover the entire surface of the second region 10b. Therefore, light incident from the +Z side of the image sensor 3 through the microlens 14 can pass through the color filter 15 and the light-transmitting portion 16 and enter the photoelectric conversion portion 11 in the first region 10a, but cannot enter the second region 10b because it is blocked by the light-shielding portion 17a. As a result, the light incident from the +Z side does not reach the signal processing circuit 13 disposed in the second region 10b.
[0055] In the image sensor 3 of the second embodiment, the light shielding portion 17a blocks light from entering the signal processing circuit 13, thereby reducing the generation of unnecessary charges, i.e., noise, due to photoelectric conversion in the signal processing circuit 13. This makes it possible to realize an image sensor 3 with less noise.
[0056] The shape of the separation section 12 in the XY plane in the image sensor 3 of the second embodiment is not limited to the same shape as the separation section 12 in the image sensor 3 of the first embodiment, but may be the same shape as the separation section 12 in the first or second variant.
[0057] (Effects of the imaging element of the second embodiment) (6) In addition to the configuration of the image sensor 3 of the second embodiment described above, the image sensor 3 of the second embodiment includes a light-shielding portion 17a that blocks light incident on the semiconductor region (second region 10b). This configuration not only achieves the effects of the image sensor 3 of the embodiment, but also reduces the generation of unnecessary charges, i.e., noise, generated by photoelectric conversion in the signal processing circuit 13 disposed in the semiconductor region (second region 10b), thereby realizing an image sensor 3 with even less noise.
[0058] (Image sensor of the third embodiment) The image sensor 3 of the third embodiment will be described below with reference to Fig. 7. The configuration of the image sensor 3 of the third embodiment is generally similar to that of the image sensor 3 of the first and second embodiments described above, and therefore, in the following, the same components as those of the image sensor 3 of the first and second embodiments will be denoted by the same reference numerals and descriptions thereof will be omitted where appropriate.
[0059] Fig. 7(a) is an enlarged cross-sectional view showing the XY cross section of four pixels 9Q (see Fig. 2) of the image sensor 3 of the third embodiment, and is a view similar to Fig. 3(a) described above. Fig. 7(b) is a cross-sectional view showing the XZ cross section taken along the AA line in Fig. 7(a) and is a view similar to Fig. 3(b) described above. Fig. 7(a) shows the XY cross section taken along the BB line in Fig. 7(b), and also shows signal processing circuits 13a to 13d.
[0060] The imaging element 3 of the third embodiment differs from the imaging element 3 of the first and second embodiments described above in that the conductivity characteristics of the p-type or n-type semiconductor in the second region 10b of the semiconductor substrate 10 are opposite to those in the first region 10a in which the photoelectric conversion section 11 is arranged.
[0061] 7, the first region 10a is a p-type semiconductor with a relatively low concentration of impurity atoms, and the second region 10b is an n-type semiconductor with a relatively low concentration of impurity atoms. The first photoelectric conversion section 11a and the second photoelectric conversion section 11b formed in the first region 10a have the conductive properties of an n-type semiconductor.
[0062] The p-type or n-type semiconductor conductivity of the second region 10b is imparted by, for example, implanting predetermined impurity atoms (ion implantation) from the −Z side surface of the semiconductor substrate 10. The conductivity characteristics of the p-type or n-type semiconductor of the entire second region 10b do not necessarily have to be opposite to the conductivity characteristics of the first region 10a. For example, the conductivity characteristics of the p-type or n-type semiconductor of a portion of the second region 10b that is about half the thickness on the -Z side may be opposite to the conductivity characteristics of the first region 10a.
[0063] In the imaging element 3 of the third embodiment, it can also be said that the second region 10b is formed as an n-type (or p-type) well in the p-type (or n-type) semiconductor substrate 10. In the image sensor 3 of the third embodiment, transistors Tr1 and Tr2 having opposite characteristics to the transfer transistor TX can be formed in the second region 10b. That is, as an example, when the transfer transistor TX is an NMOS transistor, the transistors Tr1 and Tr2 can be PMOS transistors. This increases the degree of freedom in designing the signal processing circuit 13, and allows, for example, the signal processing circuit 13 to be made more compact.
[0064] Furthermore, by electrically isolating the first region 10a and the second region 10b by the isolation portion 12, it is possible to prevent current from flowing from one p-type semiconductor region to the other n-type semiconductor region, which improves the degree of freedom in determining the relationship between the substrate voltage of the first region 10a and the substrate voltage of the second region 10b, further improving the degree of freedom in designing the signal processing circuit 13 and enabling further miniaturization of the signal processing circuit 13.
[0065] In the above description, the image sensor 3 of the third embodiment is provided with the same light-shielding portion 17a as the image sensor 3 of the second embodiment, but it may also be provided with the same light-shielding portion 17 as the image sensor 3 of the first embodiment. Furthermore, the shape in the XY plane of the separator 12 in the image sensor 3 of the third embodiment may also be the same as the shape of the separator 12 in the first or second modification described above.
[0066] (Effects of the imaging element of the third embodiment) (7) In addition to the configuration of the image sensor 3 of the first embodiment described above, the image sensor 3 of the third embodiment has the following configuration: the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b have the conductivity characteristic of an n-type semiconductor, and the semiconductor region (second region 10b) has the conductivity characteristic of an n-type semiconductor. That is, the first region 10a in which the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b are arranged has the conductivity characteristic of a p-type semiconductor, and the semiconductor region (second region 10b) has the conductivity characteristic of an n-type semiconductor, which is the opposite conductivity characteristic. This configuration not only achieves the effects of the image sensor 3 of the first embodiment described above, but also increases the degree of freedom in designing the signal processing circuit 13 to be arranged in the first region 10a, making it possible to, for example, miniaturize the signal processing circuit 13.
[0067] (Image sensor of the fourth embodiment) An image sensor 3 according to a fourth embodiment will now be described with reference to Fig. 8. In the image sensor 3 according to the fourth embodiment, the first region 10a is also, as an example, a p-type semiconductor with a relatively low concentration of impurity atoms, and the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b formed in the first region 10a have the conductive characteristics of an n-type semiconductor. The configuration of the image sensor 3 according to the fourth embodiment is generally similar to that of the image sensor 3 according to the above-described embodiments, and therefore, in the following, the same components as those of the image sensor 3 according to the above-described embodiments will be denoted by the same reference numerals and will not be described again as appropriate.
[0068] Fig. 8 is an enlarged cross-sectional view showing the XY cross section of four pixels 9Q (see Fig. 2) of the image sensor 3 of the fourth embodiment, and is similar to Figs. 3(a) and 7(a) described above. The XZ cross section of the image sensor 3 of the fourth embodiment taken along the AA line in Fig. 8 is similar to the XZ cross section of the image sensor 3 of the third embodiment shown in Fig. 7(b). Fig. 8 also shows signal processing circuits 13a to 13d.
[0069] As shown in Fig. 8, in the image sensor 3 of the fourth embodiment, the separators 12 are formed in a two-dimensional lattice pattern within the XY plane. The separators 12 separate the first region 10a of the semiconductor substrate 10, which includes the photoelectric conversion unit 11, from the semiconductor region (second region 10b), and divide the semiconductor region (second region 10b) into a plurality of partial regions 10b1 to 10b3. The p-type or n-type semiconductor conductivity characteristics of at least one of the plurality of partial regions 10b1 to 10b3 (two partial regions 10b1 and 10b2 in the example shown in Fig. 8) are opposite to the p-type or n-type semiconductor conductivity characteristics of the first region 10a.
[0070] The signal processing circuit 13 is also divided, and as an example, the signal processing circuit 13a is arranged as signal processing circuits 13a1 to 13a3 in the plurality of partial regions 10b1 to 10b3, respectively. Note that the signal processing circuits 13a1 to 13a3 are electrically connected to each other by wiring (not shown) that is arranged across the plurality of partial regions 10b1 to 10b3 on the -Z side surface of the semiconductor substrate 10, like the wiring W1 shown in FIG. 7(b) described above.
[0071] In the image sensor 3 of the fourth embodiment, NMOS transistors or PMOS transistors can be arranged in the partial regions 10b1 to 10b3 included in the second region 10b, depending on whether the partial region is a p-type semiconductor or an n-type semiconductor. This increases the degree of freedom in designing the signal processing circuit 13, and for example, the signal processing circuit 13 made of CMOS can be arranged within the semiconductor substrate 10.
[0072] In the above description, the imaging element 3 of the fourth embodiment is provided with a light-shielding portion 17a similar to that of the imaging element 3 of the second embodiment, but it may also be provided with a light-shielding portion 17 similar to that of the imaging element 3 of the first embodiment. It can be said that the separation section 12 shown in FIG. 8 is a plurality of separation sections including a plurality of separation sections extending in the X direction and a plurality of separation sections extending in the Y direction.
[0073] (Effects of the image sensor of the fourth embodiment) (8) In the image sensor 3 of the fourth embodiment, in addition to the configuration of the image sensor 3 of the first embodiment described above, the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b have n-type semiconductor conductivity, and the semiconductor region (second region 10b) is divided into multiple partial regions 10b1-10b3 by a separator 12. At least one of the multiple partial regions 10b1-10b3 has p-type semiconductor conductivity. With this configuration, NMOS transistors or PMOS transistors can be arranged in the multiple partial regions 10b1-10b3 included in the second region 10b, depending on whether the partial region is a p-type semiconductor or an n-type semiconductor. This increases the design freedom of the signal processing circuit 13, in addition to the effects of the image sensor 3 of the first embodiment described above. For example, the signal processing circuit 13 made of CMOS can be arranged within the semiconductor substrate 10.
[0074] (9) From another perspective, the image sensor 3 of the fourth embodiment has the same configuration as the image sensor 3 of the first embodiment described above, except that the first photoelectric conversion unit 11a and the second photoelectric conversion unit 11b have n-type semiconductor conductivity, and the semiconductor region (second region 10b) is divided into a plurality of partial regions 10b1 to 10b3 by a separator 12. At least one of the plurality of partial regions 10b1 to 10b3 has n-type semiconductor conductivity. This configuration can achieve the same effect as the effect described in (8) above.
[0075] (Image sensor of the fifth embodiment) The imaging element 3 of the fifth embodiment will be described below with reference to Fig. 9. The configuration of the imaging element 3 of the fifth embodiment is generally similar to that of the imaging element 3 of the second embodiment described above, but the structure of the separation section 12 is different from that of the imaging element 3 of the first embodiment. In the following, the same components as those of the imaging element 3 of the second embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted as appropriate.
[0076] Fig. 9 is an enlarged cross-sectional view showing the XZ cross section of a portion of four pixels 9Q (see Fig. 2) in the image sensor 3 of the fifth embodiment, and is a view similar to Fig. 3(b) of the image sensor 3 of the first embodiment described above. Note that the XY cross section of the image sensor 3 of the fifth embodiment taken along the BB cutting line in Fig. 9 is similar to the XY cross section of the image sensor 3 of the first embodiment shown in Fig. 3(a).
[0077] In the image sensor 3 of the fifth embodiment, the first region 10a and the second region 10b of the semiconductor substrate 10 separated by the separation unit 12 are both p-type semiconductors or both n-type semiconductors. As shown in FIG. 9, the separation unit 12 does not separate the first region 10a and the second region 10b near the surface on the -Z side of the semiconductor substrate 10. In the image sensor 3 of the fifth embodiment, the storage unit FD that stores the charge generated in the photoelectric conversion unit 11 is arranged in the second region 10b, not in the first region 10a. In other words, the signal processing circuit 13 arranged in the second region 10b includes the storage unit FD.
[0078] As described above, light incident from the +Z side of the image sensor 3 via the microlens 14 is blocked by the light-shielding portion 17a and does not enter the second region 10b. Therefore, in the image sensor 3 of the fifth embodiment, the storage unit FD arranged in the second region 10b is not irradiated with light incident on the semiconductor substrate 10 from the +Z side, and noise generated by unnecessary photoelectric conversion in the storage unit FD is reduced. This makes it possible to realize an image sensor 3 with even less noise.
[0079] (Effects of the imaging element of the fifth embodiment) (10) In the image sensor 3 of the fifth embodiment, in addition to the configuration of the image sensor 3 of the second embodiment described above, the signal processing circuit 13 of the semiconductor region (second region 10b) includes a storage unit FD to which the charges generated in the first photoelectric conversion unit 11a or the second photoelectric conversion unit 11b are transferred. With this configuration, in addition to the effects of the image sensor 3 of the second embodiment described above, noise generated by unnecessary photoelectric conversion in the storage unit FD is reduced, making it possible to realize an image sensor 3 with even less noise.
[0080] (Image sensor of the sixth embodiment) An image sensor 3 according to a sixth embodiment will be described below with reference to Fig. 10. The image sensor 3 according to the sixth embodiment includes the configuration of the image sensor 3 according to any one of the above-described embodiments or modifications. In the following, the same components as those of the image sensor 3 according to the above-described embodiments or modifications will be denoted by the same reference numerals, and descriptions thereof will be omitted where appropriate.
[0081] 10 is an enlarged cross-sectional view showing the XZ cross section of a portion of four pixels 9Q (see FIG. 2) in the image sensor 3 of the sixth embodiment. In addition to the configuration of the image sensor 3 of each of the above-described embodiments or modifications, the image sensor 3 of the sixth embodiment includes a second semiconductor substrate 20 arranged parallel to the semiconductor substrate 10. A second signal processing circuit 23, shown surrounded by a two-dot chain line, is arranged on the second semiconductor substrate 20. The image sensor 3 of the sixth embodiment further includes a connection portion 22 that electrically connects at least a portion of the signal processing circuit 13 on the semiconductor substrate 10 to at least a portion of the second signal processing circuit 23 arranged on the second semiconductor substrate 20.
[0082] The second signal processing circuit 23 includes a plurality of transistors Tr3 formed on the second semiconductor substrate 20, and, as an example, a plurality of layers of wiring W4 and W5. The transistors Tr3, the wiring W4, and the wiring W5 are covered with a second insulating film 21 except for portions that require electrical connection with each other.
[0083] The connection portion 22 is made of a metal such as copper, for example, and is electrically connected to the wiring W3 or W4 and the wiring W5 or W6 by vertical wiring (wiring extending in the Z direction) (not shown).
[0084] Of the configuration of the image sensor 3 of the sixth embodiment shown in Fig. 10, the configuration of the insulating film 18 and the portion on the +Z side of the insulating film 18 is, for example, similar to the configuration of the image sensor 3 of the first embodiment shown in Fig. 3(b). Also, the XY cross section of the image sensor 3 of the sixth embodiment taken along the BB cutting line in Fig. 10 is similar to the XY cross section of the image sensor 3 of the first embodiment shown in Fig. 3(a).
[0085] In the image sensor 3 of the sixth embodiment, a signal based on charges generated by one photoelectric conversion unit 11 can be processed by the signal processing circuit 13 on the semiconductor substrate 10 and the second signal processing circuit 23 arranged on the second semiconductor substrate 20. Therefore, if the second semiconductor substrate 20 and the second signal processing circuit 23 are not present, some of the circuit elements arranged in the signal processing circuit 13 on the semiconductor substrate 10 can be arranged in the second signal processing circuit 23 on the second semiconductor substrate 20. This makes it possible to reduce the size of the signal processing circuit 13 in the XY plane. This also makes it possible to reduce the size of the pixels 9 in the XY plane, thereby increasing the integration density of the pixels 9 in the image sensor 3.
[0086] The signal processing circuit 13 and the second signal processing circuit 23 may collectively constitute an amplifier circuit that amplifies a signal based on the charges generated by one photoelectric conversion unit 11, and an AD conversion circuit that converts the amplified analog signal into a digital signal. As an example, the AD conversion circuit may be a slope type (incline type) AD conversion circuit or a successive approximation type AD conversion circuit.
[0087] Furthermore, the signal processing circuit 13 and the second signal processing circuit 23 may include a current source that supplies current to the amplifier circuit. By providing an individual amplifier circuit and AD conversion circuit for each of the multiple photoelectric conversion units 11 included in the image sensor 3, it is possible to read out image signals from the image sensor 3 at higher speeds.
[0088] In this case, for example, at least some of the circuit elements such as transistors that constitute the AD conversion circuit may be provided in the signal processing circuit 13 on the semiconductor substrate 10. For example, a comparator circuit of the AD conversion circuit may be provided in the signal processing circuit 13 on the semiconductor substrate 10. Alternatively, at least some of the circuit elements such as transistors that constitute the amplifier circuit may be provided in the second signal processing circuit 23 on the second semiconductor substrate 20.
[0089] Of the configuration of the imaging element 3 of the sixth embodiment, the configuration of the insulating film 18 and the configuration on the +Z side of the insulating film 18 is not limited to the same configuration as that of the imaging element 3 of the first embodiment described above, but may be the same configuration as that of the imaging element 3 of each of the above-mentioned embodiments or each modified example. For example, if the configuration of the imaging element 3 of the sixth embodiment, including the insulating film 18 and the configuration on the +Z side of the insulating film 18, is configured in the same manner as the imaging element 3 of the third or fourth embodiment described above, a PMOS transistor can be provided within the signal processing circuit 13, further improving the degree of freedom in circuit design. In the image sensor 3 of the sixth embodiment, the sensor control unit CU shown in FIG.
[0090] (Effects of the imaging element of the sixth embodiment) (11) The imaging element 3 of the sixth embodiment has, in addition to the configuration of the imaging element 3 of any one of the above-mentioned embodiments and variations, a second semiconductor substrate 20 stacked on the semiconductor substrate 10 and provided with a second signal processing circuit 23 that processes signals processed by the signal processing circuit 13. With this configuration, in addition to the effects of any one of the above-described embodiments and modifications, some of the circuit elements of the circuit that processes signals based on the charges generated by each photoelectric conversion unit 11 can be disposed in the second signal processing circuit 23 on the second semiconductor substrate 20. This allows the size of the signal processing circuit 13 in the XY plane to be reduced.
[0091] The imaging device 1 of the first embodiment described above may include, as the imaging element 3, any of the imaging elements 3 of the above-described embodiments and modifications. Although various embodiments and modifications have been described above, the present invention is not limited to these. Furthermore, each embodiment and modification may be applied independently or in combination. Other aspects conceivable within the scope of the technical concept of the present invention are also included within the scope of the present invention. [Explanation of symbols]
[0092] 1: imaging device, 2: imaging lens, 3: imaging element, 4: imaging control unit, 5: generation unit, 9: pixel, 10: semiconductor substrate, 10a: first region, 10b: second region (semiconductor region), 11a to 11d: photoelectric conversion unit, 12, 12a to 12d: separation unit, 13a to 13d: signal processing circuit, TX: transfer transistor, FD: storage unit, W3 to W5: wiring layer, 14: microlens, 15: color filter, 17, 17a: light shielding unit, 20: second semiconductor substrate, 22: connection unit, 23: second signal processing circuit
Claims
[Claim 1] An imaging device including a first semiconductor substrate having a plurality of photoelectric conversion units that convert light into electric charges, The first semiconductor substrate is a first semiconductor portion in which a first photoelectric conversion portion of the plurality of photoelectric conversion portions is arranged; a transfer unit including a first transistor of a first conductivity type, which transfers the charges converted by the first photoelectric conversion unit; a third semiconductor section in which a first circuit including a second transistor of a second conductivity type different from the first conductivity type is disposed, the third semiconductor section being located between the first semiconductor section and a second semiconductor section in which a second photoelectric conversion section of the plurality of photoelectric conversion sections is disposed adjacent to the first photoelectric conversion section; a first isolation portion that electrically isolates the first semiconductor portion and the third semiconductor portion; a second isolation portion that electrically isolates the second semiconductor portion from the third semiconductor portion; having Image sensor.
Citation Information
Patent Citations
Wide dynamic range color solid-state imaging apparatus and digital camera mounted therewith
JP2005286104A