Imaging apparatus and electronic apparatus

Abstract

To provide an imaging apparatus and an electronic apparatus, capable of avoiding deterioration of a captured image, while improving accuracy of phase difference detection.SOLUTION: The imaging apparatus includes a plurality of imaging elements. Each of the plurality of imaging elements includes: a plurality of pixels which include an impurity of a first conductivity type; an element separation wall which is provided so as to surround the plurality of pixels and penetrate through a semiconductor substrate; an on-chip lens which is provided above a light-receiving surface of the semiconductor substrate, so as to be shared by the plurality of pixels; and a first separation part which is provided in an area surrounded by the element separation wall and separates the plurality of pixels. The first separation part is provided so as to extend in a thickness direction of the semiconductor substrate. The first separation part includes, when viewed from above the light-receiving surface, a first area in contact with the element separation wall and a second area in contact with the first area and the second area has a width wider than that of the first area.SELECTED DRAWING: Figure 45

Description

[Technical Field]

[0001] The present disclosure relates to an imaging device and an electronic device. [Background technology]

[0002] In recent years, imaging devices have adopted a method of detecting a phase difference using a pair of phase difference detection pixels as an autofocus function. An example of such a method is the imaging element disclosed in Patent Document 1 below. In the technology disclosed in Patent Document 1, both effective pixels that capture an image of a subject and phase difference detection pixels that detect the above-mentioned phase difference are separately provided on the light receiving surface. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-292685 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the technology disclosed in Patent Document 1, when acquiring a captured image of a subject, it is difficult to use information obtained from the phase difference detection pixels as the same information as information from the imaging pixels. Therefore, information from effective pixels surrounding the phase difference detection pixels is used to interpolate images of pixels corresponding to the phase difference detection pixels to generate a captured image. That is, in the technology disclosed in Patent Document 1, since phase difference detection pixels are provided to detect the phase difference, it is difficult to avoid degradation of the captured image due to loss of information of the captured image corresponding to the phase difference detection pixels.

[0005] Therefore, the present disclosure proposes an imaging device and electronic device that can improve the accuracy of phase difference detection while avoiding degradation of captured images. [Means for solving the problem]

[0006] According to the present disclosure, there is provided an imaging device comprising: a semiconductor substrate; and a plurality of imaging elements arranged in a matrix along row and column directions on the semiconductor substrate, the imaging elements performing photoelectric conversion on incident light, wherein each of the plurality of imaging elements is provided adjacent to one another in the semiconductor substrate, and includes a plurality of pixels containing impurities of a first conductivity type, an element isolation wall surrounding the plurality of pixels and provided so as to penetrate the semiconductor substrate, an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels, and a first isolation portion provided in a region surrounded by the element isolation wall and isolating the plurality of pixels, the first isolation portion being provided so as to extend in a thickness direction of the semiconductor substrate, and the first isolation portion including a first region in contact with the element isolation wall and a second region in contact with the first region when viewed from above the light-receiving surface, the second region having a width greater than that of the first region.

[0007] The present disclosure also provides an imaging device including a semiconductor substrate and a plurality of imaging elements arranged in a matrix along row and column directions on the semiconductor substrate and performing photoelectric conversion on incident light, wherein each of the plurality of imaging elements is provided adjacent to one another in the semiconductor substrate and includes a plurality of pixels containing impurities of a first conductivity type, a pixel isolation wall separating the plurality of pixels, and an on-chip lens provided above a light-receiving surface of the semiconductor substrate to be shared by the plurality of pixels, wherein the pixel isolation wall is provided so as to extend from the light-receiving surface to partway through the semiconductor substrate in a thickness direction of the semiconductor substrate, and a region located on the opposite side of the light-receiving surface with respect to the pixel isolation wall in the thickness direction of the semiconductor substrate contains impurities of a second conductivity type having a conductivity type opposite to the first conductivity type.

[0008] Furthermore, according to the present disclosure, there is provided an electronic device comprising: an imaging device including a semiconductor substrate; and a plurality of imaging elements arranged in a matrix on the semiconductor substrate along row and column directions, the imaging elements performing photoelectric conversion on incident light, wherein each of the plurality of imaging elements is provided adjacent to one another in the semiconductor substrate, and includes a plurality of pixels containing impurities of a first conductivity type, an element isolation wall surrounding the plurality of pixels and provided so as to penetrate the semiconductor substrate, an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels, and a first isolation portion provided in a region surrounded by the element isolation wall and isolating the plurality of pixels, the first isolation portion being provided so as to extend in a thickness direction of the semiconductor substrate, and the first isolation portion including a first region in contact with the element isolation wall and a second region in contact with the first region when viewed from above the light-receiving surface, the second region having a width greater than that of the first region. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is an explanatory diagram showing an example of the planar configuration of an imaging device 1 according to an embodiment of the present disclosure. [Figure 2] 1 is an explanatory diagram (part 1) showing a part of a cross section of an imaging element 100 according to a first embodiment of the present disclosure. [Figure 3] FIG. 2 is an explanatory diagram (part 2) showing a part of a cross section of the image sensor 100 according to the first embodiment of the present disclosure. [Figure 4] 1 is an explanatory diagram showing a plane of an image sensor 100 according to a first embodiment of the present disclosure. [Figure 5] 1 is a transparent perspective view of an imaging element 100 according to a first embodiment of the present disclosure. [Figure 6] 3 is an explanatory diagram showing a configuration example of a light blocking unit 204 according to the first embodiment of the present disclosure. FIG. [Figure 7] FIG. 10 is an explanatory diagram showing a configuration example of a light blocking section 204 according to a modified example of the first embodiment of the present disclosure. [Figure 8] FIG. 10 is an explanatory diagram showing a plane of an image sensor 100 according to a second embodiment of the present disclosure. [Figure 9]FIG. 10 is an explanatory diagram showing a plane of an image sensor 100 according to a third embodiment of the present disclosure. [Figure 10] FIG. 10 is an explanatory diagram (part 1) showing a plane of an image sensor 100 according to a fourth embodiment of the present disclosure. [Figure 11] FIG. 10 is a second explanatory diagram showing a plan view of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 12] FIG. 10 is a third explanatory diagram showing a plane of the image sensor 100 according to the fourth embodiment of the present disclosure. [Figure 13] FIG. 10 is an explanatory diagram showing a plane of an image sensor 100 according to a fifth embodiment of the present disclosure. [Figure 14] FIG. 10 is an explanatory diagram showing a plane of an image sensor 100 according to a sixth embodiment of the present disclosure. [Figure 15] FIG. 12 is an explanatory diagram showing a plane of an image sensor 100 according to a seventh embodiment of the present disclosure. [Figure 16] FIG. 13 is an explanatory diagram showing a configuration example of a light blocking unit 204 according to a seventh embodiment of the present disclosure. [Figure 17] FIG. 13 is an explanatory diagram (part 1) showing a part of a cross section of an image sensor 100 according to an eighth embodiment of the present disclosure. [Figure 18] FIG. 13 is an explanatory diagram (part 1) showing a plane of an image sensor 100 according to an eighth embodiment of the present disclosure. [Figure 19] FIG. 22 is an explanatory diagram (part 2) showing a plane of the image sensor 100 according to the eighth embodiment of the present disclosure. [Figure 20] FIG. 20 is an explanatory diagram (part 2) showing a part of a cross section of the image sensor 100 according to the eighth embodiment of the present disclosure. [Figure 21] FIG. 20 is an explanatory diagram (part 3) showing a part of a cross section of the image sensor 100 for each color according to the eighth embodiment of the present disclosure. [Figure 22] FIG. 20 is a third explanatory diagram showing a plane of the image sensor 100 according to the eighth embodiment of the present disclosure. [Figure 23] FIG. 13 is an explanatory diagram (part 4) showing a part of a cross section of the image sensor 100 according to the eighth embodiment of the present disclosure. [Figure 24]FIG. 20 is a fourth explanatory diagram showing a plane of the image sensor 100 according to the eighth embodiment of the present disclosure. [Figure 25] FIG. 13 is a fifth explanatory diagram illustrating a portion of a cross section of the image sensor 100 according to the eighth embodiment of the present disclosure. [Figure 26] 13A to 13C are process cross-sectional views for explaining a part of the manufacturing process of the image sensor 100 according to the eighth embodiment of the present disclosure. [Figure 27] FIG. 13 is an explanatory diagram showing a plane of an image sensor 100 according to a ninth embodiment of the present disclosure. [Figure 28] FIG. 13 is an explanatory diagram (part 1) showing a part of a cross section of an image sensor 100 according to a ninth embodiment of the present disclosure. [Figure 29] FIG. 13 is an explanatory diagram showing a part of a cross section of an image sensor 100 according to a comparative example of the ninth embodiment of the present disclosure. [Figure 30] FIG. 22 is an explanatory diagram (part 2) showing a part of a cross section of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 31] FIG. 13 is an explanatory diagram (part 3) showing a part of a cross section of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 32] FIG. 13 is an explanatory diagram (part 4) showing a part of a cross section of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 33] FIG. 13 is a fifth explanatory diagram illustrating a portion of a cross section of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 34] FIG. 13 is a sixth explanatory diagram illustrating a portion of a cross section of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 35] FIG. 13 is an explanatory diagram (part 7) showing a part of a cross section of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 36] FIG. 22 is an explanatory diagram (part 2) showing a plane of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 37] 13A to 13C are process cross-sectional views (part 1) for explaining part of a manufacturing process of the imaging device 1 according to the ninth embodiment of the present disclosure. [Figure 38]13A to 13C are process cross-sectional views (part 2) for explaining part of the manufacturing process of the imaging device 1 according to the ninth embodiment of the present disclosure. [Figure 39] FIG. 22 is an explanatory diagram (part 1) showing a plane of an image sensor 100 according to a tenth embodiment of the present disclosure. [Figure 40] FIG. 20 is an explanatory diagram showing a part of a cross section of an imaging element 100 according to a tenth embodiment of the present disclosure. [Figure 41] FIG. 23 is an explanatory diagram showing a part of a cross section of an image sensor 100 according to a comparative example of the tenth embodiment of the present disclosure. [Figure 42] 22 is a graph showing the relationship between the slit width and the protrusion width according to the tenth embodiment of the present disclosure. [Figure 43] 13A to 13C are process cross-sectional views (part 1) for explaining part of the manufacturing process of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 44] 13A to 13C are process cross-sectional views (part 2) for explaining part of the manufacturing process of the image sensor 100 according to the ninth embodiment of the present disclosure. [Figure 45] FIG. 22 is a second explanatory diagram showing a plane of the image sensor 100 according to the tenth embodiment of the present disclosure. [Figure 46] FIG. 22 is a third explanatory diagram showing a plane of the image sensor 100 according to the tenth embodiment of the present disclosure. [Figure 47] FIG. 22 is a fourth explanatory diagram showing a plane of the image sensor 100 according to the tenth embodiment of the present disclosure. [Figure 48] FIG. 22 is a fifth explanatory diagram showing a plane of the image sensor 100 according to the tenth embodiment of the present disclosure. [Figure 49] FIG. 22 is a sixth explanatory diagram showing a plane of the image sensor 100 according to the tenth embodiment of the present disclosure. [Figure 50] FIG. 22 is a seventh explanatory diagram showing a plane of the image sensor 100 according to the tenth embodiment of the present disclosure. [Figure 51] FIG. 22 is an explanatory diagram (part 1) showing a plane of an image sensor 100 according to an eleventh embodiment of the present disclosure. [Figure 52] FIG. 23 is an explanatory diagram showing a plane of the image sensor 100 according to a comparative example of the eleventh embodiment of the present disclosure. [Figure 53] 22A to 22D are process cross-sectional views for explaining a part of the manufacturing process of the image sensor 100 according to the eleventh embodiment of the present disclosure. [Figure 54] FIG. 22 is a second explanatory diagram showing a plane of the image sensor 100 according to the eleventh embodiment of the present disclosure. [Figure 55] FIG. 23 is a third explanatory diagram showing a plane of the image sensor 100 according to the eleventh embodiment of the present disclosure. [Figure 56] FIG. 22 is a fourth explanatory diagram showing a plane of the image sensor 100 according to the eleventh embodiment of the present disclosure. [Figure 57] FIG. 22 is a fifth explanatory diagram showing a plane of the image sensor 100 according to the eleventh embodiment of the present disclosure. [Figure 58] FIG. 23 is an explanatory diagram (part 1) showing a plane of an image sensor 100 according to a twelfth embodiment of the present disclosure. [Figure 59] 12A and 12B are explanatory diagrams (part 1) showing both surfaces and a cross section of an image sensor 100 according to a twelfth embodiment of the present disclosure. [Figure 60] FIG. 23 is an explanatory diagram showing the relationship between the slit width and the light-collecting characteristics and pixel characteristics of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 61] FIG. 22 is an explanatory diagram (part 2) showing both surfaces and a cross section of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 62] FIG. 23 is an explanatory diagram (part 3) showing a cross section of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 63] FIG. 23 is a fourth explanatory diagram showing a cross section of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 64] FIG. 26 is a fifth explanatory diagram showing a cross section of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 65] 12A and 12B are explanatory diagrams (part 6) showing both surfaces and a cross section of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 66] FIG. 23 is an explanatory diagram (part 7) showing a cross section of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 67]FIG. 23 is an explanatory diagram (part 8) showing both surfaces of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 68] FIG. 9 is an explanatory diagram (part 9) showing both surfaces and a cross section of an image sensor 100 according to a twelfth embodiment of the present disclosure. [Figure 69] FIG. 10 is a tenth explanatory diagram showing both surfaces and a cross section of an image sensor 100 according to a twelfth embodiment of the present disclosure. [Figure 70] FIG. 11 is an explanatory diagram (part 11) showing both surfaces of an imaging element 100 according to a twelfth embodiment of the present disclosure. [Figure 71] FIG. 12 is a twelfth explanatory diagram showing both surfaces of an image sensor 100 according to a twelfth embodiment of the present disclosure. [Figure 72] 23A to 23C are process cross-sectional views for explaining a part of the manufacturing process of the image sensor 100 according to the twelfth embodiment of the present disclosure. [Figure 73] FIG. 23 is an explanatory diagram (part 1) showing a plane of an image sensor 100 according to a thirteenth embodiment of the present disclosure. [Figure 74] FIG. 23 is an explanatory diagram showing a plane of the image sensor 100 according to a comparative example of the thirteenth embodiment of the present disclosure. [Figure 75] FIG. 23 is a second explanatory diagram showing a plane of the image sensor 100 according to the thirteenth embodiment of the present disclosure. [Figure 76] FIG. 23 is a third explanatory diagram showing a plane of the image sensor 100 according to the thirteenth embodiment of the present disclosure. [Figure 77] FIG. 23 is a fourth explanatory diagram showing a plane of the image sensor 100 according to the thirteenth embodiment of the present disclosure. [Figure 78] FIG. 26 is a fifth explanatory diagram showing a plane of the image sensor 100 according to the thirteenth embodiment of the present disclosure. [Figure 79] FIG. 10 is an explanatory diagram (part 1) showing a plane view of an image sensor 100 according to another embodiment of the present disclosure. [Figure 80] 10A to 10C are explanatory diagrams (part 1) illustrating a portion of a cross section of an imaging element 100 for each structure according to another embodiment of the present disclosure. [Figure 81] 10 is an explanatory diagram (part 2) showing a plane of an image sensor 100 according to another embodiment of the present disclosure. FIG. [Figure 82] 10A and 10B are explanatory diagrams showing a part of a cross section of the image sensor 100 for each structure according to another embodiment of the present disclosure (part 2). [Figure 83] 10 is an explanatory diagram (part 3) showing a plane of an image sensor 100 according to another embodiment of the present disclosure. FIG. [Figure 84] 10 is an explanatory diagram (part 4) showing a plane of an image pickup element 100 according to another embodiment of the present disclosure. FIG. [Figure 85] 1 is an explanatory diagram showing a cross section of a two-layer laminated structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied. [Figure 86] 1 is an explanatory diagram showing a cross section of a three-layer laminated structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied. [Figure 87] 1 is an explanatory diagram showing a cross section of a two-stage pixel structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied. [Figure 88] 1 is an explanatory diagram showing a plane of an image sensor 100 according to an embodiment of the present disclosure. [Figure 89] 1 is an explanatory diagram showing a plane of a plurality of image sensors 100 according to an embodiment of the present disclosure. [Figure 90] FIG. 2 is an explanatory diagram showing an example of a schematic functional configuration of a camera. [Figure 91] FIG. 1 is a block diagram illustrating an example of a schematic functional configuration of a smartphone. [Figure 92] FIG. 1 is a diagram illustrating an example of a schematic configuration of an endoscopic surgery system. [Figure 93] FIG. 2 is a block diagram showing an example of the functional configuration of a camera head and a CCU. [Figure 94] 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; [Figure 95] FIG. 2 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following embodiments, the same components are designated by the same reference numerals, and redundant description will be omitted.

[0011] Furthermore, in this specification and drawings, multiple components having substantially the same or similar functional configurations may be distinguished by adding different numbers after the same reference numeral. However, if there is no need to particularly distinguish between multiple components having substantially the same or similar functional configurations, only the same reference numeral will be used. Furthermore, similar components in different embodiments may be distinguished by adding different letters after the same reference numeral. However, if there is no need to particularly distinguish between similar components, only the same reference numeral will be used.

[0012] Furthermore, the drawings referenced in the following description are intended to facilitate the description and understanding of one embodiment of the present disclosure, and for clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual shapes, dimensions, ratios, etc. Furthermore, the design of the imaging device shown in the drawings may be modified as appropriate, taking into consideration the following description and known technologies. Furthermore, in descriptions using cross-sectional views of the imaging device, the vertical direction of the stacked structure of the imaging device corresponds to the relative direction when the light-receiving surface from which incident light enters the imaging device is positioned at the top, and may differ from the vertical direction according to the actual gravitational acceleration.

[0013] The dimensions expressed in the following description not only refer to dimensions defined mathematically or geometrically, but also include dimensions that include tolerances for differences (errors and distortions) in the operation and manufacturing process of the imaging device. Furthermore, the term "substantially the same" used in the following description for specific dimensions does not only mean perfect mathematical or geometric agreement, but also includes tolerances for differences (errors and distortions) in the operation and manufacturing process of the imaging device.

[0014] Furthermore, in the following description, "electrically connected" means connecting a plurality of elements directly or indirectly via another element.

[0015] In the following description, "sharing" means that different elements (such as pixels) share one other element (such as an on-chip lens).

[0016] The explanation will be given in the following order. 1. Overview of the imaging device 2. Background of how the inventors created the embodiments of the present disclosure 3. First Embodiment 3.1 Cross-sectional configuration 3.2 Planar configuration 3.3 Variations 4. Second Embodiment 5. Third Embodiment 6. Fourth Embodiment 7. Fifth Embodiment 8. Sixth Embodiment 9. Seventh Embodiment 10. Eighth Embodiment 11. Ninth Embodiment 12. Tenth Embodiment 13. Eleventh Embodiment 14. Twelfth Embodiment 15. Thirteenth Embodiment 16. Summary 17. Camera application example 18. Smartphone application examples 19. Application example to endoscopic surgery system 20. Mobile Applications 21. Supplementary Information

[0017] <<1. General configuration of the imaging device>> First, a schematic configuration of an imaging device 1 according to an embodiment of the present disclosure will be described with reference to FIG. 1. FIG. 1 is an explanatory diagram showing an example of the planar configuration of the imaging device 1 according to an embodiment of the present disclosure. As shown in FIG. 1, the imaging device 1 according to an embodiment of the present disclosure includes a pixel array section 20 in which a plurality of imaging elements 100 are arranged in a matrix on a semiconductor substrate 10 made of, for example, silicon, and a peripheral circuit section provided to surround the pixel array section 20. Furthermore, the imaging device 1 includes, as the peripheral circuit section, a vertical drive circuit section 21, a column signal processing circuit section 22, a horizontal drive circuit section 23, an output circuit section 24, a control circuit section 25, and the like. Each block of the imaging device 1 will be described in detail below.

[0018] (Pixel array section 20) The pixel array unit 20 has a plurality of image sensors 100 arranged two-dimensionally in a matrix along the row and column directions on the semiconductor substrate 10. Each image sensor 100 is an element that performs photoelectric conversion on incident light, and has a photoelectric conversion unit (not shown) and a plurality of pixel transistors (e.g., MOS (Metal-Oxide-Semiconductor) transistors) (not shown). The pixel transistors include, for example, four MOS transistors: a transfer transistor, a selection transistor, a reset transistor, and an amplification transistor. Furthermore, in the pixel array unit 20, the plurality of image sensors 100 are arranged two-dimensionally, for example, according to a Bayer array. Here, the Bayer array is an arrangement pattern in which image pickup elements 100 that absorb light having a green wavelength (for example, wavelengths of 495 nm to 570 nm) and generate electric charges are arranged in a checkerboard pattern, and in the remaining portion, image pickup elements 100 that absorb light having a red wavelength (for example, wavelengths of 620 nm to 750 nm) and image pickup elements 100 that absorb light having a blue wavelength (for example, wavelengths of 450 nm to 495 nm) and generate electric charges are arranged alternately in each row. The detailed structure of the image pickup element 100 will be described later.

[0019] (vertical drive circuit section 21) The vertical drive circuit unit 21 is formed of, for example, a shift register, selects pixel drive wirings 26, supplies pulses for driving the image sensor 100 to the selected pixel drive wirings 26, and drives the image sensor 100 row by row. That is, the vertical drive circuit unit 21 selects and scans each image sensor 100 in the pixel array unit 20 row by row in the vertical direction (up and down in FIG. 1), and supplies pixel signals based on signal charges generated in accordance with the amount of light received by a photoelectric conversion unit (not shown) of each image sensor 100 to a column signal processing circuit unit 22 (described later) via vertical signal lines 27.

[0020] (Column signal processing circuit unit 22) The column signal processing circuit unit 22 is arranged for each column of the image sensor 100, and performs signal processing such as noise removal for each pixel column on pixel signals output from one row of the image sensor 100. For example, the column signal processing circuit unit 22 performs signal processing such as CDS (Correlated Double Sampling) and AD (Analog-Digital) conversion in order to remove fixed pattern noise specific to each pixel.

[0021] (horizontal drive circuit section 23) The horizontal drive circuit unit 23 is formed, for example, by a shift register, and by sequentially outputting horizontal scanning pulses, selects each of the above-mentioned column signal processing circuit units 22 in turn and causes each column signal processing circuit unit 22 to output a pixel signal to the horizontal signal line 28.

[0022] (output circuit section 24) The output circuit unit 24 processes and outputs pixel signals sequentially supplied from each of the column signal processing circuits 22 via the horizontal signal line 28. The output circuit unit 24 may function as a functional unit that performs buffering, or may perform processes such as black level adjustment, column variation correction, and various digital signal processing. Buffering refers to temporarily storing pixel signals to compensate for differences in processing speed and transfer speed when exchanging pixel signals. Furthermore, the input / output terminal 29 is a terminal for exchanging signals with an external device.

[0023] (Control circuit section 25) The control circuit unit 25 receives an input clock and data instructing the operation mode and the like, and outputs data such as internal information of the imaging device 1. That is, based on a vertical synchronization signal, a horizontal synchronization signal, and a master clock, the control circuit unit 25 generates clock signals and control signals that serve as references for the operations of the vertical drive circuit unit 21, the column signal processing circuit unit 22, the horizontal drive circuit unit 23, etc. Then, the control circuit unit 25 outputs the generated clock signals and control signals to the vertical drive circuit unit 21, the column signal processing circuit unit 22, the horizontal drive circuit unit 23, etc.

[0024] <<2. Background that led the inventors to create the embodiments according to the present disclosure>> Next, before describing the details of the embodiments of the present disclosure, the background that led the inventors to create the embodiments of the present disclosure will be described.

[0025] Meanwhile, the present inventors have been actively studying providing phase difference detection pixels over the entire surface of the pixel array unit 20 of the imaging device 1 (all-pixel phase difference detection) in order to further improve the autofocus function while avoiding degradation of the captured image, that is, to improve the accuracy of phase difference detection. Under these circumstances, it was considered to provide, over the entire surface of the pixel array unit 20, an imaging element that functions as a single imaging element during imaging and as a pair of phase difference detection pixels during phase difference detection (dual photodiode structure). In such all-pixel phase difference detection, since phase difference detection pixels are provided over the entire surface, the accuracy of phase difference detection can be improved, and further, since imaging can be performed using all imaging elements, degradation of the captured image can be avoided.

[0026] Furthermore, the inventors have conceived the idea of ​​providing an element that physically and electrically separates phase difference detection pixels to prevent the outputs of a pair of phase difference detection pixels from mixing during phase difference detection in order to improve the accuracy of phase difference detection in all-pixel phase difference detection. Additionally, the inventors have conceived the idea of ​​providing an overflow path between a pair of phase difference detection pixels to prevent degradation of the captured image in all-pixel phase difference detection. Specifically, when the charge of one of the phase difference detection pixels approaches saturation during normal imaging, the charge can be transferred to the other pixel via the overflow path to prevent saturation of the one pixel. Furthermore, providing such an overflow path ensures the linearity of the pixel signal output from the imaging element and prevents degradation of the captured image.

[0027] That is, based on the above-mentioned viewpoint, the inventors have come up with an embodiment according to the present disclosure that makes it possible to improve the accuracy of phase difference detection while avoiding degradation of captured images. Details of the embodiment according to the present disclosure created by the inventors will be described below.

[0028] <<3. First Embodiment>> <3.1 Cross-sectional configuration> First, a cross-sectional configuration of the image sensor 100 according to the first embodiment of the present disclosure will be described with reference to Fig. 2 and Fig. 3. Fig. 2 and Fig. 3 are explanatory diagrams showing a part of a cross section of the image sensor 100 according to this embodiment, and more specifically, correspond to cross sections of the image sensor 100 cut at different positions along the thickness direction of the semiconductor substrate 10.

[0029] 2 and 3, the image sensor 100 according to this embodiment includes an on-chip lens 200, a color filter 202, a light-shielding portion (light-shielding film) 204, a semiconductor substrate 10, and transfer gates 400a and 400b, similar to the comparative example. Furthermore, in this embodiment, the semiconductor substrate 10 includes a pair of pixels 300a and 300b, each of which includes a photoelectric conversion portion 302. The semiconductor substrate 10 also includes a protrusion (an example of a first isolation portion) 304 that isolates the pair of pixels 300a and 300b, an element isolation wall 310 that surrounds the pixels 300a and 300b, and a diffusion region 306 provided around the protrusion 304 and the element isolation wall 310. The stacked structure of the image sensor 100 according to this embodiment will be described below, starting from the top (the light-receiving surface 10a side) to the bottom in FIGS. 2 and 3. Note that Figure 2 corresponds to a cross section of the imaging element 100 cut at a position that cuts the above-mentioned protrusion 304, and Figure 3 corresponds to a cross section of the imaging element 100 cut at a position that cuts the area between the opposing protrusions 304 (slit 312, see Figure 4).

[0030] 2 and 3, the image sensor 100 has one on-chip lens 200 that is provided above the light-receiving surface 10a of the semiconductor substrate 10 and focuses incident light onto a photoelectric conversion unit 302. The image sensor 100 has a structure in which one on-chip lens 200 is provided with a pair of pixels 300a, 300b. In other words, the on-chip lens 200 is shared by the two pixels 300a, 300b. The on-chip lens 200 can be formed from, for example, a silicon nitride film (SiN) or a resin material such as a styrene-based resin, an acrylic-based resin, a styrene-acrylic copolymer resin, or a siloxane-based resin.

[0031] The incident light collected by the on-chip lens 200 is irradiated onto each of the photoelectric conversion units 302 of the pair of pixels 300a and 300b via a color filter 202 provided below the on-chip lens 200. The color filter 202 is any one of a color filter that transmits a red wavelength component, a color filter that transmits a green wavelength component, and a color filter that transmits a blue wavelength component. For example, the color filter 202 can be formed from a material in which a pigment or a dye is dispersed in a transparent binder such as silicone.

[0032] Furthermore, a light-shielding portion 204 is provided on the light-receiving surface 10a of the semiconductor substrate 10 so as to surround the color filter 202. By providing the light-shielding portion 204 between adjacent image sensors 100, it is possible to suppress crosstalk between the adjacent image sensors 100 and to provide light shielding between the image sensors 100 in order to further improve the accuracy of phase difference detection. The light-shielding portion 204 can be formed from a metal material containing, for example, tungsten (W), aluminum (Al), copper (Cu), titanium (Ti), molybdenum (Mo), nickel (Ni), or the like.

[0033] Furthermore, for example, a photoelectric conversion unit 302 having a first conductivity type (e.g., N type) impurity is provided in each of the adjacent pixels 300a and 300b in a semiconductor substrate 10 of a second conductivity type (e.g., P type). As described above, the photoelectric conversion unit 302 absorbs light L having a red wavelength component, a green wavelength component, or a blue wavelength component that is incident through the color filter 202 to generate electric charges. In this embodiment, the photoelectric conversion unit 302 of the pixel 300a and the photoelectric conversion unit 302 of the pixel 300b can function as a pair of phase difference detection pixels during phase difference detection. That is, in this embodiment, the phase difference can be detected by detecting the difference between pixel signals based on the electric charges generated by the photoelectric conversion unit 302 of the pixel 300a and the photoelectric conversion unit 302 of the pixel 300b.

[0034] Specifically, the amount of charge generated by the photoelectric conversion unit 302, i.e., its sensitivity, varies depending on the angle of incidence of light relative to its optical axis (the axis perpendicular to the light-receiving surface). For example, the photoelectric conversion unit 302 has the highest sensitivity when the angle of incidence is 0 degrees. Furthermore, the sensitivity of the photoelectric conversion unit 302 is symmetrical with respect to the angle of incidence, with the angle of incidence being 0 degrees. Therefore, light is incident from the same point at different angles of incidence on the photoelectric conversion unit 302 of pixel 300a and the photoelectric conversion unit 302 of pixel 300b, and each generates an amount of charge according to the angle of incidence, resulting in a shift (phase difference) in the detected images. In other words, the phase difference can be detected by detecting the difference in pixel signals based on the amount of charge generated by the photoelectric conversion unit 302 of pixel 300a and the photoelectric conversion unit 302 of pixel 300b. Therefore, such a difference (phase difference) between the pixel signals is detected as a differential signal, for example, in a detection unit (not shown) of the output circuit unit 24, and the defocus amount is calculated based on the detected phase difference, and the imaging lens (not shown) is adjusted (moved), thereby achieving autofocus. Note that in the above description, the phase difference is detected as the difference between the pixel signals of the photoelectric conversion unit 302 of pixel 300a and the photoelectric conversion unit 302 of pixel 300b, but this is not limited to this in the present embodiment, and the phase difference may be detected as the ratio between the pixel signals of the photoelectric conversion unit 302 of pixel 300a and the photoelectric conversion unit 302 of pixel 300b, for example.

[0035] Furthermore, in this embodiment, the two photoelectric conversion units 302 are physically separated by a protrusion 304. The protrusion 304 is formed as a through-hole DTI (Deep Trench Isolation) by a groove (trench) (not shown) that penetrates the semiconductor substrate 10 in the thickness direction of the semiconductor substrate 10, and is made of a material filled in the trench, such as a silicon dioxide (SiO), silicon nitride, amorphous silicon, polycrystalline silicon, titanium dioxide (TiO), aluminum, or tungsten oxide or metal film. In the image sensor 100, if pixel signals output from the pair of pixels 300a and 300b are mixed together during phase difference detection, causing color mixing, the accuracy of phase difference detection will deteriorate. In this embodiment, the protrusion 304 penetrates the semiconductor substrate 10, and therefore can effectively physically separate the pair of pixels 300a and 300b. As a result, color mixing can be suppressed and the accuracy of phase difference detection can be further improved.

[0036] Furthermore, when the image sensor 100 is viewed from the light receiving surface 10a side, a slit 312 (see FIG. 4 ) corresponding to the space between the two protrusions 304 is provided near the center of the image sensor 100. Furthermore, in a region of the slit 312 (an example of a region located around the protrusion 304 and extending in the thickness direction of the semiconductor substrate 10) in the semiconductor substrate 10, impurities of a second conductivity type (e.g., P type) are diffused via the protrusion 304 by conformal doping, thereby forming a diffusion region 306 (an example of a first diffusion region) (more specifically, as described below, the diffusion region 306 is also formed around the element isolation wall 310). The diffusion region 306 electrically isolates the pair of pixels 300a and 300b to further improve the accuracy of phase difference detection and can prevent color mixing. Furthermore, in this embodiment, since the protrusion 304 penetrates the semiconductor substrate 10, the diffusion region 306 can be formed deep within the semiconductor substrate 10 (here, "depth" refers to the distance from the back surface 10a and the front surface 10b of the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10) by conformal doping via the protrusion 304. Therefore, in this embodiment, the desired diffusion region 306 can be formed with high precision, and the pair of pixels 300a, 300b can be effectively electrically isolated, thereby suppressing color mixing and further improving the precision of phase difference detection. The region of the slit 312 will be described in detail later.

[0037] Furthermore, in this embodiment, as shown in FIG. 3 , a diffusion region 320 is formed below (on the surface 10b side of) the diffusion region 306 provided in the slit 312 by introducing impurities of a first conductivity type (e.g., N-type) by ion implantation. Specifically, the diffusion region 320 is formed by ion implanting impurities of the first conductivity type into a lower region of the diffusion region 306 described above, thereby forming holes in the diffusion region 306. The diffusion region 320 functions as an overflow path that can transfer generated charges between the pixels 300a and 300b. Specifically, during normal imaging, when the charge of one of the pixels 300a and 300b approaches saturation, the charge is transferred to the other pixel via the overflow path, thereby preventing saturation of the other pixel. Providing such an overflow path ensures the linearity of the pixel signal output from the image sensor 100 and prevents degradation of the captured image. Furthermore, in this embodiment, instead of forming the diffusion region 320 by ion implantation, a gate (not shown) may be provided between the transfer gates 400a, 400b on the surface 10b of the semiconductor substrate 10. In this case, by adjusting the voltage applied to the gate, the pair of pixels 300a, 300b may be electrically isolated from each other during phase difference detection, and a channel serving as an overflow path may be formed in the region of the slit 312 on the surface 10b side during normal imaging.

[0038] In this embodiment, an element isolation wall 310 is provided in the semiconductor substrate 10, surrounding the pixels 300a and 300b and physically separating adjacent image sensors 100. The element isolation wall 310 is formed by a groove (trench) (not shown) that penetrates the semiconductor substrate 10 in the thickness direction of the semiconductor substrate 10 and a material filled in the trench, such as an oxide film or a metal film made of silicon oxide, silicon nitride, amorphous silicon, polycrystalline silicon, titanium oxide, aluminum, or tungsten. In other words, the protrusion 304 and the element isolation wall 310 may be formed from the same material. Note that in this embodiment, the element isolation wall 310 and the protrusion 304 have similar configurations, and therefore can be formed as an integrated structure. As a result, according to this embodiment, the protrusion 304 can be formed simultaneously with the element isolation wall 310, thereby minimizing the number of process steps required for the image sensor 100.

[0039] Furthermore, in this embodiment, the charges generated in the photoelectric conversion units 302 of the pixels 300a and 300b are transferred via transfer gates 400a and 400b of transfer transistors (one type of pixel transistor) provided on the surface 10b opposite the light-receiving surface 10a of the semiconductor substrate 10. The transfer gates 400a and 400b can be formed, for example, from a metal film. The charges may then be accumulated, for example, in a floating diffusion (charge accumulation unit) (not shown) provided in a semiconductor region having a first conductivity type (e.g., N-type) provided in the semiconductor substrate 10. Note that, in this embodiment, the floating diffusion is not limited to being provided in the semiconductor substrate 10 and may be provided, for example, in another substrate (not shown) stacked on the semiconductor substrate 10.

[0040] Furthermore, a plurality of pixel transistors (not shown) other than the transfer transistors described above, which are used for reading out charges as pixel signals, etc., may be provided on the surface 10b of the semiconductor substrate 10. Furthermore, in this embodiment, the pixel transistors may be provided on the semiconductor substrate 10, or may be provided on another substrate (not shown) stacked on the semiconductor substrate 10.

[0041] <3.2 Planar configuration> Next, the planar configuration of the image sensor 100 according to the first embodiment of the present disclosure will be described with reference to Fig. 4. Fig. 4 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 taken along line AA' shown in Fig. 3.

[0042] As shown in FIG. 4 , in this embodiment, adjacent pixels 300a and 300b are separated by a protrusion 304 formed integrally with an element isolation wall 310. More specifically, when the image sensor 100 is viewed from above the light-receiving surface 10a, the element isolation wall 310 has two protrusions (an example of a first isolation portion) 304 that protrude in the column direction toward the center O of the image sensor 100 and face each other. Here, when the image sensor 100 is viewed from the light-receiving surface 10a side, a region between the two protrusions 304 located near the center of the image sensor 100 is referred to as a slit 312. As described above, in the region of the slit 312, impurities of a second conductivity type (e.g., P-type) are diffused through the protrusions 304 by conformal doping, and a diffusion region 306 is formed so as to surround the protrusions 304. As described above, the diffusion region 306 electrically isolates the pair of pixels 300a and 300b to prevent color mixing and thereby improve the accuracy of phase difference detection. Furthermore, in this embodiment, the second conductivity type impurity is diffused through the element isolation wall 310 by conformal doping, and the diffusion region 306 is formed along the element isolation wall 310.

[0043] Furthermore, when the image sensor 100 is viewed from above the light receiving surface 10a, the two protrusions 304 are provided at the center of the image sensor 100 in the row direction, and their protruding lengths (lengths in the column direction) are approximately the same. As described above, the two protrusions 304 are provided so as to penetrate the semiconductor substrate 10. Note that in this embodiment, the width of the protrusions 304 is not particularly limited as long as it can separate the pair of pixels 300a and 300b.

[0044] Furthermore, the protrusion 304 and element isolation wall 310 according to this embodiment described above have a configuration as shown in Fig. 5, which is a transparent perspective view of the image sensor 100 according to this embodiment. That is, the protrusion 304 and element isolation wall 310 according to this embodiment are provided so as to penetrate the semiconductor substrate 10. Furthermore, a slit 312 is provided between the two protrusions 304 near the center of the image sensor 100.

[0045] As described above, in this embodiment, the slit 312 is located near the center O of the image sensor 100, which reduces scattering of light caused by the protrusion 304. Therefore, according to this embodiment, light incident on the center O of the image sensor 100 can enter the photoelectric conversion unit 302 without being scattered. As a result, according to this embodiment, the image sensor 100 can more reliably capture light incident on the center O of the image sensor 100, thereby preventing degradation of the image pixels.

[0046] Furthermore, in this embodiment, as described above, for example, impurities of the first conductivity type can be introduced by ion implantation into the region on the surface 10b side of the slit 312, thereby forming a channel that serves as an overflow path. Therefore, according to this embodiment, the pair of pixels 300a, 300b can be separated during phase difference detection while an overflow path can be formed during normal imaging, thereby improving the accuracy of phase difference detection and preventing degradation of captured images.

[0047] Furthermore, in this embodiment, the diffusion region 306 can be formed by introducing impurities into the region of the slit 312 through the protrusion 304 using conformal doping, thereby avoiding the use of ion implantation. Therefore, according to this embodiment, since ion implantation is not used, the introduction of impurities into the photoelectric conversion unit 302 can be avoided, and shrinkage or damage to the photoelectric conversion unit 302 can be avoided. Furthermore, by using conformal doping, crystal defects can be repaired while applying high temperatures to uniformly diffuse the impurities. As a result, according to this embodiment, it is possible to suppress a decrease in sensitivity and a narrowing of the dynamic range of the image sensor 100.

[0048] In this embodiment, the element isolation wall 310 may have two protruding portions (an example of a first isolation portion) 304 that protrude in the row direction toward the center O of the image sensor 100 when the image sensor 100 is viewed from above the light receiving surface 10a and face each other. Furthermore, in this case, the two protruding portions 304 may be provided at the center of the image sensor 100 in the column direction when the image sensor 100 is viewed from above the light receiving surface 10a.

[0049] As described above, according to this embodiment, during phase difference detection, the protrusion 304 physically separating the pair of pixels 300a and 300b, the diffusion region 306 electrically separating the pair of pixels 300a and 300b, and the diffusion region 320 electrically separating the pair of pixels 300a and 300b are provided, thereby improving the accuracy of phase difference detection and preventing degradation of the captured image. Specifically, in this embodiment, the protrusion 304 and the diffusion region 306 effectively separate the pair of pixels 300a and 300b, thereby suppressing color mixing and further improving the accuracy of phase difference detection. Furthermore, since this embodiment includes an overflow path, when the charge of one of the pixels 300a and 300b approaches saturation during normal imaging, the charge is transferred to the other pixel via the overflow path, thereby preventing saturation of the one pixel. Therefore, according to this embodiment, providing such an overflow path ensures the linearity of the pixel signal output from the image sensor 100 and prevents degradation of the captured image.

[0050] Furthermore, in this embodiment, the diffusion region 306 can be formed by diffusing impurities into the region of the slit 312 through the protrusion 304 using conformal doping, thereby avoiding the use of ion implantation. Therefore, according to this embodiment, since ion implantation is not used, the introduction of impurities into the photoelectric conversion unit 302 can be avoided, and shrinkage or damage to the photoelectric conversion unit 302 can be avoided. Furthermore, by using conformal doping, crystal defects can be repaired while applying high temperatures to uniformly diffuse the impurities. As a result, according to this embodiment, it is possible to suppress a decrease in sensitivity and a narrowing of the dynamic range of the image sensor 100.

[0051] Furthermore, in this embodiment, since the protrusion 304 penetrates the semiconductor substrate 10, the diffusion region 306 can be formed in a deep region within the semiconductor substrate 10 by conformal doping via the protrusion 304. Therefore, in this embodiment, the desired diffusion region 306 can be formed with high precision, and the pair of pixels 300a, 300b can be effectively electrically isolated, thereby suppressing color mixing and further improving the accuracy of phase difference detection. Furthermore, according to this embodiment, since the element isolation wall 310 and the protrusion 304 have the same shape, the protrusion 304 can be formed simultaneously with the element isolation wall 310, and an increase in the number of process steps for the image sensor 100 can be suppressed.

[0052] Additionally, in this embodiment, the slit 312 is provided at the center O of the image sensor 100, which suppresses scattering of light by the protrusion 304, and allows light incident on the center O of the image sensor 100 to enter the photoelectric conversion unit 302 without being scattered. As a result, according to this embodiment, the image sensor 100 can more reliably capture light incident on the center O of the image sensor 100, thereby preventing degradation of the imaging pixels.

[0053] <3.3 Modifications> In this embodiment, the light-shielding portion (light-shielding film) 204 can be modified as follows. Therefore, a detailed configuration of the light-shielding portion 204 will be described with reference to FIGS. 6 and 7. FIG. 6 is an explanatory diagram showing an example of the configuration of the light-shielding portion 204 according to this embodiment, and FIG. 7 is an explanatory diagram showing an example of the configuration of the light-shielding portion 204 according to a modified example of this embodiment. Note that in FIGS. 6 and 7, the diagrams shown in the lower rows correspond to a cross section of the image sensor 100 taken along line AA' in FIG. 3, and the diagrams shown in the upper rows correspond to a cross section of the image sensor 100 taken along line BB' in FIG. 3.

[0054] In this embodiment, for example, as shown in FIG. 6, when the imaging element 100 is viewed from above the light receiving surface 10a, the light-shielding portion (light-shielding film) 204 may be provided on and along the element isolation wall 310.

[0055] Furthermore, in a modified example of this embodiment, for example, as shown in FIG. 7, when the imaging element 100 is viewed from above the light receiving surface 10a, the light-shielding portion (light-shielding film) 204 may be provided not only on and along the element isolation wall 310, but also on and along the protrusion 304 (an example of a first isolation portion).

[0056] <<4. Second Embodiment>> In an embodiment of the present disclosure, when the image sensor 100 is viewed from above the light receiving surface 10a, the protruding lengths (lengths in the column direction) of the two protruding portions 304 are not limited to being approximately the same, and may be different from each other. Therefore, a second embodiment of the present disclosure in which the protruding lengths are different from each other will be described with reference to Fig. 8. Fig. 8 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 taken along line AA' shown in Fig. 3.

[0057] 8, in this embodiment, when the image sensor 100 is viewed from above the light receiving surface 10a, the element isolation wall 310 has two protruding portions (examples of first isolation portions) 304 that protrude along the column direction toward the center O (not shown) of the image sensor 100 and face each other. Furthermore, the protruding lengths of the two protruding portions 304 are different from each other.

[0058] In this embodiment, the two protrusions 304 may protrude in the row direction toward the center O (not shown) of the image sensor 100. Furthermore, in this embodiment, the number of protrusions 304 is not limited to two, each of which is provided facing each other, and for example, one protrusion may be provided. In this case, impurities of a second conductivity type (e.g., P type) are diffused by conformal doping through the protrusion 304 and the element isolation wall 310 in the region between the protrusion 304 and the portion of the element isolation wall 310 facing the protrusion 304, thereby forming a diffusion region (an example of a first diffusion region) 306.

[0059] <<5. Third Embodiment>> In the embodiments of the present disclosure, the two protrusions 304 are not limited to being provided at the center of the image sensor 100 in the row direction when the image sensor 100 is viewed from above the light receiving surface 10a, and may be provided at positions offset a predetermined distance from the center of the image sensor 100 in the row direction. Therefore, with reference to Fig. 9, a third embodiment of the present disclosure will be described in which the two protrusions 304 are provided at positions offset a predetermined distance from the center of the image sensor 100 in the row direction. Fig. 9 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 taken along line AA' shown in Fig. 3.

[0060] 9, in this embodiment, as in the first embodiment, the element isolation wall 310 has two protrusions (an example of a first isolation portion) 304 that face each other and protrude along the column direction when the image sensor 100 is viewed from above the light receiving surface 10a. Furthermore, in this embodiment, these protrusions 304 are provided at positions that are shifted a predetermined distance from the center of the image sensor 100 in the row direction. Note that, in this embodiment, the predetermined distance is not particularly limited.

[0061] 9, for example, in the case of two protrusions 304 (an example of a first separation portion) protruding along the row direction, the two protrusions 304 may be provided at positions offset in the column direction by a predetermined distance from the center of the image sensor 100. In addition, this embodiment may be combined with the second embodiment described above, and therefore the protruding lengths of the two protrusions 304 may be different from each other.

[0062] <<6. Fourth Embodiment>> However, if the planar size of the imaging element 100 is large, the protrusion 304 and the diffusion region 306 may not be able to sufficiently separate the pair of pixels 300a and 300b. In such a case, in order to ensure sufficient separation between the pair of pixels 300a and 300b, it is conceivable to further provide an additional wall 308 or the like between the two protrusions 304. Such an embodiment will be described below as a fourth embodiment of the present disclosure with reference to FIGS. 10 to 12. FIGS. 10 to 12 are explanatory diagrams showing a plan view of the imaging element 100 according to this embodiment, and more specifically, correspond to a cross section of the imaging element 100 taken along line AA′ shown in FIG. 3.

[0063] First, as shown in FIG. 10 , in this embodiment, similar to the first embodiment, the element isolation wall 310 has two protruding portions (an example of a first isolation portion) 304 that face each other and protrude along the column direction when the image sensor 100 is viewed from above the light-receiving surface 10a. Furthermore, in this embodiment, a plurality of rectangular additional walls 308 are arranged in a dot pattern between the protruding portions 304 (slits 312). The additional walls 308 are provided so as to penetrate the semiconductor substrate 10, similar to the protruding portions 304. In addition, although not shown in FIG. 10 , a diffusion region 306 is also provided around the additional wall 308, formed by introducing impurities of a second conductivity type (e.g., P-type) by conformal doping via the additional wall 308.

[0064] In this embodiment, a plurality of additional walls 308 are provided between the two protrusions 304 (slits 312), and a diffusion region 306 is also provided around the additional walls 308, thereby ensuring sufficient separation between the pair of pixels 300a, 300b. Furthermore, in this embodiment, the additional walls 308 are provided in a dot pattern, thereby suppressing light scattering by the additional walls 308, and light incident on the center O (not shown) of the image sensor 100 can enter the photoelectric conversion unit 302 without being scattered. As a result, according to this embodiment, the image sensor 100 can more reliably capture light incident on the center O of the image sensor 100, thereby preventing degradation of the image sensor pixels.

[0065] In this embodiment, the cross section of the additional wall 308 is not limited to a rectangular shape as shown in FIG. 10, and the number of additional walls 308 is not limited to two as shown in FIG. 10, but may be one, three, or more.

[0066] 11, in this embodiment, one additional wall 308a is disposed between the two protrusions 304 (slit 312), and this additional wall 308a may be used as a back-side DTI. The back-side DTI is formed by forming a trench that penetrates partway through the semiconductor substrate 10 from the light-receiving surface 10a (back side) side of the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10, and then filling the trench with an oxide film or the like. In this case, a channel that serves as the overflow path is formed by introducing impurities into a region on the front surface 10b side of the additional wall 308a that is not penetrated by the additional wall 308a.

[0067] In this embodiment, the cross section of the additional wall 308a is not limited to a rectangular shape as shown in FIG. 11, and the number of additional walls 308a is not limited to two as shown in FIG. 11, but may be one, three, or more.

[0068] Furthermore, if the planar size of the image sensor 100 is large, it may be impossible to sufficiently separate the pair of pixels 300a, 300b in the diffusion region 306. In such a case, in order to ensure sufficient separation between the pair of pixels 300a, 300b, a diffusion region 306a (an example of a first diffusion region) formed by introducing impurities of a second conductivity type (e.g., P type) by ion implantation may be provided between the two protrusions 304 (slit 312), as shown in FIG.

[0069] <<7. Fifth Embodiment>> Furthermore, in an embodiment of the present disclosure, the protrusion 304 may be formed from a material different from that of the element isolation wall 310. Such an embodiment will be described below as a fifth embodiment of the present disclosure with reference to Fig. 13. Fig. 13 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 taken along line AA' shown in Fig. 3.

[0070] As described above, the protrusion 304 and the element isolation wall 310 are made of a material such as an oxide film or a metal film, such as a silicon oxide film, a silicon nitride film, amorphous silicon, polycrystalline silicon, a titanium oxide film, aluminum, or tungsten. Therefore, in this embodiment, as shown in Fig. 13, the protrusion 304 and the element isolation wall 310 may be made of different materials selected from the above-mentioned materials.

[0071] More specifically, for example, the element isolation wall 310 is formed of a silicon oxide film, and the protrusion 304 is formed of a titanium oxide film with a high refractive index that is small in difference from the refractive index of silicon that forms the semiconductor substrate 10. This suppresses light scattering by the protrusion 304, and light that is incident on the center O (not shown) of the image sensor 100 can enter the photoelectric conversion unit 302 without being scattered. As a result, according to this embodiment, the image sensor 100 can more reliably capture light that is incident on the center O of the image sensor 100, thereby preventing degradation of the image pixel. Note that in this embodiment, the protrusion 304 is not limited to being formed of a titanium oxide film, and may be made of another material as long as it has a small refractive index difference from the material that forms the semiconductor substrate 10.

[0072] <<8. Sixth Embodiment>> Furthermore, the embodiment of the present disclosure is not limited to providing two protrusions 304, and two or more protrusions 304 may be provided. Such an embodiment will be described below as a sixth embodiment of the present disclosure with reference to Fig. 14. Fig. 14 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 taken along line AA' shown in Fig. 3.

[0073] 14 , in this embodiment, when the image sensor 100 is viewed from above the light receiving surface 10a, the element isolation wall 310 has two protruding portions (an example of a first isolation portion) 304 that protrude along the column direction toward the center of the image sensor 100 and face each other, and two protruding portions (an example of a second isolation portion) 324 that protrude along the row direction toward the center of the image sensor 100 and face each other. The four protruding portions 304, 324 are provided so as to penetrate the semiconductor substrate 10.

[0074] 14, in this embodiment, a diffusion region 306 (an example of a first diffusion region, an example of a second diffusion region) can be formed by introducing impurities of a second conductivity type (e.g., P type) between two opposing protrusions 304 (slit 312) and between two opposing protrusions 324 (slit 312) by conformal doping via the protrusions 304, 324. Furthermore, in this embodiment as well, a diffusion region 320 that functions as an overflow path is formed below (on the surface 10b side) the diffusion region 306 provided in the slit 312 by introducing impurities of a first conductivity type (e.g., N type) by ion implantation.

[0075] 14, the image sensor 100 is separated into four pixels 300a, 300b, 300c, and 300d by these four protrusions 304. In this case, phase differences in both the row direction and the column direction can be detected by one image sensor 100. Note that in this embodiment, the number of protrusions is not limited to four, 304 and 324, and four or more protrusions may be provided (e.g., eight).

[0076] <<9. Seventh Embodiment>> Furthermore, in an embodiment of the present disclosure, a pixel separation wall 334 made of a back-side DTI may be provided to separate the pair of pixels 300a, 300b. Such an embodiment will be described below as a seventh embodiment of the present disclosure with reference to Fig. 15. Fig. 15 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 taken along line AA' shown in Fig. 3.

[0077] As shown in FIG. 15 , in this embodiment, a pixel isolation wall (an example of an isolation portion) 334 made of a back-surface DTI is provided between a pair of pixels 300a and 300b. As described above, the back-surface DTI is formed by forming a trench that penetrates partway through the semiconductor substrate 10 from the light-receiving surface 10a (back surface) side of the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10 and then filling the trench with an oxide film or the like. In this case, the region on the front surface 10b side of the pixel isolation wall 334 that is not penetrated in the thickness direction of the semiconductor substrate 10 becomes the overflow path. Alternatively, in this embodiment, the overflow path may be formed by introducing impurities of a first conductivity type into this region by ion implantation. Note that in this embodiment, the pixel isolation wall 334 may or may not be in contact with the element isolation wall 310, and is not particularly limited thereto. In addition, when they are not in contact, a diffusion region (not shown) is provided that electrically isolates the pair of pixels 300a, 300b by introducing impurities of a second conductivity type (e.g., P type) through conformal doping via the element isolation wall 310 or by ion implantation between the pixel isolation wall 334 and the element isolation wall 310.

[0078] As described above, according to this embodiment, by providing a pixel separation wall 334 made of a back-side DTI that physically separates the pair of pixels 300a and 300b during phase difference detection, the pair of pixels 300a and 300b can be effectively physically separated. As a result, color mixing can be suppressed and the accuracy of phase difference detection can be further improved. Furthermore, in this embodiment, the overflow path located in the area on the front surface 10b side of the pixel separation wall 334 prevents saturation of the charge in one of the pixels 300a and 300b during normal image capture by transferring the charge to the other pixel via the overflow path. Furthermore, according to this embodiment, providing such an overflow path ensures linearity of the pixel signal output from the image sensor 100 and prevents degradation of the captured image.

[0079] Furthermore, in this embodiment, a pixel separation wall 334 may be provided between the pair of pixels 300a, 300b by introducing impurities of a second conductivity type (e.g., P-type) by ion implantation. In this modification, the pixel separation wall 334 formed by ion implantation is formed so as to penetrate partway through the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10 from the light-receiving surface 10a (back surface) side of the semiconductor substrate 10. In this modification, the region of the semiconductor substrate 10 on the front surface 10b side that the pixel separation wall 334 does not penetrate in the thickness direction of the semiconductor substrate 10 becomes an overflow path. The overflow path may be formed by not introducing impurities into the region on the front surface 10b side of the pixel separation wall 334 during ion implantation to form the pixel separation wall 334, or by introducing impurities of a first conductivity type into that region by ion implantation. In this modification, the pixel isolation wall 334 may or may not be in contact with the element isolation wall 310, and is not particularly limited.

[0080] As described above, according to this modification, the pixel separation wall 334 formed by ion implantation effectively electrically separates the pair of pixels 300a and 300b, thereby suppressing color mixing and further improving the accuracy of phase difference detection. Furthermore, in this embodiment, the overflow path located in the region on the surface 10b side of the pixel separation wall 334 prevents saturation of the charge in one of the pixels 300a and 300b during normal imaging by transferring the charge to the other pixel via the overflow path. Furthermore, providing such an overflow path ensures the linearity of the pixel signal output from the image sensor 100 and prevents degradation of the captured image.

[0081] Furthermore, in this embodiment, the light-shielding portion (light-shielding film) 204 can be modified as follows. Therefore, the detailed configuration of the light-shielding portion 204 will be described with reference to FIG. 16. FIG. 16 is an explanatory diagram showing an example of the configuration of the light-shielding portion 204 according to this embodiment. Note that in FIG. 16, the diagram shown in the lower part corresponds to the cross section of the image sensor 100 taken along line AA' in FIG. 3, and the diagram shown in the upper part corresponds to the cross section of the image sensor 100 taken along line BB' in FIG. 3.

[0082] 16, when the image sensor 100 is viewed from above the light receiving surface 10a, the light shielding portion (light shielding film) 204 may be provided on and along the element isolation wall 310, and may have two protruding portions 206 that protrude in the column direction toward the center O of the image sensor 100 and face each other. Alternatively, in the present embodiment and its modifications, the light shielding portion 204 may be provided along the element isolation wall 310 and may not have the protruding portions 206.

[0083] <<10. Eighth Embodiment>> Furthermore, in an embodiment of the present disclosure, one additional wall 308b may be a surface DTI. Hereinafter, such an embodiment will be described as an eighth embodiment of the present disclosure with reference to FIGS. 17 to 21. FIG. 17 is an explanatory diagram showing a portion of a cross section of the image sensor 100 according to this embodiment, specifically corresponding to a cross section of the image sensor 100 cut along the thickness direction of the semiconductor substrate 10. FIG. 18 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, specifically corresponding to a cross section of the image sensor 100 cut along line CC' in FIG. 17. FIG. 19 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, specifically corresponding to a cross section of the image sensor 100 cut along line DD' in FIG. 17. FIG. 20 is an explanatory diagram showing a portion of a cross section of the image sensor 100 according to this embodiment, specifically corresponding to a cross section of the semiconductor substrate 10 cut along line EE' in FIG. FIG. 21 is an explanatory diagram showing a part of a cross section of the image sensor 100 for each color according to this embodiment, and more specifically corresponds to a cross section of the semiconductor substrate 10 cut along the thickness direction of the semiconductor substrate 10.

[0084] As shown in FIGS. 17 to 20 , in this embodiment, one additional wall 308b is disposed between two protrusions 304 (slit 312), and this additional wall 308b is used as a front-side DTI. As shown in FIG. 20 , the front-side DTI is formed by forming a trench extending from the front side 10b, which is the surface opposite the light-receiving surface 10a of the semiconductor substrate 10, along the thickness direction of the semiconductor substrate 10 to partway through the semiconductor substrate 10, and then filling the trench with an oxide film or the like. By adjusting the depth of this trench, it is possible to adjust the length of the additional wall 308b in the thickness direction of the semiconductor substrate 10. In the case of a front-side DTI, a channel serving as the overflow path may be formed by introducing impurities into a region on the back side 10a of the additional wall 308b that is not penetrated by the additional wall 308b.

[0085] That is, the additional wall 308b is provided so as to extend along the thickness direction of the semiconductor substrate 10 (substrate thickness direction) from the surface 10b, which is the surface of the semiconductor substrate 10 opposite the light-receiving surface 10a, to partway through the semiconductor substrate 10. As a result, the length of the additional wall 308b in the substrate thickness direction is shorter than the length of the two protrusions 304 in the substrate thickness direction. Therefore, the end face (the surface facing the light-receiving surface 10a) of the additional wall 308b is spaced apart from the light-receiving surface 10a, thereby suppressing scattering of incident light by the additional wall 308b near the light-receiving surface 10a. Furthermore, compared to when the additional wall 308b is formed by full trenching, the volume of the additional wall 308b on the light-receiving surface 10a side can be reduced, and scattering of incident light by the additional wall 308b near the light-receiving surface 10a can be reliably suppressed.

[0086] 2 to 5, for example, incident light is scattered by the two protrusions 304 located near the center of the image sensor 100 on the light-receiving surface 10a, which can cause color mixing and insufficient suppression of sensitivity degradation. In this case, it is possible to suppress incident light scattering by lengthening the slits 312 of the two protrusions 304, but this reduces the effect of conformal doping using the two protrusions 304 and reduces the saturation charge Qs. Therefore, as described above, by forming the additional wall 308b as a surface DTI, the additional wall 308b is eliminated near the center of the image sensor 100 on the light-receiving surface 10a side, thereby suppressing incident light scattering. This can suppress color mixing, sensitivity degradation, and a decrease in saturation charge.

[0087] 21, in this embodiment, the depth of the trench for forming the additional wall 308b (trench depth) may be adjusted according to the wavelength of the incident light at each of the RGB (Red, Green, Blue) image sensors 100, i.e., the photoelectric conversion depth. In the R pixel, the photoelectric conversion occurs in the deep portion, so the trench depth is set to be shallow. For example, the trench depth is set to be a trench depth Z R = 3200 nm (50% absorption of 700 nm wavelength). In the B pixel, photoelectric conversion occurs in a shallow portion, so the trench depth is set deep. For example, the trench depth is set to trench depth Z B = 350 nm (50% absorption of 450 nm wavelength). In the G pixel, photoelectric conversion occurs in the blue relatively deep part and the red relatively shallow part, so the trench depth is set between the trench depth of the R pixel and the trench depth of the B pixel. For example, the trench depth is set to trench depth Z G = 1000 nm (50% absorption of wavelength 550 nm).

[0088] In this way, the trench depth, i.e., the length of the additional wall 308a in the substrate thickness direction, may be determined according to the wavelength of the incident light entering the light-receiving surface 10a. This makes it possible to minimize scattering of the incident light for each color. As a result, it is possible to suppress scattering of the incident light according to the wavelength of the incident light, thereby reliably suppressing color mixing, reduced sensitivity, reduced saturation charge, and the like.

[0089] Furthermore, in this embodiment, the additional wall 308b can be modified as follows. Therefore, the detailed configuration of the additional wall 308b will be described with reference to FIGS. 22 to 25. FIG. 22 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 cut along the planar direction (a direction perpendicular to the thickness direction of the semiconductor substrate 10). FIG. 23 is an explanatory diagram showing a portion of a cross section of the image sensor 100 for each color according to this embodiment, and more specifically, corresponds to a cross section of the semiconductor substrate 10 cut along the thickness direction of the semiconductor substrate 10. FIG. 24 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 cut along the planar direction. FIG. 25 is an explanatory diagram showing a portion of a cross section of the image sensor 100 for each color according to this embodiment, and more specifically, corresponds to a cross section of the semiconductor substrate 10 cut along the thickness direction of the semiconductor substrate 10.

[0090] 22, in this embodiment, when viewed from above the light receiving surface 10a, the width (e.g., length in the row direction) of the central portion of the additional wall 308b may be narrower than the width (e.g., length in the row direction) of both ends of the additional wall 308b. Also, as shown in FIG. 23, the length in the substrate thickness direction of the central portion of the additional wall 308b may be shorter than the length in the substrate thickness direction of both ends of the additional wall 308b.

[0091] In this way, by reducing the line width of the central portion of the additional wall 308b compared to both ends and by shallowing the depth of the trench for forming the central portion of the additional wall 308b to shorten the length of the central portion of the additional wall 308b in the substrate thickness direction, it is possible to narrow the end face of the central portion of the additional wall 308b while separating it from the light-receiving surface 10a, and also to reduce the volume of the additional wall 308b on the light-receiving surface 10a side. This makes it possible to reliably suppress scattering of incident light by the additional wall 308b near the light-receiving surface 10a.

[0092] 22 and 23, the width of the central portion of the additional wall 308b is narrower than both ends of the additional wall 308b, and the length in the thickness direction of the central portion of the semiconductor substrate 10 is shorter than both ends of the additional wall 308b, but this is not limited to this, and either the width or the length may be reduced. Also, the width of the additional wall 308b may be shorter than the width of the two protrusions 304.

[0093] 24, in this embodiment, when viewed from above the light-receiving surface 10a, the width (e.g., length in the row direction) of each of the two protrusions 304 may be narrower than the width (e.g., length in the row direction) of the additional wall 308b. Also, as shown in FIG. 25, the two protrusions 304 may be provided so as to extend from the surface 10b of the semiconductor substrate 10 to partway through the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10. In this case, the length of the additional wall 308b in the substrate thickness direction may be shorter than the length of each of the two protrusions 304 in the substrate thickness direction.

[0094] In this way, in addition to shortening the length of the additional wall 308b in the substrate thickness direction, by narrowing the line width of the two protrusions 304 and further by shallowing the depth of the trenches for forming the two protrusions 304 and shortening the length of each of the protrusions 304 in the substrate thickness direction, it is possible to move the end face of the additional wall 308b and the end faces of the two protrusions 304 away from the light-receiving surface 10a and reduce the volume of the two protrusions 304 in addition to the volume of the additional wall 308b on the light-receiving surface 10a side, so that scattering of incident light near the light-receiving surface 10a by the additional wall 308b and the two protrusions 304 can be reliably suppressed.

[0095] In the examples of Figures 24 and 25, the width of each of the two protrusions 304 is narrower than the width of the additional wall 308b, but this is not limited to this, and for example, the width of one of the two protrusions 304 may be narrower than the width of the additional wall 308b.

[0096] Here, a part of the manufacturing process (manufacturing method) of the image sensor 100 will be described with reference to Fig. 26. Fig. 26 is a process cross-sectional view for explaining a part of the manufacturing process of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the semiconductor substrate 10 cut along the thickness direction of the semiconductor substrate 10.

[0097] As shown in FIG. 26 , in this embodiment, a mask M1 such as a photomask is formed on the surface 10b of the semiconductor substrate 10 (see the first diagram from the left in FIG. 26 ). The mask M1 is formed, for example, by depositing a photoresist layer on the surface 10b of the semiconductor substrate 10 by spin coating or the like and patterning the photoresist layer according to a trench formation pattern. Next, a mask M2 functioning as a protective layer is formed on the mask M1, and a portion of a trench T1 for forming the element isolation wall 310 is formed by etching such as dry etching (see the second diagram from the left in FIG. 26 ). Thereafter, the mask M2 is removed (see the third diagram from the left in FIG. 26 ). Further etching is performed to form the trench T1 for forming the element isolation wall 310 and the trench T2 for forming the additional wall 308b (see the fourth diagram from the left in FIG. 26 ). In a subsequent process, conformal doping or the like is performed, and a material such as an oxide film is filled in the trenches T1 and T2, thereby forming the element isolation wall 310 and the additional wall 308b. Thereafter, the mask M1 is also removed, and the image sensor 100 having the final structure is formed through post-processing.

[0098] As described above, according to this embodiment (including the modified examples), it is possible to obtain the effects of the other embodiments (including the modified examples). That is, it is possible to improve the accuracy of phase difference detection while avoiding deterioration of the captured image. Furthermore, since the end face (the face on the light receiving surface 10a side) of the additional wall 308b is separated from the light receiving surface 10a and the volume of the additional wall 308b on the light receiving surface 10a side can be reduced, it is possible to suppress scattering of incident light near the light receiving surface 10a by the additional wall 308b or the protrusion 304.

[0099] <<11. Ninth Embodiment>> Furthermore, in an embodiment of the present disclosure, a diffusion region 306b (an example of a first diffusion region) formed by introducing impurities by ion implantation may be provided between the two protrusions 304 (in the slit 312). Hereinafter, such an embodiment will be described as a ninth embodiment of the present disclosure with reference to FIGS. 27 to 29. FIG. 27 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 cut along the planar direction. FIG. 28 is an explanatory diagram showing a portion of a cross section of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the semiconductor substrate 10 cut along the thickness direction of the semiconductor substrate 10. FIG. 29 is an explanatory diagram showing a portion of a cross section of the image sensor 100 of a comparative example according to this embodiment, and more specifically, corresponds to a cross section of the semiconductor substrate 10 cut along the thickness direction of the semiconductor substrate 10.

[0100] 28, in this embodiment, ion implantation is performed from both the front surface 10b and the back surface 10a of the semiconductor substrate 10. As a result, the diffusion region 306b is formed in a shape that expands from the front surface 10b of the semiconductor substrate 10 toward the interior of the semiconductor substrate 10 and narrows from the interior of the semiconductor substrate 10 toward the back surface 10a of the semiconductor substrate 10. In other words, the diffusion region 306b has a first region R1 that expands from the front surface 10b of the semiconductor substrate 10 toward the interior of the semiconductor substrate 10, and a second region R2 that narrows from the interior of the semiconductor substrate 10 toward the back surface 10a of the semiconductor substrate 10. The first region R1 and second region R2 are connected.

[0101] 28, the first region R1 and the second region R2 are positioned so that their central axes coincide with each other, but this is not limiting and they may be positioned so that they are offset from each other in the left-right direction (as an example, in the row direction). This also applies to the configurations shown in the following Figures 30 to 35.

[0102] Here, as shown in FIG. 29, if ion implantation is performed only from the front surface 10b of the semiconductor substrate 10, diffusion will spread widely in the thickness direction of the semiconductor substrate 10, forming a diffusion region 306a that continues to spread from the front surface 10b to the back surface 10a of the semiconductor substrate 10. This will narrow the photoelectric conversion region. Therefore, as shown in FIG. 28, ion implantation is performed from both the front surface 10b and the back surface 10a of the semiconductor substrate 10. As a result, the diffusion region 306b will be formed in a shape that spreads from the front surface 10b of the semiconductor substrate 10 toward the interior of the semiconductor substrate 10 and narrows from the interior of the semiconductor substrate 10 toward the back surface 10a of the semiconductor substrate 10. As a result, the diffusion region 306b (see FIG. 28) will be narrower than the diffusion region 306a (see FIG. 29), thereby widening the photoelectric conversion region.

[0103] Furthermore, in this embodiment, the diffusion region 306b can be modified as follows. Therefore, the detailed configuration of the diffusion region 306b will be described with reference to Figures 30 to 35. Figures 30 to 35 are explanatory diagrams showing a part of a cross section of the image sensor 100 according to this embodiment, and more specifically, correspond to a cross section of the semiconductor substrate 10 cut along the thickness direction of the semiconductor substrate 10.

[0104] 30, in this embodiment, the diffusion region 306b may be formed so that the first region R1 and the second region R2 are not connected but are separated from each other. Even with the diffusion region 306b having such a shape, it is possible to suppress the expansion of the diffusion region 306b and widen the photoelectric conversion region.

[0105] 31, in this embodiment, the diffusion region 306b may be formed such that the first region R1 and the second region R2 are narrower than the first region R1 and the second region R2 shown in FIG. 28. The first region R1 and the second region R2 are connected. With the diffusion region 306b having such a shape, it is possible to further suppress the expansion of the diffusion region 306b compared to the first region R1 and the second region R2 shown in FIG. 28, and it is possible to reliably widen the photoelectric conversion region.

[0106] 32, in this embodiment, the diffusion region 306b may be formed so that the impurity concentrations of the first region R1 and the second region R2 are higher than those of the first region R1 and the second region R2 shown in FIG. 28. The first region R1 and the second region R2 are connected. With this diffusion region 306b, potential adjustment (potential design) can be easily performed by changing the impurity concentrations of the first region R1 and the second region R2.

[0107] 33, in this embodiment, the diffusion region 306b may be formed so that the length (depth) of the first region R1 in the substrate thickness direction is longer than the length (depth) of the second region R2 in the substrate thickness direction. The first region R1 and the second region R2 are connected. Such a diffusion region 306b allows potential adjustment (potential design) to be easily performed by changing the lengths of the first region R1 and the second region R2 in the substrate thickness direction. Note that the diffusion region 306b may be formed so that the lengths of the first region R1 and the second region R2 in the substrate thickness direction are different. For example, the diffusion region 306b may be formed so that the length of the second region R2 in the substrate thickness direction is longer than the length of the first region R1 in the substrate thickness direction, which is the opposite of the above.

[0108] 34, in this embodiment, the diffusion region 306b may be formed such that the first region R1 is narrower than the second region R2. That is, the length of the first region R1 in a direction perpendicular to the substrate thickness direction is shorter than the length of the first region R1 in a direction perpendicular to the substrate thickness direction. The first region R1 and the second region R2 are connected. Such a diffusion region 306b allows potential adjustment (potential design) to be easily performed by varying the individual widths of the first region R1 and the second region R2. Note that the diffusion region 306b may be formed such that the individual widths of the first region R1 and the second region R2 are different. For example, the second region R2 may be formed narrower than the first region R1, as opposed to the above.

[0109] 35, in this embodiment, the diffusion region 306b may be formed so that the impurity concentration of the first region R1 is lower than the impurity concentration of the second region R2. The first region R1 and the second region R2 are connected. Such a diffusion region 306b allows potential adjustment (potential design) to be easily performed by changing the individual impurity concentrations of the first region R1 and the second region R2. Note that the diffusion region 306b may be formed so that the individual impurity concentrations of the first region R1 and the second region R2 are different. For example, the diffusion region 306b may be formed so that the impurity concentration of the second region R2 is lower than the impurity concentration of the first region R1, as opposed to the above.

[0110] Ion implantation is performed to form the diffusion region 306b having various shapes as shown in Figures 28, 30 to 35. During this ion implantation, various conditions such as power, implantation time, processing temperature, and electric field are adjusted. By appropriately adjusting these various conditions, it is possible to obtain the diffusion region 306b having various shapes as shown in Figures 28, 30 to 35.

[0111] 36, in this embodiment, one additional wall 308 may be provided between two protrusions 304 (slit 312). In this case, a diffusion region 306b is provided between each of the two protrusions 304 and one additional wall 308 (two regions). The cross section of the image sensor 100 taken along line GG′ in FIG. 36 is the same as the cross section shown in FIG. 28, and the cross section of the image sensor 100 taken along line HH′ in FIG. 36 is the same as the cross section shown in FIG. 34. With this configuration, for example, a potential gradient (see the hollow arrows in FIG. 36) can be formed. This allows charges to easily roll (move) toward the transfer gates 400a and 400b. In other words, potential adjustment (potential design), such as forming a potential gradient, can be easily performed by combining various shapes and impurity concentrations of the first region R1 and the second region R2 that constitute the diffusion region 306b.

[0112] Here, a part of the manufacturing process (manufacturing method) of the imaging device 1 will be described with reference to Fig. 37 and Fig. 38. Fig. 37 and Fig. 38 are process cross-sectional views for explaining a part of the manufacturing process of the imaging device 1 according to this embodiment. Note that, for ease of understanding, Fig. 37 and Fig. 38 show only the main parts of the imaging device 1 related to this embodiment, and other parts are not shown.

[0113] As shown in the upper part of FIG. 37 , in this embodiment, ion implantation is performed on a first semiconductor substrate 10 on which, for example, a photodiode, a floating diffusion (all not shown), transfer gates 400a, 400b, an element isolation wall 310, a protrusion 304, etc. are formed. At this time, in the example of FIG. 37 , ion implantation is performed from the front surface 10b of the first semiconductor substrate 10. Thereafter, the first semiconductor substrate 10 and a second semiconductor substrate 11 are bonded via an interlayer insulating film 10A. Thereafter, the first semiconductor substrate 10 is thinned from the rear surface 10a of the first semiconductor substrate 10 using CMP (Chemical Mechanical Polishing), a grinder, etc., as shown in the middle part of FIG. 37 . Thereafter, for example, activation annealing is performed, and then ion implantation is again performed on the first semiconductor substrate 10. At this time, in the example of FIG. 37 , ion implantation is performed from the rear surface 10a of the first semiconductor substrate 10. Thereafter, as shown in the lower part of FIG. 37, a support substrate 12 is bonded to the first semiconductor substrate 10, and activation annealing, for example, is performed.

[0114] Next, as shown in the upper part of Fig. 38, for example, various transistors and signal lines (for example, pixel drive wiring 26 and horizontal signal line 28) are formed on second semiconductor substrate 11. Then, as shown in the middle part of Fig. 38, logic substrate 13 is bonded to second semiconductor substrate 11. Logic substrate 13 has a plurality of circuits, for example, various circuit sections 21 to 25. Thereafter, CMP, a grinder, or the like is used on support substrate 12, and thinning is performed as shown in the lower part of Fig. 38.

[0115] As described above, according to this embodiment (including the modified examples), the effects of the other embodiments (including the modified examples) can be obtained. That is, it is possible to prevent degradation of the captured image while improving the accuracy of phase difference detection. Furthermore, the diffusion region 306b is formed in a shape that widens from the front surface 10b of the semiconductor substrate 10 toward the interior of the semiconductor substrate 10 and narrows from the interior of the semiconductor substrate 10 toward the back surface 10a of the semiconductor substrate 10. As a result, the diffusion region 306b (see FIG. 28) is narrower than the diffusion region 306a (see FIG. 29), and therefore the photoelectric conversion region can be widened.

[0116] <<12. Tenth Embodiment>> Furthermore, in an embodiment of the present disclosure, the protruding portion 304 may be configured by an extending portion 304a and a protruding portion 304b. Hereinafter, such an embodiment will be described as a tenth embodiment of the present disclosure with reference to FIGS. 39 to 41 . FIG. 39 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section obtained by cutting the image sensor 100 along the planar direction. FIG. 40 is an explanatory diagram showing a portion of a cross section of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section obtained by cutting the semiconductor substrate 10 along line II′ shown in FIG. 39 . FIG. 41 is an explanatory diagram showing a portion of a cross section of the image sensor 100 according to a comparative example of this embodiment, and more specifically, corresponds to a cross section obtained by cutting the semiconductor substrate 10 along the thickness direction of the semiconductor substrate 10.

[0117] As shown in FIG. 39 , in this embodiment, the two protrusions 304 each have an extending portion 304a and a protruding portion 304b. The extending portion 304a is connected to the element isolation wall 310 and extends from the element isolation wall 310 in the column direction. The protruding portion 304b is provided at an end of the extending portion 304a and extends in the row direction. When viewed from above the light-receiving surface 10a, the extending portion 304a and the protruding portion 304b have rectangular shapes, and in the example of FIG. 39 , the protrusions 304 are T-shaped. The protruding portions 304b each have opposing surfaces S1 facing each other. When viewed from above the light-receiving surface 10a, the width (e.g., length in the row direction) of each of the opposing surfaces S1 is wider than the line width (e.g., length in the row direction) of each of the extending portions 304a.

[0118] 40, a diffusion layer (doping layer), i.e., diffusion region 306, is formed on the wall surface of element isolation wall 310 by only conformal doping, and slit 312 is filled with diffusion region 306. This is because two protrusions 304 forming slit 312 are formed straight so as to be perpendicular to light-receiving surface 10a. In other words, this is because slit 312 has a linear shape rather than a tapered shape.

[0119] For example, as shown in FIG. 41, the processed shape of a full trench may become tapered due to the microloading effect during etching. In this case, conformal doping alone may not completely fill the slit 312 with the diffusion region 306, resulting in insufficient potential isolation. To address this issue, ion implantation into the slit 312 is desirable, but this increases the number of manufacturing steps. Generally, forming a trench with a wide linewidth (sparse) can improve the etching rate compared to forming a trench with a narrow linewidth (dense). Therefore, by providing the protrusion 304b on the extension 304a to form the protrusion 304, the etching rate can be increased compared to forming the protrusion 304 using only the extension 304a, and the shape of the slit 312 can be made linear rather than tapered. This eliminates the need for ion implantation and reduces the number of manufacturing steps. Furthermore, since the verticality of the slit 312 (verticality of the trench) is improved, the saturated charge amount Qs can be improved compared to when ion implantation is required, and further, color mixing and quantum efficiency Qe can be improved.In addition, crystal defect damage can be reduced, thereby improving white spots.

[0120] FIG. 42 is a graph showing the relationship between the width of the slit 312 and the width of the protrusion 304 according to this embodiment. As shown in FIG. 39, the line width (length in the row direction) of the extension 304a is L1, the width (length in the row direction) of the protrusion 304b is L2, and as shown in FIG. 41, the width (length in the column direction) of the slit 312 on the back surface 10a of the semiconductor substrate 10 is L3, and the width (length in the column direction) of the slit 312 on the front surface 10b of the semiconductor substrate 10 is L4. As shown in FIG. 42, a graph showing the relationship between "L2 / L1 (ratio)" and "L4-L3 (difference)" can be obtained. From this graph, it can be seen that by making the width L2 of the protrusion 304b 1.2 times or more the line width L1 of the extension 304a, the slit 312 becomes perpendicular, achieving a sufficient effect at a practical level. For even more perpendicularity, it is desirable to make the width L2 of the protrusion 304b 1.4 times or more the line width L1 of the extension 304a.

[0121] It is also possible to move the formation position of the slit 312 in the column direction. In this case, the length of the extension portion 304a (for example, the length in the column direction) is adjusted. Such movement of the formation position of the slit 312 is also possible in the configurations shown in FIGS. 45 to 50 below. By moving the formation position of the slit 312, for example, by placing the blooming path region at the edge instead of the center, it is possible to separate the blooming path region from the transfer gates 400a, 400b and the floating diffusion region, and this can improve the margin for transfer, white spots, etc.

[0122] Here, a part of the manufacturing process (manufacturing method) of the image sensor 100 will be described with reference to Fig. 43 and Fig. 44. Fig. 43 is a process cross-sectional view for explaining a part of the manufacturing process of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the semiconductor substrate 10 taken along line LL' shown in Fig. 39. Fig. 44 is a process cross-sectional view for explaining a part of the manufacturing process of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the semiconductor substrate 10 taken along line II' shown in Fig. 39.

[0123] As shown in FIGS. 43 and 44 , in this embodiment, a mask M1 (e.g., an inorganic mask such as SiO 2 ) is formed on the back surface 10 a (or front surface 10 b) of the semiconductor substrate 10. Then, a mask M2 is formed on the mask M1. This mask M2 is formed, for example, by stacking a photoresist layer on the mask M1 on the front surface 10 b of the semiconductor substrate 10 by a spin coating method or the like, and patterning the photoresist layer according to a trench formation pattern. Next, trenches for forming the protrusions 304 and the element isolation walls 310 are formed by etching such as dry etching, and the mask M2 is removed. Then, for example, conformal doping is performed to form the diffusion regions 306. Thereafter, a material such as an oxide film is filled into each trench, and the protrusions 304 and the element isolation walls 310 are formed. Finally, the mask M1 is removed, and the image sensor 100 with its final structure is formed through post-processing.

[0124] Furthermore, in this embodiment, the protrusion 304 can be modified as follows. Therefore, the detailed configuration of the protrusion 304 will be described with reference to Fig. 45 to Fig. 50. Fig. 45 to Fig. 50 are explanatory diagrams showing a plan view of the image sensor 100 according to this embodiment, and more specifically, correspond to cross sections obtained by cutting the image sensor 100 along the planar direction.

[0125] As shown in FIG. 45, in this embodiment, the protrusion 304 has an extending portion 304a and a protruding portion 304b. The extending portion 304a is connected to the element isolation wall 310 and extends from the element isolation wall 310 in the column direction. The protruding portion 304b is provided at an end of the extending portion 304a and extends in the row direction. When viewed from above the light-receiving surface 10a, the extending portion 304a and the protruding portion 304b have rectangular shapes, and in the example of FIG. 45, the protrusion 304 has a T-shape. The protruding portion 304b has a facing surface S1 that faces the wall surface of the element isolation wall 310. When viewed from above the light-receiving surface 10a, the width (e.g., length in the row direction) of the facing surface S1 of the protruding portion 304b is longer than the line width (e.g., length in the row direction) of the extending portion 304a.

[0126] 46, in this embodiment, each of the two protrusions 304 is bent midway so that the slits 312 are oblique. The protrusions 304 have opposing surfaces S1 that face each other. When viewed from above the light-receiving surface 10a, the length of each opposing surface S1 (e.g., the length in the inclined direction) is longer than the line width of each of the two protrusions 304 (e.g., the length in the row direction).

[0127] 47, in this embodiment, the two protrusions 304 are formed so as to be offset from each other in the row direction. Each protrusion 304 has an opposing surface S1 facing each other. When viewed from above the light-receiving surface 10a, the length of each opposing surface S1 (e.g., the length in the column direction) is longer than the line width of each protrusion 304 (e.g., the length in the row direction).

[0128] 48, in this embodiment, the two protrusions 304 each have an extending portion 304a and a protruding portion 304b. The extending portion 304a is connected to the element isolation wall 310 and extends from the element isolation wall 310 in the column direction. The protrusion 304b is provided at an end of the extending portion 304a and is formed in a shape extending in the row and column directions. When viewed from above the light-receiving surface 10a, the extending portion 304a has a rectangular shape, and in the example of FIG. 48, the protrusion 304b has an L-shape. Each protrusion 304 has an opposing surface S1 facing each other. When viewed from above the light-receiving surface 10a, the individual lengths of each opposing surface S1 (e.g., the lengths in the row and column directions) are longer than the individual line widths of each extending portion 304a (e.g., the length in the row direction).

[0129] 49, in this embodiment, in addition to the two protrusions 304, two additional walls (an example of a separation portion) 308c are provided to face each other across the center of the image sensor 100. The additional walls 308c have opposing surfaces S1 that face each other. When viewed from above the light receiving surface 10a, the length of each opposing surface S1 (e.g., the length in the column direction) is longer than the line width of each protrusion 304 (e.g., the length in the row direction).

[0130] 50, in this embodiment, the two protrusions 304 each have an extension 304a and a protruding portion 304b. In the example of FIG. 50, when viewed from above the light receiving surface 10a, the configuration is the same as the configuration of FIG. 39 except that the shape of the protrusion 304b is circular. Note that the shape of the protrusion 304b may be various shapes other than a circular shape, such as an elliptical shape or a trapezoidal shape.

[0131] As described above, this embodiment (including its modifications) can achieve the effects of other embodiments (including its modifications). Specifically, it is possible to improve the accuracy of phase difference detection while avoiding degradation of captured images. Furthermore, the width (e.g., length in the row direction) of the facing surface S1 of the protrusion 304 is wider than the line width (e.g., length in the row direction) of the extension 304a of the protrusion 304. This increases the etching rate on the facing surface S1 side of the protrusion 304, enabling the slit 312 to have a linear shape rather than a tapered shape. This eliminates the need for ion implantation and reduces the number of manufacturing processes. Furthermore, since the perpendicularity of the slit 312 (trench perpendicularity) is improved, the saturation charge Qs can be improved compared to when ion implantation is required. Furthermore, color mixing and quantum efficiency Qe can be improved. Furthermore, crystal defect damage can be reduced, thereby eliminating white spots.

[0132] <<13. Eleventh Embodiment>> Furthermore, in an embodiment of the present disclosure, two pixel separation walls (an example of a separation portion) 334a may be provided. Such an embodiment will be described below as an eleventh embodiment of the present disclosure with reference to FIGS. 51 and 52. FIG. 51 is an explanatory diagram showing a plan view of an image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section obtained by cutting the image sensor 100 along the planar direction. FIG. 52 is an explanatory diagram showing a plan view of an image sensor 100 according to a comparative example of this embodiment, and more specifically, corresponds to a cross section obtained by cutting the image sensor 100 according to the comparative example along the planar direction.

[0133] 51, in this embodiment, two pixel separation walls 334a are arranged in the column direction so as to face each other with the center of the image sensor 100 between them. Each pixel separation wall 334a is spaced apart from the element separation wall 310 without contacting the element separation wall 310, and is also spaced apart from each other. In the example of FIG. 51, when viewed from above the light receiving surface 10a, each pixel separation wall 334a has a rectangular shape.

[0134] The diffusion region 306 includes a first region 306A and a second region 306B. The first region 306A is a region formed by a solid-phase diffusion process for each trench to form the two pixel isolation walls 334a. The second region 306B is a region formed by a solid-phase diffusion process for the trench to form the device isolation wall 310. In other words, diffusion from the trench corresponding to the peripheral device isolation wall 310 and diffusion from each trench corresponding to the two protrusions 304 occur independently, resulting in the diffusion region 306 having the first region 306A and the second region 306B.

[0135] To strengthen the separation between the two pixels, for example, boron can be diffused by solid-phase diffusion from doped silicon oxide formed on the trench sidewalls. In this case, in a structure such as that shown in FIG. 52, diffusion from the trench corresponding to the peripheral isolation wall 310 and diffusion from each trench corresponding to the two protrusions 304 occur simultaneously, resulting in a wide boron diffusion region 306. This wide diffusion region 306 results in a decrease in the saturated charge. Therefore, as described above, by separating the isolation wall 310 and the two pixel isolation walls 334a and forming the isolation structures independently, solid-phase diffusion of the isolation structures can be performed independently, thereby suppressing the decrease in the saturated charge. In other words, because diffusion from the trench corresponding to the isolation wall 310 and diffusion from each trench corresponding to the two protrusions 304 occur independently, the size of the diffusion region 306 can be reduced, thereby suppressing the decrease in the saturated charge.

[0136] In this embodiment, boron, for example, is diffused by a solid-phase diffusion process (an example of a diffusion process). However, the diffusion process is not limited to the solid-phase diffusion process, and it is also possible to use a doping technique such as plasma doping, which involves doping from the sidewall by heat.

[0137] 51, the two pixel separation walls 334a are positioned on a center line passing through the center of the image sensor 100, but this is not limitative and, for example, they may be positioned so as to be offset in the left-right direction (as an example, the row direction) in Fig. 51. This also applies to the configurations shown in Figs. 54 to 57 below.

[0138] Here, a part of the manufacturing process (manufacturing method) of the image sensor 100 will be described with reference to Fig. 53. Fig. 53 is a process cross-sectional view for explaining a part of the manufacturing process of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 cut along the planar direction.

[0139] As shown in FIG. 53 , in this embodiment, two trenches T4 for forming pixel isolation walls 334a are formed at internal positions away from the positions where the element isolation walls 310 are formed (see the first diagram from the left in FIG. 53 ). Next, a solid-phase diffusion process is performed on the trenches T4 to form a solid-phase diffusion layer (e.g., a P-type layer), i.e., a first region 306A, around each trench T4. Thereafter, a material such as an oxide film is filled into each trench T4 to form the pixel isolation walls 334a (see the second diagram from the left in FIG. 53 ). Next, a rectangular trench T5 for forming the element isolation walls 310 is formed with a predetermined size surrounding each trench T4. Then, a solid-phase diffusion process is performed on the trench T5 to form a solid-phase diffusion layer (e.g., a P-type layer), i.e., a second region 306B, around each trench T5. Finally, a material such as an oxide film is filled into the trench T5 to form the element isolation walls 310 (see the third diagram from the left in FIG. 53 ). This forms a diffusion region 306 including a first region 306A and a second region 306B.

[0140] Furthermore, in this embodiment, the pixel separation wall 334a can be modified as follows. Therefore, the detailed configuration of the pixel separation wall 334a will be described with reference to Figures 54 to 57. Figures 54 to 57 are explanatory diagrams showing a plan view of the image sensor 100 according to this embodiment, and more specifically, correspond to cross sections obtained by cutting the image sensor 100 along the planar direction.

[0141] As shown in Fig. 54, in this embodiment, four pixel separation walls 334a are provided. Two of the four pixel separation walls 334a are arranged in the column direction so as to face each other with the center of the image sensor 100 in between, and the other two are arranged in the row direction so as to face each other with the center of the image sensor 100 in between. Each pixel separation wall 334a is spaced apart from the element separation wall 310 without contacting the element separation wall 310, and is also spaced apart from each other. In the example of Fig. 54, when viewed from above the light receiving surface 10a, each pixel separation wall 334a has a rectangular shape, and the pixel separation walls 334a are arranged to form a cross shape.

[0142] Furthermore, as shown in Fig. 55, in this embodiment, in addition to the two pixel separation walls 334a, two other pixel separation walls 334a having smaller planar areas than the two pixel separation walls 334a are provided. These pixel separation walls 334a having smaller areas (sizes) are arranged in the row direction so as to face each other with the center of the image sensor 100 in between. A portion of each of the two pixel separation walls 334a is located in the region between the other two pixel separation walls 334a. In the example of Fig. 55, when viewed from above the light receiving surface 10a, each pixel separation wall 334a has a rectangular shape.

[0143] Furthermore, as shown in Fig. 56, in this embodiment, four pixel separation walls 334a are provided. The four pixel separation walls 334a are arranged in a dot pattern in a column direction passing through the center of the image sensor 100. Each pixel separation wall 334a is spaced apart from the element separation wall 310 without contacting the element separation wall 310, and is also spaced apart from one another. In the example of Fig. 56, when viewed from above the light receiving surface 10a, each pixel separation wall 334a has a rectangular shape, and the pixel separation walls 334a are arranged on a straight line.

[0144] Furthermore, in this embodiment, as shown in Fig. 57, the two pixel separation walls 334a are each formed in a circular shape when viewed from above the light receiving surface 10a. In the example of Fig. 57, when viewed from above the light receiving surface 10a, the configuration is the same as the configuration of Fig. 51 except that each pixel separation wall 334a has a circular shape. Note that the shape of the pixel separation walls 334a may be various shapes other than a circular shape, such as an elliptical shape or a trapezoidal shape.

[0145] As described above, according to this embodiment (including its modifications), it is possible to obtain the effects of other embodiments (including their modifications). That is, it is possible to improve the accuracy of phase difference detection while avoiding degradation of captured images. Furthermore, by arranging the element isolation wall 310 and each pixel isolation wall 334a apart and forming the isolation structures independently, it is possible to perform a diffusion process such as solid-phase diffusion of the isolation structures independently, thereby suppressing a decrease in the amount of saturated charge.

[0146] <<14. Twelfth Embodiment>> In the embodiment of the present disclosure, the distance between the pair of protrusions 304 in the depth direction (height direction) is not limited to being approximately the same, and may be different. Therefore, with reference to FIGS. 58 to 60, such an embodiment will be described as a twelfth embodiment of the present disclosure. FIG. 58 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the image sensor 100 cut along the planar direction. FIG. 59 is an explanatory diagram showing both surfaces and a cross section of the image sensor 100 according to this embodiment, and this cross section corresponds to a cross section of the image sensor 100 cut along line MM′ shown in FIG. 58. FIG. 60 is an explanatory diagram showing the relationship between the slit width (length of the slit gap) of the image sensor 100 according to this embodiment and the light-gathering characteristics and pixel characteristics.

[0147] As shown in FIGS. 58 and 59, in this embodiment, the pair of protruding portions 304 are formed in a tapered shape in which the distance between them (slit width) gradually changes in the depth direction. In the example of FIG. 59, the distance between the pair of protruding portions 304 gradually widens in the depth direction from the surface 10b toward the back surface (light-receiving surface) 10a (from the upper surface to the lower surface in FIG. 58) (a < b). Thereby, while moving the light-receiving surface 10a side of the pair of protruding portions 304 away from the center, it is possible to secure the protruding amount as a whole. As shown in FIG. 60, it is possible to reduce light scattering while maintaining pixel characteristics, and it is possible to eliminate the trade-off between light condensing characteristics and pixel characteristics.

[0148] Here, there is a relationship of b - a = 2×(t / tan(θ)). Note that a is the length of the slit 312 on the surface 10b side, b is the length of the slit 312 on the back surface (light-receiving surface) 10a side, t is the thickness (length in the depth direction) from the surface 10b to the back surface 10a, and θ is the taper angle of the slit 312 with respect to the surface 10b. Even if this taper angle θ is small, depending on the thickness t from the surface 10b to the back surface 10a, a large difference occurs in the slit width from the surface 10b to the back surface 10a.

[0149] Also, in this embodiment, the pair of protruding portions 304 can be deformed as follows. Therefore, referring to FIGS. 61 to 71, the detailed configuration of the pair of protruding portions 304 will be described. FIGS. 61, 65, 68, and 69 are explanatory diagrams showing both sides and a cross-section of the image sensor 100 according to this embodiment, respectively. FIGS. 62 to 64 and 66 are explanatory diagrams showing cross-sections of the image sensor 100 according to this embodiment, respectively. FIGS. 67, 70, and 71 are explanatory diagrams showing both sides of the image sensor 100 according to this embodiment.

[0150] As shown in FIG. 61, in the present embodiment, the pair of protruding portions 304 are formed such that the distance between them is substantially the same in the depth direction by a predetermined depth from the front surface 10b toward the back surface 10a (from the upper surface to the lower surface in FIG. 61), and gradually widens in the depth direction from the middle of the depth direction (a < b). Regarding the deterioration of color mixing, since the trench shape in the light condensing portion is dominant, it is effective if there is a change in the light condensing portion.

[0151] Also, as shown in FIG. 62, in the present embodiment, the pair of protruding portions 304 are formed such that the distance between them gradually narrows in the depth direction from the front surface 10b toward the back surface 10a (from the upper surface to the lower surface in FIG. 62), becomes substantially the same in the depth direction by a predetermined depth, and gradually widens in the depth direction from the middle of the depth direction (a = b > c). Note that a b may also be possible. The separation distance on the back surface (light receiving surface) 10a side is preferably wide for effective light condensation, and the separation distance on the front surface 10b side is preferably wide from the perspective of potential design. The central separation distance is preferably narrow for effectiveness on Qs.

[0152] Also, as shown in FIG. 63, in the present embodiment, the pair of protruding portions 304 are each formed such that the distance between them changes in multiple stages in the depth direction from the front surface 10b toward the back surface 10a (from the upper surface to the lower surface in FIG. 63). In the example of FIG. 63, the distance between the pair of protruding portions 304 changes in two stages in the depth direction, and the separation distance on the front surface 10b side is narrower than the separation distance on the back surface 10a side (a < b). For this reason, the pair of protruding portions 304 each have a step. Thus, the separation distance of the pair of protruding portions 304 may change discontinuously rather than continuously, and may change in multiple stages such as three stages or four stages instead of two stages.

[0153] Also, as shown in FIG. 64, in the present embodiment, the pair of protruding portions 304 are formed such that the distance between them changes in two stages in the depth direction from the front surface 10b toward the back surface 10a (from the upper surface to the lower surface in FIG. 64), and gradually widens in the depth direction from the middle of the depth direction (a < c < b). Thus, combinations such as the intermediate taper shape shown in FIG. 61 or FIG. 62 and the multi-stage processing shape shown in FIG. 63 may be used.

[0154] Also, as shown in FIG. 65, in the present embodiment, one protrusion 304 is formed such that the separation distance from the element separation wall 310 gradually widens in the depth direction from the front surface 10b to the back surface 10a (from the upper surface to the lower surface in FIG. 65) (a < b).

[0155] Also, as shown in FIG. 66, in the present embodiment, one protrusion 304 is formed so as to change in two steps in the depth direction from the front surface 10b to the back surface 10a (from the upper surface to the lower surface in FIG. 66). In the example of FIG. 66, the separation distance on the front surface 10b side is narrower than that on the back surface 10a side (a < b).

[0156] Also, as shown in FIG. 67, in the present embodiment, four protrusions 304 are formed such that the separation distance between a pair of opposing protrusions 304 gradually widens in the depth direction from the front surface 10b to the back surface 10a (a < b). These protrusions 304 are arranged in a cross shape.

[0157] Note that, as shown in FIGS. 65 to 67, for a plurality of protrusions 304 such as one protrusion 304 or four protrusions 304, the intermediate taper shape shown in FIGS. 61 and 62, the multi-step processed shape shown in FIG. 63, etc., may be applied, or they may be applied in combination.

[0158] Also, as shown in FIG. 68, in the present embodiment, a pair of protrusions 3 is formed such that the individual line widths (widths in the direction orthogonal to the extending direction) gradually narrow in the depth direction from the front surface 10b to the back surface 10a (from the upper surface to the lower surface in FIG. 68) (d > e). Note that the separation distance between the pair of protrusions is substantially the same in the depth direction (a = b).

[0159] Also, as shown in FIG. 69, in the present embodiment, one protrusion 304 is formed such that its line width (width in the direction orthogonal to the extending direction) gradually narrows in the depth direction from the front surface 10b toward the back surface 10a (from the upper surface to the lower surface in FIG. 69) (d>e). Note that the separation distance between the protrusion 304 and the element isolation wall 310 gradually widens in the depth direction from the front surface 10b toward the back surface 10a (a<b).

[0160] Also, as shown in FIG. 70, in the present embodiment, four pixel isolation walls 334a are formed such that their individual line widths gradually narrow in the depth direction from the front surface 10b toward the back surface 10a. These pixel isolation walls 334a are arranged in a dot pattern in the column direction passing through the center of the imaging element 100. Each pixel isolation wall 334a is separated from the element isolation wall 310 without contacting the element isolation wall 310, and further, they are separated from each other.

[0161] Also, as shown in FIG. 71, in the present embodiment, four protrusions 304 are formed such that their individual line widths (widths in the direction orthogonal to the extending direction) gradually narrow in the depth direction from the front surface 10b toward the back surface 10a (d<e). These protrusions 304 are arranged in a cross shape. Note that the separation distance between a pair of opposing protrusions 304 is substantially the same in the depth direction (a=b).

[0162] As described above, by widening the gap (width of the slit 312) between the slits 312 on the light-receiving surface 10a side, scattering by each protrusion 304 is suppressed, and since the light collection characteristics are particularly effective in the vicinity of the light-receiving surface 10a, it is possible to achieve both good light collection characteristics and pixel characteristics. Further, not only by widening the gap between the slits 312 on the light-receiving surface 10a side, but also by making the line width of the protrusion 304 narrower on the light-receiving surface 10a side, scattering by the protrusion 304 can be suppressed, so that color mixing can be suppressed.

[0163] It is possible to widen the gap of the slit 312 on the light receiving surface 10a side or narrow the line width of the protrusion 304, or to do both. In other words, the configurations shown in Figures 61 to 71 may be used alone or in combination.

[0164] Here, a part of the manufacturing process (manufacturing method) of the image sensor 100 will be described with reference to Fig. 72. Fig. 72 is a process cross-sectional view for explaining a part of the manufacturing process of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section of the semiconductor substrate 10 cut along the thickness direction of the semiconductor substrate 10.

[0165] 72, in this embodiment, FFTI (Front FTI: Full Trench Isolation) processing is performed on the semiconductor substrate 10, and a material is embedded. After various processes (omitted), the semiconductor substrate 10 and a laminated substrate 501 are bonded together and thinned. The thinned semiconductor substrate 10 is backfilled, and a color filter 202 and an on-chip lens 200 are laminated. Note that, for example, a logic substrate or a semiconductor substrate is used as the laminated substrate 502.

[0166] <<15. Thirteenth Embodiment>> Furthermore, in an embodiment of the present disclosure, the two transfer gates 400a, 400b, the FD section (floating diffusion section) 601, and the ground section 602 may be arranged as shown in FIG. 73. Such an embodiment will be described below as a thirteenth embodiment of the present disclosure with reference to FIGS. 73 and 74. FIG. 73 is an explanatory diagram showing a plan view of the image sensor 100 according to this embodiment, and more specifically, corresponds to a cross section obtained by cutting the image sensor 100 along the planar direction. FIG. 74 is an explanatory diagram showing a plan view of the image sensor 100 according to a comparative example of this embodiment, and more specifically, corresponds to a cross section obtained by cutting the image sensor 100 according to the comparative example along the planar direction.

[0167] 73, in this embodiment, two transfer gates 400a and 400b are positioned on one end side (for example, the upper side in FIG. 73) of a cell region surrounded by an element isolation wall 310. The cell region is included in the imaging element 100. In the example of FIG. 73, the cell region is square.

[0168] The FD section 601 is a floating diffusion shared by two adjacent cell regions (see the dotted line region in FIG. 73). This FD section 601 is positioned on one end side of the cell region (for example, the upper side in FIG. 73). In the example of FIG. 73, the shape of the FD section 601 is not a regular octagon, but an octagonal shape having long and short sides. Specifically, the FD section 601 is horizontally long, and the length of the FD section 601 in a direction perpendicular to the extension direction of the protrusion 304 is longer than the length of the protrusion 304 in the extension direction. For example, Poly-Si (polycrystalline Si) is used as the FD section 601.

[0169] The ground portion 602 is a ground portion shared by two adjacent cell regions (see the dotted line region in FIG. 73). This ground portion 602 is positioned on one end side of the cell region (for example, the lower side in FIG. 73). In the example of FIG. 73, the shape of the ground portion 602 is not a regular octagon, but an octagonal shape having long and short sides. Specifically, the ground portion 602 is horizontally elongated, and the length of the ground portion 602 in a direction perpendicular to the extension direction of the protrusion 304 is longer than the length of the protrusion 304 in the extension direction. For example, Poly-Si (polycrystalline Si) is used as the ground portion 602. The ground portion 602 is at ground (GND) potential and functions, for example, as a well contact.

[0170] Here, as shown in FIG. 74, when the FD section 601 and the ground section 602 each have a regular octagonal shape, the width g of the slit 312 (the vertical length in FIG. 74) is narrower than the width f of the slit 312 shown in FIG. 75 (the vertical length in FIG. 75). In FIG. 74, the ratio of the width g of the slit 312 to the cell pitch of the cell region (the vertical length in FIG. 74) is increased from the viewpoint of optical factors (improvement of Qe and suppression of color mixing) or for further miniaturization. For example, when the width g of the slit 312 shown in FIG. 74 is increased, the region (dividing portion) of the slit 312 is brought closer to the FD section 601 (e.g., N+ diffusion layer) and the ground section 602 (e.g., P+ diffusion layer). As a result, the FD section 601 and the ground section 602 interfere with the region of the slit 312, which may result in increased variation in single-pixel Qs and deterioration of FD white spots.

[0171] Therefore, in this embodiment, as shown in FIG. 73, the FD section 601 and the ground section 602 each have a horizontally elongated shape. For example, in each of the FD section 601 and the ground section 602, the length in the extension direction of the protrusion 304 is shorter than the length in the direction perpendicular to the extension direction of the protrusion 304. As a result, the FD section 601 and the ground section 602 are located farther from the region (division portion) of the slit 312 than in FIG. 74. Therefore, the influence of diffusion of the FD section 601 and the ground section 602 on the potential in the region of the slit 312 is suppressed, thereby suppressing an increase in single-pixel Qs variation and FD white spot degradation. Furthermore, the shape of each transfer gate 400a, 400b, for example, the shape of the transfer gate 400a, 400b on the slit 312 side, can be enlarged, thereby realizing transfer improvement (improvement of transfer characteristics) and suppression of potential barrier variation.

[0172] Furthermore, in this embodiment, the ground section 602 can be modified as follows. Therefore, the detailed configuration of the ground section 602 will be described with reference to Fig. 75 to Fig. 78. Fig. 75 to Fig. 78 are explanatory diagrams showing a plan view of the image sensor 100 according to this embodiment, and more specifically, correspond to cross sections of the image sensor 100 cut along the planar direction.

[0173] As shown in FIG. 75, in this embodiment, ground portions 602 are provided at two of the four corners of the cell region. These ground portions 602 are shared by four adjacent cell regions. In the example of FIG. 75, they are provided at the bottom left and bottom right of the four corners of the cell region. Each ground portion 602 is offset from the FD portion 601 by half the cell pitch of the cell region (the length in the horizontal direction in FIG. 75). This means that each ground portion 602 is further away from the slit 312 region than in FIGS. 73 and 74. Therefore, it is possible to reliably suppress an increase in single-pixel Qs variation, FD white spot degradation, and the like.

[0174] 76, in this embodiment, the ground section 602 shown in FIG. 75 is rotated by 90 degrees (other configurations are the same as those in FIG. 75). As a result, each ground section 602 is further away from the area of ​​the slit 312 than in FIG. 75. Therefore, it is possible to more reliably suppress an increase in single-pixel Qs variation, FD white spot degradation, and the like.

[0175] 77, in this embodiment, the ground portion 602 shown in FIG. 75 is formed in a regular octagon (other configurations are the same as those in FIG. 75). Even in this case, each ground portion 602 is located farther from the region of the slit 312 than in FIG. 74. Therefore, it is possible to reliably suppress an increase in single-pixel Qs variation, FD white spot degradation, and the like.

[0176] 78, in this embodiment, the FD section 601 shown in FIG. 77 is formed in a regular octagon, and the shape of each transfer gate 400a, 400b is the same as that in FIG. 74 (other configurations are the same as those in FIG. 77). Even in this case, each ground section 602 is located farther from the region of the slit 312 than in FIG. 74. Therefore, it is possible to reliably suppress an increase in single-pixel Qs variation, FD white spot deterioration, and the like.

[0177] The shapes of the FD section 601 and the ground section 602 may be the same (see FIGS. 73 to 76 and 78) or different (see FIG. 77). The shape of the FD section 601 or the ground section 602 may be a shape having long and short sides, for example, a shape that is symmetrical in the vertical and horizontal directions (see FIGS. 73 to 78), or a shape that is asymmetrical in the vertical and horizontal directions.

[0178] Furthermore, the FD section 601 and the ground section 602 are arranged in an array (for example, in a matrix along the row and column directions), but may be arranged at the same pitch as the cell pitch of the cell area, or may be arranged offset by half a pitch from each other.

[0179] Furthermore, the shape of the FD section 601 and the ground section 602 may be, for example, another polygonal shape other than an octagonal shape having long and short sides, or may be an elliptical shape.

[0180] <<16. Summary>> As described above, according to each embodiment of the present disclosure, an element that separates the pair of pixels 300 a and 300 b during phase difference detection is provided, and in addition to the separating element, an element that functions as an overflow path during normal shooting is provided. This makes it possible to improve the accuracy of phase difference detection while avoiding degradation of the captured image.

[0181] In the above-described embodiment of the present disclosure, a case has been described in which the present disclosure is applied to a back-illuminated CMOS image sensor structure, but the embodiment of the present disclosure is not limited to this and may be applied to other structures.

[0182] In the above-described embodiment of the present disclosure, the image sensor 100 is described in which the first conductivity type is N-type, the second conductivity type is P-type, and electrons are used as signal charges, but the embodiment of the present disclosure is not limited to this example. For example, this embodiment can be applied to an image sensor 100 in which the first conductivity type is P-type, the second conductivity type is N-type, and holes are used as signal charges.

[0183] In the above-described embodiments of the present disclosure, the semiconductor substrate 10 does not necessarily have to be a silicon substrate, but may be another substrate (for example, an SOI (Silicon On Insulator) substrate, a SiGe substrate, etc.) The semiconductor substrate 10 may also be one in which a semiconductor structure or the like is formed on such various substrates.

[0184] Furthermore, the imaging device 1 according to the embodiment of the present disclosure is not limited to an imaging device that detects the distribution of incident light amount of visible light and captures an image. For example, the present embodiment can be applied to an imaging device that captures the distribution of incident amounts of infrared rays, X-rays, particles, etc. as an image, or an imaging device (physical quantity distribution detection device) such as a fingerprint detection sensor that detects the distribution of other physical quantities such as pressure or capacitance and captures an image.

[0185] Furthermore, the imaging device 1 according to the embodiment of the present disclosure can be manufactured using methods, devices, and conditions that are used in the manufacture of general semiconductor devices. That is, the imaging device 1 according to the present embodiment can be manufactured using existing semiconductor device manufacturing processes.

[0186] Examples of the above-mentioned methods include physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD). Examples of PVD methods include vacuum deposition, electron beam (EB) deposition, various sputtering methods (magnetron sputtering, RF (radio frequency)-direct current (DC) combined bias sputtering, electron cyclotron resonance (ECR) sputtering, facing target sputtering, and high-frequency sputtering), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, metalorganic (MO) CVD, and photo-CVD. Other methods include electroplating, electroless plating, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing, stamping, spraying, and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Furthermore, patterning methods include chemical etching such as shadow masking, laser transfer, and photolithography, and physical etching using ultraviolet light or lasers. Additionally, planarization techniques include chemical mechanical polishing (CMP), laser planarization, and reflow.

[0187] In the above-described embodiment of the present disclosure, the structures of the protrusions (examples of separation portions) 304 and 324, the additional walls (examples of separation portions) 308, 308a, 308b, and 308c, and the pixel separation walls (examples of separation portions) 334 and 334a have been described, but the structures according to the embodiments of the present disclosure are not limited to these. Various aspects of the structure of each portion will now be described in detail with reference to Figures 79 to 84.

[0188] Fig. 79 is an explanatory diagram showing a plane of the imaging element 100 according to this embodiment (variation), and more specifically, corresponds to a cross section obtained by cutting the imaging element 100 along the planar direction. Fig. 80 is an explanatory diagram showing a portion of a cross section of the imaging element 100 for each structure according to this embodiment (variation), i.e., the semiconductor substrate 10 for each structure, and more specifically, corresponds to a cross section obtained by cutting the semiconductor substrate 10 for each structure along line JJ' shown in Fig. 79.

[0189] As shown in FIGS. 79 and 80, the pixel isolation wall 334 is formed in one of the following structures: RDTI (back surface DTI), FDTI (front surface DTI), FFTI (front surface FTI: Full Trench Isolation), RFTI (back surface FTI), and RDTI+FDTI. In these structures, a trench T3 is formed in the thickness direction of the semiconductor substrate 10. A material such as an oxide film is filled in the trench T3. Note that in the example of FIG. 80, the trench T3 is formed in a tapered shape that widens from the surface of the semiconductor substrate 10 toward the inside, but this is not limited to this. For example, the trench T3 may be formed straight so as to be perpendicular (or approximately perpendicular) to the surface of the semiconductor substrate 10.

[0190] RDTI is a structure in which a trench T3 is formed from the back surface 10a (light-receiving surface 10a) of the semiconductor substrate 10 to partway through the semiconductor substrate 10. FDTI is a structure in which a trench is formed from the front surface 10b (the surface opposite the light-receiving surface 10a) of the semiconductor substrate 10 to partway through the semiconductor substrate 10. FFTI is a structure in which a trench T3 is formed penetrating from the front surface 10b to the back surface 10a of the semiconductor substrate 10. RFTI is a method in which a trench T3 is formed penetrating from the back surface 10a to the front surface 10b of the semiconductor substrate 10. RDTI+FDTI is a method that combines the above-mentioned RDTI and FDTI. In RDTI+FDTI, the trench T3 extending from the back surface 10a and the trench T3 extending from the front surface 10b are connected near the center in the thickness direction of the semiconductor substrate 10.

[0191] Fig. 81 is an explanatory diagram showing a plane of the imaging element 100 according to this embodiment (variant), and more specifically, corresponds to a cross section obtained by cutting the imaging element 100 along the planar direction. Fig. 82 is an explanatory diagram showing a portion of a cross section of the imaging element 100 for each structure according to this embodiment (variant), i.e., the semiconductor substrate 10 for each structure, and more specifically, corresponds to a cross section obtained by cutting the semiconductor substrate 10 for each structure along line KK' shown in Fig. 81.

[0192] As shown in FIGS. 81 and 82, the protruding portion 304 is formed in any one of the following structures: RDTI, FDTI, FFTI, RFTI, or RDTI+FDTI, similar to the pixel isolation wall 334 described above (see FIG. 80). In these structures, the trench T3 is formed in the thickness direction of the semiconductor substrate 10. At this time, as shown in FIG. 82, the trench T3 is formed so that the protruding portion 304 contacts the element isolation wall 310 and is not spaced apart from it. A material that will become an oxide film or the like is filled into the trench T3. In the example of FIG. 82, the trench T3 is formed in a tapered shape that widens from the surface of the semiconductor substrate 10 toward the inside, but this is not limited thereto. For example, the trench T3 may be formed straight so as to be perpendicular (or approximately perpendicular) to the surface of the semiconductor substrate 10.

[0193] Here, the pixel isolation wall 334 may have a structure other than a single pixel isolation wall 334 that is not in contact with the element isolation wall 310 as shown in FIG. 79. For example, as shown in FIG. 83, a plurality of pixel isolation walls 334 may be formed in a dotted row so as to be in no contact with the element isolation wall 310. In the example of FIG. 83, the number of pixel isolation walls 334 is six, but this number is not limited thereto. Furthermore, as shown in FIG. 84, the pixel isolation wall 334 may be formed so that both ends thereof are in contact with the element isolation wall 310. Note that in the examples of FIGS. 79, 83, and 84, the pixel isolation wall 334 is formed in the column direction, but this is not limited thereto and may be formed in the row direction, for example.

[0194] Furthermore, the above-described RDTI, FDTI, FFTI, RFTI, and RDTI+FDTI structures can be applied not only to the pixel separation wall 334 and protrusion 304 described above, but also to the second protrusion 324, pixel separation wall 334a, and additional walls 308, 308a, 308b, and 308c according to each of the above-described embodiments.

[0195] Although the above-described embodiments of the present disclosure have been described with reference to applications to a single-layer CMOS image sensor structure, the embodiments of the present disclosure are not limited thereto and may be applied to other structures, such as a stacked CMOS image sensor (CIS) structure. For example, as shown in FIGS. 85 to 87, embodiments of the present disclosure may be applied to a two-layer stacked CIS, a three-layer stacked CIS, a two-tier pixel CIS, etc. Application to a two-tier pixel CIS is an example, and application to a single-tier pixel CIS is also possible. Here, the structures of a two-layer stacked CIS, a three-layer stacked CIS, and a two-tier pixel CIS will be described in detail with reference to FIGS. 85 to 87.

[0196] (2-layer laminated CIS) An example of a two-layer stacked structure to which an embodiment of the present disclosure can be applied is shown in Fig. 85. Fig. 85 is an explanatory diagram showing a cross section of a two-layer stacked structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied.

[0197] In the structure shown in FIG. 85, the imaging device 1 is configured by electrically connecting the pixel region (pixel array section 20) and control circuit section 25 on the first semiconductor substrate 31 side to the logic circuit (not shown) on the second semiconductor substrate 45 side by one through-connection conductor 84 formed in the first semiconductor substrate 31. That is, in the example of FIG. 85, the first semiconductor substrate 31 and the second semiconductor substrate 45 are stacked, and these semiconductor substrates 31 and 45 are electrically connected by the through-connection conductor 84. In detail, a through-connection hole 85 is formed from the back surface 31b side of the first semiconductor substrate, penetrating the first semiconductor substrate 31 to reach the wiring 53 in the uppermost layer of the second semiconductor substrate 45, and also to reach the wiring 40 in the uppermost layer of the first semiconductor substrate 31. After forming an insulating film 63 on the inner wall surface of the through-connection hole 85, the through-connection conductor 84 that connects the wiring 40 on the pixel region and control circuit section 25 side to the wiring 53 on the logic circuit side is buried in the through-connection hole 85. In FIG. 85, the through-connection conductor 84 is connected to the wiring 40 in the uppermost layer, and therefore the wirings 40 in each layer are connected to each other so that the wiring 40 in the uppermost layer to which this is connected serves as the connection end.

[0198] In the structure shown in Fig. 85, a photodiode (PD) serving as a photoelectric conversion unit of each pixel is formed in a semiconductor well region 32 of a first semiconductor substrate 31. Furthermore, source / drain regions 33 of each pixel transistor are formed in the semiconductor well region 32. The semiconductor well region 32 is formed by introducing, for example, p-type impurities, and the source / drain regions 33 are formed by introducing, for example, n-type impurities. Specifically, the photodiode (PD) and the source / drain regions 33 of each pixel transistor are formed by ion implantation from the substrate surface.

[0199] The photodiode (PD) has an n-type semiconductor region 34 and a p-type semiconductor region 35 on the substrate surface side. A gate electrode 36 is formed on the substrate surface constituting the pixel via a gate insulating film, and pixel transistors Tr1 and Tr2 are formed by the gate electrode 36 and a pair of source / drain regions 33. For example, the pixel transistor Tr1 adjacent to the photodiode (PD) corresponds to a transfer transistor, and its source / drain region corresponds to a floating diffusion (FD). Each unit pixel is isolated by an element isolation region 38.

[0200] Also, MOS transistors Tr3 and Tr4 constituting a control circuit are formed on the first semiconductor substrate 31. Each of the MOS transistors Tr3 and Tr4 is formed by an n-type source / drain region 33 and a gate electrode 36 formed via a gate insulating film. Furthermore, a first interlayer insulating film 39 is formed on the surface of the first semiconductor substrate 31, and connecting conductors 44 connected to required transistors are formed within the interlayer insulating film 39. In addition, a multilayer wiring layer 41 is formed by multiple layers of wiring 40 via the interlayer insulating film 39 so as to connect to each connecting conductor 44.

[0201] As shown in FIG. 85, a p-type semiconductor well region 46 on the surface side of a second semiconductor substrate 45 has formed therein a plurality of MOS transistors constituting a logic circuit separated by element isolation regions 50. Each of the MOS transistors Tr6, Tr7, and Tr8 has a pair of n-type source / drain regions 47 and a gate electrode 48 formed via a gate insulating film. A first interlayer insulating film 49 is formed on the surface of the second semiconductor substrate 45, and connecting conductors 54 connected to required transistors are formed within the interlayer insulating film 49. A connecting conductor 51 is further provided, penetrating from the surface of the interlayer insulating film 49 to a desired depth within the second semiconductor substrate 45. An insulating film 52 is further provided to insulate the connecting conductor 51 from the semiconductor substrate 45.

[0202] Furthermore, a multilayer wiring layer 55 is formed by providing multiple layers of wiring 53 within the interlayer insulating film 49 so as to connect to each of the connection conductors 54 and the connection conductors 51 for taking out the electrodes.

[0203] Furthermore, as shown in FIG. 85, the first semiconductor substrate 31 and the second semiconductor substrate 45 are bonded together so that the multilayer wiring layers 41 and 55 face each other.

[0204] As shown in FIG. 85, on-chip color filters 74 of, for example, red (R), green (G), and blue (B) are provided on the planarization film 73 in correspondence with each pixel, and on-chip microlenses 75 are provided thereon.

[0205] On the other hand, on the second semiconductor substrate 45 side, an opening 77 corresponding to the connection conductor 51 is provided, and a spherical electrode bump 78 electrically connected to the connection conductor 51 through the opening 77 is provided.

[0206] (3-layer laminated CIS) An example of a three-layer stacked structure to which an embodiment of the present disclosure can be applied is shown in Fig. 86. Fig. 86 is an explanatory diagram showing a cross section of a three-layer stacked structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied.

[0207] 86, the imaging device 1 has a three-layer structure in which a first semiconductor substrate 211, a second semiconductor substrate 212, and a third semiconductor substrate 213 are stacked. In detail, the structure shown in Fig. 86 includes, for example, the first semiconductor substrate 211 on which a sensor circuit is formed, the second semiconductor substrate 212 on which a logic circuit is formed, and the third semiconductor substrate 213 on which a memory circuit is formed. Note that the logic circuit and the memory circuit are configured to operate by inputting and outputting signals to and from the outside, respectively.

[0208] As shown in FIG. 86, a photodiode (PD) 234 serving as a photoelectric conversion unit of a pixel is formed on the first semiconductor substrate 211, and the source / drain regions of each pixel transistor are formed in the semiconductor well region. Furthermore, a gate electrode is formed on the substrate surface of the first semiconductor substrate 211 via a gate insulating film, and the pixel transistors Tr1 and Tr2 are formed by the gate electrode and the paired source / drain regions. In detail, the pixel transistor Tr1 adjacent to the photodiode (PD) 234 corresponds to a transfer transistor, and its source / drain region corresponds to a floating diffusion (FD). Furthermore, an interlayer insulating film (not shown) is provided on the first semiconductor substrate 211, and a connection conductor 244 connected to the pixel transistors Tr1 and Tr2 is provided in the interlayer insulating film.

[0209] Furthermore, the first semiconductor substrate 211 is provided with a contact 265 used for electrical connection with the second semiconductor substrate 212. The contact 265 is connected to a contact 311 of the second semiconductor substrate 212, which will be described later, and is also connected to a pad 280a of the first semiconductor substrate 211.

[0210] On the other hand, a logic circuit is formed on the second semiconductor substrate 212. In detail, a plurality of transistors constituting the logic circuit, namely, MOS transistor Tr6, MOS transistor Tr7, and MOS transistor Tr8, are formed in a p-type semiconductor well region (not shown) of the second semiconductor substrate 212. Also, on the second semiconductor substrate 212, a connection conductor 254 is formed which is connected to the MOS transistor Tr6, MOS transistor Tr7, and MOS transistor Tr8.

[0211] Furthermore, a contact 311 is formed on the second semiconductor substrate 212 to be used for electrical connection with the first semiconductor substrate 211 and the third semiconductor substrate 213. The contact 311 is connected to the contact 265 of the first semiconductor substrate 211 and also to the pad 330a of the third semiconductor substrate 213.

[0212] Furthermore, a memory circuit is formed on the third semiconductor substrate 213. In detail, a plurality of transistors constituting the memory circuit, that is, a MOS transistor Tr11, a MOS transistor Tr12, and a MOS transistor Tr13, are formed in a p-type semiconductor well region (not shown) of the third semiconductor substrate 213.

[0213] Furthermore, on the third semiconductor substrate 213, a connection conductor 344 is formed which is connected to the MOS transistor Tr11, the MOS transistor Tr12, and the MOS transistor Tr13.

[0214] (2-level pixel CIS) An example of a two-tiered pixel structure to which an embodiment of the present disclosure can be applied is shown in Fig. 87. Fig. 87 is an explanatory diagram showing a cross section of a two-tiered pixel structure to which an imaging device 1 according to an embodiment of the present disclosure can be applied.

[0215] In the structure shown in FIG. 87, the first substrate 80 is configured by laminating an insulating layer 86 on the semiconductor substrate 11. The first substrate 80 has the insulating layer 86 as part of an interlayer insulating film 87. The insulating layer 86 is provided in the gap between the semiconductor substrate 11 and a semiconductor substrate 21A, which will be described later. The first substrate 80 has a photodiode PD (83), a transfer transistor TR, and a floating diffusion FD. The first substrate 80 is configured such that the transfer transistor TR and the floating diffusion FD are provided on the front surface side of the semiconductor substrate 11 (the side opposite the light incident surface side, the second substrate 20A side).

[0216] 87, the transfer transistor TR has a planar transfer gate TG. However, the configuration is not limited to this, and the transfer gate TG may be a vertical transfer gate that penetrates the well layer 42.

[0217] The second substrate 20A is configured by laminating an insulating layer 88 on the semiconductor substrate 21A. The second substrate 20A has the insulating layer 88 as part of an interlayer insulating film 87. The insulating layer 88 is provided in the gap between the semiconductor substrate 21A and the semiconductor substrate 81. The second substrate 20A has a readout circuit 22A. Specifically, the second substrate 20A is configured such that the readout circuit 22A is provided on the front surface side (the third substrate 30 side) of the semiconductor substrate 21A. The second substrate 20A is bonded to the first substrate 80 with the back surface of the semiconductor substrate 21A facing the front surface side of the semiconductor substrate 11. In other words, the second substrate 20A is bonded to the first substrate 80 face-to-back. The second substrate 20A further has an insulating layer 89 that penetrates the semiconductor substrate 21A in the same layer as the semiconductor substrate 21A. The second substrate 20A has the insulating layer 89 as part of the interlayer insulating film 87.

[0218] The stacked body made up of the first substrate 80 and the second substrate 20A has an interlayer insulating film 87 and through wiring 90 provided in the interlayer insulating film 87. Specifically, the through wiring 90 is electrically connected to the floating diffusion FD and a connection wiring 91 described below. The second substrate 20A further has, for example, a wiring layer 56 on the insulating layer 88.

[0219] The wiring layer 56 further has, for example, a plurality of pad electrodes 58 in the insulating layer 57. Each pad electrode 58 is formed of a metal such as Cu (copper) or Al (aluminum). Each pad electrode 58 is exposed on the surface of the wiring layer 56. Each pad electrode 58 is used to electrically connect the second substrate 20A and the third substrate 30 and to bond the second substrate 20A and the third substrate 30 together.

[0220] The third substrate 30 is formed, for example, by laminating an interlayer insulating film 61 on a semiconductor substrate 81. As will be described later, the third substrate 30 is bonded to the second substrate 20A with their front surfaces facing each other. The third substrate 30 is configured such that a logic circuit 82 is provided on the front surface of the semiconductor substrate 81. The third substrate 30 further includes, for example, a wiring layer 62 on the interlayer insulating film 61. The wiring layer 62 includes, for example, an insulating layer 92 and a plurality of pad electrodes 64 provided in the insulating layer 92. The plurality of pad electrodes 64 are electrically connected to the logic circuit 82. Each pad electrode 64 is formed, for example, from Cu (copper). Each pad electrode 64 is exposed on the surface of the wiring layer 62. Each pad electrode 64 is used to electrically connect the second substrate 20A and the third substrate 30 and to bond the second substrate 20A and the third substrate 30 together.

[0221] When the technology of the present disclosure is applied to a single-stage pixel (normal CIS), as an example, in the image sensor 100, transistors (e.g., CMOS transistors) other than the transfer gates 400a and 400b can be arranged in the two pixel transistor regions Ra and Rb, as shown in FIG. 88. The floating diffusion FD is provided adjacent to the transfer gates 400a and 400b. In the example of FIG. 88, the pixel transistor regions Ra and Rb are formed to sandwich the pixel region Rc including the pixels 300a and 300b. The pixel transistor region Ra on the left side in FIG. 88 is arranged with a selection transistor SEL and an amplification transistor AMP, and the pixel transistor region Rb on the right side in FIG. 88 is arranged with a reset transistor RST. The pixel sharing scheme, transistor arrangement, embedded photodiode structure, etc. shown in FIG. 88 are merely examples and are not limited thereto.

[0222] Alternatively, the image sensor 100 shown in FIG. 88 may be arranged (repeatedly arranged) as shown in FIG. 89, with one selection transistor SEL, one amplification transistor AMP, one reset transistor RST, and one FD transfer transistor FDG arranged in each pixel transistor region Ra, Rb of each image sensor 100. The FD transfer transistor FDG is used to switch the conversion efficiency. The arrangement of each transistor may be uniform or uneven for each pixel transistor region Ra, Rb. For example, multiple amplification transistors AMP may be arranged for four image sensors 100, and these amplification transistors AMP may be arranged in parallel.

[0223] <<17. Camera Application Example>> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure may be applied to a camera or the like. Therefore, with reference to FIG. 90, a configuration example of a camera 700 as an electronic device to which the present technology is applied will be described. FIG. 90 is an explanatory diagram showing an example of a schematic functional configuration of a camera 700 to which the technology according to the present disclosure (the present technology) can be applied.

[0224] As shown in FIG. 90, the camera 700 includes an imaging device 702, an optical lens 710, a shutter mechanism 712, a drive circuit unit 714, and a signal processing circuit unit 716. The optical lens 710 focuses image light (incident light) from a subject on the imaging surface of the imaging device 702. This causes signal charges to accumulate in the image sensor 100 of the imaging device 702 for a certain period of time. The shutter mechanism 712 opens and closes to control the light irradiation period and light blocking period of the imaging device 702. The drive circuit unit 714 supplies drive signals to the imaging device 702 that control the signal transfer operation and the shutter operation of the shutter mechanism 712. In other words, the imaging device 702 transfers signals based on the drive signals (timing signals) supplied from the drive circuit unit 714. The signal processing circuit unit 716 performs various signal processing. For example, the signal processing circuit unit 716 outputs the processed video signal to a storage medium (not shown) such as a memory, or to a display unit (not shown).

[0225] <<18. Smartphone Application Examples>> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure may be applied to a smartphone or the like. Therefore, with reference to Fig. 91, a configuration example of a smartphone 900 as an electronic device to which the present technology is applied will be described. Fig. 91 is a block diagram showing an example of a schematic functional configuration of a smartphone 900 to which the technology according to the present disclosure (the present technology) can be applied.

[0226] 91, the smartphone 900 includes a CPU (Central Processing Unit) 901, a ROM (Read Only Memory) 902, and a RAM (Random Access Memory) 903. The smartphone 900 also includes a storage device 904, a communication module 905, and a sensor module 907. The smartphone 900 also includes an imaging device 909, a display device 910, a speaker 911, a microphone 912, an input device 913, and a bus 914. The smartphone 900 may also include a processing circuit such as a DSP (Digital Signal Processor) instead of or in addition to the CPU 901.

[0227] The CPU 901 functions as an arithmetic processing device and a control device, and controls all or part of the operations of the smartphone 900 in accordance with various programs recorded in the ROM 902, the RAM 903, the storage device 904, or the like. The ROM 902 stores programs and calculation parameters used by the CPU 901. The RAM 903 temporarily stores programs used in the execution of the CPU 901 and parameters that change as appropriate during the execution. The CPU 901, the ROM 902, and the RAM 903 are interconnected by a bus 914. The storage device 904 is a data storage device configured as an example of a storage unit of the smartphone 900. The storage device 904 is configured, for example, by a magnetic storage device such as an HDD (Hard Disk Drive), a semiconductor storage device, an optical storage device, or the like. The storage device 904 stores the programs and various data executed by the CPU 901, as well as various data acquired from the outside.

[0228] The communication module 905 is, for example, a communication interface configured with a communication device for connecting to a communication network 906. The communication module 905 may be, for example, a communication card for a wired or wireless local area network (LAN), Bluetooth (registered trademark), or wireless USB (WUSB). The communication module 905 may also be a router for optical communication, a router for asymmetric digital subscriber line (ADSL), or a modem for various types of communication. The communication module 905 transmits and receives signals, for example, between the Internet and other communication devices using a predetermined protocol such as TCP (Transmission Control Protocol) / IP (Internet Protocol). The communication network 906 connected to the communication module 905 is a network connected by wire or wirelessly, for example, the Internet, a home LAN, infrared communication, or satellite communication.

[0229] The sensor module 907 includes various sensors such as a motion sensor (e.g., an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.), a biometric sensor (e.g., a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.), or a position sensor (e.g., a GNSS (Global Navigation Satellite System) receiver, etc.).

[0230] The imaging device 909 is provided on the surface of the smartphone 900 and can capture an image of an object located on the back or front side of the smartphone 900. In particular, the imaging device 909 can include an imaging element (not shown) such as a CMOS (Complementary MOS) image sensor to which the technology according to the present disclosure (the present technology) can be applied, and a signal processing circuit (not shown) that performs imaging signal processing on a signal photoelectrically converted by the imaging element. Furthermore, the imaging device 909 can further include an optical system mechanism (not shown) including an imaging lens, a zoom lens, a focus lens, and the like, and a drive system mechanism (not shown) that controls the operation of the optical system mechanism. The imaging element collects incident light from an object as an optical image, and the signal processing circuit photoelectrically converts the formed optical image on a pixel-by-pixel basis, reads out the signal of each pixel as an imaging signal, and performs image processing to obtain a captured image.

[0231] The display device 910 is provided on the surface of the smartphone 900, and can be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display. The display device 910 can display an operation screen, captured images acquired by the above-described imaging device 909, and the like.

[0232] The speaker 911 can output, for example, a call voice, a voice accompanying the video content displayed by the display device 910 described above, and the like to the user.

[0233] The microphone 912 can collect, for example, the user's call voice, voice including a command to activate a function of the smartphone 900, and voice from the surrounding environment of the smartphone 900.

[0234] The input device 913 is a device operated by a user, such as a button, a keyboard, a touch panel, or a mouse. The input device 913 includes an input control circuit that generates an input signal based on information input by the user and outputs the signal to the CPU 901. By operating the input device 913, the user can input various data to the smartphone 900 and instruct processing operations.

[0235] The above describes an example of the configuration of the smartphone 900. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be changed as appropriate depending on the technical level at the time of implementation.

[0236] <<19. Application example to endoscopic surgery system>> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0237] FIG. 92 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0238] Figure 92 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0239] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0240] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens towards an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0241] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected onto the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0242] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0243] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0244] The light source device 11203 is configured from a light source such as an LED (Light Emitting Diode), and supplies irradiation light to the endoscope 11100 when photographing an operation site or the like.

[0245] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiating light, magnification, focal length, etc.) of the endoscope 11100.

[0246] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0247] The light source device 11203 that supplies illumination light to the endoscope 11100 when photographing the surgical site can be configured from a white light source configured from, for example, an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, making it possible to adjust the white balance of the captured image in the light source device 11203. In this case, it is also possible to capture images corresponding to each RGB color in a time-division manner by irradiating the object of observation with laser light from each RGB laser light source in a time-division manner and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0248] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.

[0249] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow-band imaging. Alternatively, special light observation may be performed using fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation can involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0250] FIG. 93 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0251] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so that they can communicate with each other.

[0252] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0253] The imaging unit 11402 is configured with an imaging element. The imaging element constituting the imaging unit 11402 may be one (a so-called single-chip type) or multiple (a so-called multi-chip type). When the imaging unit 11402 is configured with a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured with a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. 3D display enables the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is configured with a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0254] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0255] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0256] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0257] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0258] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0259] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0260] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0261] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0262] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data sent from the camera head 11102 .

[0263] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0264] Furthermore, the control unit 11413 causes the display device 11202 to display a captured image showing the surgical site, etc., based on the image signal that has been image processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0265] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0266] In the illustrated example, communication is performed by wire using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0267] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the endoscope 11100, the camera head 11102 (the imaging unit 11402), the CCU 11201 (the image processing unit 11412), etc., among the above-described configurations.

[0268] Although an endoscopic surgery system has been described as an example here, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0269] <<20. Mobile Application Examples>> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0270] FIG. 94 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology of the present disclosure can be applied.

[0271] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 94, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0272] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating a braking force of the vehicle, etc.

[0273] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches may be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0274] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc., based on the received images.

[0275] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0276] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0277] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drivetrain control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including avoiding or mitigating collisions between vehicles, following based on the distance between vehicles, maintaining vehicle speed, warning of vehicle collisions, or warning of vehicle lane departure.

[0278] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0279] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information about the outside of the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0280] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 94, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0281] FIG. 95 is a diagram showing an example of the installation position of the imaging unit 12031.

[0282] In FIG. 95, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0283] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by the imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0284] 95 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.

[0285] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0286] For example, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (for example, 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of automatic driving, which runs autonomously without relying on driver operation.

[0287] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drivetrain control unit 12010.

[0288] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the images captured by the image capturing units 12101 to 12104. The pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104, which are infrared cameras, and then performing pattern matching on a series of feature points that indicate the outline of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0289] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the image capture unit 12031 and the like among the above-described configurations.

[0290] <<21. Supplementary Information>> Although the preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person skilled in the art of the present disclosure can conceive of various modified or altered examples within the scope of the technical idea described in the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure.

[0291] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that will be apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0292] The present technology can also be configured as follows. (1A) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; Equipped with Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; an element isolation wall surrounding the plurality of pixels and provided to penetrate the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first isolation portion provided in a region surrounded by the element isolation wall and isolating the plurality of pixels; and the first isolation portion is provided so as to extend in a thickness direction of the semiconductor substrate, the first isolation portion includes, when viewed from above the light-receiving surface, a first region in contact with the element isolation wall and a second region in contact with the first region, and the second region has a width greater than that of the first region; Imaging device. (2A) The second region is provided closer to the center of the image sensor than the first region. The imaging device according to (1A) above. (3A) the first separation portion has an extension portion and a protrusion portion, When viewed from above the light receiving surface, the surface of the extension portion is the first region, and the surface of the protrusion portion is the second region. The imaging device according to (1A) or (2A) above. (4A) When viewed from above the light receiving surface, the width of the protrusion is longer than the line width of the extension. The imaging device according to (3A) above. (5A) The first separation portion is formed in a T-shape when viewed from above the light receiving surface. The imaging device according to any one of (1A) to (4A) above. (6A) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; an imaging device having Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; an element isolation wall surrounding the plurality of pixels and provided to penetrate the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first isolation portion provided in a region surrounded by the element isolation wall and isolating the plurality of pixels; and the first isolation portion is provided so as to extend in a thickness direction of the semiconductor substrate, the first isolation portion includes, when viewed from above the light-receiving surface, a first region in contact with the element isolation wall and a second region in contact with the first region, and the second region has a width greater than that of the first region; electronic equipment. (1) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; Equipped with Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; an element isolation wall surrounding the plurality of pixels and provided to penetrate the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first isolation portion provided in a region surrounded by the element isolation wall and isolating the plurality of pixels; and the first isolation portion is provided so as to extend in a thickness direction of the semiconductor substrate, a first diffusion region containing impurities of a second conductivity type having a conductivity type opposite to the first conductivity type is provided in a region located around the first isolation portion and extending in a thickness direction of the semiconductor substrate; Imaging device. (2) Two first separation units are provided, the two first separation portions extend so as to separate the plurality of pixels when viewed from above the light receiving surface, and face each other; the first diffusion region is provided in a region between the two first isolation portions; The imaging device according to (1) above. (3) an overflow path for transferring saturated charges between the plurality of pixels is provided in a region between the two first isolation portions; The imaging device according to (2) above. (4) each of the two first isolation parts is provided so as to penetrate the semiconductor substrate along a thickness direction of the semiconductor substrate; The imaging device according to (2) or (3) above. (5) each of the two first separation portions is provided to extend from the light-receiving surface of the semiconductor substrate or a surface of the semiconductor substrate opposite to the light-receiving surface to a midpoint of the semiconductor substrate along a thickness direction of the semiconductor substrate; The imaging device according to (2) or (3) above. (6) the two first isolation portions protrude from the element isolation wall toward the center of the image sensor and face each other when viewed from above the light receiving surface; The imaging device according to any one of (2) to (5) above. (7) the two first isolation portions protrude from the element isolation wall along the column direction when viewed from above the light-receiving surface; The imaging device according to any one of (2) to (6) above. (8) the two first separation units are provided so as to be positioned at the center of the image sensor in the row direction when viewed from above the light receiving surface. The imaging device according to (7) above. (9) the two first separation units are provided at positions shifted a predetermined distance from the center of the image sensor in the row direction when viewed from above the light receiving surface. The imaging device according to (7) above. (10) the two first isolation portions protrude from the element isolation wall along the row direction when viewed from above the light-receiving surface; The imaging device according to any one of (2) to (6) above. (11) the two first separation units are provided so as to be positioned at the center of the image sensor in the column direction when viewed from above the light receiving surface. The imaging device according to (10) above. (12) the two first separation units are provided at positions shifted a predetermined distance from the center of the image sensor in the column direction when viewed from above the light receiving surface; The imaging device according to (10) above. (13) When viewed from above the light receiving surface, the two first separation portions have the same length. The imaging device according to any one of (2) to (12) above. (14) When viewed from above the light receiving surface, the lengths of the two first separation portions are different from each other. The imaging device according to any one of (2) to (12) above. (15) When viewed from above the light receiving surface, the light receiving device further includes two second separation portions that extend in directions different from the directions in which the two first separation portions extend and that face each other, each of the two second isolation portions is provided to extend in a thickness direction of the semiconductor substrate; a second diffusion region containing impurities of the second conductivity type is provided in a region between the two second isolation portions; The imaging device according to any one of (2) to (14) above. (16) one or more additional walls provided between the two first separation portions; The imaging device according to any one of (2) to (15) above. (17) The additional wall is provided so as to penetrate the semiconductor substrate. The imaging device according to (16) above. (18) the additional wall is provided so as to extend from the light receiving surface to a middle of the semiconductor substrate along a thickness direction of the semiconductor substrate. The imaging device according to (16) above. (19) the additional wall is provided so as to extend along a thickness direction of the semiconductor substrate from a surface of the semiconductor substrate opposite to the light receiving surface to a partway through the semiconductor substrate. The imaging device according to (16) above. (20) a length of the additional wall in the thickness direction is determined according to a wavelength of the incident light incident on the light receiving surface; The imaging device according to (19) above. (twenty one) When viewed from above the light receiving surface, the width of the central portion of the additional wall is narrower than the width of both end portions of the additional wall. The imaging device according to (19) or (20) above. (twenty two) a length in the thickness direction of a central portion of the additional wall is shorter than a length in the thickness direction of both end portions of the additional wall; The imaging device according to any one of (19) to (21) above. (twenty three) When viewed from above the light receiving surface, the width of one or both of the two first separation portions is narrower than the width of the additional wall. The imaging device according to any one of (19) to (22) above. (twenty four) the two first separation portions are provided so as to extend along a thickness direction of the semiconductor substrate from a surface of the semiconductor substrate opposite to the light receiving surface to a midpoint of the semiconductor substrate; The imaging device according to any one of (19) to (23) above. (twenty five) The length of the additional wall in the thickness direction is shorter than the length of both or one of the two first separation portions in the thickness direction. The imaging device according to (24) above. (26) the element isolation wall and the two first isolation portions are made of the same material; The imaging device according to any one of (2) to (25) above. (27) the element isolation wall and the two first isolation portions are made of different materials; The imaging device according to any one of (2) to (25) above. (28) the two first protrusions are made of titanium oxide; The imaging device according to any one of (2) to (25) above. (29) the plurality of imaging elements further include a light-shielding film provided on and along the element isolation wall when viewed from above the light-receiving surface; The imaging device according to any one of (2) to (28) above. (30) the light-shielding film is provided along the two first separation portions; The imaging device according to (29) above. (31) the first diffusion region is formed in a shape that spreads from the light receiving surface toward the inside of the semiconductor substrate and narrows from the inside of the semiconductor substrate toward the surface of the semiconductor substrate opposite to the light receiving surface. The imaging device according to any one of (2) to (30) above. (32) The first diffusion region is a first region extending from the light receiving surface toward the interior of the semiconductor substrate; a second region that narrows from the interior of the semiconductor substrate toward a surface of the semiconductor substrate opposite the light-receiving surface; having The imaging device according to (31) above. (33) the first region and the second region are spaced apart; The imaging device according to (32) above. (34) The first region and the second region have different lengths in the thickness direction. The imaging device according to (32) or (33) above. (35) The length of the first region in the thickness direction is longer than the length of the second region in the thickness direction. The imaging device according to (34) above. (36) The first region and the second region have different lengths in a direction perpendicular to the thickness direction. The imaging device according to any one of (32) to (35) above. (37) The length of the first region in a direction perpendicular to the thickness direction is shorter than the length of the second region in a direction perpendicular to the thickness direction. The imaging device according to (36) above. (38) the first region and the second region have different impurity concentrations; The imaging device according to any one of (32) to (37) above. (39) The concentration of the impurity in the first region is lower than the concentration of the impurity in the second region. The imaging device according to (38) above. (40) the first diffusion regions are provided between the two first separation portions and at least one of the additional walls, the two first diffusion regions have different shapes, and are formed in shapes that widen from the light-receiving surface toward the interior of the semiconductor substrate and narrow from the interior of the semiconductor substrate toward the surface of the semiconductor substrate opposite to the light-receiving surface; The imaging device according to any one of (16) to (25) above. (41) The first separation unit includes: an extension portion connected to the element isolation wall; an opposing surface facing a wall surface of the element isolation wall; and When viewed from above the light receiving surface, the width of the facing surface of the first separation portion is wider than the line width of the extension portion. The imaging device according to any one of (1) to (40) above. (42) The first separation unit includes: The extension further includes a protrusion provided at an end of the extension and having the opposing surface. The imaging device according to (41) above. (43) Each of the two first separation units includes: an extension portion connected to the element isolation wall; Opposing surfaces facing each other; and When viewed from above the light receiving surface, the width of each of the opposing surfaces of the two first separation portions is wider than the line width of each of the two extension portions. The imaging device according to any one of (2) to (40) above. (44) Each of the two first separation units includes: The extension further includes a protrusion provided at an end of the extension and having the opposing surface. The imaging device according to (43) above. (45) When viewed from above the light receiving surface, the imaging device has two additional walls that are arranged to face each other with the center of the imaging element in between. The imaging device according to any one of (2) to (44) above. (46) each of the two first isolation parts is provided at a position spaced apart from the element isolation wall; The imaging device according to any one of (2) to (45) above. (47) The first separation unit is provided in three or more units. The imaging device according to (46) above. (48) The first separation unit is provided in four pieces, the two first separation units are arranged in the column direction so as to face each other across the center of the imaging element when viewed from above the light receiving surface, the two first separation units are provided in the row direction so as to face each other across the center of the imaging element when viewed from above the light receiving surface; The imaging device according to (47) above. (49) The individual size of the two first separation units arranged in the column direction is different from the individual size of the two first separation units arranged in the row direction. The imaging device according to (48) above. (50) The first diffusion region is a first region formed by a diffusion process for each trench to form the two first isolation portions; a second region formed by a diffusion process for the trench for forming the element isolation wall; having The imaging device according to any one of (2) to (49) above. (51) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; Equipped with Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; a pixel separation wall separating the plurality of pixels; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; and the pixel separation wall is provided so as to extend from the light receiving surface to a midpoint of the semiconductor substrate along a thickness direction of the semiconductor substrate, a region located on the opposite side of the light receiving surface with respect to the pixel separation wall in a thickness direction of the semiconductor substrate contains impurities of a second conductivity type having a conductivity type opposite to the first conductivity type; Imaging device. (52) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; an imaging device having Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; an element isolation wall surrounding the plurality of pixels and provided to penetrate the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first isolation portion provided in a region surrounded by the element isolation wall and isolating the plurality of pixels; and the first isolation portion is provided so as to extend in a thickness direction of the semiconductor substrate, a first diffusion region containing impurities of a second conductivity type having a conductivity type opposite to the first conductivity type is provided in a region located around the first isolation portion and extending in a thickness direction of the semiconductor substrate; electronic equipment. (addition) (53) An electronic device comprising the imaging device according to any one of (1) to (51) above. (54) The imaging device according to (26) or (27) above, wherein the material is at least one material selected from the group consisting of silicon oxide, silicon nitride, amorphous silicon, polycrystalline silicon, titanium oxide, aluminum, and tungsten. (55) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; An imaging device comprising: Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; an element isolation wall surrounding the plurality of pixels and provided to penetrate the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; and the element isolation wall has two first protrusions that protrude toward a center of the image sensor and face each other when viewed from above the light receiving surface, each of the two first protrusions is provided to penetrate the semiconductor substrate; a first diffusion region containing impurities of a second conductivity type having a conductivity type opposite to the first conductivity type is provided in a region between the two first protrusions; Imaging device. (56) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; An imaging device comprising: Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; an element isolation wall surrounding the plurality of pixels and provided to penetrate the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; and the element isolation wall has a first protrusion that protrudes toward the center of the image sensor when viewed from above the light receiving surface, the first protrusion is provided to penetrate the semiconductor substrate, a first diffusion region containing impurities of a second conductivity type opposite to the first conductivity type is provided in a region between the first protrusion and a portion of the element isolation wall facing the first protrusion; Imaging device. (57) a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; An imaging device comprising: Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; a pixel separation wall separating the plurality of pixels; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; and the pixel isolation wall contains impurities of a second conductivity type having a conductivity type opposite to the first conductivity type; Imaging device. [Explanation of symbols]

[0293] 1. Imaging device 10. Semiconductor substrate 10a Photosensitive surface 10b surface 20 Pixel array section 21 Vertical drive circuit section 22 Column signal processing circuit section 23 Horizontal drive circuit section 24 Output circuit section 25 Control circuit section 26 Pixel drive wiring 27 Vertical signal line 28 horizontal signal line 29 Input / output terminal 100 image sensor 200 On-chip lens 202 Color Filter 204 Light blocking section 300a, 300b, 300c, 300d pixels 302 Photoelectric conversion unit 304, 324 protrusion 304a Extension part 304b Protrusion 306, 306a, 306b, 320 diffusion region 306A First Area 306B Second Area 308, 308a, 308b, 308c Additional walls 310 Isolation Wall 312 Slit 334, 334a Pixel separation wall 400a, 400b Transfer gates R1 First Region R2 Second Region

Claims

1. a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; Equipped with Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; an element isolation wall surrounding the plurality of pixels and provided to penetrate the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first isolation portion provided in a region surrounded by the element isolation wall and isolating the plurality of pixels; and the first isolation portion is provided so as to extend in a thickness direction of the semiconductor substrate, the first isolation portion includes, when viewed from above the light-receiving surface, a first region in contact with the element isolation wall and a second region in contact with the first region, and the second region has a width greater than that of the first region; Imaging device.

2. The second region is provided closer to the center of the image sensor than the first region. The imaging device according to claim 1 .

3. the first separation portion has an extension portion and a protrusion portion, When viewed from above the light receiving surface, a surface of the extension portion is the first region, and a surface of the protrusion portion is the second region. The imaging device according to claim 1 .

4. When viewed from above the light receiving surface, the width of the protrusion is longer than the line width of the extension. The imaging device according to claim 3 .

5. the first separation portion is formed in a T-shape when viewed from above the light receiving surface; The imaging device according to claim 1 .

6. a semiconductor substrate; a plurality of image pickup elements arranged in a matrix along row and column directions on the semiconductor substrate, and performing photoelectric conversion on incident light; an imaging device having Each of the plurality of imaging elements a plurality of pixels provided adjacent to each other in the semiconductor substrate and containing impurities of a first conductivity type; an element isolation wall surrounding the plurality of pixels and provided to penetrate the semiconductor substrate; an on-chip lens provided above a light-receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; a first isolation portion provided in a region surrounded by the element isolation wall and isolating the plurality of pixels; and the first isolation portion is provided so as to extend in a thickness direction of the semiconductor substrate, the first isolation portion includes, when viewed from above the light-receiving surface, a first region in contact with the element isolation wall and a second region in contact with the first region, and the second region has a width greater than that of the first region; electronic equipment.

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