Semiconductor device

The semiconductor device addresses position shifting and assembly issues by using overlapping grooves and convex portions to contain bonding material, ensuring precise alignment and miniaturization.

JP2025175683APending Publication Date: 2025-12-03MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
JP2024081897
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-20
Publication Date
2025-12-03

AI Technical Summary

Technical Problem

Conventional semiconductor devices face issues with semiconductor element position shifting due to overflowing bonding material, leading to misaligned wire connections and hindered assembly, and lack miniaturization potential due to separate grooves for each element.

Method used

A semiconductor device design featuring overlapping grooves around first and second semiconductor elements, with the second grooves being smaller than the first, and convex portions to contain the bonding material, ensuring precise alignment and compact layout.

Benefits of technology

The design prevents excessive deviation of semiconductor elements, maintains assembly efficiency, and allows for a more compact and robust semiconductor device with reduced manufacturing steps.

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Abstract

To provide a semiconductor device that can suppress deterioration in assemblability and can be reduced in size.SOLUTION: A semiconductor device includes a base member 1a, a first semiconductor element 2, and a second semiconductor element 3. The second semiconductor element 3 has a smaller planar size than the first semiconductor element 2. The first semiconductor element 2 and the second semiconductor element 3 are arranged side by side in a first direction DR1. A first groove 4 is formed in the base member 1a so as to surround the first semiconductor element 2. A second groove 5 is formed in the base member 1a so as to surround the second semiconductor element 3. In a region between the first semiconductor element 2 and the second semiconductor element 3, the first groove 4 and the second groove 5 overlap each other. In a second direction DR2 orthogonal to the first direction DR1, a distance L2 between portions of the second groove 5 disposed so as to sandwich the second semiconductor element 3 is smaller than a distance L1 between portions of the first groove 4 disposed so as to sandwich the first semiconductor element 2.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] BACKGROUND ART Conventionally, semiconductor devices have been known in which a semiconductor element is bonded to the surface of a substrate by a bonding material such as solder (see, for example, Japanese Patent Application Laid-Open No. 2017-098508). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2017-098508 Summary of the Invention [Problem to be solved by the invention]

[0004] In the semiconductor device disclosed in JP 2017-098508 A, multiple grooves are formed on the surface of the substrate at positions facing the corners of the semiconductor element, and the grooves are filled with a bonding material. In the semiconductor device, the bonding material is filled into the grooves so that it overflows from the grooves. As a result, when the bonding material is melted to fix the semiconductor element to the substrate surface, the position of the semiconductor element may shift, resulting in a large amount of movement of the semiconductor element (i.e., the amount of deviation from the position assumed at the time of design).

[0005] When the movement of the semiconductor element becomes large in this way, the position of the wire bonded to the semiconductor element may become misaligned, causing a short circuit, or the process of bonding the wire to the semiconductor element itself may not go well, deteriorating the assembly of the semiconductor device. Furthermore, because separate grooves are formed for each of the multiple semiconductor elements, there is room for improvement in terms of miniaturization of the semiconductor device.

[0006] Therefore, an object of the present disclosure is to provide a semiconductor device that can suppress deterioration in assembly efficiency and can be made smaller. [Means for solving the problem]

[0007] The semiconductor device according to the present disclosure includes a base member, a first semiconductor element, and a second semiconductor element. The base member is made of a conductive material. The first semiconductor element is connected to the base member by a bonding material. The second semiconductor element is connected to the base member by a bonding material. The second semiconductor element has a smaller planar size than the first semiconductor element. The first semiconductor element and the second semiconductor element are aligned in a first direction. A first groove is formed in the base member so as to surround the first semiconductor element. A second groove is formed in the base member so as to surround the second semiconductor element. The first groove and the second groove overlap in a region between the first semiconductor element and the second semiconductor element. In a second direction perpendicular to the first direction, the distance between portions of the second grooves arranged to sandwich the second semiconductor element is smaller than the distance between portions of the first grooves arranged to sandwich the first semiconductor element. [Effects of the Invention]

[0008] According to the above, it is possible to obtain a semiconductor device that can be miniaturized and that can suppress deterioration in assembly efficiency. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a schematic plan view of a semiconductor device according to a first embodiment. [Figure 2] 2 is a partially enlarged schematic plan view of the semiconductor device shown in FIG. 1. FIG. [Figure 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2. [Figure 5] 2 is a schematic cross-sectional view of a first control wiring of the semiconductor device shown in FIG. 1. FIG. [Figure 6] 2 is a schematic cross-sectional view of a main power wiring of the semiconductor device shown in FIG. 1. [Figure 7] 1. FIG. 4 is a partial schematic cross-sectional view showing a first modified example of the semiconductor device shown in FIG. [Figure 8] 1. FIG. 4 is a partial schematic cross-sectional view showing a second modified example of the semiconductor device shown in FIG. [Figure 9] 1. FIG. 4 is a partial schematic cross-sectional view showing a third modified example of the semiconductor device shown in FIG. [Figure 10] 1. FIG. 4 is a partial schematic cross-sectional view showing a fourth modified example of the semiconductor device shown in FIG. [Figure 11] 1. FIG. 9 is a partial schematic cross-sectional view showing a fifth modified example of the semiconductor device shown in FIG. [Figure 12] 1. FIG. 6 is a partial schematic cross-sectional view showing a sixth modified example of the semiconductor device shown in FIG. [Figure 13] FIG. 10 is a partially enlarged schematic plan view of a semiconductor device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present disclosure will be described. Note that the same reference numerals are used to designate the same components, and the description thereof will not be repeated.

[0011] Embodiment 1 <Configuration of semiconductor device> FIG. 1 is a schematic plan view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a partially enlarged schematic plan view of the semiconductor device shown in FIG. 1. FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG. 2. FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 2. FIG. 5 is a schematic cross-sectional view of first control wiring of the semiconductor device shown in FIG. 1. FIG. 6 is a schematic cross-sectional view of main power wiring of the semiconductor device shown in FIG. 1.

[0012] As shown in FIGS. 1 to 6, the semiconductor device according to the present disclosure mainly comprises a lead frame 1, a first semiconductor element 2, a second semiconductor element 3, a third semiconductor element 6, a first control wiring 9, a second control wiring 10, a main current wiring 11, and a resin 12. The lead frame 1 mainly comprises a base member 1a, a connection portion 1b, and a terminal 1c. As shown in FIG. 1, the base member 1a is disposed in the approximate center of the lead frame 1. The terminal 1c is disposed on the outer periphery of the lead frame 1. The base member 1a and the terminal 1c are connected by the connection portion 1b. The connection portion 1b is made of a metal member that is integral with the base member 1a. The connection portion 1b is electrically connected to the terminal 1c. The base member 1a, the connection portion 1b, and the terminal 1c are made of conductive materials.

[0013] The first semiconductor element 2 is connected to the base member 1a by a bonding material 15. The second semiconductor element 3 is connected to a region of the base member 1a adjacent to the first semiconductor element 2 by a bonding material 15. Solder, for example, can be used as the bonding material 15. The second semiconductor element 3 has a smaller planar size than the first semiconductor element 2. The first semiconductor element 2 and the second semiconductor element 3 are aligned in the first direction DR1.

[0014] In the semiconductor device shown in FIG. 1, four base members 1a are arranged in the center of the lead frame 1. The four base members 1a are lined up along a second direction DR2 perpendicular to the first direction DR1. A first semiconductor element 2 and a second semiconductor element 3 are connected to three of the four base members 1a. The remaining base member 1a is larger in size than the three base members 1a. Three first semiconductor elements 2 and three second semiconductor elements 3 are connected to the remaining base member 1a. In other words, in the semiconductor device shown in FIG. 1, six first semiconductor elements 2 and six second semiconductor elements 3 are connected to the base member 1a.

[0015] A third semiconductor element 6 is connected to another region of the lead frame 1 adjacent to the base member 1a. In the semiconductor device shown in Fig. 1, two third semiconductor elements 6 are connected to the lead frame 1. The third semiconductor elements 6 are located on the opposite side of the first semiconductor element 2 from the second semiconductor element 3.

[0016] The first semiconductor element 2 is, for example, a silicon-based IGBT (Insulated Gate Bipolar Transistor). The second semiconductor element 3 is, for example, a silicon carbide (SiC)-based MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The third semiconductor element 6 is, for example, a driving IC (Integrated Circuit). Note that the first semiconductor element 2, the second semiconductor element 3, and the third semiconductor element 6 may be any type of semiconductor element other than those described above. For example, the semiconductor material constituting the second semiconductor element 3 may be silicon (Si), or a compound semiconductor material such as gallium nitride (GaN) or gallium oxide (Ga2O3).

[0017] The third semiconductor element 6 controls the first semiconductor element 2 and the second semiconductor element 3. The third semiconductor element 6 may control either the first semiconductor element 2 or the second semiconductor element 3. The planar size of the second semiconductor element 3 is smaller than the planar size of the first semiconductor element 2.

[0018] A first groove 4 is formed in the base member 1a to surround each first semiconductor element 2. As shown in FIG. 2, the first groove 4 is composed of multiple independent groove portions. Specifically, the first groove 4 is composed of first groove portions 4a, 4b, 4c, and 4d. Each of the first groove portions 4a, 4b, 4c, and 4d is a linear groove. The four first groove portions 4a, 4b, 4c, and 4d are arranged to face one outer periphery of the first semiconductor element 2, which has a rectangular planar shape. The first groove portions 4a, 4b, 4c, and 4d are arranged at intervals from each other. The first groove portions 4a, 4b, 4c, and 4d are arranged to form a rectangular planar shape. The first groove portions 4a and 4c are formed to extend along a first direction DR1. The first groove portions 4b and 4d are formed to extend along a second direction DR2 perpendicular to the first direction DR1.

[0019] 1, when a plurality of first semiconductor elements 2 are lined up, a portion of the first groove portion constituting the first groove 4 may be shared by a plurality of first grooves 4 surrounding these first semiconductor elements 2. For example, when a plurality of first semiconductor elements 2 are lined up along the second direction DR2 as shown in FIG. 1, the first groove portions 4b and 4d extending along the second direction DR2 may be common to the first grooves 4 surrounding these plurality of first semiconductor elements 2. In FIG. 1, one first groove portion 4b (see FIG. 2) and one first groove portion 4d (see FIG. 2) are arranged adjacent to three first semiconductor elements 2, and are thereby shared by three first grooves 4.

[0020] 1, first groove portions (first groove portions 4a, 4c in FIG. 2) located between multiple first semiconductor elements 2 aligned along the second direction DR2 may also be shared by multiple first grooves 4 surrounding the multiple first semiconductor elements 2. That is, one first groove portion may be formed as a shared groove portion between the first semiconductor elements 2 aligned along the second direction DR2. In this case, the one first groove portion functions as the first groove portion 4a and the first groove portion 4c of the two adjacent first grooves 4.

[0021] As shown in FIG. 3, the cross section of the first groove 4 perpendicular to the extension direction is V-shaped. A protrusion 41 is formed on the surface of the base member 1a at a position along the outer edge of the first groove 4. The protrusion 41 protrudes from the surface of the base member 1a. From a different perspective, the protrusion 41 protrudes from the surface of the base member 1a along a third direction DR3 perpendicular to the first direction DR1 and the second direction DR2. The surface of the protrusion 41 is continuous with the inner circumferential surface of the first groove 4.

[0022] As shown in FIGS. 1 and 2, second grooves 5 are formed in the base member 1a to surround each second semiconductor element 3. As shown in FIG. 2, the second grooves 5 are composed of multiple independent groove portions. Specifically, the second grooves 5 consist of four second groove portions 5a, 5b, 5c, and 5d. Each of the second groove portions 5a, 5b, 5c, and 5d is a linear groove. Each of the four second groove portions 5a, 5b, 5c, and 5d is arranged to face one outer periphery of the second semiconductor element 3, which has a rectangular planar shape. The second groove portions 5a, 5b, 5c, and 5d are arranged at intervals from one another. The second groove portions 5a, 5b, 5c, and 5d are arranged so that the planar shape of the second groove 5 is rectangular. The second groove portions 5a and 5c are formed to extend along the first direction DR1. The second groove portions 5b and 5d are formed to extend along the second direction DR2.

[0023] As shown in Fig. 4, the cross section of the second groove 5 perpendicular to the extension direction is V-shaped. A protrusion 51 is formed on the surface of the base member 1a at a position along the outer edge of the second groove 5. The protrusion 51 protrudes from the surface of the base member 1a. The surface of the protrusion 51 is continuous with the inner circumferential surface of the second groove 5.

[0024] 1 and 2, the first groove 4 and the second groove 5 overlap in the region between the first semiconductor element 2 and the second semiconductor element 3. In other words, the first groove portion 4d and the second groove portion 5d form the same groove, that is, the shared groove portion 14. Note that, since the size of the second groove 5 is smaller than the size of the first groove 4, the ends of the second groove portions 5a and 5c are arranged to face the region located more inward than the end of the shared groove portion 14.

[0025] As shown in FIG. 2, the sizes of the first groove 4 and the second groove 5 are determined according to the sizes of the first semiconductor element 2 and the second semiconductor element 3. Specifically, in the second direction DR2, which is perpendicular to the first direction DR1, the distance L2 between the second groove portions 5a and 5c, which are arranged to sandwich the second semiconductor element 3, is smaller than the distance L1 between the first groove portions 4a and 4c, which are arranged to sandwich the first semiconductor element 2. This corresponds to the width of the second semiconductor element 3 being narrower than the width of the first semiconductor element 2 in the second direction DR2. From a different perspective, in the second direction DR2, the distances L4 and L6 between the ends 1aa and 1ab of the base member 1a and the second groove 5 are greater than the distances L3 and L5 between the ends 1aa and 1ab of the base member 1a and the first groove 4. In other words, the second groove 5 is located farther from the ends 1aa and 1ab of the base member 1a than the first groove 4 (closer to the center of the base member 1a in the second direction DR2).

[0026] In addition, in the first direction DR1, the distance L8 between the second groove portions 5b and 5d arranged to sandwich the second semiconductor element 3 is smaller than the distance L7 between the first groove portions 4b and 4d arranged to sandwich the first semiconductor element 2. This corresponds to the fact that the width of the second semiconductor element 3 is narrower than the width of the first semiconductor element 2 in the first direction DR1.

[0027] As shown in FIG. 1 , a first gate pad 7 is formed on the top surface of the first semiconductor element 2. A second gate pad 8 is formed on the top surface of the second semiconductor element 3. The third semiconductor element 6 and the first gate pad 7 of the first semiconductor element 2 are electrically connected by a first control wiring 9. The third semiconductor element 6 and the second gate pad 8 of the second semiconductor element 3 are electrically connected by a second control wiring 10. The first semiconductor element 2 and the second semiconductor element 3 are electrically connected by a main current wiring 11. Furthermore, the first semiconductor element 2 and the lead frame 1 are electrically connected by the main current wiring 11. In the direction in which the second control wiring 10 extends, the second semiconductor element 3 is sandwiched between the first semiconductor element 2 and the third semiconductor element 6.

[0028] 5 and 6, the cross-sectional area of ​​the first control wiring 9 as a control wiring is smaller than the cross-sectional area of ​​the main current wiring 11. The cross-sectional area of ​​the second control wiring 10 is equal to the cross-sectional area of ​​the first control wiring 9. Therefore, the cross-sectional area of ​​the second control wiring 10 is smaller than the cross-sectional area of ​​the main current wiring 11.

[0029] As shown in FIG. 1, resin 12 covers a portion of terminal 1c of lead frame 1, base member 1a, connecting portion 1b, first semiconductor element 2, second semiconductor element 3, third semiconductor element 6, first control wiring 9, second control wiring 10, and main current wiring 11. Screw hole portions 12a for fixing the semiconductor device are formed in resin 12. Screw hole portions 12a are arranged at positions that sandwich base member 1a in second direction DR2. Resin 12 is an insulating resin. Ends of terminals 1c protrude from resin 12. Terminals 1c are used to electrically connect the semiconductor device to the outside.

[0030] 1, in the first direction DR1, the distance from the connection portion 1b to the second groove 5 is greater than the distance from the connection portion 1b to the first groove 4. In other words, in the first direction DR1, the second groove 5 and the second semiconductor element 3 are disposed on the opposite side of the connection portion 1b from the first groove 4 and the first semiconductor element 2.

[0031] Furthermore, in the first direction DR1, the distance from the third semiconductor element 6 to the second groove 5 is shorter than the distance from the third semiconductor element 6 to the first groove 4. In other words, in the first direction DR1, the third semiconductor element 6 is disposed on the opposite side of the first groove 4 and the first semiconductor element 2 from the second groove 5 and the second semiconductor element 3.

[0032] <effect> The semiconductor device according to the present disclosure includes a base member 1a, a first semiconductor element 2, and a second semiconductor element 3. The base member 1a is made of a conductive material. The first semiconductor element 2 is connected to the base member 1a by a bonding material 15. The second semiconductor element 3 is connected to the base member 1a by a bonding material 15. The second semiconductor element 3 has a smaller planar size than the first semiconductor element 2. The first semiconductor element 2 and the second semiconductor element 3 are aligned in a first direction DR1. A first groove 4 is formed in the base member 1a so as to surround the first semiconductor element 2. A second groove 5 is formed in the base member 1a so as to surround the second semiconductor element 3. In the region between the first semiconductor element 2 and the second semiconductor element 3, the first groove 4 and the second groove 5 overlap. In the second direction DR2, which is perpendicular to the first direction DR1, the distance L2 between the portions of the second groove 5 (second groove portions 5a, 5c) arranged to sandwich the second semiconductor element 3 is smaller than the distance L1 between the portions of the first groove 4 (first groove portions 4a, 4c) arranged to sandwich the first semiconductor element 2.

[0033] In this way, the first groove 4 and the second groove 5 are formed to have sizes that match the planar sizes of the first semiconductor element 2 and the second semiconductor element 3. Therefore, when the first semiconductor element 2 and the second semiconductor element 3 are fixed to the base member 1a via the bonding material 15, the molten bonding material 15 can be prevented from spreading outward from the first groove 4 or the second groove 5. This prevents the positions of the first semiconductor element 2 and the second semiconductor element 3 from being excessively deviated from their designed positions. This prevents problems such as the wires coming into contact with each other due to the wire connection positions being deviated from their designed positions when connecting wires to the first semiconductor element 2 and the second semiconductor element 3. In other words, since the wiring can be connected to the first semiconductor element 2 and the second semiconductor element 3 reliably and with high precision, deterioration in the ease of assembly of the semiconductor device can be prevented.

[0034] 3 and 4, the convex portions 41, 51 are formed adjacent to the first groove 4 and the second groove 5, and the convex portions 41, 51 also hinder the flow of the molten bonding material 15. In other words, the convex portions 41, 51 also contribute to the effect of suppressing the bonding material 15 from spreading outside the first groove 4 or the second groove 5.

[0035] Furthermore, the first groove portion 4d, which is a part of the first groove 4, and the second groove portion 5d, which is a part of the second groove 5, overlap to form a shared groove portion 14. Because the first groove portion 4d and the second groove portion 5d are shared in this manner, the total area occupied by the first groove 4 and the second groove 5 can be made smaller than when the first groove 4 and the second groove 5 are formed independently of each other (when the first groove portion 4d and the second groove portion 5d are formed independently). This allows for a more compact semiconductor device. Furthermore, because the area occupied by the grooves can be made smaller than when the first groove 4 and the second groove 5 are formed independently, a decrease in the strength of the base member 1a due to the formation of the first groove 4 and the second groove 5 can be suppressed.

[0036] Furthermore, because only one groove portion is formed between the first semiconductor element 2 and the second semiconductor element 3 as the shared groove portion 14, the distance between the first semiconductor element 2 and the second semiconductor element 3 in the first direction DR1 can be made smaller than when the first groove portion 4d and the second groove portion 5d are formed separately as described above. Consider a case where the third semiconductor element 6 is disposed on the opposite side of the first semiconductor element 2 from the second semiconductor element 3, as shown in FIG. 1 . The distance between the third semiconductor element 6 and the first semiconductor element 2 in the semiconductor device shown in FIG. 1 is shorter than when the first groove portion 4d and the second groove portion 5d are formed independently as described above. Therefore, the length of the wiring (first control wiring 9) connecting the third semiconductor element 6 and the first semiconductor element 2 can be designed to be relatively short. As a result, when molding the resin 12, problems such as wiring deformation due to the resin 12 injected into the mold can be suppressed. As a result, the product assemblyability of the semiconductor device can be improved.

[0037] The semiconductor device includes a terminal 1c, a connection portion 1b, and a resin 12. The connection portion 1b electrically connects the terminal 1c to the base member 1a. The resin 12 covers the base member 1a and the connection portion 1b. The resin 12 is an insulating resin. The terminal 1c protrudes from the resin 12. In the first direction DR1, the distance from the connection portion 1b to the second groove 5 is greater than the distance from the connection portion 1b to the first groove 4.

[0038] Here, during the manufacturing process of a semiconductor device, wiring such as the first control wiring 9 or the second control wiring 10 may be connected to the first semiconductor element 2 or the second semiconductor element 3 using ultrasonic waves or the like. In this case, the base member 1a must be positioned and fixed. To do this, the base member 1a is locally pressed with a pressing member such as a jig to fix the base member 1a. In this case, the positioning of the base member 1a can be easily and stably performed by pressing a position on the base member 1a as far away as possible from the connection portion 1b. Therefore, by arranging the small-sized second groove 5 at a position relatively far from the connection portion 1b as described above, an area for contacting the pressing member on the surface of the base member 1a around the second groove 5 (i.e., the surface portion relatively far from the connection portion 1b) can be easily secured. As a result, the positioning of the base member 1a can be easily performed.

[0039] In the semiconductor device, the base member 1a and the connection portion 1b are made of an integral metal member.

[0040] In this case, the number of parts in the semiconductor device can be reduced compared to when the base member 1a and the connecting portion 1b are prepared as separate parts. Also, since there is no need to perform a process of connecting the separate base member 1a and the connecting portion 1b, the number of manufacturing steps can be reduced compared to when the base member 1a and the connecting portion 1b are separate parts.

[0041] In the above semiconductor device, the distances L4, L6 between the ends 1aa, 1ab of the base member 1a and the second groove 5 in the second direction DR2 are greater than the distances L3, L5 between the ends 1aa, 1ab of the base member 1a and the first groove 4.

[0042] When connecting wiring to the first semiconductor element 2 or the second semiconductor element 3 by wire bonding or the like, the base member 1a is pressed and fixed with a pressing member such as a jig, and then the wiring connection process is performed. At this time, it is preferable to press the base member 1a at two locations that sandwich the first semiconductor element 2 or the second semiconductor element 3. In the above configuration, the distances L4 and L6 between the portions of the second groove 5 (second groove portions 5a and 5c in FIG. 2) that sandwich the second semiconductor element 3 in the second direction DR2 and the ends 1aa and 1ab of the base member 1a are relatively large. Therefore, the base member 1a can be easily pressed and fixed with the pressing member at the positions that sandwich the second groove 5 in the second direction DR2. As a result, the wiring connection process can be performed reliably and accurately.

[0043] In the above semiconductor device, the first groove 4 and the second groove 5 have a V-shaped cross section. In this case, the first groove 4 and the second groove 5 can be easily formed by pressing a mold or the like having a V-shaped cross section against the surface of the base member 1a to plastically process the surface of the base member 1a.

[0044] The semiconductor device includes a third semiconductor element 6. The third semiconductor element 6 controls at least one of the first semiconductor element 2 and the second semiconductor element 3. In the first direction DR1, the distance from the third semiconductor element 6 to the second groove 5 is smaller than the distance from the third semiconductor element 6 to the first groove 4. In the first direction DR1, the distance L8 between the portions of the second groove 5 (second groove portions 5b, 5d) that are arranged to sandwich the second semiconductor element 3 is smaller than the distance L7 between the portions of the first groove 4 (first groove portions 4b, 4d) that are arranged to sandwich the first semiconductor element 2.

[0045] In this case, the total length of the wiring (first control wiring 9 and second control wiring 10) connecting the third semiconductor element 6 to the first semiconductor element 2 and the second semiconductor element 3 can be shorter than when the larger first semiconductor element 2 and first groove 4 are arranged in a position relatively close to the third semiconductor element 6 in the first direction DR1.

[0046] The semiconductor device includes a main current wiring 11 and first control wiring 9 and second control wiring 10 serving as control wiring. A third semiconductor element 6 controls at least one of the first semiconductor element 2 and the second semiconductor element 3. The main current wiring 11 electrically connects the first semiconductor element 2 and the second semiconductor element 3. The first control wiring 9 or the second control wiring 10 serving as control wiring electrically connects either the first semiconductor element 2 or the second semiconductor element 3 to the third semiconductor element 6. The cross-sectional area of ​​the first control wiring 9 or the second control wiring 10 serving as control wiring is smaller than the cross-sectional area of ​​the main current wiring 11.

[0047] In this case, the first control wiring 9 and the second control wiring 10, which have a relatively small cross-sectional area, are more likely to deform than the main current wiring 11. Therefore, by arranging the small-sized second semiconductor element 3 and the second groove 5 in a position relatively close to the third semiconductor element 6 in the first direction DR1 as described above, it is particularly effective from the viewpoint of shortening the total length of the first control wiring 9 and the second control wiring 10 and suppressing deformation of the first control wiring 9 and the second control wiring 10.

[0048] <Configuration and Function of Modified Example> Figure 7 is a partial cross-sectional schematic diagram showing a first modified example of the semiconductor device shown in Figure 1. Figure 7 shows a cross section of the joint between base member 1a and connecting portion 1b. The semiconductor device shown in Figure 7 basically has the same configuration as the semiconductor device shown in Figures 1 to 6 and can obtain the same effects, but differs from the semiconductor device shown in Figures 1 to 6 in that base member 1a and connecting portion 1b, which are separate bodies, are connected in lead frame 1 (see Figure 1).

[0049] 7, the base member 1a and the connection portion 1b are separate bodies. The base member 1a and the connection portion 1b are joined via an alloy layer 16. In other words, the base member 1a and the connection portion 1b are ultrasonically joined. The base member 1a and the connection portion 1b may also be joined via solder.

[0050] In this case, since the base member 1a and the connection portion 1b are separate bodies, the thickness and material of the base member 1a and the connection portion 1b can be selected independently, which increases the degree of freedom in designing the semiconductor device.

[0051] Fig. 8 is a partial cross-sectional schematic view showing a second modified example of the semiconductor device shown in Fig. 1. Fig. 8 shows the cross-sectional shapes of the first groove 4 and the second groove 5. The semiconductor device shown in Fig. 8 basically has the same configuration as the semiconductor device shown in Figs. 1 to 6 and can obtain the same effects, but the cross-sectional shapes of the first groove 4 and the second groove 5 are different from those of the semiconductor device shown in Figs. 1 to 6.

[0052] In the semiconductor device shown in Fig. 8, the cross-sectional shapes of the first groove 4 and the second groove 5 are semicircular. Even with this configuration, as in the semiconductor devices shown in Figs. 1 to 6, the molten bonding material 15 can be trapped in the first groove 4 and the second groove 5. This makes it possible to prevent the bonding material 15 from spreading outside the first groove 4 and the second groove 5. Furthermore, the first groove 4 and the second groove 5 can be easily formed by pressing a mold or the like having a semicircular cross-sectional shape against the surface of the base member 1a to plastically process the surface of the base member 1a.

[0053] Fig. 9 is a partial schematic cross-sectional view showing a third modified example of the semiconductor device shown in Fig. 1. Fig. 9 shows the cross-sectional shapes of the first groove 4 and the second groove 5, similar to Fig. 8. The semiconductor device shown in Fig. 9 basically has the same configuration as the semiconductor device shown in Figs. 1 to 6 and can obtain the same effects, but the cross-sectional shapes of the first groove 4 and the second groove 5 are different from those of the semiconductor device shown in Figs. 1 to 6.

[0054] In the semiconductor device shown in FIG. 9, the cross-sectional shapes of the first groove 4 and the second groove 5 are rectangular. Even with this configuration, as in the semiconductor devices shown in FIGS. 1 to 6, the molten bonding material 15 can be trapped in the first groove 4 and the second groove 5. This prevents the bonding material 15 from spreading outside the first groove 4 and the second groove 5. Furthermore, the first groove 4 and the second groove 5 can be easily formed by pressing a mold or the like having a rectangular cross-sectional shape against the surface of the base member 1a to plastically process the surface of the base member 1a. Note that the cross-sectional shapes of the first groove 4 and the second groove 5 can be any shape, such as a U-shape or a polygonal shape, in addition to the semicircular and rectangular shapes described above.

[0055] Fig. 10 is a partial cross-sectional schematic view showing a fourth modified example of the semiconductor device shown in Fig. 1. Fig. 10 corresponds to Fig. 2. The semiconductor device shown in Fig. 10 basically has the same configuration as the semiconductor device shown in Figs. 1 to 6 and can obtain the same effects, but the planar shapes of the first groove 4 and the second groove 5 are different from those of the semiconductor device shown in Figs. 1 to 6.

[0056] In the semiconductor device shown in FIG. 10, the first groove 4 is composed of two first groove portions 4a and 4d. The two first groove portions 4a and 4d are spaced apart from each other. The first groove portion 4a is an L-shaped groove in plan view. The first groove portion 4d is formed by connecting linear portions 14a, 14b, and 14c. The portions 14a and 14b are connected so as to form an L-shape in plan view. The portion 14a is disposed between the first semiconductor element 2 and the second semiconductor element 3. The portion 14b is connected to the end of the portion 14a and extends along the first direction DR1. The ends of the portions 14a and 14b, which are located opposite the connection between the portions 14a and 14b, are positioned opposite the end of the first groove portion 4a. The first groove portion 4a and the portions 14a and 14b of the first groove portion 4d as the shared groove portion 14 are disposed so as to face the outer periphery of the first semiconductor element 2.

[0057] In the semiconductor device shown in FIG. 10, the second groove 5 is composed of two second groove portions 5a and 5d. The two second groove portions 5a and 5d are spaced apart from each other. The second groove portion 5a is an L-shaped groove in plan view. The second groove portion 5d is a shared groove portion 14 where portions 14a, 14b, and 14d are connected. The portion 14c is connected to the end of the portion 14a at a position away from the end of the portion 14a (the end opposite the end connected to the portion 14b). The portion 14c extends along the first direction DR1. The portion of the portion 14a away from the connection between the portions 14a and 14b and the end of the portion 14c (the end opposite the end connected to the portion 14a) are positioned opposite the end of the second groove portion 5a. The second groove portion 5a and the portions 14a and 14c of the second groove portion 5d as the shared groove portion 14 are positioned to face the outer periphery of the second semiconductor element 3.

[0058] The first groove 4 and the second groove 5 having such a configuration can also trap the molten bonding material 15 in the first groove 4 and the second groove 5. This makes it possible to prevent the bonding material 15 from spreading outside the first groove 4 and the second groove 5.

[0059] Fig. 11 is a partial cross-sectional schematic view showing a fifth modified example of the semiconductor device shown in Fig. 1. Fig. 11 corresponds to Fig. 2. The semiconductor device shown in Fig. 11 basically has the same configuration as the semiconductor device shown in Figs. 1 to 6 and can obtain the same effects, but the planar shapes of the first groove 4 and the second groove 5 are different from those of the semiconductor device shown in Figs. 1 to 6.

[0060] In the semiconductor device shown in FIG. 11, the first groove 4 is a single annular groove. The first groove 4 is composed of first groove portions 4a and 4d that are connected to each other. The planar shape of the first groove portion 4a is a U-shape composed of straight portions. The planar shape of the first groove portion 4d is straight. The first groove portion 4d is a shared groove portion 14. The first groove portion 4d is disposed between the first semiconductor element 2 and the second semiconductor element 3. The end of the first groove portion 4a is connected to the end of the first groove portion 4d. The first groove 4 is an annular groove that has a rectangular planar shape.

[0061] In the semiconductor device shown in Figure 10, the second groove 5 is a single annular groove. The second groove 5 is composed of second groove portions 5a and 5d. The planar shape of the second groove portion 5a is a U-shape composed of straight portions. The planar shape of the second groove portion 5d is straight. The second groove portion 5d is a shared groove portion 14. The second groove portion 5d is the same groove as the first groove portion 4d. The end of the second groove portion 5a is connected to a portion of the second groove portion 5d that is distant from the end. The second groove 5 is an annular groove that has a rectangular planar shape.

[0062] The first groove 4 and the second groove 5 having such a configuration can also trap the molten bonding material 15 in the first groove 4 and the second groove 5. This makes it possible to prevent the bonding material 15 from spreading outside the first groove 4 and the second groove 5.

[0063] Fig. 12 is a partial cross-sectional schematic view showing a sixth modified example of the semiconductor device shown in Fig. 1. Fig. 12 corresponds to Fig. 2. The semiconductor device shown in Fig. 12 basically has the same configuration as the semiconductor device shown in Figs. 1 to 6 and can obtain the same effects, but the planar shapes of the first groove 4 and the second groove 5 are different from those of the semiconductor device shown in Figs. 1 to 6.

[0064] In the semiconductor device shown in FIG. 12, multiple first groove portions are arranged around one periphery of the first semiconductor element 2. Specifically, the first groove 4 is composed of eight linear first groove portions 4a, 4b, 4c, 4d, 4e, 4f, 4g, and 4h. The eight first groove portions 4a, 4b, 4c, 4d, 4e, 4f, 4g, and 4h are arranged at intervals from one another. The first groove portions 4a and 4b are aligned linearly along the first direction DR1. The first groove portions 4a and 4b are arranged opposite one periphery of the first semiconductor element 2. The first groove portions 4c and 4d are aligned linearly along the second direction DR2. The end of the first groove portion 4b and the end of the first groove portion 4c are arranged opposite each other with a gap between them. The first groove portions 4c and 4d are arranged opposite another periphery of the first semiconductor element 2.

[0065] The first groove portions 4e and 4f are aligned in a straight line along the first direction DR1. The first groove portions 4e and 4f are arranged on the opposite side of the first semiconductor element 2 from the first groove portions 4a and 4b. The end of the first groove portion 4d and the end of the first groove portion 4e are arranged to face each other with a gap between them. The first groove portions 4e and 4f are arranged to face yet another one of the outer peripheries of the first semiconductor element 2.

[0066] The first groove portions 4g and 4h are arranged so as to be aligned in a straight line along the second direction DR2. The first groove portions 4g and 4h are a shared groove portion 14. The first groove portions 4g and 4h are arranged between the first semiconductor element 2 and the second semiconductor element 3. An end portion of the first groove portion 4g (an end portion of the first groove portion 4g opposite to an inner end portion facing the first groove portion 4h) faces an end portion of the first groove portion 4f. An end portion of the first groove portion 4h (an end portion of the first groove portion 4h opposite to an inner end portion facing the first groove portion 4g) faces an end portion of the first groove portion 4a. The portion 14b is continuous with the end portion of the portion 14a and extends along the first direction DR1. The end portions of the portions 14a and 14b, which are located opposite to the connection portion between the portions 14a and 14b, are arranged in positions facing the end portion of the first groove portion 4a. The first groove portions 4 a , 4 b , 4 c , 4 d , 4 e , 4 f , 4 g , and 4 h are arranged to face the outer periphery of the first semiconductor element 2 .

[0067] In the semiconductor device shown in FIG. 12, multiple second groove portions are arranged around one periphery of the second semiconductor element 3. Specifically, the second groove 5 is composed of eight linear second groove portions 5a, 5b, 5c, 5d, 5e, 5f, 5g, and 5h. The eight second groove portions 5a, 5b, 5c, 5d, 5e, 5f, 5g, and 5h are arranged at intervals from one another. The second groove portions 5a and 5b are aligned linearly along the first direction DR1. The second groove portions 5a and 5b are arranged opposite one periphery of the second semiconductor element 3. The second groove portions 5c and 5d are aligned linearly along the second direction DR2. The end of the second groove portion 5b and the end of the second groove portion 5c are arranged opposite each other with a gap between them. The second groove portions 5c and 5d are arranged opposite another periphery of the second semiconductor element 3.

[0068] The second groove portions 5e and 5f are aligned linearly along the first direction DR1. The second groove portions 5e and 5f are arranged on the opposite side of the second semiconductor element 3 from the second groove portions 5a and 5b. The end of the second groove portion 5d and the end of the second groove portion 5e are arranged to face each other with a gap between them. The second groove portions 5e and 5f are arranged to face yet another one of the outer peripheries of the second semiconductor element 3.

[0069] The second groove portions 5g and 5h are arranged so as to be aligned linearly along the second direction DR2. The second groove portions 5g and 5h are shared groove portions 14. The second groove portions 5g and 5h are arranged between the first semiconductor element 2 and the second semiconductor element 3. A region away from the end of the second groove portion 5g (the end of the second groove portion 5g opposite the inner end facing the second groove portion 5h) faces the end of the second groove portion 5f. A region away from the end of the second groove portion 5h (the end of the second groove portion 5h opposite the inner end facing the second groove portion 5g) faces the end of the second groove portion 5a. The second groove portions 5a, 5b, 5c, 5d, 5e, 5f, 5g, and 5h are arranged so as to face the outer periphery of the second semiconductor element 3.

[0070] The first groove 4 and the second groove 5 having such a configuration can also trap the molten bonding material 15 in the first groove 4 and the second groove 5. This makes it possible to prevent the bonding material 15 from spreading outside the first groove 4 and the second groove 5.

[0071] Embodiment 2 <Configuration of semiconductor device> Fig. 13 is a partially enlarged schematic plan view of a semiconductor device according to embodiment 2. Fig. 13 corresponds to Fig. 2. The semiconductor device shown in Fig. 13 basically has the same configuration as the semiconductor device shown in Figs. 1 to 6 and can obtain the same effects, but the relative positional relationship between first groove 4 and first semiconductor element 2 and second groove 5 and second semiconductor element 3 differs from that of the semiconductor device shown in Figs. 1 to 6.

[0072] 13, the centers of the second groove 5 and the second semiconductor element 3 in the second direction DR2 are offset from the centers of the first groove 4 and the first semiconductor element 2 in the second direction DR2. Specifically, the first groove portion 4a and the second groove portion 5a overlap in the second direction DR2. Furthermore, the outer periphery of the first semiconductor element 2 facing the first groove portion 4a overlaps with the outer periphery of the second semiconductor element 3 facing the second groove portion 5a in the second direction DR2.

[0073] Therefore, in the second direction DR2, the distance L4 between the end 1aa of the base member 1a and the second groove 5 and the distance L3 between the end 1aa of the base member 1a and the first groove 4 are approximately equal. On the other hand, the distance L6 between the end 1ab of the base member 1a and the second groove 5 is greater than the distance L5 between the end 1ab of the base member 1a and the first groove 4. Also, as shown in FIG. 13, the distance L6 is different from the distance L4. Specifically, the distance L6 is greater than the distance L4. Therefore, the area of ​​the region of the base member 1a located to the right of the second groove 5 in the second direction DR2 is greater than the area of ​​the region of the base member 1a located to the left of the second groove 5.

[0074] <effect> In the semiconductor device, the distance L4 between one end 1aa of the base member 1a and the second groove 5 in the second direction DR2 is different from the distance L6 between the other end 1ab of the base member 1a and the second groove 5.

[0075] When connecting wiring to the first semiconductor element 2 or the second semiconductor element 3 by wire bonding or the like, the base member 1a may be pressed and fixed with a pressing member such as a jig, and then the wiring connection process may be carried out. In this case, depending on conditions such as the shape of the base member 1a, it may be sufficient to press the base member 1a in one location. Also, for example, there may be sufficient space between one of the two ends 1aa, 1ab of the base member 1a and the second groove 5, and there may be no problem in moving the second groove 5 closer to the other of the two ends 1aa, 1ab of the base member 1a.

[0076] In the above configuration, one of the two regions outside the portion of the second groove 5 that sandwiches the second semiconductor element 3 in the second direction DR2 has a relatively large area. Therefore, the base member 1a can be pressed and fixed with a pressing member in the region having the large area (for example, the region located to the right of the second groove 5 in FIG. 13). As a result, the degree of freedom in designing the semiconductor device can be increased compared to when space is secured in the two regions sandwiching the second semiconductor element 3 for pressing with a pressing member.

[0077] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. Unless there is a contradiction, at least two of the embodiments disclosed herein may be combined. The basic scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0078] Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) a base member made of a conductive material; a first semiconductor element connected to the base member by a bonding material; a second semiconductor element connected to the base member by a bonding material and having a planar size smaller than that of the first semiconductor element; the first semiconductor element and the second semiconductor element are aligned in a first direction, a first groove is formed in the base member so as to surround the first semiconductor element; a second groove is formed in the base member so as to surround the second semiconductor element; the first groove and the second groove overlap in a region between the first semiconductor element and the second semiconductor element, In a second direction that is perpendicular to the first direction, the distance between portions of the second groove that are arranged to sandwich the second semiconductor element is smaller than the distance between portions of the first groove that are arranged to sandwich the first semiconductor element. (Appendix 2) The terminal and a connection portion that electrically connects the terminal and the base member; an insulating resin covering the base member and the connection portion; the terminals protrude from the resin, 2. The semiconductor device according to claim 1, wherein in the first direction, a distance from the connection portion to the second groove is greater than a distance from the connection portion to the first groove. (Appendix 3) the base member and the connection portion are separate bodies, 3. The semiconductor device according to claim 2, wherein the base member and the connection portion are joined via a solder or alloy layer. (Appendix 4) 3. The semiconductor device according to claim 2, wherein the base member and the connection portion are formed from an integral metal member. (Appendix 5) 5. The semiconductor device according to claim 1, wherein in the second direction, the distance between the end of the base member and the second groove is greater than the distance between the end of the base member and the first groove. (Appendix 6) 6. The semiconductor device according to claim 1, wherein in the second direction, the distance between one end of the base member and the second groove is different from the distance between the other end of the base member and the second groove. (Appendix 7) 7. The semiconductor device according to claim 1, wherein the first groove and the second groove have a V-shaped cross section. (Appendix 8) a third semiconductor element that controls at least one of the first semiconductor element and the second semiconductor element; In the first direction, a distance from the third semiconductor element to the second groove is smaller than a distance from the third semiconductor element to the first groove; 8. The semiconductor device according to claim 1, wherein in the first direction, a distance between portions of the second groove that are arranged to sandwich the second semiconductor element is smaller than a distance between portions of the first groove that are arranged to sandwich the first semiconductor element. (Appendix 9) a main current wiring that electrically connects the first semiconductor element and the second semiconductor element; a control wiring that electrically connects either the first semiconductor element or the second semiconductor element to the third semiconductor element, 9. The semiconductor device according to claim 8, wherein a cross-sectional area of ​​the control wiring is smaller than a cross-sectional area of ​​the main current wiring. [Explanation of symbols]

[0079] 1 lead frame, 1a base member, 1aa, 1ab end portion, 1b connection portion, 1c terminal, 2 first semiconductor element, 3 second semiconductor element, 4 first groove, 4a, 4b, 4c, 4d, 4e, 4f, 4g, 4h first groove portion, 5 second groove, 5a, 5b, 5c, 5d, 5e, 5f, 5g, 5h second groove portion, 6 third semiconductor element, 7 first gate pad, 8 second gate pad, 9 first control wiring, 10 second control wiring, 11 main current wiring, 12 resin, 12a screw hole portion, 14 shared groove portion, 14a, 14b, 14c portion, 15 bonding material, 16 alloy layer, 41, 51 convex portion, DR1 first direction, DR2 second direction, DR3 third direction, L1, L2, L3, L4, L5, L6, L7, L8 distance.

Claims

1. a base member made of a conductive material; a first semiconductor element connected to the base member by a bonding material; a second semiconductor element connected to the base member by a bonding material and having a planar size smaller than that of the first semiconductor element; the first semiconductor element and the second semiconductor element are aligned in a first direction, a first groove is formed in the base member so as to surround the first semiconductor element; a second groove is formed in the base member so as to surround the second semiconductor element; the first groove and the second groove overlap in a region between the first semiconductor element and the second semiconductor element, In a second direction that is perpendicular to the first direction, the distance between portions of the second groove that are arranged to sandwich the second semiconductor element is smaller than the distance between portions of the first groove that are arranged to sandwich the first semiconductor element.

2. The terminal and a connection portion that electrically connects the terminal and the base member; an insulating resin covering the base member and the connection portion; the terminals protrude from the resin, The semiconductor device according to claim 1 , wherein a distance from said connection portion to said second groove in said first direction is greater than a distance from said connection portion to said first groove.

3. the base member and the connection portion are separate bodies, 3. The semiconductor device according to claim 2, wherein said base member and said connection portion are joined via a solder or alloy layer.

4. 3. The semiconductor device according to claim 2, wherein said base member and said connection portion are formed from an integral metal member.

5. 2 . The semiconductor device according to claim 1 , wherein a distance between the end of the base member and the second groove in the second direction is greater than a distance between the end of the base member and the first groove.

6. 2 . The semiconductor device according to claim 1 , wherein a distance in the second direction between one end of the base member and the second groove is different from a distance between the other end of the base member and the second groove.

7. The semiconductor device according to claim 1 , wherein the first groove and the second groove have a V-shaped cross section.

8. a third semiconductor element that controls at least one of the first semiconductor element and the second semiconductor element; In the first direction, a distance from the third semiconductor element to the second groove is smaller than a distance from the third semiconductor element to the first groove; 8. The semiconductor device according to claim 1, wherein in the first direction, a distance between portions of the second groove that are arranged to sandwich the second semiconductor element is smaller than a distance between portions of the first groove that are arranged to sandwich the first semiconductor element.

9. a main current wiring that electrically connects the first semiconductor element and the second semiconductor element; a control wiring that electrically connects either the first semiconductor element or the second semiconductor element to the third semiconductor element, 9. The semiconductor device according to claim 8, wherein a cross-sectional area of ​​said control wiring is smaller than a cross-sectional area of ​​said main current wiring.

Citation Information

Patent Citations

  • Semiconductor device

    JP2017098508A