Semiconductor device

Abstract

To provide a semiconductor device that can improve heat dissipation.SOLUTION: A semiconductor device includes a die pad, a semiconductor chip mounted on the die pad, and an encapsulant that encapsulates the semiconductor chip and a portion of the die pas. The die pad includes a base having a first main surface on which the semiconductor chip is mounted and a second main surface opposite the first main surface. A recess having a bottom surface is formed in the second main surface. The die pad includes a protrusion that protrudes from the bottom surface.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] 2. Description of the Related Art A semiconductor device is known in which a semiconductor chip is mounted on a die pad, and the semiconductor chip and a part of the die pad are sealed with a sealing material. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-027878 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-317781 Summary of the Invention [Problem to be solved by the invention]

[0004] Conventional semiconductor devices are mounted on a heat sink when in use. If a semiconductor device is used without being mounted on a heat sink, the heat dissipation performance is low and the semiconductor device is likely to become hot.

[0005] An object of the present disclosure is to provide a semiconductor device that can improve heat dissipation. [Means for solving the problem]

[0006] The semiconductor device of the present disclosure comprises a die pad, a semiconductor chip mounted on the die pad, and an encapsulant that encapsulates the semiconductor chip and a portion of the die pad, wherein the die pad has a base having a first main surface on which the semiconductor chip is mounted and a second main surface opposite the first main surface, a recess having a bottom surface is formed in the second main surface, and the die pad has a protrusion that protrudes from the bottom surface. [Effects of the Invention]

[0007] According to the present disclosure, heat dissipation can be improved. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a top view showing the semiconductor device according to the first embodiment. [Figure 2] FIG. 2 is a cross-sectional view showing the semiconductor device according to the first embodiment. [Figure 3] FIG. 3 is a bottom view showing the die pad. [Figure 4] FIG. 4 is a cross-sectional view showing a semiconductor device according to the second embodiment. [Figure 5] FIG. 5 is a bottom view (part 1) showing a modified example of the die pad. [Figure 6] FIG. 6 is a bottom view (part 2) showing a modified example of the die pad. [Figure 7] FIG. 7 is a bottom view (part 3) showing a modified example of the die pad. [Figure 8] FIG. 8 is a bottom view (part 4) showing a modified example of the die pad. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.

[0010] [1] A semiconductor device according to one embodiment of the present disclosure includes a die pad, a semiconductor chip mounted on the die pad, and an encapsulant that encapsulates the semiconductor chip and a portion of the die pad, wherein the die pad has a base having a first main surface on which the semiconductor chip is mounted and a second main surface opposite the first main surface, a recess having a bottom surface is formed in the second main surface, and the die pad has a protrusion that protrudes from the bottom surface.

[0011] Heat generated by the semiconductor chip is transferred to the die pad. Compared to when no recess is formed on the second main surface and the die pad does not have a protruding portion, the surface area of ​​the die pad is larger, which improves heat dissipation.

[0012] [2] In [1], the die pad may have a plurality of the protrusions. The more protrusions there are, the larger the surface area of ​​the die pad becomes, and the higher the heat dissipation performance becomes.

[0013] [3] In [2], the semiconductor chip may overlap at least one of the protrusions in a plan view perpendicular to the first main surface, in which case heat generated by the semiconductor chip is easily transferred to the protrusion.

[0014] [4] In [2] or [3], the distance between adjacent protrusions may be equal to or less than half the width of the semiconductor chip. In this case, the semiconductor chip may overlap at least one protrusion in plan view.

[0015] [5] In any one of [1] to [4], the depth of the recess may be ⅔ or less of the thickness of the base, which makes it easier to obtain high mechanical strength in the base.

[0016] [6] In any one of [1] to [5], the protruding portion may have an end face flush with the second main surface. In this case, it is easy to form a die pad.

[0017] [7] In any one of [1] to [5], the protrusion may have an end face that is farther from the first main surface than the second main surface. In this case, heat dissipation can be further improved.

[0018] [8] In [7], the distance between the end face of the protrusion and the first main surface may be 1.5 times or more the thickness of the base. In this case, particularly high heat dissipation properties are easily obtained.

[0019] [9] In any one of [1] to [8], the planar shape of the protrusion may be a square, rectangle, circle, triangle, or hexagon. In this case, the protrusion is easy to form.

[0020]

[10] In any one of [1] to [9], the base and the protrusion may be formed from a single metal material, which makes it easy to form a die pad.

[0021] [Details of the embodiments of the present disclosure] The following describes in detail embodiments of the present disclosure, but the present disclosure is not limited thereto. Note that in this specification and drawings, components having substantially the same functional configuration may be designated by the same reference numerals to avoid redundant description. In the following description, an XYZ Cartesian coordinate system is used, but this coordinate system is defined for the purpose of explanation and does not limit the orientation of the semiconductor device. Furthermore, when viewed from an arbitrary point, the +Z side may be referred to as the upper side, top side, or top, and the -Z side may be referred to as the lower side, bottom side, or bottom. In this disclosure, "planar view" refers to viewing an object from above, and "planar shape" refers to the shape of an object viewed from above.

[0022] (First embodiment) A first embodiment will be described. The first embodiment relates to a discrete semiconductor device. FIG. 1 is a top view showing the semiconductor device according to the first embodiment. FIG. 2 is a cross-sectional view showing the semiconductor device according to the first embodiment. FIG. 2 shows a cross section taken along line II-II in FIG. 1. FIG. 3 is a bottom view showing a die pad.

[0023] 1 and 2, the semiconductor device 1 according to the first embodiment has a die pad 10, a semiconductor chip 20, an encapsulant 30, a first terminal 81, a second terminal 82, and a third terminal 83. The semiconductor chip 20 is mounted on the die pad 10. The encapsulant 30 encapsulates the semiconductor chip 20 and a portion of the die pad 10.

[0024] As shown in FIGS. 2 and 3 , the die pad 10 has a base 40 and protruding portions 50. For example, the die pad 10 has a plurality of protruding portions 50. The base 40 has a first main surface 41 and a second main surface 42 opposite to the first main surface 41. The first main surface 41 and the second main surface 42 are parallel to the XY plane, and the first main surface 41 is on the +Z side of the second main surface 42. The outer shapes of the first main surface 41 and the second main surface 42 are rectangular with two sides parallel to the X axis and two sides parallel to the Y axis. The outer shapes of the first main surface 41 and the second main surface 42 may be square. A recess 43 is formed in the second main surface 42. The recess 43 has a bottom surface 44. The planar shape of the recess 43 is rectangular with two sides parallel to the X axis and two sides parallel to the Y axis. The planar shape of the recess 43 may be square. The protrusion 50 protrudes from the bottom surface 44. For example, the planar shape of the protrusion 50 is rectangular, and extends parallel to the Y axis. Both ends of the protrusion 50 are connected to the inner wall surfaces of the recess 43. Multiple protrusions 50 are aligned along the X axis. The base 40 and the protrusions 50 are formed from a single metal material. The protrusion 50 has an end surface 51. The end surface 51 is flush with the second main surface 42.

[0025] For example, the depth D of the recess 43 is ⅔ or less of the thickness t of the base 40. The thickness t of the base 40 is equal to the distance between the first main surface 41 and the second main surface 42. Furthermore, the depth D is ⅓ or more of the thickness t. For example, the thickness t is 2 mm, and the depth D is 0.2 mm or more and 1.33 mm or less.

[0026] The semiconductor chip 20 is, for example, a metal-oxide-semiconductor (MOS) field effect transistor (FET) chip. The semiconductor chip 20 has a silicon carbide substrate 25, a gate electrode 21, a source electrode 22, and a drain electrode 23. The silicon carbide substrate 25 has a main surface 26 and a main surface 27 opposite to the main surface 26. The gate electrode 21 and the source electrode 22 are provided on the main surface 26, and the drain electrode 23 is provided on the main surface 27. The drain electrode 23 is bonded to a first main surface 41 of the die pad 10 by a conductive bonding material 12 such as solder. That is, the semiconductor chip 20 is mounted on the first main surface 41. The semiconductor chip 20 overlaps with at least one protrusion 50 in a plan view. The silicon carbide substrate 25 may include a silicon carbide single crystal substrate having the main surface 26 and a silicon carbide epitaxial layer formed on the silicon carbide single crystal substrate and having the main surface 27. The planar shape of silicon carbide substrate 25 is a rectangle with two sides parallel to the X axis and two sides parallel to the Y axis. The planar shape of silicon carbide substrate 25 may also be a square.

[0027] The first terminal 81, the second terminal 82, and the third terminal 83 are provided on the -Y side of the die pad 10 and extend parallel to the Y axis. The first terminal 81, the second terminal 82, and the third terminal 83 are spaced apart from each other and do not contact each other. The third terminal 83 is provided on the +X side of the first terminal 81, and the second terminal 82 is provided on the +X side of the third terminal 83. The third terminal 83 is integrated with the die pad 10 and is electrically connected to the die pad 10.

[0028] The semiconductor device 1 has a bonding wire 71 and a bonding wire 72. The bonding wire 71 connects the gate electrode 21 and a first terminal 81. The bonding wire 72 connects the source electrode 22 and a second terminal 82. The semiconductor device 1 may have a plurality of bonding wires 72. The first terminal 81 is a gate terminal, the second terminal 82 is a source terminal, and the third terminal 83 is a drain terminal.

[0029] The encapsulant 30 covers the first main surface 41 and the side surfaces of the die pad 10. The encapsulant 30 covers the bonding wires 71 and 72 and a portion of each of the first terminal 81, the second terminal 82, and the third terminal 83. The second main surface 42, the recess 43, and the protrusion 50 of the die pad 10 are exposed from the encapsulant 30.

[0030] When the semiconductor chip 20 generates heat during operation, the heat generated by the semiconductor chip 20 is mainly transferred to the die pad 10. In the first embodiment, a recess 43 is formed in the second main surface 42, and the die pad 10 has a protrusion 50. Therefore, the surface area of ​​the die pad 10 is larger than when the recess 43 is not formed in the second main surface 42 and the die pad 10 does not have the protrusion 50. Therefore, according to the first embodiment, heat dissipation can be improved. Even when used without attaching to a heat sink, the temperature of the semiconductor device 1 is less likely to rise. The more protrusions 50 there are, the larger the surface area of ​​the die pad 10 and the better the heat dissipation.

[0031] When the semiconductor chip 20 overlaps at least one protrusion 50 in a planar view, heat generated by the semiconductor chip 20 is easily transferred to the protrusion 50. When the distance L1 between adjacent protrusions 50 is equal to or less than half the width L2 of the semiconductor chip 20, the semiconductor chip 20 can overlap at least one protrusion 50 in a planar view. The width L2 of the semiconductor chip 20 refers to the length of the shortest side of the semiconductor chip 20 in a planar view. For example, the distance L1 is 0.5 mm or more and 12.5 mm or less, and the width L2 is 1.5 mm or more and 25 mm or less. The width L3 of the protrusion 50 is, for example, 0.3 mm or more. When the width L3 is 0.3 mm or more, the protrusion 50 is likely to have high mechanical strength. The width L3 of the protrusion 50 refers to the length of the minor axis of the protrusion 50 in a planar view. When the planar shape of the protrusion 50 is rectangular, the width L3 is the length of the short side.

[0032] When the depth D of the recess 43 is ⅔ or less of the thickness t of the base 40, high mechanical strength is easily obtained in the base 40. The depth D may be ⅓ or less of the thickness t, or even ½ or less. When the depth D is ⅓ or more of the thickness t, the area of ​​the surface of the die pad 10 exposed from the sealing material 30 is easily increased. The depth D may be ⅕ or more of the thickness t, or even 3 / 10 or more.

[0033] Forming the base 40 and the protruding portion 50 from a single metal material prevents loss of heat conduction at the boundary between the base 40 and the protruding portion 50. Furthermore, the die pad 10 can be easily formed. When the end face 51 is flush with the second main surface 42, the die pad 10 can be obtained by forming multiple grooves by etching a metal plate, such as a copper plate or a copper alloy plate. Therefore, the die pad 10 can be easily formed. When the end face 51 is flush with the second main surface 42, the distance L4 between the end face 51 of the protruding portion 50 and the first main surface 41 may be equal to the thickness t of the base.

[0034] (Second embodiment) A second embodiment will be described. The second embodiment differs from the first embodiment in the configuration of the die pad. Fig. 4 is a cross-sectional view showing a semiconductor device according to the second embodiment.

[0035] In the semiconductor device 2 according to the second embodiment, the distance L4 between the end face 51 of the protrusion 50 and the first main surface 41 is greater than the distance L4 in the first embodiment, and the end face 51 is farther from the first main surface 41 than the second main surface 42. That is, the protrusion 50 has the end face 51 that is farther from the first main surface 41 than the second main surface 42, and the distance L4 between the end face 51 and the first main surface 41 is greater than the thickness t of the base.

[0036] Other configurations of the second embodiment are the same as those of the first embodiment.

[0037] In the second embodiment, the surface area of ​​the protrusion 50 is larger than that of the first embodiment, and therefore the heat dissipation performance can be further improved.

[0038] The distance L4 between the end face 51 and the first main surface 41 is, for example, 1.5 times or more the thickness t of the base 40. When the distance L4 is 1.5 times or more the thickness t, particularly high heat dissipation properties are obtained. The longer the distance L4, the higher the heat dissipation properties, but there is a risk that the semiconductor device 2 will become larger. To avoid excessive increases in size of the semiconductor device 2, the distance L4 is, for example, 10 times or less the thickness t.

[0039] The planar shape and arrangement of the protrusions 50 are not limited to those in the above-described embodiment. FIGS. 5 to 8 are bottom views showing modified examples of the die pad. As shown in FIG. 5, two protrusions 50 each having a rectangular planar shape may be arranged along the Y axis. As shown in FIG. 6, the planar shape of the protrusions 50 may be square, and multiple protrusions 50 may be arranged along the X and Y axes. As shown in FIG. 7, the planar shape of the protrusions 50 may be circular, and multiple protrusions 50 may be arranged along the X and Y axes. As shown in FIG. 8, the planar shape of the protrusions 50 may be triangular, and multiple protrusions 50 may be arranged along the X and Y axes. Furthermore, the planar shape of the protrusions 50 may be hexagonal. Protrusions having these planar shapes are relatively easy to form.

[0040] Although the embodiments have been described in detail above, the present disclosure is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims. [Explanation of symbols]

[0041] 1, 2: Semiconductor device 10: Die pad 12: Conductive bonding material 20: Semiconductor chip 21: Gate electrode 22: Source electrode 23: Drain electrode 25: Silicon carbide substrate 26, 27: Main surface 30: Encapsulating material 40: Base 41: First main surface 42: Second main surface 43: Recess 44: Bottom 50:Protrusion 51: End face 71, 72: Bonding wire 81: 1st terminal 82: 2nd terminal 83: 3rd terminal L1, L4: distance L2, L3: Width

Claims

1. A die pad; a semiconductor chip mounted on the die pad; an encapsulant that encapsulates the semiconductor chip and a portion of the die pad; and the die pad has a base portion having a first main surface on which the semiconductor chip is mounted and a second main surface opposite to the first main surface; a recess having a bottom surface is formed in the second main surface; The die pad has a protrusion that protrudes from the bottom surface.

2. The semiconductor device according to claim 1 , wherein the die pad has a plurality of the protrusions.

3. The semiconductor device according to claim 2 , wherein the semiconductor chip overlaps with at least one of the protruding portions in a plan view perpendicular to the first main surface.

4. 4. The semiconductor device according to claim 2, wherein the distance between adjacent said protrusions is equal to or less than half the width of said semiconductor chip.

5. 4. The semiconductor device according to claim 1, wherein the depth of the recess is equal to or less than two-thirds of the thickness of the base portion.

6. The semiconductor device according to claim 1 , wherein the protruding portion has an end surface that is flush with the second main surface.

7. The semiconductor device according to claim 1 , wherein the protruding portion has an end face that is farther from the first main surface than the second main surface.

8. 8. The semiconductor device according to claim 7, wherein the distance between said end face and said first main surface is 1.5 times or more the thickness of said base portion.

9. 4. The semiconductor device according to claim 1, wherein the planar shape of the protrusion is a square, a rectangle, a circle, a triangle, or a hexagon.

10. 4. The semiconductor device according to claim 1, wherein the base and the protrusion are formed from a single metal material.

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