Carrier substrate for semiconductor device manufacturing and semiconductor device manufacturing method

A metal film on a silicon substrate addresses the cracking issue in carrier substrates, enhancing strength and thermal conductivity for improved semiconductor device manufacturing.

JP2025178723APending Publication Date: 2025-12-09MITSUBISHI MATERIALS CORP
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Patent Information

Application Number
JP2024085505
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-27
Publication Date
2025-12-09

AI Technical Summary

Technical Problem

Silicon carrier substrates used in wafer-level packaging and panel-level packaging are prone to cracking due to their brittle nature, which can lead to semiconductor device failure, and the increasing area of these substrates exacerbates this issue.

Method used

A carrier substrate with a metal film formed on at least one surface of a silicon substrate body, providing reinforcement and improved thermal conductivity to prevent cracking and ensure uniform heat distribution during semiconductor device manufacturing.

Benefits of technology

The metal film enhances the strength and rigidity of the carrier substrate, reducing cracking and ensuring uniform heat distribution, leading to the production of high-quality semiconductor devices.

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Abstract

To provide a carrier substrate for semiconductor device manufacturing and a semiconductor device manufacturing method that improve strength.SOLUTION: A method includes forming a semiconductor device 13 through a temporary fixing layer formation step in which a temporary fixing layer 11 is formed on either a first surface 2a or a second surface 2b of a substrate body 2 made of silicon, the first surface and the second surface formed parallel to each other, and a metal film 3 formed on at least the first surface of the substrate body, using this silicon substrate as a carrier substrate, a semiconductor device formation step in which at least a portion of the semiconductor device is formed on the temporary fixing layer, and a peeling step in which the temporary fixing layer and the carrier substrate are peeled off after the semiconductor device formation step.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The present invention relates to a carrier substrate for semiconductor device manufacturing. [Background technology]

[0002] As electronic devices become smaller and more power-efficient, there is a growing need for higher integration and thinner semiconductor chips and printed wiring boards. To meet this need, technologies such as wafer-level packaging (WLP) and panel-level packaging (PLP) have been explored in recent years. In WLP and PLP, multiple silicon chips are sometimes mounted on a circular or rectangular carrier substrate while being rewired, and then packaged in a resin mold or similar. The carrier substrate is generally removed after packaging.

[0003] Patent Document 1 describes a method of preparing a laminated sheet (metal foil with carrier) having a release layer and a metal layer in that order on a carrier (carrier substrate) made of glass, ceramics, silicon, resin, or metal, forming a resin-containing layer having a desired wiring layer on the metal layer of the laminated sheet, forming a gap between the carrier and the metal layer, and peeling the metal layer so as to expand the gap. After the metal layer is peeled from the carrier, it is removed from the surface of the resin-containing layer by etching or the like. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2023-067941 Summary of the Invention [Problem to be solved by the invention]

[0005] Silicon (Si) is often used as a carrier substrate for WLP and PLP to ensure a smooth surface. However, silicon is a brittle material and prone to cracking. In this case, the area of ​​each carrier substrate is increasing year by year, but the thickness remains the same. As a result, the material can no longer withstand its own weight, resulting in cracks. If a crack occurs in the carrier substrate, the semiconductor device it supports will also crack, and measures to prevent this are needed.

[0006] The present invention has been made in view of the above circumstances, and has as its object to improve the strength of a carrier substrate for use in manufacturing semiconductor devices. [Means for solving the problem]

[0007] The carrier substrate for semiconductor device production of the present invention has a substrate body made of silicon, the first surface and the second surface of which are formed parallel to each other, and a metal film formed on at least the first surface of the substrate body. In this case, the carrier substrate may also have a metal film formed on its outer peripheral surface connecting the peripheries of the first surface and the second surface.

[0008] This carrier substrate has a metal film formed on at least the first surface of the substrate body, which reinforces the entire substrate body made of silicon, a brittle material, making it less likely to crack. Forming a metal film on the outer peripheral surface of the substrate body further increases rigidity. The substrate body can be made of either single-crystal silicon or polycrystalline silicon.

[0009] Since the entire substrate is reinforced by the metal film, cracks can be prevented from occurring when the substrate is handled as a carrier substrate. Furthermore, since the metal film has excellent thermal conductivity, even when the substrate is heated during the formation of semiconductor devices on the substrate, localized heating is suppressed and heat is transmitted uniformly throughout, thereby preventing deformation and breakage of the semiconductor devices.

[0010] In the carrier substrate of the present invention, the metal film may be made of aluminum or copper and have a thickness of 0.1% or more of the thickness of the substrate body. Aluminum and copper are readily available, which helps prevent cost increases, and have excellent thermal conductivity, making them suitable for applications requiring uniform temperature distribution. If the thickness of the metal film is less than 0.1% of the thickness of the substrate body, the reinforcing effect of the metal film is poor.

[0011] It is preferable that the length of chipping occurring at the corners of the substrate body is 50 μm or less. By limiting chipping that can be the starting point of cracks, the occurrence of cracks can be further suppressed.

[0012] A method for manufacturing a semiconductor device using this carrier substrate includes a temporary fixing layer formation process for forming a temporary fixing layer on either the first surface side or the second surface side of the carrier substrate, a semiconductor device formation process for forming at least a portion of a semiconductor device on the temporary fixing layer, and a peeling process for peeling off the temporary fixing layer and the carrier substrate after the semiconductor device formation process.

[0013] In this manufacturing method, the carrier substrate is reinforced by forming a metal film on the first surface, preventing cracks from occurring during handling, and heat during semiconductor device manufacturing is transmitted uniformly over the entire surface, allowing for the formation of high-quality semiconductor devices. In this case, it is preferable to form the temporary fixing layer on the surface of the second surface side rather than on the surface of the first surface side (surface of the metal film) because this does not interfere with the peeling step. [Effects of the Invention]

[0014] According to the present invention, since the metal film is formed on at least the first surface of the substrate body made of silicon, the strength of the carrier substrate can be improved. [Brief explanation of the drawings]

[0015] [Figure 1] FIG. 2 is a cross-sectional view showing a carrier substrate according to the first embodiment of the present invention. [Figure 2] 3A to 3C are cross-sectional views showing a part of a process for forming a semiconductor device using the carrier substrate of the first embodiment, in the order of FIG. [Figure 3] 3A to 3C are cross-sectional views showing steps subsequent to FIG. 2 in the order of (a) to (c). [Figure 4] FIG. 4 is a cross-sectional view showing a carrier substrate according to a second embodiment of the present invention. [Figure 5] FIG. 10 is a cross-sectional view showing a carrier substrate according to a third embodiment of the present invention. [Figure 6] FIG. 10 is a cross-sectional view illustrating a bending test. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0017] [First embodiment] As shown in FIG. 1, the carrier substrate 1 of the first embodiment has a substrate body 2 on one surface of which a metal film 3 is formed. The substrate body 2 is made of single crystal silicon or polycrystalline silicon, and has a first surface 2a and a second surface 2b formed parallel to each other, and an outer peripheral surface 2c connecting the peripheries of the first surface 2a and the second surface 2b formed in a cylindrical or rectangular tube shape (in other words, the first surface 2a and the second surface 2b are formed in a circular or rectangular shape, and the whole is formed in a disk-like or rectangular plate-like shape).

[0018] The dimensions of this substrate body 2 are not necessarily limited, but the thickness t1 is 0.300 mm to 1.200 mm, and if it is disk-shaped, the diameter d is 20000 mm to 43000 mm, preferably 300 mm to 430 mm, and if it is rectangular, one side d (since Figure 1 does not specify the planar shape, the same symbol d is used) is 20000 mm to 90000 mm, preferably 300 mm to 900 mm, and more preferably 500 mm to 900 mm. In the case of a rectangular plate-shaped substrate body 2, it may be square, rectangular, or polygonal.

[0019] The substrate body 2 is formed by slicing a silicon ingot into plates and grinding the outer shape. However, because the material is brittle, chipping may occur during the machining processes, such as slicing and grinding. For this reason, an etching process is performed after machining, and any chipping is removed by the etching process. This etching process may be performed on the entire surface of the substrate body, but it is especially effective on corners (periphery and outer periphery) where chipping is likely to occur. In this case, chipping is limited to a length of 50 μm or less, preferably 45 μm or less, and more preferably 40 μm or less, from all sides (corners) of the substrate body 2.

[0020] The metal film 3 can be made of copper (Cu) or aluminum (Al), but a metal with good thermal conductivity is preferred. Compounds such as aluminum alloys or copper alloys may also be used, but oxides of aluminum or copper are not preferred. The metal film 3 is formed on, for example, the first surface 2a of the substrate body 2 by physical vapor deposition (e.g., evaporation, sputtering, ion plating), chemical vapor deposition, or plating, and its thickness t2 is set to a range of 0.1% to 2% of the thickness t1 of the substrate body 2. For example, if the thickness t1 of the substrate body 2 is 0.8 mm (800 μm), t2 is set to approximately 10 μm. If the thickness t2 of the metal film 3 is less than 0.1% of the thickness t1 of the substrate body 2, the reinforcing effect of the metal film 3 is poor. However, if the thickness is too thick, the difference in thermal expansion between the silicon substrate body 2 and the metal film 3 during the heating process may cause warping of the substrate body 2, so it is best to keep the thickness up to 2% of the thickness t1 of the substrate body 2. Furthermore, the thickness t2 of the metal film 3 may be 15 μm or less, 10 μm or less, or 5 μm or less. The lower limit of the thickness t2 is not particularly limited, but may be 1 μm.

[0021] Next, we will explain a method for manufacturing a semiconductor device (semiconductor package) using the thus configured carrier substrate 1. Hereinafter, the silicon substrate 1 will be referred to as the carrier substrate, and the surface on which the metal film 3 is formed will be referred to as the first surface 2a, and the opposite surface will be referred to as the second surface 2b. This method for manufacturing a semiconductor device includes a temporary fixing layer forming step of forming a temporary fixing layer 11 on the surface of the second surface 2b of the carrier substrate 1, a semiconductor device forming step of mounting a semiconductor chip 13 mounted on a rewiring layer 12 on the temporary fixing layer 11, a peeling step of peeling off the temporary fixing layer 11 and the carrier substrate 1 after the semiconductor device forming step, and a terminal forming step of forming electrode terminals 14 on the rewiring layer 12 after the peeling step. The steps will be described below in order.

[0022] [Temporary fixing layer formation process] 2(a), a temporary fixing layer 11 is formed on the second surface 2b of the carrier substrate 1 opposite to the metal film 3. This temporary fixing layer 11 is a layer provided to peel the carrier substrate 1 from the rewiring layer 12 when use as the carrier substrate 1 is finished, and is made of, for example, a material that is easily peeled off by applying a physical external force (e.g., hydrocarbon, amorphous carbon, etc.), a material that decomposes when irradiated with laser light or the like, reducing the adhesive strength at the interface (e.g., resin, etc.), or a material that peels off from within the layer (e.g., silicon carbide, etc.). This temporary fixing layer 11 can be formed by sputtering or the like on the surface of the carrier substrate 1. In the case of a resin, it is formed by spin coating or the like. There are no particular limitations on the thickness t3, but it is set to 1 μm or more and 5 μm or less.

[0023] [Semiconductor device formation process] In the semiconductor device formation process, a rewiring layer 12 is formed on a temporary fixing layer 11 (see Figure 2(b)), a semiconductor chip 13 is mounted on the rewiring layer 12 (see Figure 2(c)), and a sealing resin 15 is formed to cover the semiconductor chip 13 (see Figure 3(a)).

[0024] The rewiring layer 12 is formed on the temporary fixing layer 11 of the carrier substrate 1 by appropriately forming an insulating film 12a and a circuit conductor 12b using thin film formation techniques such as resist film formation, exposure and development processing, to form a layer of wiring with a fine line width, and mainly provides wiring between the semiconductor chip 13 to be mounted next and the electrode terminals (solder balls) 14 to be formed later.

[0025] A semiconductor chip 13 is mounted on this rewiring layer 12. In a pre-process, this semiconductor chip 13 is formed on a silicon substrate through processes such as film formation, exposure and development in a so-called clean room, and then separated into individual chips. In a subsequent process, the semiconductor chip 13 is mounted on the rewiring layer 12 on the carrier substrate 1 as described above. Figure 2(c) shows an example in which two semiconductor chips 13 are mounted. 3(a), the semiconductor chip 13 is covered and sealed with a sealing resin 15. As the sealing resin 15, an epoxy resin is widely used.

[0026] [Peeling process] 3(b), the carrier substrate 1 is peeled off from the rewiring layer 12 together with the temporary fixing layer 11. Depending on the material of the temporary fixing layer 11, this peeling step may be performed by physically applying an external force to the temporary fixing layer 11, by irradiating the temporary fixing layer 11 with laser light or the like from the carrier substrate 1 side to decompose a part of the temporary fixing layer 11 and reduce the adhesive strength at the interface, or by peeling the temporary fixing layer 11 from within the layer. After the carrier substrate 1 is peeled off, if a part of the temporary fixing layer 11 remains on the surface of the rewiring layer 12, it is removed with a solvent or the like.

[0027] [Terminal formation process] Electrode terminals (solder balls) 14 are fixed to the exposed portions of the circuit conductors 12b of the rewiring layer 12 that are exposed after peeling off the carrier substrate 1, and the rewiring layer 12 is divided into the required size and finished as a semiconductor package (semiconductor device) 16 shown in Figure 3(c).

[0028] As described above, when manufacturing the semiconductor package 16, the carrier substrate 1 supports the rewiring layer 12 and the semiconductor chip 13 formed during the semiconductor chip mounting process. Therefore, the carrier substrate 1 must have a smooth surface and be free of deformation, such as warping, to allow for the formation of fine rewiring. Because the carrier substrate 1 of this embodiment is a silicon substrate, its surface is smooth. Furthermore, the metal film 3 is formed on one side (first surface) 2a of the substrate body 2, making it less susceptible to cracking. This reduces cracking during handling, enabling the formation of high-precision semiconductor devices. In particular, in recent years, the area of ​​semiconductor devices has been increased to increase yields by fabricating more semiconductor devices. Silicon substrates, which are brittle materials, are no longer able to withstand their own weight, creating an environment prone to cracking. However, the presence of a metal film on the first surface reduces cracking in both the carrier substrate 1 and the semiconductor package 16 supported by the carrier substrate 1, which is advantageous for increasing the area of ​​semiconductor devices.

[0029] Furthermore, in the semiconductor device formation process, heat (e.g., 250°C) is applied to harden the resist film. In the carrier substrate 1 of this embodiment, the metal film 3 is formed over the entire first surface 2a, and since it has good thermal conductivity, the applied heat is quickly transmitted in the surface direction, allowing the entire surface to be uniformly heated. This prevents warping and partial thermal expansion caused by uneven heat distribution. Partial thermal expansion can cause deformation, breakage, etc. By using the carrier substrate 1 of this embodiment, it is possible to form a highly accurate rewiring layer 12. Although the metal film 3 is formed on the entire first surface 2a of the substrate body 2, it does not necessarily have to be on the entire surface, and for example, the peripheral edge portion may be excluded.

[0030] [Second embodiment] In the first embodiment, a metal film 3 was formed on one surface (first surface) 2a of the substrate body 2 to form a carrier substrate 1, but in the second embodiment, as shown in Figure 4, a carrier substrate 21 is provided in which a metal film 3 is also formed on the outer peripheral surface 2c that connects the peripheries of the first surface 2a and the second surface 2b of the substrate body 2. The metal film 3 formed on the outer peripheral surface 2c of the substrate body 2 may be the same as the metal film 3 formed on the first surface 2a, and may be made of copper (Cu), aluminum (Al), etc., with a metal having good thermal conductivity being preferred. It is formed simultaneously with the formation of the metal film 3 on the first surface 2a of the substrate body 2 by physical vapor deposition such as evaporation, sputtering, or ion plating, chemical vapor deposition, or plating, and its thickness is set to the same as the thickness t2 of the metal film 3 formed on the first surface 2a, in the range of 0.1% to 2% of the thickness t1 of the substrate body 2.

[0031] Using this carrier substrate 21, a semiconductor device (semiconductor package) can be manufactured on the second surface 2b of the carrier substrate 21 by the same steps as in the first embodiment described above. In this carrier substrate 21, the metal film 3 is formed not only on the first surface 2a but also on the outer peripheral surface 2c, and the metal film 3 on the outer peripheral surface 2c forms a cylindrical shape, resulting in a large section modulus and higher rigidity. Furthermore, when heated, heat is quickly conducted to the outer peripheral surface 2c of the substrate body 2, ensuring better thermal uniformity and improving the quality of the resulting semiconductor package.

[0032] [Third embodiment] The second surface 2b of the carrier substrate has a semiconductor device formed thereon via a temporary fixing layer 11, and a metal film 3 may also be formed on this second surface 2b. Fig. 5 shows an embodiment in which a metal film 3 is formed on both the first surface 2a and the second surface 2b of the substrate body 2. The thickness of the metal film 3 on both surfaces is set within a range of 0.1% to 2% of the thickness t1 of the substrate body 2, and the thicknesses of the metal films 3 on the first surface 2a and the second surface 2b may be the same or different. When a semiconductor device is manufactured using the carrier substrate 22 of this third embodiment, a temporary fixing layer 11 is formed on the metal film 3 on the second surface 2b. In the third embodiment, the metal film 3 may also be formed on the outer peripheral surface 2c.

[0033] Alternatively, the metal film 3 may be formed only on the second surface 2b instead of the first surface 2a. However, since the second surface 2b is the side that is peeled off in the peeling step, it is preferable to form the metal film 3 on the first surface 2a so as not to interfere with the peeling operation.

[0034] The present invention is not limited to the configurations of the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. For example, in the embodiment, the rewiring layer 12, the semiconductor chip 13, and the sealing resin 15 are formed in that order on the carrier substrate 1 (rewiring layer first type), but the reverse may be true, in which the semiconductor chip 13 is placed on the carrier substrate 1, the sealing resin 15 is molded, and then the rewiring layer 12 is formed (chip first type).

[0035] The timing of peeling off the carrier substrate 1 also includes peeling off after the formation of the rewiring layer 12, the mounting of the semiconductor chip 13, and the resin sealing are all completed, as well as peeling off during these operations, for example, after molding the sealing resin in a chip-first type. For this reason, the process sequence may be such that after at least a part of the semiconductor device is formed in the semiconductor device formation process, the carrier substrate 1 is peeled off (peeling process), and then other parts of the semiconductor device are formed. [Example]

[0036] Single crystal silicon and polycrystalline silicon were used as the substrate body 2, and a metal film 3 of aluminum or copper was formed on one side of it, and various physical properties such as breaking stress and flexural modulus were measured. As a comparative reference sample, a substrate body (silicon only) 2 without the metal film 3 was also measured. In both cases, the substrate body 2 had a width of 4.0±0.1 mm, a length of 40±0.1 mm, and a thickness of 3.0±0.1 mm. By wet etching with fluoronitric acid, chipping at the corners of the sides between the supports 31 in FIG. 6 (two sides: sides where bending stress acts during the fracture stress measurement described below) was suppressed to a length of 40 μm or less. The length of this chipping was measured using the measurement mode of an optical microscope. The concentration of fluoronitric acid used for etching was HF:HNO3:CH3COOH=1:2:1. The metal film 3 was formed to a thickness of 5 μm or 10 μm.

[0037] The test was performed using a precision universal testing machine (autograph). As shown in Figure 6, the sample was placed on supports 31 spaced apart by L = 30 mm, with the metal film 3 positioned underneath. A pressure metal fitting was used at the midpoint between the supports 31 to press the substrate body 2 of the sample in the thickness direction indicated by the arrow, and the stress at break (breaking stress) was measured to determine the bending modulus.

[0038] The results are shown in Table 1. Samples No. 1 and 6 in Table 1 are comparative reference samples that do not have a metal film. Table 1 also shows the calculated percentage change (measured value of the target sample / measured value of the comparative reference sample - 1) for both the breaking stress and flexural modulus compared to the comparative reference sample.

[0039] [Table 1]

[0040] As shown in Table 1, the fracture stress of both single-crystal and polycrystalline silicon substrates increased when a metal film was formed. Since the thickness of the substrate was 3 mm and the film thickness was 5 μm or 10 μm, it was possible to improve strength with a film thickness of approximately 0.17% of the thickness of the substrate. This increase in fracture stress is thought to be due to the ductility of aluminum or copper. Because aluminum and copper are more ductile than silicon, when force is applied to the silicon (substrate) with the metal film, the metal film acts as a buffer layer, improving strength against cracking.

[0041] In terms of the flexural modulus, which indicates rigidity, of the substrate bodies with aluminum metal films formed (samples Nos. 2, 3, 5, 7, 8, and 10), samples Nos. 5 and 10, which had aluminum metal films formed on both sides of the substrate body, had a higher flexural modulus than the substrate bodies made of silicon alone without a metal film (samples Nos. 1 and 6), but among the substrate bodies with aluminum metal films formed on one side, some had a higher flexural modulus (sample 3) and others had a lower flexural modulus (samples Nos. 2, 7, and 8). This indicates that even with a metal film formed, warping occurs to the same extent as with regular silicon. On the other hand, the substrate body on which the copper metal film was formed (samples Nos. 4 and 9) had a higher flexural modulus than the substrate body made of silicon alone, and it was found that warping was suppressed. [Explanation of symbols]

[0042] 1 Carrier Board 2. Board body 2a Front page 2b Second side 2c Outer surface 3 Metal Film 11 Temporary fixing layer 12 Redistribution layer 12a Insulating film 12b Circuit conductor 13 Semiconductor chips 14 Electrode terminal 15 Sealing resin 16 Semiconductor Package (Semiconductor Device)

Claims

1. A carrier substrate for semiconductor device manufacturing, characterized in that a first surface and a second surface of a substrate body made of silicon are formed parallel to each other, and a metal film is formed on at least the first surface of the substrate body.

2. 2. The carrier substrate for manufacturing semiconductor devices according to claim 1, further comprising a metal film formed on an outer peripheral surface connecting the peripheries of the first surface and the second surface.

3. 2. The carrier substrate for manufacturing semiconductor devices according to claim 1, wherein the metal film is made of aluminum or copper and has a thickness of 0.2% or more of the thickness of the substrate body.

4. 2. The carrier substrate for manufacturing semiconductor devices according to claim 1, wherein the length of chipping occurring at the corners of the substrate body is 50 [mu]m or less.

5. 5. A semiconductor device manufacturing method comprising: a temporary fixing layer forming step of forming a temporary fixing layer on the surface of either the first surface side or the second surface side of the carrier substrate for semiconductor device manufacturing according to claim 1; a semiconductor device forming step of forming at least a part of a semiconductor device on the temporary fixing layer; and a peeling step of peeling off the temporary fixing layer and the carrier substrate after the semiconductor device forming step.

6. 6. The method for manufacturing a semiconductor device according to claim 5, wherein the metal film is formed on the first surface, and the temporary fixing layer is formed on the second surface.

Citation Information

Patent Citations

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