Switching circuit

Abstract

To provide a switching circuit capable of outputting a pulse voltage at an arbitrary voltage value.SOLUTION: A switching circuit 1 for outputting a voltage at a connection point 23 of a high-side switching part 21 and a low-side switching part 22 to a capacitive load 2 includes: a high-side switching part 21 and a low-side switching part 22 connected between a reference potential and a DC voltage source 10 for outputting a DC voltage at a predetermined absolute value in series; a resistor 40 arranged between the connection point 23 and the capacitive load 2; and a control part 30 for controlling on-timing at operating the switching of the low-side switching part 22 at a first frequency, based on an on-timing signal generated based on the comparison result between a preset on-duty ratio setting signal V2 and a comparison signal V1 of the first frequency.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The technology of the present disclosure relates to switching circuits. [Background technology]

[0002] Switching circuits that generate pulse voltages are used in various industrial fields. One example is a switching circuit that outputs a pulse voltage in a high-frequency band (e.g., 100 kHz or higher) to a load that includes a capacitive component, as shown in Patent Document 1. In such a switching circuit, there is a demand for outputting a pulse voltage while changing its voltage value, for example, for gradually increasing or decreasing the voltage value (absolute value). A typical switching circuit is composed of a DC voltage source including a DC / DC converter and an inverter circuit that intermittently outputs the DC voltage from the DC voltage source, so in order to output a pulse voltage while changing its value as described above, it is necessary to vary the voltage value of the output voltage of the DC / DC converter.However, it is difficult to vary the voltage value of the output voltage of a DC / DC converter in high-frequency frequency bands (for example, frequency bands of 100 kHz or higher). Therefore, as an alternative technique, it is conceivable to provide a plurality of DC voltage sources that output voltages of different voltage values, and to switch between the DC voltage sources that are output sources. However, since multiple DC voltage sources are required, the configuration becomes complicated and large, and costs increase. In addition, only a preset voltage value can be output, so the voltage value cannot be set arbitrarily. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-42731 Summary of the Invention [Problem to be solved by the invention]

[0004] The technology of the present disclosure aims to provide a switching circuit that can output a pulse voltage of any voltage value. [Means for solving the problem]

[0005] The switching circuit of the disclosed technology has a high-side switching unit and a low-side switching unit that are connected in series between a reference potential and a DC voltage source that outputs a DC voltage of a predetermined absolute value, and that are turned on complementarily at a predetermined first frequency, and that outputs a voltage at a connection point between the high-side switching unit and the low-side switching unit to a capacitive load. When the switching unit of the high-side switching unit or the low-side switching unit that is connected between the DC voltage source and the connection point is defined as a first switching unit, the switching circuit includes: a control unit that controls the on-timing when the first switching unit is caused to perform a switching operation at the first frequency, based on an on-timing signal that is generated based on a comparison result between a preset on-duty ratio setting signal and a comparison signal of the first frequency; and a resistor that is arranged between the connection point and the capacitive load. [Effects of the Invention]

[0006] According to the technology of the present disclosure, a pulse voltage of any voltage value can be output. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing a schematic configuration of a switching circuit 1 according to an embodiment of the technology of the present disclosure. [Figure 2] FIG. 2 is a diagram showing a partial equivalent circuit of the switching circuit 1 shown in FIG. [Figure 3] FIG. 3 is a diagram showing the results of verifying the time variations of the voltages of the capacitor, resistor, and inductor in the equivalent circuit shown in FIG. [Figure 4]FIG. 4 is a diagram showing an example of the comparison signal V1, the on-duty ratio setting signal V2, and the pulse voltage Vp generated in the switching circuit 1 shown in FIG. [Figure 5] FIG. 5 is a diagram showing another example of the comparison signal V1, the on-duty ratio setting signal V2, and the pulse voltage Vp generated in the switching circuit 1 shown in FIG. [Figure 6] FIG. 6 is a diagram showing a schematic configuration of a switching circuit 1A, which is a modified example of the switching circuit 1. In FIG. [Figure 7] FIG. 7 is a schematic diagram showing a specific example of the on-duty ratio adjusting section 70 shown in FIG. [Figure 8] FIG. 8 is a diagram showing a schematic configuration of a switching circuit 1B, which is a modified example of the switching circuit 1. As shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0008] 1 is a diagram illustrating a schematic configuration of a switching circuit 1 according to an embodiment of the disclosed technology. The switching circuit 1 outputs a pulse voltage Vp to, for example, a load 2 having a capacitive component (hereinafter, referred to as a capacitive load 2).

[0009] The pulse voltage Vp is a voltage whose amplitude changes in only one direction, and is a voltage in which rectangular pulses of a predetermined amplitude value (for example, minus 10 kV) appear periodically. The frequency of the pulse voltage Vp can be, for example, in the range of 100 kHz to 2 MHz. Hereinafter, the period of the pulse voltage Vp will be referred to as period T1.

[0010] The switching circuit 1 includes a DC voltage source 10, a pulse converter 20, a controller 30, a resistor 40, and an inductor 50. The inductor 50 is an equivalent representation of the inductance of the wiring connecting the switching circuit 1 and the capacitive load 2. Therefore, inductance exists even if a physical inductor is not provided. Of course, it is also possible to provide a physical inductor.

[0011] Since the capacitive load 2 has a capacitance component, the circuit seen from the pulse converter 20 toward the capacitive load 2 can be regarded as an RLC circuit. For this reason, the capacitive load 2 is shown in Figure 1 with the electrical symbol for a capacitor.

[0012] DC voltage source 10 generates a DC voltage Vd of any magnitude (for example, minus 10 kV) and includes, for example, an AC / DC converter that converts an AC voltage supplied from a commercial power source (not shown) into a DC voltage, a DC / DC converter, a smoothing capacitor, etc. The positive terminal of DC voltage source 10 is grounded, and the negative terminal of DC voltage source 10 is connected to the input terminal of pulse conversion unit 20. The potential at the ground point is taken as the reference potential.

[0013] The pulse conversion unit 20 includes a high-side switching unit 21 and a low-side switching unit 22 connected in series, and converts the DC voltage Vd generated by the DC voltage source 10 into a pulse voltage Vp by controlling the conduction states of the high-side switching unit 21 and the low-side switching unit 22.

[0014] 1, for the sake of simplicity, the high-side switching unit 21 and the low-side switching unit 22 are shown as being each one (single), but the high-side switching unit 21 and the low-side switching unit 22 each have one or more switching elements. When two or more switching elements are included, they are connected in series, for example. It is also possible to use switching elements connected in parallel. For example, in the low-side switching unit 22, two switching elements may be connected in parallel, and these two parallel switching elements may be connected in series, thereby using a total of four switching elements.

[0015] In the illustrated example, the switching elements of the high-side switching unit 21 and the low-side switching unit 22 are each configured by an NMOS (N-Channel Metal-Oxide-Semiconductor) transistor.

[0016] If the connection point between the high-side switching unit 21 and the low-side switching unit 22 is node 23, the source terminal of the switching element in the low-side switching unit 22 that is farthest from node 23 is connected to the negative electrode of the DC voltage source 10. The drain terminal of the switching element in the high-side switching unit 21 that is farthest from node 23 is grounded. In addition, node 23 serves as the output terminal of the pulse conversion unit 20. A resistor 40, an inductor 50, and a capacitive load 2 are connected in series to this output terminal.

[0017] Furthermore, the switching elements of the high-side switching unit 21 and the low-side switching unit 22 may each be other switching devices such as an IGBT (Insulated Gate Bipolar Transistor).

[0018] In this embodiment, since the output is a negative voltage, of the high-side switching unit 21 and the low-side switching unit 22, the switching unit connected between the DC voltage source 10 and the node 23 is referred to as the first switching unit, and the other switching unit is referred to as the second switching unit. Therefore, in the switching circuit 1 shown in FIG. 1, the low-side switching unit 22 is the first switching unit, and the high-side switching unit 21 is the second switching unit. Similarly, in the switching circuit 1A shown in FIG. 6 (to be described later), the low-side switching unit 22 is the first switching unit, and the high-side switching unit 21 is the second switching unit. However, in the switching circuit 1B shown in FIG. 8 (to be described later), since the output is a positive voltage, the high-side switching unit 21 is the first switching unit, and the low-side switching unit 22 is the second switching unit.

[0019] The conductive state of the switching elements of the high-side switching unit 21 is controlled by a gate control signal GH supplied from the control unit 30. When the gate control signal GH is at a high level, the switching elements of the high-side switching unit 21 are in a conductive state (hereinafter also referred to as "on"), and when the gate control signal GH is at a low level, the switching elements of the high-side switching unit 21 are in a non-conductive state (hereinafter also referred to as "off").

[0020] The conduction state of the switching elements of the low-side switching unit 22 is controlled by a gate control signal GL supplied from the control unit 30. When the gate control signal GL is at a high level, the switching elements of the low-side switching unit 22 are turned on, and when the gate control signal GL is at a low level, the switching elements of the low-side switching unit 22 are turned off.

[0021] Hereinafter, for the sake of simplicity, when the switching element of the high-side switching unit 21 is on, it may be referred to as the high-side switching unit 21 being on, and when the switching element of the high-side switching unit 21 is off, it may be referred to as the high-side switching unit 21 being off. Similarly, when the switching element of the low-side switching unit 22 is on, it may be referred to as the low-side switching unit 22 being on, and when the switching element of the low-side switching unit 22 is off, it may be referred to as the low-side switching unit 22 being off.

[0022] The control unit 30 controls the levels of the gate control signals GH and GL so that the high-side switching unit 21 and the low-side switching unit 22 are alternately turned on (complementarily turned on). The pulse conversion unit 20 generates a pulse voltage Vp by alternately turning on (complementarily turned on) the high-side switching unit 21 and the low-side switching unit 22. During a period T1 in which the high-side switching unit 21 is off and the low-side switching unit 22 is on, the pulse conversion unit 20 outputs a rectangular pulse having the same amplitude as the DC voltage Vd. During a period in which the high-side switching unit 21 is on and the low-side switching unit 22 is off during the period T1, the amplitude of the pulse voltage Vp is 0 V (no rectangular pulse is output). In this way, the pulse conversion unit 20 repeatedly outputs a rectangular pulse having an amplitude Vd in the period T1.

[0023] 2 is an equivalent circuit of a circuit consisting of a DC voltage source 10, a pulse converter 20, a resistor 40, an inductor 50, and a capacitive load 2 in a switching circuit 1, which can be regarded as an RLC circuit as described above. The circuit shown in FIG. 2 is a DC power source (voltage is indicated as "E") to which a resistor (resistance value is indicated as "R"), an inductor (inductance is indicated as "L"), a capacitor (capacitance value is indicated as "C"), and a switch are connected in series. The DC power source in FIG. 2 corresponds to the DC voltage source 10, and the switch corresponds to the pulse converter 20. The on state of the switch corresponds to a state in which a rectangular pulse is output from the pulse converter 20.

[0024] In the equivalent circuit of Figure 2, the symbols are defined as follows: t: time I: Current flowing in the circuit ER: Resistor voltage EC: Capacitor voltage EL: Inductor voltage

[0025] In the equivalent circuit shown in Figure 2, the above symbols when n times the unit time Δt (n is 0, 1, 2, etc.) has passed since the switch was turned on are expressed as t n, I n , E.R. n , E.C. n , E.L. n Then, the following equations (a) to (d) hold. When the switch is turned on, n=0. EL n +ER n +EC n =E (a) ER n =R*I n (b) EC n =EC n-1 +(I n-1 *Δt) / C (c) EL n =(I n -I n-1 ) / Δt*L (d)

[0026] Transforming equation (d) gives equation (e). I n =I n-1 +EL n / L*Δt (e)

[0027] Transforming equation (a) gives equation (f). EL n =E-ER n -EC n (f)

[0028] If the unit time Δt is a small value, for example, about 1 ns, then equation (b) can be approximated by the following equation (g). ER n =R*I n-1 (g)

[0029] Using these equations, the changes in voltages ER, EC, and EL were calculated for each Δt that elapses from the time the switch is turned on (n=0), and the results are shown in Figure 3. In this calculation, E=10kV, R=100Ω, L=1μH, C=2000pF, Δt=1ns, and the current I0 was set to 0A.

[0030] 3, it can be seen that even if the voltage E of the DC power supply is constant, changing the time the switch is turned on changes the amount of current flowing through the capacitor, thereby changing the capacitor voltage. In terms of switching circuit 1, this means that even if the output voltage of DC voltage source 10 is constant, the peak value of voltage Vc of capacitive load 2 in period T1 can be controlled by controlling the conduction states of high-side switching unit 21 and low-side switching unit 22 included in pulse conversion unit 20.

[0031] Based on the above verification results, in the switching circuit 1, while the amplitude value of the rectangular pulse output from the pulse conversion unit 20 is kept constant for each period T1, the output time (on-duty ratio) of the rectangular pulse per period T1 is controlled to control the peak value of the voltage Vc (see Figure 1) of the capacitive load 2 in period T1 (the voltage value when the absolute value of the voltage Vc of the capacitive load 2 in period T1 is maximum).

[0032] However, the results shown in Figure 3 are based on the assumption that the capacitive load 2 is a pure capacitor, so errors will occur if the capacitive load 2 contains a resistance component or an inductance component. However, if the error is taken into consideration during control, there will be no practical problems. The voltage Vc of the capacitive load 2 corresponds to the voltage at the output terminal 80 of the switching circuit 1.

[0033] The control of the peak value will be described in detail with reference back to FIG.

[0034] The control unit 30 includes a first power supply 31 that generates a comparison signal V1 having a waveform that repeats with a period T1, a second power supply 32 that generates an on-duty ratio setting signal V2, a comparator 33 that compares the comparison signal V1 with the on-duty ratio setting signal V2, and a drive circuit 34 that switches the conduction state between the high-side switching unit 21 and the low-side switching unit 22 according to the output of the comparator 33.

[0035] The comparison signal V1 is, for example, a voltage in which triangular waves of the same amplitude value appear continuously, and is generated every period T1.

[0036] The on-duty ratio setting signal V2 is a signal for setting the on-duty ratio of the low-side switching unit 22 during the period T1, and the on-duty ratio of the low-side switching unit 22 is determined by the amplitude of the on-duty ratio setting signal V2, as will be described later.

[0037] While any waveform pattern can be set for the on-duty ratio setting signal V2, in the example shown in Fig. 4, a waveform pattern for the on-duty ratio setting signal V2 is set for each period T2, which is longer than the period T1, and the set waveform pattern is set repeatedly. Furthermore, the amplitude of the on-duty ratio setting signal V2 is set for each of the four periods (T21, T22, T23, and T24) obtained by dividing the period T2. The second frequency, which is the reciprocal of the period T2, can take a value in the range of 10 Hz to 100 kHz, for example.

[0038] The upper part of Fig. 4 shows an example of the waveform of the comparison signal V1 and the waveform of the on-duty ratio setting signal V2. Fig. 4 shows an example in which the period T1 is 2.5 μs (the frequency of the comparison signal V1 is 400 kHz) and the period T2 is 40 μs (the repetition frequency of the on-duty ratio setting signal V2 is 25 kHz). In the upper part of Fig. 4, the triangular wave shown by the solid line represents the comparison signal V1, and the rectangular wave shown by the dashed line represents the on-duty ratio setting signal V2.

[0039] 4, the on-duty ratio setting signal V2 has an amplitude value of a first value in the first period T21 when the cycle T2 is divided into four, an amplitude value of a second value smaller than the first value in the second period T22, an amplitude value of a third value smaller than the second value in the third period T23, and an amplitude value of a fourth value smaller than the third value in the fourth period T24. Thus, in the example of FIG. 4, the on-duty ratio setting signal V2 has an amplitude value that decreases stepwise over the cycle T2.

[0040] The comparator 33 outputs a high-level signal when the on-duty ratio setting signal V2 is greater than the comparison signal V1, and outputs a low-level signal when the on-duty ratio setting signal V2 is equal to or less than the comparison signal V1. That is, the greater the amplitude of the on-duty ratio setting signal V2, the wider the signal width of the high-level signal. In this embodiment, the high-level signal is referred to as an on-timing signal, and the low-level signal is referred to as an off-timing signal.

[0041] The drive circuit 34 includes a NOT circuit 34A and an amplifier 34C connected in parallel to the output terminal of the comparator 33, and an amplifier 34B connected to the output terminal of the NOT circuit 34A. The output terminal of the amplifier 34B is connected to the gate terminal of the high-side switching unit 21. The output terminal of the amplifier 34C is connected to the gate terminal of the low-side switching unit 22.

[0042] When the on-duty ratio setting signal V2 is greater than the comparison signal V1, a high-level signal (on timing signal) is output from the comparator 33. As a result, the gate control signal GH supplied to the gate terminal of the high-side switching unit 21 becomes low level, and the gate control signal GL supplied to the gate terminal of the low-side switching unit 22 becomes high level. As a result, a rectangular pulse with an amplitude value Vd is output from the pulse conversion unit 20.

[0043] When the on-duty ratio setting signal V2 is equal to or lower than the comparison signal V1, the comparator 33 outputs a low-level signal (off timing signal). As a result, the gate control signal GH supplied to the gate terminal of the high-side switching unit 21 becomes high level, and the gate control signal GL supplied to the gate terminal of the low-side switching unit 22 becomes low level. As a result, the output of rectangular pulses from the pulse conversion unit 20 is stopped.

[0044] The middle part of Fig. 4 shows the waveform of pulse voltage Vp, which is generated in accordance with the magnitude relationship between comparison signal V1 and on-duty ratio setting signal V2 shown in the upper part of Fig. 4. During the period T1 when on-duty ratio setting signal V2 is greater than comparison signal V1, pulse converter 20 outputs a -10 kV rectangular pulse, and a current of an amount corresponding to the width of this rectangular pulse is supplied to capacitive load 2. During the period T1 when on-duty ratio setting signal V2 is equal to or less than comparison signal V1, output of the rectangular pulse from pulse converter 20 is stopped, and supply of current to capacitive load 2 is stopped.

[0045] The lower part of Fig. 4 shows the waveform of the voltage Vc of the capacitive load 2 when the pulse voltage Vp shown in the middle part of Fig. 4 is supplied. The pulse voltage Vp and voltage Vc shown in Fig. 4 show the results when the DC voltage Vd is -10 kV, the resistance value of the resistor 40 is 100 Ω, the inductance of the inductor 50 is 1 μH, and the capacitance of the capacitive load 2 is 2000 pF.

[0046] During period T1, while a rectangular pulse is being output from the pulse converter 20, the voltage Vc of the capacitive load 2 changes according to the output time of the rectangular pulse. During period T2, the output time of the rectangular pulse during period T1 becomes shorter in stages. Therefore, the absolute value of the peak value of the voltage Vc of the capacitive load 2 during period T1 decreases in the order of period T21, period T22, period T23, and period T24. In the example shown in FIG. 4 , due to the control of the high-side switching unit 21 and the low-side switching unit 22 by the control unit 30, during period T2, the peak value of the voltage Vc of the capacitive load 2 changes in a pattern in which its absolute value decreases in stages.

[0047] Therefore, the control unit 30 controls the on-timing when the first switching unit performs switching operation at the first frequency (e.g., 400 kHz) based on the on-timing signal generated by the control unit 30 based on the comparison result between a preset on-duty ratio setting signal V2 and a comparison signal V1 of the first frequency, thereby controlling the voltage Vc of the capacitive load 2.

[0048] The waveform pattern, amplitude value, and the like of the on-duty ratio setting signal V2 may be arbitrarily determined according to the required change pattern of the peak value of the voltage Vc of the capacitive load 2, and are not limited to those shown in Fig. 4. For example, the on-duty ratio setting signal V2 shown in Fig. 4 may have a waveform pattern in which the amplitude values ​​in periods T21 and T22 are the same, the amplitude values ​​in periods T23 and T24 are the same, and the amplitude values ​​in periods T21 and T22 and periods T23 and T24 are different.

[0049] Furthermore, for example, the on-duty ratio setting signal V2 may have a waveform pattern in which the amplitude value changes continuously during the period T2. The upper part of Fig. 5 shows another example of the on-duty ratio setting signal V2. In the example shown in Fig. 5, the on-duty ratio setting signal V2 decreases in amplitude at a first slope during period T21, decreases in amplitude at a second slope smaller than the first slope during period T22, decreases in amplitude at a third slope smaller than the second slope during period T23, and reaches 0 V during period T24. When the on-duty ratio setting signal V2 having the pattern shown in Fig. 5 is used, the absolute value of the peak value of the voltage Vc of the capacitive load 2 decreases every time period T1 elapses during period T2, as shown in the lower part of Fig. 5.

[0050] 4 and 5, when the period T2 is set, the high-side switching unit 21 and the low-side switching unit 22 of the switching circuit 1 can perform a switching operation in which they repeatedly turn on and off complementarily at the first frequency during a continuous operation period defined by a predetermined on-duty ratio during the repetition period of the second frequency (during the period T2). Therefore, by simply determining the on-duty ratio setting signal V2 during the period T2, it is possible to set the on-duty ratio setting signal V2 for a period longer than the period T2.

[0051] 4, the on-duty ratio during cycle T2 is 1, and the entire cycle T2 is a continuous operation period, but in the example shown in Fig. 5, the on-duty ratio during cycle T2 is 0.75, and 75% of cycle T2 is a continuous operation period. Of course, cycle T2 does not necessarily have to be set.

[0052] 6 is a diagram showing a schematic configuration of a switching circuit 1A, which is a modified example of the switching circuit 1. The switching circuit 1A has the same configuration as the switching circuit 1, except that a peak value detection circuit 60 is added and an on-duty ratio adjustment unit 70 is added to the control unit 30.

[0053] The peak value detection circuit 60 is a circuit that detects the peak value Vm of the voltage Vc of the capacitive load 2 (the voltage Vc at the output terminal 80 of the switching circuit 1A) for each period T1, and includes a voltage divider circuit or a diode detection circuit.

[0054] 7 is a schematic diagram showing an example of the internal configuration of the on-duty ratio adjustment unit 70. The on-duty ratio adjustment unit 70 includes a processing circuit 71, a comparator 72, a first control circuit 73, a comparator 74, a second control circuit 75, a comparator 76, a third control circuit 77, a comparator 78, and a fourth control circuit 79.

[0055] Explaining this using the voltage waveform shown in FIG. 4 as an example, the processing circuit 71 averages the four peak values ​​Vm detected by the peak value detection circuit 60 during the period T21 to obtain the peak value Vm T21 Derive this peak value Vm T21 is input to the comparator 72.

[0056] The processing circuit 71 also averages the four peak values ​​Vm detected by the peak value detection circuit 60 during the period T22 to obtain the peak value Vm T22 Derive this peak value Vm T22 is input to the comparator 74.

[0057] The processing circuit 71 also averages the four peak values ​​Vm detected by the peak value detection circuit 60 during the period T23 to obtain the peak value VmT23 Derive this peak value Vm T23 is input to the comparator 76.

[0058] The processing circuit 71 also averages the four peak values ​​Vm detected by the peak value detection circuit 60 during the period T24 to obtain the peak value Vm T24 Derive this peak value Vm T24 is input to the comparator 78.

[0059] The comparator 72 detects the target value V of the peak value of the voltage Vc of the capacitive load 2 during the period T21. T21 and the peak value Vm input from the processing circuit 71 T21 The difference between these values ​​is calculated, and a signal corresponding to this difference is input to the first control circuit 73.

[0060] The comparator 74 detects the target value V of the peak value of the voltage Vc of the capacitive load 2 during the period T22. T22 and the peak value Vm input from the processing circuit 71 T22 The difference between these values ​​is calculated, and a signal corresponding to this difference is input to the second control circuit 75.

[0061] The comparator 76 detects the target value V of the peak value of the voltage Vc of the capacitive load 2 during the period T23. T23 and the peak value Vm input from the processing circuit 71 T23 The difference between these values ​​is calculated, and a signal corresponding to this difference is input to the third control circuit 77.

[0062] The comparator 78 detects the target value V of the peak value of the voltage Vc of the capacitive load 2 during the period T24. T24 and the peak value Vm input from the processing circuit 71 T24 The difference between these is calculated, and a signal corresponding to this difference is input to the fourth control circuit 79.

[0063] Based on the signal input from the comparator 72, the first control circuit 73 determines whether the peak value of the voltage Vc of the capacitive load 2 in the period T21 of the next cycle T2 is equal to or exceeds the target value V T21The amplitude value of the on-duty ratio setting signal V2 in the period T21 is adjusted so as to approach this. By adjusting the amplitude value, the output time of the rectangular pulse (width of the rectangular pulse) in the cycle T1 is adjusted in the next period T21.

[0064] Based on the signal input from the comparator 74, the second control circuit 75 determines whether the peak value of the voltage Vc of the capacitive load 2 in the period T22 of the next cycle T2 is equal to or exceeds the target value V T22 The amplitude value of the on-duty ratio setting signal V2 in the period T22 is adjusted so that it approaches . By adjusting the amplitude value, the output time of the rectangular pulse (width of the rectangular pulse) in the next period T22 is adjusted.

[0065] Based on the signal input from the comparator 76, the third control circuit 77 determines whether the peak value of the voltage Vc of the capacitive load 2 in the period T23 of the next cycle T2 is equal to or exceeds the target value V T23 The amplitude value of the on-duty ratio setting signal V2 in the period T23 is adjusted so that it approaches . By adjusting the amplitude value, the output time of the rectangular pulse (width of the rectangular pulse) in the cycle T1 in the next period T23 is adjusted.

[0066] Based on the signal input from the comparator 78, the fourth control circuit 79 determines whether the peak value of the voltage Vc of the capacitive load 2 in the period T24 of the next cycle T2 is equal to or exceeds the target value V T24 The amplitude value of the on-duty ratio setting signal V2 in the period T24 is adjusted so as to approach . By adjusting the amplitude value, the output time of the rectangular pulse (width of the rectangular pulse) in the cycle T1 is adjusted in the next period T21.

[0067] Target value V T21 to the target value V T24 may be acquired by the on-duty ratio adjusting section 70 from an external device, or may be obtained by inputting it to the switching circuit 1A by the user.

[0068] In this way, the control unit 30 controls the output time of the rectangular pulse from the pulse conversion unit 20 based on the peak value Vm detected by the peak value detection circuit 60 and the target peak value. By adjusting the output time of the rectangular pulse for each period T2 in this way, it is possible to obtain the desired peak value even when the DC voltage Vd drops or when a disturbance occurs that causes the capacitance of the capacitive load 2 to fluctuate.

[0069] As described above, with the switching circuit 1 and the switching circuit 1A, the peak value of the voltage Vc of the capacitive load 2 for each period T1 in period T2 can be controlled to any value. Such control of the peak value can be easily achieved by controlling the conduction time of the high-side switching unit 21 and the low-side switching unit 22. Because the conduction time of the high-side switching unit 21 and the low-side switching unit 22 can be controlled at high speed, the peak value can be changed in an extremely short period.

[0070] Fig. 8 is a diagram showing a schematic configuration of a switching circuit 1B, which is a modified example of the switching circuit 1. Unlike the DC voltage source 10 shown in Fig. 1, the switching circuit 1 shown in Fig. 8 has a negative terminal grounded and a positive terminal connected to the input terminal of the pulse conversion unit 20. Therefore, the DC voltage source 10 generates a positive DC voltage Vd (for example, plus 10 kV). In addition, the control unit 30 shown in Fig. 1 has been changed to a control unit 30-2, and the drive circuit 34 shown in Fig. 1 has been changed to a drive circuit 34-2.

[0071] 1, in the drive circuit 34-2, the output side of the NOT circuit 34A-2 is connected to the amplifier 34C, so that when the on-duty ratio setting signal V2 is greater than the comparison signal V1, the gate control signal GH supplied to the gate terminal of the high-side switching unit 21 goes high and the gate control signal GL supplied to the gate terminal of the low-side switching unit 22 goes low. As a result, a rectangular pulse having an amplitude value Vd (for example, plus 10 kV) is output from the pulse conversion unit 20.

[0072] In this way, the rectangular pulse output from the pulse conversion unit 20 may have not only a negative amplitude value Vd (for example, minus 10 kV) but also a positive amplitude value Vd (for example, plus 10 kV). Of course, the switching circuit 1B shown in FIG. 8 may also be provided with the peak value detection circuit 60 and on-duty ratio adjustment unit 70 shown in FIG. 6, and the output time of the on-timing signal may be adjusted every predetermined period based on the peak value of the voltage Vc of the capacitive load 2 (the voltage Vc at the output terminal 80 of the switching circuit 1B) detected by the detection circuit and the target peak value. These are clear from the above explanation, so detailed explanation will be omitted.

[0073] In the explanation so far, the peak value of the capacitive load 2 in the period T1 is controlled by controlling the output time of the rectangular pulse in that period T1. However, the method for controlling the peak value of the capacitive load 2 is not limited to this.

[0074] 4 and 5 show an example in which the amplitude value of the on-duty ratio setting signal V2 decreases stepwise over the period T2, but it is also possible for the amplitude value of the on-duty ratio setting signal V2 to increase stepwise over the period T2. Also, the on-duty ratio setting signal V2 may include periods in which the amplitude value decreases and periods in which it increases over the period T2. In other words, the on-duty ratio setting signal V2 can have any waveform. 4 and 5 show an example in which the cycle T2 is divided into four periods (period T21, period T22, period T23, and period T24), but this is not limiting. For example, the cycle T2 may be divided into three or five periods. The lengths of the divided periods may also differ from one another.

[0075] As described above, this specification discloses the following matters. The following components and the like corresponding to the above-described embodiments are described in parentheses, but the present invention is not limited to these.

[0076] [1] A switching circuit (1) is connected in series between a reference potential (ground potential) and a DC voltage source (10) that outputs a DC voltage of a predetermined absolute value, and includes a high-side switching unit (21) and a low-side switching unit (22) that are complementarily turned on at a predetermined first frequency (e.g., 400 kHz), and outputs a voltage at a connection point (23) between the high-side switching unit (21) and the low-side switching unit (22) to a capacitive load (2), When the switching unit connected between the DC voltage source (10) and the connection point (23) of the high-side switching unit (21) and the low-side switching unit (22) is defined as a first switching unit, a control unit (30) that controls an on-timing when the first switching unit is caused to perform a switching operation at the first frequency (e.g., 400 kHz) based on an on-timing signal that is generated based on a result of comparison between a preset on-duty ratio setting signal (V2) and a comparison signal (V1) of the first frequency; a resistor (40) disposed between the connection point (23) and the capacitive load (2); A switching circuit comprising:

[0077] [2] [1] A switching circuit according to the present invention, a detection circuit (peak value detection circuit 60) for detecting a peak value of a voltage at an output terminal (80) of the switching circuit; The control unit (30) is a switching circuit that adjusts the output time of the on-timing signal based on the peak value detected by the detection circuit and a target peak value for each predetermined period.

[0078] [3] [1] or [2], wherein the switching circuit The high-side switching unit (21) and the low-side switching unit (22) are switching circuits that perform switching operations that repeat on and off complementarily at the first frequency during a continuous operation period defined by a predetermined on-duty ratio during a repetition period of a second frequency (e.g., 25 kHz) that is lower than the first frequency.

[0079] [4] [3] A switching circuit according to the present invention, The predetermined period is set to a plurality of periods during the repetition period of the second frequency. [Explanation of symbols]

[0080] 1,1A,1B Switching circuit T1,T2 period 2 Capacitive load T21, T22, T23, T24 period 10 DC voltage source 20 Pulse conversion unit 21 High side switching section 22 Low-side switching section 23 Connection point (node) between the high-side switching section and the low-side switching section 30, 30-2 Control section 31 1st power supply 32 2nd power supply 33,72,74,76,78 Comparators 34, 34-2 Drive circuit 34A, 34A-2 NOT circuit 34B, 34C amplifier 40 resistor 50 inductor 60 Peak value detection circuit 70 Duty ratio adjustment section 71 Processing circuit 73 First control circuit 75 Second control circuit 77 Third control circuit 79 4th control circuit

Claims

1. A switching circuit having a high-side switching unit and a low-side switching unit connected in series between a reference potential and a DC voltage source that outputs a DC voltage of a predetermined absolute value, and that are complementarily turned on at a predetermined first frequency, and that outputs a voltage at a connection point between the high-side switching unit and the low-side switching unit to a capacitive load, When the switching unit connected between the DC voltage source and the connection point, out of the high-side switching unit and the low-side switching unit, is defined as a first switching unit, a control unit that controls an on-timing when the first switching unit performs a switching operation at the first frequency, based on an on-timing signal that is generated based on a result of comparison between a preset on-duty ratio setting signal and a comparison signal of the first frequency; a resistor disposed between the connection point and the capacitive load; A switching circuit comprising:

2. 2. The switching circuit of claim 1, a detection circuit for detecting a peak value of a voltage at an output terminal of the switching circuit; The control unit is a switching circuit that adjusts the output time of the on-timing signal based on the peak value detected by the detection circuit and a target peak value for each predetermined period.

3. 3. A switching circuit according to claim 1 or 2, The high-side switching unit and the low-side switching unit are a switching circuit that performs switching operations of repeatedly turning on and off complementarily at the first frequency during a continuous operation period defined by a predetermined on-duty ratio during a repetition period of a second frequency that is lower than the first frequency.

4. 4. The switching circuit of claim 3, The predetermined period is set to a plurality of periods during a repetition cycle of the second frequency.

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