Power factor correction converter system

Abstract

To provide a power factor correction converter system to improve the power factor of a PFC circuit.SOLUTION: A circuit may include a reference controller 140 and a gain adjuster. The reference controller 140 is configured to sample an input voltage VIN from an input stage 110 of the circuit and generate a modulation signal MOD based on a square of the input voltage VIN and an output current IOUT of an output stage 130 of the circuit using an error amplifier 246. The modulation signal MOD is configured to modulate conduction of a switch 124 of a power factor correction (PFC) converter of the circuit to cause an average output current of the output stage 130 of the circuit to follow a reference proportional to the square of the input voltage VIN. The gain adjuster adjusts the gain of the error amplifier 246 based on the input voltage VIN.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] This application relates to a power factor correction (PFC) converter system. [Background technology]

[0002] Power factor correction (PFC) shapes a power supply's input current to synchronize with the mains voltage to maximize the actual power drawn from the mains. In an ideal PFC circuit, the input current tracks the input voltage as a pure resistor, without input current harmonics. PFC circuits are used in AC power distribution systems to improve energy transfer efficiency. Passive PFC circuits use a filter to pass current at a desired frequency or range of frequencies to improve the power factor. Active PFC circuits change the waveform of the current drawn by the load to improve the power factor. Active PFC circuits use switches. The operation of such switches consumes power and affects the efficiency of the PFC circuit. Summary of the Invention

[0003] In the described example, the circuit may include a reference controller configured to sample an input voltage from an input stage of the circuit and generate a modulation signal based on the square of the input voltage, the modulation signal configured to modulate the conduction of a switch of a power factor correction (PFC) converter of the circuit to cause an average output current of an output stage of the circuit to track a reference proportional to the square of the input voltage.

[0004] In the described example, the circuit may include a reference controller and a gain adjuster. The reference controller is configured to sample an input voltage from an input stage of the circuit and generate a modulation signal using an error amplifier based on the square of the input voltage and the output current of the output stage of the circuit. The modulation signal is configured to modulate the conduction of a switch of a power factor correction (PFC) converter of the circuit to cause the average output current of the output stage of the circuit to track a reference proportional to the square of the input voltage. The gain adjuster adjusts the gain of the error amplifier based on the input voltage.

[0005] In the described example, the system may include a reference controller. The reference controller may include a voltage sampler, a reference generator, and a gain adjuster. The voltage sampler may include an input and an output, where the input of the voltage sampler is adapted to receive an input voltage. The reference generator may include a first input, a second input, and an output, where the first input of the reference generator is coupled to the output of the voltage sampler and the output of the reference generator is coupled to the input of a power factor correction (PFC) converter. The gain adjuster may include a first input, a second input, a third input, and an output, where the first input of the gain adjuster is adapted to receive the input voltage, the second input of the gain adjuster is adapted to receive a reference voltage, the third input of the gain adjuster is adapted to receive an output current, and the output of the gain adjuster is coupled to the second input of the reference generator. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a block diagram of a power factor correction (PFC) converter system.

[0007] [Figure 2] FIG. 1 is a circuit diagram of a power factor correction (PFC) converter circuit.

[0008] [Figure 3] FIG. 1 is a circuit diagram of a circuit for power factor correction (PFC).

[0009] [Figure 4A]FIG. 4 is a timing diagram of waveforms associated with the circuits for power factor correction (PFC) of FIGS. 2-3. [Figure 4B] FIG. 4 is a timing diagram of waveforms associated with the circuits for power factor correction (PFC) of FIGS. 2-3. DETAILED DESCRIPTION OF THE INVENTION

[0010] The present description relates to a system and method for power factor correction (PFC). The PFC is provided by a reference controller configured to sample an input voltage from an input stage of a circuit and an output current from an output stage. As described herein, the term "input stage" refers to a circuit element associated with a PFC converter system that corresponds to a portion of the PFC converter system that receives at least one input (e.g., an input voltage) to provide an operating function of the PFC converter system. As described herein, the term "output stage" refers to a circuit element associated with a PFC converter system that corresponds to a portion of the PFC converter circuit that provides a regulated output voltage of the PFC converter circuit based on the operating function of the PFC converter system. The reference controller generates a modulation signal based on a comparison of the square of the input voltage and the output current, for example, using an error amplifier. The modulation signal is configured to modulate the conduction of a switch of the PFC converter to cause the average output current of the output stage of the circuit to follow a reference proportional to the square of the input voltage. A gain adjuster may also be provided and configured to adjust the gain of the error amplifier based on the input voltage to mitigate zero-crossing distortion.

[0011] 1 is a block diagram of a power factor correction (PFC) converter system 100. The PFC converter system 100 may include a voltage source 110, a PFC converter 120, an output stage 130, and a reference controller 140. The PFC converter 120 may include, among other devices, a modulator 122 and a switch 124. The switch 124 may include multiple switches or switching devices (e.g., transistors). The output stage 130 may include a load 132. The reference controller 140 may include a voltage sampler 142 and a reference generator 144 that includes an error amplifier 146.

[0012] The voltage source 110 is located at the input stage of the PFC converter system 100 and supplies an input voltage V in In the output stage 130, an output current I out charges the output capacitor, producing an output voltage V across the load 132. out to provide.

[0013] The reference controller 140 calculates the square of the input voltage V in 2 and the output current I of the output stage 130 out For example, the voltage sampler 142 is configured to generate the modulation signal MOD based on the input voltage V from the input stage. in The reference generator 144 is configured to sample the square of the input voltage V of the PFC converter system 100 using an error amplifier 146. in 2 and the output current I of the output stage 130 out The modulation signal MOD is configured to modulate the conduction of the switch 124 of the PFC converter 120 to modulate the average output current I out_AVG is proportional to the square of the input voltage (e.g., sin 2 reference), thereby achieving PFC. out is configured to control

[0014] In this regard, the output current I outis generally readily available to PFC topologies (unlike other currents, such as input or inductor currents, which are difficult to access in bridgeless topologies), so the average output current I out_AVG For example, it is desirable to adjust the output current I out PFC control based on allows easier control for bridgeless PFC topologies.

[0015] According to one example, to provide a unity power factor, the modulation signal MOD can be provided such that the average input and output power is proportional to the square of the input voltage. P in =P out =k×V in 2 (1)

[0016] Output voltage V out is essentially constant, so the average output current I out_AVG must be proportional to the square of the input voltage. TIFF2025183177000002.tif548

[0017] As a result, the average output current I out_AVG is the square of the input voltage V in 2 If the average input current I is forced to follow a reference proportional to _in_AVG is the input voltage V in and the power factor is unity.

[0018] The PFC converter 120 may include an input and an output. The input of the PFC converter 120 is coupled to the output of the reference controller 140 or the output of the reference generator 144. The output of the PFC converter 120 is coupled to the load 132. The modulator 122 of the PFC converter 120 is configured to control the switch 124 based on the modulation signal MOD. For example, the modulator 122 may adjust the duty cycle, the duration of activation of the switch 124, the frequency, etc., for modulation of the switch 124 based on the received modulation signal MOD.

[0019] As used herein, the term "activating" with respect to a switch refers to closing the switch to provide current flow through the switch. Thus, activating a switch refers to closing a threshold voltage (e.g., threshold voltage V) to operate in linear or saturated mode. T ) to provide sufficient bias (e.g., V GS The voltage may be provided.

[0020] In either event, the modulator 122 modulates the conduction of the switch 124 of the PFC converter 120 to regulate the average output current I out_AVG is the square of the input voltage V in 2 and follow a standard proportional to I in V in In other words, the modulator 122 is configured to make the input voltage V IN The input current I follows in in such a way that the average output current I out_AVG is configured to modulate

[0021] 2 is a circuit diagram of a power factor correction (PFC) converter circuit. Circuit 200 may include a voltage source 110, a PFC converter 120 including a modulator 122 and a switch 124, and an output stage 130 including a load 132. In output stage 130, an output current I out charges the output capacitor C1, producing an output voltage V across the load 132. out The reference controller 140 may include a voltage sampler 142, a reference generator 144, and an error amplifier 146.

[0022] The reference controller 140 may include a first input, a second input, a third input, and an output. The first input of the reference controller 140 receives the input voltage V from the voltage source 110. inA second input of the reference controller 140 is coupled to the output of the current sensor 134 located in the output stage 130. A third input of the reference controller 140 is coupled to the load 132. An output of the reference controller 140 is coupled to the input of the PFC converter 120.

[0023] The voltage sampler 142 may include an input and an output. The input of the voltage sampler 142 receives the input voltage V from the voltage source 110. in , which corresponds to a first input of the reference controller 140.

[0024] The reference generator 144 may include a first input, a second input, a third input, and an output. The first input of the reference generator 144 is coupled to the output of the voltage sampler 142 and receives the input voltage V in A second input of the reference generator 144 is coupled to the output of the current sensor 134 located in the output stage 130 and adapted to receive the output current I out and corresponds to the second input of the reference controller 140. A third input of the reference generator 144 is coupled to the load 132 in the output stage 130 and outputs the output voltage V out and corresponds to a third input of the reference controller 140. The reference generator 144 includes a first multiplier circuit M1 having a first input, a second input, and an output. The first and second inputs of the first multiplier circuit M1 are adapted to receive the input voltage V from the output of the voltage sampler 142. in In this way, the output of the first multiplier circuit M1 is adapted to receive the input voltage V in Based on the square of the input voltage V in 2 In other words, the first multiplier circuit M1 multiplies the input voltage V in It receives the input of V and squares the input voltage V in 2 produces the output:

[0025] The reference generator 144 includes a second multiplier circuit M2 having a first input, a second input, and an output. The first input of the second multiplier circuit M2 is coupled to the output of the first multiplier circuit M1 (e.g., the square of the input voltage V in 2 The second input of the second multiplier circuit M2 provides the first error signal N=k / V from equation (2) above. out The output of the second multiplier circuit M2 is coupled to the output of the first multiplier circuit M1 (V in 2 ) and the output of the first error amplifier 246 (N=k / V out ) is the product of the first error signal from the first error amplifier 246 and the square of the input voltage V in 2 Based on the signal and the product signal N × V in 2 Therefore, the product signal N×V of the second multiplication circuit M2 is in 2 Or the output follows equation (2).

[0026] The first error amplifier 246 has a first input, a second input, and an output. The first input of the first error amplifier 246 is coupled to the load 132 and receives the output voltage V from the load 132 through a resistor R1. out and corresponds to a third input of the reference controller 140. A first input of the first error amplifier 246 is coupled to the output of the first error amplifier 246 via a capacitor C2. A second input of the first error amplifier 246 is coupled to a reference voltage V2. The first error amplifier 246 outputs the output voltage V of the load 132 as a first error signal N. out and the reference voltage V2. In other words, the first error amplifier 246 generates the difference between the output voltage V out and a reference voltage V2 to generate a first error signal N. The first error signal N of the first error amplifier 246 is coupled to a second input of the second multiplier circuit M2.

[0027] The reference generator 144 includes a second error amplifier 146 having a first input, a second input, and an output. The first input of the second error amplifier 146 is coupled to the output of the current sensor 134, which is disposed in the output stage 130 via a resistor R2, and which outputs an output current I out A first input of the second error amplifier 146 is coupled to the output of the second error amplifier 146 via a capacitor C3. A second input of the second error amplifier 146 is coupled to the output of the second multiplier circuit M2 and is adapted to receive the product signal N×V in 2 Therefore, the second error amplifier 146 is adapted to receive the output current I out The product signal N×V in 2 Compared with the product signal N×V in 2 and output current I out and a voltage associated with the I measured from the current sensor 134. The output of the second error amplifier 146 is coupled to the input of the PFC converter 120. In this manner, the second error amplifier 146 generates a modulated signal based on the I measured from the current sensor 134, as shown in equation (2). out I out =(k×V in 2 ) / V out =N×V in 2 The output of the reference generator 144 is coupled to the input of the PFC converter 120 and corresponds to the output of the reference controller 140.

[0028] Referring to Figure 1, the output current I out For example, when the voltage is close to zero, the input current I in is the input voltage V out, a longer conduction time may be required to allow the error amplifier 146 to track the input voltage V. In other words, near the zero crossings, the error amplifier 146 may be too slow to reach the value required for the correct duty cycle. However, the error amplifier 146 may not be able to allow the output to become fast enough. In this regard, by increasing the amplifier bandwidth of the error amplifier 146 around the zero crossings, zero crossing distortion is eliminated. In the example of FIG. 1, the reference controller 140 calculates the amplitude of the input voltage V in The error amplifier 146 includes a gain adjuster 148 that adjusts or increases the gain of the error amplifier 146 based on the current falling below a threshold. In this manner, adaptive current error amplifier bandwidth, time constant (TC) modification, or gain adjustment to the error amplifier 146 provides the advantage of minimizing, mitigating, or eliminating zero-crossing or crossover distortion, improving waveform quality by allowing the current to increase more rapidly, and therefore providing improved performance of the PFC during zero crossings.

[0029] FIG. 3 is a circuit diagram of a power factor correction (PFC) converter circuit. Circuit 300 of FIG. 3 is similar to circuit 200 of FIG. 2 except that reference controller 140 includes a gain adjuster, such as gain adjuster 148 of FIG. 1. Referring to FIG. 1, reference controller 140 may also include a gain adjuster, such as gain adjuster 148 of FIG. 3. According to one example, circuit 300 of FIG. 3 is a PFC converter circuit and includes PFC converter 120, which includes a modulator and a switch. Gain adjuster 148 may include a first input, a second input, a third input, and an output. A first input of gain adjuster 148 receives an input voltage V in A second input of the gain adjuster 148 is adapted to receive a reference voltage V3. A third input of the gain adjuster 148 is adapted to receive the output current I out The output of the gain adjuster 148 is coupled to a second input of the reference generator 144 (eg, at a first input of the second error amplifier 146).

[0030] The gain adjuster 148 may include an absolute value circuit 312 having an input and an output. The input of the absolute value circuit 312 corresponds to the first input of the gain adjuster 148. The input of the absolute value circuit 312 receives the input voltage V from the output of the voltage sampler 142. in The absolute value circuit 312 is adapted to receive an input signal (e.g., an input voltage V in ) to generate an output signal as an absolute value signal ABS, which is the absolute value of the input voltage V in For example, the absolute value signal ABS is generated based on the input voltage V in is a sine wave, the output to absolute value circuit 312 is a full-wave rectified sine wave. In this way, gain adjuster 148 adjusts the rectified input voltage V RECT is configured to adjust the gain of the error amplifier 146 of the reference controller 140 based on

[0031] The gain adjuster 148 may include a comparator 346 having a first input, a second input, and an output. A first input of the comparator 346 is coupled to the output of the absolute value circuit 312 (e.g., the ABS signal) and is coupled to the voltage V RECT A second input of the comparator 346 is coupled to a reference voltage V3. The comparator 346 is configured to generate a GAIN signal based on the absolute value signal ABS and the reference voltage V3 by comparing the two signals. In this manner, the output of the comparator 346 is configured to generate the GAIN signal and is coupled to the control for a gain adjustment switch SW1 that controls the time constant of the second error amplifier 146 based on the GAIN signal.

[0032] For example, the input voltage V inWhen the input voltage V falls below a reference voltage V3 (e.g., a threshold), the gain adjustment switch SW1 adjusts the gain for the second error amplifier 146. For example, the gain adjustment switch SW1 is configured to switch or toggle between a first position and a second position. In the first position, the gain adjustment switch SW1 connects the current sensor 134 in series with resistors R3 and R2 to the first input of the second error amplifier 146. In the second position, the gain adjustment switch SW1 connects the current sensor 134 in series with R2 to the first input of the second error amplifier 146. In this manner, the gain adjustment switch SW1 is configured to adjust the gain of the second error amplifier 146 by adjusting the resistance (e.g., R2, or R3+R2) at the first input of the second error amplifier 146 based on the GAIN signal. Thus, the gain adjustment switch SW1 adjusts the gain of the second error amplifier 146 based on the input voltage V in falls below the reference voltage V3, thereby mitigating zero-crossing distortion. In this manner, the gain adjuster 148 provides a simple solution and significant benefits to PFC performance for the PFC converter system 100 and / or circuits 200, 300.

[0033] 4A-4B are timing diagrams of waveforms associated with the circuits 200, 300 for power factor correction (PFC) of FIGS. 2-3. In FIG. 4A, zero-crossing distortion is a function of the average input current I associated with a circuit having a fixed gain (e.g., no adaptive current error amplifier bandwidth modification or gain adjustment). in_AVG The gain-adjusted average input current I in_AVG 4B illustrates a waveform in which zero-crossing distortion is minimized, such as using gain adjuster 148 of FIG. 3 to provide adaptive gain. As can be seen, waveform 402 contains zero-crossing distortion, while waveform 404 has little, if any, zero-crossing distortion. In FIG. 4B, the voltage associated with the second input of reference generator 144 or error amplifier 146 (e.g., V EA) are illustrated for a fixed gain scenario 412 (e.g., without using the gain adjuster 148 of FIG. 3) and an adaptive gain scenario 414 (e.g., with the gain adjuster 148 of FIG. 3). For example, around times t1 and t2, the absolute value of the waveform 402 falls below a zero-crossing distortion threshold (e.g., reference voltage V3) and therefore approaches a zero-crossing. In this regard, the voltage associated with the second input of the error amplifier 146 (e.g., V EA ) is larger (e.g., compared to waveform 414) when there is a fixed gain (e.g., no adaptive current error amplifier bandwidth modification). In the fixed gain scenario, the gain adjust switch SW1 is in the second position, connecting the current sensor 134 to resistor R2 and to the first input of the second error amplifier 146 (e.g., a smaller resistance relative to both resistor R3 and resistor R2 in the first position, and therefore a higher V EA ) in series.

[0034] Conversely, the voltage associated with the second input of the error amplifier 146 (e.g., V EA ) is smaller in the corresponding waveform 414 (e.g., compared to waveform 412) when there is adaptive current error amplifier bandwidth modification. In the adaptive current error amplifier bandwidth modification scenario, the gain adjust switch SW1 is in the first position, connecting the current sensor 134 to resistor R3, resistor R2, and the first input of the second error amplifier 146 (e.g., increased resistance relative to resistor R2 only in the second position, and therefore a lower V EA ), thereby eliminating zero-crossing or crossover distortion, as seen in waveform 404 of FIG. 4A.

[0035] The term "coupled" in this description may encompass a connection, communication, or signal path that enables a functional relationship consistent with this description. For example, if device A generates a signal that controls device B to perform a certain action, then (a) in a first example, device A is coupled to device B by a direct connection, or (b) in a second example, device A is coupled to device B via an intervening component C such that device B is controlled by device A via a control signal generated by device A, where intervening component C does not change the functional relationship between device A and device B.

[0036] In this description, a device that is "configured to" perform a certain task or function may be configured (e.g., programmed and / or hardwired) by a manufacturer at the time of manufacture to perform that function and / or may be configurable (or reconfigurable) by a user after manufacture to perform that function and / or other additional or alternative functions. Such configuration may occur through firmware and / or software programming of the device, through the construction and / or layout of the device's hardware components and interconnections, or by a combination thereof. Also, a circuit or device described herein as including particular components may instead be configured to combine those components to form the described circuit element or device. For example, a structure described herein as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage and / or current sources) may instead include only the semiconductor elements within a single physical device (e.g., a semiconductor die and / or integrated circuit (IC) package) that is configured to be coupled to at least some of the passive elements and / or sources to form the described structure, either during or after manufacture by an end user and / or a third party, etc.

[0037] The phrase "based on" means "based at least in part on." Thus, if X is based on Y, then X can be a function of Y and any number of other factors.

[0038] Modifications may be made to the exemplary embodiments described, and other embodiments are possible, within the scope of the following claims.

Claims

1. A circuit comprising: a reference controller; the reference controller: sampling an input voltage from an input stage of said circuit; generating a modulated signal based on the square of the input voltage; It is configured as follows: the modulation signal is configured to modulate the conduction of a switch of a power factor correction (PFC) converter of the circuit to cause an average output current of an output stage of the circuit to follow a reference proportional to the square of the input voltage. circuit.

2. 10. The circuit of claim 1, further comprising a gain adjuster configured to adjust a gain of an error amplifier of the reference controller based on a rectified input voltage.

3. 2. The circuit of claim 1, wherein the reference controller includes a reference generator configured to generate the modulation signal, the reference generator including a first multiplication circuit configured to generate a signal that is the square of the input voltage based on the input voltage.

4. 4. The circuit of claim 3, wherein the reference generator includes a first error amplifier configured to generate a first error signal based on an output voltage from an output stage of the circuit and a reference voltage.

5. 5. The circuit of claim 4, wherein the reference generator includes a second multiplier circuit configured to generate a product signal based on the first error signal and the square of the input voltage.

6. 6. The circuit of claim 5, wherein the reference generator includes a second error amplifier configured to generate the modulation signal based on the product signal and a voltage associated with an output current of the output stage of the circuit.

7. 2. A PFC converter circuit including the circuit of claim 1, wherein the PFC converter circuit includes the PFC converter, The PFC converter The switch; a modulator configured to modulate conduction of the switch based on the modulation signal; a load configured to receive an output voltage based on an output current of the output stage; Including, PFC converter circuit.

8. A circuit comprising: a reference controller and a gain adjuster; the reference controller: sampling an input voltage from an input stage of said circuit; using an error amplifier to generate a modulation signal based on the square of the input voltage and the output current of an output stage of the circuit; It is configured as follows: the modulation signal is configured to modulate the conduction of a switch of a power factor correction (PFC) converter of the circuit to cause an average output current of the output stage of the circuit to follow a reference proportional to the square of the input voltage; The circuit wherein the gain adjuster is configured to adjust the gain of the error amplifier based on the input voltage.

9. 9. The circuit of claim 8, wherein the reference controller includes a reference generator configured to generate the modulation signal, the reference generator including a first multiplication circuit configured to generate a signal that is the square of the input voltage based on the input voltage.

10. 10. The circuit of claim 9, wherein the reference generator includes a first error amplifier configured to generate a first error signal based on an output voltage from an output stage of the circuit and a first reference voltage.

11. 11. The circuit of claim 10, wherein the reference generator includes a second multiplier circuit configured to generate a product signal based on the first error signal and the signal of the square of the input voltage.

12. 12. The circuit of claim 11, wherein the gain adjuster includes an absolute value circuit configured to generate an absolute value signal based on the input voltage.

13. 13. The circuit of claim 12, wherein the gain adjuster includes a comparator configured to generate a gain signal based on the absolute value signal and a second reference voltage.

14. 14. The circuit of claim 13, wherein the reference generator includes a second error amplifier configured to generate the modulation signal based on the product signal and a voltage associated with an output current of the output stage of the circuit.

15. 15. The circuit of claim 14, wherein the gain adjuster is configured to adjust the gain by adjusting a resistance at an input of the second error amplifier based on the gain signal.

16. 16. The circuit of claim 15, wherein the gain adjuster includes a gain adjust switch configured to adjust the resistance at the input of the second error amplifier by toggling between at least a first position and a second position.

17. 9. A PFC converter circuit including the circuit of claim 8, wherein the PFC converter circuit includes the PFC converter, The PFC converter The switch; a modulator configured to modulate conduction of the switch based on the modulation signal; A PFC converter circuit comprising:

18. 1. A system comprising: a reference controller; the reference controller: a voltage sampler including an input and an output, the input of the voltage sampler adapted to receive an input voltage; a reference generator including a first input, a second input, and an output, the first input of the reference generator coupled to the output of the voltage sampler and the output of the reference generator coupled to an input of a power factor correction (PFC) converter; a gain adjuster including a first input, a second input, and an output, the first input of the gain adjuster adapted to receive the input voltage, the second input of the gain adjuster adapted to receive a first reference voltage, the third input of the gain adjuster adapted to receive an output current, and the output of the gain adjuster coupled to the second input of the reference generator; Including, the system.

19. 20. The system of claim 18, an output stage including a load; the PFC converter including an input and an output; the output of the PFC converter is coupled to the load. system.

20. 20. The system of claim 18, wherein the reference generator comprises: a first multiplier circuit having a first input, a second input, and an output; a second multiplier circuit having a first input, a second input, and an output; a first error amplifier having a first input, a second input, and an output; a second error amplifier having a first input, a second input, and an output; Including, the first input and the second input of the first multiplier circuit are coupled to the output of the voltage sampler and correspond to the first input of the reference generator; the first input of the second multiplier circuit is coupled to the output of the first multiplier circuit; the second input of the second multiplier circuit is coupled to the output of the first error amplifier; the first input of the first error amplifier is coupled to an output stage including a load; the second input of the first error amplifier is coupled to a second reference voltage; the first input of the second error amplifier is coupled to a current sensor at the output stage and corresponds to the second input of the reference generator; the second input of the second error amplifier is coupled to the output of the second multiplier circuit; the output of the second error amplifier is coupled to the input of the PFC converter and corresponds to the output of the reference generator; system.

21. 21. The system of claim 20, wherein the gain adjuster comprises: an absolute value circuit having an input and an output; a comparator having a first input, a second input, and an output; a gain adjust switch configured to switch between a first position and a second position; Including, the input of the absolute value circuit is coupled to the output of the voltage sampler; the first input of the comparator is coupled to the output of the absolute value circuit; the second input of the comparator is adapted to receive the first reference voltage; the output of the comparator is coupled to a control for the gain adjust switch; the first position for the gain adjust switch couples the first input of the second error amplifier to the current sensor through a first resistor; the second position for the gain adjust switch couples the first input of the second error amplifier to the current sensor through a second resistor; system.

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