Imaging device

The image sensor optimizes signal readout by combining focus detection pixel signals through an adder unit, addressing inefficiencies and reducing data and power consumption, thereby improving focus detection efficiency.

JP2025188273APending Publication Date: 2025-12-25NIKON CORP
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Patent Information

Application Number
JP2025176312
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-10-20
Publication Date
2025-12-25

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  • Figure 2025188273000001_ABST
    Figure 2025188273000001_ABST
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Abstract

To provide an imaging device having low power consumption necessary for signal output.SOLUTION: An imaging device comprises: a plurality of pixels that output signals to be used for detecting a focused state of a subject image formed by an optical system and that are arranged in a first direction and a second direction crossing the first direction; a signal line that is wired in the second direction and outputs signals from the pixels; and an addition unit that adds a plurality of signals among signals output from the plurality of pixels arranged in the first direction to the signal line to generate an addition signal and that, when the plurality of pixels outputting signals to be added have different positions in the second direction, makes different the position in the first direction of at least one pixel among the plurality of pixels outputting signals to be added. The addition unit adds, at three or more positions of the plurality of pixels in the second direction, signals of the plurality of pixels arranged in the first direction to generate an addition signal. The combination of positions in the first direction of the plurality of pixels outputting signals to be added is different in each of the three or more positions.SELECTED DRAWING: Figure 4
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Description

[Technical Field]

[0001] The present invention relates to an imaging device. [Background technology]

[0002] There is a demand for more efficient signal readout from an image sensor that has imaging pixels for capturing an image formed by an optical system and pixels for focus detection (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-175145 Summary of the Invention

[0004] According to a first aspect, an imaging element includes a plurality of pixels arranged in a first direction and a second direction intersecting the first direction, which output signals used to detect the focus state of a subject image formed by an optical system; signal lines wired in the second direction and through which signals from the pixels are output; and an adder unit that adds together a plurality of signals output to the signal lines from the plurality of pixels arranged in the first direction to generate a summed signal, and changes the position in the first direction of at least one of the plurality of pixels that output the summed signal when the positions in the second direction of the plurality of pixels that output the summed signal are different, and the adder unit adds together signals from a plurality of pixels arranged in the first direction at at least three positions in the second direction of the plurality of pixels to generate a summed signal, and the combinations of positions in the first direction of the plurality of pixels that output the summed signal are different for each of the at least three positions. [Brief explanation of the drawings]

[0005] [Figure 1] 1 is a cross-sectional view schematically showing the configuration of an imaging apparatus according to an embodiment. [Figure 2]FIG. 2 is a plan view of the imaging element according to the embodiment, viewed from the imaging surface side. [Figure 3] FIG. 2 is an enlarged cross-sectional view of a pixel included in the imaging element. [Figure 4] FIG. 2 is a diagram schematically showing some of the AF pixels included in the image sensor, a readout section, and an addition section. [Figure 5] 5A and 5B are diagrams for explaining addition of signals output from AF pixels. [Figure 6] 5A and 5B are diagrams for explaining addition of signals output from AF pixels. [Figure 7] FIG. 10 is a diagram for explaining a column address in the x direction corresponding to an added output signal. [Figure 8] FIG. 10 is a plan view schematically showing a part of pixels of an image sensor according to a second modification. [Figure 9] FIG. 10 is an enlarged cross-sectional view of a pixel included in the image sensor according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0006] (First embodiment) 1 is a cross-sectional view schematically showing the configuration of an imaging device 1 according to the first embodiment. The imaging device 1 includes an imaging optical system 2, an imaging element 3, an imaging control unit 4, a lens driving unit 5, and a display unit 6. The x, y, and z directions indicated by arrows in Figure 1 are mutually orthogonal. Note that the x, y, and z directions shown in the following figures are the same as the x, y, and z directions shown in Figure 1, respectively.

[0007] The imaging optical system 2 forms a subject image on the imaging surface of the imaging element 3. The imaging optical system 2 includes a front lens group 2a, a middle lens group 2b, and a rear lens group 2c. Each of the front lens group 2a, the middle lens group 2b, and the rear lens group 2c may be composed of multiple lenses.

[0008] As an example, the middle group lens 2b is a lens for adjusting the focus of the imaging optical system 2. The middle group lens 2b is configured to be movable in the direction of the optical axis AX that is parallel to the z direction. The lens driving unit 5 has an actuator (not shown) that moves the middle lens group 2b in the direction of the optical axis AX.

[0009] The imaging element 3 captures an image of a subject and outputs a signal. The imaging control unit 4 controls each unit, including the imaging element 3. The imaging control unit 4 performs image processing and the like on the image signal output by the imaging element 3 to generate image data. The imaging control unit 4 records the image data on a recording medium (not shown) and performs processing such as displaying an image based on the image data on the display unit 6. The display unit 6 is a display device having a display member, such as a liquid crystal panel.

[0010] The imaging control unit 4 further performs focus detection processing required for automatic focusing (AF) of the imaging optical system 2 using a known phase difference detection method. Specifically, the imaging control unit 4 detects the in-focus position of the middle group lens 2b for forming an image by the imaging optical system 2 on the imaging surface of the imaging element 3. The imaging control unit 4 detects the amount of image shift between the first and second images based on a pair of focus detection signals output from the imaging element 3, as will be described later. Based on the detected amount of image shift, the imaging control unit 4 calculates the amount of shift (defocus amount) between the imaging position of the subject in the imaging optical system 2 and the imaging surface of the imaging element 3. Then, the movement amount of the middle group lens 2 is calculated according to the defocus amount, and the middle group lens 2 is driven, thereby automatically performing focus adjustment.

[0011] The focus adjustment of the imaging optical system 2 may be performed by moving the front lens group 2a or the rear lens group 2c in the direction of the optical axis AX, or by driving the entire front lens group 2a, middle lens group 2b, and rear lens group 2c that make up the imaging optical system 2 in the direction of the optical axis AX.

[0012] (image sensor) 2 is a view of the image sensor 3 as seen from the imaging surface side, i.e., from the +z side of FIG. 1. The image sensor 3 has a semiconductor substrate 7 and a plurality of pixels 10 arranged in the x and y directions on the semiconductor substrate 7. The arrangement of the pixels 10 in the x direction is also called a "row," and the arrangement of the pixels 10 in the y direction is also called a "column." Although some of the pixels 10 are omitted in FIG. 2, a large number of pixels 10 may be arranged in each of the x and y directions, for example, 1,000 or more.

[0013] A horizontal control unit 8H is provided at the left end of the region (imaging region) in which a plurality of pixels 10 are arranged, and a vertical control unit 8V is provided at the top end of the region in the drawing. The horizontal control unit 8H and the vertical control unit 8V are also referred to as a control unit 8, either together or individually.

[0014] Each of the multiple pixels 10 has a higher spectral sensitivity to one of three different wavelengths of light than to the other wavelengths. Pixels 10 labeled with R (hereinafter also referred to as "R pixels") have a high spectral sensitivity to red light, pixels 10 labeled with G (hereinafter also referred to as "G pixels") have a high spectral sensitivity to green light, and pixels 10 labeled with B (hereinafter also referred to as "B pixels") have a high spectral sensitivity to blue light. These RGB pixels 10 are arranged in the imaging area, for example, in a Bayer array.

[0015] Each pixel 10 outputs a signal based on the amount of light incident thereon within a predetermined imaging period. A signal line 11 is connected to each of the pixels 10 arranged in a row in the y direction among the plurality of pixels in the imaging element 3, and the signal output from each pixel 10 is read out by a readout unit 12 via the signal line 11. As an example, the signal output from each pixel 10 is an analog signal, and the readout unit 12 is an analog / digital converter that converts the analog signal into a digital signal (A / D conversion). The signal from the pixel 10 that has been subjected to A / D conversion etc. by the readout unit 12 is input to the adder unit 13, and after appropriate processing described below is performed, it is output from the output unit 9 of the imaging element 3 to the imaging control unit 4 as an output signal Sg.

[0016] Some of the pixels 10 are designated as first pixels P and second pixels Q for detecting a first image and a second image, respectively, using the phase difference detection method described above to be used in focus detection processing required for AF of the imaging optical system 2. The first pixels P are pixels 10 marked with P, and the second pixels Q are pixels 10 marked with Q. The first pixel P and the second pixel Q are also referred to as AF pixels, either together or individually. On the other hand, among the plurality of pixels 10, the pixels other than the AF pixels (R pixels, G pixels, B pixels) are collectively or individually referred to as imaging pixels.

[0017] A plurality of first pixels P are arranged side by side in the x direction at predetermined positions in the y direction. A row including a plurality of first pixels P arranged side by side in the x direction is called a first pixel row 14. The second pixels Q are also arranged side by side in the x direction at predetermined positions in the y direction that are different from the first pixel row 14. A row including the second pixels Q arranged side by side in the x direction is called a second pixel row 15.

[0018] The first pixel row 14 and the second pixel row 15 are also referred to collectively or individually as simply "pixel rows." Any one of the individual pixel rows is also referred to as a first pixel row, and any one of the individual pixel rows other than the first pixel row is also referred to as a second pixel row.

[0019] As an example, the first pixel P and the second pixel Q are both arranged at positions where B pixels should be arranged in the original Bayer array. However, the first pixel P and the second pixel Q may also be arranged at positions where R pixels should be arranged in the original Bayer array.

[0020] 2, for ease of explanation, the pixels 10 are shown enlarged, and as a result, only one first pixel row 14 and one second pixel row 15 are shown. However, as described above, in reality, for example, 1000 or more pixels 10 are arranged in the y direction, and therefore, each of the first pixel rows 14 and the second pixel rows 15 is arranged in multiple positions spaced apart from each other in the y direction. Also, in Figure 2, the distance in the y direction between the first pixel row 14 and the second pixel row 15 is such that three pixels 10 are arranged therebetween, but it may also be such that any odd number of pixels 10, such as five pixels 10, are arranged therebetween.

[0021] 3 is a cross-sectional view schematically illustrating an xz cross section of four pixels 10 included in the first pixel row 14 and the second pixel row 15. The four pixels 10 illustrated in FIG. 3 are arranged, from left to right, in the order of the G pixel and the first pixel P in the first pixel row 14, and the G pixel and the second pixel Q in the second pixel row 15. The semiconductor substrate 7 is formed by laminating, for example, an upper substrate 7a on which photoelectric conversion units 21 such as photodiodes and transistors are formed, and a lower substrate 7b on which an amplifier circuit 22 including various transistors is formed. The signal line 11 shown in Fig. 2 is connected to the amplifier circuit 22. The upper substrate 7a and the lower substrate 7b may be electrically connected via bumps.

[0022] A color filter 23 that preferentially transmits any of the above-mentioned blue light, green light, and red light is formed on the upper layer substrate 7a (in the +z direction). A microlens 24 that focuses the light to be captured on the photoelectric conversion unit 21 is formed above the color filter 23. Light irradiated onto the pixel 10 from above (+z direction) is refracted by the microlens 24, and the wavelength of the transmitted light is roughly selected by the color filter 23, after which the light is collected on the photoelectric conversion unit 21. The microlenses 24 will also be referred to simply as "lenses" hereinafter.

[0023] The photoelectric conversion section 21 may be a photodiode formed in the upper substrate 7a, or may be a photoelectric conversion section made of an organic film formed above (on the +z side of) the upper substrate 7a. If the spectral sensitivity of the photoelectric conversion unit 21 differs among the plurality of pixels 10, the color filter 23 may be omitted.

[0024] The first pixel P has a first light-shielding portion 25P located close to the upper end (+z end) of the photoelectric conversion unit 21, which blocks light that is incident on the -x side of the first pixel P out of the light that is collected by the microlens 24 and enters the photoelectric conversion unit 21. Therefore, the sensitivity of the first pixel P to light that passes through the -x side of the pupil plane of the imaging optical system 2 shown in FIG. 1 and reaches the first pixel P is higher than the sensitivity to light that passes through the +x side and reaches the first pixel P. The photoelectric conversion unit 21 of the first pixel P is referred to as a first photoelectric conversion unit.

[0025] The second pixel Q has a second light-shielding portion 25Q located close to the upper end (+z end) of the photoelectric conversion unit 21. The second light-shielding portion 25Q blocks light that is incident on the +x side of the second pixel Q, out of the light that is collected by the microlens 24 and enters the photoelectric conversion unit 21. The position where the second light-shielding portion 25Q is located in the second pixel Q is opposite in the X direction from the position where the first light-shielding portion 25P is located in the first pixel P. Therefore, the sensitivity of the second pixel Q to light that passes through the +x side of the pupil plane of the imaging optical system 2 shown in FIG. 1 and reaches the second pixel Q is higher than the sensitivity to light that passes through the -x side and reaches the second pixel Q. The photoelectric conversion unit 21 of the second pixel Q is referred to as a second photoelectric conversion unit.

[0026] Therefore, the imaging control unit 4 can perform focus detection processing by a phase difference detection method using a first signal SP (details of which will be described later) based on signals output from a plurality of first pixels P included in the first pixel row 14 and a second signal SQ (details of which will be described later) based on signals output from a plurality of second pixels Q included in the second pixel row 15. The first signal SP and the second signal SQ are a pair of focus detection signals, and each of them constitutes a first image and a second image. The imaging control unit 4 performs a correlation calculation on the first signal SP and the second signal SQ to detect an image shift amount, which is the amount of positional shift between the first image and the second image in the x direction on the imaging surface of the image sensor 3, and then performs focus detection processing; however, since the calculation method is well known, a description thereof will be omitted.

[0027] The color filter 23 arranged in the first pixel P and the second pixel Q may be a color filter that preferentially transmits any one of the above-mentioned blue light, green light, or red light, or may be a color filter that preferentially transmits any two colors of light from the above-mentioned blue light, green light, and red light, or may be a filter that transmits the entire range of visible light or a filter that transmits infrared light.

[0028] Incidentally, a plurality of first pixel rows 14 and second pixel rows 15 are arranged within the image sensor 3, and a plurality of first pixels P or second pixels Q are arranged within each of the first pixel rows 14 and second pixel rows 15. Therefore, during focus detection processing, the amount of data output from the image sensor 3 and transferred to the imaging control unit 4 increases, and the power required for data transfer and focus detection processing also increases.

[0029] Therefore, in the image sensor 3 of the first embodiment, a portion of the signals output from the multiple first pixels P and second pixels Q is added together to reduce the amount of data to be transferred to the image sensor control unit 4, thereby reducing power consumption in the image sensor 3 and the image sensor control unit 4.

[0030] 4 is a schematic diagram illustrating the readout section 12, the adder section 13, and some of the first pixels P and second pixels Q included in the first pixel rows 14 (14a to 14e) and the second pixel rows 15 (15a to 15e) included in the image sensor 3. In FIG. 4, the pixels 10 included in rows other than the first pixel rows 14 and the second pixel rows 15 are not shown. In FIG. 4, for identification purposes, symbols (La, Lb, Lc, . . . , Lr from the left) indicating the column addresses (addresses in the x direction) of the signal lines 11 and the pixels 10 are added.

[0031] In the image sensor 3 of the first embodiment, the adder 13 adds together the signals output from three or four first pixels P arranged side by side in the x direction and included in pixel groups Pa1 to Pa3, Pb1 to Pb2, Pc1 to Pc2, Pd1 to Pd2, and Pe1 to Pe3 in each of the first pixel rows 14a to 14e.

[0032] Furthermore, the adder 13 adds together the signals output from three or four second pixels Q arranged side by side in the x direction and included in the pixel groups Qa1 to Qa3, Qb1 to Qb2, Qc1 to Qc2, Qd1 to Qd2, and Qe1 to Qe3 in each of the second pixel rows 15a to 15e. As a result, the adder 13 reduces the amount of data to be transferred to the imaging control unit 4. The addition of signals in the adder 13 will be described in detail later.

[0033] The positions of the pixel groups Pa1 to Pe3 and Qa1 to Qe3 in the x direction differ depending on the positions of the first pixel rows 14a to 14e and the second pixel rows 15a to 15e in the y direction. In the first first pixel row 14a, pixel group Pa1 includes three first pixels P located at column addresses La, Lc, and Le. Pixel group Pa2 is located six column addresses away from pixel group Pa1 in the +x direction and includes three first pixels P located at column addresses Lg, Li, and Lk. Pixel group Pa3 is located six column addresses away from pixel group Pa2 in the +x direction and includes three first pixels P located at column addresses Lm, Lo, and Lq.

[0034] In the first second pixel row 15a, pixel group Qa1 includes three second pixels Q located at column addresses La, Lc, and Le. Pixel group Qa2 is located six column addresses away from pixel group Qa1 in the +x direction and includes three second pixels Q located at column addresses Lg, Li, and Lk. Pixel group Qa3 is located six column addresses away from pixel group Qa2 in the +x direction and includes three second pixels Q located at column addresses Lm, Lo, and Lq. That is, in the first first pixel row 14a and the first second pixel row 15a, each pixel group Pa1 to Pa3, Qa1 to Qa3 includes three first pixels P or second pixels Q that are arranged consecutively in the x direction with a G pixel between them, without overlapping.

[0035] In the second first pixel row 14b, pixel group Pb1 includes four first pixels P located at column addresses La, Lc, Le, and Lg. Pixel group Pb2 is located six column addresses away from pixel group Pb1 in the +x direction and includes four first pixels P located at column addresses Lg, Li, Lk, and Lm. Pixel group Pb3 is located six column addresses away from pixel group Pb2 in the +x direction and includes three first pixels P located at column addresses Lm, Lo, and Lq, as well as one more first pixel P in the second first pixel row 14b (not shown in FIG. 4).

[0036] In the second pixel row 15b, pixel group Qb1 includes four second pixels Q located at column addresses La, Lc, Le, and Lg. Pixel group Qb2 is located six column addresses away from pixel group Qb1 in the +x direction and includes four second pixels Q located at column addresses Lg, Li, Lk, and Lm. Pixel group Qb3 is located six column addresses away from pixel group Qb2 in the +x direction and includes three second pixels Q located at column addresses Lm, Lo, and Lq, as well as one more second pixel Q in the second pixel row 15b (not shown in FIG. 4).

[0037] That is, in the second first pixel row 14b and the second second pixel row 15b, each of the pixel groups Pb1-Pb3 and Qb1-Qb3 includes four first pixels P or second pixels Q that are consecutively arranged in the x direction with a G pixel sandwiched between them. The first pixels P or second pixels Q at both ends in the x direction included in each of the pixel groups Pb1-Pb3 and Qb1-Qb3 are also included in other pixel groups adjacent in the x direction.

[0038] The arrangement of the pixel groups Pc1 to Pc2, Qc1 to Qc2 in the third first pixel row 14c and the third second pixel row 15c is the same as that of the pixel groups Pb1 to Pb2, Qb1 to Qb2 in the second first pixel row 14b and the second second pixel row 15b, respectively, shifted by two addresses in the +x direction.

[0039] Furthermore, the arrangement of the pixel groups Pd1-Pd2, Qd1-Qd2 in the fourth first pixel row 14d and the fourth second pixel row 15d is the same as that of the pixel groups Pb1-Pb2, Qb1-Qb2 in the second first pixel row 14b and the second second pixel row 15b, respectively, shifted by two addresses in the +x direction.

[0040] The arrangement of the pixel groups Pe1 to Pe3 and Qe1 to Qe3 in the fifth first pixel row 14e and the fifth second pixel row 15e is the same as the arrangement of the pixel groups Pa1 to Pa3 and Qa1 to Qa3 in the first first pixel row 14a and the first second pixel row 15a, respectively. That is, in the image sensor 3 of the first embodiment, the plurality of first pixel rows 14 and second pixel rows 15 repeat the same pixel group arrangement every four rows in the y direction. Therefore, the fifth first pixel row 14e and the fifth second pixel row 15e can be considered equivalent to the first first pixel row 14a and the first second pixel row 15a.

[0041] As mentioned above, Figure 4 shows only a portion of the multiple AF pixels, and on the -y side of the fifth second pixel row 15e, the second first pixel row 14b, the second second pixel row 15b, the third first pixel row 14c, the third second pixel row 15c, etc. are cyclically arranged. In addition, in both the first pixel rows 14a to 14e and the second pixel rows 15a to 15e, a plurality of pixel groups are arranged in a range wider than the range in the x direction shown in FIG. 4, similar to the arrangement described above. The pixel groups Ha2 to He3 and pixel groups Ja2 to Je3 formed by the G pixels in the first pixel rows 14a to 14e and the second pixel rows 15a to 15e shown in FIG. 4 will be described in Modification 1 below.

[0042] The addition of signals in the adder 13 will be described below with reference to FIG. 5 is a diagram illustrating the addition of signals output from the first pixel P. Note that the addition of signals output from the second pixel Q is basically the same as the addition of signals output from the first pixel P, and therefore a description thereof will be omitted.

[0043] 2 and 4, signals output by first pixels P are output to the readout unit 12 in accordance with control signals generated by the control unit 8, starting from the first pixel P in the first pixel row 14a at the end in the +y direction, for example, and then the first pixels P in the first pixel rows 14b to 14e on the -y direction side. The readout unit 12 sequentially A / D converts the signals read out from the first pixels P and outputs the converted signals to the adder 13. The signals output by the multiple first pixels P in each of the first pixel rows 14a to 14e are output to the adder 13 almost simultaneously for each pixel row.

[0044] 5(a) shows a state in which the adder 13 adds signals output from the first pixels P arranged in the first pixel row 14a. A storage unit 16 such as a memory circuit provided in the adder 13 temporarily stores the digital signals output from each pixel 10, A / D converted by the readout unit 12 (not shown in FIG. 5(a)), and input via each signal line 11. The digital signal stored in the storage unit 16 is input to the multiplication circuit 17 in the addition unit 13 , where it is multiplied by a predetermined weighting coefficient and output to the addition circuit 18 .

[0045] When adding the signals of the first pixel row 14a shown in Figure 5(a), each multiplier circuit 17 processing the signal from the first pixel P1 multiplies each signal by a weighting coefficient of 4 (multiplies by 4). On the other hand, each multiplier circuit 17 processing the signal from the G pixel outputs a signal of zero. The state in which the multiplier circuit 17 outputs a signal of zero is indicated by adding the symbol xx in Figures 5 and 6. The adder circuit 18 adds the signals from the first pixels P included in each of the pixel groups Pa1 to Pa3 to generate output signals SPa1 to SPa3, and outputs them to the output unit 9.

[0046] 5(b) and 5(c) show the state in which the adder 13 adds together signals output from first pixels P, which are AF pixels arranged in the second first pixel row 14b. As in the case shown in FIG. 5(a), the digital signals output from each pixel 10 and stored in the memory unit 16 are multiplied by a predetermined weighting coefficient by the multiplication circuit 17 and output to the adder circuit 18. When adding together the signals output from the first pixels P in the second first pixel row 14b, the adder circuit 18 adds together the signals from the first pixels P included in each of the pixel groups Pb1 to Pb3 shown in FIG. 4 to generate output signals SPb1 to SPb3, and outputs the output signals to the output unit 9.

[0047] However, as described above, in the second first pixel row 14b, the first pixels P on column addresses La, Lm, and Lp at both ends in the x direction included in each of the pixel groups Pb1 to Pb3 are also included in other pixel groups adjacent in the x direction. Therefore, as an example, the multiplication of the weighting coefficient by the multiplication circuit 17 and the addition by the addition circuit 18 are performed twice, once for the odd-numbered pixel groups Pb1, etc. in the x direction, and once for the even-numbered pixel groups Pb2, etc.

[0048] The adder 13 first stores in the storage unit 16 the signals output from all of the first pixels P in the second first pixel row 14b. 5(b), the adder 13 first adds together the signals output from the first pixels P included in the pixel groups Pb1 and Pb3, which are odd-numbered pixel groups in the x direction. At this time, the multiplier circuit 17 multiplies the signals output from the first pixels P that are not included in multiple pixel groups Pb1 to Pb3 by a weighting factor of 4.

[0049] On the other hand, multiplication circuit 17 is located at the −x end of odd-numbered pixel groups in the x direction, such as pixel group Pb1 and pixel group Pb3, and multiplies the signal output from a first pixel P at column addresses La and Lm that are overlappingly included in multiple pixel groups Pb1 to Pb3, etc., by a weighting coefficient of 1. Also, multiplication circuit 17 is located at the +x end of pixel group Pb1, and multiplies the signal output from a first pixel P at column address Lg that is overlappingly included in multiple pixel groups Pb1 and Pb2, by a weighting coefficient of 3.

[0050] Furthermore, each multiplication circuit 17 that processes the signal from the G pixel outputs a signal of zero. The adder circuit 18 adds the signals from the first pixels P included in the pixel groups Pb1 and Pb3, respectively, to generate output signals SPb1 and SPb3, and outputs them to the output unit 9.

[0051] 5(c), the adder 13 adds signals output from first pixels P included in even-numbered pixel groups Pb2, etc. in the x direction. At this time, the multiplier circuit 17 multiplies the signal by a different weighting factor, as described above, based on whether the signal is from a first pixel P that is included in multiple pixel groups Pb1 to Pb3. Furthermore, each multiplier circuit 17 that processes a signal from a G pixel outputs a zero signal. The adder circuit 18 adds the signals from the first pixels P included in the pixel group Pb2 to generate an output signal SPb2, and outputs the output signal SPb2 to the output unit 9.

[0052] 6(a) and 6(b) show the adder 13 adding signals output from first pixels P, which are AF pixels arranged in the third first pixel row 14c. As shown in FIG. 4, in the third first pixel row 14c, the first pixels P at column addresses Lc, Li, and Lo at both ends in the x direction included in each of the pixel groups Pc1 and Pc2 are also included in other pixel groups adjacent in the x direction. Therefore, as in the case of the second first pixel row 14b described above, for example, the multiplication of the weighting coefficient by the multiplication circuit 17 and the addition by the adder circuit 18 are performed twice, once for the odd-numbered pixel groups Pc1, etc. in the x direction and once for the even-numbered pixel groups Pc2, etc.

[0053] The adder 13 first stores in the storage unit 16 the signals output from all of the first pixels P in the third first pixel row 14c. 6(a) is a diagram illustrating the addition of signals output from first pixels P included in pixel groups Pc1, etc., which are odd-numbered pixel groups in the x direction. At this time, multiplication circuit 17 multiplies the signals output from first pixels P at column addresses Le and Lg that are not included in multiple pixel groups Pc1-Pc2, etc., by a weighting coefficient of 4.

[0054] On the other hand, the multiplication circuit 17 multiplies the signal output from the first pixel P at column addresses Lc, Li, and Lo, which are located at both ends of the odd-numbered pixel groups in the x direction, such as pixel group Pc1, and which are overlappingly included in multiple pixel groups Pc1 to Pc2, by a weighting coefficient of 2. Furthermore, each multiplication circuit 17 that processes the signal from the G pixel outputs a signal of zero. The adder circuit 18 adds the signals from the first pixels P included in the pixel group Pc1 to generate an output signal SPc1, and outputs the output signal SPc1 to the output unit 9.

[0055] 6(b), signals output from first pixels P included in pixel group Pc2, etc., which are even-numbered pixel groups in the x direction, are added together. At this time, multiplication circuit 17 multiplies signals output from first pixels P at column addresses Lj and Lm that are not included in multiple pixel groups Pc1 to Pc2, etc., by a weighting coefficient of 4.

[0056] On the other hand, the multiplication circuit 17 multiplies the signal output from the first pixel P at column addresses Lc, Li, Lo, which are located at both ends of the even-numbered pixel groups in the x direction, such as pixel group Pc2, and which are overlappingly included in multiple pixel groups Pc1 to Pc2, by a weighting coefficient of 2. Furthermore, each multiplication circuit 17 that processes the signal from the G pixel outputs a signal of zero. The adder circuit 18 adds the signals from the first pixels P included in the pixel group Pc2 to generate an output signal SPc2, and outputs the output signal SPc2 to the output unit 9.

[0057] 6(c) and 6(d) show a state in which the adder 13 adds signals output from the first pixel P, which is an AF pixel arranged in the fourth first pixel row 14d. Note that FIGS. 6(c) and 6(d) show a portion (pixel 10, memory unit 16, etc.) shifted by two addresses in the +x direction compared to the portion shown in FIGS. 6(a) and 6(b).

[0058] 4, in the fourth first pixel row 14d, the first pixels P on column addresses Le, Lk, Lq at both ends in the x direction included in each of the pixel groups Pd1-Pd2, etc. are also included in other pixel groups adjacent in the x direction. Therefore, as in the case of the second first pixel row 14b described above, as an example, the multiplication of the weighting coefficient by the multiplication circuit 17 and the addition by the addition circuit 18 are performed twice, once for the odd-numbered pixel groups Pd1, etc. in the x direction and once for the even-numbered pixel groups Pd2, etc.

[0059] The adder 13 first stores in the storage unit 16 the signals output from all of the first pixels P in the fourth first pixel row 14d. 6(c) is a diagram illustrating the addition of signals output from first pixels P included in pixel groups Pd1, etc., which are odd-numbered pixel groups in the x direction. At this time, multiplication circuit 17 multiplies the signals output from first pixels P at column addresses Lg and Li, which are included in pixel group Pd1, etc. and are not included in multiple pixel groups Pd1-Pd2, etc., by a weighting coefficient of 4.

[0060] On the other hand, multiplication circuit 17 multiplies the signal output from a first pixel P at the −x end of an odd-numbered pixel group in the x direction, such as pixel group Pd1, and at column addresses Le and Lq that are overlappingly included in multiple pixel groups Pd1, etc., by a weighting coefficient of 3. And it multiplies the signal output from a first pixel P at the +x end of pixel group Pd1, etc., and at column address Lk that is overlappingly included in multiple pixel groups Pd1-Pd2, etc., by a weighting coefficient of 1. Furthermore, each multiplication circuit 17 that processes the signal from the G pixel outputs a signal of zero. The adder circuit 18 adds the signals from the first pixels P included in the pixel group Pd1 to generate an output signal SPd1, and outputs the output signal SPd1 to the output unit 9.

[0061] 6(d), signals output from first pixels P included in pixel group Pd2, etc., which are even-numbered pixel groups in the x direction, are added together. At this time, multiplication circuit 17 multiplies signals output from first pixels P at column addresses Lm and Lo that are not included in multiple pixel groups Pd1-Pd2, etc., by a weighting factor of 4.

[0062] On the other hand, multiplication circuit 17 multiplies the signal output from a first pixel P at the −x end of an even-numbered pixel group in the x direction, such as pixel group Pd2, and at column addresses Le and Lq that are overlappingly included in multiple pixel groups Pd1-Pd2, etc., by a weighting coefficient of 1. Furthermore, multiplication circuit 17 multiplies the signal output from a first pixel P at the +x end of pixel group Pd2, etc., and at column address Lq that is overlappingly included in multiple pixel groups Pd2, etc., by a weighting coefficient of 3. Furthermore, each multiplication circuit 17 that processes the signal from the G pixel outputs a signal of zero. The adder circuit 18 adds the signals from the first pixels P included in the pixel group Pd2 to generate an output signal SPd2, and outputs the output signal SPd2 to the output unit 9.

[0063] The above has described the addition of signals output from first pixels P included in approximately two pixel groups Pa1-Pd2 aligned in the x direction in each of first pixel rows 14a-14e. However, as mentioned above, pixel groups Pa1-Pd2, etc. are arranged in an area wider than the area in the x direction shown in Fig. 4, and adder 13 also performs the same addition process as above on signals output from first pixels P included in pixel groups not shown in Fig. 4.

[0064] As described above, the addition unit 13 performs an addition process on the signal output from the second pixel Q and input to the addition unit 13 via the signal line 11 and the readout unit 12, similar to the addition process on the signal output from the first pixel P described above.

[0065] In the above explanation, when there is a first pixel P that is included in multiple pixel groups Pb1 to Pd3, etc., the multiplication of the weighting coefficient by the multiplication circuit 17 and the addition by the addition circuit 18 are performed in two separate steps. However, this may be performed in a single calculation by providing multiple multiplication circuits 17 and multiple addition circuits 18, etc. Furthermore, the above multiplication and addition operations may be performed in software using a microprocessor and software, rather than by hardware using the multiplication circuit 17 and addition circuit 18 described above.

[0066] FIG. 7 is a diagram illustrating addresses in the x direction corresponding to the output signals SPa1 to SPd2 output from the first pixel P and added by the adder 13 for each of the pixel groups Pa1 to Pd3. 7(a), like FIG. 4, shows signal lines 11, readout sections 12, adders 13, and first pixels P and pixel groups Pa1 to Pd2 arranged in first pixel rows 14a to 14d, respectively.

[0067] Figure 7(b) is a diagram in which the horizontal axis is a number line representing the address in the x direction and the vertical axis is the magnitude of the output signals SPa1 to SPd2 obtained by the adder 13 adding up the signals from the first pixels P in each pixel group Pa1 to Pd2, and represents the first signal SP. In FIG. 7(b), the x coordinate of the above-mentioned column address La is set as the origin (x=0) of the horizontal number line, and the interval between each of the column addresses La to Lr in the x direction is set as 1. Note that a second signal SQ (not shown) obtained by adding up the signals output by the second pixels Q included in the second pixel rows 15a to 15d is similar to the first signal SP, and therefore a description thereof will be omitted.

[0068] As described above, the output signal SPa1 is obtained by multiplying the outputs of the three first pixels P in the pixel group Pa1, which are located at column addresses La (x=0), Lc (x=2), and Le (x=4), respectively, by an equal weighting coefficient of 4 and then adding them together. Therefore, the center of gravity of the three added first pixels P is x=2, which is the average value of the column addresses of the respective first pixels P, and the output signal SPa1 is the value of the first signal SP at x=2.

[0069] On the other hand, the output signal SPb1 is obtained by multiplying the outputs of four first pixels P in the pixel group Pb1 at column addresses La (x=0), Lc (x=2), Le (x=4), and Lg (x=6), respectively, by weighting factors of 1, 4, 4, and 3, and then adding them together. Therefore, the center of gravity of the four added first pixels P is (0×1+2×4+4×4+6×3) / (1+4+4+3)=3.5, and the output signal SPb1 is the value of the first signal SP at x=3.5.

[0070] The output signal SPc1 is obtained by multiplying and adding the outputs of four first pixels P in the pixel group Pc1 at column addresses Lc (x=2), Le (x=4), Lg (x=6), and Li (x=8), respectively, by weighting factors of 2, 4, 4, and 2. Therefore, the center of gravity of the four added first pixels P is (2×2+4×4+6×4+8×2) / (2+4+4+2)=5, and the output signal SPc1 is the value of the first signal SP at x=5.

[0071] The output signal SPd1 is obtained by multiplying and adding the outputs of four first pixels P in the pixel group Pd1 at column addresses Le (x=4), Lg (x=6), Li (x=8), and Lk (x=10), respectively, by weighting factors of 3, 4, 4, and 1. Therefore, the center of gravity of the four added first pixels P is (4×3+6×4+8×4+10×1) / (3+4+4+1)=6.5, and the output signal SPd1 is the value of the first signal SP at x=6.5.

[0072] The output signal SPa2 is an addition signal obtained by multiplying the outputs from three first pixels P in pixel group Pa2, which are six addresses away from pixel group Pa1 in the x direction, by the same weighting coefficient as that of the output signal SPa1. Therefore, the center of gravity of the three first pixels P added together in the output signal SPa2 is x=8, which is the center of gravity of the first pixel P in the output signal SPa1 (x=2) plus 6. Similarly, the center of gravity position of the four first pixels P added together in the output signals SPb2 to SPd2 is a value obtained by adding 6 to the center of gravity position in the output signals SPb1 to SPd1.

[0073] As described above, in the image sensor 3 of the first embodiment, the positions of the centers of gravity in the x direction of the three or four first pixels P added together in the output signals SPa1 to SPd2 are spaced equally apart, at intervals that are 1.5 times the pixel interval. This is because the weighting coefficients used in the addition of signals from the first pixels P of each of the pixel groups Pa1 to Pd3 in the adder 13 are set as described above. As a result, the output signals SPa1 to SPd2 are arranged at equal intervals in the x direction, and the first signal SP becomes a signal that can be easily used as a signal for performing calculations regarding positions in the x direction, such as correlation calculations.

[0074] Furthermore, even though signals from three or four first pixels P arranged at intervals of two addresses in the x direction are added together, the first signal SP can be extracted as a data string in which the data points are spaced 1.5 addresses apart in the x direction, i.e., as a data string with relatively close intervals in the x direction. This is because the arrangements of the pixel groups Pa1-Pd1 and Pa2-Pd2 are changed according to the positions of the four first pixel rows 14a-14d in the y direction.

[0075] The imaging control unit 4 performs well-known correlation calculations and the like using the first signal SP and the second signal SQ output from the output unit 9 of the imaging element 3, and detects the imaging state of the image formed on the imaging element 3. The imaging control unit 4 can also be said to be a detection unit. The imaging control unit 4 may detect the imaging state of the image by using position information of the first pixel P and the second pixel Q that output the signals that are the basis of the first signal SP and the second signal SQ.

[0076] As an example, the imaging state of the image may be detected based on information on how many times the spacing between the data points of the first signal SP and the second signal SQ, which are obtained by adding the signals output by the first pixel P and the second pixel Q by the adder 13, is larger than the actual spacing between the first pixel P or the second pixel Q. Furthermore, the imaging control unit 4 may also use information relating to the weighting coefficient used when the adder 13 performs addition to detect the imaging state of the image formed on the imaging element 3. These pieces of information may be output from the imaging element 3 to the imaging control unit 4 periodically, for example.

[0077] The weighting coefficients used by the adder 13 to add the signals from the first pixels P and second pixels Q in the pixel groups Pa1-Pd3 and Qa1-Qd3 are not limited to the values ​​described above and may be other values. The weighting coefficients are also not limited to integers and may be decimals or fractions. In this case, the sum of weighting factors used in each of the pixel groups Pa1-Pd3 and Qa1-Qd3 may be set equal to each other, as described above. Also, the weighting factors may be set so that the centroid positions of the first pixels P and second pixels Q included in each of the pixel groups Pa1-Pd3 and Qa1-Qd3 are arranged at equal intervals in the x direction, as described above.

[0078] Alternatively, the weighting coefficients used in the adder 13 to add the signals from the first pixels P and second pixels Q in the pixel groups Pa1 to Pd3 and Qa1 to Qd3 may all be the same value. The number of first pixels P or second pixels Q included in each of the pixel groups Pa1 to Pd3 and Qa1 to Qd3 is not limited to three or four as described above, but may be any other number such as five or six. The number of first pixels P or second pixels Q included in each of the pixel groups Pa1 to Pd3 and Qa1 to Qd3 may be constant regardless of the position of the first pixel row 14 and the second pixel row 15 in the y direction.

[0079] In the image sensor 3 of the first embodiment described above, the positions of the pixel groups Pa1-Pd3 and Qa1-Qd3 in the x direction may not change between the multiple first pixel rows 14 and second pixel rows 15. However, this is not limiting, and when the positions of one pixel in the y direction change between the multiple first pixel rows 14 and second pixel rows 15, the positions of the pixel groups Pa1-Pd3 and Qa1-Qd3 in the x direction may be shifted by one pixel. Here, one pixel refers to one period of the arrangement of the first pixels P or second pixels Q in the x direction, and when considering the G pixels as well, this corresponds to a length of two pixels 10 in the x direction.

[0080] Although not explained above, in the imaging element 3 of the first embodiment, signals generated by imaging pixels (R pixels, G pixels, B pixels) arranged in rows other than the first pixel row 14 and the second pixel row 15 are also output from the output unit 9 via the signal line 11, the readout unit 12, and the addition unit 13.

[0081] Depending on the operation mode of the image sensor 3, the adder 13 may also add signals output from the imaging pixels to reduce the amount of data, or may not perform addition. Furthermore, depending on the operation mode of the imaging element 3, the adder 13 may output the signals output from the first pixel P and the second pixel Q to the output unit 9 without adding them together.

[0082] In other words, the image sensor 3 of the first embodiment described above has a first pixel row (first pixel row 14a) including a plurality of first pixels P aligned in the x direction, and second pixel rows (first pixel rows 14b-14d) including a plurality of the first pixels aligned in the x direction. Furthermore, the first pixel row (first pixel row 14a) and the second pixel rows (first pixel rows 14b-14d) are arranged at different positions in the y direction. Each of the plurality of first pixels P arranged in the first pixel row (first pixel row 14a) is arranged at the same position in the x direction as one of the plurality of first pixels P arranged in the second pixel rows (first pixel rows 14b-14d).

[0083] (Modification 1 of the imaging element) In the first embodiment described above, the image sensor 3 outputs the first signal SP and the second signal SQ (not shown) output from the first pixel P and the second pixel Q, which are AF pixels, as signals for detecting the imaging state. However, the imaging element 3 may also output signals output from the G pixels included in the first pixel rows 14a to 14e and the second pixel rows 15a to 15e as signals for detecting the imaging state.

[0084] 4, in the first pixel rows 14a to 14e and the second pixel rows 15a to 15e, G pixels are arranged between first pixels P or second pixels Q in the x direction. These G pixels receive substantially the same image as the adjacent first pixels P or second pixels Q. However, while the first pixels P or second pixels Q preferentially receive light that has passed through the −x side or +x side of the pupil plane of the imaging optical system 2, the G pixels receive light that has passed through the imaging optical system 2 regardless of the passing position on the pupil plane of the imaging optical system 2.

[0085] Therefore, as an example, by subtracting the first signal SP, which is generated mainly by light that has passed through the -x side of the pupil plane of the imaging optical system 2, from the signal output from the G pixels in the first pixel row 14a to 14e, a virtual signal, which is generated mainly by light that has passed through the +x side of the pupil plane, similar to the second signal SQ, can be obtained. Similarly, by subtracting the second signal SQ, which is generated mainly by light that has passed through the +x side of the pupil plane of the imaging optical system 2, from the signal output from the G pixels in the second pixel row 15a to 15e, a virtual signal, which is generated mainly by light that has passed through the -x side of the pupil plane, similar to the first signal SP, is obtained.

[0086] In the image sensor 3 of Modification 1, the adder 13 also adds together the output signals from the G pixels included in each of the pixel groups Ha2 to He3 in the first pixel rows 14a to 14e shown in FIG. 4. Hereinafter, this added signal will be referred to as a third signal. The adder 13 also adds together the output signals from the G pixels included in each of the pixel groups Ja2 to Je3 in the second pixel rows 15a to 15e. Hereinafter, this added signal will be referred to as a fourth signal.

[0087] The addition of signals output from each G pixel included in pixel groups Ha2 to He3 and Ja2 to Je3 is similar to the addition of signals output from each first pixel P included in pixel groups Pa1 to Pe3 described above, so a detailed explanation will be omitted. Like the first signal SP and the second signal SQ, the third and fourth signals are also obtained as data strings with data points spaced 1.5 apart in the x direction.

[0088] 4, the positions of the centers of gravity in the x direction, including the weighting factors, of the G pixels included in the pixel groups Ha2-He3 in the first pixel rows 14a-14e are shifted in the +x direction by three addresses from the positions of the centers of gravity in the x direction, including the weighting factors, of the first pixels P included in the pixel groups Pa1-Pe3.Furthermore, the positions of the centers of gravity in the x direction, including the weighting factors, of the G pixels included in the pixel groups Ja2-Je3 in the second pixel rows 15a-15e are shifted in the +x direction by three addresses from the positions of the centers of gravity in the x direction, including the weighting factors, of the second pixels Q included in the pixel groups Qa1-Qe3.

[0089] This shift amount, 3, is twice (an integer multiple) of the spacing between the data points, 1.5. Therefore, the x-axis address (x-coordinate) of each data point constituting the third signal and the fourth signal matches the x-axis address (x-coordinate) of one of the data points constituting the first signal SP and the second signal SQ. This facilitates the subtraction process of subtracting the first signal SP or the second signal SQ from the third signal or the fourth signal.

[0090] The image sensor 3 of Modification 1 may be configured to output a third signal and a fourth signal in addition to the first signal SP and second signal SQ from the output unit 9. Alternatively, in addition to the first signal SP and second signal SQ from the output unit 9, the image sensor 3 may be configured to output a signal obtained by subtracting the first signal SP or the second signal SQ from the third signal, or a signal obtained by subtracting the first signal SP or the second signal SQ from the third signal. If the imaging element 3 of variant example 1 outputs a third signal and a fourth signal in addition to the first signal SP and second signal SQ from the output unit 9, the subtraction process of subtracting the first signal SP or the second signal SQ from the third signal or the fourth signal can be performed by the imaging control unit 4.

[0091] (Modification 2 of the imaging element) In the above-described first embodiment and variant example 1, the first pixel P and the second pixel Q are both arranged at positions where B pixels should be arranged in the original Bayer array, or at positions where R pixels should be arranged in the original Bayer array. In the image sensor 3 of Modification 2, some of the first pixels P and second pixels Q are arranged in positions where B pixels would be arranged in the original Bayer array, and the remaining first pixels P and some of the second pixels Q are arranged in positions where R pixels would be arranged. The image sensor 3 of Modification 2 is similar to the image sensor 3 of the above-described first embodiment and Modification 1 except for the positions where the first pixels P and second pixels Q are arranged, so only the arrangement of the first pixels P and second pixels Q will be described below.

[0092] FIG. 8 is a plan view schematically showing some of the pixels 10 arranged on the imaging element 3 of the second modification. In the image sensor 3 of Modification 2, the first pixel rows 14a and 14b including the first pixel P and the second pixel rows 15a and 15b including the second pixel Q are arranged in rows where B pixels should be arranged in the Bayer array. That is, the B pixels are arranged in the first pixel rows 14a and 14b at positions shifted by two rows in the +y direction and the −y direction from the first pixel P or the second pixel Q, respectively.

[0093] However, the first pixel row 14z including the first pixel P and the second pixel row 15z including the second pixel Q are arranged in rows where R pixels should be arranged in the Bayer array. That is, the R pixels are arranged in the first pixel row 14z and in positions shifted two rows in the +y direction and the −y direction from the first pixel P or the second pixel Q in the first pixel row 14z. As a result, the first pixel P and the second pixel Q, which are arranged at the positions where the original B pixels should be arranged, and the first pixel P and the second pixel Q, which are arranged at the positions where the original R pixels should be arranged, are arranged at different positions in the x direction.

[0094] If the first pixels P or the second pixels Q are arranged only at positions where B pixels or R pixels should be arranged, the first pixels P or the second pixels Q will only be arranged at odd-numbered pixels 10 in the x direction or even-numbered pixels 10 in the x direction. Therefore, the arrangement period of the first pixels P or the second pixels Q in the x direction is an interval of two pixels 10.

[0095] In the imaging element 3 of variant example 2, a portion of the first pixel P or the second pixel Q is placed at a position where a B pixel should be placed, and another portion is placed at a position where an R pixel should be placed, so that the first pixel P or the second pixel Q is placed at either the odd-numbered or even-numbered pixel 10 in the x direction.

[0096] In other words, the image sensor 3 of Modification 2 has a first pixel row (first pixel row 14a) including a plurality of first pixels P aligned in the x direction, and a second pixel row (first pixel row 14z) including a plurality of first pixels P aligned in the x direction. The first pixel row (first pixel row 14a) and the second pixel row (first pixel row 14z) are arranged at different positions in the y direction. Each of the plurality of first pixels P arranged in the first pixel row (first pixel row 14a) is arranged at a different position in the x direction from any of the plurality of first pixels P arranged in the second pixel row (first pixel row 14z).

[0097] This allows the period of arrangement of the first pixels P and the second pixels Q in the x direction to be set to an overall interval of one pixel 10. For example, the multiple first pixels P in the first pixel row 14a and the multiple first pixels P in the first pixel row 14z are arranged at an overall interval of one pixel 10 in the x direction.

[0098] In the image sensor 3 of the second modification, the spacing between the AF pixels (first pixel P, second pixel Q) in the x direction can be reduced, and the AF pixels can be arranged at high density in the x direction, thereby enabling more accurate focus detection.

[0099] The addition of the signals output by the first pixels P and the second pixels Q on the first pixel row 14z and the second pixel row 15z in the adder 13 is similar to the addition of the signals output by the first pixels P and the second pixels Q on the first pixel rows 14a to 14d and the second pixel rows 15a to 15d described above, and therefore will not be described here. In the image sensor 3 of Modification 2, even when signals output by pixels arranged at the same position in the X direction in the first pixel rows 14a and 14z are added together, an added signal having a different center of gravity in the X direction can be generated between the first pixel rows 14a and 14z. The same is true for the second pixel rows 15a and 15z that output the signals to be added together.

[0100] (Second embodiment of the imaging element) 9 is a diagram showing an xz cross section of some pixels 10a included in the image sensor 3 of the second embodiment. The image sensor 3 of the second embodiment differs from the pixels 10 of the image sensor 3 of the first embodiment in the structure of the pixels 10a, but most of the other structures are similar. Therefore, the following description will focus on the pixels 10a, and descriptions of other parts will be omitted as appropriate.

[0101] A pixel 10a included in the image sensor 3 of the second embodiment has two photoelectric conversion units 21P and 21Q separated in the x direction under one microlens 24. That is, the photoelectric conversion unit 21Q is arranged on the opposite side of the x direction from the photoelectric conversion unit 21P with respect to the optical axis of the microlens 24. The pixel 10a also has amplifier circuits 22P and 22Q that amplify signals generated by the photoelectric conversion units 21P and 21Q, respectively. The pixel 10a constitutes a type of AF pixel known as a 2PD. Note that all of the pixels included in the image sensor 3 of the second embodiment may be 2PDs like the pixel 10a, or some of them may be 2PDs.

[0102] In pixel 10a, photoelectric conversion unit 21P and amplifier circuit 22P correspond to the first pixel P in the first embodiment, and photoelectric conversion unit 21Q and amplifier circuit 22Q correspond to the second pixel Q in the first embodiment. That is, photoelectric conversion unit 21P has a higher sensitivity to light that has passed through the -x side of the pupil plane of imaging optical system 2 shown in Fig. 1 than to light that has passed through the +x side. On the other hand, photoelectric conversion unit 21Q has a higher sensitivity to light that has passed through the +x side of the pupil plane of imaging optical system 2 shown in Fig. 1 than to light that has passed through the -x side.

[0103] In the image sensor 3 of the second embodiment, each amplifier circuit 22P and amplifier circuit 22Q is connected to a signal line 11. In the image sensor 3 of the second embodiment, the G pixel and the signal line 11 connected to the G pixel are removed, the first pixel P is replaced with a photoelectric conversion unit 21P and an amplifier circuit 22P, and the second pixel Q is replaced with a photoelectric conversion unit 21Q and an amplifier circuit 22Q, compared to the image sensor 3 of the second embodiment shown in FIG.

[0104] Therefore, in the imaging element 3 of the second embodiment, the configuration in which the adder 13 adds the signals output from the photoelectric conversion unit 21P and the photoelectric conversion unit 21Q is similar to the configuration in the first embodiment described above in which the adder 13 adds the signals output from the first pixel P and the second pixel Q, and therefore will not be described here. It should be noted that the photoelectric conversion section 21P can also be considered a first photoelectric conversion section, and the photoelectric conversion section 21Q can also be considered a second photoelectric conversion section.

[0105] (Effects of each embodiment and each modification) According to the above-described embodiment, the following effects can be obtained. (1) The image sensor 3 in each of the above embodiments and variations includes a plurality of pixels 10, 10a arranged in a first direction (x direction) and a second direction (y direction) intersecting the first direction, which output signals used to detect the focus state of the subject image formed by the optical system 2; a signal line 11 wired in the second direction and outputting signals from the pixels 10, 10a; and an adder unit that adds together multiple signals output from the multiple pixels 10, 10a arranged in the first direction to the signal line 11 to generate a sum signal (first signal SP, second signal SQ), and changes the position in the first direction of at least one pixel 10, 10a among the multiple pixels 10, 10a that output the signals to be added when the positions in the second direction of the multiple pixels 10 that output the signals to be added are different. This configuration makes it possible to reduce the amount of data to be output, reduce power consumption, and shorten the time required to read out signals. Furthermore, with this configuration, even though the signals of multiple first pixels P or first pixels Q arranged in the first direction (x direction) are added together, the first signal SP and the second signal SQ can be extracted as a data string with relatively close intervals in the first direction (x direction). Generally, the accuracy of focus detection using the phase difference detection method improves as the amount of data used increases. With the above configuration, it is possible to extract a signal consisting of a data string spaced relatively closely in the x direction, i.e., a signal with a large amount of data per unit in the x direction, thereby improving the accuracy of focus detection using the phase difference detection method.

[0106] (2) The pixels 10 further include a first pixel P having a first light-shielding portion 25P that shields a first photoelectric conversion unit (the photoelectric conversion unit 21 of the first pixel P) and a portion of the first photoelectric conversion unit on the first direction (x direction) side, and a second pixel Q having a second light-shielding portion 25Q that shields a second photoelectric conversion unit (the photoelectric conversion unit 21 of the second pixel Q) and a portion of the second photoelectric conversion unit on the opposite side to the first direction. The adder 13 generates a first summed signal (first signal SP) from signals output from the first pixels P arranged in the first direction, and generates a second summed signal (second signal SQ) from signals output from the second pixels Q arranged in the first direction. Since the first pixel P and the second pixel Q function as AF pixels in what is called image plane AF, this configuration makes it possible to reduce the amount of data for detecting the focus position output from the image sensor 3, thereby reducing power consumption and shortening the time required to read out the signal.

[0107] (3) Furthermore, pixel 10a has a lens (microlens 24), a first photoelectric conversion unit 21P arranged on a first side in a first direction (x direction) with respect to the optical axis of the lens, and a second photoelectric conversion unit 21Q arranged on the opposite side of the optical axis of the lens from the first side in the first direction. The adder 13 generates a first sum signal (first signal SP) from signals output from the plurality of first photoelectric conversion units 21P, and generates a second sum signal (first signal SQ) from signals output from the plurality of second photoelectric conversion units 21Q. The pixel 10a including the first photoelectric conversion unit 21P and the second photoelectric conversion unit 21Q functions as a so-called 2PD type AF pixel, and this configuration makes it possible to reduce the amount of data for detecting the focus position output from the image sensor 3, thereby reducing power consumption and shortening the time required to read out the signal.

[0108] (4) The imaging device 1 of each of the above embodiments and modifications has an imaging element 3 of each of the embodiments and modifications, and a detection unit (imaging control unit 4) that detects the imaging state of the image formed on the imaging element 3 based on the signals (first signal SP, second signal SQ) output from the imaging element 3. With this configuration, the amount of data output from the image sensor 3 for detecting the focus position can be reduced, and the power consumption of the image sensor 3 and the image capture control unit 4 can be reduced.

[0109] Although various embodiments and modifications have been described above, the present invention is not limited to these. Furthermore, each embodiment and modification may be applied independently or in combination. Other aspects conceivable within the scope of the technical concept of the present invention are also included within the scope of the present invention. [Explanation of symbols]

[0110] 1: imaging device, 2: imaging optical system, 3: imaging element, 4: imaging control unit, 5: lens driving unit, 6: display unit, 7: semiconductor substrate, 8: control unit, 8H: horizontal control unit, 8V: vertical control unit, 9: output unit, 10, 10a: pixel, P: first pixel, Q: second pixel, 11: signal line, 12: readout unit, 13: adder unit, 14: first pixel row, 15: second pixel row, 16: memory unit, 17: multiplication circuit, 18: adder circuit, 21, 21P, 21Q: photoelectric conversion unit, 22, 22P, 22Q: amplification circuit, 23: color filter, 24: microlens, 25P: first light-shielding unit, 25Q: second light-shielding unit

Claims

[Claim 1] a plurality of pixels arranged in a first direction and a second direction intersecting the first direction, the pixels outputting signals used to detect a focus state of a subject image formed by an optical system; signal lines that are wired in the second direction and through which signals from the pixels are output; an adder that adds together a plurality of signals among the signals output to the signal line from the plurality of pixels arranged in the first direction to generate an added signal, and that, when the positions in the second direction of the plurality of pixels that output the signals to be added are different, changes the position in the first direction of at least one pixel among the plurality of pixels that output the signals to be added; and the adder adds signals of the plurality of pixels arranged in the first direction at at least three positions of the plurality of pixels in the second direction to generate a sum signal; an imaging element, wherein a combination of positions in the first direction of the plurality of pixels that output signals to be added is different for each of the at least three positions.

Citation Information

Patent Citations

  • Imaging device and imaging apparatus

    JP2012175145A