Method for depositing a strain-relieved graded buffer layer of silicon germanium on a surface of a substrate - Patents.com

By using a two-stage growth strategy to deposit the SiGe buffer layer on the substrate surface, the problem of medium and low TDD in the prior art is solved, and the quality and performance of electronic devices are improved.

JP2025503787AActive Publication Date: 2025-02-04SILTRONIC AG
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Patent Information

Application Number
JP2024543959
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-01-31
Filing Date
2022-12-14
Publication Date
2025-02-04
Estimated Expiration
2042-12-14

AI Technical Summary

Technical Problem

The prior art is difficult to efficiently form a low TDD SiGe buffer layer on the substrate, affecting the quality of electronic devices.

Method used

By depositing the SiGe buffer layer on the substrate surface, different growth rates and Ge content increment strategies were adopted to perform two stages of growth at temperatures above 800°C. The first stage was grown at a rate higher than 0.1 μm/min, and the second stage was grown at a rate lower than 0.1 μm/min, and the Ge content increment rate was controlled to be less than 10% GE/μm.

Benefits of technology

A low TDD SiGe buffer layer is realized, improving the quality and performance of electronic devices.

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Abstract

A method for depositing a strain-relaxed graded buffer layer of silicon germanium on a surface of a substrate, the surface consisting of silicon and a buffer layer having a content of germanium that increases to a final content, the method comprising: introducing GeCl4 and SiH2Cl2 onto the surface of the substrate at a deposition temperature of 800°C or greater during a first and second stage; growing the buffer layer at a grade rate of less than 10% Ge / μm; and growing the buffer layer at a growth rate of 0.1 μm / min or greater during the first stage and less than 0.1 μm / min during the second stage.
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Description

Technical Field

[0001] The present invention relates to a method of depositing a strain-relaxed graded buffer layer of silicon germanium on a surface of a substrate, the surface consisting of silicon and a buffer layer having a germanium content that increases to a final content.

Background Art

[0002] Prior Art / Problems Silicon germanium, or simply SiGe (Silicon germanium), is a semiconductor containing both silicon and germanium according to the formula Si 1-x Ge x (where 0 < x < 1). Thus, a germanium content of 25% Ge is represented by the formula Si 0.75 Ge 0.25 .

[0003] Due to the lattice mismatch between silicon and silicon germanium, a heteroepitaxial Si 1-x Ge x buffer layer grows strained to a critical thickness on a Si substrate, and the strain energy becomes high enough to form misfit dislocations (their respective through-dislocation segments that penetrate the surface of the layer) that relax the epitaxial layer and reduce the strain. A strained silicon can be deposited thereon using a relaxed SiGe buffer layer to fabricate an electronic device having improved characteristics. The quality of the relaxed SiGe buffer layer is largely determined by the threading dislocation density (TDD).

[0004] WO 2004 / 084268 and US 2007 / 0077734 each disclose a method of depositing an epitaxial germanium-containing layer on a single-crystalline silicon structure.

[0005] US Patent Application Publication No. 2015 / 0318355 discloses the fabrication of a strain-relieved buffer including first and second SiGe layers, the second SiGe layer having a TDD of 1×10 3 / cm 2 is less than. Summary of the Invention [Problem to be solved by the invention]

[0006] It is an object of the present invention to provide a method for depositing a strain-relaxed graded buffer layer of silicon germanium on the surface of a substrate, which is relatively easy to perform and provides access to relatively low TDD. [Means for solving the problem]

[0007] 1. A method for depositing a strain-relaxed graded buffer layer of silicon germanium on a surface of a substrate, the surface comprising a buffer layer having a content of silicon and germanium that increases to a final content; introducing GeCl4 and SiH2Cl2 onto the surface of the substrate during the first and second steps at a deposition temperature of 800° C. or higher; growing a buffer layer with a grading rate of less than 10% Ge / μm; growing the buffer layer at a growth rate of at least 0.1 μm / min during a first stage and at least 0.1 μm / min during a second stage; A method is provided, comprising:

[0008] explanation The following considerations and observations are helpful in understanding the present invention.

[0009] Misfit dislocation relaxation can be achieved by two mechanisms that affect the final TDD in different ways: (i) Nucleation and glide of new dislocation loops; each new loop generates two threading dislocations, increasing the final TDD.

[0010] (ii) Glide and stretch of pre-existing dislocation loops; the pre-existing loops glide and relax the buffer layer, and the TDD does not increase.

[0011] A low TDD SiGe buffer layer has a low number of half-loops that slide far into the buffer layer forming long misfit dislocation segments, whereas a high TDD buffer layer has a high number of half-loops that have only short misfit dislocation segments. Thus, the final TDD is a result of a balance between (i) and (ii), i.e., the number of half-loops that are created and the time they are allowed to slide unimpeded.

[0012] The balance of the two mechanisms (i) and (ii) has different importance in different phases of the buffer layer growth. During the initial stages of buffer layer growth, no dislocations are present in the buffer layer and new loops need to be nucleated to relax the buffer layer, and therefore (i) is the dominant mechanism. During continued tilting, (ii) is preferably the dominant mechanism to receive a low TDD.

[0013] Therefore, the growth conditions employed during the two phases of the buffer growth must be optimized separately, which is the core of the present invention: different growth rates are used in the different stages of the buffer layer growth to produce a low final TDD of the relaxed buffer layer.

[0014] During the first stage of deposition of the SiGe buffer layer the growth rate is ≥ 0.1 μm / min, while during the second stage the growth rate is < 0.1 μm / min. Preferably, the growth rate is ≥ 0.3 μm / min < 0.6 μm / min during the first stage and ≥ 0.01 μm / min < 0.095 μm / min during the second stage.

[0015] The gradient rate of increase in germanium content per thickness of the buffer layer is less than 10% Ge / μm in both the first and second stages of the deposition process.

[0016] The higher growth rate during the first stage ensures optimal conditions in the nucleation phase of the relaxation process, resulting in a low base TDD, which is maintained low during continued ramping by employing very low growth and ramp rates in the second stage.

[0017] Preferably, the first stage is terminated before about ⅓ of the final Ge content is reached, and the second stage is terminated when the final Ge content is reached.

[0018] According to one embodiment of the invention, the final germanium content is greater than or equal to 2% Ge and less than or equal to 90% Ge. According to a preferred embodiment, the final content is 25% Ge, with the first stage ending when a content of 8% Ge is reached.

[0019] The SiGe buffer layer is grown using CVD (chemical vapor deposition) at a deposition temperature above 800°C using GeCl4 and SiH2Cl2 as precursor gases.

[0020] Preferably, the SiGe buffer layer is deposited on the surface of a silicon single crystal wafer or an SOI wafer (silicon on insulator).

[0021] The invention will now be further illustrated by reference to the figures and examples. [Brief description of the drawings]

[0022] [Figure 1] FIG. 1 shows a schematic of the sample setup used in the first set of experiments. [Diagram 2] FIG. 2 shows the results of the first set of experiments. [Diagram 3] FIG. 3 shows a schematic of the sample configuration used in the second set of experiments. [Figure 4] FIG. 4 shows the results of the second set of experiments. [Diagram 5] FIG. 5 shows the results of the example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] Working Example The effect of growth rate on the TDD during the first stage of buffer growth (nucleation phase) is investigated in the first set of experiments. The sample configuration used in the first set of experiments is shown in Figure 1.

[0024] A graded SiGe buffer layer 2 was grown on a silicon single crystal wafer 1 (Figure 1) with a final concentration of 8% Ge. The growth rate was varied from 0.05 μm / min to 0.8 μm / min with a grading rate of 4% Ge / μm. The resulting TDD was measured after defect-selective etching. As shown in Figure 2, which shows the TDD against the growth rate GR, the TDD decreases as the growth rate increases to a minimum at 0.46 μm / min.

[0025] The effect of the growth rate in the second stage of buffer growth (the ramp phase) was investigated in a second set of experiments. The sample configuration used in the second set of experiments is shown in FIG.

[0026] On top of a first SiGe buffer layer 2 with a Ge concentration of 8%, a second graded buffer layer 3 is grown to a final concentration of 16% Ge. A grading rate of 4% Ge / μm is used. The growth rate of the second layer 2 is varied from 0.05 μm / min to 0.95 μm / min. From 0.05 μm / min to 0.23 μm / min, the TDD increases, and at higher growth rates the TDD remains constant. As shown in Figure 4, the lowest TDD is achieved at lower growth rates.

[0027] A fully strain-relaxed graded buffer layer up to a germanium content of 25% Ge has been deposited on a silicon single crystal wafer according to the present invention (Example). During the first stage of the deposition process, i.e. from the start of the process until a germanium content of 8% Ge is reached, the growth rate was 0.46 μm / min to produce a low base TDD in the base layer according to the results of the first set of experiments. To grade further to a final content of 25% Ge, the growth rate was 0.05 μm / min according to the results of the second set of experiments. The overall grading rate was 2.1% Ge / μm. The final TDD achieved was 4×10 4 / cm 2 The dotted lines in FIG. 5 represent the first stage of the deposition process, and the solid lines represent the second stage of the deposition process.

[0028] A series of experiments and examples were carried out in a commercial epitaxial reactor of the EPSILON 3200 type manufactured by ASM, at a deposition temperature of 1050° C., using GeCl 4 and SiH 2 Cl 2 as precursor gases. [Explanation of symbols]

[0029] 1 Board 2. a first silicon germanium buffer layer grown at a first growth rate; 3. A second silicon germanium buffer layer grown at a second growth rate.

Claims

1. 1. A method for depositing a strain-relaxed graded buffer layer of silicon germanium on a surface of a substrate, the surface comprising silicon and the buffer layer having an increasing germanium content up to a final content; During the first and second steps, GeCl is deposited on the surface of the substrate at a deposition temperature of 800° C. or higher. 4 and SiH 2 Cl 2 Introducing growing the buffer layer with a grading rate of less than 10% Ge / μm; growing the buffer layer at a growth rate of at least 0.1 μm / min during the first stage and at least 0.1 μm / min during the second stage; A method comprising:

2. 2. The method of claim 1, wherein the first stage is terminated before reaching about 1 / 3 of the final germanium content.

3. 3. The method according to claim 1 or 2, wherein the final content of germanium is greater than or equal to 2% Ge and less than or equal to 90% Ge.

4. The method of any one of claims 1 to 3, wherein the buffer layer is deposited by chemical vapor deposition.

5. The method according to any one of claims 1 to 4, wherein the buffer layer is grown on a silicon single crystal wafer or an SOI wafer.

Citation Information

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