Optoelectronic semiconductor device and manufacturing method

Abstract

In at least one embodiment, the optoelectronic semiconductor device (1) comprises: a semiconductor layer sequence (2) comprising an active region (22) oriented perpendicularly to a growth direction (G) of the semiconductor layer sequence (2), and a passivation regrowth layer (3) oriented at least partially at an angle to the active region (22), the passivation regrowth layer (3) being applied directly on the semiconductor layer sequence (2) and extending across a lateral border (4) of the active region (22), the semiconductor layer sequence (2) and the passivation regrowth layer (3) being based on the same semiconductor material system. For example, the optoelectronic semiconductor device (1) is a micro LED.

Description

[Technical field]

[0001] An optoelectronic semiconductor device is provided, as well as a method for manufacturing the optoelectronic semiconductor device. Summary of the Invention [Problem to be solved by the invention]

[0002] The problem to be solved is to provide optoelectronic semiconductor devices that can be manufactured with improved yields. [Means for solving the problem]

[0003] This object is achieved, inter alia, by an optoelectronic semiconductor device and a method as defined in the independent claims. Exemplary further developments form the subject matter of the dependent claims.

[0004] According to at least one embodiment, an optoelectronic semiconductor device comprises a semiconductor layer sequence comprising one or more active regions, at least one of which is oriented perpendicular to a growth direction of the semiconductor layer sequence, which may be perpendicular to a major surface of a growth substrate.

[0005] According to at least one embodiment, the semiconductor layer sequence is based on III-V compound semiconductor materials. The semiconductor materials are, for example, nitride compound semiconductor materials, such as [ka] or phosphide compound semiconductor materials, e.g. [ka] or arsenide compound semiconductor materials, e.g. [ka] In each case, 0≦n≦1, 0≦m≦1 and n+m≦1 apply. The semiconductor layer sequence may comprise dopants and further components. For simplicity, however, only the essential components of the crystal lattice of the semiconductor layer sequence are shown, i.e. Al, As, Ga, In, N or P, even if these can be partially replaced and / or supplemented by, for example, small amounts of other substances.

[0006] The semiconductor layer sequence is particularly preferably based on the AlInGaAsP and / or AlInGaP material system.

[0007] According to at least one embodiment, the optoelectronic semiconductor device includes one or more passivation regrowth layers. At least one of the passivation regrowth layers is oriented at least partially at an angle to the active region. That is, the passivation regrowth layer does not extend parallel to the at least one active region, at least in places. The passivation regrowth layer may not extend parallel to the growth direction, at least in places or completely.

[0008] According to at least one embodiment, the passivation regrowth layer is applied directly onto the semiconductor layer sequence, so that the passivation regrowth layer and the semiconductor layer sequence are in contact with each other. The passivation regrowth layer is applied only onto the semiconductor layer sequence, so that the semiconductor layer sequence at each location of the passivation regrowth layer can precede the passivation regrowth layer as viewed along the growth direction.

[0009] According to at least one embodiment, the passivation regrowth layer extends across a lateral boundary of the active area, i.e. the lateral boundary is a side of the active area, the term "lateral" referring to a direction perpendicular to the growth direction and / or in the direction of the main extent of the active area. The passivation regrowth layer is preferably applied directly on the lateral boundary. Thus, the passivation regrowth layer directly contacts the lateral boundary and thus the active area.

[0010] According to at least one embodiment, the semiconductor layer sequence and the passivation regrowth layer are based on the same semiconductor material system. For example, the semiconductor layer sequence and the passivation regrowth layer are both based on the AlInGaAsP or AlInGaP material system. Otherwise, the semiconductor layer sequence and the passivation regrowth layer can also be based on the AlInGaN or AlInGaAs material system.

[0011] In at least one embodiment, the optoelectronic semiconductor device comprises: a semiconductor layer sequence comprising an active region oriented perpendicular to the growth direction of the semiconductor layer sequence, a passivation regrowth layer oriented at an at least partial incline with respect to the active area, a passivation regrowth layer is applied directly on the semiconductor layer sequence and extends across the lateral boundaries of the active area, the semiconductor layer sequence and the passivation regrowth layer are based on the same semiconductor material system, for example the semiconductor material system of the semiconductor layer sequence and of the passivation regrowth layer is InGaAlP or AlInGaAsP, i.e. [ka] where 0≦n≦1, 0≦m≦1, 0≦k<1, and n+m≦1 apply.

[0012] In a possible process flow, the complete semiconductor layer sequence is grown and then structured using a hard mask, for example of SiO2, during which the active areas are etched down to the n-doped layer. Afterwards, a regrown passivation is added and the hard mask is removed. The resulting pixel array is then ready for further processing, for example adding a transparent conductive oxide (for example indium tin oxide, ITO for short), making electrical contacts or adding mirrors.

[0013] However, the above process flow may encounter problems with the removal of the SiO2 hard mask: after etching the hard mask, the pixel structure may be partially destroyed because the SiO2 etchant also attacks the regrown passivation.

[0014] In the optoelectronic semiconductor device described herein, one idea is to add a passivation regrowth without a hard mask. Without a hard mask, there is no need to perform any wet etching that may damage the passivation regrowth layer or the semiconductor layer sequence. Since the passivation regrowth layer is electrically insulating, in a next step the passivation regrowth layer can be opened to allow electrical contact to, for example, a GaP contact layer. Another advantage is that there is no need for an additional dielectric passivation layer.

[0015] According to at least one embodiment, the optoelectronic semiconductor device comprises a plurality of pixels. The pixels are configured to emit electromagnetic radiation. For example, in the case of an AlInGaAsP-based semiconductor layer sequence, the electromagnetic radiation is visible light, such as red or yellow light, or the electromagnetic radiation is near-infrared radiation. In the case of an AlInGaN-based semiconductor layer sequence, the electromagnetic radiation can also be blue or green light, or near-ultraviolet radiation. Near-infrared radiation may refer to a wavelength between 700 nm and 1.5 μm, and near-ultraviolet radiation may refer to a wavelength between 300 nm and 420 nm. The electromagnetic radiation is generated in the active region by electroluminescence.

[0016] According to at least one embodiment, each of the pixels comprises a part of the semiconductor layer sequence and a part of the active area. In particular, all the pixels are produced and structured from the same semiconductor layer sequence by etching. It is possible for the pixels to share a common layer of the semiconductor layer sequence.

[0017] According to at least one embodiment, the pixels are applied on a common carrier. The common carrier can be the growth substrate of the semiconductor layer sequence or a replacement substrate replacing the growth substrate. Similarly, the common carrier can be a circuit board or an electrical carrier comprising conductor tracks and / or electrical through contacts and / or electrical contact areas (e.g. configured for soldering). The semiconductor layer sequence can extend in a continuous, uninterrupted manner across the common carrier.

[0018] According to at least one embodiment, all pixels are electrically contacted in parallel, e.g., all pixels can only be turned on and off together, otherwise groups of pixels or single pixels can be electrically addressed individually.

[0019] For example, an optoelectronic semiconductor device may include at least 100 or at least 1000 pixels and / or at most 10 6 or up to 10 5 or up to 10 4 It contains pixels.

[0020] According to at least one embodiment, the passivation regrowth layer extends in each case over the top surface of the respective pixel. The top surface of the pixel is remote from the common carrier. In particular, the top surface is the surface of the pixel that limits the pixel along the growth direction. In other words, the top surface is the last grown area of ​​the pixel.

[0021] According to at least one embodiment, the size of the pixels, when viewed in plan view on the common carrier, is at least 0.2 μm×0.2 μm, or at least 0.8 μm×0.8 μm, or at least 2 μm×2 μm. Alternatively or additionally, the size of the pixels is at most 100 μm×100 μm, or at most 10 μm×10 μm, or at most 5 μm×5 μm, or at most 3 μm×3 μm.

[0022] According to at least one embodiment, the height of the pixels above the common carrier or above the common semiconductor layer is at least 0.2 μm or at least 0.3 μm. Alternatively or additionally, said height is at most 10 μm or at most 3 μm, or at most 2 μm, or at most 1.1 μm.

[0023] According to at least one embodiment, the size of the optoelectronic semiconductor device, when viewed in plan view on the common carrier, is at least 20 μm×20 μm, or at least 50 μm×50 μm, or at least 100 μm×100 μm. Alternatively or additionally, the size of said optoelectronic semiconductor device is at most 30 mm×30 mm, or at most 2 mm×2 mm, or at most 0.3 mm×0.3 mm.

[0024] According to at least one embodiment the common carrier is or comprises a semiconductor material, said semiconductor material of the common carrier can be of the same semiconductor material system as the semiconductor layer sequence.

[0025] According to at least one embodiment, the passivating regrowth layer includes one or more openings in each of the top surfaces, preferably exactly one such opening per top surface.

[0026] According to at least one embodiment, at each of the openings, and therefore at each of the top surfaces, there is an electrical contact layer, preferably extending through the passivation regrowth layer and electrically contacting the respective top surface and therefore the respective pixel.

[0027] According to at least one embodiment, the electrical contact layer includes at least one of a metallic mirror sublayer and a contact sublayer. For example, the contact sublayer is a transparent conductive oxide such as ITO. Furthermore, the electrical contact layer can include additional layers, such as a current spreading layer.

[0028] For example, the electrical contact layer extends over all pixels in a continuous uninterrupted manner, or it may be a structured layer such that there may be conductor tracks for individual pixels or groups of pixels.

[0029] According to at least one embodiment, the passivation regrowth layer completely surrounds each of the openings, and thus may form a frame on the upper surface of each.

[0030] According to at least one embodiment, the width of each frame on each top surface is at least 0.1 μm, or at least 0.2 μm, or at least 1 μm. Alternatively or additionally, said width is at most 5 μm, or at most 0.9 μm, or at most 0.3 μm, or at most 0.2 μm. Alternatively or additionally, said width is at least 5% or at least 10% or at least 20% of the range of each pixel, in particular viewed along the same direction perpendicular to the growth direction. Optionally, said width is at most 40% or at most 30% or at most 20% of said range.

[0031] According to at least one embodiment, the passivation regrowth layer completely covers the side surfaces of the pixel, in other words the side surfaces of the pixel are completely protected and electrically insulated by the passivation regrowth layer.

[0032] According to at least one embodiment, the passivation regrowth layer extends as a continuous layer over all pixels. In addition to the opening at the top surface, the passivation regrowth layer can be an uninterrupted closed layer.

[0033] According to at least one embodiment, the semiconductor material system of the semiconductor layer sequence and of the passivation regrowth layer is InGaAlP. In the case of a growth substrate as a common carrier, the common carrier can be in the GaAs material system.

[0034] According to at least one embodiment, the thickness of the passivation regrowth layer is at least 50 nm, or at least 100 nm, or at least 150 nm. Alternatively or additionally, the thickness is at most 1 μm, at most 0.5 μm, or at most 0.3 μm.

[0035] According to at least one embodiment, the thickness of the passivation regrowth layer is constant across the optoelectronic semiconductor device, e.g., with a tolerance of at most 50%, or at most 20%, or at most 10% of the average thickness of the passivation regrowth layer. Thus, the passivation regrowth layer may be free of intended thickness variations.

[0036] According to at least one embodiment, the passivation regrowth layer is in monolayer fashion, thus making it possible for the passivation regrowth layer to be made of a single material that is uniformly distributed throughout the passivation regrowth layer.

[0037] According to at least one embodiment, the passivation regrowth layer is of multi-layer type. Thus, the passivation regrowth layer comprises two or at least three sublayers. Adjacent sublayers or all sublayers differ from each other in material composition with respect to the main constituent of the crystal lattice of the semiconductor material system. Alternatively or additionally, adjacent sublayers or all sublayers differ from each other in doping concentration and / or doping type. Doping type refers to n-doped or p-doped or undoped. Undoped means that the concentration of the non-main constituent of the crystal lattice is at most 5×10 16 cm -3 It can mean that.

[0038] According to at least one embodiment, the semiconductor layer sequence comprises all or some of the following layers in the stated order (in particular viewed along the growth direction): a first buffer layer (for example n-doped), a first contact layer (for example n-doped), a first barrier layer (for example n-doped or undoped), a first cladding layer (e.g. n-doped or undoped), an active region (e.g., comprising a single quantum well structure or a multiple quantum well structure, the active region may comprise at least one quantum well and at least one adjacent active region barrier layer); a second cladding layer (e.g., p-doped or undoped), a second barrier layer (for example p-doped or undoped), a second buffer layer (e.g. p-doped), and - A second contact layer (for example p-doped or undoped).

[0039] According to at least one embodiment, at least the first contact layer, the first barrier layer, the first cladding layer, the active region, the second cladding layer, the second barrier layer, the second buffer layer, and the second contact layer are in direct contact with the passivation regrowth layer. For example, in the region adjacent to the pixel, the first cladding layer, the active region, the second cladding layer, the second barrier layer, the second buffer layer, and the second contact layer can be completely removed. The first contact layer and / or the first barrier layer can be completely or partially removed.

[0040] According to at least one embodiment, the optoelectronic semiconductor device is or includes a micro LED. In the broadest sense, a micro LED can be considered as any light emitting diode (LED) of particularly small size and is generally not a laser. For example, the growth substrate is removed from the micro LED, so that a typical height of such a micro LED is, for example, in the range of 1.5 μm to 10 μm.

[0041] In principle, micro LEDs do not necessarily have to have a rectangular radiation emitting surface. In general, for example, LEDs can have as radiation emitting surface a radiation emitting surface whose arbitrary lateral extent in a plan view of the layers of the layer stack is 100 μm or less or 70 μm or less. For example, for rectangular micro LEDs, an edge length (particularly in a plan view of the layers of the layer stack) of 70 μm or less or 50 μm or less can be a criterion. Typically, such micro LEDs are provided on a wafer with a (non-destructively in the case of μ LEDs) removable holding structure.

[0042] Currently, microLEDs are mainly used in displays. They form pixels or sub-pixels and emit light of a defined color. Due to their small pixel size and high density at close range, microLEDs are particularly suitable for small monolithic displays for augmented reality, AR, applications, especially data glasses. In addition, they are being developed for use in other applications, especially data communication or pixelated lighting applications.

[0043] Different ways of spelling micro-LEDs can be found in the relevant literature, for example μLED, μ-LED, uLED, u-LED, or micro light emitting diode.

[0044] There is further provided a method for manufacturing an optoelectronic semiconductor device, by which an optoelectronic semiconductor device is manufactured as shown in relation to at least one of the above embodiments, and therefore features of the optoelectronic semiconductor device are also disclosed for the method and vice versa.

[0045] In at least one embodiment, a manufacturing method is for manufacturing an optoelectronic semiconductor device that includes a pixel. The method includes the following steps, preferably in the order listed: A) providing a semiconductor layer sequence; B) etching the semiconductor layer sequence so as to form pixels, the etching being carried out through the active area so as to form lateral boundaries of parts of the active area; C) applying a passivating regrowth layer directly on the semiconductor layer sequence including at least part of the lateral boundaries of the active area.

[0046] The optoelectronic semiconductor devices and methods described herein will be described in more detail below as exemplary embodiments with reference to the drawings, in which like elements in the various figures are designated with like reference numerals, although the relationships between the elements are not shown to scale, and rather the individual elements may be exaggerated in size to aid in understanding. [Brief description of the drawings]

[0047] [Figure 1] 1A-1D are schematic cross-sectional views along the growth direction of method steps for manufacturing a semiconductor device. [Diagram 2] 1A-1D are schematic cross-sectional views along the growth direction of method steps for manufacturing a semiconductor device. [Diagram 3] 1A-1D are schematic cross-sectional views along the growth direction of method steps for manufacturing a semiconductor device. [Figure 4] 1A-1D are schematic cross-sectional views along the growth direction of method steps for manufacturing a semiconductor device. [Diagram 5] 1 is a schematic cross-sectional view along the growth direction of an exemplary embodiment of an optoelectronic semiconductor device described herein. [Figure 6] 1 is a schematic plan view of an exemplary embodiment of an optoelectronic semiconductor device as described herein. [Figure 7] 1 is a schematic plan view of an exemplary embodiment of an optoelectronic semiconductor device as described herein. [Figure 8] 1A-1D are schematic cross-sectional views along the growth direction of method steps of an exemplary embodiment of a manufacturing method for an optoelectronic semiconductor device as described herein. [Figure 9]1A-1D are schematic cross-sectional views along the growth direction of method steps of an exemplary embodiment of a manufacturing method for an optoelectronic semiconductor device as described herein. [Figure 10] 1A-1D are schematic cross-sectional views along the growth direction of method steps of an exemplary embodiment of a manufacturing method for an optoelectronic semiconductor device as described herein. [Figure 11] 1A-1D are schematic cross-sectional views along the growth direction of method steps of an exemplary embodiment of a manufacturing method for an optoelectronic semiconductor device as described herein. [Figure 12] 1A-1D are schematic cross-sectional views along the growth direction of method steps of an exemplary embodiment of a manufacturing method for an optoelectronic semiconductor device as described herein. [Figure 13] 1A-1D are schematic cross-sectional views along the growth direction of method steps of an exemplary embodiment of a manufacturing method for an optoelectronic semiconductor device as described herein. [Figure 14] 1 is a schematic cross-sectional view of an exemplary embodiment of an optoelectronic semiconductor device as described herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0048] 1 to 4 illustrate a method variant for manufacturing a modified semiconductor device 9. In FIG.

[0049] 1 , a semiconductor layer sequence 2 is grown on a common carrier 5. The semiconductor layer sequence 2 is based on AlInGaP and comprises an active region 22 which produces, for example, red light. Furthermore, the semiconductor layer sequence 2 can comprise further layers 21, 23, 24, 25, 26, 27, 28, 29 which follow one another along the growth direction G.

[0050] The semiconductor layer sequence 2 ends at an upper surface 20 remote from the common carrier 5. A mask layer 7 is applied onto the upper surface 20. For example, the mask layer 7 is a hard mask, for example made of SiO2.

[0051] 2, the semiconductor layer sequence 2 is then etched on the basis of the structured mask layer 7 in such a way that a plurality of pixels 10 are formed. The pixels 10 may have sloping side faces. The mask layer 7 is partially undercut. To simplify the drawing, only one of the pixels 10 is illustrated.

[0052] 3, a passivation regrowth layer 3 is then grown on those regions of the semiconductor layer sequence 2 that are not covered by the mask layer 7. Since the mask layer 7 is still present, the upper surface 20 is free of the passivation regrowth layer 3. The passivation regrowth layer 3 can consist of sublayers 31, 32, 33.

[0053] 4, the mask layer 7 is then removed, for example by wet etching. However, this etching may also attack the passivation regrowth layer 3, or at least one of its sublayers 31. Thus, damage 93 may occur that may reduce the manufacturing yield and / or efficiency of the modified semiconductor device 9.

[0054] To overcome the possible adverse effects of removing the mask layer 7 described in relation to FIG. 4, the optoelectronic semiconductor device 1 described herein includes a different passivation regrowth layer 3 that can avoid damage 93.

[0055] 5, the optoelectronic semiconductor device 1 includes a passivation regrowth layer 3 extending over a top surface 20 of the pixel 10. Preferably, the optoelectronic semiconductor device 1 includes a plurality of pixels 10, although only one pixel 10 is illustrated in FIG.

[0056] The passivation regrowth layer 3 therefore has the shape of a frame at the top surface 20. The width W of the frame and thus the width W of the passivation regrowth layer 3 around the top surface 20 is, for example, 0.3 μm to 1.0 μm. The thickness T of the passivation regrowth layer 3 is, for example, 100 nm to 500 nm. The passivation regrowth layer 3 can be a single homogeneous layer. For example, the passivation regrowth layer 3 is undoped InAlP or undoped InGaAlP. The top surface 30 of the passivation regrowth layer 3 is therefore, in contrast to FIGS. 3 and 4 , further from the active region 22 than the top surface 20 of the semiconductor layer sequence 2.

[0057] At the top surface 20, the passivation regrowth layer 3 has an opening. At this opening there is preferably an electrical contact layer 6. The electrical contact layer 6 can be limited to the opening or can partially or completely cover the passivation regrowth layer 3, as shown in FIG. 5 . Optionally, the electrical contact layer 6 comprises a contact sublayer 62 (for example a transparent conductive oxide such as ITO or ZnO) directly at the top surface 20. As a further option, the electrical contact layer 6 can comprise a mirror sublayer 61 (for example a metal layer, in particular of Ag). The electrical contact layer 6 can protrude into the opening and can therefore be thicker than the passivation regrowth layer 3.

[0058] The edge length of pixel 10 is, for example, 0.5 μm to 10 μm (including the endpoints), but can be as long as 100 μm. Pixel 10 can be a light emitting diode, or LED for short, and because of its small lateral dimension, the pixel can be referred to as a μLED.

[0059] For example, the common carrier 5 is a growth substrate for the semiconductor layer sequence 2. The semiconductor layer sequence 2 is based on the AlInGaAsP material system, for example. The common carrier 5 can then be a GaAs growth substrate.

[0060] The semiconductor layer sequence 2 comprises, for example, a first buffer layer 21, in particular directly on the common carrier 5. The first buffer layer 21 can be an n-doped AlGaAs layer.

[0061] Optionally, the first buffer layer 21 is followed by a first contact layer 23. For example, the first contact layer 23 is an n-doped layer formed of InGaAlP.

[0062] Next, the first barrier layer 24 may be provided. The first barrier layer 24 may be formed of, for example, undoped InAlP.

[0063] The first barrier layer 24 may be followed by a first cladding layer 25. For example, the first cladding layer 25 is made of undoped InGaAlP.

[0064] Then there is an active region 22, for example based on undoped InGaAlP, in which electromagnetic radiation is generated during operation of the optoelectronic semiconductor device 1. At the sides of the pixel 10 there are lateral boundaries 4 of the active region 22. The lateral boundaries 4 as well as the remaining parts of the sides are completely covered by a passivation regrowth layer 3 of approximately constant thickness.

[0065] On the side of the active region 22 facing away from the common carrier 5, a second cladding layer 26, for example of undoped InGaAlP, may be provided.

[0066] Optionally, the second cladding layer 26 is followed by a second barrier layer 27. The second barrier layer 27 may be formed of p-doped InAlP.

[0067] A further option is to follow the second barrier layer 27 with a second buffer layer 28. The second buffer layer 28 is, for example, a p-doped InGaAlP layer.

[0068] Finally, adjacent to the upper side 20 the semiconductor layer sequence 2 can be finished by a second contact layer 29, which may for example be a GaP layer.

[0069] The semiconductor layer sequence 2 in Fig. 5 has been etched down to the first contact layer 23. The first contact layer 23 can therefore be unaffected or essentially unaffected by etching the pixel 10 and can be a continuous layer on the common carrier 5 together with the first buffer layer 21. If this is not the case, the first contact layer 23 and optionally also the first buffer layer 21 can alternatively be removed, whereby the common carrier 5 can be exposed in places by etching.

[0070] The height H of the pixel 10 above the last successive layer (ie the first contact layer 23 according to FIG. 5) is preferably at least 0.2 μm and / or at most 1.0 μm, for example with a length L of about 1 μm.

[0071] As a further option, a bottom electrical contact 8 can be provided. The bottom electrical contact 8 is applied, for example, to the side of the common carrier 5 facing away from the semiconductor layer sequence 2. In addition to being shown, the bottom electrical contact 8 can also be applied to the side of the first contact layer 23 facing away from the common carrier 5.

[0072] Otherwise, the same applies to FIG. 5 as to FIGS. 1-4, and vice versa.

[0073] 6 and 7, there is shown a plan view of an optoelectronic semiconductor device 1. The optoelectronic semiconductor device 1 may be configured in the cross section described in relation to FIG.

[0074] 6, the pixels 10 are arranged in a regular rectangular grid. When viewed in plan, the pixels 10 are square or rectangular in shape, and the pixels 10 may be shaped as truncated pyramids.

[0075] According to Fig. 7, the pixels 10 are arranged in a hexagonal lattice. Thus, the pixels 10 can be shaped as hexagons, or as rectangles or squares, when viewed in plan view.

[0076] In addition to being depicted in Figures 6 and 7, the pixels 10 may also have a round, particularly circular, shape when viewed in plan.

[0077] All pixels 10 can be of the same design, or differently shaped or grown pixels 10 can be combined with one another. The pixels 10 can be electrically contacted in parallel, or groups of pixels 10 or individual pixels 10 can be electrically addressed independently of one another.

[0078] The optoelectronic semiconductor device 1 can, for example, be a display device or act as a light source in applications such as augmented reality and / or virtual reality, for example in corresponding goggles.

[0079] Otherwise, the same applies to Figures 6 and 7 as to Figures 1-5, and vice versa.

[0080] 8 to 13, a manufacturing method for the optoelectronic semiconductor device 1 is illustrated.

[0081] 8, in method step S1 the semiconductor layer sequence 2 is grown along a growth direction G starting from a common carrier 5. The semiconductor layer sequence 2 can be configured as described in connection with FIG.

[0082] In method step S2, see Fig. 9, a mask layer 7 is applied. For example, the mask layer 7 is made from a photoresist or from a metal oxide such as Al2O3. The mask layer 7 can be made from a dry or wet resist. The semiconductor layer sequence 2 is then etched to form individual pixels 10. Again, only one pixel 10 is illustrated, but preferably there are several pixels 10 arranged at a distance from one another.

[0083] The etching may extend, for example, down to the first contact layer 23. The etching forms the sloped side surfaces of the pixel 10, including the lateral boundaries 4. When viewed in cross-section, above the continuous first contact layer 23, the pixel 10 may have a symmetric trapezoidal shape.

[0084] In a subsequent method step S3, with reference to Figure 10, the mask layer 7 is removed. As the mask layer 7 is an easy-to-remove material such as resist, the previously etched pixels 10 are not affected by the removal of the mask layer 7.

[0085] 11, a passivation regrowth layer 3 is then grown, which preferably completely covers the side and top surfaces 20 of the pixel 10. The passivation regrowth layer 3 can be made of an undoped InAlP or an undoped InGaAlP layer.

[0086] In method step S5, see Fig. 12, an opening is formed in the passivation regrowth layer 3 above each of the pixels 10. Thus, the top surface 20 of the pixels 10 is partially exposed. A frame of the passivation regrowth layer 3 preferably remains on the edges of the top surface 20.

[0087] Finally, in method step S6 of Fig. 13, an electrical contact layer 6 is added. For example, the electrical contact layer 6 is or comprises an ITO layer. Further layers (not shown), such as mirror layers, barrier layers and / or current spreading layers, may be present in the electrical contact layer 6. For example, the thickness of the electrical contact layer 6 is at least 50 nm and / or at most 0.5 μm. The electrical contact layer 6 may have an approximately constant layer thickness and may mimic the contour of the passivation re-grown layer 3.

[0088] Otherwise, the same applies to Figures 8-13 as to Figures 1-7, and vice versa.

[0089] 14, it is illustrated that the passivation regrowth layer 3 consists of, for example, three sublayers 31, 32, 33. The sublayers 31, 32, 33 differ from each other in their doping type and / or material composition. For example, p-doped, n-doped and undoped sublayers 31, 32, 33 can be combined with each other.

[0090] For example, the innermost sublayer 31 is undoped InAlP, followed by the middle sublayer 32 of p-doped InAlP and the top sublayer 33 of n-doped InAlP. There can be more than three sublayers. If the semiconductor layer sequence 2 is in the AlInGaN material system, the passivation regrowth layer 3 can be, for example, an undoped and a differently doped layer of AlGaN.

[0091] Such a passivation regrowth layer 3 can also be used in all other examples.

[0092] Otherwise, the same applies to FIG. 14 as to FIGS. 1-13, and vice versa.

[0093] Components depicted in the figures are typically positioned directly one above the other in the sequence depicted, unless otherwise specified. Components that are not touching in the figures are typically positioned spaced apart from one another. Where lines are drawn parallel to one another, corresponding surfaces may be oriented parallel to one another. Similarly, unless otherwise specified, the positions of the depicted components relative to one another are accurately reproduced in the figures.

[0094] The invention described herein is not limited by the description based on exemplary embodiments, but rather the invention encompasses any novel feature and any combination of features, including any combination of features in the claims, even if this feature or this combination itself is not explicitly set forth in the claims or in the exemplary embodiments.

[0095] This patent application claims priority from German patent application no. 102022103158.6, the disclosure content of which is incorporated herein by reference. [Explanation of symbols]

[0096] 1 Optoelectronic semiconductor devices 10 pixels 2. Semiconductor Layer Sequence 20 Upper surface of the semiconductor layer sequence 21 First buffer layer 22 Active area 23 n-doped contact layer 24 First Barrier Layer 25 First cladding layer 26 Second Cladding Layer 27 Second Barrier Layer 28 Second buffer layer 29 p-doped contact layer 3 Passivation Regrowth Layer 30 Top surface of passivation regrowth layer 31 First Sublayer 32 Second Sublayer 33 Third Sublayer 34 Base side of passivation regrowth layer 36 Opening 4. Lateral boundaries of the active region 5 Common Carrier 6 Electrical Contact Layer 61 Metal mirror sublayer 62 Contact sublayer 7 Mask Layer 8 Bottom Electrical Contact 9 Modified Semiconductor Devices 93 Damage G growth direction H pixel height Edge length in L pixels S Method Steps T is the thickness of the passivation regrowth layer W is the width of the frame above the passivation regrowth layer on each top surface

Claims

1. An optoelectronic semiconductor device (1), comprising: a semiconductor layer sequence (2) comprising an active region (22) oriented perpendicular to the growth direction (G) of the semiconductor layer sequence (2), a passivation regrowth layer (3) oriented at an angle at least partially with respect to said active area (22), the passivation regrowth layer (3) is applied directly on the semiconductor layer sequence (2) and extends across the lateral boundaries (4) of the active area (22), the semiconductor layer sequence (2) and the passivation regrowth layer (3) are based on the same semiconductor material system, an optoelectronic semiconductor device (1), wherein the semiconductor material system of the semiconductor layer sequence (2) and of the passivation regrowth layer (3) is InGaAlP or AlInGaAsP.

2. a plurality of pixels (10) configured to emit electromagnetic radiation generated in said active area (22) by electroluminescence; each of the pixels (10) comprises the semiconductor layer sequence (2) and a part of the active area (22), - said pixels (10) are applied onto a common carrier (5); An optoelectronic semiconductor device (1) according to claim 1, wherein the passivation regrowth layer (3) extends in each case over an upper surface (20) of the respective pixel (10), the upper surface (20) being remote from the common carrier (5).

3. When viewed in plan view of the common carrier (5), the size of the pixels (10) is at least 0.2 μm×0.2 μm and at most 100 μm×100 μm, and the height (H) of the pixels (10) above the common carrier (5) is at least 0.2 μm and at most 2 μm; The optoelectronic semiconductor device (1) according to claim 2, wherein the optoelectronic semiconductor device (1) is a micro LED.

4. An optoelectronic semiconductor device (1) according to claim 2 or 3, wherein said common carrier (5) is a semiconductor material and is a growth substrate common to all said pixels (10).

5. The optoelectronic semiconductor device (1) of any one of claims 2 to 4, wherein the passivation regrowth layer (3) comprises an opening (36) in each of the upper surfaces (20), and in each of the openings (36) an electrical contact layer (6) extends through the passivation regrowth layer (3) and electrically contacts a respective one of the pixels (10).

6. 6. An optoelectronic semiconductor device (1) according to claim 5, wherein the electrical contact layer (6) comprises at least one of a metallic mirror sublayer (61) and a contact sublayer (62) of a transparent conducting oxide.

7. 7. An optoelectronic semiconductor device (1) as claimed in claim 5 or 6, wherein the passivation regrowth layer (3) completely surrounds each of the openings (36) as a frame on each of the upper faces (20), and the width (W) of each of the frames on each of the upper faces (20) is at least 0.1 μm and at most 5 μm and / or is at least 5% and at most 30% of the area of ​​each of the pixels (10) viewed along the same direction perpendicular to the growth direction (G).

8. An optoelectronic semiconductor device (1) according to any one of claims 2 to 7, wherein the passivation regrowth layer (3) extends as a continuous layer over all the pixels (10) and completely covers the sides of the pixels (10).

9. Optoelectronic semiconductor device (1) according to any one of the preceding claims, wherein the semiconductor material system of the semiconductor layer sequence (2) and of the passivation regrowth layer (3) is InGaAlP.

10. An optoelectronic semiconductor device (1) according to any one of the preceding claims, wherein the thickness (T) of said passivation regrowth layer (3) is at least 50 nm and at most 0.5 μm.

11. 11. An optoelectronic semiconductor device (1) according to claim 10, wherein said thickness (T) is constant over said optoelectronic semiconductor device (1) with a tolerance of up to 50% of the average thickness of said passivation regrowth layer (3).

12. An optoelectronic semiconductor device (1) according to any one of the preceding claims, wherein said passivation regrowth layer (3) is in monolayer mode.

13. The optoelectronic semiconductor device (1) according to any one of claims 1 to 11, wherein the passivation regrowth layer (3) is of multi-layer type and comprises at least two sub-layers (31, 32, 33), the at least two sub-layers (31, 32, 33) differing from each other in at least one of their material composition and their doping concentration with respect to the main constituents of the crystal lattice of the semiconductor material system.

14. The semiconductor layer sequence (2) comprises, in the stated order: a first buffer layer (21), - an n-doped contact layer (23), a first barrier layer (24), a first cladding layer (25), - the active region (22); - a second cladding layer (26), - a second barrier layer (27), a second buffer layer (28), and - a p-doped contact layer (29), The optoelectronic semiconductor device (1) according to any one of claims 1 to 13, wherein at least the first cladding layer (25), the active region (22), the second cladding layer (26), the second barrier layer (27), the second buffer layer (28) and the p-doped contact layer (29) are in direct contact with the passivation regrowth layer (3).

15. A manufacturing method for producing at least the optoelectronic semiconductor device (1) according to claim 2, comprising the steps of: A) providing the semiconductor layer sequence (2), B) etching the semiconductor layer sequence (2) so as to form the pixel (10), the etching being carried out through the active area (22) so as to form the lateral boundary (4) of the part of the active area (22); C) applying the passivation regrowth layer (3) directly on the semiconductor layer sequence (2) including the lateral boundaries (4).

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