Antenna module employing a packaging substrate with vertically integrated patch antenna(s) and related manufacturing method - Patents.com

Abstract

Antenna module employing a package substrate with vertically integrated patch antenna(s) and associated manufacturing method. The antenna module includes an RFIC package including one or more RFICs (RFICs) supporting radio frequency (RF) communications, and a package substrate including one or more metallization layers with metal interconnects formed for routing signals between the RFICs and antenna(s) in the package substrate. The package substrate includes one or more patch antennas that are planar and vertically integrated in multiple metallization layers in the package substrate, which electromagnetically behave as patch antennas. In this manner, the patch antenna(s) can be formed as a vertically integrated structure in the package substrate using the manufacturing method (e.g., microvia manufacturing process) used to fabricate the metal interconnects and vias in the package substrate.

Description

[Technical field]

[0001] Priority Application

[0001] This application claims priority to U.S. patent application Ser. No. 17 / 651,324, filed Feb. 16, 2022, entitled “ANTENNA MODULES EMPLOYING A PACKAGE SUBSTRATE WITH A VERTICALLY-INTEGRATED PATCH ANTENNA(S), AND RELATED FABRICATION METHODS,” the entire contents of which are incorporated herein by reference.

[0002] I. Field of Disclosure

[0002] The field of the disclosure relates to antenna modules (also referred to as "antenna-in-package" (AiP)) that include a radio-frequency (RF) integrated circuit (IC) (radio-frequency integrated circuit, RFIC) coupled to a package substrate that includes an integrated antenna(s). [Background technology]

[0003] II. Background technology

[0003] Modern smartphones and other portable devices have expanded the use of different wireless links using various technologies in different radio frequency bands. For example, 5G cellular networks, commonly referred to as fifth generation (5G) new radio (NR), include frequencies in the range of 24.25 to 86 Gigahertz (GHz), with the lower 19.25 GHz (24.25 to 43.5 GHz) often used for mobile devices. This frequency spectrum for 5G communications is in the millimeter wave (mmWave) or millimeter band range. mmWave allows higher data rates than at lower frequencies, such as those used for Wi-Fi networks and current cellular networks.

[0004]

[0004] Radio frequency (RF) transceivers supporting mmWave spectrum are integrated into mobile devices and other portable devices designed to support mmWave communication signals. To support the integration of RF transceivers in devices, the RF transceivers may be integrated into an RF integrated circuit (IC) (RFIC) provided as part of an antenna module. The RFIC is realized in an RFIC semiconductor die ("die"). The antenna module is sometimes referred to as an "antenna in package" (AiP). A conventional antenna module includes an RFIC package including one or more RFICs, a power management IC (PMIC), and passive electrical components (e.g., inductors, capacitors, etc.) mounted on one side of a package substrate as a support structure. The package substrate supports a metallization structure to provide a chip-to-chip interface and an external signal interface to the RFIC package. The package substrate also includes one or more antennas electrically coupled to the RFIC package via the metallization structure so as to be able to receive and radiate electrical RF signals as electromagnetic (EM) signals. The packaging substrate may include multiple antennas, also called an antenna array, to provide signal coverage in a larger desired area around the antenna module. Summary of the Invention

[0005]

[0005] The disclosed aspects include an antenna module employing a package substrate with vertically integrated patch antenna(s). Related manufacturing methods are also disclosed. The antenna module includes an RFIC package including one or more RF ICs (RFICs) supporting radio frequency (RF) communications. The antenna module also includes a package substrate including one or more metallization layers with metal interconnects formed for routing signals between the RFIC(s) and antenna(s) in the package substrate. The package substrate includes one or more patch antennas vertically integrated in the multiple metallization layers in the package substrate that electromagnetically behave as patch antennas. In one example, the patch antenna(s) are comprised of metal vias (e.g., elongated via bars) formed in via trenches across multiple adjacent, horizontally arranged metallization layers in the package substrate. The vias are interconnected through metal interconnects (e.g., metal lines, metal traces) formed in adjacent, horizontally arranged metallization layers. In this manner, the patch antenna(s) are formed as vertically integrated structures in a vertical plane in a planar package substrate using the manufacturing methods (e.g., microvia fabrication processes) used to fabricate metal interconnects and vias in the package substrate. The patch antenna(s) can be flexibly positioned in the package substrate and within the existing horizontally arranged metallization layers of the package substrate without necessarily having to provide additional metallization layers in the package substrate to support the additional antennas. The performance of the patch antenna(s) can be controlled by controlling the length and height of adjacent vias forming part of the patch antenna(s) in adjacent horizontal metallization layers of the package substrate and the spacing of such adjacent vias. The feed line(s) are formed in the metallization layer(s) of the package substrate and are electrically coupled to the RFIC package and the patch antenna(s).

[0006]

[0006] In another exemplary aspect, a vertical integrated patch antenna is formed as a generally planar structure. The patch antenna is formed by connecting a plurality of metal interconnects, each disposed in a separate metallization layer of a package substrate. The plurality of metal interconnects are connected together by vias that are generally elongated in a first horizontal direction such that when connected to the respective metal interconnects, a generally planar structure is formed in a vertical plane in a second vertical direction orthogonal to the first direction in the package substrate and can behave as a patch antenna, and thus be considered a patch antenna. For example, a patch antenna formed by vias that are generally elongated in a first horizontal direction and in the plane of the package substrate may be referred to as a "via bar". These via bars are bars in the sense that they are longer in one horizontal direction and narrower in another horizontal direction within a given metallization layer. Each via bar is formed in a via trench in a respective metallization layer that has a depth in a second vertical direction and is electrically coupled to adjacent via bars in adjacent metallization layers by intervening connected metal interconnects, thereby forming a single vertical trench-like structure in the package substrate. The resulting vertically integrated patch antenna may therefore be considered a "trench-shaped" patch antenna in the sense that it is a planar patch antenna, but integrated in the second vertical direction of the package substrate relative to the horizontal metallization layers of the package substrate. The exact shape and vertical aspect of the patch antenna will depend on the length of the vias in the horizontal direction. The patch antenna may be formed as a generally rectangular planar structure.

[0007]

[0007] In another exemplary aspect, a vertical integrated patch antenna (singular or plural) is formed in the package substrate, the vertical integrated patch antenna (singular or plural) extending in a first vertical plane in the package substrate such that its antenna radiation pattern extends in a second horizontal direction perpendicular to the vertical direction from a side of the package substrate. In another exemplary aspect, a plurality of patch antennas may be formed vertically in the package substrate and adjacent to each other in the package substrate to provide an antenna. One of the vertical integrated patch antennas may be electrically coupled to the RFIC package via a coupled feed line. The adjacent vertical integrated patch antennas are configured to be electromagnetically (EM) coupled to the other vertical integrated patch antenna connected by the feed line to radiate an RF signal transmitted by an RFIC in the RFIC package.

[0008]

[0008] In another exemplary aspect, the package substrate may include another patch antenna that is horizontally integrated in the package substrate by being horizontally disposed in the metallization layer(s) of the package substrate. The antenna radiation pattern of such another patch antenna extends in a vertical direction perpendicular to the antenna radiation pattern of the trench-shaped patch antenna(s) from the bottom of the package substrate. In this manner, the vertically integrated patch antenna(s) and the horizontally integrated patch antenna(s) in the package substrate provide antenna radiation coverage in multiple directions in the antenna module. For example, it may be important to provide additional antennas in the antenna module to support multi-directional RF reception and / or multiple input, multiple output (MIMO) communication, such as millimeter wave (mmWave) applications of the fifth generation (5G) new radio (NR) spectrum.

[0009]

[0009] In this regard, in one exemplary aspect, a package substrate is provided. The package substrate includes a plurality of first metallization layers parallel to each other (e.g., stacked on top of each other) in a first direction. The package substrate also includes a first patch antenna. The first patch antenna includes a plurality of first metal interconnects each disposed in a separate first metallization layer of the plurality of first metallization layers, each of the plurality of first metallization interconnects sharing a first common plane in a second direction orthogonal to the first direction. The first patch antenna also includes a plurality of first vias each disposed in a separate first metallization layer of the plurality of first metallization layers, each coupling adjacent first metal interconnects of the plurality of first metallization interconnects in adjacent first metallization layers of the plurality of first metallization layers. The package substrate also includes a first antenna feed line coupled to the first patch antenna.

[0010]

[0010] In another exemplary aspect, a method for manufacturing a package substrate is provided. The method includes forming a plurality of first metallization layers, where forming each first metallization layer of the plurality of first metallization layers includes forming a first dielectric layer, forming a first metal interconnect in the first dielectric layer, and forming a first via coupled to the first metal interconnect in the first dielectric layer. The method also includes forming a first antenna feedline. The method also includes coupling the multiple first metallization layers parallel to one another in the first direction such that each first metal interconnect in the multiple first metallization layers share a first common plane in a second direction orthogonal to the first direction and each first via in the multiple first metallization layers couples adjacent first metallization interconnects in adjacent first metallization layers of the multiple first metallization layers, where the first metal interconnects in each of the multiple first metallization layers coupled by the first vias in the multiple first metallization layers form a first patch antenna. The method also includes coupling a first antenna feedline to the first patch antenna.

[0011]

[0011] In another exemplary aspect, an IC package is provided. The IC package includes a package substrate. The package substrate includes a plurality of metallization layers parallel to each other in a first direction. The package substrate also includes a patch antenna. The patch antenna includes a plurality of metal interconnects each disposed in a separate metallization layer of the plurality of metallization layers, and each of the plurality of metal interconnects shares a first common plane in a second direction orthogonal to the first direction. The patch antenna also includes a plurality of vias each disposed in a separate metallization layer of the plurality of metallization layers, and each coupling adjacent ones of the plurality of metal interconnects in adjacent ones of the plurality of metallization layers. The package substrate also includes an antenna feedline coupled to the patch antenna. The IC package also includes an IC die layer coupled to the package substrate, the IC die including a plurality of die interconnects. The IC package also includes at least one die interconnect of the plurality of die interconnects coupled to the antenna feedline of the patch antenna. [Brief description of the drawings]

[0012] [Figure 1A]

[0012] These are side and bottom views, respectively, of an antenna module in the form of a radio frequency (RF) integrated circuit (IC) (RFIC) package including a package substrate supporting a patch antenna formed horizontally within a metallization layer of the package substrate. [Figure 1B] 1A and 1B are side and bottom views, respectively, of an antenna module in the form of a radio frequency (RF) integrated circuit (IC) (RFIC) package including a package substrate supporting a patch antenna formed horizontally within a metallization layer of the package substrate. [Diagram 2]

[0013] 1A-1C are respective side views of an exemplary antenna module including a package substrate with multiple vertically integrated patch antenna(s) integrated within vertically adjacent metallization layers within the package substrate. [Figure 3A]

[0014] 1A and 1B are side and bottom views, respectively, of an exemplary antenna module including a package substrate with multiple vertically integrated patch antenna(s) integrated within vertically adjacent metallization layers within the package substrate. [Figure 3B] 1A and 1B are side and bottom views, respectively, of an exemplary antenna module including a package substrate with multiple vertically integrated patch antenna(s) integrated within vertically adjacent metallization layers within the package substrate. [Figure 3C]

[0015] FIG. 3C is a side perspective view showing an exploded view of a patch antenna formed within the package substrate of FIGS. 3A and 3B. [Figure 3D]

[0016] FIG. 3C is a side view of a packaging substrate that may be provided in the antenna module of FIGS. 3A and 3B, showing a vertical integrated patch antenna extending completely vertically through the packaging substrate. [Figure 4]

[0017] FIG. 3C is a side view of an alternative packaging substrate that may be provided in the antenna module of FIGS. 3A and 3B, showing a vertical integrated patch antenna that extends partially vertically into the packaging substrate. [Figure 5A]

[0018] 1A and 1B are side and bottom views, respectively, of another exemplary antenna module including a package substrate with a patch antenna formed as two vertically integrated adjacent planar structures formed in adjacent metallization layers within the package substrate. [Figure 5B] 1A and 1B are side and bottom views, respectively, of another exemplary antenna module including a package substrate with a patch antenna formed as two vertically integrated adjacent planar structures formed in adjacent metallization layers within the package substrate. [Figure 5C]

[0019] FIG. 5C is a side perspective view showing an exploded view of a patch antenna formed within the package substrate of FIGS. 5A and 5B. [Figure 5D]

[0020] FIG. 5C is a side view of a packaging substrate that may be provided in the antenna module of FIGS. 5A and 5B, showing two vertically integrated planar structures extending completely vertically through the packaging substrate. [Figure 6]

[0021] FIG. 5C is a side view of a packaging substrate that may be provided in the antenna module of FIGS. 5A and 5B, showing two vertically integrated planar structures extending partially vertically into the packaging substrate. [Figure 7]

[0022] FIG. 5C is a bottom view of another package substrate that may be provided in an antenna module including a vertically integrated patch antenna disposed on an opposite elongated side of the package substrate opposite that of FIG. 5B. [Figure 8]

[0023] FIG. 13 is a bottom view of another packaging substrate that may be provided in an antenna module including vertically integrated patch antennas disposed on both elongated sides of the packaging substrate. [Figure 9A]

[0024] 9 is a side view of a packaging substrate that may be provided in the antenna module of FIG. 8, showing two vertically integrated patch antennas extending completely vertically through the packaging substrate. [Figure 9B]

[0025] 9 is a side view of a packaging substrate that may be provided in the antenna module of FIG. 8 , showing two vertically integrated patch antennas extending partially completely vertically into the packaging substrate. [Figure 10A]

[0026] 1A and 1B are side and bottom views, respectively, of another exemplary antenna module including a package substrate including a patch antenna formed as two vertically integrated adjacent planar structures formed in adjacent metallization layers therein and a horizontally integrated patch antenna formed in a metallization layer of the package substrate; [Figure 10B]1A and 1B are side and bottom views, respectively, of another exemplary antenna module including a package substrate including a patch antenna formed as two vertically integrated adjacent planar structures formed in adjacent metallization layers therein and a horizontally integrated patch antenna formed in a metallization layer of the package substrate; [Figure 10C]

[0027] FIG. 1C is a side perspective view showing an exploded view of a vertically integrated patch antenna formed within the package substrate of FIGS. 10A and 10B. [Figure 10D]

[0028] FIG. 14 is a side view of a package substrate that may be provided in the antenna module of FIGS. 10A and 10B, showing two vertically integrated planar structures that extend completely vertically through the package substrate and a horizontally integrated patch antenna formed in a metallization layer of the package substrate. [Figure 11]

[0029] FIG. 13 is a side view of a package substrate that may be provided in the antenna module of FIGS. 10A and 10B, showing two vertically integrated planar structures extending partially vertically into the package substrate and a horizontally integrated patch antenna formed in a metallization layer of the package substrate. [Figure 12]

[0030] FIG. 10C is a bottom view of another package substrate that may be provided in an antenna module including a vertically integrated patch antenna disposed on the opposite elongated side of the package substrate, opposite that of FIG. 10B. [Figure 13]

[0031] FIG. 13 is a bottom view of another package substrate that may be provided in an antenna module, including a patch antenna formed in a metallization layer and a vertically integrated patch antenna disposed on each side of the patch antenna on both respective elongated sides of the package substrate. [Figure 14A]

[0032] FIG. 14 is a side view of a package substrate that may be provided in the antenna module of FIG. 13, showing two vertical integrated patch antennas that extend completely vertically through the package substrate and a horizontal integrated patch antenna formed in a metallization layer of the package substrate. [Figure 14B]

[0033] FIG. 14 is a side view of a package substrate that may be provided in the antenna module of FIG. 13, showing two vertical integrated patch antennas extending completely through the package substrate and a horizontal integrated patch antenna formed in a metallization layer of the package substrate. [Figure 15]

[0034] 13 is a flowchart illustrating an exemplary manufacturing process for manufacturing a package substrate including a vertically integrated patch antenna(s), including a vertically integrated patch antenna in the package substrate of FIGS. 2-14B. [Figure 16A]

[0035] 10 is a flowchart illustrating another exemplary manufacturing process for manufacturing a package substrate including a vertical integrated patch antenna that extends completely vertically through the package substrate. [Figure 16B] 10 is a flowchart illustrating another exemplary manufacturing process for manufacturing a package substrate including a vertical integrated patch antenna that extends completely vertically through the package substrate. [Figure 17A]

[0036] 16C illustrates an exemplary manufacturing stage during the manufacture of a package substrate manufactured according to the exemplary manufacturing process of FIGS. 16A and 16B. [Figure 17B] 16C illustrates an exemplary manufacturing stage during the manufacture of a package substrate manufactured according to the exemplary manufacturing process of FIGS. 16A and 16B. [Figure 17C] 16C illustrates an exemplary manufacturing stage during the manufacture of a package substrate manufactured according to the exemplary manufacturing process of FIGS. 16A and 16B. [Figure 17D] 16C illustrates an exemplary manufacturing stage during the manufacture of a package substrate manufactured according to the exemplary manufacturing process of FIGS. 16A and 16B. [Figure 18A]

[0037] 5 is a flowchart illustrating another exemplary manufacturing process for manufacturing a package substrate including a vertical integrated patch antenna that extends completely vertically through the package substrate and a horizontal integrated patch antenna formed within a metallization layer of the package substrate. [Figure 18B] A flowchart showing another exemplary manufacturing process for manufacturing a package substrate, including a vertical integrated patch antenna that extends completely vertically through the package substrate and a horizontal integrated patch antenna formed within a metallization layer of the package substrate. [Figure 18C] A flowchart showing another exemplary manufacturing process for manufacturing a package substrate, including a vertical integrated patch antenna that extends completely vertically through the package substrate and a horizontal integrated patch antenna formed within a metallization layer of the package substrate. [Figure 19A]

[0038] Illustrative manufacturing stages during the manufacture of a package substrate manufactured according to the manufacturing process of FIGS. 18A - 18C are shown. [Figure 19B] Illustrative manufacturing stages during the manufacture of a package substrate manufactured according to the manufacturing process of FIGS. 18A - 18C are shown. [Figure 19C] Illustrative manufacturing stages during the manufacture of a package substrate manufactured according to the manufacturing process of FIGS. 18A - 18C are shown. [Figure 19D] Illustrative manufacturing stages during the manufacture of a package substrate manufactured according to the manufacturing process of FIGS. 18A - 18C are shown. [Figure 20]

[0039] A block diagram of an exemplary wireless communication device including RF components provided within one or more RFIC packages that employ a package substrate including one or more vertical integrated patch antennas, including but not limited to the package substrates of FIGS. 2 - 14B, FIGS. 17A - 17D, and FIGS. 19A - 19D, according to any of the manufacturing processes of FIGS. 15 - 16B and FIGS. 18A - 18C. [Figure 21]

[0040] FIG. 14 is a block diagram of an exemplary processor-based system including RF components provided in one or more RFIC packages employing a package substrate including one or more vertically integrated patch antennas according to any of the manufacturing processes of FIGS. 15-16B and 18A-18C, including but not limited to the package substrates of FIGS. 2-14B, 17A-17D, and 19A-19D. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013]

[0041] Some exemplary aspects of the present disclosure will now be described with reference to the drawings. The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any aspect described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects.

[0014]

[0042] Disclosed aspects include an antenna module employing a package substrate with vertically integrated patch antenna(s). Related manufacturing methods are also disclosed. The antenna module includes an RFIC package including one or more radio frequency (RF) ICs (RFICs) supporting RF communications. The antenna module also includes a package substrate including one or more metallization layers with metal interconnects formed for routing signals between the RFIC(s) and antenna(s) in the package substrate. The package substrate includes one or more patch antennas vertically integrated in multiple metallization layers in the package substrate that electromagnetically behave as patch antennas. In one example, the patch antenna(s) are comprised of metal vias ("vias") (e.g., elongated via bars) formed in via trenches spanning multiple adjacent horizontally arranged metallization layers in the package substrate. The vias are interconnected through metal interconnects (e.g., metal lines, metal traces) formed in adjacent horizontally arranged metallization layers. In this manner, the patch antenna(s) are formed as vertically integrated structures in a vertical plane in the package substrate, which is planar, such that the fabrication methods (e.g., microvia fabrication processes) used to fabricate the metal interconnects and vias in the package substrate form a planar structure. The patch antenna(s) can be flexibly positioned in the package substrate and within the existing horizontally arranged metallization layers of the package substrate, without necessarily having to provide additional metallization layers in the package substrate to support the additional antennas. The performance of the patch antenna(s) can be controlled by controlling the length and height of adjacent vias forming part of the patch antenna(s) in adjacent horizontal metallization layers of the package substrate, and the spacing of such adjacent vias. The feed line(s) are formed in the metallization layer(s) of the package substrate, and are electrically coupled to the RFIC package and the patch antenna(s).

[0015]

[0043] In another exemplary embodiment, a vertical integrated patch antenna is formed as a generally planar structure. The patch antenna is formed by connecting a plurality of metal interconnects, each disposed in a separate metallization layer of a package substrate. The plurality of metal interconnects are connected together by vias that are generally elongated in a first horizontal direction such that when connected to the respective metal interconnects, a generally planar structure is formed in a vertical plane in a second vertical direction orthogonal to the first direction in the package substrate and can behave as a patch antenna, and thus be considered a patch antenna. For example, a patch antenna formed by vias that are generally elongated in a first horizontal direction and in the plane of the package substrate may be referred to as a "via bar". These via bars are bars in the sense that they are longer in one horizontal direction and narrower in another horizontal direction within a given metallization layer. Each via bar is formed in a via trench in a respective metallization layer that has a depth in a second vertical direction and is electrically coupled to adjacent via bars in adjacent metallization layers by intervening connected metal interconnects, thereby forming a single vertical trench-like structure in the package substrate. The resulting vertically integrated patch antenna may therefore be considered a "trench-shaped" patch antenna in the sense that it is a planar patch antenna, but integrated in the second vertical direction of the package substrate relative to the horizontal metallization layers of the package substrate. The exact shape and vertical aspect of the patch antenna will depend on the length of the vias in the horizontal direction. The patch antenna may be formed as a generally rectangular planar structure.

[0016]

[0044] Before discussing IC packages that include a package substrate that includes one or more vertically integrated patch antennas disposed within the package substrate to support RF communications, an IC package in the form of an RFIC package 101 that does not include a vertically integrated patch antenna within its package substrate will first be described with reference to Figures 1A and 1B. An example of an IC package that includes a package substrate that includes one or more vertically integrated patch antennas disposed within the package substrate to support RF communications will be discussed below beginning with Figure 2.

[0017]

[0045] 1A and 1B are side and bottom views, respectively, of an antenna module 100 including an antenna substrate 102 supporting patch and dipole antenna elements to support RF communications. The antenna module 100 is provided in the form of an RFIC package 101. As shown in FIG. 1A, the antenna module 100 includes an IC die layer 106 including an RFIC 108 arranged in a horizontal XY horizontal plane and including an encapsulated RF transceiver IC(s). The RFIC 108 may also include a power management IC (PMIC). The IC die layer 106 is mounted to a package substrate 110 that provides a support structure for the IC die layer 106 and also provides an interconnect structure that couples the RFIC 108 to other components and circuits in the antenna module 100. An electromagnetic interference (EMI) shield 109 is disposed around the RFIC 108 and other components in the IC die layer 106. In this example, the package substrate 110 includes a metallization substrate 112 adjacent to the IC die layer 106. The metallization substrate 112 includes a plurality of substrate metallization layers 114 each including metal interconnects 116 (e.g., pads, vertical interconnect access (vias), traces, lines) formed therein to provide an interconnect structure facilitating an interconnection providing an electrical interface between the RFIC 108 and other components and circuits in the antenna module 100. The die interconnects 118 couple the RFIC 108 to the metal interconnects 116 in the metallization substrate 112. The metallization substrate 112 may be a coreless substrate. The substrate metallization layers 114 may be formed as separate substrate layers laminated together to form the metallization substrate 112. One or more of the substrate metallization layers 114 may be formed as redistribution layers (RDLs). In this example, the metallization substrate 112 is coupled to a core substrate 120 as part of the package substrate 110.A core substrate, such as core substrate 120, is a substrate that is typically thicker and made from a stiff dielectric material to prevent or reduce warping of antenna module 100. Core substrate 120 also includes one or more metallization layers 122 that include metal interconnects 124 coupled to metal vias 126 ("vias 126") that are coupled to metal interconnects 116 in adjacent metallization substrates 112 to provide electrical connectivity between metallization substrate 112 and core substrate 120.

[0018]

[0046] 1A, the package substrate 110 in the antenna module 100 also includes an antenna substrate 102. The antenna substrate 102 is coupled to the core substrate 120 such that the core substrate 120 is disposed between the antenna substrate 102 and the metallization substrate 112 in a first vertical Z-axis direction. The antenna substrate 102 also includes one or more metallization layers 128 including metal interconnects 130 coupled to metal vias 132 "vias 132" coupled to metal interconnects 124 in the core substrate 120. The antenna substrate 102 includes four patch antenna elements 134(1)-134(4) in this example, electrically coupled to the RFIC 108 via interconnects between the respective metallization substrate 112, the core substrate 120, and the metal interconnects 116, 124, 130 in the antenna substrate 102. In this example, each patch antenna element 134(1)-134(4) includes a first patch antenna element 136(1)-136(4) adjacent to the core substrate 120 and a second patch antenna element 138(1)-138(4) disposed adjacent to each of the first patch antenna elements 136(1)-136(4). The second patch antenna elements 138(1)-138(4) are configured to be electromagnetically (EM) coupled to the first patch antenna elements 136(1)-136(4) to radiate RF signals distributed to the first patch antenna elements 136(1)-136(4).

[0019]

[0047] As shown in FIG. 1A and FIG. 1B, the second patch antenna elements 138(1)-138(4) are low-profile structures having respective radiation pattern directions 140(1)-140(4) primarily in the second X-axis direction within the antenna module 100. However, the patch antenna elements 134(1)-134(4) do not provide radiation patterns directed in the Y-axis or Z-axis directions of the antenna module 100. Thus, this arrangement may require additional antenna elements to be disposed in other regions of the antenna module 100, not shown, to provide the desired RF directivity performance. However, this may come at the expense of increasing the size and complexity of the antenna module 100, which may be undesirable or infeasible for some applications. Also, if the antenna module 100 is used for multiple-input multiple-output (MIMO) communication applications, further additional antennas must be provided within the antenna module 100 to support multiple MIMO signal streams, thus further increasing the package size of the antenna module 100 in an undesirable manner.

[0020]

[0048] In this regard, FIG. 2 is a side view of an exemplary antenna module 200 including a package substrate 202 including multiple vertically integrated patch antennas 204(1)-204(4). The trench-shaped patch antennas 204(1)-204(4) are planar structures in a first vertical plane in the X-axis and Z-axis directions that are vertically integrated in a first vertical direction (Z-axis direction) in adjacent metallization layers in the package substrate 202 to support RF communications in this example. The patch antennas 204(1)-204(4) are planar structures that behave electromechanically as patch antennas. The patch antennas 204(1)-204(4) are configured to radiate RF signals. As an example, the patch antennas 204(1)-204(4) may be designed for RF signals in the fifth generation (5G) new radio (NR) (5G NR) spectrum. For example, these frequencies may include millimeter (mm) wave (mmWave) frequencies. Examples of frequencies in the 5G spectrum include, but are not limited to, 410 MegaHertz (MHz) to 7.125 GigaHertz (GHz) and frequencies within the spectrum range of 24.25-86 GHz, with the lower 19.25 GHz (24.25-43.5 GHz) being more likely to be used by mobile devices.

[0021]

[0049] In this example, the patch antennas 204(1)-204(4) are vertically disposed in a vertical direction (Z-axis direction) within and through a first metallization layer 206(1) in the package substrate 202. The metallization layer 206(1) is, in this example, disposed in a second horizontal direction (X-axis direction and Y-axis direction) orthogonal to the first vertical direction (Z-axis direction) in a horizontal plane in the X-axis direction and Y-axis direction. In this example, the patch antennas 204(1)-204(4) are also vertically disposed in a vertical direction (Z-axis direction) within and through a core substrate 208 and a second metallization layer 206(2) of the package substrate 202, which are both similarly disposed horizontally in a horizontal plane in the X-axis direction and Y-axis direction. A core substrate, such as the core substrate 208, is a substrate that is typically thicker and made of a stiffer dielectric material to prevent or reduce warping of the antenna module 200. Patch antennas 204(1)-204(4) are coupled through respective antenna feeds 210(1)-210(4) to die interconnects 212(1), 212(2) of one or more RFICs 214(1), 214(2) in IC die layer 216, which include RF transceiver circuits supporting RF communications. In this regard, antenna module 200 may be considered an RFIC package. The radiation patterns of each patch antenna 204(1)-204(4) lie in first and second horizontal directions 218(1)-218(4) in the Y-axis direction due to their vertical orientation in the vertical direction (Z-axis direction) and the nature of their planar structure in the X-axis and Z-axis directions. Thus, patch antennas 204(1)-204(4) may be formed within package substrate 202 to provide this antenna radiation pattern to provide receive antenna coverage in first and second horizontal directions 218(1)-218(4), with or without other antennas. Note that in this example, four patch antennas 204(1)-204(4) are included within antenna module 200, but are not so limited.

[0022]

[0050] As discussed in more detail below, the first and second metallization layers 206(1), 206(2) in the antenna module 200 of FIG. 2 each include metal interconnects 220(1), 220(2) formed therein for routing signals between the RFICs 214(1), 214(2) and the package substrate 202. As discussed in more detail below, in some examples, the patch antennas 204(1)-204(4) are formed by adjacent interconnected vias and metal interconnects 220(1), 220(2), each disposed in a separate metallization layer of the first and second metallization layers 206(1), 206(2), that are connected together through metal posts 222 in the core substrate 208. The interconnected vias and metal interconnects 220(1), 220(2) in the first and second metallization layers 206(1), 206(2), connected together through metal posts 222 in the core substrate 208, form respective planar structures as patch antennas 204(1)-204(4). In this manner, patch antennas 204(1)-204(4) may be formed as vertically integrated structures in the package substrate 202 using the manufacturing methods (e.g., microvia manufacturing processes) used to fabricate the metal interconnects and vias in the package substrate. The performance of patch antennas 204(1)-204(4) may be controlled by controlling the length and height of the vias and adjacent coupled metal interconnects in the first and / or second metallization layers 206(1), 206(2). Patch antennas 204(1)-204(4) may be flexibly positioned within package substrate 202 and within existing metallization layers within first and / or second metallization layers 206(1), 206(2) of package substrate 202, without necessarily having to provide additional metallization layers dedicated to supporting the additional antennas, as in antenna module 100 of FIGS. 1A and 1B.

[0023]

[0051] 3A and 3B are side and bottom views, respectively, of the antenna module 200 of FIG. 2 showing additional details. The patch antennas 204(1)-204(4) in the antenna module 200 of FIG. 3A are shown in the bottom view of the antenna module 200 of FIG. 3B. The radiation patterns of the patch antennas 204(1)-204(4) are shown in the bottom view of the package substrate 202 of FIG. 3B as first and second horizontal directions 218(1)-218(4) in the Y-axis direction due to the vertical orientation of the patch antennas 204(1)-204(4) in the vertical direction (Z-axis direction) and the nature of their planar structures in the X-axis and Z-axis directions. The patch antennas 204(1)-204(4) are shown in the second metallization layer 206(2) of the package substrate 202 of FIG. 3B. FIG. 3A is a side view taken along section line A1-A1′ of FIG. 3B. 3C is a side perspective view illustrating an exploded view of one patch antenna 204 formed in the package substrate 202 of FIGs. 3A and 3B. As shown in FIG. 3C and described in more detail below, in this example, the patch antenna 204 is formed by a plurality of via bars 300 formed in respective adjacent metallization layers in the package substrate 202 and interconnected by metal interconnects 220 in the respective metallization layers. In this manner, the patch antennas 204(1)-204(2) may be formed as a vertically integrated structure in the package substrate 202 using the manufacturing method (e.g., a microvia manufacturing process) used to fabricate the metal interconnects and vias in the package substrate.

[0024]

[0052] FIG. 3D is a side view of the package substrate 202 in the antenna module 200 of FIG. 3A-3B showing an example of the patch antennas 204(1)-204(4). The package substrate 202 in FIG. 3D is a side cross-sectional view taken along the A2-A2′ cross-sectional line in the antenna module 200 of FIG. 3B. Thus, the side view of the package substrate 202 in FIG. 3D shows only one patch antenna 204 among the patch antennas 204(1)-204(4) from the side. As shown in FIG. 3D, the first metallization layer 206(1) includes multiple metallization layers 302(1)-302(6) that are parallel to each other in the horizontal directions (X-axis direction and Y-axis direction) in their respective horizontal planes. The second metallization layer 206(2) also includes multiple metallization layers 304(1)-304(6) that are parallel to each other (e.g., stacked on top of each other) in the horizontal directions (X-axis direction and Y-axis direction) in their respective horizontal planes. Metallization layers 302(6), 304(6) are the outer metallization layers of package substrate 202. A first metallization layer 206(1) is bonded to core substrate 208, with metallization layer 302(1) bonded directly to core substrate 208. A second metallization layer 206(2) is also bonded to core substrate 208, with metallization layer 304(1) bonded directly to core substrate 208. In this regard, core substrate 208 is disposed between first metallization layer 206(1) and second metallization layer 206(2).

[0025]

[0053] Metallization layers 302(1)-302(6) in first metallization layer 206(1) each include a dielectric layer 303(1)-303(6) made from a dielectric material and one or more metal interconnects 306 (e.g., metal lines, metal traces, metal posts) formed therein. Metal interconnects 306 may be coupled to each other in adjacent metallization layers 302(1)-302(6) by metal vias 308 ("vias 308") to form signal routing paths in first metallization layer 206(1) to die interconnects 212(1), 212(2) of RFICs 214(1), 214(2) of FIG. 3A. The patch antenna 204 is formed from a plurality of other metal interconnects 310 (e.g., metal lines, metal traces, metal posts) formed in one or more dielectric layers 303(1)-303(6) of respective separate metallization layers 302(1)-302(6) in the first metallization layer 206(1) that are aligned in the vertical direction (Z-axis direction) and share a common vertical plane P1 in the vertical direction (Z-axis direction) (in the X-axis direction and the Z-axis direction). The metal interconnects 310 in adjacent metallization layers 302(1)-302(6) are coupled to each other by metal vias 312 ("vias 312") disposed in each adjacent metallization layer 302(1)-302(6). The metal interconnects 310 are arranged parallel to each other in the horizontal directions (X-axis direction and Y-axis direction). In this manner, the metal interconnects 310 connected by the vias 312 form a vertically integrated planar metal structure within the first metallization layer 206(1) that forms part of the patch antenna 204.

[0026]

[0054] In this example, patch antenna 204 also includes a vertical planar structure formed from a plurality of metal interconnects 314 (e.g., metal lines, metal traces, metal posts) formed in one or more dielectric layers 305(1)-305(6) of respective separate metallization layers 304(1)-304(6) in second metallization layer 206(2) that are vertically aligned (in the Z-axis direction) and share a common vertical plane P1. Metallization layers 304(1)-304(6) in second metallization layer 206(2) each include a dielectric layer 305(1)-305(6) made from a dielectric material and one or more metal interconnects 314 (e.g., metal lines, metal traces, metal posts) formed therein. The metal interconnects 314 in adjacent metallization layers 304(1)-304(6) are coupled to one another by metal vias ("vias 316") disposed in each adjacent metallization layer 304(1)-304(6). The metal interconnects 314 are disposed parallel to one another in the horizontal directions (X-axis and Y-axis directions). In this manner, the metal interconnects 314 connected by the vias 316 form a vertically integrated planar metal structure in the second metallization layer 206(2) that forms part of the patch antenna 204. The core substrate 208 includes metal posts 318 coupled to the metal interconnects 310 in the metallization layer 302(1) in the first metallization layer 206(1) and to the metal interconnects 314 in the metallization layer 304(1) in the second metallization layer 206(2) to form part of the patch antenna 204.

[0027]

[0055] In this manner, in this example, metal interconnects 310 interconnected by respective vias 312 in first metallization layer 206(1), metal interconnects 314 interconnected by respective vias 316 in second metallization layer 206(2), and metal post 318 form patch antenna 204. In this regard, since patch antenna 204 is formed from interconnected metal interconnects 310, 314 and vias 312, 316 in metallization layers 206(1), 206(2) and metal post 318 in core substrate 208, the fabrication techniques used to fabricate metal interconnects 306 and vias 308 in package substrate 202 may be used to form patch antenna 204 in package substrate 202. In this example, patch antenna 204 extends completely through all layers of package substrate 202 in this example of FIG. 3D. Patch antenna 204, in this example, extends vertically (in the Z-axis direction) through each of metallization layers 302(1)-302(6) in first metallization layer 206(1), through each of metallization layers 304(1)-304(6) in second metallization layer 206(2), and through core substrate 208. In this example, metal interconnect 320 formed in solder resist layer 322 (as another metallization layer) disposed on metallization layer 302(6) of first metallization layer 206(1) serves as antenna feed 324 to patch antenna 204. The die interconnects 212(1), 212(2) of the RFICs 214(1), 214(2) in the antenna module of FIG. 3A may be coupled to a metal interconnect 320 as an antenna feed 324 to couple the RFICs 214(1), 214(2) to the patch antenna 204 to function as an antenna for the RFICs 214(1), 214(2).

[0028]

[0056] 3C and 3D, the vertical integrated patch antenna 204 is formed as a generally planar structure, in this example a rectangular structure, in the X-axis and Z-axis directions. As discussed above, the patch antenna 204 is formed by connecting a plurality of metal interconnects 310, 314, each disposed within a separate metallization layer 302(1)-302(6), 304(1)-304(6) of the package substrate 202. In this example, the plurality of metal interconnects 310, 314 are connected together by respective vias 312, 316, which are generally elongated in the horizontal direction (X-axis direction) forming a via bar 300, such that when connected to the respective metal interconnects 310, 314, the patch antenna 204 is formed as a generally planar structure in the X-axis and Y-axis planes in the vertical plane P1 in the package substrate 202 and can behave as a patch antenna, and thus be considered a patch antenna. The via bars 300 are bars in the sense that they are longer in one horizontal direction (X-axis direction) and narrower in another horizontal direction (Y-axis direction) within that metallization layer 302(1)-302(6), 304(1)-304(6). Each via bar 300 has a depth in the vertical direction (Z-axis direction) and is formed within a via trench within a respective metallization layer 302(1)-302(6), 304(1)-304(6) that is electrically coupled to adjacent via bars 300 in adjacent metallization layers 302(1)-302(6), 304(1)-304(6) by intervening connected metal interconnects 310, 314, thereby forming a single vertical trench-like structure within the package substrate 202. Thus, the resulting vertically integrated patch antenna 204 may be considered a "trench-shaped" patch antenna in the sense that it is a planar patch antenna, but is integrated vertically (in the Z-axis direction) of the package substrate 202 relative to the horizontal metallization layers 302(1)-302(6), 304(1)-304(6) of the package substrate 202. The elongated vias 312, 316 each include a trench.The exact shape and vertical plane P1 of the patch antenna 204 will depend on the horizontal (X-axis) length of the vias 312, 316. The patch antenna 204 is formed as a generally rectangular planar structure in this example.

[0029]

[0057] It should be noted that in another exemplary embodiment, the metal interconnects 310 interconnected by respective vias 312 in the first metallization layer 206(1) as part of the patch antenna 204 may not extend into the core substrate 208 and / or the second metallization layer 206(2). The formed patch antenna may not include the metal interconnects 314 interconnected by respective vias 316 in the second metallization layer 206(2). Thus, in this alternative embodiment, the metal interconnects 310 interconnected by respective vias 312 in the first metallization layer 206(1) will form a first patch antenna in the package substrate 202. The metal interconnects 314 interconnected by respective vias 316 in the second metallization layer 206(2) will form a second separate patch antenna in the package substrate 202. Thus, the metal posts 318 shown in the core substrate 208 interconnecting the metal interconnects 310 that are interconnected by respective vias 312 in the first metallization layer 206(1) may not be included to form a single patch antenna, such as the patch antenna 204 of FIG. 3D.

[0030]

[0058] In this regard, FIG. 4 is a side view of an alternative package substrate 202A that may be provided as the package substrate 202 in the antenna module 200 of FIGS. 3A-3B. The package substrate 202A includes an alternative patch antenna 204A that is vertically integrated in the vertical direction (Z-axis direction) and disposed only in the first metallization layer 206(1) of the package substrate 202A. Common elements between the package substrate 202 in FIG. 3D and the package substrate 202A in FIG. 4 are indicated by common element numbers. Thus, the discussion of these common elements in FIG. 3D is also applicable to the package substrate 202A in FIG. 4. The package substrate 202A in FIG. 4 is a side cross-sectional view taken along the A2-A2′ cross-section line in the antenna module 200 of FIG. 3B. Thus, only one vertically integrated patch antenna 204A is shown from the side in the side view of the package substrate 202A in FIG. 4.

[0031]

[0059] As shown in FIG. 4, the first metallization layer 206(1) includes multiple metallization layers 302(1)-302(6) that are parallel to one another (e.g., stacked on top of one another) in horizontal directions (X-axis and Y-axis directions) within respective horizontal planes, like the package substrate 202 of FIG. 3D. As provided in package substrate 202 of FIG. 3D , dielectric layers 303(1)-303(6) of metallization layers 302(1)-302(6) in first metallization layer 206(1) of package substrate 202A of FIG. 4 include metal interconnects 306 (e.g., metal lines, metal traces, metal posts) that are coupled to each other in adjacent metallization layers 302(1)-302(6) by vias 308 to form signal routing paths in first metallization layer 206(1) to die interconnects 212(1), 212(2) of RFICs 214(1), 214(2) of FIG. 3A . Patch antenna 204A is formed from a plurality of other metal interconnects 310 (e.g., metal lines, metal traces, metal posts) in dielectric layers 303(1)-303(6) of one or more respective separate metallization layers 302(1)-302(6) in first metallization layer 206(1) that are aligned vertically (Z-axis direction) and share a common vertical plane P1. Metal interconnects 310 in adjacent metallization layers 302(1)-302(6) are coupled to each other by vias 312 disposed in each adjacent metallization layer 302(1)-302(6). Metal interconnects 310 are disposed parallel to each other horizontally (X-axis direction and Y-axis direction). In this manner, metal interconnects 410 connected by metal vias 412 (“vias 412”) form a vertically integrated planar metal structure within first metallization layer 206(1), which in this example forms patch antenna 204A.

[0032]

[0060] In this manner, in this example, the metal interconnects 310 interconnected by respective vias 312 in the first metallization layer 206(1) form the patch antenna 204A. Thus, the patch antenna 204A does not extend into the core substrate 208 or into the second metallization layer 206(2) of the package substrate 202A in this example of FIG. 4. As in the package substrate 202 of FIG. 3D, the metal interconnect 320 formed as part of the solder resist layer 322 disposed on the metallization layer 302(6) of the first metallization layer 206(1) can function as an antenna feed 324 to the patch antenna 204. The die interconnects 212(1), 212(2) of the RFICs 214(1), 214(2) in the antenna module 200 of FIG. 3A may be coupled to a metal interconnect 320 as an antenna feedline 324 to couple the RFICs 214(1), 214(2) to the patch antenna 204.

[0033]

[0061] 4, the vertical integrated patch antenna 204A is formed as a generally planar structure, in this example a rectangular structure, in the X-axis and Z-axis directions. As discussed above, the patch antenna 204A is formed by connecting a plurality of metal interconnects 310, each disposed within a separate metallization layer 302(1)-302(6) of the package substrate 202A. In this example, the plurality of metal interconnects 310 are connected together by respective vias 312 that are generally elongated in the horizontal direction (X-axis direction) forming a via bar such that when connected to the respective metal interconnects 310, the patch antenna 204A is formed as a generally planar structure in the X-axis and Y-axis planes in the vertical plane P1 in the package substrate 202 and can behave as a patch antenna, and thus be considered a patch antenna. The patch antennas 204A are via bars in the sense that they are longer in one horizontal direction (X-axis direction) and narrower in another horizontal direction (Y-axis direction) within their metallization layers 302(1)-302(6). The via bars of the patch antennas 204A are formed within via trenches in each metallization layer 302(1)-302(6) that have depth in the vertical direction (Z-axis direction) and are electrically coupled to adjacent vias 312 in adjacent metallization layers 302(1)-302(6) by intervening connected metal interconnects 310, thereby forming a single vertical trench-like structure within the package substrate 202A. The resulting vertically integrated patch antenna 204A may thus be considered a "trench-shaped" patch antenna in the sense that it is a planar patch antenna, but is integrated vertically (Z-axis direction) within the package substrate 202A relative to the horizontal metallization layers 302(1)-302(6) of the package substrate 202. Each of the elongated vias 312 includes a trench. The exact shape and vertical plane P1 of the patch antenna 204A will depend on the length of the vias 312 in the horizontal direction (X-axis direction). The patch antenna 204A is formed as a generally rectangular planar structure in this example.

[0034]

[0062] 4 may be provided such that patch antenna 204 is provided in second metallization layer 206(2) and not in first metallization layer 206(1). In this regard, as shown in package substrate 202 of FIG. 3D, in this alternative embodiment, patch antenna 204 would be formed from a plurality of other metal interconnects 314 (e.g., metal lines, metal traces, metal posts) in dielectric layers 305(1)-305(6) of respective separate metallization layers 304(1)-304(6) in second metallization layer 206(2) that are vertically aligned (in the Z-axis direction) and share a common vertical plane P1.

[0035]

[0063] In another exemplary embodiment, a vertically integrated patch antenna(s) may be formed in the package substrate extending in a first vertical plane within the package substrate such that its antenna radiation pattern exits a side of the package substrate in a second horizontal direction perpendicular to the vertical direction. In another exemplary embodiment, multiple trench-shaped patch antennas may be formed vertically adjacent to each other within the package substrate to provide an antenna. One of the trench-shaped patch antennas may be electrically coupled to the RFIC package via a coupled feed line. The adjacent trench-shaped patch antennas are configured to be electromagnetically (EM) coupled to the trench-shaped patch antenna connected by the feed line to radiate an RF signal transmitted by an RFIC in the RFIC package.

[0036]

[0064] In an alternative embodiment, the first and second vertically integrated patch antennas may be vertically integrated within a package substrate, such as the package substrate 202 of FIG. 2, and positioned vertically adjacent to one another such that the first and second patch antennas are EM coupled to one another when receiving radiated RF signals. In this manner, the antenna feed may be coupled only to the first patch antenna. The second patch is positioned sufficiently close to the first patch antenna to EM couple RF signals received by the first patch antenna from the antenna feed, which radiates from the package substrate. This is illustrated in the exemplary antenna module 500 of FIGS. 5A-5D, which will now be described.

[0037]

[0065] In this regard, FIG. 5A is a side view of an exemplary antenna module 500 including a package substrate 502 that includes multiple patch antennas 504(1)(1)-504(1)(4) and 504(2)(1)-504(2)(4). The patch antennas 504(1)(1)-504(1)(4) and 504(2)(1)-504(2)(4), which are planar structures, behave as patch antennas. As discussed in more detail below, each patch antenna 504(2)(1)-504(2)(4) is configured to be EM coupled to a respective adjacent patch antenna 504(1)(1)-504(1)(4) when the patch antennas 504(2)(1)-504(2)(4) are energized with a received RF signal. Patch antennas 504(1)(1)-504(1)(4) then radiate RF signals away from package substrate 502. Patch antennas 504(1)(1)-504(1)(4) and 504(2)(1)-504(2)(4) are planar structures in the X- and Z-directions vertically integrated in the vertical direction (Z-direction) within adjacent metallization layers in package substrate 502 to support RF communications. The radiation patterns of patch antennas 504(1)(1)-504(1)(4) and 504(2)(1)-504(2)(4) are shown in first and second horizontal directions 518(1)-518(4) in the Y-direction due to their vertical orientation in the vertical direction (Z-direction) and the nature of their planar structures in the X- and Z-directions. As an example, patch antennas 504(1)(1) through 504(1)(4) and 504(2)(1) through 504(2)(4) may be designed for millimeter wave (mmWave) reception, including RF signals in the fifth generation (5G) new radio (NR) spectrum.

[0038]

[0066] In this example, patch antennas 504(1)(1)-504(1)(4) and 504(2)(1)-504(2)(4) are vertically disposed in a vertical direction (Z-axis direction) within and through a first metallization layer 506(1) in package substrate 502. Metallization layer 506(1) is horizontally disposed in a horizontal plane in the X-axis and Y-axis directions in this example. In this example, patch antennas 504(1)(1)-504(1)(4) and 504(2)(1)-504(2)(4) are also vertically disposed in a vertical direction (Z-axis direction) within and through core substrate 508 and second metallization layer 506(2) of package substrate 502, which are both similarly horizontally disposed in a horizontal plane in the X-axis and Y-axis directions. Patch antennas 504(1)(1)-504(1)(4), 504(2)(1)-504(2)(4) are coupled through respective antenna feedlines 510(1)(1)-510(1)(4), 510(2)(1)-510(2)(4) to die interconnects 512(1), 512(2) of one or more RFICs 514(1), 514(2) in IC die layer 516, which contain RF transceiver circuitry supporting RF communications. A core substrate, such as core substrate 508, is a substrate that is typically thicker and made from a stiff dielectric material to prevent or reduce warping of antenna module 500. In this regard, antenna module 500 may be considered an RFIC package. The radiation patterns of patch antennas 504(1)(1)-504(1)(4) are shown in first and second horizontal directions 518(1)-518(4) in the Y-axis direction due to their vertical orientation in the vertical direction (Z-axis direction) and the nature of their planar structure in the X-axis and Z-axis directions. Patch antennas 504(1)(1)-504(1)(4), 504(2)(1)-504(2)(4) may be formed within package substrate 502 to provide this antenna radiation pattern, with or without other antennas, to provide receive antenna coverage in first and second horizontal directions 518(1)-518(4).

[0039]

[0067] As discussed in more detail below, the first and second metallization layers 506(1), 506(2) in the antenna module 500 of FIG. 5A each include metal interconnects 520(1), 520(2) formed therein for routing signals between the RFICs 514(1), 514(2) and the package substrate 502. As discussed in more detail below, in some examples, the patch antennas 504(1)(1) through 504(1)(4), 504(2)(1) through 504(2)(4) are formed by adjacent interconnected metal vias ("vias") and metal interconnects 520(1), 520(2) in the first and second metallization layers 506(1), 506(2) that are connected together through metal posts 522 in the core substrate 508. In this manner, patch antennas 504(1)(1) through 504(1)(4), 504(2)(1) through 504(2)(4) may be formed as vertically integrated structures in package substrate 502 using the fabrication methods (e.g., microvia fabrication processes) used to fabricate metal interconnects and vias in the package substrate. The performance of patch antennas 504(1)(1) through 504(1)(4), 504(2)(1) through 504(2)(4) may be controlled by controlling the length and height of the vias and adjacent coupled metal interconnects in first and / or second metallization layers 506(1), 506(2). Patch antennas 504(1)(1)-504(1)(4), 504(2)(1)-504(2)(4) may be flexibly positioned within existing metallization layers within package substrate 502 and within first and / or second metallization layers 506(1), 506(2) of package substrate 502, without necessarily having to provide additional metallization layers dedicated to supporting the additional antennas, as in antenna module 100 of FIGS. 1A and 1B.

[0040]

[0068] Patch antennas 504(1)(1) through 504(1)(4), 504(2)(1) through 504(2)(4) in antenna module 500 of Figure 5A are shown in a bottom view of antenna module 500 in Figure 5B. Patch antennas 504(1)(1) through 504(1)(4), 504(2)(1) through 504(2)(4) are shown in second metallization layer 506(2) of package substrate 502 in Figure 5B. Figure 5A is a side view taken along section line A4-A4' in Figure 5B. The radiation patterns of patch antennas 504(1)(1)-504(1)(4), 504(2)(1)-504(2)(4) are shown in the bottom view of package substrate 502 in Figure 5B as first and second horizontal directions 518(1)-518(4) in the Y-axis direction due to the vertical orientation of patch antennas 204(1)-204(4) in the vertical direction (Z-axis direction) and the nature of their planar structures in the X-axis and Z-axis directions. Figure 5C is a side perspective view showing an exploded view of two adjacent patch antennas 504(1), 504(2) formed within package substrate 502 in Figures 5A and 5B. 5C and described in more detail below, in this example, patch antennas 504(1), 504(2) are each formed by a plurality of via bars 523(1), 523(2) formed in respective adjacent metallization layers in package substrate 502 and interconnected by respective metal interconnects 520(1), 520(2) in the respective metallization layers. In this manner, patch antennas 504(1), 504(2) may be formed as vertically integrated structures in package substrate 502 using the manufacturing methods (e.g., microvia manufacturing processes) used to fabricate the metal interconnects and vias in the package substrate.

[0041]

[0069] FIG. 5D is a side view of the package substrate 502 in the antenna module 200 of FIG. 3A-FIG. 3B showing an example of patch antennas 504(1)(1)-504(1)(4) and 504(2)(1)-504(2)(4). The package substrate 502 in FIG. 5D is a side cross-sectional view taken along the A5-A5′ cross-sectional line in the antenna module 500 in FIG. 5B. Thus, only two patch antennas 504(1) and 504(2) are shown from the side in the side view of the package substrate 502 in FIG. 5D. In this example, the patch antennas 504(1) and 504(2) may be any of the respective pairs of patch antennas 504(1)(1)-504(1)(4) and 504(2)(1)-504(2)(4) in the package substrate 502 in FIG. 5B. As shown in FIG. 5D , the first metallization layer 506(1) includes multiple metallization layers 532(1)-532(6) that are parallel to each other (e.g., stacked on top of each other) in the horizontal directions (X-axis and Y-axis directions) in their respective horizontal planes. The second metallization layer 506(2) also includes multiple metallization layers 534(1)-534(6) that are parallel to each other in the horizontal directions (X-axis and Y-axis directions) in their respective horizontal planes. The metallization layers 532(6), 534(6) are the outer metallization layers of the package substrate 502. The first metallization layer 506(1) is bonded to the core substrate 508 with the metallization layer 532(1) being bonded directly to the core substrate 508. The second metallization layer 506(2) is also bonded to the core substrate 508 with the metallization layer 534(1) being bonded directly to the core substrate 508. In this regard, the core substrate 508 is disposed between a first metallization layer 506(1) and a second metallization layer 506(2).

[0042]

[0070] Metallization layers 532(1)-532(6) in first metallization layer 506(1) include respective metal interconnects 536 (e.g., metal lines, metal traces, metal posts) formed in dielectric layers 503(1)-503(6). Metal interconnects 536 are coupled to each other in adjacent metallization layers 532(1)-532(6) by metal vias 538 ("vias 538") to form signal routing paths in first metallization layer 506(1) to die interconnects 512(1), 512(2) of RFICs 514(1), 514(2) in FIG. 5A. Patch antennas 504(1), 504(2) are formed from a plurality of other metal interconnects 540(1), 540(2) (e.g., metal lines, metal traces, metal posts) in dielectric layers 503(1)-503(6) in respective separate metallization layers 532(1)-532(6) in first metallization layer 506(1) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P2, P3 in the X-axis and Z-axis directions. Respective metal interconnects 540(1), 540(2) in adjacent metallization layers 532(1)-532(6) are coupled to each other by respective metal vias ("vias") 542(1), 542(2) disposed in respective adjacent metallization layers 532(1)-532(6). Respective metal interconnects 540(1), 540(2) are arranged parallel to one another in the horizontal directions (X-axis and Y-axis directions). In this manner, metal interconnects 540(1), 540(2), connected by respective vias 542(1), 542(2), form a vertically integrated planar metal structure within first metallization layer 506(1) that forms part of respective patch antennas 504(1), 504(2).

[0043]

[0071] Also in this example, patch antennas 504(1), 504(2) also include respective vertical planar structures formed from a plurality of metal interconnects 544(1), 544(2) (e.g., metal lines, metal traces, metal posts) in dielectric layers 505(1)-505(6) in respective separate metallization layers 534(1)-534(6) in second metallization layer 506(2) that are aligned in the vertical direction (Z-axis direction) and share a respective common vertical plane P2, P3. Respective metal interconnects 544(1), 544(2) in adjacent metallization layers 534(1)-534(6) are coupled to each other by respective metal vias ("vias") 546(1), 546(2) disposed in respective adjacent metallization layers 534(1)-534(6). Each metal interconnect 544(1), 544(2) is arranged parallel to one another in the horizontal directions (X-axis and Y-axis directions). In this manner, each metal interconnect 544(1), 544(2) connected by a respective via 546(1), 546(2) forms a respective vertically integrated planar metal structure in the second metallization layer 506(2) that forms part of the patch antennas 504(1), 504(2). The core substrate 508 includes respective metal posts 548(1), 548(2) that are coupled to respective metal interconnects 540(1), 540(2) in metallization layer 532(1) in the first metallization layer 506(1) and to respective metal interconnects 544(1), 544(2) in metallization layer 534(1) in the second metallization layer 506(2).

[0044]

[0072] Thus, in this example, respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in first metallization layer 506(1), respective metal interconnects 544(1), 544(2) interconnected by respective vias 546(1), 546(2) in second metallization layer 506(2), and respective metal posts 548(1), 548(2) form respective patch antennas 504(1), 504(2). Patch antennas 504(1), 504(2) each extend completely through all layers of package substrate 502 in this example of FIG. 5D. Patch antennas 504(1), 504(2) extend vertically (in the Z-axis direction) in this example through each of metallization layers 532(1)-532(6) in first metallization layer 506(1), through each of metallization layers 534(1)-534(6) in second metallization layer 506(2), and through core substrate 508. Metal interconnects 550(1), 550(2) disposed in solder resist layer 552 (as another metallization layer) disposed on metallization layer 532(6) of first metallization layer 506(1) may function as respective antenna feeds 554(1), 554(2) to respective patch antennas 504(1), 504(2). The die interconnects 512(1), 512(2) of the RFICs 514(1), 514(2) in the antenna module 500 of FIG. 5A can be coupled to respective metal interconnects 550(1), 550(2) to couple the RFICs 514(1), 514(2) to respective patch antennas 504(1), 504(2).

[0045]

[0073] 5C and 5D, vertically integrated patch antennas 504(1), 504(2) are formed as generally planar structures, in this example rectangular structures, in the X-axis and Z-axis directions. As discussed above, patch antennas 504(1), 504(2) are formed by connecting a number of metal interconnects 540(1), 540(2), 544(1), 544(2), each disposed within separate metallization layers 502(1)-502(6), 504(1)-504(6) of package substrate 502. In this example, multiple metal interconnects 540(1), 540(2), 544(1), 544(2) are connected together by respective vias 542(1), 542(2), 546(1), 546(2), which are generally elongated in the horizontal direction (X-axis direction) forming a via bar such that, when connected by respective metal interconnects 540(1), 540(2), 544(1), 544(2), patch antennas 504(1), 504(2) are formed as generally planar structures in the X-axis and Z-axis directions within vertical plane P1 within package substrate 502 and can behave as patch antennas, and therefore be considered patch antennas. These patch antennas 504(1), 504(2) are vias in the sense that they are longer in one horizontal direction (the x-axis direction) and narrower in another horizontal direction (the y-axis direction) within their metallization layers 532(1)-532(6), 534(1)-534(6). The via bars of each patch antenna 504(1), 504(2) have a depth in the vertical direction (Z-axis direction) and are formed within via trenches in respective metallization layers 532(1)-532(6), 534(1)-534(6) that are electrically coupled to adjacent vias 542(1), 542(2), 546(1), 546(2) in adjacent metallization layers 532(1)-532(6), 504(1)-504(6) by intervening connected metal interconnects 540(1), 540(2), 544(1), 544(2), thereby forming a single vertical trench-like structure in package substrate 502.Thus, the resulting vertically integrated patch antenna 504(1), 504(2) may be considered a "trench-shaped" patch antenna in the sense that it is a planar patch antenna, but is integrated vertically (in the Z-axis direction) of the package substrate 502 relative to the horizontal metallization layers 502(1)-502(6), 504(1)-504(6) of the package substrate 502. The elongated vias 542(1), 542(2), 546(1), 546(2) each comprise a trench. The exact shape and vertical planes P2, P3 of the patch antennas 504(1), 504(2) will depend on the length of the vias 542(1), 542(2), 546(1), 546(2) in the horizontal direction (in the Y-axis direction). The patch antennas 504(1), 504(2) are formed as generally rectangular planar structures in this example.

[0046]

[0074] It should be noted that in another exemplary embodiment, respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in the first metallization layer 506(1) may not be coupled to respective metal interconnects 544(1), 544(2) interconnected by respective vias 546(1), 546(2) in the second metallization layer 506(2). Metal posts 548(1), 548(2) shown in core substrate 508 interconnecting respective metal interconnects 540(1), 540(2), which are interconnected by respective vias 542(1), 542(2) in first metallization layer 506(1) to respective metal interconnects 544(1), 544(2), which are interconnected by respective vias 546(1), 546(2) in second metallization layer 506(2), may not be included. Thus, in this alternative embodiment, respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in first metallization layer 506(1) form a first patch antenna in package substrate 502, and respective metal interconnects 544(1), 544(2) interconnected by respective vias 546(1), 546(2) in second metallization layer 506(2) each form four separate patch antennas in package substrate 502.

[0047]

[0075] FIG. 6 is a side view of an alternative package substrate 502A that may be provided as the package substrate 502 in the antenna module 500 of FIGS. 5A-5B, in which alternative vertically integrated patch antennas 504A(1), 504A(2) are vertically integrated in the vertical direction (Z-axis direction) only in the first metallization layer 506(1). Common elements between the package substrate 502 of FIG. 5D and the package substrate 502A of FIG. 6 are indicated by common element numbers. Thus, the discussion of these common elements in FIG. 5D is also applicable to the package substrate 502A of FIG. 6. The package substrate 502A of FIG. 6 is a side cross-sectional view taken along the A5-A5′ cross-section line in the antenna module 500 of FIG. 5B. Thus, only the two patch antennas 504A(1), 504A(2) are shown from the side in the side view of the package substrate 502A of FIG. 6.

[0048]

[0076] As shown in Figure 6, the first metallization layer 506(1) includes multiple metallization layers 532(1)-532(6) that are parallel to one another (e.g., stacked on top of one another) in horizontal directions (X-axis and Y-axis directions) in respective horizontal planes, as in the package substrate 502 of Figure 5D. As provided in the package substrate 502 of Figure 5D, the metallization layers 532(1)-532(6) in the first metallization layer 506(1) of the package substrate 502A of Figure 6 include respective metal interconnects 536 (e.g., metal lines, metal traces, metal posts) that are coupled to one another in adjacent metallization layers 532(1)-532(6) by vias 538 to form signal routing paths in the first metallization layer 506(1) to the die interconnects 512(1), 512(2) of the RFICs 514(1), 514(2) of Figure 5A. The patch antennas 504A(1), 504A(2) are formed from a plurality of other respective metal interconnects 540(1), 540(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 532(1)-532(6) in the first metallization layer 506(1) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P2, P3. The respective metal interconnects 540(1), 540(2) in adjacent metallization layers 532(1)-532(6) are coupled to each other by respective vias 542(1), 542(2) disposed in each adjacent metallization layer 532(1)-532(6). The respective metal interconnects 540(1), 540(2) are disposed parallel to each other in the horizontal directions (X-axis direction and Y-axis direction). In this manner, respective metal interconnects 540(1), 540(2) connected by respective vias 542(1), 542(2) form adjacent vertically integrated planar metal structures within first metallization layer 506(1), which in this example form patch antennas 504A(1), 504A(2).

[0049]

[0077] In this manner, the respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in the first metallization layer 506(1) form respective patch antennas 504A(1), 504A(2) in this example. Thus, the patch antennas 504A(1), 504A(2) do not extend into the core substrate 508 of the package substrate 502A or into the second metallization layer 506(2) in this example of FIG. 6. As in the package substrate 502 of FIG. 5D, the metal interconnects 550(1), 550(2) formed in the solder resist layer 552 disposed on the metallization layer 532(6) of the first metallization layer 506(1) can function as respective antenna feeds 554(1), 554(2) to the patch antennas 504A(1), 504A(2). Die interconnects 512(1), 512(2) of RFICs 514(1), 514(2) in the antenna module of FIG. 3A can be coupled to metal interconnects 550(1), 550(2) to couple the RFICs 514(1), 514(2) to respective patch antennas 504A(1), 504A(2).

[0050]

[0078] 6, the vertically integrated patch antennas 504A(1), 504A(2) are formed as generally planar structures, in this example rectangular structures, in the X-axis and Z-axis directions. As discussed above, the patch antennas 504A(1), 504A(2) are formed by connecting a plurality of metal interconnects 540(1), 540(2), each disposed within a separate metallization layer 502(1)-502(6) of the package substrate 502A. In this example, the multiple metal interconnects 540(1), 540(2) are connected together by respective vias 542(1), 542(2) that are generally elongated in the horizontal direction (X-axis direction) forming a via bar such that the patch antennas 504A(1), 504A(2) are formed as generally planar structures in the X-axis direction and Y-axis direction in the vertical plane P1 in the package substrate 502A and can behave as patch antennas and thus be considered patch antennas when connected to the respective metal interconnects 540(1), 540(2). These patch antennas 504A(1), 504A(2) are via bars in the sense that they are longer in one horizontal direction (X-axis direction) and narrower in another horizontal direction (Y-axis direction) within their metallization layers 532(1)-532(6). The via bars of each patch antenna 504A(1), 504A(2) are formed in via trenches in respective metallization layers 532(1)-532(6) that have a depth in the vertical direction (Z-axis direction) and are electrically coupled to adjacent vias 542(1), 542(2) in adjacent metallization layers 532(1)-532(6) by intervening connected metal interconnects 540(1), 540(2), thereby forming a single vertical trench-like structure in package substrate 502A. Thus, the resulting vertically integrated patch antenna 504A(1), 504A(2) may be considered a "trench-shaped" patch antenna in the sense that it is a planar patch antenna, but is integrated in the vertical direction (Z-axis direction) of package substrate 502A relative to the horizontal metallization layers 502(1)-502(6) of package substrate 502A. Elongated vias 542(1), 542(2) each include a trench.The exact shape and vertical planes P2, P3 of patch antennas 504A(1), 504A(2) will depend on the horizontal (Y-axis) length of vias 542(1), 542(2). Patch antennas 504A(1), 504A(2) are formed as generally rectangular planar structures in this example.

[0051]

[0079] 6 may be provided such that the patch antenna is provided in the second metallization layer 506(2) and not in the first metallization layer 506(1). In this regard, as shown in the package substrate 502 of FIG. 5D, in this alternative embodiment, the patch antenna would be formed from a plurality of other respective metal interconnects 544(1), 544(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 534(1)-534(6) in the second metallization layer 506(2) that are aligned in the vertical direction (Z-axis direction) and share a respective common vertical plane P2, P3.

[0052]

[0080] Other alternatives are possible. For example, Figure 7 is a bottom view of another package substrate 702 that may be provided in an antenna module 700 that may be similar to antenna modules 200, 500 of Figures 2A and 5A. Package substrate 702 includes vertically integrated patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4), similar to molded patch antennas 504(1)(1)-504(1)(4), 504(2)(1)-504(2)(4) in package substrate 502 of Figures 5A-5B. 7, however, vertically integrated patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4) are disposed adjacent a second side 706 of package substrate 702 that is elongated in the X-axis direction, opposite a first side 708 of package substrate 702 that is elongated in the X-axis direction. Like patch antennas 504(1)(1)-504(1)(4), 504(2)(1)-504(2)(4) in package substrate 502 of FIGS. 5A-5B, patch antennas 704(2)(1)-704(2)(4) are configured to be EM coupled to their respective patch antennas 704(1)(1)-704(1)(4) that radiate coupled RF signals received by patch antennas 704(2)(1)-704(2)(4) via antenna feedlines. The radiation patterns of patch antennas 704(1)(1)-704(1)(4) are shown in first and second horizontal directions 718(1)-718(4) in the Y-axis direction due to the vertical orientation of patch antennas 704(1)(1)-704(1)(4) in the vertical direction (Z-axis direction) and the nature of their planar structure in the X-axis and Z-axis directions. A more detailed exemplary view of the structure of patch antennas 504(1)(1)-504(1)(4) of FIG. 5D and FIG. 6 may be employed for patch antennas 704(1)(1)-704(1)(4) of FIG.

[0053]

[0081] 8 is a bottom view of another package substrate 802 that may be provided in an antenna module 800 that may be similar to the antenna modules 200, 500 of FIGS. 2A and 5A. The package substrate 802 including the vertically integrated patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4) is disposed adjacent to a second side 806 of the package substrate 802 that is elongated in the X-axis direction, opposite a first side 808 of the package substrate 802 that is elongated in the X-axis direction. Common elements between the package substrate 702 of FIG. 7 and the package substrate 702 of FIG. 8 share common element numbers, and the description of those common elements in FIG. 7 is also applicable to the package substrate 802 of FIG. 8. 8 , additional vertically integrated patch antennas 804(1)(1) through 804(1)(4), 804(2)(1) through 804(2)(4) are disposed adjacent a first side 808 of the package substrate 802. Like patch antennas 704(1)(1) through 704(1)(4), 704(2)(1) through 704(2)(4), patch antennas 804(2)(1) through 804(2)(4) are configured to be EM coupled to their respective patch antennas 804(1)(1) through 804(1)(4) to radiate coupled RF signals received by patch antennas 804(2)(1) through 804(2)(4) via the antenna feedlines. The radiation patterns of patch antennas 804(1)(1) through 804(1)(4) are shown in first and second horizontal directions 818(1) through 818(4) in the Y-axis direction due to the vertical orientation of patch antennas 804(1)(1) through 804(1)(4) in the vertical direction (Z-axis direction) and the nature of their planar structures in the X-axis and Z-axis directions.

[0054]

[0082] FIG. 9A is a side view of the package substrate 802 in the antenna module 800 of FIG. 8 showing an example of patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4), 804(1)(1)-804(1)(4), and 804(2)(1)-804(2)(4). The package substrate 802 in FIG. 9A is a side cross-sectional view taken along the A6-A6′ cross-sectional line in the antenna module 800 of FIG. 8. Thus, only four patch antennas are shown from the side in the side view of the package substrate 802 in FIG. 9A. In this example, the patch antennas 704(1), 704(2) are shown to be any of the respective pairs of patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4) in the package substrate 802 of FIG. 8. In this example, patch antennas 704(1), 704(2) may be structured like patch antennas 504(1), 504(2) of FIG. 5D, designated with common element numbers in FIG. 8. The description of patch antennas 504(1), 504(2) of FIG. 5D is applicable to patch antennas 704(1), 704(2) in package substrate 802 in this example and thus will not be described again.

[0055]

[0083] As shown in FIG. 9A, the package substrate 802 includes a first metallization layer 506(1) including multiple metallization layers 532(1)-532(6) that are parallel to one another (e.g., stacked on top of one another) in the horizontal directions (X-axis and Y-axis directions) in respective horizontal planes as provided in the package substrate 502 of FIG. 5D. The second metallization layer 506(2) also includes multiple metallization layers 534(1)-534(6) that are parallel to one another in the horizontal directions (X-axis and Y-axis directions) in respective horizontal planes. The first metallization layer 506(1) is bonded to the core substrate 508 with the metallization layer 532(1) being bonded directly to the core substrate 508. The second metallization layer 506(2) is also bonded to the core substrate 508 with the metallization layer 534(1) being bonded directly to the core substrate 508. In this regard, core substrate 508 is disposed between first metallization layer 506(1) and second metallization layer 506(2). Metallization layers 532(1)-532(6) in first metallization layer 506(1) include respective metal interconnects 536 (e.g., metal lines, metal traces, metal posts) that are coupled to one another in adjacent metallization layers 532(1)-532(6) by vias 538 to form signal routing paths in first metallization layer 506(1).

[0056]

[0084] In this example, package substrate 802 also includes additional patch antennas 804(1), 804(2), which are shown to be any of the respective pairs of patch antennas 804(1)(1) through 804(1)(4), 804(2)(1) through 804(2)(4) in package substrate 802 of Figure 8. Patch antennas 804(1), 804(2) are formed from multiple other metal interconnects 840(1), 840(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 532(1) through 532(6) in first metallization layer 506(1) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P4, P5 in the X-axis and Z-axis directions. Respective metal interconnects 840(1), 840(2) in adjacent metallization layers 532(1)-532(6) are coupled to one another by respective metal vias ("vias") 842(1), 842(2) disposed in respective adjacent metallization layers 532(1)-532(6). Respective metal interconnects 840(1), 840(2) are disposed parallel to one another in the horizontal directions (X-axis and Y-axis directions). In this manner, metal interconnects 840(1), 840(2) connected by respective vias 842(1), 842(2) form a vertically integrated planar metal structure in first metallization layer 506(1) that forms part of respective patch antennas 804(1), 804(2).

[0057]

[0085] Also in this example, patch antennas 804(1), 804(2) include respective vertical planar structures formed from a plurality of metal interconnects 844(1), 844(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 534(1)-534(6) in second metallization layer 506(2) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P4, P5. Respective metal interconnects 844(1), 844(2) in adjacent metallization layers 534(1)-534(6) are coupled to each other by respective metal vias ("vias") 846(1), 846(2) disposed in respective adjacent metallization layers 534(1)-534(6). Respective metal interconnects 844(1), 844(2) are disposed parallel to each other in the horizontal directions (X-axis direction and Y-axis direction). In this manner, respective metal interconnects 844(1), 844(2) connected by respective vias 846(1), 846(2) form respective vertically integrated planar metal structures in the second metallization layer 506(2) that form portions of the patch antennas 804(1), 804(2). The core substrate 508 includes respective metal posts 848(1), 848(2) that are coupled to respective metal interconnects 840(1), 840(2) in metallization layer 532(1) in the first metallization layer 506(1) and to respective metal interconnects 844(1), 844(2) in metallization layer 534(1) in the second metallization layer 506(2).

[0058]

[0086] Thus, in this example, respective metal interconnects 840(1), 840(2) interconnected by respective vias 842(1), 842(2) in first metallization layer 506(1), respective metal interconnects 844(1), 844(2) interconnected by respective vias 846(1), 846(2) in second metallization layer 506(2), and respective metal posts 848(1), 848(2) form respective patch antennas 804(1), 804(2). In this example of FIG. 8, patch antennas 804(1), 804(2) each extend completely through all layers of package substrate 802. Patch antennas 804(1), 804(2), in this example, extend vertically (in the Z-axis direction) through each of metallization layers 532(1)-532(6) in first metallization layer 506(1), through each of metallization layers 534(1)-534(6) in second metallization layer 506(2), and through core substrate 508. Metal interconnects 850(1), 850(2) formed in solder resist layer 552 disposed on metallization layer 532(6) of first metallization layer 506(1) may function as respective antenna feeds 854(1), 854(2) to respective patch antennas 804(1), 804(2).

[0059]

[0087] 9A , vertically integrated patch antennas 704(1), 704(2), 804(1), 804(2) are formed as generally planar structures, in this example rectangular structures, in the X-axis and Z-axis directions. As discussed above, patch antennas 704(1), 704(2), 804(1), 804(2) are formed by connecting a plurality of metal interconnects 540(1), 540(2), 544(1), 544(2), 840(1), 840(2), 844(1), 844(2), each disposed within a separate metallization layer 502(1)-502(6), 504(1)-504(6) of package substrate 802. In this example, the plurality of metal interconnects 540(1), 540(2), 544(1), 544(2), 840(1), 840(2), 844(1), 844(2) are configured to provide a vertically extending antenna array 704(1), 704(2), 804(1), 804(2) that, when connected to respective metal interconnects 540(1), 540(2), 544(1), 544(2), 840(1), 840(2), 844(1), 844(2), ... The patch antennas 704(1), 704(2), 804(1), 804(2) are formed as generally planar structures in the X-axis and Y-axis planes within the planes P2, P3, P4, P5 and are connected together by respective vias 542(1), 542(2), 546(1), 546(2), 842(1), 842(2), 846(1), 846(2) that are generally elongated in the horizontal direction (X-axis direction) to form via bars so that they can behave as, and thus be considered as, patch antennas. The patch antennas 704(1), 704(2), 804(1), 804(2) are via bars in the sense that they are longer in one horizontal direction (X-axis direction) and narrower in another horizontal direction (Y-axis direction) within their metallization layers 532(1)-532(6), 534(1)-534(6).The via bars of each patch antenna 704(1), 704(2), 804(1), 804(2) have a depth in the vertical direction (Z-axis direction) that is offset from that of the adjacent metallization layers 532(1)-532(6), 534(1)-534(6) by the intervening connected metal interconnects 540(1), 540(2), 544(1), 544(2), 840(1), 840(2), 844(1), 844(2). Each of the vias 542(1), 542(2), 546(1), 546(2), 842(1), 842(2), 846(1), 846(2) is formed in a via trench in each of the metallization layers 532(1)-532(6), 534(1)-534(6), which is electrically coupled to a respective adjacent via 542(1), 542(2), 546(1), 546(2), 842(1), 842(2), 846(1), 846(2), thereby forming a single vertical trench-like structure in the package substrate 802. The resulting vertically integrated patch antennas 704(1), 704(2), 804(1), 804(2) may therefore be considered “trench-shaped” patch antennas in the sense that they are planar patch antennas, but integrated in the vertical direction (Z-axis direction) of the package substrate 802 relative to the horizontal metallization layers 502(1)-502(6), 504(1)-504(6) of the package substrate 802. Each of the elongated vias 542(1), 542(2), 546(1), 546(2), 842(1), 842(2), 846(1), 846(2) includes a trench. The exact shape and vertical dimensions P2, P3, P4, P5 of the patch antennas 704(1), 704(2), 804(1), 804(2) will depend on the length of the vias 542(1), 542(2), 546(1), 546(2), 842(1), 842(2), 846(1), 846(2) in the horizontal direction (Y-axis direction). The patch antennas 704(1), 704(2), 804(1), 804(2) are formed as generally rectangular planar structures in this example.

[0060]

[0088] It should be noted that in another exemplary embodiment, respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in the first metallization layer 506(1) may not be coupled to respective metal interconnects 544(1), 544(2) interconnected by respective vias 546(1), 546(2) in the second metallization layer 506(2). Metal posts 548(1), 548(2) shown in core substrate 508 interconnecting respective metal interconnects 540(1), 540(2), which are interconnected by respective vias 542(1), 542(2) in first metallization layer 506(1) to respective metal interconnects 544(1), 544(2), which are interconnected by respective vias 546(1), 546(2) in second metallization layer 506(2), may not be included. Thus, in this alternative embodiment, respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in first metallization layer 506(1) form a first patch antenna in package substrate 802, and respective metal interconnects 544(1), 544(2) interconnected by respective vias 546(1), 546(2) in second metallization layer 506(2) each form four separate patch antennas in package substrate 802.

[0061]

[0089] Also, it should be noted that in another exemplary embodiment, respective metal interconnects 840(1), 840(2) interconnected by respective vias 842(1), 842(2) in the first metallization layer 506(1) may not be coupled to respective metal interconnects 844(1), 844(2) interconnected by respective vias 846(1), 846(2) in the second metallization layer 506(2). Metal posts 848(1), 848(2) shown in core substrate 508 interconnecting respective metal interconnects 840(1), 840(2), which are interconnected by respective vias 842(1), 842(2) in first metallization layer 506(1) to respective metal interconnects 844(1), 844(2), which are interconnected by respective vias 846(1), 846(2) in second metallization layer 506(2), may not be included. Thus, in this alternative embodiment, respective metal interconnects 840(1), 840(2) interconnected by respective vias 842(1), 842(2) in first metallization layer 506(1) form a first patch antenna in package substrate 802, and respective metal interconnects 844(1), 844(2) interconnected by respective vias 846(1), 846(2) in second metallization layer 506(2) each form four separate patch antennas in package substrate 802.

[0062]

[0090] 9B is a side view of an alternative package substrate 802A similar to package substrate 802 of FIG. 9A, in which patch antennas 704A(1), 704A(2) and alternative patch antennas 804A(1), 804A(2) are vertically integrated in the vertical direction (Z-axis direction) only in first metallization layer 506(1). Common elements between package substrate 802 of FIG. 9A and package substrate 802A of FIG. 9B are indicated with common element numbers. Thus, the discussion of these common elements in FIG. 9A is also applicable to package substrate 802A of FIG. 9B. Package substrate 802A of FIG. 9B is a side cross-sectional view of package substrate 802 of FIG. 8 taken along cross-section line A6-A6′.

[0063]

[0091] As shown in FIG. 9B, patch antennas 704A(1), 704A(2) are formed from a plurality of other respective metal interconnects 540(1), 540(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 532(1)-532(6) in first metallization layer 506(1) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P2, P3. Respective metal interconnects 540(1), 540(2) in adjacent metallization layers 532(1)-532(6) are coupled to each other by respective vias 542(1), 542(2) disposed in respective adjacent metallization layers 532(1)-532(6). Respective metal interconnects 540(1), 540(2) are disposed parallel to each other in the horizontal directions (X-axis direction and Y-axis direction). In this manner, respective metal interconnects 540(1), 540(2) connected by respective vias 542(1), 542(2) form adjacent vertically integrated planar metal structures within first metallization layer 506(1), which in this example form patch antennas 704A(1), 704A(2).

[0064]

[0092] In this manner, the respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in the first metallization layer 506(1) form respective patch antennas 704A(1), 704A(2) in this example. Thus, the patch antennas 704A(1), 704A(2) do not extend into the core substrate 508 or the second metallization layer 506(2) of the package substrate 802A in this example of FIG. 9B. As in the package substrate 802 of FIG. 9A, the metal interconnects 550(1), 550(2) formed in the solder resist layer 552 disposed on the metallization layer 532(6) of the first metallization layer 506(1) can function as respective antenna feeds 554(1), 554(2) to the patch antennas 704A(1), 704A(2).

[0065]

[0093] 9B, patch antennas 804A(1), 804A(2) are formed from a plurality of other respective metal interconnects 840(1), 840(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 532(1)-532(6) in first metallization layer 506(1) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P4, P5. Respective metal interconnects 840(1), 840(2) in adjacent metallization layers 532(1)-532(6) are coupled to each other by respective vias 842(1), 842(2) disposed in respective adjacent metallization layers 532(1)-532(6). Respective metal interconnects 840(1), 840(2) are disposed parallel to each other in the horizontal directions (X-axis direction and Y-axis direction). In this manner, respective metal interconnects 840(1), 840(2) connected by respective vias 842(1), 842(2) form adjacent vertically integrated planar metal structures within first metallization layer 506(1), which in this example form patch antennas 804A(1), 804A(2).

[0066]

[0094] In this manner, in this example, respective metal interconnects 840(1), 840(2) interconnected by respective vias 842(1), 842(2) in first metallization layer 506(1) form respective patch antennas 804A(1), 804A(2). Thus, patch antennas 804A(1), 804A(2) do not extend into core substrate 508 or second metallization layer 506(2) of package substrate 802A in this example of FIG. 9B. As in package substrate 802 of FIG. 9A, metal interconnects 850(1), 850(2) formed in solder resist layer 552 disposed on metallization layer 532(6) of first metallization layer 506(1) can function as respective antenna feeds 854(1), 854(2) to patch antennas 804A(1), 804A(2).

[0067]

[0095] 9B, vertically integrated patch antennas 704A(1), 704A(2), 804A(1), 804A(2) are formed as generally planar structures, in this example rectangular structures, in the X-axis and Z-axis directions. As discussed above, patch antennas 704A(1), 704A(2), 804A(1), 804A(2) are formed by connecting multiple metal interconnects 540(1), 540(2), 840(1), 840(2), each disposed within a separate metallization layer 502(1)-502(6) of package substrate 802A. In this example, multiple metal interconnects 540(1), 540(2), 840(1), 840(2) are connected together by respective vias 542(1), 542(2), 842(1), 842(2) that are generally elongated in the horizontal direction (X-axis direction) forming via bars such that, when connected to respective metal interconnects 540(1), 540(2), 840(1), 840(2), patch antennas 704A(1), 704A(2), 804A(1), 804A(2) are formed within package substrate 802 in vertical planes P2, P3, P4, P5 in the X-axis and Z-axis directions as generally planar structures and can behave as patch antennas, and therefore are considered patch antennas. These patch antennas 704A(1), 704A(2), 804A(1), 804A(2) are via bars in the sense that they are longer in one horizontal direction (the x-axis direction) and narrower in another horizontal direction (the y-axis direction) within their metallization layers 532(1)-532(6). The via bars of each patch antenna 704A(1), 704A(2), 804A(1), 804A(2) have a depth in the vertical direction (Z-axis direction) and are formed within a via trench in a respective metallization layer 532(1)-532(6) that is electrically coupled to respective adjacent vias 542(1), 542(2), 842(1), 842(2) in adjacent metallization layers 532(1)-532(6), 534(1)-534(6) by intervening connected metal interconnects 540(1), 540(2), 840(1), 840(2), thereby forming a single vertical trench-like structure in package substrate 802A.Thus, the resulting vertically integrated patch antennas 704A(1), 704A(2), 804A(1), 804A(2) may be considered a "trench-shaped" patch antenna in the sense that it is a planar patch antenna, but is integrated vertically (in the Z-axis direction) of package substrate 802A relative to horizontal metallization layers 532(1)-532(6) of package substrate 802A. Elongated vias 542(1), 542(2), 842(1), 842(2) each include a trench. The exact shape and vertical planes P2, P3, P4, P5 of patch antennas 704A(1), 704A(2), 804A(1), 804A(2) will depend on the length of vias 542(1), 542(2), 842(1), 842(2) in the horizontal direction (in the Y-axis direction). Patch antennas 704A(1), 704A(2), 804A(1), 804A(2) are formed as generally rectangular planar structures in this example.

[0068]

[0096] It should be noted that, alternatively, package substrate 802A of FIG. 9B may be provided such that a patch antenna is provided in second metallization layer 506(2) and not in first metallization layer 506(1). In this regard, as shown in package substrate 802 of FIG. 9A, in this alternative embodiment, the patch antenna would be formed from a plurality of other respective metal interconnects 544(1), 544(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 534(1)-534(6) in second metallization layer 506(2) that are vertically aligned (in the Z-axis direction) and share a respective common vertical plane P2, P3. Also in this regard, as shown in package substrate 802 of FIG. 9A , in this alternative embodiment, the patch antenna will be formed from multiple other respective metal interconnects 844(1), 844(2) (e.g., metal wires, metal traces, metal posts) in respective separate metallization layers 534(1)-534(6) in second metallization layer 506(2) that are vertically aligned (in the Z-axis direction) and share respective common vertical planes P4, P5.

[0069]

[0097] In another exemplary embodiment, a package substrate including a vertically integrated patch antenna(s), including but not limited to any of the package substrates 202, 502, 502A, 702, 802, 802A of FIGS. 2-9B, may include other patch antennas that are horizontally integrated in the package substrate by being arranged horizontally in the X-axis direction and the Y-axis direction in the metallization layer(s) of the package substrate. The antenna radiation pattern of such other horizontally integrated patch antennas extends in a vertical direction perpendicular to the antenna radiation pattern of the patch antenna(s) from the bottom of the package substrate. In this manner, the inclusion of the vertically integrated patch antenna(s) and such horizontally integrated patch antenna(s) provides antenna radiation coverage in multiple directions in the antenna module. For example, it may be important to provide additional antennas in the antenna module to support multi-directional RF reception and / or multiple-input multiple-output (MIMO) communication, such as millimeter wave (mmWave) applications of the fifth generation (5G) new radio (NR) spectrum.

[0070]

[0098] In this regard, FIG. 10A is a side view of an exemplary antenna module 1000 including a package substrate 1002 including multiple patch antennas 1004(1)-1004(4) similar to the package substrate 502 of FIG. 5A. FIG. 10A is a side view of the bottom view of the antenna module 1000 and package substrate 1002 of FIG. 10B along section lines A7-A7′. The patch antennas 1004(1)-1004(4) are planar structures in the X- and Z-directions that are vertically integrated in adjacent metallization layers in the package substrate 1002 in the vertical direction (Z-direction) to support RF communications. As planar structures, the patch antennas 1004(1)-1004(4) behave as patch antennas. The patch antennas 1004(1)-1004(4) are configured to radiate RF signals. As an example, patch antennas 1004(1)-1004(4) may be designed for millimeter wave (mmWave) reception, including RF signals in the fifth generation (5G) new radio (NR) spectrum. As discussed in more detail below and shown in the bottom view of package substrate 1002 in FIG. 10B, package substrate 1002 also includes, in this example, eight additional patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4). The bottom view of package substrate 1002 in FIG. 10B shows only bottom patch antennas 1005(1)(1)-1005(1)(4). 10C , however, shows an exploded view patch antenna 1004 for two adjacent patch antennas 1005(1), 1005(2), which may be any pair of respective patch antennas 1005(1)(1) through 1005(1)(4), 1005(2)(1) through 1005(2)(4). As discussed below, in this example, each patch antenna 1005(2)(1) through 1005(2)(4) is configured to be EM coupled to a respective patch antenna 1005(1)(1) through 1005(1)(4) to radiate an RF signal.Additionally, as discussed in more detail below, patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) are formed from metal lines or traces in a metallization layer in package substrate 502 as planar structures in the horizontal X-axis and Y-axis directions. Thus, patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) provide additional radiation pattern coverage orthogonal to the radiation patterns of patch antennas 1004(1)-1004(4) such that antenna module 1000 has multi-directional antenna pattern coverage.

[0071]

[0099] In this example, patch antennas 1004(1)-1004(4) are vertically disposed in a vertical direction (Z-axis direction) within and through a first metallization layer 1006(1) in package substrate 1002. Metallization layer 1006(1) is horizontally disposed in a horizontal plane in the X-axis and Y-axis directions in this example. In this example, patch antennas 1004(1)-1004(4) are also vertically disposed in a vertical direction (Z-axis direction) within and through core substrate 1008 and second metallization layer 1006(2) of package substrate 1002, which are both similarly horizontally disposed in a horizontal plane in the X-axis and Y-axis directions. The patch antennas 1004(1)-1004(4) are coupled through respective antenna feedlines 1010(1)-1010(4) to die interconnects 1012(1), 1012(2) of one or more RFICs 1014(1), 1014(2) in an IC die layer 1016, which include RF transceiver circuitry supporting RF communications. In this regard, the antenna module 1000 may be considered an RFIC package. The radiation patterns of the patch antennas 1004(1)-1004(4) are in first and second horizontal directions 1019(1)-1019(4) in the Y-axis direction due to their vertical orientation in the vertical direction (Z-axis direction) and the nature of their planar structure in the X-axis and Z-axis directions. Thus, patch antennas 1004(1)-1004(4) may be formed within package substrate 202 to provide this antenna radiation pattern, with or without other antennas, to provide receive antenna coverage in first and second horizontal directions 1019(1)-1019(4). Note that in this example, four patch antennas 1004(1)-1004(4) are included in antenna module 200, but are not so limited.

[0072]

[0100] Patch antennas 1005(1)(1) through 1005(1)(4), 1005(2)(1) through 1005(2)(4) are horizontally arranged (x-axis and y-axis directions) within a metallization layer in a first metallization layer 1006(1) within package substrate 1002. Patch antennas 1005(2)(1) through 1005(2)(4) are coupled through respective antenna feedlines to die interconnects 1012(1), 1012(2) of one or more RFICs 1014(1), 1014(2) within IC die layer 1016, which contain RF transceiver circuitry supporting RF communications. In this example, patch antennas 1005(1)(1)-1005(1)(4) are EM coupled to respective patch antennas 1005(2)(1)-1005(2)(4) when patch antennas 1005(2)(1)-1005(2)(4) receive RF signals. The radiation patterns of patch antennas 1005(1)(1)-1005(1)(4) are in first and second vertical directions 1019(1)-1019(4) in the vertical direction (Z-axis direction) as shown in FIG. 10B due to their horizontal orientation in the horizontal directions (X-axis and Y-axis directions) and the nature of their planar structures in the X-axis and Y-axis. Thus, patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) may be formed within package substrate 1002 to provide this additional radiation pattern to provide receive antenna coverage in first and second perpendicular directions 1019(1)-1019(4). Note that in this example, four (4) pairs of patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) are included in antenna module 1000, but are not limited thereto. For example, patch antennas may be provided that do not have pairs of patch antennas that are not EM coupled.

[0073]

[0101] As discussed in more detail below, the first and second metallization layers 1006(1), 1006(2) in the antenna module 1000 of Figures 10A and 10B each include metal interconnects 1020(1), 1020(2) formed therein for routing signals between the RFICs 1014(1), 1014(2) and the package substrate 1002. As discussed in more detail below, in some examples, the patch antennas 1004(1)-1004(4) are formed by adjacent interconnected vias and metal interconnects 1020(1), 1020(2), each disposed in a separate metallization layer within the first and second metallization layers 1006(1), 1006(2), that are connected together via metal posts 1018 in the core substrate 1008. In this manner, the patch antennas 1004(1)-1004(4) may be formed as vertically integrated structures within the package substrate 1002 using the fabrication methods (e.g., microvia fabrication processes) used to fabricate the metal interconnects and vias within the package substrate. The performance of the patch antennas 1004(1)-1004(4) may be controlled by controlling the length and height of the vias and adjacent bonded metal interconnects within the first and / or second metallization layers 1006(1), 1006(2). The patch antennas 1004(1)-1004(4) may be flexibly positioned within the package substrate 1002 and within existing metallization layers within the first and / or second metallization layers 1006(1), 1006(2) of the package substrate 1002, without necessarily having to provide additional metallization layers dedicated to supporting the additional antennas, as in the antenna module 100 of FIGS. 1A and 1B.

[0074]

[0102] As discussed in more detail below, patch antennas 1005(1)(1) through 1004(1)(4), 1005(2)(1) through 1005(2)(4) are formed by metal interconnects (e.g., metal lines, metal traces) 1020(1), 1020(2) in a metallization layer in a first metallization layer 1006(1). In this manner, patch antennas 1004(1) through 1004(4) may be formed as horizontally integrated structures in package substrate 1002 using the manufacturing methods (e.g., microvia manufacturing processes) used to fabricate metal interconnects and vias in the package substrate. Patch antennas 1005(1)(1) through 1004(1)(4), 1005(2)(1) through 1005(2)(4) may be flexibly positioned within existing metallization layers within package substrate 1002, and within first and / or second metallization layers 1006(1), 1006(2) of package substrate 1002, without necessarily having to provide additional metallization layers dedicated to supporting the additional antennas, as in antenna module 100 of FIGS. 1A and 1B.

[0075]

[0103] 10C and described in more detail below, in this example, patch antenna 1004 is shown among patch antennas 1004(1)-1004(2). Patch antenna 1004 is formed by a plurality of via bars 1030 formed in respective adjacent metallization layers in package substrate 1002 and interconnected by metal interconnects 1020 in the respective metallization layers. In this manner, patch antennas 1004(1)-1004(4) may be formed as vertically integrated structures in package substrate 1002 using the manufacturing methods (e.g., microvia manufacturing processes) used to fabricate metal interconnects and vias in the package substrate.

[0076]

[0104] FIG. 10D is a side view of the package substrate 1002 in the antenna module 1000 of FIGS. 10A-10B, showing examples of patch antennas 1004(1)-1004(4). The package substrate 1002 in FIG. 10D is a side cross-sectional view taken along the A8-A8′ cross-sectional line in the antenna module 1000 of FIG. 10B. Thus, the side view of the package substrate 1002 in FIG. 10D shows only one patch antenna 1004(1) of the patch antennas 1004(1)-1004(4) from the side. As shown in FIG. 10D, the first metallization layer 1006(1) includes multiple metallization layers 1032(1)-1032(6) that are parallel to each other (e.g., stacked on top of each other) in the horizontal directions (X-axis direction and Y-axis direction) in respective horizontal planes. The second metallization layer 1006(2) also includes a plurality of metallization layers 1034(1)-1034(6) that are parallel to one another in the horizontal directions (X-axis direction and Y-axis direction) in respective horizontal planes. The metallization layers 1032(6), 1034(6) are the outer metallization layers of the package substrate 1002. The first metallization layer 1006(1) is bonded to the core substrate 1008, with the metallization layer 1032(1) being bonded directly to the core substrate 1008. The second metallization layer 1006(2) is also bonded to the core substrate 1008, with the metallization layer 1034(1) being bonded directly to the core substrate 1008. In this regard, the core substrate 1008 is disposed between the first metallization layer 1006(1) and the second metallization layer 1006(2).

[0077]

[0105] Metallization layers 1032(1)-1032(6) in first metallization layer 1006(1) each include a dielectric layer 1033(1)-1033(6) made from a dielectric material and one or more metal interconnects 1036 (e.g., metal lines, metal traces, metal posts). The metal interconnects 1036 (e.g., metal lines, metal traces, metal posts) may be coupled to each other in adjacent metallization layers 1032(1)-1032(6) by metal vias 1038 ("vias 1038") to form signal routing paths in first metallization layer 1006(1) to die interconnects 1012(1), 1012(2) of RFICs 1014(1), 1014(2) in FIG. 10A. Metallization layers 1034(1)-1034(6) in the second metallization layer 1006(2) each include a dielectric layer 1035(1)-1035(6) made from a dielectric material and one or more metal interconnects (e.g., metal lines, metal traces, metal posts). The metal interconnects may be coupled to each other in adjacent metallization layers 1034(1)-1034(6) by vias to form signal routing paths in the second metallization layer 1006(2).

[0078]

[0106] The patch antenna 1004 is formed from a plurality of other metal interconnects 1040 (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 1032(1)-1032(6) in the first metallization layer 1006(1) that are aligned vertically (in the Z-axis direction) and share a common vertical plane P6 in the X-axis and Z-axis directions. The metal interconnects 1040 in adjacent metallization layers 1032(1)-1032(6) are coupled to each other by metal vias 1042 ("vias 1042") disposed in each adjacent metallization layer 1032(1)-1032(6). The metal interconnects 1040 are disposed parallel to each other in the horizontal directions (in the X-axis and Y-axis directions). In this manner, metal interconnects 1040 connected by vias 1042 form a vertically integrated planar metal structure within the first metallization layer 1006(1) that forms part of the patch antenna 1004.

[0079]

[0107] In this example, the patch antenna 1004 also includes a vertical planar structure formed from a plurality of metal interconnects 1044 (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 1034(1)-1034(6) in the second metallization layer 1006(2). The metallization layers 1034(1)-1034(6) each include a respective dielectric layer 1035(1)-1035(6) made from a dielectric material and one or more metal interconnects 1044 (e.g., metal lines, metal traces, metal posts). The metal interconnects 1044 are aligned vertically (in the Z-axis direction) and share a common vertical plane P6. Metal interconnects 1044 in adjacent metallization layers 1034(1)-1034(6) are coupled to one another by metal vias 1046 ("vias 1046") disposed in each adjacent metallization layer 1034(1)-1034(6). The metal interconnects 1044 are disposed parallel to one another in the horizontal directions (X-axis and Y-axis directions). In this manner, the metal interconnects 1044 connected by the vias 1046 form a vertically integrated planar metal structure in the second metallization layer 1006(2) that forms part of the patch antenna 1004. Core substrate 1008 includes metal posts 1018 coupled to metal interconnects 1040 in metallization layer 1032(1) in the first metallization layer 1006(1) and to metal interconnects 1044 in metallization layer 1034(1) in the second metallization layer 1006(2).

[0080]

[0108] Thus, in this example, metal interconnects 1040 interconnected by respective vias 1042 in first metallization layer 1006(1), metal interconnects 1044 interconnected by respective vias 1046 in second metallization layer 1006(2), and metal post 1048 form patch antenna 1004. Patch antenna 1004 extends completely through all layers of package substrate 1002 in this example of FIG. 10D. Patch antenna 1004 extends vertically (in the Z-axis direction) in this example through each of metallization layers 1032(1)-1032(6) in first metallization layer 1006(1), through each of metallization layers 1034(1)-1034(6) in second metallization layer 1006(2), and through core substrate 1008. Metal interconnects 1050 formed in a solder resist layer 1052 (as another metallization layer) disposed on metallization layer 1032(6) of the first metallization layer 1006(1) can function as antenna feedlines 1054 to the patch antenna 1004. Die interconnects 1012(1), 1012(2) of RFICs 1014(1), 1014(2) in the antenna module of FIG. 10A can be coupled to metal interconnects 1050 as antenna feedlines 1054 to couple the RFICs 1014(1), 214(2) to the patch antenna 1004.

[0081]

[0109] 10C and 10D, the vertical integrated patch antenna 1004 is formed as a generally planar structure, in this example a rectangular structure, in the X-axis and Z-axis directions. As discussed above, the patch antenna 1004 is formed by connecting a plurality of metal interconnects 1040, 1044, each disposed within a separate metallization layer 1032(1)-1032(6), 1034(1)-1034(6) of the package substrate 1002. In this example, the plurality of metal interconnects 1040, 1044 are connected together by respective generally elongated shaped vias 1042, 1046 in the horizontal direction (X-axis direction) forming the via bar 1030 such that when connected to the respective metal interconnects 1040, 1044, the patch antenna 1004 is formed as a generally planar structure in the X-axis and Y-axis directions in the vertical plane P6 in the package substrate 1002 and can behave as a patch antenna, and thus be considered a patch antenna. The patch antenna 1004 is a via bar in the sense that it is longer in one horizontal direction (Y-axis direction) and narrower in another horizontal direction (Z-axis direction) within its metallization layers 1032(1)-1032(6), 1034(1)-1034(6). The via bar 1030 of the patch antenna 1004 has a depth in the vertical direction (Z-axis direction) and is formed within a via trench in each metallization layer 1032(1)-1032(6), 1034(1)-1034(6) that is electrically coupled to respective adjacent vias 1042, 1046 in adjacent metallization layers 1032(1)-1032(6), 1034(1)-1034(6) by intervening connected metal interconnects 1040, 1044, thereby forming a single vertical trench-like structure within the package substrate 1002. Thus, the resulting vertically integrated patch antennas 1004 may be considered “trench-shaped” patch antennas in the sense that they are planar patch antennas, but are integrated vertically (in the Z-axis direction) of the package substrate 1002 relative to the horizontal metallization layers 1032(1)-1032(6), 1034(1)-1034(6) of the package substrate 1002.The elongated vias 1042, 1046 each include a trench. The exact shape and vertical plane P6 of the patch antenna 1004 will depend on the length of the vias 1042, 1046 in the horizontal direction (X-axis direction). The patch antenna 1004 is formed as a generally rectangular planar structure in this example.

[0082]

[0110] It should be noted that in another exemplary embodiment, the metal interconnects 1040 interconnected by respective vias 1042 in the first metallization layer 1006(1) may not be coupled to the metal interconnects 1044 interconnected by respective vias 1046 in the second metallization layer 1006(2). The metal posts 1048 shown in the core substrate 1008 interconnecting the metal interconnects 1040 interconnected by respective vias 1042 in the first metallization layer 1006(1) to the metal interconnects 1044 interconnected by respective vias 1046 in the second metallization layer 1006(2) may not be included. Thus, in this alternative embodiment, metal interconnects 1040 interconnected by respective vias 1042 in the first metallization layer 1006(1) form a first patch antenna within the package substrate 1002, and metal interconnects 1044 interconnected by respective vias 1046 in the second metallization layer 1006(2) form a second, separate patch antenna within the package substrate 1002.

[0083]

[0111] 10D , patch antennas 1005(1)(1) through 1005(1)(4) and 1005(2)(1) through 1005(2)(4) are, in this example, formed as metal interconnects 1060 (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 1034(5), 1034(6) in second metallization layer 1006(2). Metal interconnects 1060 are, in this example, formed as respective horizontal planes P that are elongated in horizontal directions (X-axis and Y-axis directions) perpendicular to the vertical direction (Z-axis direction) to form patch antennas 1005(1)(1) through 1005(1)(4) and 1005(2)(1) through 1005(2)(4). 1-H , P 2-H10B and 10D. Thus, the radiation patterns of patch antennas 1005(1)(1) through 1005(1)(4), 1005(2)(1) through 1005(2)(4) are in first and second horizontal directions 1019(1) through 1019(4) in the vertical (Z-axis direction), as shown in FIG. 10B and FIG. 10D. Referring to FIG. 10D, patch antennas 1005(2)(1) through 1005(2)(4) and their metal interconnects 1060 are coupled to other metal interconnects 1062 as respective antenna feeds 1066(1) through 1066(4) in metallization layer 1034(4) by metal vias 1064 ("vias 1064") formed in metallization layer 1034(5). Metal interconnects 1062 in metallization layer 1034(4) may be coupled to metal interconnects in other metallization layers 1034(1)-1034(4) in second metallization layer 1034(2), to core substrate 1008, and to metal interconnects 1036 in first metallization layer 1034(1) to be interconnected to RFIC(s) 1014(1), 1014(2) ( FIG. 10A ). In this example, patch antennas 1005(2)(1)-1005(2)(4) in metallization layer 1034(6) are configured to radiate RF signals received from their respective antenna feedlines 1066(1)-1066(4) toward their respective patch antennas 1005(1)(1)-1005(1)(4) in metallization layer 1034(6). Patch antennas 1005(1)(1)-1005(1)(4) in metallization layer 1034(6) are EM coupled to respective patch antennas 1005(2)(1)-1005(2)(4) for receiving RF signals and then radiating such RF signals away from package substrate 1002. In this manner, as shown in Figures 10A and 10B, patch antennas 1005(1)(1)-1005(1)(4) have radiation patterns in first and second directions 1019(1)-1019(4) in a vertical direction (Z-axis direction), and patch antennas 1004(1)-1004(4) (Figure 10B) have radiation patterns in first and second directions 1019(1)-1019(4) in an orthogonal horizontal direction (Y-axis direction).

[0084]

[0112] 10A-10D, each pair of patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) is included within package substrate 1002, and patch antennas 1005(1)(1)-1005(1)(4) are EM coupled to patch antennas 1005(2)(1)-1005(2)(4), but this is not limiting. For example, only patch antennas 1005(1)(1)-1005(1)(4) or patch antennas 1005(2)(1)-1005(2)(4) may be included within package substrate 1002. Additionally, any desired number of patch antennas may be included on any given metallization layer 1034(5) and / or 1034(6). The patch antenna may also be included on the second metallization layer 1006(1) of the package substrate 1002 or on any other metallization layer(s) 1034(1)-1034(4) within the first metallization layer 1006(1).

[0085]

[0113] FIG. 11 is a side view of an alternative package substrate 1002A that may be provided as the package substrate 1002 in the antenna module 1000 of FIGS. 10A-10B, in which an alternative patch antenna 1004A is vertically integrated only in the first metallization layer 1006(1) in the vertical direction (Z-axis direction). Common elements between the package substrate 1002 of FIG. 10D and the package substrate 1002A of FIG. 11 are indicated by common element numbers. Thus, the discussion of these common elements in FIG. 3D is also applicable to the package substrate 1002A of FIG. 11. The package substrate 1002A of FIG. 4 is a side cross-sectional view taken along the A7-A7′ cross-section line in the antenna module 1000 of FIG. 10B. Thus, only one patch antenna 1004A is shown from the side in the side view of the package substrate 1002A of FIG. 11.

[0086]

[0114] As shown in FIG. 11, the first metallization layer 1006(1) includes multiple metallization layers 1032(1)-1032(6) that are parallel to one another (e.g., stacked on top of one another) in horizontal directions (X-axis and Y-axis directions) within respective horizontal planes, similar to the package substrate 1002 of FIG. 3D. As provided in package substrate 1002 of FIG. 10D , metallization layers 1032(1)-1032(6) in a first metallization layer 1006(1) of package substrate 1002A of FIG. 4 include metal interconnects 1036 (e.g., metal lines, metal traces, metal posts) that are coupled to each other in adjacent metallization layers 1032(1)-1032(6) by vias 1038 to form signal routing paths in first metallization layer 1006(1) to die interconnects 1012(1), 1012(2) of RFICs 1014(1), 1014(2) of FIG. 10A . The patch antenna 1004A is formed from a plurality of other metal interconnects 1040 (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 1032(1)-1032(6) in the first metallization layer 1006(1) that are aligned vertically (in the Z-axis direction) and share a common vertical plane P6. The metal interconnects 1040 in adjacent metallization layers 1032(1)-1032(6) are coupled to each other by vias 1042 disposed in each adjacent metallization layer 1032(1)-1032(6). The metal interconnects 1040 are disposed parallel to each other horizontally (in the X-axis and Y-axis directions). In this manner, metal interconnects 1110 connected by metal vias 1112 (“vias 1112”) form a vertically integrated planar metal structure within the first metallization layer 1006(1), which in this example forms the patch antenna 1004A.

[0087]

[0115] In this manner, in this example, the metal interconnects 1040 interconnected by respective vias 1042 in the first metallization layer 1006(1) form the patch antenna 1004A. Thus, the patch antenna 1004A does not extend into the core substrate 1008 or the second metallization layer 1006(2) of the package substrate 1002A in this example of FIG. 11. As in the package substrate 1002 of FIG. 3D, the metal interconnects 1050 formed in a solder resist layer 1052 disposed on the metallization layer 1032(6) of the first metallization layer 1006(1) can function as an antenna feed 1054 to the patch antenna 1004. The die interconnects 1012(1), 1012(2) of the RFICs 1014(1), 1014(2) in the antenna module 1000 of FIG. 10A can be coupled to a metal interconnect 1050 as an antenna feedline 1054 to couple the RFICs 1014(1), 1014(2) to the patch antenna 1004.

[0088]

[0116] 11, like package substrate 1002 of Figures 10A-10D, package substrate 1002A may include patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4). Common elements between package substrate 1002 of Figures 10A-10D and package substrate 1002A of Figure 11 are indicated with common element numbers and thus will not be described again. 11, each pair of patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) is included within package substrate 1002A, and patch antennas 1005(1)(1)-1005(1)(4) are EM coupled to patch antennas 1005(2)(1)-1005(2)(4), but it should be noted that this is not limiting. For example, only patch antennas 1005(1)(1)-1005(1)(4) or patch antennas 1005(2)(1)-1005(2)(4) may be included within package substrate 1002. Additionally, any desired number of patch antennas may be included on any given metallization layer 1034(5) and / or 1034(6). A patch antenna may also be included on the second metallization layer 1006(1) of the package substrate 1002 or on any other metallization layer(s) 1034(1)-1034(4) within the first metallization layer 1006(1).

[0089]

[0117] 11, the vertical integrated patch antenna 1004A is formed as a generally planar structure, in this example a rectangular structure, in the X-axis and Z-axis directions. As discussed above, the patch antenna 1004A is formed by connecting a plurality of metal interconnects 1040, each disposed within a separate metallization layer 1032(1)-1032(6) of the package substrate 1002. In this example, the plurality of metal interconnects 1040 are connected together by respective generally elongated shaped vias 1042 in the horizontal direction (X-axis direction) forming the via bar 1030 such that when connected to the respective metal interconnects 1040, the patch antenna 1004A is formed as a generally planar structure in the X-axis and Y-axis directions in the vertical plane P6 in the package substrate 1002A and can behave as a patch antenna, and thus be considered a patch antenna. The patch antenna 1004A is a via bar in the sense that it is longer in one horizontal direction (Y-axis direction) and narrower in another horizontal direction (Z-axis direction) within its metallization layers 1032(1)-1032(6). The via bar 1030 of the patch antenna 1004A has a depth in the vertical direction (Z-axis direction) and is formed within a via trench in each metallization layer 1032(1)-1032(6) that is electrically coupled to a respective adjacent via 1042 in an adjacent metallization layer 1032(1)-1032(6) by an intervening connected metal interconnect 1040, thereby forming a single vertical trench-like structure within the package substrate 1002A. The resulting vertically integrated patch antenna 1004A may therefore be considered a "trench-shaped" patch antenna in the sense that it is a planar patch antenna, but is integrated vertically (Z-axis direction) of the package substrate 1002A relative to the horizontal metallization layers 1032(1)-1032(6) of the package substrate 1002A. The elongated vias 1042 each include a trench. The exact shape and vertical plane P6 of the patch antenna 1004A will depend on the length of the vias 1042 in the horizontal direction (X-axis direction). The patch antenna 1004A is formed as a generally rectangular planar structure in this example.

[0090]

[0118] 11 may be provided such that the patch antenna is provided in the second metallization layer 1006(2) and not in the first metallization layer 1006(1). In this regard, as shown in the package substrate 1002 of FIG. 10D, in this alternative embodiment, the patch antenna would be formed from a plurality of other metal interconnects 1044 (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 1034(1)-1034(6) in the second metallization layer 1006(2) that are aligned in the vertical direction (Z-axis direction) and share a common vertical plane P6.

[0091]

[0119] In another exemplary embodiment, a vertical integrated patch antenna (or antennas) is formed in the package substrate extending in a first vertical plane in the package substrate such that its antenna radiation pattern exits a side of the package substrate in a second horizontal direction perpendicular to the vertical direction. In another exemplary embodiment, multiple trench-shaped patch antennas may be formed vertically adjacent to each other in the package substrate to provide an antenna. One of the trench-shaped patch antennas may be electrically coupled to the RFIC package via a coupled feed line. The adjacent trench-shaped patch antennas are configured to be electromagnetically (EM) coupled to the trench-shaped patch antenna connected by the feed line to radiate an RF signal transmitted by an RFIC in the RFIC package.

[0092]

[0120] Figure 12 is a bottom view of another package substrate 1202 that may be provided in an antenna module and is similar to antenna module 700 of Figure 7, but also includes a horizontally integrated patch antenna such as patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) in package substrates 1002, 1002A of Figures 10A-10D and 11. Common elements between package substrates 502 and 702 of Figures 5A-5D and 7 are indicated in package substrate 1202 of Figure 12 with common element numbers. Package substrate 1202 of Figure 12 includes vertically integrated patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4) similar to molded patch antennas 504(1)(1)-504(1)(4), 504(2)(1)-504(2)(4) in package substrate 502 of Figures 5A-5B. However, in package substrate 1202 of Figure 12, vertically integrated patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4) are disposed adjacent to a second side 1206 of package substrate 1202 that is elongated in the X-axis direction, opposite a first side 1208 of package substrate 1202 that is elongated in the X-axis direction. Like patch antennas 504(1)(1) through 504(1)(4), 504(2)(1) through 504(2)(4) in package substrate 502 of Figures 5A-B, patch antennas 704(2)(1) through 704(2)(4) are configured to be EM coupled to respective patch antennas 704(1)(1) through 704(1)(4) which radiate coupled RF signals received by patch antennas 704(2)(1) through 704(2)(4) via antenna feedlines. The radiation patterns of patch antennas 704(1)(1) through 704(1)(4) are shown in respective first and second horizontal directions 718(1) through 718(4) in the Y-axis direction due to the vertical orientation of patch antennas 704(1)(1) through 704(1)(4) in the vertical direction (Z-axis direction) and the nature of their planar structure in the X-axis and Z-axis directions. The more detailed exemplary illustrations of the structure of patch antennas 504(1)(1)-504(1)(4) of FIG. 5D and FIG. 6 may also be employed for patch antennas 704(1)(1)-704(1)(4) of FIG. 12.

[0093]

[0121] The example package substrate 1202 of Figure 12 also includes patch antennas 1205(1)-1205(4). The radiation patterns of the patch antennas 1205(1)-1205(4), due to their horizontal orientation in the horizontal directions (X-axis and Y-axis directions) and the nature of their planar structures in the X-axis and Z-axis directions, are in a vertical direction (Z-axis direction) in first and second vertical directions 1219(1)-1219(4), as shown in Figure 12. Thus, the patch antennas 1205(1)-1205(4) can be formed within the package substrate 1202 to provide this additional radiation pattern to provide receive antenna coverage in the first and second vertical directions 1219(1)-1219(4). In this example, patch antennas 1205(1)-1205(4) are provided in only one metallization layer of package substrate 1202, similar to patch antennas 1005(2)(1)-1005(2)(4) in package substrates 1002, 1002A of Figures 10D and 11. However, without being limited thereto, corresponding patch antennas similar to patch antennas 1005(1)(1)-1005(1)(4) in package substrates 1200, 1002A of Figures 10D may be formed in package substrate 1002 of Figure 12 and configured to be EM coupled to antenna feedline coupled patch antennas 1205(1)-1205(4). It should also be noted that any desired number of patch antennas may be included in package substrate 1202.

[0094]

[0122] Figure 13 is a bottom view of another package substrate 1302 that may be provided in an antenna module 1300 that may be similar to antenna module 800 of Figure 8, but also includes a horizontally integrated patch antenna such as patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) in package substrates 1002, 1002A of Figures 10A-10D and 11. Common elements between package substrates 502, 702, 802 of Figures 5A-5D, 7, and 8 are indicated in package substrate 1302 of Figure 13 with common element numbers. 13 includes vertically integrated patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4) disposed adjacent a second side 1306 of the package substrate 1302 elongated in the X-axis direction, opposite a first side 1308 of the package substrate 1302 elongated in the X-axis direction. The patch antennas 704(2)(1)-704(2)(4) are configured to be EM coupled to their respective patch antennas 704(1)(1)-704(1)(4) to radiate coupled RF signals received by the patch antennas 704(2)(1)-704(2)(4) via the antenna feedlines. The radiation patterns of patch antennas 704(1)(1)-704(1)(4) are shown in first and second horizontal directions 718(1)-718(4) in the Y-axis direction due to the vertical orientation of patch antennas 704(1)(1)-704(1)(4) in the vertical direction (Z-axis direction) and the nature of their planar structures in the X-axis and Z-axis directions.

[0095]

[0123] Package substrate 1302 of FIG. 13 additionally includes vertically integrated patch antennas 804(1)(1) through 804(1)(4), 804(2)(1) through 804(2)(4), as in package substrate 802 of FIG. 8, disposed adjacent a first side 1308 of package substrate 1302. Patch antennas 804(2)(1) through 804(2)(4) are configured to be EM coupled to their respective patch antennas 804(1)(1) through 804(1)(4) to radiate coupled RF signals received by patch antennas 804(2)(1) through 804(2)(4) via antenna feedlines. The radiation patterns of patch antennas 804(1)(1) through 804(1)(4) are shown in first and second horizontal directions 818(1) through 818(4) in the Y-axis direction due to the vertical orientation of patch antennas 804(1)(1) through 804(1)(4) in the vertical direction (Z-axis direction) and the nature of their planar structures in the X-axis and Z-axis directions.

[0096]

[0124] The package substrate 1302 of the antenna module 1300 of FIG. 13 also includes patch antennas 1205(1)-1205(4) provided in the package substrate 1200 of FIG. 12. The description of these patch antennas 1205(1)-1205(4) with respect to FIG. 12 is also applicable to the package substrate 1302 of FIG. 13. The radiation patterns of the patch antennas 1205(1)-1205(4) are in the vertical direction (Z-axis direction) in first and second vertical directions 1219(1)-1219(4) as shown in FIG. 12 due to their horizontal orientation in the horizontal directions (X-axis and Y-axis directions) and the nature of their planar structure in the X-axis and Z-axis directions. Thus, the patch antennas 1205(1)-1205(4) may be formed in the package substrate 1302 to provide this additional radiation pattern to provide receive antenna coverage in the first and second vertical directions 1219(1)-1219(4). In this example, the patch antennas 1205(1)-1205(4) are provided in only one metallization layer of the package substrate 1202, similar to the patch antennas 1005(2)(1)-1005(2)(4) in the package substrates 1002, 1002A of FIGS. 10D and 11. However, this is not limiting. Corresponding patch antennas similar to the patch antennas 1005(1)(1)-1005(1)(4) in the package substrates 1002, 1002A of FIGS. 10D may be formed in the package substrate 1302 of FIG. 13 and configured to be EM coupled to the antenna feedline coupled patch antennas 1205(1)-1205(4). It should also be noted that any desired number of patch antennas may be included in the package substrate 1302.

[0097]

[0125] FIG. 14A is a side view of package substrate 1302 in antenna module 1300 of FIG. 13 showing examples of patch antennas 704(1)(1)-704(1)(4), 704(2)(1)-704(2)(4), 804(1)(1)-804(1)(4), and 804(2)(1)-804(2)(4). Package substrate 1302 in FIG. 14A is a side cross-sectional view taken along cross-section line A9-A9' in antenna module 1300 of FIG. 13. Thus, only four patch antennas are shown from the side in the side view of package substrate 1302 in FIG. 9A. In this example, patch antennas 704(1), 704(2) are shown to be any of the respective pairs of patch antennas 704(1)(1) through 704(1)(4), 704(2)(1) through 704(2)(4) in package substrate 1302 of FIG. 13. In this example, patch antennas 704(1), 704(2) may be structured like patch antennas 504(1), 504(2) of FIG. 5D, which are indicated by common element numbers in FIG. 14A. The description of patch antennas 504(1), 504(2) of FIG. 5D is applicable to patch antennas 504(1), 504(2) in package substrate 1302 in this example, and thus will not be described again.

[0098]

[0126] As shown in FIG. 14A, the package substrate 1302 includes a first metallization layer 506(1) including multiple metallization layers 532(1)-532(6) that are parallel to one another (e.g., stacked on top of one another) in the horizontal directions (X-axis and Y-axis directions) in respective horizontal planes as provided in the package substrate 502 of FIG. 5D. The second metallization layer 506(2) also includes multiple metallization layers 534(1)-534(6) that are parallel to one another in the horizontal directions (X-axis and Y-axis directions) in respective horizontal planes. The first metallization layer 506(1) is bonded to the core substrate 508, with the metallization layer 532(1) being bonded directly to the core substrate 508. The second metallization layer 506(2) is also bonded to the core substrate 508, with the metallization layer 534(1) being bonded directly to the core substrate 508. In this regard, core substrate 508 is disposed between first metallization layer 506(1) and second metallization layer 506(2). Metallization layers 532(1)-532(6) in first metallization layer 506(1) include respective metal interconnects 536 (e.g., metal lines, metal traces, metal posts) that are coupled to one another in adjacent metallization layers 532(1)-532(6) by vias 538 to form signal routing paths in first metallization layer 506(1).

[0099]

[0127] In this example, patch antennas 804(1), 804(2) are shown to be any of the respective pairs of patch antennas 804(1)(1)-804(1)(4), 804(2)(1)-804(2)(4) in package substrate 1302 of FIG. 13. Patch antennas 804(1), 804(2) may be structured as patch antennas 804(1)(1)-804(1)(4), 804(2)(1)-804(2)(4) in package substrate 1302 of FIG. 13, which are indicated by common element numbers in FIG. 14A. The description of patch antennas 804(1)(1)-804(1)(4), 804(2)(1)-804(2)(4) in FIG. 13 is applicable to patch antennas 804(1), 804(2) in package substrate 1302. Patch antennas 804(1), 804(2) are formed from a plurality of other metal interconnects 840(1), 840(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 532(1)-532(6) in first metallization layer 506(1) that are aligned vertically (in the Z-axis direction) and share respective common vertical planes P7, P8 in the X-axis and Z-axis directions. Respective metal interconnects 840(1), 840(2) in adjacent metallization layers 532(1)-532(6) are coupled to each other by respective vias 842(1), 842(2) disposed in respective adjacent metallization layers 532(1)-532(6). Respective metal interconnects 840(1), 840(2) are disposed parallel to each other in the horizontal directions (in the X-axis and Y-axis directions). In this manner, metal interconnects 840(1), 840(2), connected by respective vias 842(1), 842(2), form vertically integrated planar metal structures within first metallization layer 506(1) that form part of respective patch antennas 804(1), 804(2).

[0100]

[0128] Also in this example, patch antennas 804(1), 804(2) include respective vertical planar structures formed from a plurality of metal interconnects 844(1), 844(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 534(1)-534(6) in second metallization layer 506(2) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P7, P8. Respective metal interconnects 844(1), 844(2) in adjacent metallization layers 534(1)-534(6) are coupled to each other by respective vias 846(1), 846(2) disposed in respective adjacent metallization layers 534(1)-534(6). Respective metal interconnects 844(1), 844(2) are disposed parallel to each other in the horizontal directions (X-axis direction and Y-axis direction). In this manner, respective metal interconnects 844(1), 844(2) connected by respective vias 846(1), 846(2) form respective vertically integrated planar metal structures in the second metallization layer 506(2) that form portions of the patch antennas 804(1), 804(2). The core substrate 508 includes respective metal posts 848(1), 848(2) that are coupled to respective metal interconnects 840(1), 840(2) in metallization layer 532(1) in the first metallization layer 506(1) and to respective metal interconnects 844(1), 844(2) in metallization layer 534(1) in the second metallization layer 506(2).

[0101]

[0129] Thus, in this example, respective metal interconnects 840(1), 840(2) interconnected by respective vias 842(1), 842(2) in first metallization layer 506(1), respective metal interconnects 844(1), 844(2) interconnected by respective vias 846(1), 846(2) in second metallization layer 506(2), and respective metal posts 848(1), 848(2) form respective patch antennas 504(1), 504(2). In this example of FIG. 8, patch antennas 804(1), 804(2) each extend completely through all layers of package substrate 802. Patch antennas 804(1), 804(2), in this example, extend vertically (in the Z-axis direction) through each of metallization layers 532(1)-532(6) in first metallization layer 506(1), through each of metallization layers 534(1)-534(6) in second metallization layer 506(2), and through core substrate 508. Metal interconnects 850(1), 850(2) formed in solder resist layer 552 disposed on metallization layer 532(6) of first metallization layer 506(1) may function as respective antenna feeds 854(1), 854(2) to respective patch antennas 804(1), 804(2). It should be noted that in another exemplary embodiment, the respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in the first metallization layer 506(1) of the package substrate 1302 of FIG. 14A may not be coupled to the respective metal interconnects 544(1), 544(2) interconnected by respective vias 546(1), 546(2) in the second metallization layer 506(2).Metal posts 548(1), 548(2) shown in core substrate 508 interconnecting respective metal interconnects 540(1), 540(2), which are interconnected by respective vias 542(1), 542(2) in first metallization layer 506(1) to respective metal interconnects 544(1), 544(2), which are interconnected by respective vias 546(1), 546(2) in second metallization layer 506(2), may not be included. Thus, in this alternative embodiment, respective metal interconnects 540(1), 540(2) interconnected by respective vias 542(1), 542(2) in first metallization layer 506(1) form a first patch antenna in package substrate 502, and respective metal interconnects 544(1), 544(2) interconnected by respective vias 546(1), 546(2) in second metallization layer 506(2) each form four separate patch antennas in package substrate 502.

[0102]

[0130] 14A , like package substrate 1002 of FIGURES 10A-10D, package substrate 1302 of FIGURE 14A may also include patch antennas, such as patch antennas 1005(1)(1) through 1005(1)(4), 1005(2)(1) through 1005(2)(4) in package substrate 1002 of FIGURES 10A-10D. In this example, patch antennas 1005(1)(1) through 1005(1)(4), 1005(2)(1) through 1005(2)(4) are contained within respective metallization layers 534(5), 534(6) in package substrate 1302 of FIGURE 14A. Common elements relating to patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) between package substrate 1002 of Figures 10A-10D and package substrate 1302 of Figure 14A are indicated by common element numbers and will not be described again. Note that in the example of Figure 14A, each pair of patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) is contained within package substrate 1302, and patch antennas 1005(1)(1)-1005(1)(4) are EM coupled to patch antennas 1005(2)(1)-1005(2)(4), but are not limited thereto. For example, only patch antennas 1005(1)(1)-1005(1)(4) or patch antennas 1005(2)(1)-1005(2)(4) may be included in package substrate 1302 of FIG. 14A. Also, any desired number of patch antennas may be included on any given metallization layer 534(5) and / or 534(6) in package substrate 1302 of FIG. 14A. Patch antennas may also be included on any other metallization layer(s) 534(1)-534(4) in second metallization layer 506(1) or first metallization layer 506(1) of package substrate 1302 of FIG. 14A.

[0103]

[0131] Also, it should be noted that in another exemplary embodiment, respective metal interconnects 840(1), 840(2) interconnected by respective vias 842(1), 842(2) in the first metallization layer 506(1) of the package substrate 1302 of FIG. 14A may not be coupled to respective metal interconnects 844(1), 844(2) interconnected by respective vias 846(1), 846(2) in the second metallization layer 506(2). Metal posts 848(1), 848(2) shown in core substrate 508 interconnecting respective metal interconnects 840(1), 840(2), which are interconnected by respective vias 842(1), 842(2) in first metallization layer 506(1) to respective metal interconnects 844(1), 844(2), which are interconnected by respective vias 846(1), 846(2) in second metallization layer 506(2), may not be included. Thus, in this alternative embodiment, respective metal interconnects 840(1), 840(2) interconnected by respective vias 842(1), 842(2) in first metallization layer 506(1) form a first patch antenna in package substrate 502, and respective metal interconnects 844(1), 844(2) interconnected by respective vias 846(1), 846(2) in second metallization layer 506(2) each form four separate vertically integrated patch antennas in package substrate 802.

[0104]

[0132] FIG. 14B is a side view of an alternative package substrate 1302A similar to the package substrate 1302 of FIG. 14A, with alternative vertically integrated patch antennas 704A(1), 704A(2), 804A(1), 804A(2) vertically integrated in the vertical direction (Z-axis direction) only in the first metallization layer 506(1). Common elements between the package substrate 1302 of FIG. 14A, the package substrate 1302A of FIG. 14B, and the package substrate 802A of FIG. 9B are indicated by common element numbers. Thus, the discussion of these common elements is also applicable to the package substrate 1302A of FIG. 14B. The package substrate 1302A of FIG. 14B is a side cross-sectional view taken along the A9-A9′ cross-section line in the package substrate 1302 of FIG. 13.

[0105]

[0133] As shown in FIG. 14B, patch antennas 704A(1), 704A(2) are formed from a plurality of other respective metal interconnects 540(1), 540(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 532(1)-532(6) in first metallization layer 506(1) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P7, P8. Respective metal interconnects 540(1), 540(2) in adjacent metallization layers 532(1)-532(6) are coupled to each other by respective vias 542(1), 542(2) disposed in respective adjacent metallization layers 532(1)-532(6). Respective metal interconnects 540(1), 540(2) are disposed parallel to each other in the horizontal directions (X-axis direction and Y-axis direction). In this manner, respective metal interconnects 540(1), 540(2) connected by respective vias 542(1), 542(2) form adjacent vertically integrated planar metal structures in first metallization layer 506(1), which in this example form patch antennas 504A(1), 504A(2).

[0106]

[0134] In this manner, respective metal interconnects 540(1), 540(2), interconnected by respective vias 542(1), 542(2) in first metallization layer 506(1), form respective patch antennas 704A(1), 704A(2) in this example. Thus, patch antennas 704A(1), 704A(2) do not extend into core substrate 508 or second metallization layer 506(2) of package substrate 1302A in this example of FIG. 14B. As in package substrate 1302 of FIG. 14A , metal interconnects 550(1), 550(2) formed in a solder resist layer 552 disposed on metallization layer 532(6) of first metallization layer 506(1) can serve as antenna feedlines 554(1), 554(2) to patch antennas 504A(1), 504A(2), respectively.

[0107]

[0135] As shown in FIG. 14B, the patch antennas 804A(1) and 804A(2) are aligned in the vertical direction (Z-axis direction) and are aligned along common vertical planes P9 and P 10 Each of the metal interconnects 840(1), 840(2) is formed from a plurality of other respective metal interconnects 840(1), 840(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 532(1)-532(6) in the first metallization layer 506(1) that share a common via 842(1), 842(2) with each other. The respective metal interconnects 840(1), 840(2) in adjacent metallization layers 532(1)-532(6) are coupled to each other by respective vias 842(1), 842(2) disposed in each adjacent metallization layer 532(1)-532(6). The respective metal interconnects 840(1), 840(2) are disposed parallel to each other in the horizontal directions (X-axis and Y-axis directions). In this manner, respective metal interconnects 840(1), 840(2) connected by respective vias 842(1), 842(2) form adjacent vertically integrated planar metal structures within first metallization layer 506(1), which in this example form patch antennas 804A(1), 804A(2).

[0108]

[0136] In this manner, respective metal interconnects 840(1), 840(2), interconnected by respective vias 842(1), 842(2) in first metallization layer 506(1) of package substrate 1302A of Figure 14B, form respective patch antennas 804A(1), 804A(2) in this example. Thus, patch antennas 804A(1), 804A(2) do not extend into core substrate 508 or second metallization layer 506(2) of package substrate 1302A in this example of Figure 14B. As in package substrate 1302 of FIG. 14A , metal interconnects 850(1), 850(2) formed in a solder resist layer 552 disposed on metallization layer 532(6) of the first metallization layer 506(1) can serve as antenna feeds 854(1), 854(2) to patch antennas 804A(1), 804A(2), respectively.

[0109]

[0137] 14B, like package substrate 1002 of FIGURES 10A-10D, package substrate 1302A of FIGURE 14B may also include patch antennas, such as patch antennas 1005(1)(1) through 1005(1)(4), 1005(2)(1) through 1005(2)(4) in package substrate 1002 of FIGURES 10A-10D. In this example, patch antennas 1005(1)(1) through 1005(1)(4), 1005(2)(1) through 1005(2)(4) are contained within respective metallization layers 534(5), 534(6) in package substrate 1302A of FIGURE 14B. Common elements relating to patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) between package substrate 1002 of Figures 10A-10D and package substrate 1302A of Figure 14B are indicated by common element numbers and will not be described again. Note that in the example of Figure 14B, each pair of patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) is contained within package substrate 1302A, and patch antennas 1005(1)(1)-1005(1)(4) are EM-coupled to patch antennas 1005(2)(1)-1005(2)(4), but are not limited thereto. For example, only patch antennas 1005(1)(1)-1005(1)(4) or patch antennas 1005(2)(1)-1005(2)(4) may be included in package substrate 1302 of FIG. 14A. Also, any desired number of patch antennas may be included on any given metallization layer 534(5) and / or 534(6) in package substrate 1302A of FIG. 14B. Patch antennas may also be included on any other metallization layer(s) 534(1)-534(4) in second metallization layer 506(1) or first metallization layer 506(1) of package substrate 1302A of FIG. 14B.

[0110]

[0138] 14B may be provided such that the patch antenna is provided in the second metallization layer 506(2) and not in the first metallization layer 506(1). In this regard, as shown in FIG. 14A, in this alternative embodiment, the patch antenna would be formed from a plurality of other respective metal interconnects 544(1), 544(2) (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 534(1)-534(6) in the second metallization layer 506(2) that are aligned in the vertical direction (Z-axis direction) and share respective common vertical planes P6, P7. Also in this regard, as shown in package substrate 1302 of FIG. 14A, in this alternative embodiment, the patch antenna will be formed from multiple other respective metal interconnects 844(1), 844(2) (e.g., metal wires, metal traces, metal posts) in respective separate metallization layers 534(1)-534(6) in second metallization layer 506(2) that are vertically aligned (in the Z-axis direction) and share respective common vertical planes P4, P5.

[0111]

[0139] There are various ways in which a package substrate including a vertically integrated patch antenna, such as the package substrate 202, 502, 502A, 702, 802, 802A, 1002, 1202, 1302, 1302A of Figures 2-14B, can be formed and manufactured. Figure 15 is a flow chart illustrating an exemplary manufacturing process 1500 for manufacturing a package substrate including a vertically integrated patch antenna. The manufacturing process 1500 of Figure 15 is discussed with respect to the package substrate 202 of Figures 2-3D, as an example.

[0112]

[0140] In this regard, the manufacturing process 1500 includes forming a plurality of metallization layers 302(1)-302(6), 304(1)-304(6) (block 1502 of FIG. 15). Forming the plurality of metallization layers 302(1)-302(6), 304(1)-304(6) may include forming a dielectric layer 303(1)-303(6), 305(1)-305(6) for each respective metallization layer 302(1)-302(6), 304(1)-304(6) (block 1504 of FIG. 15) and forming a dielectric layer 303(1)-303(6), 305(1)-305(6) for each respective metallization layer 302(1)-302(6), 304(1)-304(6). forming (block 1506 of FIG. 15 ) metal interconnects 310, 314 in the respective dielectric layers (303(1)-303(6), 305(1)-305(6)); and forming (block 1508 of FIG. 15 ) vias 308, 312, 316 coupled to the respective metal interconnects 310, 314 in the respective dielectric layers (303(1)-303(6), 305(1)-305(6)). The manufacturing process 1500 also includes forming an antenna feedline 324 including at least one second metal interconnect(s) 306, 310, 314 in at least one metallization layer(s) 302(1)-302(6), 304(1)-304(6) of the plurality of metallization layers 302(1)-302(6), 304(1)-304(6) (block 1510 of FIG. 15 ). The manufacturing process 1500 also illustrates how each metal interconnect 310, 314 in the plurality of metallization layers 302(1)-302(6), 304(1)-304(6) shares a common vertical plane P1, and how each via 312, 316 in the plurality of metallization layers 302(1)-302(6), 304(1)-304(6) is connected to a neighboring one of the plurality of metallization layers 302(1)-302(6), 304(1)-304(6). This includes bonding multiple metallization layers 302(1)-302(6), 304(1)-304(6) horizontally (in the x-axis and y-axis directions) parallel to one another (e.g., stacked on top of one another) in respective horizontal planes to bond adjacent metal interconnects 310, 314 in abutting metallization layers 302(1)-302(6), 304(1)-304(6) (block 1512 of FIG. 15 ).The metal interconnects 310, 314 in the multiple metallization layers 302(1)-302(6), 304(1)-304(6) are coupled by vias 312, 316 in the multiple metallization layers 302(1)-302(6), 304(1)-304(6) to form the patch antenna 204. The manufacturing process 1500 also includes coupling an antenna feedline 324 to the patch antenna 204 (block 1514 of FIG. 15 ).

[0113]

[0141] Other manufacturing methods are possible. For example, Figures 16A and 16B show another exemplary manufacturing process 1600 for manufacturing a package substrate including a vertically integrated patch antenna(s) without other horizontally integrated patch antennas, including but not limited to the package substrates 202, 502, 502A, 702, 802, 802A of Figures 2-9B. Figures 17A-17D show exemplary manufacturing stages 1700A-1700D during the manufacturing of a package substrate including a patch antenna according to the exemplary manufacturing process 1600 of Figures 16A and 16B, respectively. The exemplary manufacturing process 1600 of Figures 16A and 16B will now be discussed with reference to the exemplary manufacturing stages 1700A-1700D of Figures 17A-17D, using the package substrate 202 of Figures 2-3D as an example. However, it should be noted that the manufacturing process 1600 of Figures 16A and 16B may be adopted to manufacture other packaging substrates that include a patch antenna(s).

[0114]

[0142] In this regard, as shown in example manufacturing stage 1700A of FIG. 17A, the first example step of manufacturing process 1600 of FIG. 16A is to form core substrate 208 (block 1602 of FIG. 16A). Core substrate 208 may be formed of a ferroelectric material 1702 in dielectric layer 1704 having a desired stiffness to resist bending or warping. Metal posts 222 are formed in dielectric layer 1704 to support metal interconnects in other substrates that are placed in contact with core substrate 208.

[0115]

[0143] As shown in the exemplary manufacturing stage 1700B of FIG. 17B, the next exemplary step in the manufacturing process 1600 of FIG. 16A is to form metallization layer 302(1) and metallization layer 304(1) coupled to core substrate 208 (block 1704 of FIG. 16A). Metal interconnects 310, 314 are formed in dielectric layers 303(1), 305(1) of metallization layer 302(1) and metallization layer 304(1), respectively, that will be used to form the patch antenna. Vias 312, 316 formed in contact with metal interconnects 310, 314 in metallization layers 302(1), 304(1) are formed to couple adjacent metal interconnects 310, 314 together to form the patch antenna. Metal posts 318 are formed in core substrate 208 and coupled to metal interconnects 310, 314. For example, metal interconnects 310, 314 formed in metallization layers 302(1), 304(1) may be drilled to form openings that are filled with metal material to form vias 312, 316 and metal posts 318. In this example, metal interconnects 310, 314 are formed to be aligned with one another in the vertical direction (Z-axis direction) such that metal interconnects 310, 314 share a common vertical plane P1. Other metal interconnects 306 may be formed in metallization layers 302(1) and 304(1) for signal routing, as shown in metallization layer 304(1) at manufacturing stage 1700B in FIG. 17B .

[0116]

[0144] As shown in example manufacturing stage 1700C of FIG. 17C, additional metallization layers 302(2)-302(4) as part of first metallization layer 206(1) and metallization layers 304(2)-304(4) as part of second metallization layer 206(2) are formed on respective previously formed metallization layers 302(1), 304(1) on core substrate 208 (block 1606 of FIG. 16B). Metal interconnects 310, 314 are formed in respective dielectric layers 303(2)-303(4), 305(2)-305(4) of metallization layers 302(2)-302(4) and metallization layers 304(2)-304(4) that will be used to form the patch antenna. Vias 312, 316 are formed in contact with adjacent metal interconnects 310, 314 in metallization layers 302(2)-302(4), 304(2)-304(4) to couple adjacent metal interconnects 310, 314 together to form patch antenna 204. In this example, metal interconnects 310, 314 are formed to be aligned with one another in the vertical direction (Z-axis direction) such that metal interconnects 310, 314 share a common vertical plane P1.

[0117]

[0145] As shown in example manufacturing stage 1700D of FIG. 17D , additional metallization layers 302(5)-302(6) as part of first metallization layer 206(1) and metallization layers 304(5)-304(6) as part of second metallization layer 206(2) are formed on previously formed metallization layers 302(4), 304(4) on core substrate 208 (block 1608 of FIG. 16B ). Metal interconnects 310, 314 are formed in dielectric layers 303(5)-303(6), 305(5)-305(6) of metallization layers 302(5)-302(6) and metallization layers 304(5)-304(6), respectively, to form patch antenna 204 in package substrate 202. Vias 312, 316 are formed in contact with adjacent metal interconnects 310, 314 in metallization layers 302(2)-302(4), 304(2)-304(4) to couple adjacent metal interconnects 310, 314 together to form patch antenna 204.

[0118]

[0146] 18A-18C are flow charts illustrating another exemplary manufacturing process 1800 that may be used to manufacture a package substrate including a vertical integrated patch antenna(s) and also including a horizontal integrated patch antenna(s), including but not limited to the package substrates 1002, 1202, 1302, 1302A of FIGS. 10A-14B. FIGS. 19A-19D illustrate exemplary manufacturing stages 1900A-1900D, respectively, during the manufacturing of a package substrate including a vertical integrated patch antenna and a horizontal integrated patch antenna(s) according to the exemplary manufacturing process 1800 of FIGS. 18A-18C. The exemplary manufacturing process 1800 of FIGS. 18A-18C will now be discussed with respect to the exemplary manufacturing stages 1900A-1900D of FIGS. 19A-19E. 19A-19D illustrate manufacturing stages 1900A-1900D of the manufacture of the package substrate 1002 of FIG. 10D. The previous discussion of the package substrate 1002 of FIG. 10D above is also applicable to the manufacturing stages 1900A-1900D of FIG. 19A-19D. However, it should be noted that the manufacturing process 1800 of FIG. 18A-18C may be employed to manufacture other package substrates including vertical integrated patch antenna(s) and horizontal integrated patch antenna(s), including but not limited to the package substrates 1202, 1302, 1302A of FIG. 12A-14B.

[0119]

[0147] In this regard, as shown in the exemplary manufacturing stage 1900A of FIG. 19A, the first exemplary step in the manufacturing process 1800 of FIG. 18A is to form a core substrate 1008 (block 1802 of FIG. 18A). The core substrate 208 may be formed of a ferroelectric material 1902 in a dielectric layer 1904 having a desired stiffness to resist bending or warping. Metal posts 1906 are formed in the dielectric layer 1904 to support metal interconnects in other substrates that are placed in contact with the core substrate 208.

[0120]

[0148] As shown in the exemplary manufacturing stage 1900B of FIG. 19B, the next exemplary step in the manufacturing process 1800 of FIG. 18A is to form a metallization layer 1032(1) and a metallization layer 1034(1) coupled to the core substrate 1008 (block 1804 of FIG. 18A). Metal interconnects 1044, 1044 are formed in the dielectric layers 1003(1), 1005(1) of the metallization layers 1032(1) and 1034(1), respectively, that will be used to form the vertically integrated patch antenna. Vias 1042, 1046 are formed in contact with the respective metal interconnects 1040, 1044 in the metallization layers 1032(1), 1034(1) to couple adjacent respective metal interconnects 1040, 1044 together to form the patch antenna. Metal posts 1018 are formed in core substrate 1008 and are coupled to respective metal interconnects 1040, 1044. For example, metal interconnects 1040, 1044 formed in metallization layers 1032(1), 1034(1) may be drilled to form openings that are filled with metal material to form vias 1042, 1046 and metal posts 1018. In this example, metal interconnects 1040, 1044 are formed to be aligned with one another in the vertical direction (Z-axis direction) such that metal interconnects 1040, 1044 share a common vertical plane P6. Other metal interconnects 1036 may be formed in metallization layers 1032(1) and 1034(1) for signal routing, as shown in metallization layer 1034(1) at manufacturing stage 1900B in FIG. 19B.

[0121]

[0149] As shown in example manufacturing stage 1900C of FIG. 19C, additional metallization layers 1032(2)-1032(4) as part of first metallization layer 1006(1) and metallization layers 1034(2)-1034(4) as part of second metallization layer 1006(2) are formed on previously formed metallization layers 1032(1), 1034(1) on core substrate 1008 (block 1806 of FIG. 18B). Metal interconnects 1040, 1044 are formed in dielectric layers 1003(2)-1003(4), 1005(2)-1005(4) of metallization layers 1032(2)-1032(4) and metallization layers 1034(2)-1034(4), respectively, that will be used to form the patch antenna. Vias 1042, 1046 are formed in contact with respective adjacent metal interconnects 1040, 1044 in respective metallization layers 1032(2)-1032(4), 1034(2)-1034(4) to couple adjacent metal interconnects 1040, 1044 together to form patch antenna 1004. In this example, respective metal interconnects 1040, 1044 are formed to be vertically aligned with one another (in the Z-axis direction) such that metal interconnects 1040, 1044 share a common vertical plane P6.

[0122]

[0150] As shown in example manufacturing stage 1900D of FIG. 19D , additional metallization layers 1032(5)-1032(6) as part of first metallization layer 1006(1) and metallization layers 1034(5)-1034(6) as part of second metallization layer 1006(2) are formed on previously formed metallization layers 1032(4), 1032(4), respectively, on core substrate 1008 (block 1808 of FIG. 18C ). Metal interconnects 1040, 1044 are formed in dielectric layers 1003(5)-1003(6), 1005(5)-1005(6) of metallization layers 1032(5)-1032(6) and metallization layers 1034(5)-1034(6), respectively, to form patch antenna 1004 in package substrate 1002. Vias 1042, 1046 are formed in contact with adjacent metal interconnects 1040, 1044 in metallization layers 1032(2)-1032(4), 1034(2)-1034(4) to couple adjacent metal interconnects 1040, 1044 together to form patch antenna 1004. Patch antennas 1005(1)(1)-1005(1)(4), 1005(2)(1)-1005(2)(4) are also formed as metal interconnects 1060 (e.g., metal lines, metal traces, metal posts) in respective separate metallization layers 1034(5), 1034(6), in this example, a second metallization layer 1006(2). In this example, the metal interconnection 1060 has horizontal planes P that are elongated in horizontal directions (X-axis and Y-axis directions) perpendicular to the vertical direction (Z-axis direction) to form the patch antennas 1005(1)(1) to 1005(1)(4) and 1005(2)(1) to 1005(2)(4). 1-H , P 2-H Therefore, the radiation patterns of patch antennas 1005(1)(1)-1005(1)(4) and 1005(2)(1)-1005(2)(4) are in first and second horizontal directions 1019(1)-1019(4) in the vertical (Z-axis direction), as shown in FIG. 19D and FIG. 10D.

[0123]

[0151] In discussing the above example packaging substrates, it should be noted that the use of the terms "vertical" and "horizontal" in describing such examples are relative terms to one another. The vertical direction can be an axis in a direction perpendicular to the horizontal direction. The vertical plane can be in two directional axes (e.g., X-axis and Z-axis directions) perpendicular to the horizontal plane of two other directional axes (e.g., X-axis and Y-axis directions).

[0124]

[0152] A packaging substrate including one or more vertically integrated patch antennas by any of the manufacturing processes of Figures 15-16B and Figures 18A-18B, including but not limited to the packaging substrates of Figures 2-14B, Figures 17A-17D, and Figures 19A-19D, may be provided or integrated into any wireless communication device and / or processor-based device. Examples include, but are not limited to, set-top boxes, entertainment units, navigation devices, communication devices, fixed location data units, mobile location data units, global positioning system (GPS) devices, mobile phones, mobile phones, smartphones, session initiation protocol (SIP) phones, tablets, phablets, servers, computers, portable computers, mobile computing devices, wearable computing devices (e.g., smart watches, health or fitness trackers, eyewear, etc.), desktop computers, personal digital assistants (PDAs), monitors, computer monitors, televisions, tuners, radios, satellite radios, music players, digital music players, portable music players, digital video players, video players, digital video disc (DVD) players, portable digital video players, automobiles, vehicle components, avionics systems, drones, and multicopters.

[0125]

[0153] FIG. 20 illustrates an exemplary wireless communication device 2000 including an RF component formed from one or more ICs 2002, any of which may be included in an RFIC package 2003 employing a package substrate including one or more vertically integrated patch antennas by any of the manufacturing processes of FIGS. 15-16B and 18A-18B, including but not limited to the package substrates in FIGS. 2-14B, 17A-17D, and 19A-19D. The wireless communication device 2000 may include or be provided within any of the devices referenced above, as examples. As shown in FIG. 20, the wireless communication device 2000 includes a transceiver 2004 and a data processor 2006. The data processor 2006 may include a memory that stores data and program codes. The transceiver 2004 includes a transmitter 2008 and a receiver 2010 supporting bidirectional communication. In general, wireless communication device 2000 may include any number of transmitters 2008 and / or receivers 2010 for any number of communication systems and frequency bands. All or a portion of the transceiver 2004 may be implemented on one or more analog ICs, RFICs, mixed-signal ICs, etc.

[0126]

[0154] The transmitter 2008 or receiver 2010 may be implemented with a super-heterodyne architecture or a direct-conversion architecture. In a super-heterodyne architecture, the signal is frequency converted between RF and baseband in multiple stages, e.g., from RF to intermediate frequency (IF) in one stage and then from IF to baseband in another stage for the receiver 2010. In a direct-conversion architecture, the signal is frequency converted between RF and baseband in one stage. The super-heterodyne and direct-conversion architectures may use different circuit blocks and / or have different requirements. In the wireless communication device 2000 of FIG. 20, the transmitter 2008 and receiver 2010 are implemented with a direct-conversion architecture.

[0127]

[0155] On the transmit path, a data processor 2006 processes data to be transmitted and provides I and Q analog output signals to a transmitter 2008. In the example wireless communication device 2000, the data processor 2006 includes digital-to-analog converters (DACs) 2012(1), 2012(2) that convert digital signals generated by the data processor 2006 into I and Q analog output signals, e.g., I and Q output currents, for further processing.

[0128]

[0156] Within the transmitter 2008, low pass filters 2014(1), 2014(2) filter the I and Q analog output signals, respectively, to remove undesired signals caused by the previous digital-to-analog conversion. Amplifiers (AMPs) 2016(1), 2016(2) amplify the signals from the low pass filters 2014(1), 2014(2), respectively, and provide I and Q baseband signals. An upconverter 2018 upconverts the I and Q baseband signals along with I and Q transmit (TX) local oscillator (LO) signals from a TX LO signal generator 2022 through mixers 2020(1), 2020(2) to provide an upconverted signal 2024. A filter 2026 filters the upconverted signal 2024 to remove undesired signals as well as noise in the receive frequency band caused by the frequency upconversion. A power amplifier (PA) 2028 amplifies the upconverted signal 2024 from filter 2026 to obtain a desired output power level and provides a transmit RF signal. The transmit RF signal is routed through a duplexer or switch 2030 and transmitted via an antenna 2032.

[0129]

[0157] In the receive path, an antenna 2032 receives a signal transmitted by a base station and provides a receive RF signal that is routed through a duplexer or switch 2030 and provided to a low noise amplifier (LNA) 2034. The duplexer or switch 2030 is designed to operate with a specific RX to TX duplexer frequency separation such that the receive (RX) signal is isolated from the TX signal. The receive RF signal is amplified by the LNA 2034 and filtered by a filter 2036 to obtain a desired RF input signal. Downconversion mixers 2038(1), 2038(2) mix the output of the filter 2036 with I and Q RX LO signals (i.e., LO_I and LO_Q) from a RX LO signal generator 2040 to generate I and Q baseband signals. The I and Q baseband signals are amplified by AMPs 2042(1), 2042(2) and further filtered by low pass filters 2044(1), 2044(2) to obtain I and Q analog input signals that are provided to the data processor 2006. In this example, the data processor 2006 includes analog-to-digital converters (ADCs) 2046(1), 2046(2) that convert the analog input signals to digital signals for further processing by the data processor 2006.

[0130]

[0158] In the wireless communication device 2000 of FIG. 20, a TX LO signal generator 2022 generates I and Q TX LO signals used for frequency up-conversion, and a RX LO signal generator 2040 generates I and Q RX LO signals used for frequency down-conversion. Each LO signal is a periodic signal having a particular fundamental frequency. A TX phase-locked loop (PLL) circuit 2048 receives timing information from the data processor 2006 and generates a control signal used to adjust the frequency and / or phase of the TX LO signal from the TX LO signal generator 2022. Similarly, a RX PLL circuit 2050 receives timing information from the data processor 2006 and generates a control signal used to adjust the frequency and / or phase of the RX LO signal from the RX LO signal generator 2040.

[0131]

[0159] FIG. 21 illustrates an example of a processor-based system 2100. A component of the processor-based system 2100 is an IC 2102. Some or all of the ICs 2102 in the processor-based system 2100 may be provided as an IC package 2104 employing a package substrate including one or more vertically integrated patch antennas according to any of the manufacturing processes of FIGS. 15-16B and 18A-18B, including but not limited to the package substrates of FIGS. 2-14B, 17A-17D, and 19A-19D, and according to any aspect disclosed herein. In this example, the processor-based system 2100 may be formed as an IC package 2104 as a system-on-a-chip (SoC) 2106. The processor-based system 2100 includes a CPU 2108 including one or more processors 2110, sometimes referred to as CPU cores or processor cores. The CPU 2108 may have a cache memory 2112 coupled to the CPU 2108 for rapid access to temporarily stored data. The CPU 2108 may be coupled to a system bus 2114 to interconnect master and slave devices included within the processor-based system 2100. As is well known, the CPU 2108 communicates with these other devices by exchanging address, control, and data information via the system bus 2114. For example, the CPU 2108 may communicate bus transaction requests to the memory controller 2116, as an example of a slave device. Although not shown in FIG. 21, multiple system buses 2114 may be provided, with each system bus 2114 constituting a different fabric.

[0132]

[0160] Other master and slave devices may be connected to the system bus 2114. As shown in FIG. 21, these devices may include, by way of example, a memory system 2120 including a memory controller 2116 and a memory array(s) 2118, one or more input devices 2122, one or more output devices 2124, one or more network interface devices 2126, and one or more display controllers 2128. Each of the memory system 2120, the one or more input devices 2122, the one or more output devices 2124, the one or more network interface devices 2126, and the one or more display controllers 2128 may be provided within the same or different IC packages. The input device(s) 2122 may include any type of input device, including, but not limited to, input keys, switches, voice processors, and the like. The output device(s) 2124 may include any type of output device, including, but not limited to, audio, video, other visual indicators, and the like. The network interface device(s) 2126 may be any device configured to enable the exchange of data to and from the network 2130. The network 2130 may be any type of network, including, but not limited to, a wired or wireless network, a private or public network, a local area network (LAN), a wireless local area network (WLAN), a wide area network (WAN), a BLUETOOTH™ network, and the Internet. The network interface device(s) 2126 may be configured to support any type of communication protocol desired.

[0133]

[0161] The CPU 2108 may also be configured to access a display controller(s) 2128 via the system bus 2114 to control information sent to one or more displays 2132. The display controller(s) 2128 send information to the display(s) 2132 for display via one or more video processors 2134, which process the information to be displayed into a format suitable for the display(s) 2132. The display controller(s) 2128 and the video processor(s) 2134 may be included as IC package 2104 and in the same or different IC package that includes the CPU 2108, as an example. The display(s) 2132 may include any type of display, including, but not limited to, a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, a light emitting diode (LED) display, etc.

[0134]

[0162] Those skilled in the art will further appreciate that the various exemplary logic blocks, modules, circuits, and algorithms described in connection with the aspects disclosed herein may be implemented as electronic hardware, as instructions stored in a memory or in another computer-readable medium and executed by a processor or other processing device, or as a combination of both. The memories disclosed herein may be of any type and size and may be configured to store any type of information desired. To clearly illustrate this interchangeability, various exemplary components, blocks, modules, circuits, and steps have been generally described above in terms of their functionality. How such functionality is implemented will depend on the particular application, design choices, and / or design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in various ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

[0135]

[0163] The various example logic blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented or performed using a processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The processor may be a microprocessor, but alternatively the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration).

[0136]

[0164] Aspects disclosed herein may be embodied in hardware or instructions stored in the hardware and may reside in, for example, a Random Access Memory (RAM), a flash memory, a Read Only Memory (ROM), an Electrically Programmable ROM (EPROM), an Electrically Erasable Programmable ROM (EEPROM), a register, a hard disk, a removable disk, a CD-ROM, or any other form of computer readable medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. Alternatively, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a remote station. Alternatively, the processor and the storage medium may reside as discrete components in a remote station, base station, or server.

[0137]

[0165] It should also be noted that the operational steps described in any of the exemplary aspects herein are described to provide examples and discussion. The described operations may be performed in many different sequences other than the sequence shown. Furthermore, an operation described in a single operational step may actually be performed in several different steps. In addition, one or more operational steps discussed in the exemplary aspects may be combined. It should be understood that many different modifications may be made to the operational steps shown in the flow chart diagrams, as would be readily apparent to one of ordinary skill in the art. Those skilled in the art will also understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referred to throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof.

[0138]

[0166] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other variations. Thus, the disclosure is not intended to be limited to the examples and designs described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0139]

[0167] The following numbered clauses describe example implementations. 1. a plurality of first metallization layers parallel to one another in a first direction; A first patch antenna, a plurality of first metal interconnects each disposed within a separate first metallization layer of the plurality of first metallization layers; a plurality of first metal interconnects, each of the plurality of first metal interconnects sharing a first common plane in a second direction orthogonal to the first direction; a plurality of first vias, each disposed within a separate first metallization layer of the plurality of first metallization layers, each coupling adjacent first metal interconnects of the plurality of first metallization layers in adjacent first metallization layers of the plurality of first metallization layers; a first patch antenna, a first antenna feed line coupled to the first patch antenna; a package substrate. 2. A package substrate as described in clause 1, wherein each of the plurality of first metal interconnects are arranged parallel to one another in a first direction. 3. The package substrate of clause 1 or 2, wherein the plurality of first vias includes a plurality of first elongated vias, each elongated in a first direction to form a planar structure in a first common plane, each coupling adjacent first metal interconnects of the plurality of first metallization layers in adjacent first metallization layers of the plurality of first metallization layers. 4. The package substrate of claim 3, wherein the planar structure has a trench shape. 5. The packaging substrate of clause 3 or 4, wherein each of the plurality of first elongated vias comprises a trench. 6. The packaging substrate of any one of clauses 1 to 5, wherein the first patch antenna is rectangular. 7. The packaging substrate of any one of clauses 1-6, wherein the first patch antenna is configured to radiate a radio frequency (RF) signal received from the first antenna feed line. 8. The package substrate of any one of clauses 1-7, further comprising a plurality of second metallization layers parallel to the plurality of first metallization layers in a first direction, the first patch antenna is not disposed within the plurality of second metallization layers; 8. A package substrate according to any one of claims 1 to 7. 9. The package substrate of claim 8, further comprising a core substrate disposed between the plurality of first metallization layers and the plurality of second metallization layers, The first patch antenna is not further disposed within the core substrate; 9. A packaging substrate as defined in clause 8. 10. a second patch antenna, a plurality of third metal interconnects each disposed within a separate second metallization layer of the plurality of second metallization layers; a plurality of third metal interconnects, each of the third metal interconnects sharing a third common plane in the second direction; a plurality of second vias, each disposed within a separate second metallization layer of the plurality of second metallization layers, each coupling adjacent third metal interconnects of the plurality of third metal interconnects in adjacent second metallization layers of the plurality of second metallization layers; a second patch antenna, a second antenna feed line coupled to the second patch antenna; 10. The package substrate of claim 8 or 9, further comprising: 11. the plurality of first metallization layers includes a first outer metallization layer and a second outer metallization layer; a plurality of first metal interconnects each disposed within each of the plurality of first metallization layers; 8. A package substrate according to any one of claims 1 to 7. 12. a plurality of second metallization layers parallel to the plurality of first metallization layers in a first direction; a core substrate disposed between a plurality of first metallization layers and a plurality of second metallization layers; 12. The package substrate of any one of claims 1 to 7 and 11, further comprising: A first patch antenna a plurality of third metal interconnects each disposed within a separate second metallization layer of the plurality of second metallization layers; a plurality of third metal interconnects, each of the plurality of third metal interconnects sharing a second common plane in a second direction; a plurality of second vias, each disposed within a separate second metallization layer of the plurality of second metallization layers, each coupling adjacent third metal interconnects of the plurality of third metal interconnects in adjacent second metallization layers of the plurality of second metallization layers; metal posts disposed within the core substrate electrically coupling the plurality of first metal interconnects to the plurality of third metal interconnects; Further comprising: 12. A package substrate according to any one of claims 1 to 7 and 11. 13. A second patch antenna, at least one third metal interconnect disposed in a first metallization layer of the plurality of first metallization layers and in a second plane in a first direction; a second antenna feed line coupled to the first patch antenna; 13. The packaging substrate of any one of clauses 1-7, 11, and 12, further comprising a second patch antenna comprising: 14. The packaging substrate of claim 13, wherein the first patch antenna is rectangular. 15. a first patch antenna having a first antenna radiation pattern extending in a first direction; a second patch antenna having a second antenna radiation pattern extending in a second direction orthogonal to the first direction; 15. A packaging substrate according to clause 13 or 14. 16. The package substrate of any of clauses 13-15, further comprising a third patch antenna including at least one fifth metal interconnect disposed in a third plane in the first direction within a second metallization layer of the plurality of second metallization layers. 17. The package substrate of claim 16, wherein the second patch antenna is configured to be electromagnetically (EM) coupled to the first patch antenna in response to the first patch antenna radiating a radio frequency (RF) signal received from the second antenna feed line. 18. a first patch antenna having a first antenna radiation pattern extending in a first direction; a third patch antenna having a second antenna radiation pattern extending in a second direction orthogonal to the first direction; 18. The packaging substrate of clause 17. 19. A second patch antenna, a plurality of third metal interconnects each disposed within a distinct first metallization layer of the plurality of first metallization layers; a plurality of third metal interconnects, each of the plurality of third metal interconnects sharing a second common plane parallel to the first common plane in a second direction; a plurality of second vias, each disposed within a separate first metallization layer of the plurality of first metallization layers, each coupling adjacent third metal interconnects of the plurality of third metal interconnects in adjacent first metallization layers of the plurality of first metallization layers; 8. The packaging substrate of any one of clauses 1-7, further comprising a second patch antenna comprising: 20. The package substrate of clause 19, wherein the first patch antenna is configured to be electromagnetically (EM) coupled to the second patch antenna in response to the first patch antenna radiating a radio frequency (RF) signal received from the first antenna feed line. 21. The package substrate of claim 21, further comprising a plurality of second metallization layers parallel to the plurality of first metallization layers in a first direction; the first patch antenna is not disposed within the plurality of second metallization layers; the second patch antenna is not disposed within the plurality of second metallization layers; 21. A packaging substrate according to clause 19 or 20. 22. The package substrate of claim 21, further comprising a core substrate disposed between the plurality of first metallization layers and the plurality of second metallization layers; The first patch antenna is not further disposed within the core substrate; The second patch antenna is not further disposed within the core substrate. 22. The packaging substrate of claim 21. twenty three. a third patch antenna, a plurality of fourth metal interconnects each disposed within a distinct second metallization layer of the plurality of second metallization layers; a plurality of fourth metal interconnects, each of the plurality of fourth metal interconnects sharing a common third plane in the second direction; a plurality of third vias, each disposed within a separate second metallization layer of the plurality of second metallization layers, each coupling adjacent fourth metal interconnects of the plurality of fourth metal interconnects in adjacent second metallization layers of the plurality of second metallization layers; a third patch antenna, a second antenna feed line coupled to the third patch antenna; a fourth patch antenna, a plurality of sixth metal interconnects each disposed within a distinct second metallization layer of the plurality of second metallization layers; a plurality of sixth metal interconnects, each of the plurality of sixth metal interconnects sharing a common fourth surface in the second direction; a plurality of fourth vias, each disposed within a separate second metallization layer of the plurality of second metallization layers, each coupling adjacent sixth metal interconnects of the plurality of sixth metal interconnects in adjacent second metallization layers of the plurality of second metallization layers; a fourth patch antenna, 23. The package substrate of clause 22, further comprising: 24. The package substrate of clause 23, wherein the third patch antenna is configured to be electromagnetically (EM) coupled to the fourth patch antenna in response to the third patch antenna radiating a radio frequency (RF) signal received from the second antenna feed line. 25. The package substrate of claim 19 or 20, further comprising a plurality of second metallization layers parallel to the plurality of first metallization layers in a first direction, the plurality of first metallization layers includes a first outer metallization layer; the plurality of second metallization layers includes a second outer metallization layer; a plurality of first metal interconnects each disposed within each of the plurality of first metallization layers and the plurality of second metallization layers; a plurality of third metal interconnects each disposed within each of the plurality of first metallization layers and the plurality of second metallization layers; 21. A packaging substrate according to clause 19 or 20. 26. a plurality of second metallization layers parallel to the plurality of first metallization layers in a first direction; a core substrate disposed between a plurality of first metallization layers and a plurality of second metallization layers; 20. The package substrate of clause 19, further comprising: A first patch antenna a plurality of fourth metal interconnects each disposed within a distinct second metallization layer of the plurality of second metallization layers; a plurality of fourth metal interconnects, each of the plurality of fourth metal interconnects sharing a common third plane in the second direction; a plurality of third vias, each disposed within a separate second metallization layer of the plurality of second metallization layers, each coupling adjacent fourth metal interconnects of the plurality of fourth metal interconnects in adjacent second metallization layers of the plurality of second metallization layers; metal posts disposed within the core substrate electrically coupling the plurality of fourth metal interconnects to the plurality of first metal interconnects; Further comprising: A second patch antenna a plurality of fifth metal interconnects each disposed within a separate second metallization layer of the plurality of second metallization layers; a plurality of fifth metal interconnects, each of the plurality of fifth metal interconnects sharing a common fourth plane in the second direction; a plurality of fourth vias, each disposed within a separate second metallization layer of the plurality of second metallization layers, each coupling adjacent fifth metal interconnects of the plurality of fifth metal interconnects in adjacent second metallization layers of the plurality of second metallization layers; second metal posts disposed within the core substrate electrically coupling the plurality of fifth metal interconnects to the plurality of third metal interconnects; 20. The package substrate of clause 19, further comprising: 27. a first side in a first direction; a second side opposite the first side in the first direction; 8. The package substrate according to any one of claims 1 to 7, further comprising: a first patch antenna adjacent to a first side of the package substrate; and a second patch antenna adjacent to a second side of the package substrate, a plurality of third metal interconnects, each disposed within a separate first metallization layer of the plurality of first metallization layers; a plurality of third metal interconnects, each of the plurality of third metal interconnects sharing a second common plane parallel to the first common plane in a second direction; a plurality of second vias, each disposed within a separate first metallization layer of the plurality of first metallization layers, each coupling adjacent third metal interconnects of the plurality of third metal interconnects in adjacent first metallization layers of the plurality of first metallization layers; a second patch antenna, a second antenna feed line coupled to the second patch antenna; 8. The package substrate of any one of clauses 1 to 7, further comprising: 28. a first patch antenna having a first antenna radiation pattern extending in a first horizontal direction away from the package substrate; a second patch antenna having a second antenna radiation pattern extending in a second horizontal direction opposite the first horizontal direction and away from the package substrate; 28. The packaging substrate of clause 27. 29. A third patch antenna, at least one fifth metal interconnect disposed in a first metallization layer of the plurality of first metallization layers in a third plane in the first direction; a third antenna feed line coupled to the third patch antenna; 29. The packaging substrate of claim 27 or 28, further comprising a third patch antenna comprising: 30. The packaging substrate of clause 29, wherein the third patch antenna is rectangular. 31. a first patch antenna having a first antenna radiation pattern extending in a first horizontal direction away from the package substrate; a second patch antenna having a second antenna radiation pattern extending in a second horizontal direction opposite the first horizontal direction and away from the package substrate; a third patch antenna having a third antenna radiation pattern extending in a second direction orthogonal to the first horizontal direction and the second horizontal direction; 31. A packaging substrate according to clause 29 or 30. 32. The packaging substrate of any one of clauses 1-31, wherein the first patch antenna has a fifth generation (5G) frequency bandwidth. 33. set-top boxes, entertainment units, navigation devices, communication devices, fixed location data units, mobile location data units, global positioning system (GPS) devices, mobile phones, mobile phones, smartphones, session initiation protocol (SIP) phones, tablets, phablets, servers, computers, portable computers, mobile computing devices, wearable computing devices, desktop computers, personal digital assistants (PDAs), monitors, computer monitors, televisions, tuners, radios, satellite radios, music players, digital music players, portable music players, digital video players, video players, digital video disc (DVD) players, portable digital video players, automobiles, vehicle components, avionics systems, drones, and multicopters. 33. The package substrate of any one of clauses 1-32 integrated with a device selected from the group consisting of: 34. A method for manufacturing a package substrate, comprising: Forming a plurality of first metallization layers, where forming each first metallization layer of the plurality of first metallization layers includes: forming a first dielectric layer; forming a first metal interconnect in the first dielectric layer; forming a first via coupled to a first metal interconnect in the first dielectric layer; forming a plurality of first metallization layers, the first metallization layers including: forming a first antenna feedline; coupling the plurality of first metallization layers parallel to one another in a first direction such that each first metal interconnect in the plurality of first metallization layers shares a first common plane in a second direction orthogonal to the first direction and each first via in the plurality of first metallization layers couples adjacent metal first interconnects in adjacent first metallization layers of the plurality of first metallization layers; coupling a plurality of first metallization layers in parallel to one another in a first direction, where a first metal interconnect in each of the plurality of first metallization layers coupled by a first via in the plurality of first metallization layers forms a first patch antenna; coupling a first antenna feed line to a first patch antenna; A method comprising: 35. Forming a plurality of second metallization layers, where forming each second metallization layer of the plurality of second metallization layers includes: forming a second dielectric layer; forming a third metal interconnect in the second dielectric layer; forming a second via coupled to a third metal interconnect in the second dielectric layer; forming a plurality of second metallization layers, the second metallization layers including: Coupling the plurality of second metallization layers in parallel to the plurality of first metallization layers in a first direction; 35. The method of claim 34, further comprising: 36. The method of claim 35, further comprising disposing a core substrate between the plurality of first metallization layers and the plurality of second metallization layers. 37. forming a second antenna feedline; coupling the plurality of second metallization layers parallel to one another in a first direction such that each second metal interconnect in the plurality of second metallization layers shares a second common plane in the second direction and each second via in the plurality of second metallization layers couples adjacent ones of the third metal interconnects in adjacent ones of the plurality of second metallization layers; coupling the plurality of second metallization layers in parallel to one another in a first direction, where third metal interconnects in the plurality of second metallization layers coupled by second vias form a second patch antenna; coupling the second antenna feed line to the second patch antenna; 37. The method of claim 35 or 36, further comprising: 38. Forming a plurality of first metallization layers; forming a first outer metallization layer including a first dielectric layer, a first metal interconnect in the first dielectric layer, and a first via coupled to the first metal interconnect in the first dielectric layer; forming a second outer metallization layer, forming a second dielectric layer; forming a second metal interconnect in the second dielectric layer; forming a second via coupled to the second metal interconnect in the second dielectric layer; forming a second outer metallization layer, the second outer metallization layer comprising: Including, Bonding the plurality of first metallization layers to one another includes bonding the first outer metallization layer and the second outer metallization layer parallel to one another in a first direction such that a first metal interconnect in the first outer metallization layer and a second metal interconnect in the second outer metallization layer share a first common plane in the second direction and a first via in the first outer metallization layer is coupled to a second via in the second outer metallization layer; a first patch antenna is further formed by a first metal interconnect in each of the plurality of first metallization layers coupled by a first via in each of the plurality of first metallization layers, and a second metal interconnect in the second outer metallization layer coupled by a second via in the second outer metallization layer forming the first patch antenna. The method described in clause 34. 39. forming a second patch antenna, the second patch antenna including disposing at least one third metal interconnect in a first metallization layer of the plurality of first metallization layers in a second plane in a first direction; forming a second antenna feedline; coupling the second antenna feed line to the second patch antenna; 37. The method of any one of clauses 34 to 36, further comprising: 40. Forming a third patch antenna, comprising: forming a plurality of third metal interconnects each disposed within a distinct first metallization layer of the plurality of first metallization layers; forming a plurality of third metal interconnects, each of the plurality of third metal interconnects sharing a second common plane parallel to the first common plane in a second direction; forming a plurality of second vias each disposed within a distinct first metallization layer of the plurality of first metallization layers; coupling each second via of the plurality of second vias to an adjacent third metal interconnect of the plurality of third metal interconnects in an adjacent first metallization layer of the plurality of first metallization layers; 35. The method of claim 34, further comprising forming a third patch antenna comprising: 41. forming a first side on a package substrate in a first direction; forming a second side on the package substrate in a first direction opposite the first side; disposing a first patch antenna adjacent to a first side of a packaging substrate; and forming a second patch antenna adjacent a second side of the package substrate; forming a plurality of third metal interconnects each disposed within a distinct first metallization layer of the plurality of first metallization layers; forming a plurality of third metal interconnects, each of the plurality of third metal interconnects sharing a second common plane parallel to the first common plane in a second direction; forming a plurality of second vias each disposed within a distinct first metallization layer of the plurality of first metallization layers; coupling each second via of the plurality of second vias to an adjacent third metal interconnect of the plurality of third metal interconnects in an adjacent first metallization layer of the plurality of first metallization layers; forming a second patch antenna, comprising: forming a second antenna feedline; coupling the second antenna feed line to the second patch antenna; 35. The method of claim 34, further comprising: 42. forming a third patch antenna, disposing at least one fifth metal interconnect in a first metallization layer of the plurality of first metallization layers in a third plane in a first direction; forming a third antenna feedline; coupling a third antenna feed line coupled to a third patch antenna; 42. The method of claim 41, further comprising forming a third patch antenna comprising:

Claims

1. a plurality of first metallization layers parallel to one another in a first direction; a plurality of second metallization layers parallel to the plurality of first metallization layers in the first direction; a core substrate disposed between the plurality of first metallization layers and the plurality of second metallization layers; a first patch antenna, a plurality of first metal interconnects each disposed within a separate first metallization layer of the plurality of first metallization layers; a plurality of first metal interconnects, each of the plurality of first metal interconnects sharing a first common plane in a second direction orthogonal to the first direction; a plurality of first vias, each disposed within a separate first metallization layer of the plurality of first metallization layers, each coupling adjacent first metal interconnects of the plurality of first metallization layers in adjacent first metallization layers of the plurality of first metallization layers; a plurality of second metal interconnects each disposed within a separate second metallization layer of the plurality of second metallization layers, each of the plurality of second metal interconnects sharing a second common plane in the second direction; a plurality of second vias, each disposed within a separate second metallization layer of the plurality of second metallization layers, each coupling adjacent second metal interconnects of the plurality of second metallization layers in adjacent second metallization layers of the plurality of second metallization layers; metal posts disposed within the core substrate that electrically couple the plurality of first metal interconnects to the plurality of second metal interconnects; a first patch antenna, a first antenna feed line coupled to the first patch antenna; a package substrate.

2. The package substrate of claim 1 , wherein each of the plurality of first metal interconnects is arranged parallel to one another in the first direction.

3. 2. The package substrate of claim 1, wherein the plurality of first vias includes a plurality of first elongated vias, each elongated in the first direction to form a planar structure in the first common plane, each coupling adjacent first metal interconnects of the plurality of first metallization layers in adjacent first metallization layers, the planar structure having a trench shape, and each of the plurality of first elongated vias includes a trench.

4. The package substrate of claim 1 , wherein the first patch antenna is rectangular and configured to radiate radio frequency (RF) signals received from the first antenna feed line.

5. the plurality of first metallization layers includes a first outer metallization layer and a second outer metallization layer; each of the plurality of first metal interconnects is disposed within a respective one of the plurality of first metallization layers; The package substrate of claim 1 .

6. a second patch antenna, at least one third metal interconnect disposed in a first metallization layer of the plurality of first metallization layers and in a second plane in the first direction; a second antenna feed line coupled to the first patch antenna; a second patch antenna including: the first patch antenna is rectangular; the first patch antenna has a first antenna radiation pattern extending in the first direction; the second patch antenna has a second antenna radiation pattern extending in the second direction orthogonal to the first direction; The package substrate of claim 1 .

7. a third patch antenna including at least one fifth metal interconnect disposed in a second metallization layer of the plurality of second metallization layers and in a third plane in the first direction; the third patch antenna is configured to be electromagnetically (EM) coupled to the second patch antenna in response to the first patch antenna radiating a radio frequency (RF) signal received from the second antenna feed line; the first patch antenna has a first antenna radiation pattern extending in the first direction; the third patch antenna has a third antenna radiation pattern extending in the second direction orthogonal to the first direction; The package substrate of claim 6 .

8. a second patch antenna, a plurality of third metal interconnects each disposed within a separate first metallization layer of the plurality of first metallization layers, a plurality of third metal interconnects, each of the plurality of third metal interconnects sharing a second common plane parallel to the first common plane in the second direction; a plurality of second vias, each disposed within a separate first metallization layer of the plurality of first metallization layers, each coupling adjacent third metal interconnects of the plurality of third metal interconnects in adjacent first metallization layers of the plurality of first metallization layers; a plurality of fifth metal interconnects each disposed within a separate second metallization layer of the plurality of second metallization layers, each of the plurality of fifth metal interconnects sharing a common fourth plane in the second direction; a plurality of fourth vias, each disposed within a separate second metallization layer of the plurality of second metallization layers, each coupling adjacent fifth metal interconnects of the plurality of fifth metal interconnects in adjacent second metallization layers of the plurality of second metallization layers; second metal posts disposed within the core substrate, electrically coupling the plurality of fifth metal interconnects to the plurality of third metal interconnects; a second patch antenna including:

10. The package substrate of claim 1, wherein the first patch antenna is configured to be electromagnetically (EM) coupled to the second patch antenna in response to the first patch antenna radiating a radio frequency (RF) signal received from the first antenna feed line.

9. a first side surface in the first direction; a second side opposite the first side in the first direction; 10. The package substrate of claim 1, further comprising: the first patch antenna is adjacent to the first side of the package substrate; and a second patch antenna adjacent the second side of the package substrate, a plurality of third metal interconnects each disposed within a separate first metallization layer of the plurality of first metallization layers; a plurality of third metal interconnects, each of the plurality of third metal interconnects sharing a second common plane parallel to the first common plane in the second direction; a plurality of second vias, each disposed within a separate first metallization layer of the plurality of first metallization layers, each coupling adjacent third metal interconnects of the plurality of third metal interconnects in adjacent first metallization layers of the plurality of first metallization layers; a second patch antenna, a second antenna feed line coupled to the second patch antenna; Further comprising: The package substrate of claim 1 .

10. the first patch antenna has a first antenna radiation pattern extending in a first horizontal direction away from the package substrate; the second patch antenna has a second antenna radiation pattern extending in a second horizontal direction opposite the first horizontal direction, away from the package substrate; The package substrate of claim 9 .

11. a third patch antenna, at least one fifth metal interconnect disposed in a first metallization layer of the plurality of first metallization layers and in a third plane in the first direction; a third antenna feed line coupled to the third patch antenna; The package substrate of claim 9 further comprising a third patch antenna comprising:

12. The package substrate of claim 11 , wherein the third patch antenna is rectangular.

13. the first patch antenna has a first antenna radiation pattern extending in a first horizontal direction away from the package substrate; the second patch antenna has a second antenna radiation pattern extending in a second horizontal direction opposite the first horizontal direction, away from the package substrate; the third patch antenna has a third antenna radiation pattern extending in the second direction orthogonal to the first horizontal direction and the second horizontal direction; The package substrate of claim 12.

14. The package substrate of claim 1 , wherein the first patch antenna has a fifth-generation (5G) frequency bandwidth.

15. 1. A method for manufacturing a package substrate, comprising: forming a plurality of first metallization layers, wherein forming each first metallization layer of the plurality of first metallization layers comprises: forming a first dielectric layer; forming a first metal interconnect in the first dielectric layer; forming a first via coupled to the first metal interconnect in the first dielectric layer; forming a plurality of first metallization layers, the first metallization layers including: forming a plurality of second metallization layers, wherein forming each second metallization layer of the plurality of second metallization layers comprises: forming a second dielectric layer; forming a second metal interconnect in the second dielectric layer; forming a second via coupled to the second metal interconnect in the second dielectric layer; forming a plurality of second metallization layers, the second metallization layers including: disposing a core substrate between the plurality of first metallization layers and the plurality of second metallization layers; forming a first antenna feedline; coupling the plurality of first metallization layers parallel to one another in a first direction such that each first metal interconnect in the plurality of first metallization layers shares a first common plane in a second direction orthogonal to the first direction, and each first via in the plurality of first metallization layers couples adjacent metal first interconnects in adjacent first metallization layers of the plurality of first metallization layers; coupling the plurality of second metallization layers in parallel to the plurality of first metallization layers in the first direction such that each second metal interconnect in the plurality of second metallization layers shares a second common plane in a second direction orthogonal to the first direction and each second via in the plurality of second metallization layers couples adjacent second metal interconnects in adjacent second metallization layers of the plurality of second metallization layers; forming metal posts disposed within the core substrate that electrically couple first metal interconnects in the plurality of first metallization layers to second metal interconnects in the plurality of second metallization layers; forming a first patch antenna, wherein the first metal interconnect in each of the plurality of first metallization layers coupled by the first via in the plurality of first metallization layers, the metal post, and the second metal interconnect in each of the plurality of second metallization layers coupled by the second via in the plurality of second metallization layers; coupling a first antenna feed line to the first patch antenna; A method comprising:

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