Metallized vias in glass and silicon substrates, interposers, and methods for their production - Patents.com

Abstract

The substrate may be metallized by introducing a via fill material comprising one or more metals into one or more vias that terminate within the base substrate and / or extend between the first and second sides of the base substrate. More specifically, the glass or silicon base substrate may have one or more vias, in which the via fill material is present. The via fill material comprises a porous matrix material having about 30% to about 60% void space and comprising a plurality of electrically conductive particles, which may optionally be bonded together with a hardened silicate reactive matrix material. The conductive network at least partially fills the void space within the porous matrix material, the porous network comprising a plurality of metal nanoparticles compacted together.

Description

[Technical field]

[0001] Modern electronic assemblies include numerous interconnects between various board components. The purpose of a given interconnect may be thermal, electrical, or structural in nature. Conventional interconnects are typically made from epoxy or tin- and / or lead-based solders due to their relatively low processing temperatures and low material and processing costs. Unfortunately, these materials are not ideally suited for some applications, especially new high performance electronics with large thermal loads, and as a result, current interconnects may exhibit several drawbacks and limitations.

[0002] Most electronics made today are manufactured using printed circuit board (PCB) technology, which may contain several interconnects therein, including many through-holes and blind vias to connect various conductive layers together. The term "printed circuit board" is somewhat of a misnomer, given that most boards are not strictly printed, but instead utilize photolithography to pattern the desired conductive circuit patterns (conductive traces) from a copper sheet bonded to a substrate. The copper sheet is first bonded to an FR4 or similar fiberglass epoxy laminate, and then most of the copper is etched away to leave one or more conductive traces on the substrate in the desired pattern. In this process, up to 90% of the copper sheet may be etched away. While the etched copper may be salvaged, the etching process is time-consuming, labor-intensive, and may generate excessive amounts of hazardous waste. Most printed circuit boards are multi-layered and this process needs to be repeated for each board layer, including drilling and filling vias to connect the board layers together, which adds additional alignment and distortion concerns during hot pressing the board layers together. To further complicate matters, the poor thermal conductivity of the fiberglass epoxy substrate can be problematic in various ways. Other types of substrates are of interest, but the processing issues with these alternative substrates have yet to be universally resolved. In certain embodiments, as discussed further below, the mismatch of the coefficient of thermal expansion (CTE) between the substrate and other components in the electrical interconnect, including the heat dissipation system, can be problematic.

[0003] The ongoing demand for reduced chip size, increased functionality, and improved performance all on smaller footprints continues to drive the need for heterogeneous integration in modern microelectronic components and systems. These developments are driven by various packaging and electrical interconnect technologies, such as wafer level fan out (WLFO), embedded multi-die interconnect bridge (EMIB), and interposer technologies. Interposers continue to be important for advanced electronic systems, such as 2.5D and 3D integrated circuits and system-in-package (SIP) applications, given the proven advantages of interposers with through-surface vias (TSVs).

[0004] Interposers are becoming increasingly prevalent as components within printed circuit boards (e.g., incorporated within system-in-package (SIP) and system-on-chip (SOC) configurations) to establish electrical and / or thermal communication between various electronic components within the printed circuit board. Interposers commonly used for packaging applications fall into three main categories: silicon, organic (polymer), and glass. Each of these interposer material classes faces unique challenges with respect to electrical, mechanical, and thermal properties for producing high performance electronic devices. That is, as with other types of interconnects currently used in printed circuit boards, there are issues associated with the current class of interposers, such as limited thermal conductivity and / or poor bonding to metallic components. CTE (coefficient of thermal expansion) mismatch in one or more interconnects can similarly result in thermo-mechanical stresses during repeated heating and cooling cycles. For interposers with large surface areas, the effects of CTE mismatch can be particularly problematic.

[0005] Silicon interposers have long played a key role in 2.5D and 3D IC chip integration due to their high fine pitch density and TSV formation capabilities. Silicon is a proven technology, used commercially in several high performance computing systems, and is currently favored in platforms using heterogeneous integration. However, silicon technology faces performance limitations caused by TSV profiles and microfluidic thermal design changes resulting from the need to mitigate thermal issues. High cost is another key challenge to overcome for continued market adoption. For example, when used within a device, silicon interposers can add as much as $30 for a medium size chip and even exceed $100 for larger size chips. Cost considerations have limited silicon interposers to high speed networking and server chip applications where the cost is lower than the driver.

[0006] Organic interposers are one alternative that is being explored to reduce costs and provide advantageously low dielectric constants. Organic interposers offer lower material costs and feature a well-established supply chain and the ability to be manufactured using conventional processes such as wet etching. The main challenge with organic interposers is their limited stiffness, especially for very thin substrates. Organic interposers also lack the ability to achieve the fine pitch densities possible with silicon and glass interposers. Organic interposers are currently well suited for applications such as logic memory integration, large central processing unit (CPU) / graphics processing unit (GPU), high performance radio frequency applications, and certain types of application specific integrated chips (ASICs), but in some cases can be used for other applications.

[0007] Glass interposers are a logical low-cost, high-performance alternative interposer technology that promises higher interconnect density than organic interposers and significantly lower cost compared to silicon interposers with similar interconnect density. Thus, glass interposers are increasingly being adopted in ultra-high pitch density applications, such as communications, networking and signal processing and testing, high-bandwidth memory (HBM), high-performance computing, and radio frequency (RF) technology. In addition, glass interposers are increasingly being adopted in low-cost packaging, such as micro-electromechanical systems (MEMS), sensors, power, and analog devices. In addition to lower cost, glass interposers are also available in large panel form. Key challenges associated with glass interposers include surface defects during manufacturing, which can lead to cracks and poor thermal conductivity. In addition, due to the large CTE mismatch between glass and conductive materials such as copper, there are limitations to the effective diameter achievable for through glass vias (TGVs), which effectively precludes the use of larger vias. Furthermore, glass interposers are expected to be a readily available solution to address current and future needs in the electronics industry.

[0008] With the proliferation of developments such as the Internet of Things (IoT), connected and autonomous vehicles, and similar devices, the challenge of processing and communicating high bandwidth data in combination with high performance electronic systems is becoming increasingly important. Interposers can be used in several different types of electronic systems, but the above is the main driver of the interposer market, as chip scaling is reaching its economic limits and packaging is becoming a key focus for advancing electronics at the chip scale. The continued growth of interposer technology depends on addressing the challenges, performance, and cost barriers induced by the interposer material itself in these and other applications. [Brief description of the drawings]

[0009] The following figures are included to illustrate certain aspects of the present disclosure and should not be viewed as exclusive embodiments. The disclosed subject matter is capable of significant modification, alterations, combinations, and equivalents in form and function, as will occur to those skilled in the art and having the benefit of this disclosure. [Figure 1] FIG. 1 is a diagram of the proposed structure of a metal nanoparticle having a surfactant coating thereon. [Diagram 2] FIG. 1 is a diagram of the proposed structure of a metal nanoparticle having a surfactant coating thereon. [Diagram 3] FIG. 2 is a diagram of a metallized substrate of the present disclosure including filled vias. [Figure 4A] 1A and 1B are images of a glass substrate coated with a seed layer containing copper particles before and after polishing, respectively. [Figure 4B] 1A and 1B are images of a glass substrate coated with a seed layer containing copper particles before and after polishing, respectively. [Diagram 5] 1 is an image of a metallized glass substrate. [Figure 6A] FIG. 2 is a diagram of a metallized substrate of the present disclosure further having a seed layer and a continuous metallization layer disposed thereon. [Figure 6B] FIG. 2 is a diagram of a metallized substrate of the present disclosure after etching of a continuous metallization layer to introduce conductive traces onto the metallized substrate. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] The present disclosure is directed generally to electronic assemblies, and more specifically to metallized substrates suitable for use in electronic assemblies.

[0011] There are several types of interconnects that may be present in a printed circuit board or similar type of electronic assembly, including in an interposer. Traditionally, interconnects are formed using epoxy or solder, or using vias filled with electroplated metals such as copper. Despite their common use, epoxy and solder have limitations that are often not easily overcome with traditional materials. Limited thermal conductivity, poor thermal stability, and CTE (coefficient of thermal expansion) mismatch can often be problematic, for example, especially in high performance electronic devices with significant thermal loads. Electroplated copper is even more problematic to deposit on glass and silicon substrates that are commonly utilized for interposers.

[0012] Conventional filling techniques for vias include electroplating processes, which are slow, expensive, and in some cases can be prone to incomplete via filling due to closing off the ends of the via before filling is complete. There are also limitations to the size and aspect ratio of vias that can be effectively filled. Narrow and / or blind vias with high aspect ratios are often difficult to reliably fill. Vias with large diameters can be similarly problematic to fill by electroplating due to slow deposition rates. Both through-plane vias and vias that terminate within the base substrate (blind vias) can be problematic in this regard.

[0013] Glass and silicon substrates may be desirable to incorporate into electronic assemblies that include interposer substrates due to their low electrical conductivity and favorable RF performance, but the CTE mismatch and poor through-plane thermal conductivity of these types of substrates may be problematic. Additionally, it may be difficult to achieve strong bonding of metals onto glass and silicon substrates.

[0014] The present disclosure describes a metallized glass or silicon substrate having one or more vias extending therethrough, the vias being initially loaded with a via fill material comprising a porous matrix having significant void space therein (e.g., 30-50% void volume in the form of interconnected pores) and then at least partially filled with a conductive network formed from consolidated metal nanoparticles. Blind vias that terminate within the base substrate without extending through it may be loaded with a via fill material in a similar manner. The porous matrix comprises a plurality of electrically conductive particles, which may optionally be bonded together with a cured silicate reactive matrix material. When used, curing of the silicate reactive matrix material may occur at temperatures from near room temperature to as low as about 100° C. (cure times of about 8-12 minutes), with a significant degree of porosity resulting from the packing restriction of the electrically conductive particles. In addition to binding the electrically conductive particles together, the silicate reactive matrix material may undergo a reaction with the glass or silica upon curing to adhere the via fill material to the walls of one or more vias by chemical reaction. The chemical bond helps to promote retention of the via fill material in one or more vias, and may reduce the tendency of cracking and shrinkage during metal nanoparticle consolidation. Other benefits, such as hermetic sealing, discussed further below, may be realized as well. In addition to providing a via that is not completely hermetically sealed, a via fill material lacking a hardened silicate reactive matrix material may also result in a porous structure in the via that may be at least partially filled with a conductive network formed from the consolidated metal nanoparticles and retained in the via. Regardless of whether a hardened silicate reactive matrix material is present, the metal nanoparticles may be formulated to provide a CTE match with the glass or silicon substrate, thereby providing even more robust thermal and electrical conductivity performance, as well as facilitating the use of larger thermal vias with high reliability.

[0015] The filling of the metal nanoparticles into the void space of the via fill material can be accomplished by infiltrating the void space (e.g., by vacuum or pressure infiltration) with a metal nanoparticle composition that is sufficiently fluid to enter the void volume under sufficient infiltration conditions. Metal nanoparticles and metal nanoparticle compositions offer several advantages for infiltrating the void space and forming a conductive network therein, as discussed below. In establishing an electrically conductive network, bonding to larger electrically conductive particles introduced in forming the porous matrix can also occur. The vias can be filled sequentially with the via fill material and the metal nanoparticle composition, although in some cases it may be possible to fill the vias with the via fill material and the metal nanoparticle composition already combined together prior to introduction into the vias.

[0016] By loading one or more vias with a via fill material and establishing a conductive network therein, several advantages may be realized. At least, a highly conductive electrical and thermal path through the plane may be established between the first and second sides of the glass or silicon substrate, regardless of whether a cured silicate reactive matrix material is present. If a silicate reactive matrix material is present and subsequently cured, chemical bonding of the cured silicate reactive matrix material to the via walls may be realized, which may result in a hermetic seal of the via walls. Such a hermetic seal may lead to less impact due to shrinkage as the metal nanoparticles undergo compaction with one another. The resulting improved structural integrity may further reduce the likelihood of the via fill material being dislodged during heating and cooling cycles due to repeated thermal expansion and contraction. Additional protection against thermal expansion and contraction issues may be realized by using metal nanoparticle compositions tailored to provide a CTE match with the substrate and the via fill material.

[0017] More advantageously, a related approach using a silicate reactive matrix material can be used to form a metallization layer on the surface of a glass or silicon base substrate. In particular, a seed layer formed from a silicate reactive matrix material and a plurality of electrically conductive particles can be used to deposit one or more conductive traces or metallization layers on at least one of the first or second sides of the base substrate. The one or more conductive traces can be obtained by direct printing of a metal nanoparticle composition or by selective etching of a continuous metallization layer obtained by printing of a metal nanoparticle composition. The conductive traces can be in electrical communication with at least a portion of one or more vias by direct connection or indirectly by a bonding pad located at the via opening. Thus, in some cases, a similar type of formulation can be used for via filling and for forming a seed layer on the surface of a glass or silicon substrate. However, it should be recognized that the specific formulation used at each location may differ in the concentration of one or more components therein. Similarly, the metal nanoparticle composition deposited on the seed layer and then converted to a conductive trace or metallization layer by metal nanoparticle consolidation can be CTE matched to the substrate to provide more robust thermal performance. The seed layer can provide robust adhesion of the conductive trace or metallization layer to the glass or silicon substrate that would not otherwise be possible with direct metal printing on these types of materials. The electrically conductive particles in the seed layer can include micron-sized metal particles, metal nanoparticles, conductive nanomaterials, or any combination thereof.

[0018] The seed layer may be deposited on a glass or silicon substrate in an initially non-conductive or low-conductivity state. After mechanical polishing of the seed layer, the electrical conductivity may be surprisingly improved. Establishing electrical conductivity in the seed layer by mechanical polishing may provide a two-fold advantage. First, enhanced adhesion of the metallization layer or conductive trace to the seed layer may be realized. Second, the electrical conductivity of the conductive trace includes the combined conductivity of the seed layer and the metallization layer formed thereon. Thus, increasing the electrical conductivity of the seed layer may also increase the electrical conductivity of the resulting conductive trace. Finally, by making the seed layer electrically conductive, metallization strategies such as electroplating may be performed, which may in some cases be sufficient to form a metallization layer (e.g., instead of forming metal traces by consolidating metal nanoparticles). In contrast, electroless plating or consolidating metal nanoparticles to form a metallization layer may be performed with the seed layer in either a conductive or non-conductive state.

[0019] Once the seed layer has been deposited and optionally made electrically conductive, it may be at least partially metallized to form a metal layer on the seed layer. Metallization may be performed by electroplating or electroless plating techniques, or more desirably using a metal nanoparticle composition. In contrast to plating techniques, a metal nanoparticle composition may be deposited and consolidated on the seed layer to form a thick metallized layer over substantially the entire surface of the seed layer, or only in specific locations using direct printing techniques. The thickness of the metallized layer achievable by metal nanoparticle consolidation may range from as little as about 10 microns to about 5000 microns (5 mm), or from about 10 microns to about 500 microns, or from about 500 microns to about 1000 microns, or from about 1000 microns to about 3000 microns. Plating techniques, in contrast, may result in very thin metallized layer thicknesses, such as layer thicknesses of about 50 microns or less, or about 10 microns or less. Direct printing techniques using metal nanoparticle compositions can result in conductive traces at specific locations on the surface of a substrate, whereas etching techniques are limited to forming conductive traces by etching the entire metallization layer at specific locations. Electrical isolation between conductive traces can be achieved by depositing a seed layer only at the locations where the conductive traces are to be formed, and / or by etching the seed layer after forming the conductive traces at the desired locations to limit the conductivity between the conductive traces.

[0020] As described in more detail below, the metal nanoparticle composition can be processed at relatively low temperatures (about 200°C to 250°C) to form a bulk metal in achieving the above. As an additional advantage, the metal nanoparticle composition can be formulated to provide a CTE match with the substrate, both in the vias and on the substrate surface, thereby promoting more robust performance than is possible with conventional materials. Copper is desirable as the metal in the via fill material and conductive traces due to its low cost and high electrical conductivity, but other metals can be used as well. In addition, the high thermal conductivity of copper can be advantageous when incorporated into the via fill material to facilitate heat transfer from one side of the substrate to the other. Copper and other highly conductive metals, including mixtures or alloys thereof, can also be present as metal particles in the seed layer. Mixtures or alloys containing copper can be advantageous, for example, to provide improved oxidation resistance.

[0021] As described herein, low temperature processing of metal nanoparticles, including copper nanoparticles, is made possible by the enhanced activity of the metal nanoparticles compared to the corresponding bulk metal. As a result, the metal nanoparticles can be fused together (consolidated) at temperatures much lower than the metal melting point to provide bulk metal in the via fill layer and on the seed layer. The formation of bulk metal can be achieved at processing temperatures that would not be compatible with various electronic components when working with the bulk metal directly in molten form. When metal nanoparticles are fused together, properties similar to those of the corresponding bulk metal can be achieved, but with the ability to tailor CTE or other properties by blending the metal nanoparticle composition.

[0022] Before discussing the embodiments of the present disclosure in more detail, a brief description of metal nanoparticles and metal nanoparticle compositions suitable for use in the present disclosure is first provided, with copper nanoparticles being representative of metal nanoparticles that may be present as the primary metal nanoparticles in a metal nanoparticle composition. Metal nanoparticles exhibit several properties that may be significantly different from those of the corresponding bulk metal. One property of metal nanoparticles that may be of particular importance is nanoparticle fusion or consolidation, which occurs at the melting temperature of the metal nanoparticles. As used herein, the term "melting temperature" refers to the temperature at which the metal nanoparticles liquefy, thereby giving the appearance of melting. As used herein, the terms "fusion," "sintering," and "consolidation" refer synonymously to the coalescence or partial coalescence of metal nanoparticles with each other to form a larger mass of bulk metal (sintered mass), thereby defining a bulk metal matrix, such as a bulk copper matrix. During nanoparticle fusion, the metal nanoparticles undergo consolidation to form a bulk metal matrix without passing through a liquid state.

[0023] As the size decreases, especially when the equivalent spherical diameter falls below about 200 nm, the temperature at which the metal nanoparticles coalesce drops dramatically from that of the corresponding bulk metal. For example, copper nanoparticles having a size of about 150 nm or less can have a melting temperature of about 240° C. or less, or about 220° C. or less, or about 200° C. or less, compared to the melting temperature of bulk copper of 1084° C. Some of the metal nanoparticles can be about 20 nm or less in size, which, among other things, can have a low melting temperature and facilitate the consolidation of larger metal nanoparticles. Thus, the consolidation of the metal nanoparticles at the melting temperature can allow objects containing the bulk metal matrix, such as one or more interconnects, metallization layers, and / or one or more conductive traces in an electronic assembly, to be manufactured at significantly lower processing temperatures than when working directly with the bulk metal itself as the starting material. When the bulk metal matrix is ​​formed, the melting point of the bulk metal matrix is ​​similar to that of the bulk metal itself and contains multiple grain boundaries. In addition, the bulk metal matrix may have defined nanoporosity that is not present in the corresponding bulk metal.

[0024] As used herein, the term "metal nanoparticles" refers to metal particles having a size of about 200 nm or less, without specific reference to the shape of the metal particle. As used herein, the term "copper nanoparticles" refers to metal nanoparticles made of copper or primarily copper.

[0025] As used herein, the term "micron-sized metal particles" refers to metal particles that are greater than or equal to about 250 nm in size in at least one dimension, without particular reference to the shape of the metal particles.

[0026] The terms "consolidate," "consolidation," and other variations thereof are used interchangeably herein with the terms "fuse," "fuse," and other variations thereof.

[0027] As used herein, the terms "partially fused," "partially fused," and other derivatives and grammatical equivalents refer to the partial coalescence of metal nanoparticles together. Fully fused metal nanoparticles do not retain essentially the structural morphology of the original unfused metal nanoparticles (i.e., they resemble bulk metal with minimal grain boundaries), whereas partially fused metal nanoparticles retain at least a portion of the structural morphology of the original unfused metal nanoparticles. The properties of partially fused metal nanoparticles can be intermediate between the properties of the corresponding bulk metal and the properties of the original unfused metal nanoparticles.

[0028] A number of scalable processes have been developed to produce large quantities of metal nanoparticles within a target size range. Most typically, such processes to produce metal nanoparticles are carried out by reducing a metal precursor in the presence of one or more surfactants. The metal nanoparticles can then be isolated and purified from the reaction mixture by common isolation techniques and processed into a paste composition as needed.

[0029] Any suitable technique can be used to form the metal nanoparticles used in the metal nanoparticle compositions and processes described herein. Particularly easy metal nanoparticle manufacturing techniques are described in U.S. Patent Nos. 7,736,414, 8,105,414, 8,192,866, 8,486,305, 8,834,747, 9,005,483, 9,095,898, and 9,700,940, each of which is incorporated herein by reference in its entirety. As described therein, metal nanoparticles can be produced in a narrow size range by reducing a metal salt in a solvent in the presence of a suitable surfactant system, which can include one or more different surfactants. Further description of suitable surfactant systems is provided below. Without being bound by any theory or mechanism, it is believed that the surfactant system can mediate the nucleation and growth of metal nanoparticles, limit the surface oxidation of metal nanoparticles, and / or inhibit the metal nanoparticles from extensively agglomerating together before at least partially fusing together. Suitable organic solvents for solubilizing metal salts and forming metal nanoparticles can include, for example, formamide, N,N-dimethylformamide, dimethylsulfoxide, dimethylpropyleneurea, hexamethylphosphoramide, tetrahydrofuran, and glyme, diglyme, triglyme, and tetraglyme. Suitable reducing agents for reducing metal salts and promoting the formation of metal nanoparticles can include, for example, alkali metals (e.g., lithium naphthalide, sodium naphthalide, or potassium naphthalide) or borohydride reducing agents (e.g., sodium borohydride, lithium borohydride, potassium borohydride, or tetraalkylammonium borohydride) in the presence of a suitable catalyst.

[0030] 1 and 2 are diagrams of the probable structure of a metal nanoparticle with a surfactant coating thereon. As shown in FIG. 1, metal nanoparticle 10 includes metal core 12 and surfactant layer 14 overcoating metal core 12. Surfactant layer 14 can contain any combination of surfactants, as described in more detail below. Metal nanoparticle 20 shown in FIG. 2 is similar to that shown in FIG. 1, except that metal core 12 has grown around nucleus 21, which can be the same metal as that of metal core 12 or a different metal. Nucleus 21 is deeply embedded within metal core 12 in metal nanoparticle 20, and is therefore not believed to significantly affect the overall nanoparticle properties. In some embodiments, nucleus 21 can include a substance that is a grain growth inhibitor, which can be released when metal nanoparticles undergo compaction together. In some embodiments, the nanoparticles can have an amorphous morphology.

[0031] As described above, the metal nanoparticles have a surfactant coating on their surface, which contains one or more surfactants. The surfactant coating can be formed on the metal nanoparticles during the synthesis of the metal nanoparticles. The surfactant coating is generally lost during the consolidation of the metal nanoparticles when heated above the melting temperature. Forming a surfactant coating on the metal nanoparticles during their synthesis can desirably limit the ability of the metal nanoparticles to fuse together before heating above the melting temperature, limit the aggregation of the metal nanoparticles, and promote the formation of a population of metal nanoparticles with a narrow size distribution.

[0032] Copper can be a particularly desirable metal in embodiments of the present disclosure due to its low cost, strength, and excellent electrical and thermal conductivity values, as well as additional advantages that will be further addressed herein. Copper nanoparticles can be advantageous for use in embodiments of the present disclosure, but it should be understood that other types of metal nanoparticles can be used in alternative embodiments. Other metal nanoparticles that can be useful in electronic applications to form bulk metal matrices include, for example, aluminum nanoparticles, palladium nanoparticles, silver nanoparticles, gold nanoparticles, iron nanoparticles, cobalt nanoparticles, nickel nanoparticles, titanium nanoparticles, zirconium nanoparticles, hafnium nanoparticles, tantalum nanoparticles, and the like. Micron-sized particles of these metals can also be present in metal nanoparticle compositions containing metal nanoparticles, and in some cases can provide processing advantages.

[0033] In various embodiments, the surfactant system present in the metal nanoparticles can include one or more surfactants. The different properties of various surfactants can be used to adjust the properties of the metal nanoparticles. Factors that can be taken into consideration when selecting a surfactant or a combination of surfactants to include on the metal nanoparticles include, for example, the ease of dissipation of the surfactant from the metal nanoparticles during nanoparticle fusion, the nucleation and growth rate of the metal nanoparticles, the metal content of the metal nanoparticles, etc.

[0034] In some embodiments, an amine surfactant or a combination of amine surfactants, particularly an aliphatic amine, can be present on the metal nanoparticles. Amine surfactants may be particularly desirable for use with copper nanoparticles. In some embodiments, two amine surfactants can be used in combination with each other. In other embodiments, three amine surfactants can be used in combination with each other. In more specific embodiments, primary amines, secondary amines, and diamine chelators can be used in combination with each other. In even more specific embodiments, the three amine surfactants can include long chain primary amines, secondary amines, and diamines with at least one tertiary alkyl group nitrogen substituent. Further disclosure regarding suitable amine surfactants follows below.

[0035] In some embodiments, the surfactant system can include a primary alkylamine. In some embodiments, the primary alkylamine is a C2-C 18 In some embodiments, the primary alkylamine is a C7-C 10 In other embodiments, C5-C6 primary alkylamines can also be used. Without being bound by any theory or mechanism, it is believed that the exact size of the primary alkylamine can be balanced between being long enough to provide an effective reverse micelle structure during synthesis, being easily volatile, and / or being easy to handle during nanoparticle compaction. For example, primary alkylamines having more than 18 carbons may also be suitable for use in this embodiment, but may be more difficult to handle due to their waxy nature. In particular, C7-C 10 Primary alkyl amines can represent a good balance of desirable properties for ease of use.

[0036] In some embodiments, C2 to C 18The primary alkylamine can be, for example, n-hexylamine, n-heptylamine, n-octylamine, n-nonylamine, or n-decylamine. These are all linear primary alkylamines, but in other embodiments, branched primary alkylamines can also be used. For example, branched primary alkylamines can be used, such as 7-methyloctylamine, 2-methyloctylamine, or 7-methylnonylamine. In some embodiments, such branched primary alkylamines can be sterically hindered when they are attached to the nitrogen atom of the amine. Non-limiting examples of such sterically hindered primary alkylamines can include, for example, t-octylamine, 2-methylpentan-2-amine, 2-methylhexane-2-amine, 2-methylheptan-2-amine, 3-ethyloctane-3-amine, 3-ethylheptane-3-amine, 3-ethylhexane-3-amine, and the like. Additional branching can also be present. Without being bound by any theory or mechanism, it is believed that primary alkylamines can act as ligands in the metal coordination sphere, but can easily dissociate from the metal coordination sphere during compaction of the metal nanoparticles.

[0037] In some embodiments, the surfactant system can include a secondary amine. Secondary amines suitable for forming metal nanoparticles include linear, branched, or cyclic C4-C bonded to the nitrogen atom of the amine. 12 The secondary amines may include, but are not limited to, dihexylamine, diisobutylamine, di-t-butylamine, dineopentylamine, di-t-pentylamine, dicyclopentylamine, dicyclohexylamine, and the like. C4-C 12 Secondary amines outside the above range can also be used, however, such secondary amines may have undesirable physical properties such as low boiling points or waxy consistency that can complicate their handling.

[0038] In some embodiments, the surfactant system can include a chelating agent, particularly a diamine chelating agent. In some embodiments, one or both of the nitrogen atoms of the diamine chelating agent can be substituted with one or two alkyl groups. When two alkyl groups are present on the same nitrogen atom, the two alkyl groups can be the same or different. Furthermore, when both nitrogen atoms are substituted, the same alkyl group can be present or different alkyl groups can be present. In some embodiments, the alkyl group can be a C1-C6 alkyl group. In other embodiments, the alkyl group can be a C1-C4 alkyl group or a C3-C6 alkyl group. In some embodiments, the C3 or higher alkyl group can be linear or branched. In some embodiments, the C3 or higher alkyl group can be cyclic. Without being bound by any theory or mechanism, it is believed that the diamine chelating agent can promote the formation of metal nanoparticles by promoting the nucleation of the nanoparticles.

[0039] In some embodiments, suitable diamine chelating agents may include N,N'-dialkylethylenediamines, particularly C1-C4 N,N'-dialkylethylenediamines. Corresponding methylenediamine, propylenediamine, butylenediamine, pentylenediamine or hexylenediamine derivatives may also be used. The alkyl groups may be the same or different. C1-C4 alkyl groups that may be present may include, for example, methyl, ethyl, propyl, and butyl groups, or branched alkyl groups such as isopropyl, isobutyl, s-butyl, and t-butyl groups. Exemplary N,N'-dialkylethylenediamines that may be suitable for inclusion on the metal nanoparticles may include, for example, N,N'-di-t-butylethylenediamine, N,N'-diisopropylethylenediamine, and the like.

[0040] In some embodiments, suitable diamine chelating agents may include N,N,N',N'-tetraalkylethylenediamines, particularly C1-C4N,N,N',N'-tetraalkylethylenediamines. Corresponding methylenediamine, propylenediamine, butylenediamine, pentylenediamine or hexylenediamine derivatives may also be used. The alkyl groups may similarly be the same or different and may include those mentioned above. Exemplary N,N,N',N'-tetraalkylethylenediamines that may be suitable for use in forming metal nanoparticles may include, for example, N,N,N',N'-tetramethylethylenediamine, N,N,N',N'-tetraethylethylenediamine, and the like.

[0041] Surfactants other than aliphatic amines can also be present in the surfactant system.In this regard, suitable surfactants can include, for example, pyridines, aromatic amines, phosphines, thiols, or any combination thereof.These surfactants can be used in combination with aliphatic amines, including those mentioned above, or can be used in surfactant systems that do not have aliphatic amines.Further disclosure regarding suitable pyridines, aromatic amines, phosphines, and thiols follows below.

[0042] A suitable aromatic amine is ArNR 1 R 2 where Ar is a substituted or unsubstituted aryl group and R 1 and R 2 are the same or different. R 1 and R 2 can be independently selected from H or an alkyl or aryl group containing 1 to about 16 carbon atoms. Exemplary aromatic amines that may be suitable for use in forming metal nanoparticles include, for example, aniline, toluidine, anisidine, N,N-dimethylaniline, N,N-diethylaniline, and the like. Other aromatic amines that can be used in conjunction with metal nanoparticles can be envisioned by one of ordinary skill in the art.

[0043] Suitable pyridines include both pyridine and its derivatives. Exemplary pyridines that may be suitable for inclusion on metal nanoparticles include, for example, pyridine, 2-methylpyridine, 2,6-dimethylpyridine, collidine, pyridazine, etc. Chelating pyridines, such as bipyridyl chelators, may also be used. Other pyridines that may be used with metal nanoparticles may be envisioned by those skilled in the art.

[0044] Suitable phosphines can have the formula PR3, where R is an alkyl or aryl group containing 1 to about 16 carbon atoms. The alkyl or aryl groups attached to the phosphorus center can be the same or different. Exemplary phosphines that can be present on the metal nanoparticles include, for example, trimethylphosphine, triethylphosphine, tributylphosphine, tri-t-butylphosphine, trioctylphosphine, triphenylphosphine, and the like. Phosphine oxides can be used as well. In some embodiments, surfactants containing two or more phosphine groups configured to form a chelating ring can also be used. Exemplary chelating phosphines can include, for example, bisphosphines such as 1,2-bisphosphine, 1,3-bisphosphine, and BINAP. Other phosphines that can be used in conjunction with the metal nanoparticles can be envisioned by one of skill in the art.

[0045] Suitable thiols can have the formula RSH, where R is an alkyl or aryl group having about 4 to about 16 carbon atoms. Exemplary thiols that can be present on the metal nanoparticles include, for example, butanethiol, 2-methyl-2-propanethiol, hexanethiol, octanethiol, benzenethiol, and the like. In some embodiments, surfactants containing two or more thiol groups configured to form a chelating ring can also be used. Exemplary chelating thiols can include, for example, 1,2-dithiols (e.g., 1,2-ethanethiol) and 1,3-dithiols (e.g., 1,3-propanethiol). Other thiols that can be used in conjunction with the metal nanoparticles can be envisioned by one of ordinary skill in the art.

[0046] The metal nanoparticles described herein above can be incorporated into various metal nanoparticle compositions to facilitate their distribution for forming connections, filling vias, or forming metallization layers in the present disclosure. An exemplary disclosure directed to such metal nanoparticle compositions follows below. Copper nanoparticle compositions can be particularly useful for forming metallization layers or infiltrating via-filling materials in the present disclosure, especially in the presence of grain growth inhibitors or CTE modifiers for metallization layers, conductive traces, or components that may be exposed to high operating temperatures, especially repeated thermal cycles. The metal nanoparticle compositions can be further formulated to impart oxidation resistance in via-filling materials, metallization layers, or conductive traces formed therefrom.

[0047] Metal nanoparticle paste compositions can be prepared by dispersing as-produced or isolated metal nanoparticles in an organic matrix containing one or more organic solvents and various other optional ingredients. As used herein, the terms "nanoparticle paste formulation" and "nanoparticle paste composition" are used interchangeably and refer synonymously to a fluid composition containing dispersed metal nanoparticles suitable for dispensing using a desired technique. Viscosity can vary over a wide range depending on the dispensing technique selected. The use of the term "paste" does not necessarily imply adhesive capabilities of the paste alone. Through judicious selection of organic solvents and other additives, loading of metal nanoparticles, etc., the distribution of metal nanoparticles to desired locations can be facilitated and the properties of the resulting metal matrix (layer) can be tailored.

[0048] During consolidation of the metal nanoparticles in the metal nanoparticle composition, cracking and shrinkage can sometimes occur. One way that the metal nanoparticle composition can promote a reduction in the occurrence and void formation of cracking, shrinkage, and the degree of occurrence after metal nanoparticle consolidation is by maintaining a high solids content. More specifically, in some embodiments, the metal nanoparticle composition can contain at least about 30% metal nanoparticles by weight, particularly about 30% to about 97% metal nanoparticles by weight of the composition, or about 50% to about 97% metal nanoparticles by weight of the composition, or about 70% to about 97% metal nanoparticles by weight of the composition. Furthermore, in some embodiments, in addition to the metal nanoparticles, a small amount (e.g., about 0.01% to about 15% by weight or about 35% by weight or about 60% by weight of the composition) of micron-sized metal particles can be present. Such micron-sized metal particles can desirably promote the fusion of the metal nanoparticles into a continuous mass, further reducing the occurrence of cracking and shrinkage. Instead of being liquefied and undergoing direct compaction, the micron-sized metal particles can simply bond together when in contact with liquefied metal nanoparticles that have been elevated above their melting temperature. In essence, the metal nanoparticles can act as a "glue" that bonds the micron-sized metal particles together. These factors can reduce porosity after the metal nanoparticles are fused together, as well as provide tuning of the CTE. The micron-sized metal particles can include the same or different metals as the metal nanoparticles, and suitable metals for the micron-sized metal particles can include, for example, copper, silver, gold, aluminum, tin, and the like. In some embodiments, micron-sized graphite particles can also be included. In some embodiments, carbon nanotubes and / or graphene can be included. Still other additives in the micron-sized range, such as diamond particles or cubic BN (boron nitride), can be included as well.

[0049] During consolidation, the copper matrix defined by the fused copper nanoparticles is characterized by very fine, uniformly distributed nanoporosity (typically 4-15%, mostly closed pores, with pore sizes ranging from about 100 nm to about 300 nm) that limits hot spots by ensuring uniform heat distribution across the interfaces. However, the nanoporosity may range from about 2% to about 15% (i.e., about 85% to 98% high density fused copper nanoparticles, or other types of fused nanoparticles with closed pore nanoporosity and pore sizes ranging from about 50 nm to about 500 nm, or about 100 nm to about 300 nm, or about 150 nm to about 250 nm). Some copper bulk matrices described further below specify bulk copper matrices having a density of at least 90%. However, it should be understood that this value represents density values ​​that may be achieved for bulk copper matrices resulting from consolidation of copper nanoparticles and other types of metal nanoparticles, particularly densities in the range of about 85% to about 98%. Thus, the bulk copper matrix formed by consolidation of copper nanoparticles according to the present disclosure may have a density ranging from about 85% to about 98% of bulk copper. Nanoporosity may be within a similar range.

[0050] Micron-sized metal particles may be distinguished from grain growth inhibitors in the present disclosure because, due to their relatively large size, they are not easily incorporated within the grain boundaries between compacted metal nanoparticles. Specific examples of grain growth inhibitors or precursors thereof suitable for use in the present disclosure are discussed in more detail below.

[0051] The reduction of cracking and void formation during metal nanoparticle consolidation can also be promoted by judicious selection of the solvent forming the organic matrix. A tailored combination of organic solvents can desirably reduce the incidence of cracking and void formation. More specifically, organic matrices containing one or more hydrocarbons (saturated, monounsaturated, polyunsaturated (two or more double bonds) or aromatic), one or more alcohols, one or more amines, and one or more organic acids can be particularly effective for this purpose. In some embodiments, one or more esters and / or one or more anhydrides may be included. Without being bound by any theory or mechanism, it is believed that this combination of organic solvents can promote the removal and sequestering of surfactant molecules surrounding the metal nanoparticles during consolidation so that the metal nanoparticles can more easily fuse together. More specifically, it is believed that the hydrocarbon and alcohol solvents can passively solubilize surfactant molecules that are liberated from the metal nanoparticles by Brownian motion, reducing the ability of the surfactant molecules to reattach to the metal nanoparticles. In cooperation with the passive solubilization of the surfactant molecules, the amine solvents and organic acid solvents can actively sequester the surfactant molecules through chemical interactions such that they are no longer available to recombine with the metal nanoparticles.

[0052] Further adjustments to the solvent composition can be made to reduce the rapid volume shrinkage that occurs during surfactant removal and metal nanoparticle consolidation. Specifically, two or more members of each class of organic solvent (i.e., hydrocarbons, alcohols, amines, and organic acids) can be present in the organic matrix, with the members of each class having boiling points that are separated from one another by a set temperature. For example, in some embodiments, the various members of each class can have boiling points that are separated from one another by about 5°C to about 50°C or about 20°C to about 50°C. By using such a solvent mixture, the various components of the solvent mixture can be gradually removed over a wide range of boiling points (e.g., about 50°C to about 200°C), thereby minimizing rapid volume changes due to rapid loss of solvent during metal nanoparticle consolidation.

[0053] In some embodiments, at least a portion of the one or more organic solvents can have a boiling point of about 100° C. or higher. In some embodiments, at least a portion of the one or more organic solvents can have a boiling point of about 200° C. or higher. In some embodiments, the one or more organic solvents can have a boiling point in the range of about 50° C. to about 250° C. In other embodiments, the one or more organic solvents can have a boiling point in the range of about 100° C. to about 350° C. or about 100° C. to about 370° C. The use of high boiling organic solvents can desirably increase the pot life of the metal nanoparticle composition and limit the rapid loss of solvent that can lead to cracking and void formation during metal nanoparticle consolidation. In some embodiments, at least one of the organic solvents can have a boiling point higher than the boiling point of the surfactant associated with the metal nanoparticles. Thus, the surfactant can be removed from the metal nanoparticles by evaporation before removal of the organic solvent is performed.

[0054] In some embodiments, the organic matrix can contain one or more alcohols. In various embodiments, the alcohols can include monohydric alcohols, diols, triols, glycol ethers (e.g., diethylene glycol and triethylene glycol), alkanolamines (e.g., ethanolamine, triethanolamine, etc.), or any combination thereof. In some embodiments, one or more hydrocarbons can be present in combination with one or more alcohols. As discussed above, it is believed that alcohol and hydrocarbon solvents can passively promote the solubilization of surfactants because they are removed from the metal nanoparticles by Brownian motion and have limited reassociation with the metal nanoparticles. Furthermore, hydrocarbon and alcohol solvents are only weakly coordinated to the metal nanoparticles, and therefore do not simply replace the substituted surfactant in the nanoparticle coordination sphere. Illustrative, but non-limiting examples of alcohol and hydrocarbon solvents that may be present include, for example, light aromatic petroleum distillates (CAS 64742-95-6), hydrotreated light petroleum distillates (CAS 64742-47-8), tripropylene glycol methyl ether, ligroin (CAS 68551-17-7, C 10 ~C 13 Mixtures of alkanes), diisopropylene glycol monomethyl ether, diethylene glycol diethyl ether, 2-propanol, 2-butanol, t-butanol, 1-hexanol, 2-(2-butoxyethoxy)ethanol, and terpineol. In some embodiments, polyketone solvents can be used as well.

[0055] In some embodiments, the organic matrix may contain one or more amines and one or more organic acids. In some embodiments, the one or more amines and one or more organic acids may be present in an organic matrix that also includes one or more hydrocarbons and one or more alcohols. As discussed above, it is believed that the amines and organic acids may actively sequester surfactants that have been passively solubilized by the hydrocarbon and alcohol solvents, thereby making the surfactants unavailable for reassociation with the metal nanoparticles. Thus, organic solvents containing a combination of one or more hydrocarbons, one or more alcohols, one or more amines, and one or more organic acids may provide synergistic benefits for promoting compaction of metal nanoparticles. Illustrative, but non-limiting examples of amine solvents that may be present include, for example, tallow amine (CAS 61790-33-8), alkyl (C8-C9), tallow amine (CAS 61790-33-8 ... 18 )Unsaturated amines (CAS 68037-94-5), di(hydrogenated tallow)amine (CAS 61789-79-5), dialkyl (C8-C 20 )Amine (CAS 68526-63-6), Alkyl (C 10 ~C 16 ) Dimethylamine (CAS 67700-98-5), Alkyl (C 14 ~C 18 ) dimethylamine (CAS 68037-93-4), dihydrogenated tallow methylamine (CAS 61788-63-4), and trialkyl (C6-C 12 ) amine (CAS 68038-01-7). Illustrative, but non-limiting examples of organic acid solvents that may be present in the nanoparticle paste composition include, for example, octanoic acid, nonanoic acid, decanoic acid, caprylic acid, pelargonic acid, undecylic acid, lauric acid, tridecylic acid, myristic acid, pentadecanoic acid, palmitic acid, margaric acid, stearic acid, nonadecylic acid, alpha-linolenic acid, stearidonic acid, oleic acid, and linoleic acid.

[0056] In some embodiments, the organic matrix can include two or more hydrocarbons, two or more alcohols, two or more amines, and two or more organic acids. For example, in some embodiments, each class of organic solvent can have two or more members, or three or more members, or four or more members, or five or more members, or six or more members, or seven or more members, or eight or more members, or nine or more members, or ten or more members. Furthermore, the number of members in each class of organic solvent can be the same or different. Specific advantages of using multiple members of each class of organic solvent are described below.

[0057] One particular advantage of using multiple members within each class of organic solvents can include the ability to provide a wide range of boiling points in the nanoparticle paste composition. By providing a wide range of boiling points, the organic solvent can be gradually removed as the temperature increases, while affecting the compaction of the metal nanoparticles, thereby limiting volumetric shrinkage and favoring cracking. By gradually removing the organic solvent in this manner, less temperature control may be required to affect slow solvent removal than if a single solvent with a narrow boiling range were used. In some embodiments, members within each class of organic solvents can have a boiling window ranging from about 50°C to about 200°C, or from about 50°C to about 250°C, or from about 100°C to about 200°C, or from about 100°C to about 250°C. Higher boiling solvents can be used as well. In more specific embodiments, the various members of each class of organic solvents can each have boiling points that are at least about 5°C apart, or at least about 10°C apart, or at least about 20°C apart, e.g., from about 5°C to about 25°C, or from about 10°C to about 35°C, or from about 20°C to about 50°C. More specifically, in some embodiments, each hydrocarbon can have a boiling point that differs from other hydrocarbons in the organic matrix by about 20°C to about 50°C, each alcohol can have a boiling point that differs from other alcohols in the organic matrix by about 20°C to about 50°C, each amine can have a boiling point that differs from other amines in the organic matrix by about 20°C to about 50°C, and each organic acid can have a boiling point that differs from other organic acids in the organic matrix by about 20°C to about 50°C. The more members of each class of organic solvents that are present, the smaller the difference between the boiling points will be. By making the difference between the boiling points smaller, the solvent removal can be made more continuous, thereby limiting the amount of volumetric shrinkage that occurs at each stage. When 4-5 or more members of each class of organic solvents are present, each having boiling points that are separated from one another within the above ranges (e.g., 4 or more hydrocarbons, 4 or more alcohols, 4 or more amines, and 4 or more organic acids; or 5 or more hydrocarbons, 5 or more alcohols, 5 or more amines, 5 or more organic acids), a reduced degree of cracking may occur.

[0058] In addition to preventing cracking due to the solvent content of the metal nanoparticle composition, the silicate reactive matrix material, as used in the present disclosure, may adhere the via fill material to the via walls and / or the seed layer to the substrate surface. Adhesion to these surfaces, preferably by chemical bonding, may further inhibit cracking after consolidation of the metal nanoparticles and during thermal cycling of the substrate during use.

[0059] In various embodiments, the metal nanoparticles used in the nanoparticle paste composition can be about 20 nm or less in size. In some embodiments, suitable metal nanoparticles can be up to about 75 nm in size, up to about 100 nm in size, up to about 150 nm in size, or up to about 200 nm in size. As discussed above, metal nanoparticles in the size range of about 20 nm or less have a melting temperature significantly lower than that of the corresponding bulk metal, and as a result can easily undergo compaction with each other. Therefore, in at least some embodiments, metal nanoparticles of about 20 nm or less in size can be combined with metal nanoparticles of 20 nm or more in size to facilitate tuning of the melting temperature. In some embodiments, metal nanoparticles of about 20 nm or less in size can have a melting temperature of about 220° C. or less (e.g., a melting temperature in the range of about 140° C. to about 220° C.) or a melting temperature of about 200° C. or less, which can provide the above-mentioned advantages. In some embodiments, at least a portion of the metal nanoparticles can be about 10 nm or less in size, or about 5 nm or less in size. In some embodiments, at least a portion of the metal nanoparticles can range from about 1 nm in size to about 20 nm in size, or from about 1 nm in size to about 10 nm in size, or from about 1 nm in size to about 5 nm in size, or from about 3 nm in size to about 7 nm in size, or from about 5 nm in size to about 20 nm in size. Any of the above size ranges can be combined with metal nanoparticles of about 30 nm or more in size, or about 50 nm or more in size, or about 75 nm or more in size, or about 100 nm or more in size, or about 150 nm or more in size. In some embodiments, substantially all of the metal nanoparticles can be present within these size ranges. In some embodiments, larger metal nanoparticles can be combined with metal nanoparticles of about 20 nm or less in size in the metal nanoparticle paste composition. For example, in some embodiments, metal nanoparticles ranging in size from about 1 nm to about 10 nm, or from about 5 nm to about 20 nm, can be combined with metal nanoparticles ranging in size from about 25 nm to about 50 nm, or from about 25 nm to about 50 nm, or from about 25 nm to about 100 nm, or from about 30 nm to about 80 nm.In other embodiments, smaller metal nanoparticles are not necessarily present, and the metal nanoparticles may be in the range of about 30 nm or more in size, or about 50 nm or more in size, or about 75 nm or more in size, or about 100 nm or more in size, or about 150 nm or more in size, for example, about 30 nm to about 100 nm, or about 75 nm to about 150 nm, or about 125 nm to about 200 nm in size. More efficient packing of metal nanoparticles during consolidation may be achieved by using metal nanoparticles of two different size ranges. As discussed further below, in some embodiments, micron-sized metal particles or nanoscale particles may also be included in the metal nanoparticle composition. Although larger metal nanoparticles and micron-sized metal particles may not be liquefiable at the low temperatures of their smaller counterparts, they can still be consolidated when in contact with smaller metal nanoparticles that have formed a liquefied-like state at or above their melting temperatures, as generally discussed above. When smaller and larger metal nanoparticles are used in combination with each other, the smaller and larger metal nanoparticles can be combined in any ratio.

[0060] In addition to the metal nanoparticles and organic solvent, other additives may also be present in the metal nanoparticle paste composition. Such additional additives may include, for example, rheology control aids, thickeners, micron-sized conductive additives, nanoscale conductive additives, CTE adjusters, and any combination thereof. Chemical additives may also be present. As discussed below, it may be particularly advantageous to include micron-sized conductive additives, such as micron-sized metal particles. In some cases, it may be desirable to include nanoscale or micron-sized diamond or other thermally conductive additives. Additional additives may be included in various amounts and combinations to change the viscosity characteristics of the metal nanoparticle composition to aid in the distribution of the metal nanoparticle composition by a particular technique at a given location. For example, a metal nanoparticle composition for via filling may have a lower viscosity than one that is applied to a substrate surface to form a conductive trace.

[0061] In some embodiments, the metal nanoparticle composition can contain about 0.01% to about 15% by weight of micron-sized metal particles, or about 1% to about 10% by weight of micron-sized metal particles, or about 1% to about 5% by weight of micron-sized metal particles. The micron-sized metal particles can also be present in the metal nanoparticle composition in an amount of about 10% to about 35% by weight, or about 15% to about 35% by weight, or about 20% to about 35% by weight, or about 25% to about 35% by weight. The inclusion of micron-sized metal particles in the metal nanoparticle composition can desirably reduce the incidence of cracking that occurs during consolidation of the metal nanoparticles when forming the metallized layer or conductive traces in the present disclosure. Without being bound by any theory or mechanism, it is believed that the micron-sized metal particles can become consolidated with each other when the metal nanoparticles form a liquefied-like state and form a temporary liquid coating on the surface of the micron-sized metal particles. In some embodiments, the micron-sized metal particles can range in size from about 500 nm to about 100 microns in at least one dimension, or from about 500 nm to about 10 microns in at least one dimension, or from about 100 nm to about 5 microns in at least one dimension, or from about 100 nm to about 10 microns in at least one dimension, or from about 100 nm to about 1 micron in at least one dimension, or from about 1 micron to about 10 microns in at least one dimension, or from about 5 microns to about 10 microns in at least one dimension, or from about 1 micron to about 100 microns in at least one dimension. The micron-sized metal particles can contain the same metal as the metal nanoparticles, or can contain a different metal. This allows for the production of metal alloys by including micron-sized metal particles in metal nanoparticles having a different metal than the metal of the metal nanoparticles.Suitable micron-sized metal particles can include, for example, Cu particles, Ni particles, Al particles, Fe particles, Co particles, Mo particles, Ag particles, Zn particles, Sn particles, Au particles, Pd particles, Pt particles, Ru particles, Mn particles, Cr particles, Ti particles, V particles, Mg particles, or Ca particles. Non-metallic particles, such as, for example, Si micron-sized particles and B micron-sized particles, can be used as well. In some embodiments, the micron-sized metal particles can be in the form of metal flakes, such as, for example, high aspect ratio copper flakes. That is, in some embodiments, the metal nanoparticle composition described herein can contain a mixture of copper nanoparticles and high aspect ratio copper flakes or copper nanoparticles and other micron-sized copper particles. Specifically, in some embodiments, the metal nanoparticle composition can contain about 30% to about 97% by weight of copper nanoparticles and about 0.01% to about 15% by weight or 0.01% to 30% by weight of high aspect ratio copper flakes or other micron-sized copper particles. The high aspect ratio copper flakes, according to some embodiments, can be in the form of nanoparticles.

[0062] Other micron-sized metal particles that can be used equivalently to the high aspect ratio metal flakes include, for example, metal nanowires and other high aspect ratio particles, which can be up to about 300 microns in length. The ratio of metal nanoparticles to metal nanowires can be in the range of about 10:1 to about 40:1, according to various embodiments. Suitable nanowires can have lengths of, for example, about 5 microns to about 50 microns, and diameters of about 100 nm to about 200 nm, or about 100 nm to about 250 nm.

[0063] In some embodiments, nanoscale conductive additives can also be present in the metal nanoparticle composition. These additives can desirably provide additional structural reinforcement and reduce shrinkage during metal nanoparticle consolidation. Furthermore, the inclusion of nanoscale conductive additives can increase electrical and thermal conductivity values ​​that can approach or even exceed the electrical or thermal conductivity values ​​of the corresponding bulk metal after nanoparticle consolidation. In some embodiments, the nanoscale conductive additives can have a size in at least one dimension ranging from about 1 micron to about 100 microns, or from about 1 micron to about 300 microns. Suitable nanoscale conductive additives can include, for example, carbon nanotubes, graphene, other graphite-type materials, and the like. When present, the metal nanoparticle composition can contain about 1% to about 16% by weight of the nanoscale conductive additive, or about 1% to about 10% by weight of the nanoscale conductive additive, or about 1% to about 5% by weight of the nanoscale conductive additive.

[0064] Additional materials that may also be optionally present in the metal nanoparticle composition include, for example, flame retardants, UV protection agents, antioxidants, carbon black, graphite, fibrous materials (e.g., chopped carbon fiber materials), diamond, cubic BN, and the like.

[0065] Metal nanoparticle compositions suitable for use in the present disclosure can be formulated using any of the formulations described herein above, including those that further include a grain growth inhibitor, particularly a grain growth inhibitor that includes a metal. The grain growth inhibitor can be included in a suitable form such that it can enter the grain boundaries after nanoparticle compaction. If not included in a suitable form, ineffective grain growth inhibition can occur, even if the grain growth inhibitor otherwise includes a material that can provide grain growth inhibition.

[0066] In certain embodiments, metal nanoparticle compositions suitable for use in the present disclosure may include copper nanoparticles and a suitable amount of a grain growth inhibitor to prevent substantial grain growth upon heating of a bulk copper matrix formed from the copper nanoparticles. Various CTE modifiers may be present as well. A suitable amount of grain growth inhibitor and / or CTE adjuster may range from about 0.01% to about 15% by weight of the composition, according to various embodiments. The effective temperature ranges at which grain growth inhibitors may inhibit grain growth are discussed below.

[0067] Suitable grain growth inhibitors can be metal particles that are insoluble in the copper matrix. Suitable grain growth inhibitors can be heterogeneous nanoparticles with a size range of 25 nm or less or a size range of about 10 nm or less. It may be particularly desirable to include grain growth inhibitors containing metal, especially metal nanoparticles with a size of about 25 nm or less or about 10 nm or less, in the bulk copper matrix. The small nanoparticle size allows the grain growth inhibitor to easily access the grain boundaries. The inclusion of grain growth inhibitors restricts grain growth by interfaces or Zener pinning, ensuring that the nanograin structure is maintained even after long-term exposure to high temperatures, frequent temperature cycles, and thermal shocks. These actions can prevent further atomic diffusion and reorganization.

[0068] Suitable metals for the grain growth inhibitors may include, for example, Fe, Mn, Cr, Co, Ru, Si, V, W, Nb, Ta, Y, Zr, Hf, Be, Tl, Rh, Ir, Ti, Mo, Re, Al, alloys thereof, or any combination thereof, particularly nanoparticles containing one or more of these metals. Si is considered to be a metal for the purposes of this disclosure. The metal particles may be metal nanoparticles or micron-sized metal particles, according to various embodiments. Nanoparticles of these metals may be particularly suitable. Other suitable grain growth inhibitors may include, for example, carbides, nitrides, borides, silicides, or phosphides. Suitable borides may include, for example, Zr / Hf, V, or Nb / Ta. Any of the above metals may be suitable, although similar metals are suitable for carbides, nitrides, silicides, and phosphides. Other suitable phosphides may include covalent phosphides such as BP and SiP2, transition metal phosphides such as Fe3P, Fe2P, Ni2P, CrP, MnP, MoP, etc. Metal-rich phosphides such as these may be desirable due to their water insolubility, electrical conductivity, high melting point, thermal stability, hardness, and similar properties. Other suitable carbides include BC (B x C y Covalent carbides such as SiC (including non-stoichiometric carbides) and SiC, as well as transition metal carbides, which also exhibit high melting points, hardness, electrical conductivity, and similar properties. Graphene and other nanocarbon materials may also be effective grain growth inhibitors in some cases.

[0069] Suitable grain growth inhibitors may be included in the copper nanoparticle paste composition or in the bulk copper matrix obtained therefrom in an amount ranging from about 0.01% to about 15% by weight of the composition. In more specific embodiments, the grain growth inhibitor may be present in an amount ranging from about 0.01% to about 5% by weight, or from about 0.1% to about 0.5% by weight. Particular copper nanoparticle compositions may include up to about 12% by weight Al, or about 0.01 to 5% by weight Zr, or 0.01 to 5% by weight Zr / Hf. These particular grain growth inhibitors in the amounts mentioned may provide temperature stability up to about 940° C., 500° C., or 600° C., respectively. Aluminum may be advantageous in forming insoluble binary phases such as CuAl2 or Cu9Al4. Al2O3, including its nanoparticles, may be a suitable grain growth inhibitor and may impart improved oxidation resistance.

[0070] The grain growth inhibitor can be in various forms when incorporated / combined with the copper nanoparticles. In some embodiments, the grain growth inhibitor can be a nanoparticle itself, particularly having a size of about 25 nm or less, or about 10 nm or less. In other embodiments, the grain growth inhibitor can range in size from 10 nm to 100 nm, or from about 25 nm to about 100 nm.

[0071] When incorporated as nanoparticles, the reagents for forming grain growth inhibitors can be mixed with the reagents for forming copper nanoparticles (or other types of metal nanoparticles), which can then undergo co-reduction to simultaneously form copper nanoparticles and grain growth inhibitors. Suitable reagents for forming grain growth inhibitors can include, for example, nitrates, chlorides, bromides, or iodides of metals. Grain growth inhibitors can also constitute nanoparticle seeds for copper nanoparticles (or other metal nanoparticles) and then be incorporated into the bulk copper matrix obtained after copper nanoparticle fusion. Nanoparticle seeds suitable for becoming grain growth inhibitors can be made separately and combined with the reagents for forming copper nanoparticles, or such nanoparticle seeds can be formed simultaneously with the formation of copper nanoparticles. A carrier solvent can be used to disperse the reagents for forming nanoparticle seeds / grain growth inhibitors before dispersing with the copper nanoparticles or copper nanoparticle precursors.

[0072] Alternatively, the preformed grain growth inhibitor can be mixed with the preformed copper nanoparticles (or other metal nanoparticles) either before or after the copper nanoparticles are incorporated into the metal nanoparticle composition.

[0073] In yet another alternative embodiment, a trialkylaluminum compound (e.g., trimethylaluminum) may be incorporated into the metal nanoparticle composition. The trialkylaluminum may react during copper nanoparticle consolidation to release aluminum or aluminum compounds to the grain boundaries.

[0074] Further alternatively, a salt that forms a grain growth inhibitor after reduction can be mixed within the metal nanoparticle composition and then undergo reduction to form the grain growth inhibitor during consolidation of the metal nanoparticles. A carrier solvent can be used to facilitate mixing with the metal nanoparticle composition.

[0075] In yet another embodiment, NaReO4 can be incorporated into the grain growth inhibitor. This salt is compatible with both aqueous and non-aqueous solvent conditions (including glyme solvent mixtures) and the same amines that can be used in forming copper nanoparticles. Reducing agents such as NaBH4, CaH2, hydrazine, organomagnesium or organosodium compounds, or redAl can be used to affect reduction.

[0076] CTE tuning in the metal nanoparticle composition or the metallization layer resulting therefrom can be achieved by adding low CTE materials in the form of small particles (e.g., platelets, fibers, wires, etc. in the 0.5-250 micron range) to the metal nanoparticle composition. Examples include, but are not limited to, diamond, BN, SiC, AlN, graphite, carbon nanotubes, graphene, etc. Preferably, CTE tuning can be achieved using materials with high thermal conductivity, although silica and other oxides with negative thermal expansion may be suitable as well. The addition of micron-sized metal particles allows for upward tuning. High aspect ratio particles may further help increase mechanical strength. The metal nanoparticle composition introduced into the via and the metal nanoparticle composition used to form the metallization layer may be of the same or different composition and may or may not contain the same metal. CTE tuning, also referred to as CTE matching in this disclosure, may refer to two CTE values ​​that differ from each other by about 20% or less, about 15% or less, about 10% or less, about 5% or less, or about 1% or less.

[0077] Thus, the present disclosure provides a metallized substrate that may define an interposer for incorporation into an electronic component or elsewhere in an electrical interconnect. The metallized substrate includes a base substrate having one or more vias that terminate within the base substrate (blind vias), extend between a first side and a second side of the base substrate (through-surface vias), or any combination thereof, the base substrate including a glass or silicon substrate, and a via fill material within the one or more vias. The via fill material includes 1) a porous matrix material having about 30% to about 60% void space and optionally including a plurality of electrically conductive particles bonded together with a hardened silicate reactive matrix material, and 2) a conductive network at least partially filling the void space within the porous matrix material, the conductive network including a plurality of metal nanoparticles compacted together.

[0078] Base substrates suitable for use in the present disclosure may be silicon or glass. When used, the silicate reactive matrix material may form a chemical bond to the glass or silicon substrate (e.g., with one or more of the via walls and / or faces of the substrate) upon curing to facilitate the features described herein.

[0079] Vias in the base substrate may be up to about 100 microns in diameter, or even up to about 250 microns in diameter, or up to about 500 microns in diameter, or may be as small as about 5 microns or about 10 microns in diameter. Thus, vias in the base substrate may range from about 5 microns to about 500 microns in diameter, or from about 10 microns to about 150 microns in diameter, or from about 10 microns to about 50 microns in diameter, or from about 50 microns to about 100 microns in diameter, or from about 100 microns to about 150 microns in diameter, or from about 150 microns to about 250 microns in diameter, or from about 250 microns to about 500 microns in diameter, or from about 5 microns to about 25 microns in diameter, or from about 25 microns to about 75 microns in diameter, or from about 75 microns to about 125 microns in diameter, or from about 75 microns to about 175 microns in diameter, in non-limiting examples. Suitable vias may have any cross-sectional profile as they extend through the base substrate. According to some embodiments, the vias may have a circular cross-sectional profile, such that such vias have a cylindrical shape. Other suitable via cross-sectional profiles include, but are not limited to, square, rectangular, triangular, oval, or other regular or irregular geometric shapes. According to some embodiments, the cross-sectional profile of the vias may be substantially equal in size on both sides of the substrate, or the cross-sectional profile may differ in size. That is, in some embodiments, the vias may be tapered. In some embodiments, suitable vias may taper from a larger diameter to a smaller diameter from the surface of the substrate to the interior of the substrate, and optionally, the tapered vias have substantially equal diameters on each side of the base substrate. Both blind and through-surface vias may be loaded with the via fill material and conductive network of the present disclosure.

[0080] FIG. 3 is a diagram of a metallized substrate of the present disclosure including a filled via. As shown, the metallized substrate 100 includes a base substrate 102 having a via 104 extending between an upper surface 105 and a lower surface 106. The via 104 is loaded with a via fill material 110, which includes a porous matrix material 112 and a conductive network 114 including consolidated metal nanoparticles. The conductive network 114 is located within the void spaces of the porous matrix material 112. The porous matrix material 112 includes a plurality of electrically conductive particles (e.g., micron-sized metal particles). Optionally, the porous matrix material 112 may further include a hardened silicate reactive matrix material that bonds the micron-sized metal particles together. Upon hardening, the hardened silicate reactive matrix material may form a surface coating 120 by covalent bonding on the walls of the via 104, thereby resulting in a hermetic sealing of the via 104. Additionally, if used, the cured silicate reactive matrix material may tightly bond the electrically conductive particles together and promote retention of the via fill material 110 within the via 104. Even if the walls of the via 104 are not hermetically sealed and the multiple electrically conductive particles are not bonded together using a cured silicate reactive matrix material, suitable electrical and / or thermal conductivity of the via 104 may still be achieved. Although the via 104 in FIG. 3 is shown as a through-surface via, it should be understood that blind vias may be filled as well.

[0081] The via fill material can be CTE matched to the base substrate by CTE matching the metal nanoparticle composition in which the conductive network is formed.

[0082] When used, the cured silicate reactive matrix material may be formed by depositing a liquid formulation including an uncured silicate reactive material and a plurality of electrically conductive particles. The liquid formulation may include a liquid glass binder, and the porous matrix material may include electrically conductive particles bound together with the cured liquid glass binder. A suitable liquid glass binder may include sodium or potassium silicate in a 40-70% aqueous solution (w / w), optionally including a base (e.g., NaOH, KOH, Ca(OH)2, etc.) and / or alumina particles of 50 nm to 3 microns. The silicate concentration in the aqueous solution may be in the range of 2-50% by weight, or in the range of 2-15% by weight, or in the range of 5-20% by weight, or in the range of 10-30% by weight, or in the range of 15-50% by weight. Organosilanes or organosilanols may also be suitable in this regard.

[0083] Optionally, the liquid formulation used for via filling may further include an additive that improves the compatibility between the matrix material and the electrically conductive particles therein, such as by promoting covalent bond formation between the two. Increased interaction between the electrically conductive particles and the matrix material may promote stronger adhesion between the electrically conductive particles and also help prevent cracking and other forms of mechanical failure. In some embodiments, the additive may include amino groups that can react with the surface of the electrically conductive particles and silane groups that can react with the matrix material. That is, the additive may act as a bridging group between the electrically conductive particles (via walls) and the cured silicate reactive matrix material. Thus, suitable additives include aminoalkyldialkoxysilanes, aminoalkyltrialkoxysilanes, or any combination thereof. Aminopropyltriethoxysilane (APTES) is a non-limiting example of a suitable additive that may be present.

[0084] Examples of electrically conductive particles that may be present in the liquid formulation introduced into the one or more vias to form the porous matrix material are not considered to be particularly limiting. Exemplary examples may include metal particles (including micron-sized metal particles, metal powders, or any combination thereof), chopped metal wires, metal nanowires, carbon nanotubes, graphene, other types of carbon nanomaterials, or any combination thereof. The electrically conductive particles may have a maximum diameter that is about 1 / 10 or less of the diameter of the one or more vias. For elongated electrically conductive particles such as metal nanowires, carbon nanotubes, graphene, and other carbon nanomaterials, the length of the electrically conductive particles may be about 3 / 4 or less of the diameter of the one or more vias. It may be desirable to introduce at least some elongated electrically conductive particles when filling the vias, due to the scaffolding effect they may provide as a result of their high aspect ratio. In a non-limiting example, the elongated electrically conductive particles may be present in an amount of up to about 67% by volume of the vias. In more specific examples, the elongated electrically conductive particles may have lengths ranging from about 100 nm to about 5 microns or from about 100 nm to about 3 microns, and diameters ranging from about 50 nm to about 200 nm. Thus, according to some embodiments, a conductive network having vias may include a mixture of micron-sized metal particles and one or more elongated electrically conductive particles. Metal nanoparticles may then fill any void volumes within the resulting conductive network.

[0085] Examples of suitable metals within the micron-scale metal particles, metal wires, metal wires, or other types of metal-containing materials may include, but are not limited to, copper, aluminum, silver, gold, palladium, tungsten, and any combination thereof. In various embodiments, the via fill material may include at least copper, e.g., at least micron-scale copper particles. The aforementioned metals, or any other metals mentioned herein as suitable for forming metal nanoparticles, may be present in the metal nanoparticles introduced to form a conductive network within the via fill material. In a non-limiting example, the conductive network may include a copper network formed from copper nanoparticles.

[0086] When used, the silicate reactive matrix material may be present in at least an amount sufficient to bind the electrically conductive particles together and promote retention of the via fill material in one or more vias. In non-limiting examples, the weight ratio of electrically conductive particles to hardened silicate reactive matrix material in the via fill material may range from about 4:1 to about 30:1, or from about 6:1 to about 30:1, or from about 8:1 to about 25:1, or from about 10:1 to about 20:1, or from about 15:1 to about 25:1. The silicate reactive matrix material may further react with the via walls to promote a hermetic seal thereof and promote retention of the via fill material in the via.

[0087] A method for filling vias according to the present disclosure may include providing a base substrate having one or more vias defined therein, the one or more vias terminating within the substrate, extending between a first side and a second side of the substrate, or any combination thereof, the base substrate including a glass substrate or a silicon substrate, depositing a via-fill precursor comprising a plurality of electrically conductive particles and, optionally, a silicate reactive matrix material into the one or more vias, curing the via-fill precursor to form a porous matrix material having about 30% to about 60% void space, introducing a metal nanoparticle composition into at least a portion of the void space, and at least partially consolidating the metal nanoparticles of the metal nanoparticle composition with each other within the void space to form a conductive network that at least partially fills the void space. Curing may include sintering the electrically conductive particles and converting the silicate reactive matrix material, if present, into a cured silicate reactive matrix material that bonds at least the electrically conductive particles together.

[0088] Introducing the metal nanoparticle composition into the void spaces of the via-fill material can be done by any suitable technique compatible with at least partially filling the void spaces, preferably at least about 90%, or at least about 95%, or at least about 99% of the void spaces. Suitable techniques can include pressure infiltration, vacuum infiltration, or any combination thereof. The conditions for infiltrating the metal nanoparticle composition can further promote consolidation of the metal nanoparticles to form a conductive network in the void spaces. In non-limiting examples, the conditions in the vacuum infiltration and / or pressure infiltration process can include a temperature of about 200° C. to about 270° C. and a pressure of about 500 psi to about 2500 psi. The via-fill precursor and the metal nanoparticle composition can be combined together before being deposited and introduced into one or more vias, and / or the via-fill precursor and the metal nanoparticle composition can be deposited and introduced into one or more vias separately.

[0089] In addition to the filled vias discussed above, the metallized substrate disclosed herein may further comprise one or more conductive traces defined on at least one of the first side or the second side of the base substrate and in electrical communication with the via fill material in the one or more vias. The one or more conductive traces may be deposited on a seed layer adhered to at least one of the first side or the second side, the seed layer comprising a hardened silicate reactive matrix material and a second plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material. The seed layer may be non-electrically conductive or have low conductivity as deposited, and may then be made electrically conductive by mechanical polishing, as discussed in more detail below. The conductive traces may be located on the seed layer, preferably after the seed layer has been converted to a conductive state. The seed layer may be considered to define a portion of the conductive trace formed thereon. Thus, the seed layer is preferably electrically conductive. Furthermore, when the seed layer is mechanically polished, increased adhesion of the metallization layer thereon can be realized, which can then be refined to form one or more conductive traces at desired locations.

[0090] The conductive traces may further be in direct electrical communication with the via fill material or indirect electrical communication through a bond pad deposited on the via fill material. The seed layer may be deposited as a discontinuous layer to accommodate direct or indirect contact between the conductive traces and the vias, as described in more detail below.

[0091] Advantageously, the coating formulation deposited on one or more surfaces of the base substrate to form a seed layer thereon may include a similar type of formulation to that used to form the porous matrix material in one or more vias, at least when the via filling material also includes a silicate reactive matrix material that undergoes curing to form a cured silicate reactive matrix material. That is, the coating formulation for the outer surface of the base substrate may also include a plurality of electrically conductive particles (e.g., a plurality of micron-sized metal particles) and a silicate reactive matrix material that may be the same or different from the silicate reactive matrix material used to form the porous matrix material in the one or more vias. The second plurality of electrically conductive particles in the coating formulation applied to the outer surface of the base substrate may be a plurality of micron-sized metal particles, such as copper particles or copper powder. Curing forms a seed layer by converting the silicate reactive matrix material from an initial fluid state to a substantially non-fluid state, which is bonded to the surface of the base substrate and physically adheres the electrically conductive particles to each other and to the surface of the base substrate.

[0092] Optionally, the coating mixture may further include additives that improve compatibility between the matrix material of the seed layer and the metal particles therein, such as by promoting covalent bond formation between the two, as discussed above. Increased interaction between the metal particles and the matrix material may help prevent cracking under thermal stress. In some embodiments, the additive may include an amino group that may react with the surface of the metal particles and a silane group that may react with the matrix material. Thus, suitable additives include aminoalkyldialkoxysilanes, aminoalkyltrialkoxysilanes, or any combination thereof. Aminopropyltriethoxysilane (APTES) is a non-limiting example of a suitable additive that may be present.

[0093] Suitable techniques for applying the coating mixture to the outer surface of the base substrate are not believed to be particularly limited and may include, but are not limited to, techniques such as spray-on, brush-on, dip coating, inkjet printing, stencil, spin-on coating, or similar application techniques. Unless otherwise indicated, all or a substantial portion of the outer surface of the base substrate may be coated with the coating mixture when forming the seed layer. The viscosity of the coating formulation may be adjusted to support the selected deposition technique. Depositing the coating formulation on the outside of the base substrate may be performed after filling of one or more vias has been performed according to the disclosure herein. The seed layer may be selectively deposited to avoid overcoating one or more vias, or openings may be defined in the seed layer to expose the via filling material to facilitate electrical communication with the conductive traces.

[0094] The metal particles (e.g., micron-sized metal particles and / or metal nanoparticles) in the coating formulation may comprise the same or different metal as the metallization layer subsequently formed on the seed layer created upon curing the coating formulation. The metal in the metallization layer may comprise a metal selected from any of the metal nanoparticle types mentioned above, and the metal particles in the coating mixture / seed layer may be selected to match or be different from the metal in the metallization layer. For example, the metal particles in the coating mixture / seed layer and the metal in the metallization layer may both comprise copper. The metal in the coating formulation / seed layer and the metal in the metallization layer may be the same or different from the metal in one or more vias. However, copper may be present in all three locations in various embodiments.

[0095] The amount of silicate reactive matrix material relative to electrically conductive particles, such as micron-sized metal particles, in the coating formulation can vary over a wide range. The selected range can be chosen so that the coating formulation can be dispensed by a particular application technique since the viscosity of the coating formulation can vary with the loading of electrically conductive particles. In non-limiting examples, the weight ratio of electrically conductive particles to silicate reactive matrix material in the coating formulation or seed layer can range from about 1:1 to about 30:1, or from about 2:1 to about 10:1, or from about 3:1 to about 6:1, 6:1 to about 12:1, or from about 12:1 to about 20:1, or from about 15:1 to about 30:1.

[0096] The thickness of the seed layer after curing can vary over a range of values ​​and can depend on the size of the electrically conductive particles, such as metal particles, present therein. In non-limiting examples, the seed layer can range from about 1 micron to about 50 microns thick, or about 1 micron to about 30 microns thick, or about 1 micron to about 20 microns thick, or about 5 microns to about 30 microns thick, or about 1 micron to about 10 microns thick. The diameter of the electrically conductive particles, such as metal particles, can determine, at least in part, the thickness of the seed layer. Seed layer thicknesses in the size range of 5 to 20 microns or 10 to 30 microns can be achieved with metal particles having a size of about 1 to 5 microns, or about 10 to 12 microns, or about 10 to 28 microns. Even thicker seed layers can be achieved by applying the coating mixture to the substrate multiple times and / or by using larger metal particles therein.

[0097] The seed layer as initially deposited (after curing) may be an electrical insulator or have low electrical conductivity due to electrically conductive particles, such as metal particles, not being connected or being minimally connected to each other. Surprisingly, the seed layer, after deposition and curing, may be converted from an electrical insulator state to an electrical conductor state by mechanical polishing. Suitable mechanical polishing may be achieved by rubbing the seed layer with an abrasive material, such as sandpaper or steel wool. In another example, a chemical mechanical polishing process commonly used in the electronics industry may be used instead. Without being bound by theory or mechanism, it is believed that the mechanical polishing process promotes smearing of grains of metal particles in the seed layer to establish interconnects therebetween.

[0098] In addition to promoting electrical conductivity, the physical appearance of the seed layer may be altered after a mechanical polishing operation. For example, Figures 4A and 4B are images of a glass substrate coated with a seed layer containing copper particles before and after polishing, respectively. The initial dull appearance of the seed layer becomes much shinier after polishing. Figure 5 is an image of a metallized glass substrate, which may be prepared as described in more detail below. The glass substrates of Figures 4A, 4B, and 5 do not have vias defined therein and are presented to highlight the deposition of the seed layer and metallization layer on the substrate surface. The metallization layer in Figure 5 is formed on the seed layer, as described in more detail above.

[0099] The sheet resistance in the seed layer after mechanical polishing can be about 500 mOhm / sq or less, or about 400 mOhm / sq or less, or about 300 mOhm / sq or less, or about 200 mOhm / sq or less, or about 100 mOhm / sq for seed layer thicknesses of about 30 microns or more. At thicknesses of 10 microns or less, the sheet resistivity can range from about 1 Ohm / sq to about 10 Ohm / sq. A copper-containing seed layer having a sheet resistivity of about 100 mOhm / sq is still about 100 times higher than the sheet resistance of bulk copper, but is still significantly more conductive than conventional materials that are not subjected to mechanical polishing. Such conductivity / resistivity values ​​are still sufficient to establish electrical communication between the conductive traces deposited on the seed layer and the via fill material.

[0100] In non-limiting examples, a metallization layer deposited on a seed layer after mechanical polishing of the seed layer can have a sheet resistivity of about 1 mOhm / sq or less, or about 0.5 mOhm / sq, or about 0.25 mOhm / sq. For example, a copper-based metallization layer can have a sheet resistivity of about 0.15 mOhm / sq for a 300 micron thick layer and about 0.05 mOhm / sq for a 650 micron thick layer.

[0101] Advantageously, the coating formulations used herein can be applied without taking the precaution of an inert atmosphere. In a non-limiting example, sufficient curing of the liquid glass matrix (if present in the form of a silicate reactive matrix material) can occur at temperatures up to about 100°C, such as about 90°C to about 100°C, or even as low as room temperature, over a cure time of approximately 10 to 15 minutes. Similar advantages apply to materials introduced in forming the via fill material.

[0102] After mechanical polishing (optionally and preferably so that the seed layer is rendered electrically conductive), a metal nanoparticle composition can be used to deposit a metal layer on the polished seed layer. The metal nanoparticle composition can be formulated to facilitate a selected deposition method, ranging from a low viscosity dispersion suitable for spraying, printing, stenciling, or similar applications, to a thick paste for brush-on, doctor blading, or wipe-on applications to deposit thicker metal layers. The metallization layer can be a continuous metallization layer similar to a bulk copper sheet adhered to a base substrate via a seed layer (similar to a copper sheet adhered to a fiberglass substrate via an adhesive), or conductive traces can be directly printed in a desired pattern using a metal nanoparticle composition on the seed layer. Selective etching of the continuous metallization layer can provide metal traces on the surface of the substrate if the conductive traces are not directly printed. As indicated above, the preferred metal nanoparticle compositions described above can further characterize the CTE match with the substrate to be coated according to the disclosure herein. Additionally, alternatively, conventional electroplating or electroless plating techniques may be utilized to form a continuous metallization layer, which may then be etched to define one or more conductive traces on the surface of the substrate.

[0103] FIG. 6A is a diagram of a metallized substrate of the present disclosure further having a seed layer and a continuous metallization layer disposed thereon. The metallized substrate 600 is similar to the metallized substrate 100 of FIG. 3, except that the metallized substrate 600 has a bond pad 601, a seed layer 602, and a metallization layer 610 thereon, and can be better understood by reference thereto. Common reference numerals are used to describe elements in the metallized substrate 600 that are substantially similar to corresponding elements in FIG. 3. The vias 104 in FIG. 6A are shown as through-plane vias, but the concepts disclosed therein are also applicable to blind vias. As shown, the metallized substrate 600 includes a base substrate 102 having a via 104 filled as described above, and a seed layer 602 disposed on at least a portion of the base substrate 102. The seed layer 602 includes a matrix material 606 and metal particles 605 therein. Prior to depositing the seed layer 602, the bond pads 601 can be disposed on an outer surface of the vias 104. The bond pad 601 may comprise the same metal nanoparticle composition as that used to deposit the metallization layer 610, or the metal nanoparticle composition may be different. A seed layer 602 may then be deposited on the surface of the base substrate 102 such that the seed layer 602 is contiguous with the bond pad 601, but is otherwise discontinuous. Alternatively, the seed layer 602 may be deposited as a continuous layer over the via 104, and an opening in the seed layer 602 to expose the via 104 may be defined by selective etching or grinding of the seed layer 602. In this case, the bond pad 601 and the metallization layer 610 may be formed simultaneously, and the bond pad 601 is not necessarily distinguishable from the metallization layer 610. That is, when the via 104 is exposed, the metallization layer 610 may be deposited directly on the via 104 and on the seed layer 602, such that there is no separate bond pad 601. Preferably, a metal layer 610 formed from a metal nanoparticle composition is deposited over at least a portion of the bond pad 601 (or via 104 ) and the seed layer 602 and can be CTE matched to the metal layer 610 or to the base substrate 102 .The metallization layer 610 is in electrical communication with the via fill material 110 through the bond pad 601. The metallization layer 610 may comprise a directly printed conductive trace or a continuous metallization layer that is subsequently etched away to define one or more conductive traces that are in electrical communication with the via fill material 110 through the bond pad 601 (or directly if the bond pad 601 is not separate from the metallization layer 610). Although the seed layer 602 and the metallization layer 610 are shown as having a sharp interface between the two, it should be understood that at least partial intermixing may occur between the seed layer 602 and the metallization layer 610, such that there is an intermixed zone between the two of about 1-10 microns.

[0104] 6B is a diagram of metallized substrate 600 after conductive traces 650 have been defined thereon by selective etching of metallization layer 610 and seed layer 602. Each conductive trace 650 collectively includes bond pad 601 (optionally not separate from metallization layer 610), seed layer 602, and metallization layer 610. Again, vias 104 may be blind vias instead of the through-plane vias shown.

[0105] In some embodiments, forming a metallization layer on a seed layer using a metal nanoparticle composition may include a hot pressing operation in which at least a portion of the metal nanoparticles in the metal nanoparticle composition undergo consolidation under hot pressing conditions. Exemplary hot pressing conditions may include a temperature of about 200° C. to about 270° C. and a pressure of about 500 psi to about 2500 psi. The hot pressing may be performed for about 30 minutes to about 90 minutes, although longer or shorter times may be suitable. Consolidation of the metal nanoparticles in the vias may occur at this point if they have not been previously consolidated.

[0106] The metal in the metallization layer is not particularly limited and can be any metal that bonds well to the seed layer. In non-limiting examples, the metal in the metallization layer can include, but is not limited to, copper, palladium, gold, or silver.

[0107] The thickness of the metallization layer (and the resulting conductive traces) can vary over a wide range. In non-limiting examples, the metallization layer can be up to about 500 microns thick, such as in the range of about 300 microns to about 500 microns, or about 100 microns to about 400 microns, or about 10 microns to about 100 microns.

[0108] The metallized substrates described herein may comprise at least a portion of a printed circuit board, an interposer, a packaging substrate, or multiple metallized substrates may be stacked together within a printed circuit board. When stacked together, the architectures of the various metallized substrates do not necessarily have to be the same as one another.

[0109] The embodiments disclosed herein include those of the following clauses. A. Metallized Substrates. The metallized substrate includes a base substrate having one or more vias extending between a first side and a second side thereof, the base substrate including a glass substrate or a silicon substrate, and a via fill material in the one or more vias, the via fill material including: 1) a porous matrix material having about 30% to about 60% void space and including a plurality of electrically conductive particles bonded together with a hardened silicate reactive matrix material, and 2) a conductive network at least partially filling the void space in the porous matrix material, the conductive network including a plurality of metal nanoparticles consolidated together with one another. A1. A printed circuit board comprising a metallized substrate as described in A or a plurality of metallized substrates as described in A stacked on top of each other. A2. An interposer comprising a metallized substrate as described in A. B. A process for making a metallized base substrate, the process including providing a base substrate having one or more vias defined therein and extending between a first side and a second side of the base substrate, the base substrate including a glass substrate or a silicon substrate, depositing a via fill precursor comprising a plurality of electrically conductive particles and a silicate reactive matrix material in the one or more vias, curing the fill material precursor to form a porous matrix material having about 30% to about 60% void space, introducing a metal nanoparticle composition into at least a portion of the void space, and at least partially consolidating the metal nanoparticles of the metal nanoparticle composition with one another in the void space to form a conductive network that at least partially fills the void space.

[0110] Embodiments A, A1, A2, and B may have one or more of the following additional elements in any combination. Element 1: The hardened silicate reactive matrix material comprises a hardened liquid glass binder. Element 1A: The silicate reactive matrix material includes a liquid glass binder. Element 2: The electrically conductive particles include one or more particles selected from the group consisting of micron-sized metal particles, chopped metal filaments, metal nanowires, carbon nanotubes, graphene, graphitic materials, and any combination thereof. Element 3: The electrically conductive particles have a diameter that is less than or equal to about 1 / 10 of the diameter of the one or more vias. Element 4: The electrically conductive particles are elongated and have a length that is less than or equal to about 3 / 4 of the diameter of the one or more vias. Element 5: The weight ratio of electrically conductive particles to hardened silicate reactive matrix material in the via fill material ranges from about 6:1 to about 30:1. Element 6: A hardened silicate reactive matrix material is chemically bonded to the walls of the one or more vias. Element 7: The electrically conductive particles include at least micron-sized copper particles. Element 8: The metal nanoparticles include copper nanoparticles. Element 9: The one or more vias have a diameter of up to about 500 microns. Element 10: The metallized substrate further comprises one or more conductive traces defined on at least one of the first side or the second side of the base substrate and in electrical communication with the via fill material. Element 11: One or more conductive traces are located on a seed layer adhered to the first or second side of the base substrate, the seed layer is electrically conductive and includes a hardened silicate reactive matrix material and a plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material, and the one or more conductive traces directly contact the via fill material or indirectly contact the via fill material via a bonding pad. Element 11A: One or more conductive traces are located on a seed layer adhered to the first side or the second side of the base substrate, the seed layer being electrically conductive and including a hardened silicate reactive matrix material and a plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material. Element 12: The seed layer has a thickness in the range of about 1 micron to about 30 microns. Element 13: The electrically conductive particles in the seed layer include micron-sized metal particles. Element 14: A metal nanoparticle composition is introduced into one or more vias within at least a portion of the void space by pressure infiltration, vacuum infiltration, or any combination thereof. Element 15: The process further includes depositing a seed layer on at least a portion of the base substrate, the seed layer comprising a silicate reactive matrix material and a plurality of electrically conductive particles; curing the silicate reactive matrix material to form a hardened silicate reactive matrix material; and forming one or more conductive traces on at least a portion of the seed layer, the one or more conductive traces in electrical communication with the via fill material.

[0111] As a non-limiting example, exemplary combinations applicable to A, A1, A2, and B include: 1 and / or 1A, and 2; 1 and / or 1A, and 3 and / or 4; 1 and / or 1A, and 2 and 3; 1 and / or 1A, and 2 and 4; 1 and / or 1A, and 2-4; 1 and / or 1A, and 5; 1 and / or 1A, and 6; 1 and / or 1A, and 7; 1 and / or 1A, and 8; 1 and / or 1A, and 7 and 8; 1 and / or 1A, and 9; 1 and / or 1A, and 10; 1 and / or 1A, 10 and 11 or 11A; 1 and / or 1A, and 12; 1 and / or 1A, and 13; 1 and / or 1A, and 14; 2, and 3 or 4; 2-4; 2 and 5; 2 and 6; 2 and 7; 2 and 8; 2, 7, and 8; 2 and 9; 2 and 10; 2 and 11 or 11A; 2 and 12; 2 and 13; 2 and 14; 3 and / or 4, and 5; 3 and / or 4, and 6; 3 and / or 4, and 7; 3 and / or 4, and 8;3 and / or 4, and 7 and 8;3 and / or 4, and 9;3 and / or 4, and 10;3 and / or 4, and 11 or 11A;3 and / or 4, and 12;3 and / or 4, and 13;3 and / or 4, and 14;5 and 6;5 and 7;5 and 8;5, 7 and 8;5 and 9;5 and 10;5, and 11 or 11A;5 and 12;5 and 13;5 and 14;6 and 7;6 and 8;6, 7 and 8;6 and 9;6 and 10;6, and 11 or 11A;6 and 1 Examples of suitable combinations include, but are not limited to, 2;6 and 13;6 and 14;7 and 8;7 and 9;7 and 10;7, and 11 or 11A;7 and 12;7 and 13;7 and 14;8 and 9;8 and 10;8, and 11 or 11A;8 and 12;8 and 13;8 and 14;9 and 10;9, and 11 or 11A;9 and 12;9 and 13;9 and 14;10, and 11 or 11A;10 and 12;10 and 13;10 and 14;12 and 13;12 and 14; and 13 and 14. Any of the foregoing may be further combined with 15.

[0112] This disclosure is further subject to the following non-limiting provisions. Clause 1. A metallized substrate, a base substrate having one or more vias that terminate within the base substrate, extend between a first side and a second side of the base substrate, or any combination thereof, the base substrate comprising a glass substrate or a silicon substrate; and a via fill material in the one or more vias, the via fill material comprising: 1) a porous matrix material having about 30% to about 60% void space and including a plurality of electrically conductive particles; 2) a conductive network at least partially filling void spaces within a porous matrix material, the conductive network comprising a plurality of metal nanoparticles consolidated together with one another. Clause 2. The metallized substrate of clause 1, wherein the electrically conductive particles are bound together with a hardened silicate reactive matrix material. Clause 3. The metallized substrate of clause 2, wherein the hardened silicate reactive matrix material comprises a hardened liquid glass binder. Clause 4. The metallized substrate of clause 2 or 3, wherein the weight ratio of the electrically conductive particles in the via fill material to the hardened silicate reactive matrix material ranges from about 6:1 to about 30:1. Clause 5. The metallized substrate of any one of clauses 2-4, wherein the hardened silicate reactive matrix material is also chemically bonded to walls of the one or more vias. Clause 6. The metallized substrate of any one of clauses 1-5, wherein the electrically conductive particles comprise one or more particles selected from the group consisting of micron-sized metal particles, chopped metal filaments, metal nanowires, carbon nanotubes, graphene, graphitic materials, and any combination thereof. Clause 7. The metallized substrate of any one of clauses 1-6, wherein the electrically conductive particles have a diameter less than or equal to about 1 / 10 of the diameter of the one or more vias, the electrically conductive particles are elongated and have a length less than or equal to about 3 / 4 of the diameter of the one or more vias, or any combination thereof. Clause 8. The metallized substrate of any one of clauses 1-7, wherein the electrically conductive particles comprise at least micron-sized copper particles. Clause 9. The metallized substrate of clause 8, wherein the metal nanoparticles comprise copper nanoparticles. Clause 10. The metallized substrate of any one of clauses 1-9, wherein one or more vias have a diameter of up to about 500 microns. Article 11. 11. The metallized substrate of any one of clauses 1-10, further comprising one or more conductive traces defined on at least one of the first side or the second side of the base substrate and in electrical communication with the via fill material. Clause 12. The metallized substrate of clause 11, wherein the one or more conductive traces are located on a seed layer adhered to at least one of the first side or the second side of the base substrate, the seed layer being electrically conductive and comprising a hardened silicate reactive matrix material and a second plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material, and the one or more conductive traces directly contact the via fill material or indirectly contact the via fill material via a bonding pad. Clause 13. The metallized substrate of clause 12, wherein the seed layer has a thickness in the range of about 1 micron to about 30 microns. Clause 14. The metallized substrate of clause 12, wherein the second plurality of electrically conductive particles in the seed layer comprises micron-sized metal particles, metal nanoparticles, or any combination thereof. Clause 15. A printed circuit board comprising a metallized substrate according to any one of clauses 1-14 or a plurality of metallized substrates according to any one of clauses 1-14 stacked on top of each other. Clause 16. The printed circuit board of clause 15, wherein the electrically conductive particles are bound together with a hardened silicate reactive matrix material. Clause 17. The printed circuit board of clause 16, wherein one or more conductive traces are defined on at least one of the first surface or the second surface of the base substrate and are in electrical communication with the via fill material. Clause 18. The printed circuit board of clause 17, wherein the one or more conductive traces are located on a seed layer adhered to at least one of the first side or the second side of the base substrate, the seed layer being electrically conductive and comprising a hardened silicate reactive matrix material and a second plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material. Clause 19. The printed circuit board of clause 15, wherein one or more conductive traces are defined on at least one of the first surface or the second surface of the base substrate and are in electrical communication with the via fill material. Clause 20. The printed circuit board of clause 19, wherein the one or more conductive traces are located on a seed layer adhered to at least one of the first side or the second side of the base substrate, the seed layer being electrically conductive and comprising a hardened silicate reactive matrix material and a second plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material. Clause 21. An interposer comprising a metallized substrate according to any one of clauses 1 or 6-14. Clause 22. An interposer comprising a metallized substrate according to any one of clauses 2-14. Clause 23. A process comprising: providing a base substrate having one or more vias defined therein, the one or more vias terminating within the base substrate, extending between a first side and a second side of the base substrate, or any combination thereof, the base substrate comprising a glass substrate or a silicon substrate; depositing a via fill precursor in one or more vias, the via fill precursor comprising a plurality of electrically conductive particles; curing the via-fill precursor to form a porous matrix material having about 30% to about 60% void space; introducing a metal nanoparticle composition into at least a portion of the void space; and at least partially consolidating the metal nanoparticles of the metal nanoparticle composition together within the void spaces to form a conductive network that at least partially fills the void spaces. Clause 24. The method of clause 23, wherein the via fill precursor further comprises a silicate reactive matrix material, which forms a hardened silicate reactive matrix material after the electrically conductive particles are hardened and bonded together. Clause 25. The process of clause 24, wherein the silicate reactive matrix material comprises a liquid glass binder. Clause 26. The process of any one of clauses 23-25, wherein the electrically conductive particles comprise one or more particles selected from the group consisting of micron-sized metal particles, chopped metal filaments, metal nanowires, carbon nanotubes, graphene, and any combination thereof. Clause 27. The process of any one of clauses 23-26, wherein the metal nanoparticle composition is introduced into one or more vias within at least a portion of the void space by pressure infiltration, vacuum infiltration, or any combination thereof. Clause 28. The process of any one of clauses 23-27, wherein the electrically conductive particles have a diameter less than about 1 / 10 of the diameter of the one or more vias, the electrically conductive particles are elongated and have a length less than about 3 / 4 of the diameter of the one or more vias, or any combination thereof. Clause 29. The process of any one of clauses 23 to 28, wherein the electrically conductive particles comprise at least micron-sized copper particles. Clause 30. The process of clause 29, wherein the metal nanoparticles comprise copper nanoparticles. Clause 31. The process of any one of clauses 23-30, wherein the one or more vias have a diameter of up to about 500 microns. Article 32. depositing a seed layer over at least a portion of the base substrate, the seed layer comprising a silicate reactive matrix material and a second plurality of electrically conductive particles; hardening the silicate reactive matrix material to form a hardened silicate reactive matrix material; Optionally, mechanically polishing the seed layer; and 32. The process of any one of clauses 23-31, further comprising forming one or more conductive traces on at least a portion of the seed layer, the one or more conductive traces in electrical communication with the via fill material. Clause 33. The process of any one of clauses 23-32, wherein the via-fill precursor and the metal nanoparticle composition are combined together prior to being deposited and introduced into the one or more vias. Clause 34. The process of any one of clauses 23-32, wherein the via-fill precursor and the metal nanoparticle composition are separately deposited and introduced into the one or more vias.

[0113] One or more exemplary embodiments incorporating features of the present disclosure are presented herein. For the sake of clarity, not all features of a physical implementation are described or illustrated in this application. It should be understood that in developing a physical embodiment incorporating the present disclosure, numerous implementation-specific decisions must be made to achieve the developer's goals, such as compliance with system-related constraints, business-related constraints, government-related constraints, and other constraints that vary from implementation to implementation and from time to time. Although the developer's efforts may require significant time, such efforts would nevertheless be routine for those skilled in the art and who have the benefit of the present disclosure.

[0114] Thus, the present disclosure is well adapted to attain the ends and advantages mentioned, as well as those inherent therein. The particular embodiments disclosed above are illustrative only, as the disclosure may be modified and practiced in different but equivalent manners apparent to those skilled in the art having the benefit of the teachings herein. Moreover, no limitations are intended to the details of construction or design shown herein, other than as described in the following claims. It is therefore apparent that the specific exemplary embodiments disclosed above may be altered, combined or modified, and all such variations are deemed to be within the scope and spirit of the invention. The disclosure herein may suitably be practiced in the absence of optional elements not specifically disclosed herein and / or optional elements disclosed herein. Although the compositions and methods are described in terms "comprising," "containing," or "including" various components or steps, the compositions and methods may also "consist essentially of" or "consist of" the various components and steps. All of the numbers and ranges disclosed above may be varied by some amount. Whenever a numerical range is disclosed with a lower and upper limit, any number falling within that range and any range encompassed therein are specifically disclosed. In particular, all ranges of values ​​disclosed herein (in the form of "from about a to about b," or equivalently, "from approximately a to b," or equivalently, "from approximately a to b") are to be understood to describe all numbers and ranges encompassed within the broader range of values. Additionally, the terms in the claims have their plain and ordinary meaning unless expressly and unambiguously defined by the patent owner. Additionally, the indefinite article "a" or "an," as used in the claims, is defined herein to mean one or more of the element it introduces.

Claims

1. A metallized substrate, a base substrate having one or more vias that terminate within the base substrate, extend between a first side and a second side of the base substrate, or any combination thereof, the base substrate comprising a glass substrate or a silicon substrate; and a via fill material in the one or more vias, the via fill material comprising: 1) a porous matrix material having about 30% to about 60% void space and including a plurality of electrically conductive particles; 2) a conductive network at least partially filling the void space within the porous matrix material, the conductive network comprising a plurality of metal nanoparticles consolidated together with one another.

2. The metallized substrate of claim 1 , wherein the electrically conductive particles are bound together with a hardened silicate reactive matrix material.

3. The metallized substrate of claim 2 , wherein the hardened silicate reactive matrix material comprises a hardened liquid glass binder.

4. 3. The metallized substrate of claim 2, wherein a weight ratio of the electrically conductive particles in the via fill material to the hardened silicate reactive matrix material ranges from about 6:1 to about 30:

1.

5. The metallized substrate of claim 2 , wherein the hardened silicate reactive matrix material is also chemically bonded to walls of the one or more vias.

6. 10. The metallized substrate of claim 1, wherein the electrically conductive particles comprise one or more particles selected from the group consisting of micron-sized metal particles, chopped metal filaments, metal nanowires, carbon nanotubes, graphene, graphitic materials, and any combination thereof.

7. 10. The metallized substrate of claim 1, wherein the electrically conductive particles have a diameter less than or equal to about 1 / 10 of a diameter of the one or more vias, the electrically conductive particles are elongated and have a length less than or equal to about 3 / 4 of the diameter of the one or more vias, or any combination thereof.

8. 10. The metallized substrate of claim 1, wherein the electrically conductive particles comprise at least micron-sized copper particles.

9. 10. The metallized substrate of claim 8, wherein the metal nanoparticles comprise copper nanoparticles.

10. The metallized substrate of claim 1 , wherein the one or more vias have a diameter of up to about 500 microns.

11. 10. The metallized substrate of claim 1, further comprising one or more conductive traces defined on at least one of the first side or the second side of the base substrate and in electrical communication with the via fill material.

12. 12. The metallized substrate of claim 11, wherein the one or more conductive traces are located on a seed layer adhered to at least one of the first side or the second side of the base substrate, the seed layer being electrically conductive and comprising a hardened silicate reactive matrix material and a second plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material, and the one or more conductive traces directly contact the via fill material or indirectly contact the via fill material through a bond pad.

13. The metallized substrate of claim 12, wherein the seed layer has a thickness in the range of about 1 micron to about 30 microns.

14. 13. The metallized substrate of claim 12, wherein the second plurality of electrically conductive particles in the seed layer comprises micron-sized metal particles, metal nanoparticles, or any combination thereof.

15. 13. A printed circuit board comprising the metallized substrate of claim 1 or a plurality of the metallized substrates of claim 1 stacked together.

16. 16. The printed circuit board of claim 15, wherein the electrically conductive particles are bound together with a hardened silicate reactive matrix material.

17. 17. The printed circuit board of claim 16, wherein one or more conductive traces are defined on at least one of the first side or the second side of the base substrate and are in electrical communication with the via fill material.

18. 20. The printed circuit board of claim 17, wherein the one or more conductive traces are located on a seed layer adhered to at least one of the first side or the second side of the base substrate, the seed layer being electrically conductive and comprising a hardened silicate reactive matrix material and a second plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material.

19. 16. The printed circuit board of claim 15, wherein one or more conductive traces are defined on at least one of the first side or the second side of the base substrate and are in electrical communication with the via fill material.

20. 20. The printed circuit board of claim 19, wherein the one or more conductive traces are located on a seed layer adhered to at least one of the first side or the second side of the base substrate, the seed layer being electrically conductive and comprising a hardened silicate reactive matrix material and a second plurality of electrically conductive particles mixed with the hardened silicate reactive matrix material.

21. An interposer comprising the metallized substrate of claim 1.

22. An interposer comprising the metallized substrate of claim 2.

23. A process comprising: providing a base substrate having one or more vias defined therein, the one or more vias terminating within the base substrate, extending between a first side and a second side of the base substrate, or any combination thereof, the base substrate comprising a glass substrate or a silicon substrate; depositing a via fill precursor within the one or more vias, the via fill precursor comprising a plurality of electrically conductive particles; curing the via-fill precursor to form a porous matrix material having a void space of about 30% to about 60%; introducing a metal nanoparticle composition into at least a portion of the void space; and at least partially consolidating metal nanoparticles of said metal nanoparticle composition together within said void spaces to form a conductive network that at least partially fills said void spaces.

24. 24. The method of claim 23, wherein the via fill precursor further comprises a silicate reactive matrix material, the silicate reactive matrix material forming a hardened silicate reactive matrix material after the electrically conductive particles are hardened and bonded together.

25. 25. The process of claim 24, wherein the silicate reactive matrix material comprises a liquid glass binder.

26. 24. The process of claim 23, wherein the electrically conductive particles comprise one or more particles selected from the group consisting of micron-sized metal particles, chopped metal filaments, metal nanowires, carbon nanotubes, graphene, and any combination thereof.

27. 24. The process of claim 23, wherein the metal nanoparticle composition is introduced into the one or more vias within at least a portion of the void space by pressure infiltration, vacuum infiltration, or any combination thereof.

28. 24. The process of claim 23, wherein the electrically conductive particles have a diameter less than or equal to about 1 / 10 of a diameter of the one or more vias, the electrically conductive particles are elongated and have a length less than or equal to about 3 / 4 of the diameter of the one or more vias, or any combination thereof.

29. 24. The process of claim 23, wherein the electrically conductive particles comprise at least micron-sized copper particles.

30. 30. The process of claim 29, wherein the metal nanoparticles comprise copper nanoparticles.

31. 24. The process of claim 23, wherein the one or more vias have a diameter of up to about 500 microns.

32. depositing a seed layer over at least a portion of the base substrate, the seed layer comprising a silicate reactive matrix material and a second plurality of electrically conductive particles; hardening the silicate reactive matrix material to form a hardened silicate reactive matrix material; Optionally, mechanically polishing the seed layer; and 24. The process of claim 23, further comprising forming one or more conductive traces on at least a portion of the seed layer, the one or more conductive traces in electrical communication with the via fill material.

33. 24. The process of claim 23, wherein the via-fill precursor and the metal nanoparticle composition are combined together prior to being deposited and introduced into the one or more vias.

34. 24. The process of claim 23, wherein the via fill precursor and the metal nanoparticle composition are separately deposited and introduced into the one or more vias.

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