Hybrid silicon photonics modulator and method of manufacturing same

Abstract

Hybrid silicon photonics modulator and method for fabrication thereof. The present disclosure generally relates to a method for integrating hybrid modulators and hybrid materials such as lithium niobate-on-insulator onto silicon-on-insulator (SOI) wafers for hybrid silicon photonics integration while maintaining compatibility with standard silicon photonics components. Specifically, silicon-on-insulator (SOI) and lithium niobate-on-insulator (LNOI) are bonded together to allow the modulator to be compatible with lithium niobate or silicon devices via a single transition layer.

Description

[Technical field]

[0001] The present disclosure relates generally to hybrid modulators and methods for integrating hybrid materials, such as Lithium-niobate-on-insulator (LNOI), onto Silicon-on-insulator (SOI) wafers. [Background technology]

[0002] Silicon photonics provides a platform for forming silicon integrated circuits and semiconductor lasers. Silicon photonics aids in high-speed data transfer over long distances and facilitates CMOS (Complementary Metal Oxide Semiconductor)-like manufacturing, thereby resulting in high-volume, low-cost production of integrated circuits. One major application of silicon photonics is in high-speed data communications, such as optical interconnects in data centers. Additionally, silicon photonics finds applications in sensing and high-performance computing.

[0003] International Publication No. PCT / SG2020 / 050253 discloses a hybrid photonic chip including a plurality of semiconductor materials arranged to define a chip providing a function, where at least a first portion of the chip is formed of a material that can be manufactured using CMOS technology. At least a second portion of the chip includes a nonlinear crystal material and is not subjected to an etching process. The second portion of the chip, in conjunction with the first portion, is configured to support a low-loss single mode of propagation. This prior art focuses on the waveguiding structure of the hybrid device and is not compatible with current silicon photonic devices due to the combination of silicon and lithium niobate. Furthermore, this prior art focuses primarily on process integration and methods of manufacturing the modulator, and not process integration with standard silicon photonics components. For such modulators and methods, the addition of LNOI wafers may compromise compatibility. It is therefore important to maintain compatibility with the current library of silicon photonics components, otherwise an entirely new library of (process design kit) PDK components would be required.

[0004] In another prior art by Sandia National Laboratory published in Optics Express, Vol. 28, Issue 2, pp. 1868-1884 (2020) (title: A heterogeneously integrated silicon photonic / lithium niobate traveling wave electro-optic modulator), a hybrid integrated silicon photonics modulator is disclosed. Silicon photonics is a platform that enables densely integrated photonics components and systems, as well as integration with electronic circuits. Depletion mode modulators designed on this platform suffer from fundamental frequency response limitations due to the mobility of carriers in silicon. Although lithium niobate-based modulators have demonstrated high performance, this material is difficult to process and cannot be easily integrated with other photonics components and electronic circuits. In this paper, we simultaneously exploit the advantages of silicon photonics and the Pockels effect of lithium niobate by heterogeneously integrating a silicon photonics integrated circuit with a thin-film lithium niobate sample. The most CMOS compatible thin-film lithium niobate modulators to date have been demonstrated to have an electro-optic 3 dB bandwidth of 30.6 GHz and a half-wave voltage of 6.7 V × cm. These modulators are fabricated entirely in a CMOS fab and do not require etching of the lithium niobate, except for bonding of the thin-film lithium niobate samples after fabrication. In this prior art approach, this requires an additional layer of SiN that must go through multiple transitions to reach the lithium niobate layer from the silicon layer. As a result, they experience a very high insertion loss of -10 dB.

[0005] Another publication in Nature Photonics (2019) by Sun Yat-sen University is titled "High-performance hybrid silicon and lithium niobate Mach-Zehnder modulators for 100 Gbit s-1 and beyond". Optical modulators are the heart of optical communication links. Ideally, they should feature low loss, low drive voltage, wide bandwidth, high linearity, compact footprint, and low manufacturing cost. Unfortunately, these criteria have only been achieved on separate occasions. Based on a hybrid silicon and lithium niobate integrated platform, we demonstrate a Mach-Zehnder modulator that simultaneously meets these criteria. The presented device has an insertion loss of 2.5 dB in single-drive push-pull operation, a voltage-length product of 2.2 Vcm, high linearity, an electro-optical bandwidth of at least 70 GHz, and a maximum operating speed of 112 Gbit s -1 We demonstrate modulation speeds up to 1000 GHz. The high-performance modulator is realized by seamless integration of high-contrast waveguides based on lithium niobate, a common modulator material, with compact, low-loss silicon circuits. The hybrid platform demonstrated here enables the combination of "best of breed" active and passive components, paving new avenues for future high-speed, energy-efficient, and cost-effective optical communication networks. However, this approach is not compatible with current silicon photonics libraries, since the (Lithium Nitrate) LN layer directly influences the optical mode of the silicon layer. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] International Publication PCT / SG2020 / 050253 [Non-patent literature]

[0007] [Non-Patent Document 1] Sandia National Laboratory, “A heterogeneously integrated silicon photonic / lithium niobate traveling wave electro-optic modulator”, Optics Express, Vol. 28, Issue 2, pp. 1868-1884 (2020) [Non-Patent Document 2] Sun Yat-sen University, “High-performance hybrid silicon and lithium niobate Mach-Zehnder modulators for 100 Gbit s-1 and beyond”, Nature Photonics (2019) Summary of the Invention [Problem to be solved by the invention]

[0008] Hybrid integration of Lithium-niobate on insulator (LNOI) with standard silicon-on-insulator (SOI) wafers is challenging while maintaining compatibility with standard silicon photonics components. As a result, new libraries of devices are needed for many types of hybrid LNOI-SOI. Therefore, there is a need to provide modulators that hybrid integrate materials such as lithium niobate-on-insulator onto silicon-on-insulator (SOI) wafers that remain compatible with standard SOI photonics devices. The following summary is provided to facilitate an understanding of some of the innovative features unique to the disclosed embodiments, but is not intended to be a complete description. A complete understanding of the various aspects of the embodiments disclosed herein can be obtained by considering the specification, claims, drawings, and abstract in their entirety. [Means for solving the problem]

[0009] In a first aspect of the present disclosure, a hybrid silicon photonics modulator is provided, comprising a first portion including a first oxide layer, a first substrate layer, and a waveguide, where the first oxide layer includes one or more etched regions, a second portion including a non-CMOS material layer and a second oxide layer, and at least two electrodes, where the first portion is bonded to the second portion via the at least two electrodes and / or the non-CMOS material layer, and the modulator is compatible with both lithium niobate devices and silicon devices.

[0010] In one embodiment, the first portion is silicon-on-insulator (SOI) and CMOS compatible, and the first oxide layer is a silicon dioxide (SiO2) layer.

[0011] In one embodiment, the second portion is a lithium niobate-on-insulator (LNOI) and is non-CMOS compatible, the non-CMOS material layer is a lithium niobate layer, and the second oxide layer is a silicon dioxide (SiO2) layer.

[0012] In one embodiment, the waveguide is a silicon (Si) waveguide or a silicon nitride (SiN) waveguide.

[0013] In one embodiment, the lithium niobate layer is placed in contact with the waveguide.

[0014] In one embodiment, a lithium niobate layer is disposed adjacent and above the waveguide.

[0015] In one embodiment, an electrode is disposed beneath the lithium niobate layer.

[0016] In one embodiment, an electrode is disposed on the lithium niobate layer.

[0017] In one embodiment, the SOI is bonded to the LNOI via an electrode and a lithium niobate layer.

[0018] In one embodiment, the one or more etched regions include two gaps etched into a silicon dioxide (SiO2) layer of the SOI, and the electrodes form metal pillars lithographically positioned within the two gaps.

[0019] In one embodiment, the two gaps are separated by a waveguide disposed between them.

[0020] In one embodiment, the lithium niobate layer forms a metallurgical bond with the metal pillar, the metal pillar being disposed below the lithium niobate layer.

[0021] In one embodiment, the metallic pillars are configured to act as traveling wave electrodes and are positioned below, above, or horizontally to the second portion in any combination.

[0022] In one embodiment, the SOI is bonded to the LNOI through a lithium niobate layer.

[0023] In one embodiment, a lithium niobate layer is bonded directly to the top of the waveguide, a silicon dioxide (SiO2) layer is disposed on top of the lithium niobate layer, and an electrode is disposed on top of the silicon dioxide (SiO2) layer.

[0024] In one embodiment, the LNOI is encapsulated in SOI, with only the top surface of the LNOI exposed.

[0025] In one embodiment, the silicon device is a Multi-Project Wafer (MPW) semiconductor.

[0026] In one embodiment, the second portion includes one or more etched areas for bonding with the second portion.

[0027] In a second aspect of the disclosure, a lithium niobate or silicon device is provided that is integrated with a modulator through a single transition layer.

[0028] In a third aspect of the disclosure, a method for fabricating a hybrid silicon photonics modulator is provided, the method including forming a first portion including a first oxide layer, a first substrate layer and a waveguide, the first oxide layer including one or more etched regions, and forming a second portion including a non-CMOS material layer and a second oxide layer, the first portion being bonded to the second portion through at least two electrodes and / or through the non-CMOS material layer, the modulator being compatible with both lithium niobate and silicon devices.

[0029] In one embodiment, the first portion is joined to the second portion via at least two electrodes in one or more etched regions, the first portion being CMOS compatible and the second portion being non-CMOS compatible.

[0030] In one embodiment, the first portion is joined to the second portion through a non-CMOS material layer, and the at least two electrodes are located on a top surface of the second oxide layer.

[0031] In one embodiment, the first portion is silicon-on-insulator (SOI), the second portion is lithium niobate-on-insulator (LNOI), and the non-CMOS material layer is a lithium niobate layer.

[0032] In a fourth aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon a computer readable description of a hybrid silicon photonics modulator that, when processed in a chip manufacturing system, causes the chip manufacturing system to perform the methods disclosed herein. [Brief description of the drawings]

[0033] [Figure 1A] 1 is a cross-sectional view of a silicon-on-insulator (SOI) according to an embodiment of the present invention.

[0034] [Figure 1B] FIG. 2 is a cross-sectional view of a lithium niobate-on-insulator (LNOI) integrated with a silicon-on-insulator (SOI) according to an embodiment of the present invention.

[0035] [Figure 2A] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. [Figure 2B] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. [Figure 2C] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. [Figure 2D] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. [Figure 2E] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. [Figure 2F] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. [Figure 2G] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention.

[0036] [Figure 3A] 1 is a cross-sectional view of a silicon-on-insulator (SOI) according to an alternative embodiment of the present invention.

[0037] [Figure 3B] FIG. 2 is a cross-sectional view of a lithium niobate-on-insulator (LNOI) integrated with a silicon-on-insulator (SOI) according to an alternative embodiment of the present invention.

[0038] [Figure 4A] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an alternative embodiment of the present invention. [Figure 4B] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an alternative embodiment of the present invention. [Figure 4C] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an alternative embodiment of the present invention. [Figure 4D] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an alternative embodiment of the present invention. [Figure 4E] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an alternative embodiment of the present invention. [Figure 4F] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an alternative embodiment of the present invention. [Figure 4G] 1 illustrates an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an alternative embodiment of the present invention.

[0039] [Figure 5A]7 is a cross-sectional view of the hybrid silicon photonics modulator, transition layer, and silicon device shown in FIG. 6 according to one embodiment of the present invention.

[0040] [Figure 5B] FIG. 6 is a top view of the hybrid silicon photonics modulator of FIGS. 2 and 5 connected to a transition layer and a silicon device.

[0041] [Figure 6A] 4 illustrates optical modes in various portions of a hybrid silicon photonics modulator, according to one embodiment of the present invention. [Figure 6B] 4 illustrates optical modes in various portions of a hybrid silicon photonics modulator, according to one embodiment of the present invention. [Figure 6C] 4 illustrates optical modes in various portions of a hybrid silicon photonics modulator, according to one embodiment of the present invention. [Figure 6D] 4 illustrates optical modes in various portions of a hybrid silicon photonics modulator, according to one embodiment of the present invention. [Figure 6E] 4 illustrates optical modes in various portions of a hybrid silicon photonics modulator, according to one embodiment of the present invention.

[0042] [Figure 7] 3 is a top view of the hybrid silicon photonics modulator of FIG. 2 having an additional coupling region.

[0043] [Figure 8] 5 is a cross-sectional view of the hybrid silicon photonics modulator, transition layer, and silicon device of FIG. 4, in accordance with one embodiment of the present invention.

[0044] [Figure 9] FIG. 5 is a top view of the hybrid silicon photonics modulator of FIG.

[0045] [Figure 10]2 illustrates a flowchart of an exemplary process for fabricating a hybrid silicon photonics modulator in accordance with one embodiment of the present invention.

[0046] [Figure 11] 1 illustrates a flowchart of an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI), in accordance with an embodiment of the present invention.

[0047] [Figure 12] 1 illustrates a flowchart of an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) in accordance with another embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0048] The above summary, as well as the following detailed description of exemplary embodiments, will be better understood when read in conjunction with the accompanying drawings. For the purpose of illustrating the disclosure, exemplary configurations of the disclosure are shown in the drawings. However, the disclosure is not limited to the specific methods and instrumentalities disclosed herein. Moreover, those skilled in the art will appreciate that the drawings are not to scale. Wherever possible, similar elements are designated by the same numerals.

[0049] The specific configurations discussed in the following description are non-limiting examples that may be varied and are cited merely to illustrate at least one embodiment and are not intended to limit its scope.

[0050] The present invention discloses a hybrid integrated silicon photonics modulator and a method for its fabrication. Traditionally, integration of silicon-on-insulator (SOI) and lithium-niobate on insulator (LNOI) has been difficult to achieve while maintaining compatibility with standard silicon photonics components. Since the addition of LNOI to SOI can compromise compatibility, it is important to maintain compatibility with the current library of silicon photonics components, otherwise an entirely new library of PDK components would be required. As a result, a new library of devices is required for many types of hybrid LNOI-SOI modulators.

[0051] In this regard, the invention disclosed herein generally relates to providing a modulator formed by bonding two wafers (host and donor wafers) or components together while maintaining compatibility with standard silicon photonics components. More specifically, as disclosed herein, a host wafer (i.e., a first portion) that is Complementary Metal Oxide Silicon (CMOS) compatible can be bonded with a donor wafer (i.e., a second portion) that is not CMOS compatible, such that the resulting modulator is compatible with standard silicon photonics components.

[0052] Therefore, the hybrid integrated silicon photonics modulator disclosed herein provides a process to integrate any CMOS compatible and CMOS non-compatible wafers (e.g. LNOI with SOI) to ensure compatibility with standard silicon photonics devices. The integration process to achieve this compatibility takes into account the electrode placement and bonding technology of the two wafer parts. These host and donor wafers can be combined without modifying the CMOS flow.

[0053] The modulators disclosed herein can be compatible with lithium niobate or silicon devices. Furthermore, the modulators disclosed herein can be integrated with lithium niobate or silicon devices through a single transition layer. The single transition layer (e.g., Si→SiN) reduces the insertion loss of the modulator. In contrast, other hybrid modulators require multiple transitions and several additional waveguiding layers, causing high insertion loss.

[0054] In one embodiment, the lithium niobate or silicon device may include a standard MPW silicon photonics device, or any other silicon photonics or silicon nitride device.

[0055] In one embodiment, a hybrid silicon photonics modulator is provided that includes at least two portions (a first portion and a second portion) and at least two electrodes.

[0056] In one embodiment, the first portion can be a complementary metal oxide semiconductor (CMOS) compatible host wafer and the second portion can be a non-complementary metal oxide semiconductor (CMOS) donor wafer. The first portion can be bonded to the second portion via at least two electrodes and / or a second substrate layer of the donor wafer to form a modulator that is compatible with standard silicon photonics components.

[0057] In one embodiment, the modulator may be compatible with lithium niobate or silicon devices through a single transition layer.

[0058] The first portion can include a first oxide layer, a first substrate layer and a waveguide, the first oxide layer can include one or more etched regions, and the first portion can be CMOS compatible. The second portion can include a non-CMOS material layer and a second oxide layer, and the second portion can be non-CMOS compatible.

[0059] In one embodiment, the first portion can be a silicon-on-insulator (SOI) wafer and the first oxide layer can be a silicon dioxide (SiO2) layer.

[0060] In one embodiment, the non-CMOS material layer of the second portion can be a nonlinear crystal material (sometimes referred to as a c-material) such as lithium niobate. Generally, lithium niobate is not compatible with standard CMOS fabrication. Thus, in one embodiment, the second portion can be a lithium niobate-on-insulator (LNOI) wafer. Materials other than lithium niobate that are not compatible with standard CMOS fabrication include, but are not limited to, III-IV materials such as indium phosphide or gallium arsenide, and nonlinear crystal materials such as lithium tantalate or potassium deuterium.

[0061] In one embodiment, a hybrid silicon photonics modulator is provided that includes silicon-on-insulator (SOI) and lithium niobate-on-insulator (LNOI), where the SOI is bonded to the LNOI to ensure compatibility with lithium niobate or silicon devices through a single transition layer.

[0062] A silicon-on-insulator (SOI) may represent a first portion of the modulator. The silicon-on-insulator (SOI) may include one or more silicon dioxide (SiO2) layers, a substrate layer, and a waveguide. A silicon (Si) layer may be optionally included. A lithium niobate-on-insulator (LNOI) may represent a second portion of the modulator. The lithium niobate-on-insulator (LNOI) may include a lithium niobate layer and a silicon dioxide (SiO2) layer. A silicon (Si) layer may be optionally included.

[0063] In one embodiment, the waveguide can be a silicon (Si) waveguide or a silicon nitride (SiN) waveguide.

[0064] Upon integration and bonding of the first and second portions (i.e., SOI and LNOI), the second substrate layer of the second portion can be positioned in contact with the waveguide or with a thin layer between the second substrate layer and the waveguide. In one embodiment, the second substrate layer can be positioned adjacent to and above the waveguide.

[0065] To integrate the first and second portions, the top layer of the first portion can include one or more etched regions to accommodate the second portion, such that the second portion is enclosed within the first portion and only the top surface of the second portion is exposed.

[0066] In one embodiment, the one or more etched regions may include an etched region where a top layer of the first portion is etched down to the waveguide, which may be of an appropriate size and shape to accommodate and house the second portion.

[0067] In one embodiment, the one or more etched regions can include two gaps or spaces that extend vertically downward below the level of the waveguide. In one embodiment, the two gaps can extend vertically downward to the silicon layer of the first portion. The two etched gaps can be separated from each other by a waveguide disposed between them. These two gaps can be appropriately sized and shaped to accommodate and house the electrodes.

[0068] For purposes of illustrating the present invention, in Figures 1 to 12, the first portion of the modulator is, for example, SOI and the second portion of the modulator is, for example, LNOI. The present invention is not limited to SOI and LNOI, whereby any CMOS compatible host wafer and non-CMOS donor wafer can be bonded and integrated to form the modulator disclosed herein.

[0069] In the embodiments of the invention described below, the first portion includes one or more etched regions in a first oxide layer, a first substrate layer, and a waveguide. FIG. 1A illustrates an embodiment showing a first portion, e.g., a silicon-on-insulator (SOI). The first portion of the modulator, e.g., SOI, includes a first substrate layer 110, a first oxide layer, e.g., a first silicon dioxide layer 108, a silicon layer 106, an additional silicon dioxide layer 104, and a waveguide 102. The substrate layer 110 can form a buried oxide layer or an underlayer on which the first silicon dioxide layer 108 can be formed, followed by forming a silicon layer 106 on the layer 108, followed by forming an additional silicon dioxide layer 104 that forms an upper layer of the SOI with an exposed surface. The waveguide 102 can be located in and surrounded by the additional silicon dioxide layer 104 at a central location. The waveguide can include an input and an output to a single transition layer.

[0070] The additional silicon dioxide layer 104, which forms the top layer of the SOI, can include an etched region 115 and two etched gaps 116 that extend vertically downward on either side of the central waveguide, resulting in a centrally located silicon dioxide section in which the waveguide 102 is located.

[0071] In the embodiments of the invention described below, the second portion has a second substrate layer and a second oxide layer. FIG. 1B shows an embodiment of a lithium niobate-on-insulator (LNOI) integrated and bonded with the silicon-on-insulator (SOI) of FIG. 1A via two electrodes 114. The second portion of the modulator, e.g., the LNOI, includes a lithium niobate layer 122, a second oxide layer, e.g., silicon dioxide (SiO2) layer 118, and a second substrate layer, e.g., silicon layer 112, forming the top layer and surface of the LNOI. The two electrodes 114 can be connected to and adjacent to the bottom surface of said lithium niobate layer 122 on opposite sides. The silicon dioxide (SiO2) layer 118 can be formed on top of the lithium niobate layer 122. In one embodiment, the lithium niobate layer 122, when disposed in the SOI, can form a metallurgical bond with the electrode 114 disposed below the lithium niobate layer relative to the orientation of the LNOI. The first portion of FIG. 1A is joined to the second portion of FIG. 1B via at least two electrodes 114.

[0072] During integration of the LNOI and SOI, each of the two electrodes 114 can be located and positioned within one of the complementary etched gaps 116 in the SOI. Thus, the two electrodes are positioned below the lithium niobate layer. The two electrodes 114 can be positioned within the two gaps by lithography. In an embodiment, the two electrodes 114 can be configured to operate as traveling wave electrodes. In another embodiment of the present invention, the metal pillar is configured to operate as a traveling wave electrode and is positioned below, above, or horizontally in any combination of the second portion.

[0073] Thus, in one embodiment, the SOI can be bonded to the LNOI via two electrodes. These are bonded by metallic or eutectic bonding, where the SOI and LNOI are patterned with an adhesive metal (titanium, platinum, etc.) and then patterned with either a eutectic material or another metal (copper, aluminum, etc.). Metallic or eutectic bonding is used to bond these two wafers together.

[0074] In one embodiment, the two electrodes 114 may be in the form of metal pillars. The metal material may be any metal produced in a commercial CMOS foundry, such as aluminum, copper, gold, or any alloy of these metals.

[0075] 2A-2G illustrate an exemplary process for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. With reference to FIG. 2A, the first part of the modulator is, for example, an SOI wafer. The SOI wafer has a substrate 110, a silicon dioxide layer 108, and a silicon layer 106. As shown in FIG. 2B, a silicon dioxide layer 104 is grown, followed by a SiN layer 102, which is grown and patterned to form a waveguide. Next, as shown in FIG. 2C, an additional silicon dioxide (SiO2) 103 is grown and planarized. With reference to FIG. 2D, an etched region 115 is defined to provide an area for bonding of the LNOI. The etched region 115 includes two etched gaps on either side of the waveguide 102 to accommodate two electrodes, as shown in FIG. 2E. As shown in Figure 2F, the LNOI can include two additional metal parts to interface with two complementary electrodes as the LNOI chip is bonded to the SOI wafer. Finally, the excess substrate on top of the LNOI may or may not be removed, as shown in Figure 2F.

[0076] FIG. 3A shows another embodiment of the first portion, e.g., silicon-on-insulator (SOI). The SOI or first portion of the modulator may include a first substrate layer 210, a first oxide layer, e.g., silicon dioxide layer 208, a first substrate layer, e.g., silicon portion 206, and a waveguide 202. The substrate layer may form a lower layer on which the silicon dioxide layer 208 may be formed, and then the silicon portion 206 may be formed with and surrounded by the layer 208. The silicon dioxide layer 208 may form a top layer of the SOI with an exposed surface. The waveguide 202 may be located in the silicon dioxide layer 208 at a central location and surrounded by the silicon dioxide layer 208. The waveguide may include an input and an output to a single transition layer. Note that the silicon portion 206 (not part of the modulator) is compatible with standard silicon photonics MPW (Multi-Project Wafer) processes and can be used to bond to SiP circuits on different parts of the wafer / chip.

[0077] The silicon dioxide layer 208 forming the top layer of the SOI may include a region 215 that is etched down to the waveguide 202 .

[0078] FIG. 3B illustrates another embodiment of a lithium niobate-on-insulator (LNOI) integrated and bonded with the silicon-on-insulator (SOI) of FIG. 3A. The LNOI or second portion of the modulator can include a non-CMOS material layer, such as a lithium niobate layer 222, and a second oxide layer, such as a silicon dioxide (SiO2) layer 218. In this embodiment, two electrodes 214 can be bonded to the top surface of the layer 218 and are disposed adjacent to and separated from each other on either side of the top surface of the layer 218. Thus, the two electrodes are disposed above the lithium niobate layer with respect to the orientation of the LNOI when bonded with the SOI. In this embodiment, the electrodes are not in contact with the lithium niobate layer 222. In particular, the silicon dioxide (SiO2) layer 218 is formed between the lithium niobate layer 222 and the two electrodes 214.

[0079] In one embodiment, the SOI may be bonded to the LNOI via a lithium niobate layer 222. In one embodiment, the lithium niobate layer 222 may be directly or fusion bonded to the SOI in the etched region 215. This direct or fusion bond may be enhanced by the deposition of a thin oxide layer, such as aluminum oxide.

[0080] Thus, the hybrid silicon photonics modulator disclosed herein may comprise a silicon-on-insulator (SOI) having one or more etched regions in a silicon dioxide (SiO2) layer, the SOI comprising a substrate layer and a waveguide, and a lithium niobate-on-insulator (LNOI) comprising a lithium niobate layer and a silicon dioxide (SiO2) layer and at least two electrodes, the SOI bonded to the LNOI via the at least two electrodes and / or the lithium niobate layer.

[0081] It should be noted that the two portions of the modulator, the first portion and the second portion, can be referred to as a host wafer and a donor wafer.

[0082] Advantageously, the modulators disclosed herein can be compatible with both lithium niobate and silicon devices. In one embodiment, the silicon device can be a Multi-Project Wafer (MPW) semiconductor, or any other silicon photonics wafer, or a silicon nitride wafer.

[0083] In one embodiment, a lithium niobate device or multiple silicon devices may be integrated or coupled to the modulators disclosed herein through a single transition layer.

[0084] 4A-4G illustrate an exemplary process of integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. With reference to FIG. 4A, the first part of the modulator is, for example, SOI. The SOI wafer has a substrate 210, a silicon dioxide layer 208, and a silicon layer 206. As shown in FIG. 4B, SiO2 402 is grown, then a SiN layer 202 is grown and patterned to form a waveguide. Next, as shown in FIG. 4C, additional silicon dioxide (SiO2) 404 is grown and then planarized. With reference to FIG. 4D, an etched region 215 is defined to provide an area for bonding of the LNOI. Then, the LNOI is bonded to the SOI in the etched region, as shown in FIG. 4E. Then, the substrate layer of the LNOI is removed, as shown in FIG. 4F. Finally, as shown in FIG. 4G, a portion of the silicon dioxide (SiO2) may or may not be removed, and then two electrodes are bonded to the top surface of the LNOI.

[0085] In one embodiment, there is provided a method for fabricating a modulator as disclosed herein, comprising forming one or more etched regions in a silicon dioxide (SiO2) layer of a silicon-on-insulator (SOI), forming a lithium niobate-on-insulator (LNOI) comprising a lithium niobate layer and a silicon dioxide (SiO2) layer, and coupling the LNOI and the SOI to each other via at least two electrodes and / or via the lithium niobate layer.

[0086] 10 shows a flow chart of an exemplary process 300 for fabricating a hybrid integrated silicon photonics modulator according to one embodiment of the present invention. In step 302, one or more etched regions are formed in a silicon dioxide (SiO2) layer of a silicon-on-insulator (SOI). Then, in step 304, a lithium niobate-on-insulator (LNOI) is formed, which includes a lithium niobate layer and a silicon dioxide (SiO2) layer. Then, in step 306, the LNOI and the SOI are bonded together via at least two electrodes and / or the lithium niobate layer.

[0087] In step 306, bonding the LNOI to the SOI may include additional steps.

[0088] In one embodiment, metal pillars are lithographically placed in the etched regions of the SOI, and a lithium niobate layer is placed over the metal pillars and the waveguides in the SOI, with the metal pillars acting as a metallic connection to the lithium niobate layer.

[0089] FIG. 11 shows a flow chart of an exemplary process 400 for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) according to an embodiment of the present invention. Referring to step 402, a first portion of a modulator is formed, for example, a SOI wafer. The SOI wafer has a substrate, a silicon dioxide layer, and a silicon layer. In step 404, a silicon dioxide layer is grown, then a SiN layer is grown and patterned. Then, in step 406, some additional SiO2 is grown and then planarized. Referring to step 408, an etched area is defined to provide an area for bonding of the LNOI. Then, in step 410, an etched gap is defined to provide an area for each of the two electrodes. Additional areas can be defined to increase the overall bond strength. Then, in step 412, the LNOI is bonded to the SOI, which may or may not include additional metal on the LNOI wafer. Finally, in step 414, the excess substrate on the LNOI may or may not be removed.

[0090] FIG. 12 illustrates a flow chart of an exemplary process 450 for integrating lithium niobate-on-insulator (LNOI) with silicon-on-insulator (SOI) in accordance with another embodiment of the present invention.

[0091] In step 452, a first portion of the modulator is taken, for example SOI. As shown in step 454, SiO2 is grown, then SiN is grown and patterned. Then, as shown in step 456, some additional SiO2 is grown and planarized. As shown in step 458, an etched area is defined to provide an area for bonding of the LNOI. Then, as shown in step 460, the LNOI chip is bonded to the SOI in the etched area. Then, in step 462, excess substrate in the LNOI is removed.

[0092] Finally, as shown in step 464, a portion of the silicon dioxide may or may not be removed, and then two electrodes can be bonded to the top surface of the LNOI. In this regard, a lithium niobate layer can be bonded directly to the SOI in the etched areas and placed adjacent to the waveguide in the SOI. The electrodes are placed on the top surface of the LNOI.

[0093] To integrate the modulators disclosed herein with lithium niobate or silicon devices, the method may include the additional steps of forming a transition layer and at least one silicon device, respectively.

[0094] The steps of the methods described herein may be performed in any suitable order, or simultaneously as appropriate. Additionally, individual blocks may be deleted from any method without departing from the spirit and scope of the subject matter described herein. Aspects of any of the above embodiments may be combined with aspects of any of the other embodiments described above to form further embodiments without losing the desired effect.

[0095] Figures 5A and 5B show the connection of a modulator 120 to a silicon device 140 as shown in Figure 2 via a transition layer 130 in the wafer. The transition layer 130 makes the present invention compatible with other standard silicon photonics devices.

[0096] The transition layer 130 may be formed between the modulator 120 and the silicon device 140 and may include a silicon layer 132 and a silicon mononitrate layer 134 .

[0097] The silicon device 140 can include at least one silicon layer 142 and at least one metal connector 144. In one embodiment, the silicon device 140 can operate as a multi-purpose wafer (MPW) semiconductor. Thus, the modulators disclosed herein are compatible with standard "multi-purpose wafer" (MPW) flows and therefore are compatible with standard libraries of silicon devices.

[0098] Figures 6A-6E show the optical modes in various portions of a hybrid silicon photonics modulator according to one embodiment of the present invention: Figure 6A shows the optical modes in the top waveguide / LN portion.

[0099] As shown in FIG. 6B, the optical mode in the upper waveguide section tapers adiabatically smaller while at the same time the lower waveguide (silicon or SiN) tapers adiabatically larger.

[0100] Referring to Figure 6C, an optical mode is supported in both the upper and lower waveguides and slowly transfers to the lower waveguide. Figure 6D shows the complete optical mode in the lower waveguide. Finally, Figure 6E shows a lower waveguide that is compatible with silicon photonics.

[0101] FIG. 7 shows a top view of the modulator of FIG. 2 using a transition to define an LN region integrated with a silicon region containing a silicon element or device 146. In this view, the modulator's waveguide 102, metal pillar 114, and lithium niobate layer 122 are visible. In one embodiment, the modulator can include an additional coupling region 150. This configuration of components allows for compatibility with standard SOI photonic processes. The additional coupling region 150 increases the total coupling strength of the modulator.

[0102] FIG. 8 shows the connection of a modulator 220 to a silicon device 240 through a transition layer 230 in the wafer, as shown in FIG.

[0103] The transition layer 230 may be formed between the modulator 220 and the silicon device 240 and may include a silicon layer 232 and a silicon-nitrate layer 234. In one embodiment, the transition layer may be included in the modulator such that the output of the modulator's waveguide to the transition layer begins within the modulator.

[0104] The silicon device 240 can include at least one silicon layer and at least one metal connector. In one embodiment, the silicon device 240 can operate as a multi-purpose wafer (MPW) semiconductor. Thus, the modulators disclosed herein are compatible with standard "multi-purpose wafer" (MPW) flows and therefore with standard libraries of silicon devices.

[0105] Figure 9 shows a top down view of the modulator of Figure 4 using a transition to define an LN region that is integrated with a silicon region containing a silicon element or device 246. In this view, the modulator's waveguide 202, electrodes 214, and lithium niobate layer 2222 are visible. This configuration of components allows for compatibility with standard SOI photonic processes.

[0106] The hybrid modulator includes both lithium niobate and silicon devices, so the modulator is compatible with both lithium niobate and silicon devices. Note that in this invention, there are two main locations for the metal electrodes (bottom metal / top metal) and two main types of waveguides (Si-LN / SiN-LN), which can be combined in any order without restriction.

[0107] The present invention provides a modulator with hybrid integration, particularly to ensure compatibility with standard silicon photonic devices. The disclosure herein includes unique electrode placement, coupling, and process integration. The modulator and fabrication method disclosed herein is compatible with standard silicon photonic processes, and therefore can utilize both silicon photonics and LNOI type devices, combining the advantages of each platform. In particular, the optical modulation can be performed in the LNOI section, which can provide higher electro-optical bandwidth. However, the light can be coupled through the SOI section, where high performance coupling structures (such as edge couplers and grating couplers) have been demonstrated. Secondly, the nonlinear effects of lithium niobate, such as second harmonic generation and spontaneous parametric down-conversion, can be utilized to create a series of quantum devices that cannot be done in silicon. Thus, the advantages of both silicon and lithium niobate can be combined in a single photonic die. This particular invention need not be limited to silicon and lithium niobate, and any particular CMOS compatible wafer, as well as non-CMOS compatible wafers, can be so combined.

[0108] Using the present invention, hybrid silicon photonics integration is possible using hybrid materials such as lithium niobate-on-insulator incorporation into silicon-on-insulator (SOI) wafers. Furthermore, the present invention is CMOS compatible and maintains compatibility with standard SOI photonic devices.

[0109] In addition to the foregoing, there is also provided a process design kit for forming the hybrid silicon photonics modulators disclosed herein, which when processed in a manufacturing system causes the manufacturing system to form the modulator of any embodiment.

[0110] In one embodiment, a process design kit for forming a hybrid silicon photonics modulator as disclosed herein is provided. The kit includes parameters for forming a silicon-on-insulator (SOI) wafer having one or more etched regions in a silicon dioxide (SiO2) layer, the wafer including a substrate layer and a waveguide. The kit includes parameters for forming a lithium niobate-on-insulator (LNOI) including a lithium niobate layer and a silicon dioxide (SiO2) layer, and parameters for coupling the LNOI to the SOI via at least two electrodes and / or the lithium niobate layer.

[0111] Methods of manufacturing the process design kits described herein may be provided. Additionally, process design kit data sets may be provided that, when processed in a manufacturing system, result in methods of manufacturing the PICs and / or asymmetric alignment features described herein.

[0112] Also provided is a computer readable storage medium having stored thereon a computer readable description of a modulator that, when processed by a manufacturing system, causes the manufacturing system to manufacture any of the embodiments of a modulator by performing the methods disclosed herein.

[0113] Any ranges or device values ​​described herein can be expanded or modified without losing the desired effect, as will be apparent to those skilled in the art. It will be understood that the benefits and advantages described above may relate to one embodiment or to multiple embodiments. The embodiments are not limited to those that solve any or all of the problems described or those that have any or all of the benefits and advantages described.

[0114] A reference to "an" item refers to one or more of those items. The term "comprising" is used herein to mean including specified method blocks or elements, but such blocks or elements do not include an exclusive list and a method or apparatus may include additional blocks or elements.

[0115] As used herein, the terms computer program code and computer readable instructions refer to any type of executable code for a processor, including code expressed in a machine language, an interpreted language, or a scripting language. Executable code includes binary code, machine code, bytecode, code defining an integrated circuit (such as a hardware description language or netlist), and code expressed in a programming language code such as C, Java, or OpenCL. Executable code may be any type of software, firmware, script, module, or library that, when suitably executed, processed, interpreted, compiled, or executed, for example, in a virtual machine or other software environment, causes a processor of a computer system in which the executable code is supported to perform the tasks specified by the code.

[0116] It is also intended to encompass software that defines the configuration of the hardware described herein, such as HDL (Hardware Description Language) software used to design integrated circuits or configure programmable chips to perform desired functions. That is, a computer readable storage medium can be provided having encoded thereon computer readable program code in the form of an integrated circuit definition data set that, when processed with a process design kit, configures a system to manufacture some or all of the devices described herein.

[0117] It will be appreciated that variations of the above-disclosed and other features and functions, or alternatives thereof, may be desirably combined into many other different systems or applications, and various presently unforeseen or unanticipated alternatives, modifications, variations or improvements may be subsequently made by those skilled in the art, which are also intended to be encompassed by the following claims.

[0118] Although the embodiments of the present disclosure have been described in considerable detail and comprehensively to cover possible aspects, those skilled in the art will recognize that other versions of the present disclosure are possible.

Claims

1. a first portion including a first oxide layer, a first substrate layer, and a waveguide, the first oxide layer including one or more etched regions; a second portion including a non-CMOS (Complementary Metal Oxide Silicon) material layer and a second oxide layer; at least two electrodes, the first portion is bonded to the second portion via at least the two electrodes and / or the non-CMOS material layer; The modulator is a hybrid silicon photonics modulator that is compatible with lithium niobate and silicon devices.

2. The first portion is silicon-on-insulator (SOI) and CMOS compatible, and the first oxide layer is silicon dioxide (SiO ２ 2. The modulator of claim 1 , wherein the first layer is a .alpha.-doped polysilicon layer.

3. The second portion is a lithium-niobate on insulator (LNOI) and is non-CMOS compatible, the non-CMOS material layer being a lithium niobate layer and the second oxide layer being silicon dioxide (SiO ２ 3. The modulator of claim 2 , wherein the layer is a .alpha.-.alpha.

4. The modulator of claim 3 , wherein the waveguide is a silicon (Si) waveguide or a silicon nitride (SiN) waveguide.

5. The modulator of claim 4 wherein the lithium niobate layer is disposed in contact with the waveguide.

6. The modulator of claim 5 wherein the lithium niobate layer is disposed adjacent and above the waveguide.

7. The modulator of claim 4 wherein the electrode is disposed below the lithium niobate layer.

8. The modulator of claim 4 wherein the electrode is disposed above the lithium niobate layer.

9. The modulator of claim 4 , wherein the SOI is bonded to the LNOI via the electrodes and the lithium niobate layer.

10. The one or more etched regions may be formed by etching the silicon dioxide (SiO ２ 10. The modulator of claim 9, comprising two gaps etched in a GaN (GaN) layer, the electrodes forming metal pillars lithographically positioned in the two gaps.

11. The modulator of claim 10 , wherein the two gaps are separated by the waveguide disposed therebetween.

12. The modulator of claim 10 , wherein the lithium niobate layer forms a metallurgical junction with the metal pillar, the metal pillar being disposed below the lithium niobate layer.

13. The modulator of claim 10 , wherein the metallic pillars are configured to operate as traveling wave electrodes and are positioned below, above, or horizontally of the second portion in any combination.

14. The modulator of claim 4 wherein said SOI is bonded to said LNOI through said lithium niobate layer.

15. The lithium niobate layer is bonded directly onto the waveguide, and the silicon dioxide (SiO ２ A layer of silicon dioxide (SiO) is disposed on the lithium niobate layer, and the electrode is ２ 15. The modulator of claim 14, wherein the first and second electrodes are disposed on a first insulating layer.

16. The modulator of claim 4 , wherein the LNOI is encapsulated within the SOI, with only a top surface of the LNOI being exposed.

17. The modulator of claim 4 , wherein the modulator is compatible with both lithium niobate and silicon devices.

18. 20. The modulator of claim 17, wherein the silicon device is a Multi-Project Wafer (MPW) semiconductor.

19. 20. The modulator of claim 17, wherein the second portion includes one or more etched regions for bonding with the second portion.

20. 13. A lithium niobate or silicon device integrated with the modulator of claim 1 through a single transition layer.

21. forming a first portion including a first oxide layer, a first substrate layer, and a waveguide, the first oxide layer including one or more etched regions; forming a second portion comprising a non-CMOS material layer and a second oxide layer; the first portion is bonded to the second portion via at least two electrodes and / or the non-CMOS material layer; A method for fabricating a hybrid silicon photonics modulator, wherein the modulator is compatible with both lithium niobate and silicon devices.

22. 22. The method of claim 21 , wherein the first portion is joined to the second portion via at least two electrodes in the one or more etched regions, the first portion being CMOS compatible and the second portion being non-CMOS compatible.

23. 22. The method of claim 21, wherein the first portion is bonded to the second portion through the non-CMOS material layer, and the at least two electrodes are located on a top surface of the second oxide layer.

24. 22. The method of claim 21, wherein the first portion is silicon-on-insulator (SOI), the second portion is lithium niobate-on-insulator (LNOI), and the non-CMOS material layer is a lithium niobate layer.

25. 25. A computer readable storage medium having stored thereon a computer readable description of a hybrid silicon photonics modulator, the hybrid silicon photonics modulator, when processed in a chip manufacturing system, causing the chip manufacturing system to perform the method of claim 21 or 24.

Images