System and design method for RF front-end module of massive MIMO wireless unit
By designing radio front-end module (RFEM) boards of multiple reception and transmission chains, combined with cable-free design and digital pre-distortion technology, the problems of high cost, high power consumption and complex wired components of existing large-scale MIMO radio devices are solved, achieving higher spectral efficiency and system reliability.
Patent Information
- Application Number
- JP2023525525
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-03-29
- Filing Date
- 2023-03-11
- Publication Date
- 2025-04-11
AI Technical Summary
The existing large-scale multi-input multi-output (MIMO) radio device designs have problems with high cost, high power consumption, poor thermal management, large size, poor interoperability and complex wired component design, resulting in inefficiency of the system.
A radio front-end module (RFEM) board is designed, which contains multiple receiving and transmission chains, adopts a cable-free design, integrates gain blocks and amplifier devices to process RF control signals, and improves system efficiency through technologies such as digital pre-distortion (DPD) and FPGA/ASIC.
Achieve higher spectral efficiency, reduce power consumption, improve data rate and system capacity, simplify user tracking, reduce latency and improve network reliability, while achieving cable-free design, reducing system volume and weight.
Smart Images

Figure 2025509007000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates generally to network devices, and more particularly to the design and architecture of RF front-end module (RFEM) boards for massive multiple-input multiple-output (MIMO) radio units. [Background technology]
[0002] The following description of related art is intended to provide background information regarding the field of the disclosure. This section may include certain aspects of the art that may be related to various features of the present disclosure. However, this section should be understood as being used only to enhance the reader's understanding of the present disclosure and not as an admission of prior art.
[0003] 5G communication systems are expected to be implemented in sub-6 GHz and higher frequency (millimeter (mm) wave) bands, for example, 60 gigahertz (GHz) bands, to achieve higher data rates. To reduce radio wave propagation loss and extend transmission distances, beamforming, massive multiple-input multiple-output (MIMO), full-dimensional MIMO (FD-MIMO), array antennas, analog beamforming, and long-range antenna techniques are being discussed for 5G communication systems.
[0004] MIMO (Multiple Input, Multiple Output) is a wireless antenna technology that employs more than one antenna at both the transmitting and receiving ends to improve the quality, throughput, and capacity of a wireless link. MIMO uses techniques known as spatial diversity and spatial multiplexing to transmit independent and individually coded data signals, known as "streams," over the same period and over the same frequency resources.
[0005] MIMO is used in many modern wireless and RF technologies, including Wi-Fi and Long-Term Evolution (LTE). 3GPP first specified MIMO for LTE in Release 8 in 2008. This evolution used 2x2MIMO with two transmitters and two receivers, and later processing power improvements allowed wireless networks to use more simultaneous data streams, with current 4G LTE networks using 4x4MIMO. The very short wavelengths at mmWave frequencies result in smaller antenna dimensions, with 128 or 192 antenna elements (8x4MIMO) specified by 3GPP for 5G NR. This large expansion in size of MIMO antennas along with the number of transceivers has led to the term Massive MIMO.
[0006] Massive MIMO is based on three main concepts: spatial diversity, spatial multiplexing, and beamforming. Existing disclosures on Massive MIMO Radio Unit (MRU) designs / architectures make the entire device very expensive, power-hungry, thermally inefficient, bulky, and require interoperability and coupling with various separate / currently independent / non-compliant, cabled components such as antenna components and transceiver elements that complicate the overall design and construction. Hence, there is a need for an MRU and its units / sub-units that can efficiently integrate all these components and accordingly provide a cost-effective solution, size limitations, and thermally optimized design that blind-mates to result in a cableless design. Summary of the Invention [Means for solving the problem]
[0007] In one aspect, the present disclosure relates to a radio frequency (RF) front-end module (RFEM) board. The RFEM board can include multiple receive chains for signal reception and multiple transmit chains for signal transmission. The RFEM board can receive RF control signals and process the received RF control signals with one or more gain blocks and power amplifiers to amplify the received RF control signals across one or more of the multiple transmit chains and multiple receive chains to generate power from each chain.
[0008] In one embodiment, an antenna filter unit (AFU) may be operatively coupled to the RFEM board to facilitate beamforming to multiple users.
[0009] In yet another embodiment, the RFEM board may include multiple observation chains configured as digital predistortion (DPD) feedback paths from one or more power amplifiers (PAs) of the RFEM board to one or more FPGAs of the HSTB for linearization. In one embodiment, at least one of the multiple observation chains includes a directional coupler, a digital step attenuator (DSA), and a matching network.
[0010] In one embodiment, the RFEM board may include 32 transmit chains and 32 receive chains, where at least one of the transmit chains includes a matching balun, a pre-driver amplifier stage, and a final RF power amplifier stage as part of the final stage of a power amplifier (PA). In one embodiment, at least one of the receive chains includes a low noise amplifier (LNA) bandpass SAW filter and a matching network.
[0011] In one embodiment, the RFEM board includes multiple layers having receiver sections for receiving RF signals from a user equipment (UE), and the received RF signals can be decoded in the receiver sections using receivers forming part of multiple receive chains, based on which the decoded RF signals are converted into digital signals and transmitted to an upper layer having an RF connector.
[0012] In another embodiment, the RFEM board may include an RF time division duplexing (TDD) switch that can combine each transmit / receive pair, and a circulator and one or more cavity filter(s) may be configured between each RF TDD switch and the antenna port.
[0013] In yet another embodiment, the RFEM board can be blind-mated with the HSTB to eliminate cabling complexity and avoid RF signal oscillation.
[0014] In another aspect, the present disclosure relates to a user equipment (UE) including one or more primary processors communicatively coupled to one or more processors of a multiple-input multiple-output (MIMO) radio unit via a network, the one or more primary processors coupled to a memory, where the memory stores instructions that, when executed by the one or more primary processors, cause the UE to transmit one or more RF control signals to the MIMO radio unit. An RFEM board in the MIMO radio unit is configured with multiple transmit chains for signal transmission chains and multiple receive chains for signal reception. The RFEM board can receive one or more RF control signals and process the received one or more RF control signals with one or more gain blocks and power amplifiers to amplify the received one or more RF control signals over one or more of the multiple transmit chains and multiple receive chains to generate power from each chain.
[0015] In one aspect, the present disclosure relates to a non-transitory computer-readable medium including processor-executable instructions that cause a processor to transmit one or more radio frequency (RF) control signals to a multiple-input multiple-output (MIMO) radio unit, wherein a radio frequency (RF) front-end module (RFEM) board in the MIMO radio unit is configured with multiple transmit chains for signal transmission and multiple receive chains for signal reception, and the RFEM board receives the one or more RF control signals and processes the received one or more RF control signals with one or more gain blocks and power amplifiers to amplify the received one or more RF control signals across one or more of the multiple transmit chains and multiple receive chains to generate power from each chain. [Problem to be solved by the invention]
[0016] An object of the present invention is to provide greater spectral efficiency by enabling an antenna array to focus a narrow beam towards a user.
[0017] An object of the present invention is to provide a more energy efficient system when the antenna array is concentrated in a small specific section, requiring less radiated power and reducing the energy requirements in large multiple-input and multiple-output (MIMO) systems.
[0018] An object of the present invention is to increase the data rate and capacity of wireless systems.
[0019] It is an object of the present invention to facilitate more reliable and accurate user tracking.
[0020] The aim of the present invention is to eliminate high power consumption.
[0021] An object of the present invention is to reduce latency and increase network reliability.
[0022] An object of the present invention is to provide a cableless design of a massive MIMO radio unit.
[0023] It is an object of the present invention to provide a Massive MIMO standalone unit located in a single convection-cooled enclosure and weighing less than 25-29 kg.
[0024] The objective of the present invention is to provide a Massive MIMO standalone unit consisting of a lower layer PHY section, an ORAN compliant fronthaul over a 25G optical interface, and digital front-end support for 32 transmit and receive chains using commercial grade 3 or better Field Programmable Gate Arrays / Application Specific Integrated Circuits (FPGA / ASICs).
[0025] An object of the present invention is to provide a massive MIMO standalone unit that includes an IEEE 1588v2 PTP-based clock synchronization architecture over a 25G optical interface using a system synchronizer integrated circuit (IC) and a clock generator. An object of the present invention is to provide a Radio Frequency (RF) Front End Module (RFEM) board that can include multiple transmit chains for signal transmission and multiple receive chains for signal reception, and can receive RF control signals and process the received RF control signals by one or more gain blocks and power amplifiers to amplify the received RF control signals over one or more of the multiple transmit chains and multiple receive chains to generate power from each chain.
[0026] The accompanying drawings, which are incorporated herein and form a part of the present invention, illustrate exemplary embodiments of the disclosed method and system, with like reference numerals referring to the same parts throughout the different drawings. The components in the drawings are not necessarily drawn to scale, emphasis instead being placed on clearly illustrating the principles of the invention. Some drawings may use block diagrams to illustrate components and may not show the internal circuitry of each component. Those skilled in the art will appreciate that the inventions in such drawings include inventions in electrical components, electronic components, or circuits commonly used to implement such components. [Brief description of the drawings]
[0027] [Figure 1] 1 illustrates an example design architecture of a massive MIMO wireless unit according to an embodiment of the present disclosure. [Diagram 2] 1 illustrates an example design architecture of an RF front-end module (RFEM or RFFE) board according to an embodiment of the present disclosure. [Diagram 3] 1 illustrates a representation of an example combination of a user equipment (UE) with a MIMO radio unit according to an aspect of the present disclosure. [Figure 4] In accordance with an embodiment of the present disclosure, an exemplary computer system is shown in or with which embodiments of the present invention may be utilized. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0028] The above will become more apparent from the following more detailed description of the invention.
[0029] In the following description, for the purpose of explanation, various specific details are set forth to provide a thorough understanding of the embodiments of the present invention. However, it will be apparent that the embodiments of the present disclosure may be practiced without these specific details. Each of the several features described below can be used alone or in any combination with other features. Individual features may not address all of the above problems, or may address only some of the above problems. Some of the above-described problems may not be fully addressed by any of the features described herein.
[0030] The following description provides exemplary embodiments only and is not intended to limit the scope, applicability, or configuration of the present disclosure. Rather, the following description of exemplary embodiments will provide those skilled in the art with a helpful description for implementing the exemplary embodiments. It will be understood that various changes can be made in the function and arrangement of elements without departing from the spirit and scope of the invention as described.
[0031] In the following description, specific details are provided to provide a thorough understanding of the present embodiments. However, it will be understood by those skilled in the art that the embodiments may be practiced without these specific details. For example, components such as circuits, systems, networks, processes, etc. may be shown as components in block diagram form in order to avoid obscuring the embodiments in unnecessary detail. In other examples, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments.
[0032] It should also be noted that the particular embodiments may be described as a process that is depicted as a flowchart, a flow diagram, a data flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe operations as a sequential process, many operations may occur in parallel or concurrently. Additionally, the order of operations may be rearranged. A process terminates when an operation of a process is completed, but there may be additional steps not included in the diagram. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, or the like. When a process corresponds to a function, its termination may correspond to a return of the function to the calling function or to the main function.
[0033] The words "exemplary" and / or "demonstrative" are used herein in the sense of serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. Moreover, any aspect or design described herein as "exemplary" and / or "illustrative" should not necessarily be construed as preferred or advantageous over other aspects or designs, nor is it meant to exclude equivalent exemplary structures and techniques known to those skilled in the art. Furthermore, to the extent the detailed description or claims use similar terms, such terms, such as "includes," "has," "contains," and the like, are intended to be inclusive in the same manner as the open-ended transitional term "comprising," without excluding any additional or other elements.
[0034] Throughout this specification, references to "one embodiment" or "embodiment" or "aspect" or "one aspect" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the invention. Thus, the phrases "in one embodiment" or "in an embodiment" appearing in various places throughout this specification do not necessarily all refer to the same embodiment. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
[0035] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It will be further understood that the terms "comprise" and / or "comprising" as used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0036] In this disclosure, various embodiments are described using terminology used in some communication standards (e.g., 3rd Generation Partnership Project (3GPP), Extensible Radio Access Network (xRAN), and Open Radio Access Network (O-RAN)) for illustrative purposes only. Various embodiments of the present disclosure can be easily modified and applied to other communication systems.
[0037] A base station is typically a network infrastructure that provides wireless access to one or more terminals. A base station has coverage, which is defined as a predefined geographic area based on the distance over which signals can be transmitted. A base station may also be referred to as a "base station", an "access point (AP)", an "evolved NodeB (eNodeB) (eNB)", a "5G node (fifth generation node)", a "next generation NodeB", a "(gNB)", a "wireless point", a "transmit / receive point (TRP)", or other terms of equivalent technical meaning.
[0038] The present disclosure relates to an ORAN-compliant 5G Massive MIMO Radio Unit (MRU) (hereinafter alternatively and interchangeably referred to as "5G MRU" or "RU"). In an exemplary and non-limiting embodiment, the present disclosure provides a hardware architecture and design of a multi-antenna configuration 32T32R-based 5G Massive MIMO Radio Unit (MRU) for standalone mode, where the proposed 5G MRU is a radio unit (RU) that connects to a combined aggregate and remote unit (CCDU) over a fronthaul interface using a 25G optical interface and is compliant with 3GPP (3rd Generation Partnership Project)®-based ORAN (Open Radio Access Network) specifications. The proposed MRU can be configured such that, in an exemplary implementation, there are three cell sites and three corresponding MRUs are used with the CCDU, and each MRU can be connected to the CCDU via a 25G interface.
[0039] In an exemplary embodiment, the proposed 5G MRU comprises a lower PHY (physical) portion of the L1 layer with a network layer split of 7.2X (O-RAN Alliance Fronthaul specification between O-DU to O-RRU), a baseband section, an RF (radio frequency) front-end module (RFEM), and an antenna filter unit (AFU) as part of a single enclosure / unit for easy and efficient installation. However, it should be understood that the design and architecture of each component / unit of the proposed RU is novel and inventive with respect to the corresponding proposed invention, and therefore each is to be protected by a respective patent application.
[0040] 1-2, the present disclosure may relate to a radio unit that may include a high speed transceiver board (HSTB) (200) and a radio frequency (RF) front end module (RFEM) (250) operatively coupled to the HSTB (200). The RFEM (250) may include multiple transmit chains for signal transmission and multiple receive chains for signal reception, and the RFEM (250) may receive RF control signals from the HSTB (200) and process the received RF control signals through one or more gain blocks (252) and power amplifiers (254) to amplify the received RF control signals across one or more of the multiple transmit chains and multiple receive chains to generate power from each chain.
[0041] In one aspect, the wireless unit may further include an antenna filter unit (AFU) operatively coupled to the RFEM (250) to facilitate beamforming to multiple users.
[0042] In yet another aspect, the RFEM (250) may further include a plurality of observation chains configured as digital predistortion (DPD) feedback paths from one or more power amplifiers (PAs) (254) of the RFEM (250) to one or more FPGA / ASICs (202) of the HSTB (200) for linearization. In one aspect, at least one of the plurality of observation chains includes a directional coupler (256), a digital step attenuator (DSA) (258), and a matching network.
[0043] The RFEM (250) can include 16 transmit chains and 16 receive chains, where at least one of the transmit chains includes a matching balun, a pre-driver amplifier stage (260), and a final RF power amplifier stage as part of the final stage of a power amplifier (PA), and at least one of the receive chains includes a low noise amplifier (LNA), bandpass SAW filter (262), and a matching network.
[0044] In one aspect, the RFEM (250) includes multiple layers having receiver sections for receiving RF signals from a user equipment (UE), where the received RF signals can be decoded in the receiver sections using receivers forming part of multiple receive chains, based on which the decoded RF signals are converted to digital signals and transmitted to a higher layer having an RF connector.
[0045] In another aspect, the RFEM (250) can include an RF TDD (radio frequency time division duplex) switch capable of combining each transmit / receive pair, and a circulator (264) and one or more cavity filter(s) can be configured between each RF TDD switch and an antenna port.
[0046] In yet another aspect, the RFEM (250) can be blind-mated with the HSTB (200) to eliminate cable routing complexity and avoid RF signal oscillation. Blind mating reduces manufacturing and installation costs. Additionally, blind mating minimizes errors during assembly and reduces downtime required for maintenance.
[0047] The present disclosure further relates to a user equipment communicatively coupled to a wireless unit as described above.
[0048] The present disclosure further relates to a radio frequency (RF) front end module (RFEM) (250) board that may include multiple transmit chains for signal transmission and multiple receive chains for signal reception, where the RFEM (250) may receive an RF control signal and process the received RF control signal with one or more gain blocks and power amplifiers to amplify the received RF control signal across one or more of the multiple transmit chains and multiple receive chains to generate power from each chain.
[0049] In an exemplary aspect, with reference to FIG. 1, the proposed 5G MRU 100 comprises a high speed transceiver board (HSTB) 200 having a lower layer PHY section, an ORAN compliant fronthaul over a 25G optical interface 204, and a digital RF front end supporting 32 transmits, and a receive chain using, for example, three or more commercial grade FPGAs / transceivers (202-1 through 202-3, hereafter collectively referred to as 202), with the above elements / components integrated in a high density 26 or more layers of the HSTB 200. While the present disclosure is described in terms of FPGAs / ASICs, it will be understood that other equivalent transceivers are fully within the scope of the present disclosure, and thus the scope of each FPGA should be treated as the scope of any transceiver or component such as a technically equivalent ASIC.
[0050] In an exemplary embodiment, PHY development and bitstream generation of L1 lower layer can be implemented / executed on FPGA 202 itself. L1 upper layer can be configured on CCDU under tower, and L2 and L3 are configured on remote station. Here, macro site usually includes aggregation station node (server side) and remote station node (configured between CU and RU). In the present invention, aggregation station node is integrated with remote station node to form CCDU that interfaces with RU / MRU via 25G optical interface proposed in this disclosure. The proposed MRU can further include IEEE1588v2 PTP-based clock synchronization architecture using system synchronizer IC and clock generator on 25G optical interface 204.
[0051] The proposed MRU 100 may further include an integrated 8×8 cross-pole MIMO antenna with 32 cavity filters as one unit known as an antenna filter unit (AFU) 350. The proposed MRU 100 is blind-mateable as configured and has a cableless design.
[0052] In an exemplary and non-limiting aspect of the present disclosure, the proposed 5G MRU 100 is a 200W high power gNB operating at macro class (typically 6.25W or 38dBm per antenna port) and configured to provide a macro-level wide area solution that may be useful in dense urban morphologies and hot zone / hot spot areas with high traffic demands and QoS requirements. The proposed 5G MRU 100 aggregates a lower layer PHY section, a commercial grade FPGA based RF transceiver (as part of the HSTB 200) for 32 transmit and receive chains, an RF Front End Module (RFEM) 300 including RF power amplifiers, low noise amplifiers (LNAs), and RF switches for the 32 chains, and an 8*8 MIMO antenna with 32 cavity filters known as an Antenna Filter Unit (AFU) 350, which are part of a single convection cooled enclosure and weigh less than 25-29 kg. In one aspect, the macro gNB can provide good coverage and capacity for dense urban clutter with support for eight downlink beams and four uplink beams under multi-UE scenarios. The proposed 5G MRU 100 can be deployed in high-rise buildings, dense clutter, and hotspot locations where traffic demand is significantly higher and cannot be served by 4G gNBs alone for improved coverage and capacity.
[0053] In another aspect, the proposed 5G MRU can be configured as a design with an integrated antenna and cavity filter solution, eliminating the need for cables, resulting in a cable-less design. The proposed MRU 100 can be deployed at tower sites, GBTs, and GBMs. The MRU can be rapidly deployed to provide high performance with low power consumption, resulting in a power-efficient solution. The proposed MRU can be connected to the CCDU under the tower over a single 25G optical fronthaul interface that is 3GPP ORAN compliant.
[0054] In an aspect, the proposed 5G MRU is a high-power gNB (next generation node B) operating at macro class (typically ≦38 dBm per antenna port) and may be configured to complement macro-level wide area solutions for coverage and capacity. In an exemplary aspect, the high-level architecture of the proposed 32T32R 5G NR MRU may include a high-speed transceiver board (HSTB) 200, a 32T32R RF front-end module (RFEM) board 250, an antenna filter unit (AFU) 280, and a mechanical housing (in one example, there may be two housings, one for the HSTB 200 and one for the RFEM 250). The proposed MRU structure further promotes and enables optimal heat dissipation as a result of operation in weather conditions ranging from −10° C. to 50° C.
[0055] In an exemplary embodiment, the proposed 5G NR MRU 100 aggregates a lower layer PHY section, a RF transceiver (as part of the HSTB 200) based on a commercial grade FPGA for 32 transmit and receive chains with RF sampling (no intermediate frequency stage), an RF front-end module (RFEM) 250 including RF power amplifiers, low noise amplifiers (LNAs), and RF switches for the 32 chains, and an 8*8 MIMO antenna with 32 cavity filters known as an antenna filter unit (AFU) 280, weighing ≦29 kg, in a single convection-cooled enclosure. For greater clarity, the terms RFEM and RFEB are used interchangeably in this disclosure, and therefore references to the terms "module" and "board" in this context have the same meaning.
[0056] In an exemplary implementation, the proposed MRU 100 has 64 connectors, 32 on each of the transmit and receive sides, and two DC connectors with 25 pins each, totaling 50 pins for the two DC connectors. These connectors are configured to blindly connect / map / mate / sandwich, one on top of the other, with the RFEM board 250 on the HSTB 200.
[0057] In one aspect, the proposed design architecture consists of a control plane, a user plane and a synchronization plane, where the control plane is configured to control the configuration of the units / subunits forming part of the proposed MRU 100 in terms of distance-location, the user plane consists of user data, and finally, the synchronization plane is configured to utilize a Precision Time Base Protocol (PTP) over the Instant 25G interface to synchronize the units / subunits to a global clock using a timing protocol (i.e., slave devices synchronize their clocks with the master device in terms of phase and frequency) and maintain consistency / synchronization with the CCDU.
[0058] It should be understood that the proposed MRU meets all RF performance requirements mentioned in the 3GPP standard (TS38.141) after integrating a TDD-based 5G NR MRU with a Crest Factor Reduction (CFR) and Digital Pre-Distortion (DPD) module into a digital front-end lineup. Moreover, the MRU has low power consumption and heat is optimally handled by its IP65 water- and dust-proof protected mechanical housing.
[0059] 32T32R RF Front-End Module (RFEM or RFFE) Board 250 In an exemplary embodiment, the RFEM board 250 can be configured to receive control signals (RF signals) from the HSTB 200 via a connector along with a power supply. The RFFE / RFEM board can be configured to function as an expanded signal to incorporate 32 transmit chains for signal transmission, 32 receive chains for signal reception, and 32 observation chains that can function as a digital predistortion (DPD) feedback path from the power amplifier (PA) to the FPGA for linearization. The RFEM board essentially amplifies each RF signal received from the HSTB across each chain using gain blocks and power amplifiers to generate 6.25 watts of power from each chain. Considering the 32 chains that form part of the proposed RFEM board, a cumulative power of about 200 watts is generated, which corresponds to 53 dBm. In an embodiment, each transmit chain can be configured to carry a matched balun, a pre-driver amplification, and a final RF power amplification as part of the final stage of the power amplifier (PA). In an exemplary embodiment, the peak power consumption of the proposed MRU is about 780-800W, and therefore, for a 200W supply, the peak power saving efficiency of the system is about 25%.
[0060] Meanwhile, each receive chain can be configured to include a low noise amplifier (LNA), a bandpass SAW filter, and a matching network, and each observe chain can be configured to include a directional coupler, a digital step attenuator (DSA), and a matching network.
[0061] In one aspect, the RFEM board can include 10 or more layers and includes a receiver section that can receive an amplified RF signal from a 5E user equipment (UE), decode the signal in the receiver section using 32 receivers, after which the RF signal can be converted to digital and sent to a higher layer with an RF connector.
[0062] In one aspect, the proposed board can include an RF TDD switch that can pair each transmit-receive pair. A circulator and cavity filter(s) can be used between each RF switch to the antenna port. In one aspect, the RF front-end board (RFFE) can be configured to blind-mate with the high-speed transceiver board (HSTB), which can eliminate the complexity of cabling to avoid RF signal oscillation. The mating bullet provides a robust connection between the HBTB and the RFFE, thus meeting optimal design considerations including, but not limited to, providing the targeted 200W output power.
[0063] In one aspect, the proposed MRU can achieve a system noise figure level of 3.0-3.1 dB by designing and layouting the MRU architecture, reducing the amount of loss and the number of cables, and enabling blind mating.
[0064] FIG. 3 illustrates a representation of an exemplary coupling of a user equipment (UE) with an MRU. As illustrated, a UE 302 may be communicatively coupled to the MRU 100. The coupling may be via a wireless network 304. In an exemplary embodiment, the communication network 304 may include at least a portion of one or more networks having one or more nodes that transmit, receive, forward, generate, buffer, store, route, switch, process, or any combination thereof, of one or more messages, packets, signals, waves, voltage or current levels, any combination thereof, and the like, by way of example and not limitation. The UE 302 may be any handheld device, mobile device, palmtop, laptop, smartphone, pager, and the like. As a result of the coupling, the UE 302 may be configured to receive a connection request from the MRU 100, transmit an acknowledgment of the connection request to the MRU 100, and further transmit a plurality of signals in response to the connection request.
[0065] Exemplary Computer System 400 FIG. 4 illustrates an exemplary computer system in which or with which embodiments of the present disclosure may be utilized, according to an embodiment of the present disclosure. As illustrated in FIG. 4, computer system 400 may include an external storage device 410, a bus 420, a main memory 430, a read-only memory 440, a mass storage device 450, a communication port 460, and a processor 470. One skilled in the art will recognize that a computer system may include more than one processor and communication port. Processor 470 may include various modules associated with embodiments of the present invention. Communication port 460 may be an RS-232 port for use with a modem-based dial-up connection, a 10 / 100 Ethernet port, a gigabit or 10 gigabit port using copper or fiber, a serial port, a parallel port, or any other existing or future port. Communication port 460 may be selected depending on the network, such as a local area network (LAN), a wide area network (WAN), or any network to which the computer system is connected. Memory 430 may be a Random Access Memory (RAM) or any other dynamic storage device commonly known in the art. Read-only memory 440 may be any static storage device(s). Mass storage 450 may be any current or future mass storage solution that can be used to store information and / or instructions.
[0066] The bus 420 communicatively couples the processor(s) 470 with other memory, storage, and communication blocks.
[0067] Optionally, carrier and management interfaces such as a display, keyboard, and cursor control devices may also be coupled to bus 420 to support direct carrier interaction with the computer system. Other carrier and management interfaces may be provided through a network connection connected through communication port 460. The above components are intended only to illustrate various possibilities. In no way are the exemplary computer systems described above intended to limit the scope of the present disclosure.
[0068] Although considerable emphasis has been placed herein on the preferred embodiment, it will be understood that many embodiments may be made and that many changes may be made in the preferred embodiment without departing from the principles of the invention. These and other changes in the preferred embodiment of the invention will be apparent to those skilled in the art from the disclosure herein, and it should be clearly understood that the foregoing description is not intended to limit the invention and is to be taken merely as illustrative.
[0069] Portions of the disclosure of this patent document contain material that is subject to intellectual property rights, including but not limited to copyright, designs, trademarks, IC layout designs, and / or trade dress protection, belonging to Jio Platforms Limited (JPL) or its affiliates (hereinafter referred to as the Owner). The Owner has no objection to anyone copying this patent document or the patent disclosure to the extent that it appears in a Patent and Trademark Office patent application or records, but otherwise reserves all rights. All rights to such intellectual property are fully reserved by the Owner.
[0070] Advantages of the Invention The present disclosure provides greater spectral efficiency by enabling antenna arrays to focus narrow beams towards a user.
[0071] The present disclosure provides a more energy efficient system as antenna arrays are concentrated in small specific sections, requiring less radiated power and reducing energy requirements in massive MIMO systems.
[0072] The present disclosure increases the data rates and capacity of wireless systems.
[0073] The present disclosure facilitates more reliable and accurate user tracking.
[0074] The present disclosure eliminates high power consumption.
[0075] The present disclosure reduces latency and increases network reliability.
[0076] The present disclosure provides a cableless design for a massive MIMO radio unit.
[0077] The present disclosure provides a massive MIMO standalone unit located in a single convection-cooled enclosure and weighing less than 25-29 kg.
[0078] This disclosure provides a Massive MIMO standalone unit consisting of a lower layer PHY section, an ORAN compliant fronthaul over a 25G optical interface, and digital front-end support for 32 transmit and receive chains using commercial grade 3 FPGAs.
[0079] The present disclosure provides a massive MIMO standalone unit that includes an IEEE 1588v2 PTP-based clock synchronization architecture over a 25G optical interface using a system synchronizer IC and a clock generator.
[0080] The present disclosure provides a radio frequency (RF) front-end module (RFEM) board that may include multiple transmit chains for signal transmission and multiple receive chains for signal reception, where the RFEM board may receive an RF control signal and process the received RF control signal through one or more gain blocks and power amplifiers to amplify the received RF control signal across one or more of the multiple transmit chains and multiple receive chains to generate power from each chain.
Claims
1. a plurality of transmit chains for transmitting signals; a plurality of receive chains for receiving signals; A radio frequency (RF) front-end module (RFEM) (250) board comprising: The RFEM (250) board receives an RF control signal and processes the received RF control signal with one or more gain blocks and power amplifiers to amplify the received RF control signal across one or more of the multiple transmit chains and the multiple receive chains and generate power from each chain.
2. 10. The RFEM (250) board of claim 1, wherein the RFEM (250) board is operatively coupled to an antenna filter unit (AFU) (280) to facilitate beamforming to multiple users.
3. 2. The RFEM (250) board of claim 1, comprising a plurality of observation chains configured as digital predistortion (DPD) feedback paths from one or more power amplifiers (PAs) (254) of the RFEM (250) board to one or more field programmable gate arrays (FPGAs) (202) of a high speed transceiver board (HSTB) (200) for linearization.
4. 4. The RFEM (250) board of claim 3, wherein at least one of the plurality of observation chains includes a directional coupler (256), a digital step attenuator (DSA) (258), and a matching network.
5. The RFEM (250) board of claim 1, wherein said RFEM (250) board comprises 32 transmit chains and 32 receive chains.
6. 2. The RFEM (250) board of claim 1, wherein at least one of the plurality of transmit chains includes a matched balun, a pre-driver amplifier stage (260), and a final RF power amplifier stage as part of a final stage of a power amplifier (PA).
7. 2. The RFEM (250) board of claim 1, wherein at least one of the multiple receive chains includes a low noise amplifier (LNA) bandpass SAW filter (262) and a matching network.
8. 2. The RFEM (250) board of claim 1, comprising a plurality of layers having receiver sections for receiving RF signals from a user equipment (UE), and wherein the received RF signals are decoded in the receiver sections using receivers forming part of the plurality of receive chains, based thereon the decoded RF signals are converted to digital signals and transmitted to a higher layer having an RF connector.
9. 2. The RFEM (250) board of claim 1, wherein the RFEM (250) board includes an RF time division duplex (TDD) switch that combines each transmit and receive pair, and a circulator (264) and one or more cavity filter(s) are configured between each RF TDD switch and an antenna port.
10. 4. The RFEM (250) board of claim 3, wherein the RFEM (250) board is blind-mated with said HSTB (200) to eliminate cable routing complexity and avoid RF signal oscillation.
11. A user equipment (UE) (302) communicatively coupled to a radio frequency (RF) front-end module (RFEM) (250) board, the UE (302) comprising: one or more primary processors communicatively coupled to one or more processors of a multiple-input multiple-output (MIMO) wireless unit (100) via a network (304), the one or more primary processors coupled to a memory, the one or more primary processors, when executed by the one or more primary processors, providing to the UE (302): transmitting one or more RF control signals to the MIMO radio unit (100), the RFEM (250) board in the MIMO radio unit (100) a plurality of transmit chains for transmitting signals; a plurality of receive chains for receiving signals; the RFEM (250) board receiving the one or more RF control signals and processing the received one or more RF control signals with one or more gain blocks and power amplifiers to amplify the received one or more RF control signals across one or more of the multiple transmit chains and the multiple receive chains and generate power from each chain; The UE (302), comprising the one or more primary processors, the memory storing instructions to cause the UE (302) to:
12. A non-transitory computer readable medium containing processor-executable instructions, the non-transitory computer readable medium comprising: Transmitting one or more radio frequency (RF) control signals to a multiple-input multiple-output (MIMO) radio unit (100), comprising: a radio frequency (RF) front-end module (RFEM) (250) board in the MIMO radio unit (100); a plurality of transmit chains for transmitting signals; a plurality of receive chains for receiving signals; the RFEM (250) board receiving the one or more RF control signals and processing the received one or more RF control signals with one or more gain blocks and power amplifiers to amplify the received one or more RF control signals across one or more of the multiple transmit chains and the multiple receive chains and generate power from each chain; The non-transitory computer-readable medium comprising the processor-executable instructions to cause the processor to perform the steps of: