System and design method for Ethernet controller of integrated centralized distributed unit

The integration of CU and DU functions onto a single board within the CCDU system addresses the complexity and cost issues of existing 5G gNodeB architectures, enhancing reliability and processing efficiency.

JP2025510430APending Publication Date: 2025-04-15JIO PLATFORMS LTD
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Patent Information

Application Number
JP2023526036
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-03-31
Filing Date
2023-03-24
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

Existing 5G gNodeB architectures require physically separate CU and DU units, leading to increased costs, complexity, and reliability issues due to the need for multiple interfaces and separate temperature management.

Method used

A single integrated board-based controller system for CCDUs that combines CU and DU functions, featuring a fronthaul NIC for communication with the radio unit and a backhaul NIC for optical Ethernet connections, along with an accelerator unit for enhanced processing capabilities.

Benefits of technology

This solution reduces costs and improves reliability by integrating all necessary components onto a single board, enabling efficient management of network interfaces and supporting high-speed processing over a wide temperature range.

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Abstract

The present invention provides an efficient hardware architecture for an Ethernet controller and provides a connection interface to a Combined Centralized Distributed Unit (CCDU) ​​to handle level 1, 2, and 3 scheduling in the network. The CCDU design can provide the functionality of CU and DU as a single unit, and the design of the Ethernet controller together with the eASIC with accelerator unit is crucial. The single board approach of the CCDU improves the reliability and reduces the cost of the CCDU.
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Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure relate generally to telecommunication basement applications and, more particularly, to a Combined Centralized Distribution Unit (CCDU) ​​Ethernet controller design. [Background technology]

[0002] The following description of the related art is intended to provide background information regarding the field of the disclosure. This section may include certain aspects of the art that may be related to various features of the present disclosure. However, it should be understood that this section is intended only to enhance the reader's understanding of the present disclosure and is not an admission of prior art.

[0003] Fifth generation (5G) technology is expected to fundamentally change the role that telecommunications technology plays across industries and society. The gNodeB is a 3GPP-compliant implementation of a 5G-NR base station. It consists of independent network functions that implement 3GPP-compliant NR Radio Access Network (RAN) protocols, namely the Physical Layer (PHY), the Media Access Control Layer (MAC), the Radio Link Control (RLC), the Packet Data Convergence Protocol (PDCP), the Service Data Adaptation Protocol (SDAP), the Radio Resource Control (RRC), and the Network Real-Time Analytics Platform (NRAP), as shown in Figure 1A. The gNB further incorporates three functional modules: the CU, the DU, and the Radio Unit (RU), which can be deployed in multiple combinations. The CU and DU can run together or independently and can be deployed on either physical resources (e.g., chipsets) or virtual resources (e.g., dedicated COTS servers or shared cloud resources). The CU provides support for the higher layers of the protocol stack such as SDAP, PDCP, RRC, while the DU provides support for the lower layers of the protocol stack such as Radio Link Control (RLC), Medium Access Control (MAC), and the physical layer. In the 5G Radio Access Network (RAN) architecture, the DU in the Baseband Unit (BBU) is responsible for the real-time Layer 1 and Layer 2 scheduling functions of the 5G protocol stack layers, while the CU is responsible for the non-real-time, higher L2 and L3 layers of the 5G protocol stack layers.

[0004] However, in the existing architecture, the DU and CU units are physically separated, and splitting the gNB into DU and CU requires the support of exhaustive and complex methodologies and protocols. The split between CU and DU is most prominent in the internal structure of the gNB, where these two entities are connected by a new interface called F1. In most of the existing gNB nodes, the CU and DU are physically separated, meaning that they are on different boards, which makes the split more costly in terms of achieving temperature requirements, vibration, dust, humidity, latency, power, radiation losses, bandwidth, increased dependency on possible interfaces, and maintaining the parameters of both CU and DU separately.

[0005] Typically, to create a server, providers use network interface cards, such as PCIe cards, which require separate plug-ins, input sources, and other external connections. Moreover, currently available technologies are inherently complex, unable to meet the requirements for high-speed processing on a single integrated chip.

[0006] Therefore, there is a need in the art to provide a local area network controller embedded in a single integrated board as well as a compact CCDU that can overcome the shortcomings of the existing prior art. Summary of the Invention [Problem to be solved by the invention]

[0007] Some of the objectives of the present disclosure that are met by at least one embodiment herein are listed herein below.

[0008] It is an object of the present disclosure to provide a system in a single unit to reduce costs and increase reliability.

[0009] The objective of this disclosure is to design a local area network controller hardware based on a single PCB approach by keeping all the required SoC on-board.

[0010] It is an object of the present disclosure to provide a system that can manage one or more network interfaces within a single PCB.

[0011] It is an objective of this disclosure to provide a system that operates from standard telecommunications power (-48VDC) with all the protection required for a telecommunications site.

[0012] It is yet another object of the present invention to provide a controller with high processing speed on an integrated chip. [Means for solving the problem]

[0013] This section is provided to introduce certain objects and aspects of the invention in a simplified form, which are further described below in the Detailed Description. This Summary is not intended to identify key features or the scope of the claimed subject matter.

[0014] In order to achieve the above-mentioned objectives, the present invention provides a controller system for a Combined Centralized Distributed Unit (CCDU) ​​system. The system may include a housing for the controller, the controller being operatively coupled to a processing unit of the CCDU. The controller may be embedded in a single integrated board. The controller may further include an accelerator unit capable of accelerating a set of functions of the CCDU. The controller may include a fronthaul network interface controller (NIC) that may be communicatively coupled to a radio unit (RU) (108) and a backhaul NIC communicatively coupled to a backhaul network (112). The controller may further include one or more network interfaces.

[0015] In one embodiment, the fronthaul NIC (116) may include one or more interfaces under the evolved Common Public Radio Interface (eCPRI) protocol with the wireless units.

[0016] In one embodiment, the fronthaul NIC may further include an internal synchronization block for performing any or a combination of enhanced Common Public Radio Interface (eCPRI) and ORAN functions.

[0017] In one embodiment, the backhaul NIC may include one or more optical Ethernet connections.

[0018] In one embodiment, the backhaul NIC may further include a synchronization block for recovering a clock signal from the backhaul network.

[0019] In one embodiment, the accelerator unit may further include a soft-decision forward error correction (SD-FEC) module.

[0020] In one embodiment, the SD-FEC module can support low density parity check (LDPC) decoding and encoding, as well as decoding of turbo codes.

[0021] In one embodiment, at least eight dynamic random access memory integrated circuits or modules can be embedded on a single integrated board and at least five 1 GB DDR4 can be connected to a single integrated circuit.

[0022] In one embodiment, the one or more interfaces may be connected to the processing unit (118) through a platform controller hub (PCH) (320) associated with a single integrated board.

[0023] In one embodiment, the controller may be enabled by a local area network.

[0024] In one aspect, the present disclosure provides a method performed by a network-enabled controller system for a combined centralized distribution unit (CCDU) ​​system, the method including performing any or a combination of enhanced Common Public Radio Interface (eCPRI) and ORAN functions, providing connectivity with a backhaul NIC configured with optical Ethernet, recovering a clock signal from the backhaul network with a synchronization block provided in the backhaul NIC, and supporting low-density parity check (LDPC) decoding and encoding, and turbo code decoding with a soft-decision forward error correction (SD-FEC) module provided in an accelerator unit.

[0025] In one aspect, the present disclosure provides a non-transitory computer-readable medium comprising processor-executable instructions to cause a processor to perform any one or a combination of enhanced Common Public Radio Interface (eCPRI) and ORAN functions, provide connectivity with configured optical Ethernet through a backhaul NIC, recover a clock signal from the backhaul network through a synchronization block provided in the backhaul NIC, and support low-density parity check (LDPC) decoding and encoding, and turbo code decoding through a soft-decision forward error correction (SD-FEC) module provided in the accelerator unit.

[0026] The accompanying drawings, which are incorporated herein and constitute a part of the present invention, illustrate exemplary embodiments of the disclosed method and system, with like reference numerals referring to the same parts throughout the different drawings. The components in the drawings are not necessarily drawn to scale, emphasis instead being placed on clearly illustrating the principles of the invention. Some drawings may use block diagrams to illustrate components and may not represent the internal circuitry of each component. Those skilled in the art will appreciate that the inventions in such drawings include inventions in electrical components, electronic components, or circuits commonly used to implement such components. [Brief description of the drawings]

[0027] [Figure 1A] 1 illustrates an exemplary network architecture in which the proposed system of the present disclosure may be implemented or with which the proposed system of the present disclosure may be implemented, according to one embodiment of the present disclosure. [Figure 1B] 1 illustrates an exemplary system architecture of a Combined Centralized Distributed Unit (CCDU) ​​in accordance with one embodiment of the present disclosure. [Figure 1C] 1 illustrates an exemplary method flow diagram in which the present disclosure may be practiced, according to one embodiment of the present disclosure. [Diagram 2] 1 illustrates an exemplary existing representation of a centralized unit and a distributed unit of a gNodeB. [Diagram 3] 1 illustrates an exemplary processing unit diagram of a CCDU, according to one embodiment of the present disclosure. [Figure 4] 1 illustrates an exemplary computer system in which embodiments of the present invention may be utilized or with which embodiments of the present invention may be utilized, according to embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] The above will become more apparent from the following more detailed description of the invention.

[0029] In the following description, for purposes of explanation, various specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure. However, it will be apparent that the embodiments of the present disclosure may be practiced without these specific details. Some features described below may be used independently of each other or with any combination of other features. Individual features may not address all of the above problems, or may address only some of the above problems. Some of the above problems may not be fully addressed by any of the features described herein.

[0030] The following description provides exemplary embodiments only and is not intended to limit the scope, applicability, or configuration of the present disclosure. Rather, the following description of exemplary embodiments provides those skilled in the art with a helpful description for implementing the exemplary embodiments. It should be understood that various changes can be made in the function and arrangement of elements without departing from the spirit and scope of the invention as described.

[0031] Specific details are set forth in the following description to provide a thorough understanding of the embodiments. However, it will be understood by those skilled in the art that some embodiments may be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may be shown as components in block diagram form in order to avoid obscuring the embodiments in unnecessary detail. In other instances, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments.

[0032] It should also be noted that the particular embodiments may be described as a process that is depicted as a flowchart, a flow diagram, a data flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe operations as a sequential process, many operations may occur in parallel or concurrently. Additionally, the order of operations may be rearranged. A process terminates when an operation of a process is completed, but there may be additional steps not included in the diagram. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, or the like. When a process corresponds to a function, its termination may correspond to a return of the function to the calling function or to the main function.

[0033] The words "exemplary" and / or "demonstrative" are used herein in the sense of serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. Moreover, any aspect or design described herein as "exemplary" and / or "illustrative" should not necessarily be construed as preferred or advantageous over other aspects or designs, nor is it meant to exclude equivalent exemplary structures and techniques known to those skilled in the art. Furthermore, to the extent the detailed description or claims use similar terms, such terms, such as "includes," "has," "contains," and the like, are intended to be inclusive in the same manner as the open-ended transitional term "comprising," without excluding any additional or other elements.

[0034] Throughout this specification, references to "one embodiment" or "embodiment" or "aspect" or "one aspect" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the invention. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0035] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It will be further understood that the terms "comprise" and / or "comprising" as used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0036] In this disclosure, various embodiments are described using terminology used in some communication standards (e.g., 3rd Generation Partnership Project (3GPP), Extensible Radio Access Network (xRAN), and Open Radio Access Network (O-RAN)) as illustrative examples only. Various embodiments of the present disclosure can be easily modified and applied to other communication systems.

[0037] Typically, a base station is a network infrastructure that provides wireless access to one or more terminals. A base station has coverage, which is defined as a predefined geographic area based on the distance over which signals can be transmitted. In addition to "base station," a base station may also be referred to as an "access point (AP)," "evolved NodeB (eNodeB) (eNB)," "5G node (fifth generation node)," "next generation NodeB (gNB)," "wireless point," "transmit / receive point (TRP)," or other terms with equivalent technical meaning.

[0038] Furthermore, a protocol stack or network stack is an implementation of a computer networking protocol suite or protocol family for a telecommunication system consisting of multiple network devices. The 5G protocol stack can include Layer 1 (L1), which is the physical layer. The 5G Layer 2 (L2) can include MAC, RLC, and PDCP. The 5G Layer 3 (L3) is the RRC layer.

[0039] The present invention provides an efficient hardware architecture for an ORAN-compliant internal structure of a base station or next-generation Node B (gNodeB), consisting of a Combined Centralized Distributed Unit (CCDU) ​​for 5G basement applications required for processing L1, L2, and L3 of the network. The CCDU design can provide CU and DU functions in a single unit and can operate in a wide temperature range. The single board approach of the CCDU improves the reliability and reduces the cost of the CCDU. The CCDU can support various types of synchronization and provide site alarms via dry contacts for equipping external alarm devices. In the description, many specific details such as logical implementations, types and interrelationships of system components may be described to provide a more complete understanding of some embodiments. However, those skilled in the art will understand that the invention can be practiced without such specific details. In other instances, control structures, gate level circuits, and / or complete software instruction sequences have not been shown in detail so as not to obscure the invention. Those skilled in the art will be able to implement the appropriate functionality without undue experimentation after reading the included description.

[0040] 1A, an exemplary network architecture of a 5G New Radio (NR) network (100) (also referred to as network architecture (100)) in which or with which the proposed system (110) may be implemented in accordance with one embodiment of the present disclosure is shown. As shown, the exemplary network architecture (100) may include the proposed system (110) that may be associated with a 5G base station (104) (also referred to as gNodeB (104)). The gNodeB (104) may include at least three functional modules, such as a centralized unit (CU), a distributed unit (DU), and a radio unit (RU). The gNodeB may be communicatively coupled to a plurality of first computing devices (102-1, 102-2, 102-3...102-N) (interchangeably referred to as user equipment (102-1, 102-2, 102-3...102-N), individually referred to as user equipment (UE) (124), and collectively referred to as UEs (102)) via an open radio access network radio unit (O-RU) (114).

[0041] In an exemplary embodiment, the system (110) may be configured with a combined CU and DU in a single platform or PCB, simply referred to as CCDU (106), as shown in Figure IB. The CCDU (106) may be enclosed in a single housing. The housing is provided with a cooling system that allows the CCDU to function at a predetermined temperature.

[0042] In one embodiment, the CCDU (106) may be operatively coupled to the radio unit (RU) (108) via one or more network interface card (NIC) cards. The CCDU (106) may include a processing unit (118), an accelerator unit that may include a soft-decision forward error correction (SD-FEC) module (116), a local area network controller unit that includes a backhaul network interface card (NIC) (114), a fronthaul NIC (116), etc. The backhaul NIC (114) may further be communicatively coupled to the backhaul network (112).

[0043] FIG. 1C illustrates an exemplary method flow diagram (150) in which the present disclosure may be implemented, according to an embodiment of the present disclosure.

[0044] As shown, the method (150) is performed by a network-enabled controller system for a Combined Centralized Distributed Unit (CCDU) ​​system and may include performing either or a combination of enhanced Common Public Radio Interface (eCPRI) and ORAN functions at 152. For example, eCPRI provides an interface between a Radio Equipment Control (REC) and a Radio Equipment (RE). Often, a CPRI link is used to transport data between a cell site and a base station.

[0045] The method may also include providing a connection to the configured optical Ethernet through a backhaul NIC (114) at 154. For example, a backhaul NIC is a link between a network and other sub-networks that serves as a backbone for other networks. Also, the transfer of data or networks between access points to the public is a backhaul. A backhaul connects a central network to an individual network or a public network.

[0046] Additionally, the method may include, at 156, recovering a clock signal from the backhaul network (112) by a synchronization block implemented within the backhaul NIC (114). Ethernet is fundamentally an asynchronous protocol, optimized for the bursty nature of data traffic. One of the final pieces missing for full integration into Ethernet is the ability to provide timing natively within the network. The synchronization block provides the necessary timing synchronization.

[0047] Additionally, the method (150) can include supporting 158, by a soft decision forward error correction (SD-FEC) module (116), low density parity check (LDPC) decoding and encoding, as well as turbo code decoding. SD-FEC can further provide a decision confidence factor that the receiver uses to decide between 1 and 0, meaning how far the signal level is from 1 or 0, which can provide an additional coding gain of 1-2 DB, thus providing an overall improvement in reach of 20%-40%. Soft decision FEC also allows for longer reach and less regenerators.

[0048] In general, the existing gNodeB internal structure (200) of the 5G core (206) is shown in FIG. 2, and it may be clear to a person skilled in the art that the existing CU (202) and DU (204) are separate units connected by an F1 interface (208).

[0049] In an exemplary embodiment, as shown in FIG. 3, the system (110) or CCDU (106) may include one or more processors coupled to a memory that may store instructions that, when executed by the one or more processors, may cause the system (110) to perform L1 and L2 functions. The one or more processors (302) may be implemented as one or more microprocessors, microcomputers, microcontrollers, edge or fog microcontrollers, digital signal processors, central processing units, logic circuits, and / or any device that processes data based on operational instructions. Among other functions, the one or more processors (302) may be configured to fetch and execute computer readable instructions stored in the memory of the CCDU (106). The memory may be configured to store one or more computer readable instructions or routines in a non-transitory computer readable storage medium that may be fetched and executed to create or share data packets via a network service. The memory (304) may comprise any non-transitory storage device, including, for example, a volatile memory, such as a RAM, or a non-volatile memory, such as an EPROM, a flash memory, etc.

[0050] In one embodiment, the system (110) may include multiple interfaces (306). The interfaces (306) may include various interfaces, such as interfaces for data input and output devices, referred to as I / O devices, storage devices, and the like. The interfaces (306) may facilitate communication of the system (110) with multiple platforms, such as a platform controller hub (320) and an ASIC (318) that comprises (system-on-chip) SoC components associated with the functionality of the CCDU (106). In an exemplary embodiment, the SoC may include, but is not limited to, a soft-decision forward error correction (SD-FEC) module (116). The interface(s) (306) may also provide a communication path to one or more components of the CCDU (106). Examples of such components include, but are not limited to, a processing unit / engine(s) (118) and a database (310).

[0051] In an exemplary embodiment, the CCDU (106) may be designed for outdoor applications to operate over a predetermined temperature range and predetermined environmental conditions, unlike commercial off-the-shelf (COTS) servers used in AC environments. For example, the predetermined temperature range may range from 0° C. to at least 60° C. in deserts and other tropical and equatorial regions, while the predetermined environmental conditions may include dry, humid, cold, or dusty environments. In one embodiment, the housing unit houses a single integrated board.

[0052] Further, in one embodiment, accelerator units within the system may be configured to accelerate functions associated with higher layers of the network protocol stack as well as functions associated with lower layers of the protocol stack.

[0053] In an exemplary embodiment, the CCDU in a single board can adopt a chip-down approach where one or more components corresponding to a NIC card can be part of a single board, which increases the mean time between failures (MTBF) and significantly reduces costs. Since the components are all combined on a single board, there is no need for separate components (cards) but rather a single board can be used, which not only reduces the manufacturing process but also reduces costs and improves system reliability.

[0054] In an exemplary embodiment, the system (110) can be assembled on a single board (interchangeably referred to as a LAN on Motherboard (LOM)) with a predetermined number of layers. The predetermined number of layers can prevent the system from being bulky or heavy. By way of example and not limitation, the number of predetermined layers can be at least 14. In one example, the system (110) can include one or more network connections directly connected to the LOM. Instead of needing a separate network interface card to access a local area network, such as Ethernet, the circuitry can be located on a single board. An advantage of the system (110) can be an additional available peripheral component interconnect express (PCIe) slot that is not used by a network adapter.

[0055] In an exemplary embodiment, the system (110) may include, but is not limited to, at least four (x4) 25G optical fibers (SFPs) as fronthaul connections to a fronthaul NIC (116) over, but not limited to, an eCPRI protocol, and at least two (x2) 10G optical fibers (SFPs) as backhaul connections to a backhaul network (112).

[0056] In an exemplary embodiment, the system (110) may be further connected to one or more alarm devices (not shown in FIG. 1B) capable of transmitting alarm signals via dry contacts, temperature rise, critical environmental conditions, and critical electronic conditions. The system (110) may be operated from a standard telecommunications power source of -48VDC, but is not limited to one with all the protection required for a telecommunications site.

[0057] The processing unit / engine(s) (118) may be implemented as a combination of hardware and programming (e.g., programmable instructions) to implement one or more functions of the processing unit (118). In the examples described herein, such a combination of hardware and programming may be implemented in a number of different ways. For example, the programming for the processing unit (118) may be processor-executable instructions stored in a non-transitory machine-readable storage medium, and the hardware of the processing unit (118) may include processing resources (e.g., one or more processors) to execute such instructions. In this example, the machine-readable storage medium may store instructions that, when executed by the processing resources, implement the processing unit (118). According to such an example, the system (110) may include a machine-readable storage medium that stores instructions and the processing resources for executing the instructions, or the machine-readable storage medium may be separate but accessible to the CCDU (106) and the processing resources. In other examples, the processing engine(s) (118) may be implemented by electronic circuitry.

[0058] The processing unit (118) may include one or more modules / engines selected from any of a base mode management controller (BMC) (312), a local area network controller (314) (interchangeably referred to herein as an Ethernet controller (314)), a clock synchronizer module (316), and other module(s) (322).

[0059] FIG. 1C illustrates an exemplary method flow diagram in which the present disclosure may be implemented, according to one embodiment of the present disclosure.

[0060] Network-enabled controller In an exemplary embodiment, a local network or Ethernet controller (314) may be provided for a fronthaul NIC (116) connection to the RU (108). The Ethernet controller (314) may further include a backhaul NIC (114) provided as a connection to the backhaul network (112).

[0061] In an exemplary embodiment, the fronthaul NIC (116) may be associated with at least three 25 Gbps interfaces under the evolved Common Public Radio Interface (eCPRI) protocol that may provide connectivity with the radio units (108), and may include built-in synchronization blocks, such as, but not limited to, IEEE 1588 blocks, for performing any or a combination of enhanced Common Public Radio Interface (eCPRI) and ORAN functions.

[0062] In an exemplary embodiment, the backhaul NIC (114) may provide at least two 1G / 10Gbps optical Ethernet connections to the backhaul network (112), but is not limited to such. The backhaul NIC (114) may further include a synchronization block, such as, but not limited to, an IEEE 1588 block. In one example, the synchronization block may be configured to recover a 1588 clock from the backhaul network (112). In an exemplary embodiment, the fronthaul NIC (116) and the backhaul NIC (114) may be embedded in a single PCB board.

[0063] In one embodiment, the backhaul connection of the backhaul NIC may be provided using, but is not limited to, 1x10Gbps optical Ethernet.

[0064] eASIC The enhanced ASIC (318) may include an accelerator unit. The accelerator unit may further include a soft-decision forward error correction (SD-FEC) module (116) and may be one of the components of the Ethernet controller (314). In one example, the SD-FEC module (116) may support low-density parity check (LDPC) decoding and encoding, as well as decoding of turbo codes. The LDPC code used is highly configurable, and the particular code used may be specified on a per-codeword basis. The SD-FEC module (116) forms the basis of 5G network communications. Therefore, to support the operation of the CCDU on a single PCB board, the eASIC needs to be embedded precisely and accurately into the Ethernet controller.

[0065] In one embodiment, the SD-FEC module (116) may be embedded on the board to facilitate assembly of the CCDU within a single PCB board.

[0066] Additionally, in one embodiment, at least eight dynamic random access memory integrated circuits or modules, such as, but not limited to, double data rate fourth generation (DDR4) dual in-line memory module (DIMM) interfaces, may be embedded in the e-ASIC (314). In one example, a DDR4 DIMM may be connected to the processing unit (118) and at least five 1 GB DDR4 may be connected to the e-ASIC (318). In an exemplary embodiment, other interfaces, such as Ethernet, USB / UART, etc., may be connected to the processing unit (118) via a platform controller hub (PCH) (320) associated with the e-ASIC (314).

[0067] In an exemplary embodiment, a communications network may include at least a portion of one or more networks having one or more nodes that transmit, receive, forward, generate, buffer, store, route, switch, process, or combinations thereof, etc., by way of example and not limitation, one or more messages, packets, signals, radio waves, voltage or current levels, some combination thereof, etc. The networks may include, by way of example and not limitation, one or more of a wireless network, a wired network, the Internet, an intranet, a public network, a private network, a packet-switched network, a circuit-switched network, an ad-hoc network, an infrastructure network, a public switched telephone network (PSTN), a cable network, a cellular network, a satellite network, a fiber optic network, and combinations thereof.

[0068] In one embodiment, the one or more user equipment (102) may communicate with the system (110) via a set of executable instructions resident on any operating system, including, but not limited to, Android®, IOS®, Kai OS®, etc. In one embodiment, the one or more user equipment (102) and the one or more mobile devices may include, but are not limited to, any electrical, electronic, electromechanical or mechanical device, or combination of one or more of the above devices, such as a mobile phone, a smart phone, a virtual reality (VR) device, an augmented reality (AR) device, a laptop, a general purpose computer, a desktop, a personal digital assistant, a tablet computer, a mainframe computer, or other computing device, which may include one or more built-in or externally connected accessories, including, but not limited to, a visual aid device such as a camera, an audio aid device, an input device for receiving input from a user, such as a microphone, a keyboard, a touch pad, a touch-enabled screen, an electronic pen, a receiving device for receiving audio or visual signals in any frequency range, and a transmitting device capable of transmitting any audio or visual signals in any frequency range. It will be appreciated that the user equipment(s) (102) and mobile device(s) are not limited to the devices mentioned and various other devices may be used. The smart computing device may be any suitable system for storing data and other private / sensitive information.

[0069] Exemplary Computer System 400 FIG. 4 illustrates an exemplary computer system that may utilize or with which embodiments of the present invention may be utilized, according to an embodiment of the present disclosure. As shown in FIG. 4, computer system 400 may include an external storage device 410, a bus 420, a main memory 430, a read-only memory 440, a mass storage device 450, a communication port 460, and a processor 470. Processor 470 may include various modules related to embodiments of the present invention. Communication port 460 may be an RS-232 port for use with a modem-based dial-up connection, a 10 / 100 Ethernet port, a gigabit or 10 gigabit port using copper or fiber, a serial port, a parallel port, or any other existing or future port. Communication port 460 may be selected depending on a network such as a local area network (LAN), a wide area network (WAN), or any network to which the computer system connects. Memory 430 may be a random access memory (RAM), or any other dynamic storage device commonly known in the art. Read-only memory 440 may be any static storage device or devices, such as, but not limited to, a programmable read-only memory (PROM) chip for storing static information, such as boot-up instructions or BIOS instructions for processor 470. Mass storage 450 may be any current or future mass storage solution that can be used to store information and / or instructions. Examples of mass storage solutions include, but are not limited to, a Parallel Advanced Technology Attachment (PATA) or Serial Advanced Technology Attachment (SATA) hard disk drive or solid state drive (internal or external, e.g., having a Universal Serial Bus (USB) and / or Firewire interface), one or more optical disks, a Redundant Array of Independent Disks (RAID) storage, e.g., an array of disks (such as a SATA array).

[0070] Bus 420 communicatively couples processor(s) 470 to other memory, storage, and communication blocks, and may be, for example, a Peripheral Component Interconnect (PCI) / PCI Extended (PCI-X) bus, Small Computer System Interface (SCSI), USB, etc., for connecting expansion cards, drives, other subsystems, as well as other buses, such as a Front Side Bus (FSB), that connects processor 470 to a software system.

[0071] Optionally, operator and management interfaces such as a display, keyboard, and cursor control devices may also be coupled to bus 420 to support direct operator interaction with the computer system. Other operator and management interfaces may be provided through a network connection connected through communications port 460. The above components are intended only to illustrate various possibilities. The foregoing exemplary computer system is not intended to limit the scope of the present disclosure.

[0072] Therefore, the present disclosure provides a unique and efficient hardware architecture design of a Combined Centralized Distributed Unit (CCDU) ​​that can provide the functionality of CU and DU in a single box solution. Unlike commercial off-the-shelf (COTS) servers that are often used quietly in AC environments, the CCDU is designed for outdoor applications that operate in a wide temperature range and various environmental conditions. The CCDU adopts a chip-down approach where all components corresponding to the NIC card are part of a single board, which increases the mean time between failures (MTBF) and significantly reduces the cost.

[0073] Although considerable emphasis has been placed herein on the preferred embodiment, it should be understood that many embodiments may be made and many changes may be made in the preferred embodiment without departing from the principles of the invention. These and other changes in the preferred embodiment of the invention will be apparent to those skilled in the art from the disclosure herein, and it should be clearly understood that the foregoing description is to be taken merely as illustrative and not limiting of the invention.

[0074] Portions of the disclosure of this patent document contain material that is subject to intellectual property rights, including, but not limited to, copyright, designs, trademarks, IC layout designs, and / or trade dress protection, belonging to Jio Platforms Limited (JPL) or its affiliates (hereinafter referred to as the Owner). The Owner has no objection to the complete reproduction by anyone of the patent document or patent disclosure as it appears in the Patent and Trademark Office files and records, but otherwise reserves all rights whatsoever. All rights to such intellectual property are fully reserved by the Owner. This patent document includes systems and methods as defined, among others, in 3GPP Technical Specification (TS) 38.816.

[0075] Advantages of the present disclosure Some of the objectives of the present disclosure that are met by at least one embodiment herein are listed herein below.

[0076] The present disclosure provides a system in a single unit to reduce costs and increase reliability.

[0077] The present disclosure provides a hardware design of a local area network controller based on a single PCB approach by keeping all the required SoC on-board.

[0078] The present disclosure provides a system that can manage one or more network interfaces within a single PCB.

[0079] The present disclosure provides a system that operates from standard telecommunications power (-48VDC) with all the protection required for a telecommunications site.

Claims

1. 1. A network-enabled controller system for a Comprehensive Centralized Distributed Unit (CCDU) ​​system, the system comprising: a housing for a controller, the controller being operably coupled to a processing unit of the CCDU, the controller being embedded on a single integrated board; The controller further comprises: an accelerator unit for accelerating a set of functions of the CCDU; a fronthaul network interface controller (NIC) (116), the fronthaul NIC communicatively coupled to a radio unit (RU) (108), and a backhaul NIC communicatively coupled to a backhaul network (112); and one or more network interfaces.

2. The system of claim 1 , wherein the fronthaul NIC (116) is configured with an interface under the evolved Common Public Radio Interface (eCPRI) protocol with the radio unit (108).

3. 3. The system of claim 2, wherein the fronthaul NIC further comprises an internal synchronization block for performing any one or a combination of enhanced Common Public Radio Interface (eCPRI) and ORAN functions.

4. The system of claim 1 , wherein the backhaul NIC (114) provides connectivity to an configured optical Ethernet.

5. The system of claim 4 , wherein the backhaul NIC (114) further comprises a synchronization block for recovering a clock signal from the backhaul network (112).

6. The system of claim 1 , wherein the accelerator unit further comprises a soft-decision forward error correction (SD-FEC) module (116).

7. The system of claim 6, wherein the SD-FEC module (116) supports low density parity check (LDPC) decoding and encoding, and decoding of turbo codes.

8. 2. The system of claim 1, wherein at least eight dynamic random access memory integrated circuits or modules are embedded on said single integrated board and at least five 1 GB DDR4 are connected to said single integrated circuit.

9. The system of claim 1 , wherein the one or more connection interfaces are connected to the processing unit (118) via a platform controller hub (PCH) (320) associated with the single integrated board.

10. The system of claim 1 , wherein the controller is enabled by a local area network.

11. 1. A method performed by a network-enabled controller system for a Comprehensive Centralized Distributed Unit (CCDU) ​​system, comprising: performing any or a combination of enhanced Common Public Radio Interface (eCPRI) and ORAN functions; providing a connection to the configured optical Ethernet by a backhaul NIC (114); recovering a clock signal from a backhaul network (112) by a synchronization block implemented in said backhaul NIC (114); A soft-decision forward error correction (SD-FEC) module (116) implemented in the accelerator unit supports low-density parity check (LDPC) decoding and encoding, and turbo code decoding; The method comprising:

12. 1. A non-transitory computer-readable medium comprising processor-executable instructions, the processor-executable instructions causing a processor to: performing any or a combination of enhanced Common Public Radio Interface (eCPRI) and ORAN functions; Providing a connection to the configured optical Ethernet by the backhaul NIC (114); recovering a clock signal from the backhaul network (112) by a synchronization block implemented in said backhaul NIC (114); A soft-decision forward error correction (SD-FEC) module (116) implemented in the accelerator unit supports low-density parity check (LDPC) decoding and encoding, and turbo code decoding; The non-transitory computer-readable medium.