Systems and methods for explicit signaling of scaling factors for joint coding of motion vector differentials - Patents.com
The method addresses the challenge of efficient video coding by deriving motion vector differences for each reference frame based on scaling factors or distances within the coded video bitstream, achieving reduced bandwidth requirements and high video quality.
Patent Information
- Application Number
- JP2023559985
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-11-08
- Filing Date
- 2022-11-10
- Publication Date
- 2025-04-15
AI Technical Summary
Existing video coding techniques face challenges in efficiently encoding and decoding video streams while maintaining high quality, especially in scenarios where bandwidth is limited.
The proposed method involves receiving a coded video bitstream containing a current frame, two reference frames, and a joint motion vector difference (JMVD). It derives motion vector differences (MVDs) for each reference frame based on scaling factors or distances, and decodes the current block using these MVDs.
This approach enables efficient encoding and decoding by explicitly signaling scaling factors for joint coding of motion vector differences, thereby reducing bandwidth requirements while maintaining high video quality.
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Figure 2025510431000001_ABST
Abstract
Description
[Technical field]
[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims priority to U.S. Provisional Patent Application No. 63 / 328,062, filed April 6, 2022, and U.S. Patent Application No. 17 / 983,089, filed November 8, 2022, in the U.S. Patent and Trademark Office, the disclosures of which are incorporated herein by reference in their entireties.
[0002] [Technical field] FIELD This disclosure relates to advanced image and video coding techniques, and more particularly to systems and methods for explicit signaling of scaling factors for joint coding of motion vector differentials. [Background technology]
[0003] Streaming of audiovisual content is becoming increasingly popular. To facilitate the increased amount and improved quality of such streaming content, significant bandwidth is required. Thus, efficient encoding and decoding schemes are needed to stream content using less bandwidth while maintaining high quality. For example, H.265 / HEVC, VP9, and AOMedia Video 1 (AV1) are some of the encoding and decoding schemes developed for this purpose.
[0004] ITU-T VCEG (Q6 / 16) and ISO / IEC MPEG (JTC 1 / SC 29 / WG 11) published the H.265 / HEVC (High Efficiency Video Coding) standard in 2013 (version 1), 2014 (version 2), 2015 (version 3) and 2016 (version 4).
[0005] AOMedia Video 1 (AV1) is an open video coding format designed for video transmission over the Internet. It was developed as a successor to VP9 by AOMedia (Alliance for Open Media), a consortium founded in 2015 that includes semiconductor companies, video-on-demand providers, video content providers, software development companies, and web browser vendors. Many of the components of the AV1 project were sourced from previous research efforts by alliance members. Individual contributors started experimental technology platforms many years ago: Xiph / Mozilla's Daala, which had already released its code in 2010, Google's experimental V9 evolution project V10, announced on September 12, 2014, and Cisco's Thor, on August 11, 2015. Building on the VP9 code base, AV1 incorporates further techniques, some of which were developed in these experimental formats. The first version 0.1.0 of the AV1 reference codec was released on April 7, 2016. The Alliance announced the release of the AV1 Bitstream Specification, along with reference software-based encoders and decoders, on March 28, 2018. Validated version 1.0.0 of the specification was released on June 25, 2018. Validated version 1.0.0 with specification errata 1 was released on January 8, 2019. The AV1 Bitstream Specification includes reference video codecs.
[0006] Research and development into next-generation video codecs is also underway. For example, AOMedia has officially begun standardization of a next-generation video codec called VVC (Versatile Video Coding). Summary of the Invention
[0007] According to one aspect of the present disclosure, a method is provided that includes receiving a coded video bitstream including a current frame, a first reference frame and a second reference frame associated with a current block in the current frame, joint motion vector differentials (JMVDs) associated with the first reference frame and the second reference frame, and a flag indicating whether one or more scaling factors are used to derive the motion vector differentials (MVDs) from the JMVDs; deriving a first MVD associated with the first reference frame based on applying a first scaling factor among the one or more scaling factors to the JMVD or based on a distance between the first reference frame and the current frame; deriving a second MVD associated with the second reference frame based on applying a second scaling factor among the one or more scaling factors to the JMVD or based on a distance between the second reference frame and the current frame; and decoding the current block based on the first MVD and the second MVD.
[0008] According to other aspects of the present disclosure, an apparatus and computer readable medium consistent with the present methods are also provided. [Brief description of the drawings]
[0009] The above and other aspects, features, and advantages of particular embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings. [Figure 1] FIG. 2 illustrates components of one or more devices, according to various embodiments. [Diagram 2] 1 illustrates a method for explicit signaling of scaling factors for joint coding of motion vector differentials in accordance with various embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] VVC includes some improvements, such as the introduction of joint motion vector differential (JMVD) coding. This new inter-prediction coding mode, named JOINT_NEWMV, is applied to indicate whether the motion vector differential (MVD) for two reference lists is jointly signaled. When the inter-prediction mode is equal to the JOINT_NEWMV mode, the MVDs for reference list 0 and reference list 1 are jointly signaled, and only one MVD, named joint_mvd, is signaled and transmitted to the decoder, which derives the MVDs for reference list 0 and reference list 1 from joint_mvd. In general, the JOINT_NEWMV mode is signaled together with the NEAR_NEARMV, NEAR_NEWMV, NEW_NEARMV, NEW_NEWMV, and GLOBAL_GLOBALMV modes. No further context is added.
[0011] When JOINT_NEWMV mode is signaled and the Picture Order Count (POC) distance between two reference frames and the current frame is different, the MVD is scaled for reference list 0 or reference list 1 based on the POC distance. For example, if the distance (td0) between reference frame list 0 and the current frame is greater than or equal to the distance (td1) between reference frame list 1 and the current frame, then joint_mvd is used directly for reference list 0, and the MVD for reference list 1 is derived from joint_mvd based on equation (1):
number
[0012] Otherwise, if td1 is greater than or equal to td0, then joint_mvd is used directly for reference list 1, and the MVD for reference list 0 is derived from joint_mvd based on equation (2):
number
[0013] When the JMVD mode is selected for a block, the JMVD is signaled for two reference frames, and the MVDs for the two reference frames are derived from the JMVD based on the distance between the reference frames and the current frame. This assumes that there is a linear motion between the backward and forward reference frames with respect to the current frame. However, the motion between the two reference frames is not necessarily a linear motion. For example, the motion may be slower or faster from the backward reference frame to the forward reference frame.
[0014] According to one aspect of the present disclosure, a method is provided that includes receiving a coded video bitstream including a current frame, a first reference frame, a second reference frame, a joint motion vector differential (JMVD) associated with a current block of the current frame, and a flag signaling one or more scaling factors; deriving a first MVD associated with the first reference frame based on the one or more scaling factors or a distance between the first reference frame and the current frame; deriving a second MVD associated with the second reference frame based on the one or more scaling factors or the distance between the second reference frame and the current frame; and decoding the current block based on the first MVD and the second MVD.
[0015] In some embodiments, the signaling flag includes a pair of scaling factors for the first reference frame and the second reference frame.
[0016] In some embodiments, the one or more scaling factors are 2 n where n is an integer value.
[0017] In some embodiments, one or more scaling factors are limited to a value of m / M, where M=2 n where m and n are integer values.
[0018] In some embodiments, the one or more scaling factors is one scaling factor, and when the signaling flag indicates that the one scaling factor is not equal to a first default value, the one scaling factor is used to derive one of the first MVD and the second MVD, and the scaling factor used to derive the other of the first MVD and the second MVD is a second default value that is different from the first default value.
[0019] In some embodiments, the context for signaling one or more scaling factors is based on coding information of the current block or one or more neighboring blocks to the current block.
[0020] In some embodiments, the context is based on a block size of the current block, and when the block size of the current block is less than or equal to a first threshold size, the one or more scaling factors include a first set of scaling factors, and when the block size of the current block is greater than the first threshold size, the one or more scaling factors include a second set of scaling factors.
[0021] In some embodiments, the block size corresponds to one or more of a block width, a block height, the number of pixels in the current block, a minimum block width, a minimum block height, a maximum block width, and a maximum block height.
[0022] In some embodiments, the context is based on whether the motion vector prediction (MVP) for the current block is symmetric.
[0023] In some embodiments, the context is based on the index of a motion vector prediction (MVP) candidate for the current block.
[0024] In some embodiments, syntax is signaled in one of the sequence header, frame header, or slice header to indicate whether a signaling flag is included in the coded video bitstream.
[0025] In some embodiments, the first reference frame belongs to a list of backward reference frames and the second reference frame belongs to a list of forward reference frames, or the first reference frame belongs to a list of forward reference frames and the second reference frame belongs to a list of backward reference frames.
[0026] In some embodiments, the first MVD and / or the second MVD are:
number
number
[0027] In some embodiments, the first MVD and / or the second MVD are:
number
number
[0028] According to one aspect of the disclosure, an apparatus including a memory storing program code and at least one processor configured to execute the program code and to operate as instructed by the program code, the program code comprising: receiving code configured to cause at least one of the at least one processor to receive a coded video bitstream including a current frame, a first reference frame, a second reference frame, a JMVD associated with a current block of the current frame, and a flag signaling one or more scaling factors; and causing at least one of the at least one processor to receive a coded video bitstream including a current frame, a first reference frame, a second reference frame, a JMVD associated with a current block of the current frame, and a flag signaling one or more scaling factors. An apparatus is provided, the apparatus including: derivation code configured to cause at least one of the at least one processor to derive a first MVD associated with a first reference frame based on a plurality of scaling factors or a distance between the first reference frame and a current frame; derivation code configured to cause at least one of the at least one processor to derive a second MVD associated with a second reference frame based on one or more scaling factors or a distance between the second reference frame and the current frame; and decoding code configured to cause at least one of the at least one processor to decode a current block based on the first MVD and the second MVD.
[0029] In some embodiments, the one or more scaling factors is one scaling factor, and when the signaling flag indicates that the one scaling factor is not equal to a first default value, the one scaling factor is used to derive one of the first MVD and the second MVD, and the scaling factor used to derive the other of the first MVD and the second MVD is a second default value that is different from the first default value.
[0030] In some embodiments, the context for signaling one or more scaling factors is based on coding information of the current block or one or more neighboring blocks to the current block.
[0031] According to one aspect of the present disclosure, a non-transitory computer-readable medium is proposed that stores computer-readable program code, which, when executed by a processor, causes the processor to receive a coded video bitstream including at least a current frame, a first reference frame, a second reference frame, a JMVD associated with a current block of the current frame, and a flag signaling one or more scaling factors; derive a first MVD associated with the first reference frame based on the one or more scaling factors or a distance between the first reference frame and the current frame; derive a second MVD associated with the second reference frame based on the one or more scaling factors or a distance between the second reference frame and the current frame; and decode the current block based on the first MVD and the second MVD.
[0032] In some embodiments, the one or more scaling factors is one scaling factor, and when the signaling flag indicates that the one scaling factor is not equal to a first default value, the one scaling factor is used to derive one of the first MVD and the second MVD, and the scaling factor used to derive the other of the first MVD and the second MVD is a second default value that is different from the first default value.
[0033] In some embodiments, the context for signaling one or more scaling factors is based on coding information of the current block or one or more neighboring blocks to the current block.
[0034] The following detailed description of the exemplary embodiments refers to the accompanying drawings, in which the same reference numbers in different drawings may identify the same or similar elements.
[0035] The foregoing disclosure provides illustrations and descriptions, but is not intended to be exhaustive or to limit the implementation to the precise form disclosed. Modifications and variations are possible in light of the above disclosure or may be acquired from practice of the implementations. Moreover, one or more features or components of one embodiment may be incorporated in or combined with another embodiment (or one or more features of another embodiment). Additionally, in the flow diagrams and descriptions of the operations provided below, it is understood that one or more operations may be omitted, one or more operations may be added, one or more operations may be performed (at least partially) simultaneously, and one or more operations may be reordered.
[0036] It will be apparent that the systems and / or methods described herein may be implemented in different forms of hardware, firmware, or a combination of hardware and software. The actual dedicated control hardware or software code used to implement these systems and / or methods is not limiting of the implementation. Thus, the operation and behavior of the systems and / or methods have been described herein without reference to any specific software code. It should be understood that software and hardware may be designed to implement the systems and / or methods based on the description herein.
[0037] Although particular combinations of features are recited in the claims and / or disclosed herein, these combinations do not limit the disclosure of possible implementations. Indeed, many of these features may be combined in ways not specifically recited in the claims and / or disclosed herein. Although each dependent claim listed below may depend directly on only one claim, the disclosure of possible implementations includes each dependent claim in combination with all other claims in the claim set.
[0038] No element, act, or instruction used herein should be construed as critical or required unless expressly described as such. Also, as used herein, the articles "a" and "an" are intended to include one or more items and may be used synonymously with "one or more." When only one item is intended, the term "one" or similar language is used. Also, as used herein, terms such as "has," "have," "having," "include," "including," and the like are intended to be open-ended terms. Additionally, the phrase "based on" is intended to mean "based, at least in part, on," unless otherwise specified. Furthermore, phrases such as "at least one of [A] and [B]" or "at least one of [A] or [B]" should be understood as including A only, B only, or both A and B.
[0039] As explained above, when the JMVD mode is selected for a block, the JMVD is signaled for two reference frames, and the MVDs for the two reference frames are derived from the JMVD based on the distance between the reference frames and the current frame. This assumes that there is a linear motion between the backward and forward reference frames with respect to the current frame. However, the motion between the two reference frames is not necessarily a linear motion. For example, the motion may be slower or faster from the backward reference frame to the forward reference frame.
[0040] Various embodiments according to the present disclosure provide a system and method for template matching based scaling factor derivation for joint coding of motion vector differentials (JMVDs). When a JMVD mode is selected for a current block, a template region is defined for the current block and its predictive block in a reference frame list corresponding to each motion vector differential (MVD). The template may be used to derive a predicted scaling factor for the MVD before it is used to fetch the predictive block.
[0041] 1 is a diagram illustrating components of one or more devices according to various embodiments. With reference to FIG. 1, device 100 may include a bus 110, one or more processor(s) 120, a memory 130, a storage component 140, and a communication interface 150. It is understood that one or more of the components may be omitted and / or one or more additional components may be included.
[0042] Bus 110 includes components that enable communication between components of device 100. Processor 120 may be implemented in hardware, firmware, or a combination of hardware and software. Processor 120 may be a central processing unit (CPU), a graphics processing unit (GPU), an accelerated processing unit (APU), a microprocessor, a microcontroller, a digital signal processor (DSP), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a sparse tensor core, or another type of processing component. Processor 120 may include one or more processors. For example, processor 120 may include one or more CPUs, APUs, FPGAs, ASICs, sparse tensor cores, or another type of processing component. One or more processors of processor 120 may be capable of being programmed to perform functions.
[0043] Memory 130 may include random access memory (RAM), read-only memory (ROM), and / or another type of dynamic or static storage device (e.g., flash memory, magnetic memory, and / or optical memory) that stores information and / or instructions for use by processor 120.
[0044] Storage component 140 stores information and / or software related to the operation and use of device 100. For example, storage component 140 may include a hard disk (e.g., a magnetic disk, optical disk, magneto-optical disk, and / or solid-state disk), a compact disk (CD), a digital versatile disk (DVD), a floppy disk, a cartridge, a magnetic tape, and / or another type of non-transitory computer-readable medium with a corresponding drive.
[0045] Communications interface 150 includes transceiver-like components (e.g., a transceiver and / or a separate receiver and transmitter) that enable device 100 to communicate with other devices, such as via a wired connection, a wireless connection, or a combination of wired and wireless connections. Communications interface 150 may enable device 100 to receive information from another device and / or provide information to another device. For example, communications interface 150 may include an Ethernet interface, an optical interface, a coaxial interface, an infrared interface, a radio frequency (RF) interface, a universal serial bus (USB) interface, a Wi-Fi interface, a cellular network interface, etc.
[0046] The device 100 may perform one or more processes or functions described herein. The device 100 may perform operations based on the processor 120 executing software instructions stored by a non-transitory computer-readable medium, such as the memory 130 and / or the storage component 140. A computer-readable medium is defined herein as a non-transitory memory device. A memory device includes a memory space within a single physical storage device or a memory space distributed across multiple physical storage devices.
[0047] The software instructions may be loaded into the memory 130 and / or storage component 140 from another computer-readable medium or from another device via the communications interface 150. When executed, the software instructions stored in the memory 130 and / or storage component 140 may cause the processor 120 to perform one or more processes described herein.
[0048] Additionally or alternatively, hardwired circuitry may be used in place of, or in combination with, software instructions to perform one or more processes described herein. Thus, the embodiments described herein are not limited to any specific combination of hardware circuitry and software.
[0049] The number and arrangement of components shown in Figure 1 are provided as an example. In practice, device 100 may include additional, fewer, different, or differently arranged components in light of those shown in Figure 1. Additionally or alternatively, a set of components (e.g., one or more components) of device 100 may perform one or more functions described as being performed by another set of components of device 100.
[0050] Any one of the operations or processes described below (eg, FIGS. 2-3) may be implemented by or using any one of the elements shown in FIG.
[0051] FIG. 2 illustrates a method 200 for explicit signaling of scaling factors for joint coding of motion vector differentials, in accordance with various embodiments.
[0052] At 201, the method 200 includes receiving a coded video bitstream including a current frame, a first reference frame and a second reference frame associated with a current block in the current frame, joint motion vector differentials (JMVDs) associated with the first reference frame and the second reference frame, and a flag indicating whether one or more scaling factors are used to derive the motion vector differentials (MVDs) from the JMVDs.
[0053] In some embodiments, the first reference frame may belong to a list of backward reference frames and the second reference frame may belong to a list of forward reference frames. In some embodiments, the first reference frame may belong to a list of forward reference frames and the second reference frame may belong to a list of backward reference frames.
[0054] In some embodiments, the signaling flag includes a pair of scaling factors for the first reference frame and the second reference frame.
[0055] In some embodiments, the one or more scaling factors are 2 n where n is an integer value.
[0056] In some embodiments, one or more scaling factors are limited to a value of m / M, where M=2 n where m and n are integer values.
[0057] In some embodiments, the context for signaling the one or more scaling factors is based on coding information of the current block or one or more neighboring blocks to the current block. The context may be based on a block size of the current block, where the one or more scaling factors include a first set of scaling factors when the block size of the current block is less than or equal to a first threshold size, and the one or more scaling factors include a second set of scaling factors when the block size of the current block is greater than the first threshold size. The block size may correspond to one or more of a block width, a block height, a number of pixels in the current block, a minimum block width, a minimum block height, a maximum block width, and a maximum block height. In some embodiments, the context is based on whether a motion vector prediction (MVP) for the current block is symmetric. In some embodiments, the context is based on an index of a motion vector prediction (MVP) candidate for the current block.
[0058] In some implementations, syntax is signaled in one of the sequence header, frame header, or slice header to indicate whether a signaling flag is included in the coded video bitstream.
[0059] At 202, the method 200 includes deriving a first MVD associated with the first reference frame. For example, the device 100 may derive the first MVD associated with the first reference frame based on applying a first scaling factor in the one or more scaling factors to the JMVD or based on a distance between the first reference frame and the current frame. In some embodiments, the one or more scaling factors are one scaling factor, and when the device 100 determines that the signaling flag indicates that the one scaling factor is not equal to a first default value, the device 100 uses the one scaling factor to derive one of the first MVD and the second MVD, and the device 100 uses a second default value different from the first default value to derive the other of the first MVD and the second MVD.
[0060] In some embodiments, the first MVD is:
number
number
[0061] In some embodiments, the first MVD and / or the second MVD are:
number
number
[0062] At 203, the method 200 includes deriving a second MVD associated with the second reference frame. For example, the device 100 may derive the second MVD associated with the second reference frame based on applying a second scaling factor in the one or more scaling factors to the JMVD or based on a distance between the second reference frame and the current frame.
[0063] In some embodiments, the second MVD is when td1 is greater than td0:
number
number
[0064] At 204, the method 200 includes decoding the current frame based on the first MVD and the second MVD. For example, the device 100 may decode the current block based on the first MVD and the second MVD.
[0065] In some embodiments, the first MVD and / or the second MVD are:
number
number
[0066] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementation to the precise form disclosed. Modifications and variations are possible in light of the above disclosure or may be acquired from practice of the implementations.
[0067] Some embodiments may relate to a system, method, and / or computer-readable medium at any possible level of technical detail integration. Furthermore, one or more of the above components described above may be implemented as instructions stored on a computer-readable medium and executable by at least one processor (and / or may include at least one processor). The computer-readable medium may include a computer-readable non-transitory storage medium (or media) having computer-readable program instructions for causing the processor to perform operations.
[0068] A computer-readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the above. A non-exhaustive list of more specific examples of computer-readable storage media includes portable computer diskettes, hard disks, random access memories (RAMs), read-only memories (ROMs), erasable programmable read-only memories (EPROMs or flash memories), static random access memories (SRAMs), portable compact disk read-only memories (CD-ROMs), digital versatile disks (DVDs), memory sticks, floppy disks, mechanically encoded devices such as punch cards or raised structures in grooves with instructions recorded therein, and any suitable combination of the above. As used herein, a computer-readable storage medium should not be construed as being a transitory signal per se, such as electric waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses passing through a fiber optic cable), or electrical signals transmitted through wires.
[0069] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to the respective computing / processing device or to an external computer or storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical transmission fiber, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in the respective computing / processing device.
[0070] The computer readable program code / instructions for performing the operations may be either source code or object code written in any combination of one or more programming languages, including assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or object oriented programming languages such as Smalltalk, C++, and procedural programming languages such as the "C" programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or wide area network (WAN), or a connection may be made to an external computer (e.g., via the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may execute computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuitry to perform an aspect or operation.
[0071] These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to generate a machine, such that when the instructions are executed via the processor of the computer or other programmable data processing apparatus, it creates means for implementing the functions / acts specified in one or more blocks of the flow diagrams and / or block diagrams. These computer-readable program instructions may also be stored on a computer-readable storage medium that may direct a computer, programmable data processing apparatus, and / or other device to function in a particular manner, such that the computer-readable storage medium on which the instructions are stored may constitute an article of manufacture including instructions that implement aspects of the functions / acts specified in one or more blocks of the flow diagrams and / or block diagrams.
[0072] Computer-readable program instructions may also be loaded into a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be executed on the computer, other programmable data apparatus, or other device, such that the instructions executing on the computer, other programmable data apparatus, or other device implement the functions / acts specified in one or more blocks of the flow diagrams and / or block diagrams.
[0073] The flow diagrams and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer-readable media according to various embodiments. In this regard, each block in a flow diagram or block diagram may represent a module, segment, or portion of instructions, including one or more executable instructions for implementing a specified logical function(s). The method, computer system, and computer-readable media may include additional, fewer, different, or differently arranged blocks relative to those shown in the figures. In some alternative implementations, the functions described in the blocks may occur in a different order than that described in the figures. For example, two blocks shown in succession may in fact be executed simultaneously or substantially simultaneously, or the blocks may sometimes be executed in the reverse order depending on the functionality involved. It should also be noted that each block of the block diagrams and / or flow diagrams, as well as combinations of blocks in the block diagrams and / or flow diagrams, may be implemented by a dedicated hardware-based system that executes the specified functions or operations or executes a combination of dedicated hardware and computer instructions.
[0074] It will be apparent that the systems and / or methods described herein may be implemented in different forms of hardware, firmware, or a combination of hardware and software. The actual dedicated control hardware or software code used to implement these systems and / or methods is not intended to limit the implementation. Thus, the operation and behavior of the systems and / or methods are described herein without reference to specific software code, and it should be understood that software and hardware may be designed to implement the systems and / or methods based on the description herein.
Claims
1. 1. A method comprising: receiving a coded video bitstream including a current frame, a first reference frame and a second reference frame associated with a current block in the current frame, joint motion vector differentials (JMVDs) associated with the first reference frame and the second reference frame, and a flag indicating whether one or more scaling factors are used to derive motion vector differentials (MVDs) from the JMVDs; deriving a first MVD associated with the first reference frame based on applying a first scaling factor in the one or more scaling factors to the JMVD or based on a distance between the first reference frame and the current frame; deriving a second MVD associated with the second reference frame based on applying a second scaling factor in the one or more scaling factors to the JMVD or based on a distance between the second reference frame and the current frame; decoding the current block based on the first MVD and the second MVD; The method includes:
2. The method of claim 1 , wherein the flags include a pair of scaling factors for the first and second reference frames.
3. The one or more scaling factors are: n 2. The method of claim 1, wherein n is an integer value.
4. The one or more scaling factors are limited to values of m / M, where M=2 n 2. The method of claim 1 , wherein m and n are integer values.
5. 2. The method of claim 1, wherein the one or more scaling factors is a single scaling factor, and when the flag indicates that the single scaling factor is not equal to a first default value, the single scaling factor is used to derive one of the first MVD and the second MVD, and a scaling factor used to derive the other of the first MVD and the second MVD is a second default value different from the first default value.
6. The method of claim 1 , wherein a context for signaling the one or more scaling factors is based on coding information of the current block or one or more neighboring blocks to the current block.
7. 7. The method of claim 6, wherein the context is based on a block size of the current block, and wherein the one or more scaling factors include a first set of scaling factors when the block size of the current block is less than or equal to a first threshold size, and wherein the one or more scaling factors include a second set of scaling factors when the block size of the current block is greater than the first threshold size.
8. The method of claim 7 , wherein the block size corresponds to one or more of a block width, a block height, a number of pixels in a current block, a minimum block width, a minimum block height, a maximum block width, and a maximum block height.
9. The method of claim 6 , wherein the context is based on whether a motion vector prediction (MVP) for the current block is symmetric.
10. The method of claim 6 , wherein the context is based on an index of a motion vector prediction (MVP) candidate for the current block.
11. 2. The method of claim 1, wherein syntax is signaled in one of a sequence header, a frame header, or a slice header to indicate whether the flag is included in the coded video bitstream.
12. 2. The method of claim 1, wherein the first reference frame belongs to a list of backward reference frames and the second reference frame belongs to a list of forward reference frames, or the first reference frame belongs to a list of forward reference frames and the second reference frame belongs to a list of backward reference frames.
13. The first MVD and / or the second MVD, when td1 is greater than td0, [0010] When td0 is greater than td1, [0025] It is derived according to where td0 corresponds to the distance between the first reference frame and the current frame, and td1 corresponds to the distance between the second reference frame and the current frame. The method of claim 1.
14. The first MVD and / or the second MVD, when td1 is greater than td0, [0030] When td0 is greater than td1, [0045] It is derived according to Here, td0 corresponds to the distance between the current frame and the first reference frame, td1 corresponds to the distance between the current frame and the second reference frame, and M is 2 n where n is an integer. The method of claim 1.
15. An apparatus comprising: A memory for storing program code; at least one processor configured to execute said program code and to act as instructed by said program code; wherein the program code comprises:
15. Apparatus comprising code configured to perform the method of any one of claims 1 to 14.
16. A computer program causing a computer to carry out the method according to any one of claims 1 to 14.
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