Molybdenum accumulation and void-free filling

The use of molybdenum halides and hydrogen plasma for selective deposition addresses the challenges of uniform filling in semiconductor features, achieving void-free and seam-free molybdenum deposition in complex structures like 3D NAND, enhancing conductivity.

JP2025515282A5Pending Publication Date: 2026-04-22LAM RES CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
LAM RES CORP
Filing Date
2023-04-18
Publication Date
2026-04-22

AI Technical Summary

Technical Problem

The deposition of thin tungsten films in semiconductor fabrication is challenging due to high resistivity and deterioration of TiN barrier properties, especially in complex high aspect ratio structures like 3D NAND, making it difficult to achieve uniform filling without voids or seams.

Method used

A method involving surface treatment with molybdenum halides and hydrogen-containing plasma to selectively deposit molybdenum within features, inhibiting growth on dielectric sidewalls and promoting bottom-up deposition, which includes preferential processing of liner layers on upper portions of sidewalls.

Benefits of technology

Enables void-free and seam-free filling of semiconductor features with molybdenum, improving conductivity and reducing resistivity, particularly in complex structures such as 3D NAND, by ensuring selective deposition on metal-containing contacts.

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Abstract

Provided herein is a method of filling a feature with molybdenum (Mo), which may be used in logic and memory applications. The method includes treating a surface of the feature prior to filling the feature. In some embodiments, the method includes treating the surface of the feature by exposing it to a molybdenum halide. In some embodiments, the method includes treating the surface of the feature by selectively oxidizing, nitriding, or halogenating it. An apparatus for carrying out the method is provided.
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Description

[Background technology]

[0001] [References] A PCT application is filed concurrently with this Application as part of this Application. Each application identified in the concurrently filed PCT application, for which this Application claims interest or priority, is incorporated herein by reference in its entirety for all purposes.

[0002] The deposition of conductive materials is an essential element in many semiconductor fabrication processes. These materials can be used for horizontal interconnects, vias between adjacent metal layers, contacts between metal layers and devices, and lines in memory devices. In one example of deposition, a tungsten (W) layer can be deposited on a titanium nitride (TiN) barrier layer, forming a TiN / W bilayer using a CVD process with tungsten hexafluoride (WF6). However, with the miniaturization of devices in the industry and the use of more complex patterning schemes, the deposition of thin tungsten films is becoming difficult. As feature size and film thickness continue to shrink, various challenges arise in stacking TiN / W films. These challenges include the high resistivity of thinner films and the deterioration of TiN barrier properties. Deposition is particularly difficult within complex high aspect ratio structures such as 3D NAND structures.

[0003] The background information provided herein is intended to provide a general overview of the contents of this disclosure. Any research by the inventors named in this background information section, as well as any descriptions that are not otherwise considered prior art at the time of filing, whether express or implied, shall not be recognized as prior art to this disclosure. [Overview of the project]

[0004] This specification provides a method for filling features with molybdenum (Mo), which may be used in logic and memory applications.

[0005] In some embodiments, the method includes treating the surface of a feature by exposing it to molybdenum halide prior to filling the feature.

[0006] One aspect of the present disclosure relates to a method. The method comprises providing a substrate having a feature having a metal-containing contact and a dielectric sidewall, treating the feature by exposing it to molybdenum halide, and depositing the molybdenum within the feature, wherein the deposition is selective for the metal-containing contact with respect to the dielectric sidewall.

[0007] In some embodiments, the method further includes exposing the feature to a hydrogen-containing plasma prior to processing the feature. In some embodiments, selectively depositing molybdenum on a metal-containing base includes exposing the feature to molybdenum oxyhalides. In some embodiments, the treatment inhibits the growth of molybdenum on oxide or nitride sidewalls. In some embodiments, the treatment is carried out without depositing molybdenum within the feature. In some embodiments, the treatment further includes forming molybdenum by exposing the feature to a co-reducible product of molybdenum halide.

[0008] In some embodiments, an amorphous molybdenum-containing layer is located on a metal-containing contact. In some embodiments, the process removes the amorphous molybdenum-containing layer. In some embodiments, the process inhibits molybdenum growth on the dielectric sidewall. In some embodiments, the method further includes removing etching residue from the metal-containing contact prior to processing the feature.

[0009] In some embodiments, the molybdenum halide is molybdenum pentachloride (MoCl5). In some embodiments, selective deposition is carried out at a substrate temperature of 250°C to 550°C, for example, 300°C to 500°C.

[0010] Another aspect of the present disclosure relates to a molybdenum-on-molybdenum lamination scheme. In some embodiments, the method provides a substrate comprising a feature having dielectric sidewalls and molybdenum contacts. 、 The method involves having an amorphous molybdenum-containing layer on the surface of the molybdenum contact, removing the amorphous molybdenum-containing layer and suppressing molybdenum deposition on the dielectric sidewall by exposing the feature to molybdenum halogenate, and depositing molybdenum within the feature, wherein the deposition is selective to the molybdenum contact with respect to the dielectric sidewall. In some embodiments, the molybdenum halogenate is molybdenum pentachloride (MoCl5). In some embodiments, depositing molybdenum within the feature involves exposing the feature to molybdenum oxyhalogenate.

[0011] A bottom-up filling method for features on a semiconductor substrate with molybdenum (Mo) involves selectively processing conformal liner layers within the features. Some liner layers on the upper portion of the field region and / or feature sidewalls are preferentially processed compared to liner layers on the lower portion of the sidewalls. Molybdenum is selectively deposited on unprocessed or lightly processed areas.

[0012] One aspect of the present disclosure relates to a method. The method comprises (a) providing a substrate including a field region and a feature, the feature including an opening, a sidewall and a bottom, the field region surrounding the opening and a liner layer lining the sidewall of the feature; (b) selectively processing a liner layer such that a portion of the liner layer on the upper portion of the field region and / or the sidewall is preferentially processed over the liner layer on the lower portion of the sidewall, the selective processing of the liner layer comprising forming a selectively processed portion of the liner layer; and (c) selectively depositing molybdenum on the bottom of the feature, wherein deposition on the selectively processed portion of the liner layer is suppressed.

[0013] In some embodiments, the liner layer is titanium nitride or tungsten nitride. In some embodiments, (a) includes depositing the liner layer within the feature. In some embodiments, the liner layer is a tungsten-containing layer or a molybdenum-containing layer. In some such embodiments, the liner layer is a tungsten layer or a molybdenum layer.

[0014] In some embodiments, (b) includes oxidation of the liner layer on the upper portion of the field region and / or sidewall. In some embodiments, (b) includes nitriding of the liner layer on the upper portion of the field region and / or sidewall. In some embodiments, (b) includes exposure of the substrate to an ion beam plasma. In some such embodiments, (b) further includes rotating and tilting the substrate during exposure to the ion beam plasma.

[0015] Another aspect of the present disclosure relates to a method. The method comprises (a) providing a substrate including a field region and a feature, the feature including an opening, a sidewall and a bottom, the field region surrounding the opening and a liner layer lining the sidewall of the feature; (b) forming a treated region of the liner layer by selectively processing the liner layer such that a portion of the liner layer on the upper portion of the field region and / or the sidewall is treated preferentially over the liner layer on the lower portion of the sidewall; (c) selectively etching the treated region of the liner layer, leaving the other portion which is the liner layer on the lower portion of the sidewall; and (d) selectively depositing molybdenum on the bottom of the feature.

[0016] In some embodiments, the liner layer is titanium nitride or tungsten nitride.

[0017] In some embodiments, (a) includes depositing a liner layer within the feature. In some embodiments, the liner layer is a tungsten-containing layer or a molybdenum-containing layer. In some such embodiments, the liner layer is a tungsten layer or a molybdenum layer. In some embodiments, (b) includes oxidation of the liner layer on the upper portion of the field region and / or sidewall. In some embodiments, (b) includes nitriding of the liner layer on the upper portion of the field region and / or sidewall. In some embodiments, (b) includes exposing the substrate to an ion beam plasma. In some such embodiments, (b) further includes rotating and tilting the substrate during exposure to the ion beam plasma.

[0018] Another aspect of the present disclosure relates to an apparatus. The apparatus comprises a vacuum transport module, a deposition module connected to the vacuum transport module, an ion beam etching module connected to the vacuum transport module, and a controller including machine-readable instructions. The machine-readable instructions are instructions for selectively processing the liner layers of features on the substrate such that a portion of the liner layers on the upper portion of the sidewalls of the field region and / or features are preferentially processed over the liner layers on the lower portion of the sidewalls by exposing the substrate to an ion beam plasma in the ion beam etching module, for transporting the substrate from the ion beam etching module to the deposition module via the vacuum transport module, and for depositing molybdenum in the features in the deposition module.

[0019] These and other aspects of the present disclosure will be further described below with reference to the drawings. [Brief explanation of the drawing]

[0020] [Figure 1A] Figure 1A shows schematic examples of material stacks containing a molybdenum layer according to various embodiments. [Figure 1B] Figure 1B shows schematic examples of material stacks containing a molybdenum layer according to various embodiments.

[0021] [Figure 2A] Figure 2A shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2B] Figure 2B shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2C] Figure 2C shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2D] Figure 2D shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2E] Figure 2E shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2F] Figure 2F shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2G] Figure 2G shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2H] Figure 2H shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2I] Figure 2I shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2J] Figure 2J shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2K] Figure 2K shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 2L] Figure 2L shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. [Figure 3] Figure 3 shows schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure.

[0022] [Figure 4] Figure 4 shows a schematic example of a molybdenum-on-molybdenum accumulation scheme.

[0023] [Figure 5] Figure 5 is a process flow diagram illustrating an exemplary operation for filling features with molybdenum.

[0024] [Figure 6A] Figure 6A shows a schematic example of a feature in which the process described in Figure 5 is in progress. [Figure 6B] Figure 6B shows a schematic example of a feature in which the process described in Figure 5 is in progress. [Figure 6C] Figure 6C shows a schematic example of a feature in which the process described in Figure 5 is in progress.

[0025] [Figure 7] Figure 7 shows examples of surface treatment sequences according to various embodiments.

[0026] [Figure 8] Figure 8 shows examples of sequences for surface treatment and selective deposition according to various embodiments.

[0027] [Figure 9] Figure 9 is a process flow diagram showing a method for filling features with a molybdenum (Mo) film.

[0028] [Figure 10A] Figure 10A shows features during various operations where features are filled with Mo. [Figure 10B] Figure 10B shows features during various operations where features are filled with Mo. [Figure 10C] Figure 10C shows features during various operations where features are filled with Mo.

[0029] [Figure 11]Figure 11 is a plot showing the film thickness after stacking atomic layer deposition (ALD) cycles for Mo deposition on both TiN and TiN oxide (TiON).

[0030] [Figure 12] Figure 12 is a process flow diagram showing a method for filling features with a Mo film.

[0031] [Figure 13A] Figure 13A shows a schematic example of the method described in Figure 12. [Figure 13B] Figure 13B shows a schematic example of the method described in Figure 12. [Figure 13C] Figure 13C shows a schematic example of the method described in Figure 12. [Figure 13D] Figure 13D shows a schematic example of the method described in Figure 12.

[0032] [Figure 14A] Figure 14A shows a schematic example of the method described in Figure 9. [Figure 14B] Figure 14B shows a schematic example of the method described in Figure 9. [Figure 14C] Figure 14C shows a schematic example of the method described in Figure 9. [Figure 14D] Figure 14D shows a schematic example of the method described in Figure 9.

[0033] [Figure 15] Figure 15 shows an example of an ion beam angle used to reach the depth of the sidewall.

[0034] [Figure 16] Figure 16 shows an example of a processing system that may be used to carry out the methods described herein. [Figure 17A] Figure 17A shows an example of a processing system that may be used to carry out the methods described herein. [Figure 17B] Figure 17B shows an example of a processing system that may be used to carry out the methods described herein. [Figure 18] Figure 18 shows an example of a processing system that may be used to carry out the methods described herein. [Figure 19] Figure 19 shows an example of a processing system that may be used to carry out the methods described herein. [Modes for carrying out the invention]

[0035] The following description provides numerous specific details to ensure a full understanding of the embodiments presented. The embodiments of the disclosure may be implemented without some or all of these specific details. In other instances, well-known process operations are not described in detail to avoid unnecessarily obscuring the embodiments of the disclosure. While the embodiments of the disclosure are described in conjunction with specific embodiments, it should be understood that they are not intended to be limited to the embodiments of the disclosure.

[0036] The subscripts "x" and "y" are used throughout this disclosure to indicate numbers greater than zero that form stable compounds. However, it should be noted that the absence of "x" or other subscripts (for example, in titanium nitride (TiN) or titanium oxynitride (TiON)) does not imply any particular atomic ratio.

[0037] This specification provides a method for filling features with molybdenum (Mo) which can be used in logic and memory applications. The Mo film may be deposited within semiconductor substrate features such as vias and trenches. The Mo film may be deposited to line the features as a liner layer and / or to fill the features.

[0038] In some embodiments, the method involves bottom-up deposition of Mo within a feature. Bottom-up deposition refers to growth starting almost entirely from the bottom of the feature relative to the sidewalls of the feature. Filling features using conventional deposition methods can result in nucleation and growth on all surfaces of the feature. This can lead to conformal growth and the formation of voids and / or seams within the feature. For example, voids may form because growth at the top of the feature can pinch off the feature. Seams may form in the center of the feature as the film grows inward from the sidewalls. Bottom-up deposition can avoid the formation of voids and seams within a feature during the filling process.

[0039] Although primarily described in the context of Mo, the method can be used for the deposition of other metals, including W, Co, and Ru. In some applications, molybdenum offers several advantages over other metals such as cobalt (Co), ruthenium (Ru), and tungsten (W): (i) the deposition of barrier-less and linerless molybdenum films is more suitable on oxides and nitrides than the deposition of cobalt, ruthenium, and tungsten; (ii) the resistivity scaling of Mo is better than that of tungsten; (iii) intermixing of Mo with the underlying Co is less likely than intermixing of Ru and Co at temperatures below 450°C; and (iv) the accumulation of Mo in the current W scheme is relatively easier compared to copper and ruthenium.

[0040] Figures 1A and 1B are schematic examples of material stacks including a Mo layer according to various embodiments. Figures 1A and 1B show the order of materials in an example of a particular stack and may be used with any suitable architecture and application, as further described below with respect to Figures 2A-2L, 3, 4, 6A-6C, 10A-10C, 13A-13D, and 14A-14D. Figure 1A shows a first material stack 111 characterized by a substrate 102 and a molybdenum layer 108 deposited thereon. The substrate 102 may be a silicon or other semiconductor wafer, e.g., a 200 mm wafer, a 300 mm wafer, or a 450 mm wafer, and may include a wafer on which one or more layers of materials such as dielectric materials, conductive materials, or semiconducting materials are deposited thereon. In some embodiments, the substrate 102 may be silicon (Si) or silicon germanium (SiGe), or may contain them. The method may also be applied to form a metallization stack structure on other substrates such as glass or plastic.

[0041] The stack 111 has a dielectric layer 104 on a substrate 102. The dielectric layer 104 may be directly deposited on the semiconductor surface of the substrate 102 (e.g., a Si or SiGe surface), or any number of intervening layers may be present. For example, the substrate 102 may include any number of layers deposited on the semiconductor surface in various arrangements.

[0042] Examples of dielectric layers include doped and undoped silicon oxide layers, silicon nitride layers, and aluminum oxide layers, with specific examples including doped or undoped layers of silicon nitride (SiN), silicon dioxide (SiO2), and aluminum oxide (Al2O3). Stack 111 has a layer 106 positioned between the molybdenum layer 108 and the dielectric layer 104. Layer 106 may be, for example, a diffusion barrier and / or adhesive layer. A diffusion barrier is a layer that prevents the diffusion of a species between layers. An adhesive layer is a layer that promotes the adhesion of a layer to a layer below. Examples of diffusion barriers and adhesive layers include titanium nitride (TiN), titanium / titanium nitride (Ti / TiN), tungsten (W), tungsten nitride (WN), and tungsten carbonitride (WCN). The molybdenum layer 108 is the main conductor of the structure. In some embodiments, the molybdenum layer 108 may include multiple bulk layers deposited in different conditions. The molybdenum layer 108 may or may not contain a molybdenum nucleation layer. In the example shown in Figure 1A, the molybdenum layer 108 is deposited directly on layer 106. In other embodiments (not shown), the molybdenum layer 108 may be deposited on another layer, such as a growth initiation layer containing another material, such as a tungsten (W) or W-containing growth initiation layer. The use of a growth initiation layer may promote nucleation and growth of the molybdenum layer 108.

[0043] Figure 1B shows another example of stack 121. In this example, stack 121 includes a substrate 102 and a dielectric layer 104, with a molybdenum layer 108 directly deposited on the dielectric layer 104, without an intervening diffusion barrier or adhesive layer. The molybdenum layer 108 is the same as described above with respect to Figure 1A. By using molybdenum as the main conductor, a thin film with low resistivity can be obtained. Examples of thin films with low resistivity include a film with a thickness of 60 angstroms and a resistivity of less than 40 uOhm-cm, and a film with a thickness of 200 angstroms and a resistivity of less than 15 uOhm-cm.

[0044] In some embodiments, the stack (not shown) may include a substrate, a conductive layer, and a molybdenum layer deposited on the conductive layer. As used herein, the conductive layer is at least 10°C at room temperature. 4 Ω -1 cm -1 This is a layer having conductivity. An example is molybdenum on a metal layer (e.g., a W layer, or another Mo layer). In these embodiments, there is no dielectric layer between the molybdenum layer and the conductive layer. Similarly, the stack may include molybdenum deposited directly on a metal compound layer. An example is molybdenum on a metal nitride layer (e.g., TiN, WN, or MoN). In several other embodiments of the stack (not shown), the stack may include a substrate and a molybdenum layer deposited directly on the substrate, which includes direct deposition on a semiconducting surface, a dielectric surface, or a conductive surface. Figures 1A and 1B show examples of material sequences in a particular stack, which may be used with any suitable architecture and application by examples further described below with respect to Figures 2A-2L, 3, 4, 6A-6C, 10A-10C, 13A-13D, and 14A-14D.

[0045] The methods described herein are carried out on a substrate that can be housed in a chamber. The substrate may be a silicon or other semiconductor wafer, and may include a wafer on which one or more layers of materials such as dielectric materials, conductive materials, or semiconducting materials are deposited thereon. The methods are not limited to semiconductor substrates and may be carried out to fill any features with molybdenum.

[0046] The substrate may have features such as vias or contact holes, which may be characterized by one or more narrow and / or reentrant openings, constrictions within the feature, and high aspect ratios. Features may be formed in one or more of the stacks described above, or in layers within the stack. For example, features may be formed at least partially within a dielectric layer. In some embodiments, features may have aspect ratios of at least about 2:1, at least about 4:1, at least about 6:1, at least about 10:1, at least about 25:1, or higher. An example of a feature is a hole or via in a semiconductor substrate or in a layer on the substrate.

[0047] Figure 2A shows a schematic example of a DRAM architecture, including a Mo-embedded word line (bWL) 208 in a silicon substrate 202. The MobWL is formed in an etched trench within the silicon substrate 202. A conformal barrier layer 206 and an insulating layer 204 line the trench. The conformal barrier layer 206 is positioned between the insulating layer 204 and the silicon substrate 202. In this example, the insulating layer 204 may be a gate oxide layer formed from a high-k dielectric material such as silicon oxide or silicon nitride. In some embodiments disclosed herein, the conformal barrier layer 206 is a TiN or tungsten-containing layer, such as a WN layer or WCN layer. In some embodiments, a conformal tungsten-containing growth initiation layer (not shown) may be present between the conformal barrier layer 206 and the molybdenum bWL 208. Alternatively, the molybdenum bWL 208 may be deposited directly on TiN or another diffusion barrier. In some embodiments, one or both of layers 204 and 206 may be omitted.

[0048] The bWL structure shown in Figure 2A is an example of an architecture including a molybdenum-filled layer. During the fabrication of the bWL, molybdenum is deposited within features that can be defined by etched depressions in the silicon substrate 202. Where layers 206 and / or 204 are present, the silicon substrate 202 is conformally lined by layers 206 and / or 204.

[0049] Figures 2B–2H are further schematic examples of various structures in which molybdenum may be deposited according to embodiments of the disclosure. Figure 2B shows an example of a cross-sectional view of a vertical feature 201 filled with Mo. The feature may include a feature hole 205 within a silicon substrate 202. The feature hole 205 may have an underlying layer 203 lining its sidewalls or interior, forming its internal surface. The feature hole 205 or other features may have dimensions near the opening, e.g., an opening diameter or line width between approximately 10 nm and 500 nm (e.g., between approximately 25 nm and 300 nm). The feature hole 205 may be referred to as an unfilled feature, or simply a feature. The vertical feature 201 and any feature may be partially characterized by an axis 218 extending through the length of the feature, with vertically oriented features having a vertical axis and horizontally oriented features having a horizontal axis. The underlying layer 203 may be, for example, a diffusion barrier layer, an adhesive layer, a nucleation layer, a combination thereof, or any other applicable material. Non-limiting examples of the underlying layer may include dielectric and conductive layers. Examples of dielectric materials include oxides such as SiO2 and Al2O3, nitrides such as SiN, carbides such as nitrogen-doped silicon carbide (NDC) and oxygen-doped silicon carbide (ODC), and low-k dielectrics such as carbon-doped SiO2. In certain implementation configurations, the underlying layer may be one or more of titanium, titanium nitride, tungsten nitride, titanium aluminide, tungsten, and molybdenum. In some embodiments, the underlying layer is tungsten-free. In some embodiments, the underlying layer is molybdenum-free.

[0050] In some embodiments, the feature is a word line feature within a 3D NAND structure. For example, the substrate may have a vertical channel with a depth of at least 200 Å and include a word line structure containing any number of word lines (e.g., 50 to 450). Examples of word line features are described further below. Another example of a feature is a trench within the substrate or within a layer. The feature may be of any depth. In various embodiments, the feature may have an underlying layer, such as a barrier layer or an adhesive layer. Non-limiting examples of underlying layers include dielectric and conductive layers, such as silicon oxides, silicon nitrides, silicon carbides, metal oxides, metal nitrides, metal carbides, and metal layers.

[0051] Figure 2C shows an example of a vertical feature 201 with a reentrant profile. A reentrant profile is a profile that narrows from the bottom, closed end, or interior of the feature towards the feature opening. Depending on the implementation, this profile may narrow gradually and / or include an overhang at the feature opening. Figure 2C shows the latter example, where the underlayer 213 lines the sidewall or interior surface of the feature hole 205. Similar to Figure 2B, the underlayer 213 may be a diffusion barrier layer, an adhesive layer, a nucleation layer, a combination thereof, or any other applicable material. Non-limiting examples of the underlayer may include dielectric and conductive layers. The underlayer 213 forms an overhang 215 such that the underlayer 213 is thicker near the opening of the vertical feature 201 than inside the vertical feature 201.

[0052] In some implementations, features may be filled with one or more constrictions within the feature. Figure 2D shows examples of various filled features with constrictions. Examples (a), (b), and (c) in Figure 2D each have a constriction 209 at the midpoint within the feature. The constriction 209 may be, for example, between approximately 15 nm and 20 nm in width. The constriction can cause pinch-off during molybdenum deposition within the feature using conventional techniques. The deposited metal prevents further deposition beyond the constriction before that part of the feature is filled, resulting in voids within the feature. Example (b) shows an overhang 215 (liner / barrier overhang) at the opening of the feature. hang This further includes (etc.). Such overhangs can also be potential pinch-off points. Example (c) has a constriction 212 that is further away from the field area than the overhang 215 of Example (b).

[0053] Horizontal features such as 3D memory structures can also be filled. Figure 2E shows an example of a horizontal feature 250 including a constriction 251. For example, the horizontal feature 250 may be a word line in a 3D NAND (also referred to as vertical NAND or VNAND) structure. In some implementations, the constriction may be due to the presence of pillars in the 3D NAND or other structures. Figure 2F shows a cross-sectional side view of a 3D NAND structure 210 (formed on a silicon substrate 202). The 3D NAND structure 210 has 3D NAND stacks (left 225 and right 226), a central vertical structure 230, and a plurality of stacked horizontal word line features 220 having openings 222 on the opposing side walls 240 of the central vertical structure 230. Note that Figure 2F shows two “stacks” of the presented 3D NAND structure 210, which together form a “trench-like” central vertical structure 230. However, in certain embodiments, there may be two or more such stacks arranged side by side and extending spatially parallel to one another, with the gaps between each adjacent pair of stacks forming a central vertical structure 230 as explicitly shown in Figure 2F. In this embodiment, the horizontal word line feature 220 is a 3D memory word line feature that is fluidly accessible from the central vertical structure 230 through an opening 222. Although not explicitly shown, the horizontal word line feature 220 present in both the 3D NAND stacks 225 and 226 shown in Figure 2F (i.e., the left 3D NAND stack 225 and the right 3D NAND stack 226) is also accessible from the opposite side of the stack (left and right ends, respectively) through similar vertical structures formed by further 3D NAND stacks (formed at the left and right ends, but not shown). Each of the 3D NAND stacks 225 and 226 contains a stack of word line features that is fluidly accessible from both sides of the 3D NAND stack through the central vertical structure 230. In the specific example schematically shown in Figure 2F, each 3D NAND stack contains six pairs of stacked word lines. However, a 3D NAND memory layout may have any number of vertically stacked word line pairs.

[0054] Word line features in a 3D NAND stack can be formed by depositing alternating stacks of silicon oxide and silicon nitride layers, and then selectively removing the nitride layers while leaving stacks of oxide layers with gaps in between. These gaps are the word line features. Any number of word lines can be stacked vertically within such a 3D NAND structure, provided that there are techniques available for formation and techniques available to successfully achieve (substantially) void-free filling of vertical features. Thus, for example, a VNAND stack may contain horizontal word line features between 2 and 512, horizontal word line features between 2 and 256, horizontal word line features between 8 and 128, or horizontal word line features between 16 and 64, and so on (the listed ranges are understood to include the endpoints described).

[0055] Figure 2G shows a cross-sectional top view of the same 3D NAND structure 210 as shown in the side view of Figure 2F. The cross section is cut through the horizontal cross section 260, indicated by the horizontal dashed line in Figure 2F. The cross section in Figure 2G shows several rows of pillars 255. Pillars 255 are, Figure 2FIn this example, the pillars are shown to extend vertically from the base of the substrate 202 to the top of the 3D NAND structure 210. In some embodiments, the pillars 255 are formed of polysilicon material and are structurally and functionally important to the 3D NAND structure 210. In some embodiments, such polysilicon pillars may function as gate electrodes of stacked memory cells formed within the pillars. The top view of Figure 2G shows that the pillars 255 form a constriction within the opening 222 relative to the word line feature 220. Fluid accessibility of the word line feature 220 from the central vertical structure 230 through the opening 222 (indicated by arrows in Figure 2G) is suppressed by the pillars 255. In some embodiments, the size of the horizontal gap between adjacent polysilicon pillars is between approximately 1 and 20 nm. This reduction in fluid accessibility makes uniform filling of the word line feature 220 by the material more difficult. The structure of the word line feature 220, as well as the challenges of uniformly filling the word line feature 220 with molybdenum material due to the presence of pillar 255, are further illustrated in Figures 2H, 2I, and 2J.

[0056] Figure 2H shows a vertical cross-section through a 3D NAND structure similar to that shown in Figure 2F. However, Figure 2H focuses on a pair of word line features 220 and schematically illustrates the filling process that causes the formation of voids 275 within the filled word line features 220. Figure 2I also schematically illustrates voids 275, but Figure 2I is shown by a horizontal cross-section through pillars 255, similar to the horizontal cross-section shown in Figure 2G. Figure 2J shows the accumulation of molybdenum material around pillars 255 that form a constriction. This accumulation causes a pinch-off of the opening 222, making further deposition of molybdenum material in the region of voids 275 impossible. As is evident from Figures 2H and 2I, void-free molybdenum filling relies on void-free molybdenum filling to move so that a sufficient amount of deposited precursor passes down the central vertical structure 230, through the opening 222, past the constricting pillar 255, and reaches the furthest word line feature 220, before the molybdenum deposits accumulated around pillar 255 cause a pinch-off of the opening 222, thereby preventing further precursor movement into the word line feature 220. Similarly, Figure 2J shows a single word line feature 220 in a cross-sectional view from above. Figure 2J also shows how the generally conformal deposition of molybdenum material begins to pinch off inside the word line feature 220 due to the fact that the significant width of pillar 255 acts to partially block, and / or narrow, and / or constrict the opening passage that would otherwise lead to the word line feature 220 (it should be noted that the example in Figure 2J is understandable as a 2D rendering of the 3D feature of the constricted structure of the pillar shown in Figure 2I, and therefore shows the constriction as seen in a plan view rather than a cross-sectional view).

[0057] Three-dimensional structures may require longer and / or more concentrated exposure to the precursor to enable filling of the deepest and bottommost regions. Three-dimensional structures can be particularly challenging when employing molybdenum halide precursors and / or molybdenum oxyhalide precursors, due to their etching tendencies, and longer, more concentrated exposure allows for more etching as part of the structure.

[0058] Figures 2K and 2L show an example of a DRAM bWL with an asymmetric trench structure. Some trench filling processes in a DRAM bWL can distort the trenches so that the final trench width and resistance Rs are significantly non-uniform. Figure 2K shows an unfilled feature 261 and a filled feature 265 that shows line bending after filling. In this example, the feature is a DRAM bWL with an asymmetric narrow trench structure. As shown, multiple features 283 are depicted on the substrate. The features 283 are spaced apart, and in some embodiments, adjacent features have a pitch between approximately 20 nm and 60 nm, or between approximately 20 nm and 40 nm. The pitch is defined as the distance from the central axis of one feature to the central axis of the adjacent feature. The unfilled feature 261 may be roughly V-shaped, as shown in feature 283, and has sloping sides where the width of the feature narrows from the top to the bottom of the feature. The feature widens from the bottom 273b to the top 273a. After several filling operations, linear bending may be observed within the filled feature 265. In some situations, cohesive forces between opposing surfaces of the trench cause the sides of the trench to pull towards each other, as indicated by arrow 267. This phenomenon is illustrated in Figure 2L and can be characterized as "zipping up" the feature. When feature 283 is filled, a greater force is applied from the central axis 299 of feature 283, resulting in linear bending. For example, molybdenum can be deposited on the sidewalls of feature 283. Thus, the molybdenum 284a and 284b deposited on the sidewalls of feature 283 are in close proximity and influence each other, in which case the molybdenum-molybdenum bond radius r is small. Therefore, cohesive interatomic forces are generated between the smooth growing surfaces of the molybdenum, causing the sidewalls to pull towards each other and resulting in linear bending.

[0059] Provided below is a method for filling features with molybdenum. The method described herein includes surface treatment and deposition treatment, which can be used to fill substrate features as described above. As described above, molybdenum offers several advantages compared to other metals. Examples of feature filling for horizontally oriented and vertically oriented features are described below. It should be noted that, at least in most cases, the examples are applicable to both horizontally oriented and vertically oriented features. Horizontally oriented features generally refer to features oriented so that their feature axes are parallel to the plane of the substrate surface. Vertically oriented features generally refer to features oriented so that their feature axes are perpendicular to the plane of the substrate surface.

[0060] A feature filling method, which includes exposing the features to molybdenum halogens prior to feature filling, is described with reference to Figures 3–8. As described, the molybdenum halogens can etch, deposit, and / or otherwise treat the material on the feature bottom and / or feature sidewalls.

[0061] In some embodiments, the feature is filled to contact the underlying metal by using a method. An example of such a feature is shown in Figure 3. 301 indicates an unfilled feature 312. The unfilled feature 312 is formed within the oxide layer 305 and filled with Mo to contact the underlying metal 303. The unfilled feature 312 is defined by a side wall surface 315 and a bottom surface 317.

[0062] According to various embodiments, the sidewall surface 315 and the bottom surface 317 may be made of the same material or different materials. In some embodiments, the oxide layer 305 may be exposed to form the sidewall surface 315. Similarly, the underlying metal 303 may be exposed to form the bottom surface 317. In some embodiments, the bottom surface 317 may become a metal oxide by oxidation of the surface. In some embodiments, a liner layer (not shown) may be formed on the sidewall and / or bottom of the feature to form the sidewall surface 315 and / or bottom surface 317. Examples of liner layers include TiN, WN, and WCN. In some embodiments, the liner layer may be a molybdenum-containing liner layer, such as a molybdenum nitride (MoN) layer.

[0063] In some embodiments, the sidewall surface 315 and the bottom surface 317 are different. In subsequent deposition processes, Mo may be deposited under conditions that preferentially nucleate on the bottom surface 317. This can promote bottom-up filling and prevent void formation.

[0064] Examples of underlying metals and / or bottom surfaces include TiN, titanium aluminum carbide (TiAlC), W, Co, Mo, Ru, Cu, nickel (Ni), iridium (Ir), rhodium (Rh), tantalum (Ta), and titanium (Ti) and tantalum nitride (TaN).

[0065] The methods described herein address various challenges that arise with feature size reduction. For example, void-free gap filling becomes more difficult in smaller features due to deeper features, reentrant profiles near feature openings, and / or insufficient growth selectivity between the metallic surface at the bottom of the feature and the dielectric surface of the sidewalls. Smaller features are more likely to cause pattern misalignment. An example of a misaligned feature is shown in 350, where the unfilled feature 312 is not centered on the underlying metal 303. As a result, the bottom surface 317 contains both metallic and dielectric material.

[0066] In some embodiments, the method may be used in a molybdenum-on-molybdenum integration scheme. An example of such an integration scheme is shown in Figure 4. Layer 401 includes a dielectric 402 and Mo 403. An etching stop layer (ESL) 404 is placed on top of layer 401. ESL 404 may be, for example, SiN. A dielectric layer 405 is deposited on top of ESL 404. The dielectric layer 405 is then patterned and etched until the etching stops at ESL 404 (not shown). ESL 404 is then removed from the feature 412 to form unfilled features 412.

[0067] During a preceding processing operation, a Mo-containing layer 410 may be formed on the surface of Mo403. The Mo-containing layer 410 is generally an amorphous layer. The Mo-containing layer 410 is relatively thin, for example, on the order of 0.5 nm to 3 nm. The Mo-containing layer 410 may contain various impurities such as oxygen, nitrogen, and / or other halogens. Surface oxidation can be removed by hydrogen (H2) plasma, but the Mo-containing layer 410 is generally resistant to H2 plasma. If left in the device, it may result in higher resistance at the interface between Mo403 and the subsequently deposited Mo film.

[0068] Aspects of this disclosure relate to surface treatments performed prior to the deposition of Mo within a feature. According to various embodiments, the surface treatment includes exposure to molybdenum halide. In some embodiments, the molybdenum halide is provided without co-reactants, and no deposition occurs. In some embodiments, the molybdenum halide is provided with co-reactants. A thin layer of Mo can be deposited.

[0069] In some embodiments, the feature includes a dielectric surface, such as a dielectric sidewall surface. Surface treatment inhibits growth on the dielectric surface and increases selectivity during subsequent deposition on the conductive surface. In some embodiments, the feature immediately after provision includes a Mo-containing layer as described above. Surface treatment removes this layer, creating a clean Mo surface for deposition and Mo-Mo interconnect formation.

[0070] Figure 5 is a process flow diagram illustrating an exemplary operation for filling a feature with molybdenum. The process begins with operation 501, which provides a feature having a dielectric sidewall and a metal-containing contact. The metal-containing contact may be at the bottom of the feature, and the dielectric sidewall extends from the feature opening to the metal-containing contact. The feature may be provided to a processing chamber. In some embodiments, one or more processing operations are performed within the processing chamber to fill the dielectric sidewall and the metal Contains Features having contacts may be formed.

[0071] Examples of dielectric sidewalls include silicon-containing layers such as oxides and nitrides. Examples of metal-containing contacts include metal and metal compound films. Metal-containing contacts are generally conductive and have a conductivity of at least 10°C at room temperature. 4 Ω -1 cm -1 It may have a conductivity of . Examples include TiN, TiAlC, W, Co, Mo, Ru, Cu, Ni, Rh, Ir, Ta, Ti, and TaN.

[0072] In some embodiments, a surface oxide is present on the metal-containing contact. Furthermore, in some embodiments, a layer containing other impurities is present on the metal-containing contact. One example is the amorphous Mo-containing layer described with reference to Figure 4.

[0073] In some embodiments, an etching operation to remove the liner layer from at least the sidewalls of the feature is performed prior to operation 501. For example, the feature may include a TiN liner layer conformally coating the bottom and sidewalls. The TiN layer may be removed from the sidewalls by etching, exposing the dielectric material. The sidewall surface then becomes silicon oxide or another dielectric material.

[0074] In operation 503, optional cleaning is performed. Operation 503 can remove, for example, surface oxides and / or etching residues. Examples of etching residues include fluorocarbons and hydrocarbon polymers. In some embodiments, operation 503 includes exposure to a reducing plasma, such as an H2 plasma. In some embodiments, operation 503 treats the dielectric sidewalls. For example, operation 503 may remove organic material from within the dielectric sidewalls and / or reduce oxygen. This can improve the selectivity of subsequent Mo growth on the metal-containing surface.

[0075] Operation 505 involves surface treatment, which includes exposure to a molybdenum halide gas. This is typically a plasma-free operation. Plasma-free refers to an operation performed without activating a plasma. As will be discussed further below, operation 505 may or may not include molybdenum deposition.

[0076] As described above with respect to Figure 4, in embodiments where an amorphous Mo-containing layer is present, operation 505 removes all or at least part of this layer. In the same or other embodiments, operation 505 suppresses nucleation on the dielectric sidewall surface. In some embodiments, operation 503 is performed after operation 505.

[0077] The process continues with the selective deposition of Mo on the metal-containing contact in operation 507. In some embodiments, this operation includes a reaction using a molybdenum halide precursor or a molybdenum oxyhalide precursor. The process may continue with the filling of the feature with Mo in operation 509. The same or different Mo precursors may be used in operations 507 and 509.

[0078] Figures 6A to 6C show schematic examples of feature 612 in which the process described in Figure 5 is underway. First, Figure 6A shows feature 612 at 650, which includes a metal-containing contact 603 and a dielectric sidewall 615. In this example, the metal-containing contact 603 is a molybdenum contact. Molybdenum is deposited within feature 612 in contact with the molybdenum contact. The amorphous molybdenum-containing interface layer 610 and the surface oxide 611 are shown. In this example, the surface of the dielectric sidewall 615 is silicon oxide. The etching stop layer (ESL) 604 is also shown.

[0079] 651 shows the feature after operation 503 has been performed. Surface oxide 611 is removed using H2 plasma. As described above, this operation also treats the dielectric sidewall 615 to improve the selectivity for subsequent Mo growth on the metal-containing contact 603.

[0080] Next, in Figure 6B, feature 612 is shown at 652, where the surface treatment described above is underway in relation to operation 505 in Figure 5. The amorphous Mo-containing interface layer 610 is removed. As indicated by the arrow, this treatment also affects the oxide surface and suppresses subsequent Mo nucleation.

[0081] Section 653 shows the features after selective deposition as described above with respect to operation 507 in Figure 5. Bottom-up, non-conformal filling is observed. Mo605 grows from the underlying metal-containing contact 603, while it does not grow from the sidewall surface, or grows very little. As a result, Mo605 is seam-free or void-free.

[0082] In Figure 6C, at 654, the features after the feature filling described above for operation 509 in Figure 5 is shown. The remaining filling may be bottom-up or conformal. The overbaden deposit of Mo607 is shown at 655.

[0083] According to various embodiments, the surface treatment as described above with respect to operation 505 of FIG. 5 includes exposure to molybdenum halide. In some embodiments, a molybdenum chloride compound is used. The molybdenum-containing compound is also referred to herein as a Mo-containing precursor or a Mo precursor. Molybdenum chloride is represented by the formula MoCl x where x is 2, 3, 4, 5, or 6, and includes molybdenum dichloride (MoCl2), molybdenum trichloride (MoCl3), molybdenum tetrachloride (MoCl4), molybdenum pentachloride (MoCl5), and molybdenum hexachloride (MoCl6). In some embodiments, MoCl5 or MoCl6 is used. Although the description mainly refers to MoCl x compounds, in other embodiments, other molybdenum halides may be used. The molybdenum halide precursor is represented by the formula MoX z where X is a halogen (fluorine (F), chlorine (Cl), bromine (Br), or iodine (I)), and z is 2, 3, 4, 5, or 6. Examples of MoX z precursors include molybdenum hexafluoride (MoF6). In some embodiments, by using a non-fluorine-containing MoX z precursor, fluorine etching or incorporation is prevented. In some embodiments, by using a non-bromine-containing MoX z precursor and / or a non-iodine-containing MoX z precursor, etching, or the incorporation of bromine or iodine is prevented.

[0084] In some embodiments, operation 505 includes exposing to a molybdenum halide compound without a co-reactant gas. In such embodiments, the precursor is delivered by being pulsed or by continuous input. FIG. 7 shows two examples of surface treatment sequences. First, MoCl5 is pulsed only N cycles with argon (Ar) or or other inert gas. Second, a continuous input of MoCl5 is delivered, followed by an Ar purge.

[0085] In some embodiments, operation 505 includes exposing a molybdenum halide compound with a co-reactant gas to deposit Mo. The co-reactant is generally H2, but other reducing agents, such as those described below, may be used. Figure 8 shows an example of a surface treatment sequence. In exemplary sequence 801, pulses of MoCl5 are alternated with pulses of H2, accompanied by pulses of an intervening purge gas. In exemplary sequence 802, pulses of MoCl5 are alternated with pulses of H2, without intervening pulses of a purge gas. In another exemplary sequence (not shown), pulses of MoCl5 are alternated with pulses of H2, accompanied by a pulse of a purge gas immediately following only one of the reactant gases in each cycle. In a third exemplary sequence 803, MoCl5 is flowed together with H2. In a further exemplary sequence 804, parallel flowing reactant gases are pulsed with alternating pulses of Ar. In another exemplary sequence 805, H2 gas may be flowed into the chamber, and the H2 gas may be continuously flowed into the chamber while MoCl5 is intermittently flowed into the chamber.

[0086] In Figures 7 and 8, other molybdenum halides and / or other inert gases may be used instead of MoCl5 and Ar, respectively.

[0087] In some embodiments, when a metal other than Mo is present at the bottom of the feature, a surface treatment as shown in Figure 8 (with co-reactants for Mo deposition) may be employed. In such embodiments, the subsequent growth of Mo can be promoted by forming a Mo surface layer. For example, when a W, Co, or Ru layer is present at the bottom of the feature, a thin Mo surface layer may be formed using a surface treatment as shown in Figure 8.

[0088] In an exemplary process, molybdenum chloride (MoO2Cl2) was used to deposit Mo on two treated surfaces. The two surfaces were a) silicon dioxide deposited with tetraethyl orthosilicate (TEOS oxide), and b) TiN. Deposition was carried out after the treatments described in the table below. The first treatment consisted of H2 plasma alone, the second treatment consisted of H2 plasma followed by molybdenum chloride treatment, and the third treatment consisted of H2 plasma followed by molybdenum chloride and hydrogen treatment. The table below shows the total thickness of deposited Mo in angstroms. [Table 1]

[0089] Both molybdenum halide surface treatments resulted in a significant delay in nucleation on silicon dioxide compared to TiN. Both surface treatments also increased deposition on Mo. Feature filling was also evaluated by performing deposition. In the absence of surface treatment (pre-washing only), voids were observed due to a lack of selectivity. Void-free gap filling was observed for both surface treatments.

[0090] Another aspect of the present disclosure relates to a method for filling features with metal, which includes selectively treating the feature sidewalls prior to deposition. These methods are described below with reference to Figures 9 to 15. The methods may be used in addition to or without the molybdenum halide treatment described above.

[0091] Figure 9 is a process flow diagram showing a method for filling features with a Mo film according to a specific embodiment. Examples of applications include middle-of-line (MOL) interconnects and back-end-of-line (BEOL) interconnects. In one example, the method may be used for filling source / drain contacts. Method 900 begins in operation 901 by providing a substrate containing features in which Mo is deposited. The substrate may be provided to a semiconductor processing tool.

[0092] Features may be trenches or vias formed within the dielectric layer. Examples of dielectric materials include oxides such as silicon oxide (SiO2) and aluminum oxide (Al2O3), nitrides such as silicon nitride (SiN), carbides such as nitrogen-doped silicon carbide (NDC) and oxygen-doped silicon carbide (ODC), and low-k dielectrics such as carbon-doped SiO2. Mo may be deposited within the feature to electrically connect to the underlying layer. Examples of underlying layers include metals, metal silicides, and semiconductors. Examples of metals include Co, Ru, Cu, W, Mo, nickel (Ni), iridium (Ir), rhodium (Rh), tantalum (Ta), and titanium (Ti). An example of a metal silicide is titanium silicide (TiSi x ), nickel silicide (NiSi x ), molybdenum silicide (MoSi x ), cobalt silicide (CoSi x ), Platinum silicide (PtSi x ), Ruthenium silicide (RuSi x ), and nickel-platinum silicide (NiPt y Si x Examples of semiconductors include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs), which may or may not be accompanied by semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb).

[0093] A feature generally has a sidewall having a sidewall surface and a bottom having a bottom surface. The sidewall may consist of one or more layers. The sidewall extends from the field region to the bottom. The feature bottom may extend from a first sidewall within the feature to a second sidewall within the feature and may consist of one or more layers. The sidewall surface is an exposed region on the sidewall and may change during wafer processing. For example, the sidewall surface may change from the first material to the second material after the second material is deposited on the sidewall. Similarly, the bottom surface is an exposed region on the bottom and may change during wafer processing. In some embodiments, the sidewall surface may be the same material as the bottom surface. For example, in some embodiments, the sidewall surface and bottom surface are TiN immediately after provisioning. In some embodiments, the material of the sidewall surface may be different from the material of the bottom surface. For example, the bottom surface may be a metal silicide, and the side wall surface may be silicon oxide such as SiO2.

[0094] Prior to the deposition of any Mo, a liner layer may line the unfilled feature and form the sidewall and / or bottom surface. In some embodiments, the liner layer lines the entire feature and forms the sidewall and bottom surface. In some other embodiments, the liner layer lines only a portion of the feature. For example, a TiN layer may line the sidewalls but leave the bottom surface unlined. In some embodiments, the liner layer is a diffusion barrier and / or adhesive layer. Examples of liner layer materials include metal nitrides (e.g., TiN or tantalum nitride (TaN) barrier layers) and metals (e.g., Ti adhesive layers).

[0095] In some embodiments, the bottom and sidewall surfaces are oxidized. Oxidation can occur by exposing the surface of the feature to air or other oxidizing conditions. For example, metal silicide (MSi x The surface (where M is a metal) oxidizes upon exposure to air, forming metal oxide silicide (MSi x O y ) may be. Other examples of oxidized surfaces include metal nitrides (MN). xO y ), silicon dioxide (SiO₂) x ), and silicon germanium oxide (SiGeO x ) are some examples.

[0096] In some embodiments, oxidation conditions occur incidentally during substrate processing or transport operations. In some embodiments, intentional oxidation is performed as described further below.

[0097] In some embodiments, the liner layer is a conformal metal layer, such as a conformal W layer or Mo layer. This will be explained further below.

[0098] In operation 902, the liner layer is selectively treated such that at least the upper part of the field region and / or sidewalls is treated, while the bottom surface is not treated or is treated to a lesser extent.

[0099] According to various embodiments, operation 902 may include selective oxidation or nitriding of the upper sidewalls of the field region and / or feature. In some embodiments, operation 902 also includes selective halogenation of the upper sidewalls of the field region and / or feature.

[0100] In some embodiments, operation 902 includes selective oxidation of the upper sidewalls of the field region and / or features. For example, the TiN layer may be oxidized to form titanium oxynitride (TiON). In another example, the Mo liner layer or W liner layer may be oxidized to form MoO x Layer or WO x It forms layers.

[0101] In some embodiments, operation 902 includes selective nitriding of the field region and / or the upper sidewalls of the feature. In one example, a MoN or WN layer is formed by processing a Mo liner layer or a W liner layer. Other examples of layers that can be formed include tungsten carbonitride (WCN) and molybdenum carbide (MoC).

[0102] In some embodiments, operation 902 includes selective halogenation of the field region and / or the upper sidewalls of the feature. In one example, by processing a Mo liner layer or a W liner layer, MoX y Layer or WX y Form a layer where X is any halogen and y is a number between 0 and 3 (including the endpoint). Another example is MoN z or WN z By processing MoN z X y Layer or WN z X y Form a layer where X is any halogen, y is a number between 0 and 3 (including the endpoint), and z is a number between 0 and 2 (including the endpoint). Another example is MoC z or WC z By processing MoC z X y Layer or WC z X y Form a layer where X is any halogen, y is a number between 0 and 3 (including the endpoint), and z is a number between 0 and 2 (including the endpoint). Another example is MoO z or WO z By processing MoO z X y or WO z X y The equation is formed such that X is any halogen, y is a number between 0 and 3 (including the endpoint), and z is a number between 0 and 2 (including the endpoint).

[0103] In some embodiments, operation 902 selectively suppresses subsequent deposition on the treated surface. In some embodiments, the treated liner layer is etched following operation 902. These approaches provide different deposition surfaces and facilitate selective deposition at the bottom of features and bottom-up filling.

[0104] Subsequently, in operation 903, the features are filled with Mo. The deposition of Mo is described further below.

[0105] Figure 10A shows an example of a feature filled with Mo in a particular embodiment. Feature 1001 having a titanium nitride (TiN) liner layer 1015 is shown. Feature 1001 has an underlying metal silicide (MSi x ) is formed within the dielectric material 1013 to connect to 1007. x This is connected to a semiconductor layer 1006, for example, silicon (Si) or silicon germanium (SiGe). This stack may be used in a transistor junction structure. MSi x One example of a layer is titanium silicide (TiSi x )

[0106] The TiN liner layer 1015 lines feature 1001. The TiN liner layer 1015 is TiSi in the trench contact for source / drain applications. x It is a diffusion barrier layer used on top of metal silicides such as MSi. One purpose of TiN layer 1015 is to provide a barrier layer on top of MSi. x The purpose is to prevent any potential reaction between the upper metal layer and the MSi. x Or to protect other layers from fluorine attacks. Yet another purpose is MSi x The purpose is to prevent oxidation in air or during subsequent processing. In the example in Figure 10A, the TiN layer 1015 is present on the feature sidewall 1011, the feature bottom 1005, and the field region 1017 of feature 1001.

[0107] The deposition of metals such as molybdenum within feature 1001 can lead to Mo nucleation across all areas. As the film grows, it can cause pinch-off at the top of the feature, hindering further diffusion of reactants within the feature and leading to void formation. This occurs within the feature as illustrated in Figure 10A, as well as in other features with uniform sidewalls and bottom surfaces.

[0108] Figure 10B shows feature 1001 after selective oxidation has formed a TiON layer 1015a on the field region 1017 and the upper sidewall portion 1011a. The TiN liner layer 1015 remains on the bottom surface 1005 and the lower sidewall portion 1011b. The oxygen concentration of the TiON layer may have a gradient that decreases with feature depth.

[0109] Figure 10C shows feature 1001 after Mo deposition. Nucleation of the Mo film is suppressed on the TiON layer 1015a. This allows Mo to grow from the bottom of the feature 1005, resulting in bottom-up deposition of bulk Mo 1023. Filling may be continued to completely fill feature 1001.

[0110] Figure 11 is a plot showing the film thickness after superimposing the number of ALD cycles for Mo deposition on both TiN and TiN oxide (TiON). As seen in Figure 11, Mo growth is inhibited on TiON. TiN is deposited by physical vapor deposition (PVD).

[0111] In some embodiments, a liner layer of a metal or metal-containing film, such as Mo, MoN, W, WCN, or WN, is conformally deposited within the feature prior to selective oxidation. This liner layer may be deposited on top of a TiN layer or other liner layer, if one exists, or it may be an initial liner layer within the feature. By selective oxidation, this liner layer is transformed into Figure 10B Similar to the TiON layer, a metal oxide layer is formed, followed by selective deposition at the bottom of the feature. An example is further explained below with respect to Figures 14A to 14D.

[0112] Figure 12 is a process flow diagram showing method 1200 for filling features with a Mo film. In operation 1211, a substrate containing features is provided. The features are filled with Mo. Operation 1211 may be similar to that described above with respect to operation 901 in Figure 9. In operation 1212, a conformal metal-containing liner layer is deposited within the features. In operation 1213, the field region and / or the upper portion of the sidewalls are processed. According to various embodiments, this may include oxidation and / or nitriding of the field region and / or the upper portion of the sidewalls. In operation 1214, the processed region is selectively etched. Operation 1214 may include exposure to a molybdenum halide compound as described further below. As a result, the conformal metal-containing layer is removed from the processed region. This allows the dielectric sidewalls to be exposed. Molybdenum is then deposited within the features as described above with respect to operation 903 in Figure 9.

[0113] Figures 13A to 13D show schematic examples of the method relating to Figure 12. Figure 13A shows a feature 1301 formed within a dielectric layer 1313. Feature 1301 includes a dielectric sidewall 1305 and a feature bottom 1304. A field region 1303 surrounds the feature opening. A conformal liner layer 1315 lines feature 1301, including the dielectric sidewall 1305 and the feature bottom 1304. In some embodiments, the conformal liner layer 1315 may be a diffusion barrier such as a TiN layer. The metal is deposited within feature 1301 in contact with a metal silicide layer 1308 in layer 1306. The metal silicide layer is, for example, titanium (TiSi x ) may be a layer. Layer 1306 may be a semiconductor layer such as a Si layer or a SiGe layer.

[0114] Figure 13B shows feature 1301 after depositing a conformal metal-containing liner layer 1317 within the feature. In the example in Figure 13B, the conformal metal-containing liner layer 1317 covers the conformal liner layer 1315.

[0115] Figure 13C shows feature 1301 after selectively treating the field region and upper sidewall of the metal-containing liner layer 1317 to form a treated conformal metal-containing liner layer 1317a on the field region and upper sidewall, and forming an untreated conformal metal-containing liner layer 1317 on the lower sidewall and feature bottom.

[0116] Figure 13D shows feature 1301 after etching has removed the conformal liner layer 1315 and the treated conformal metal-containing liner layer 1317a from the upper sidewall and field region. This operation exposes the dielectric sidewall 1305 of feature 1301, leaving the liner layer 1315 (e.g., a TiN layer) and the metal-containing liner layer 1317 (e.g., a Mo or W layer) on the feature bottom 1304 and lower sidewall.

[0117] Figures 14A to 14D show schematic examples of another method relating to Figure 9. Figures 14A to 14C are similar to Figures 13A to 13C and have a conformal metal-containing liner layer 1417 deposited on a conformal liner layer 1415. In Figure 14B, in some embodiments, layer 1417 may be a conformal Mo or W layer that can be deposited on a TiN layer or other diffusion barrier. Figure 14C shows, Figure 13C The following shows feature 1401 after the selective processing described above.

[0118] Figure 14D shows feature 1401 after metal deposition. Nucleation of the metal film is suppressed on the treated metal-containing liner layer 1417a. This allows the metal to grow from the bottom of the feature 1404, resulting in bottom-up deposition of bulk metal 1423. Filling may be continued to completely fill the feature.

[0119] In some embodiments, selective oxidation or nitridation of the field region and the upper portion of the features is achieved in an ion beam etching system with a mild oxygen or nitrogen ion impact. An example of an ion beam etching system is described below in Figure 19. In such a system, the angle of incidence of ions, and thus selective oxidation, may be controlled by appropriately tilting and rotating the substrate. Referring to Figure 15, an example of an ion beam angle reaching the depth of the sidewall is shown. By appropriately tilting and rotating the substrate, the ion beam can be directed to selectively oxidize or nitrid the sidewall and / or the field region.

[0120] The field region and upper sidewall of the patterned wafer can be selectively oxidized without removing any material. In the case of a TiN film, TiON may form in the field and (if necessary) the upper sidewall region, while the TiN remains unoxidized at the bottom of the feature. In the case of a conformal Mo, W, or other metal film deposited prior to the TiN film, MoO x WO x Or other metal oxides may form in the field region and, optionally, on the upper sidewalls, but Mo, W, or other metals remain unoxidized at the bottom of the feature.

[0121] The field region and upper sidewall of a patterned wafer can be selectively halogenated using a halogen gas source as described above. Examples of gases include chlorine (Cl2), bromine (Br2), iodine (I2), hydrogen bromide (HBr), and hydrogen iodide (HI). These may each be provided in mixtures with an inert gas (e.g., Ar) and / or H2, and examples of mixtures include Ar / Cl2, Ar / Br2, Ar / I2, Ar / HBr, Ar / HI, H2 / Cl2, H2 / Br2, H2 / I2, H2 / HBr, and H2 / HI. Halogenation passes the surface and inhibits deposition.

[0122] In some embodiments, the grown surface may be restored after etching or deposition. For example, the film may be dehalogenated, deoxidized, or denitrided after operation 902 in the drawings or operation 1214 in Figure 12. For example, to restore the original grown surface, the halogenated layer can be treated by exposure to H2 gas or plasma and / or etched. A variety of etching chemicals, including thermal and plasma O2, N2, Cl2, and molybdenum halides, can be used to restore the original grown surface. Alternatively, the original grown surface may be restored by using these techniques after selective oxidation or selective nitriding.

[0123] In one example, the process may include selective treatment of the film, followed by Mo deposition or etching, followed by restoration (e.g., dehalogenation), and then Mo deposition or etching.

[0124] In some embodiments, selective treatments (e.g., oxidation, nitriding, or halogenation) do not involve ion bombardment. For example, exposure to a plasma generated from a suitable source gas may be used. The plasma may be capacitively coupled or inductively coupled, depending on the various embodiments. The plasma may be generated remotely or in situ. Such exposure may be performed without tilting the substrate.

[0125] For example, low-power, biased oxygen, nitrogen, or halogen plasmas may be used in a high-pressure system without tilting the substrate. If the pressure is sufficiently high (above 2 Torr), the bottom of the features will remain untreated. In some embodiments, ion beam etching systems, as described with reference to Figure 19, provide better control over the depth of treatment. Selective nitriding may be performed by any of the above methods, but using a mild nitrogen plasma. Selective halogenation may be performed by any of the above methods, but using a mild halogen plasma.

[0126] In some embodiments, a selective treatment profile is tailored within a feature by tuning the ratio of H2 gas to the treatment gas (oxidizing gas, nitriding gas, or halogenating gas) during the plasma exposure operation. Plasma ions are more dominant at the field / upper sidewall, while H2 radicals are more dominant at the bottom, thus enabling selective treatment on the feature. Molybdenum deposits

[0127] In the methods described herein, molybdenum deposition may be carried out after the treatments described above with reference to Figures 4 to 15. The molybdenum deposition described herein involves reacting a Mo-containing precursor, also referred to as a molybdenum precursor. In some embodiments, the halide molybdenum compounds described above are used. In methods involving surface treatment using a halide molybdenum compound, the same or different compounds may be used for deposition.

[0128] In some embodiments, the Mo precursor is a molybdenum chloride precursor or MoCl x Molybdenum chloride (MoCl), also known as a precursor. x ) is a compound. For example, operations 507 and / or 509 in Figure 5, operation 903 in Figure 9, or operation 1215 in Figure 12 may use a molybdenum oxyhalide precursor. Molybdenum chloride precursor is MoCl x It is expressed by the formula, where x is 2, 3, 4, 5, or 6, and includes molybdenum dichloride (MoCl2), molybdenum trichloride (MoCl3), molybdenum tetrachloride (MoCl4), molybdenum pentachloride (MoCl5), and molybdenum hexachloride (MoCl6). In some embodiments, MoCl5 or MoCl6 is used. In the description, MoCl is the most common. x Although a precursor is mentioned, other molybdenum halide precursors may be used in other embodiments. The molybdenum halide precursor is MoX z It is expressed by the formula MoX, where X is a halogen (fluorine (F), chlorine (Cl), bromine (Br), or iodine (I)) and z is 2, 3, 4, 5, or 6. zExamples of precursors include molybdenum fluoride (MoF6). In some embodiments, non-fluorine-containing MoX z By using a precursor, etching or incorporation of fluorine is prevented. In some embodiments, non-bromine-containing MoX z Precursor and / or non-iodine-containing MoX z Using a precursor prevents etching or the incorporation of bromine or iodine.

[0129] In some embodiments, the features may be filled using a molybdenum oxyhalide precursor. For example, operations 507 and / or 509 in Figure 5, operation 903 in Figure 9, or operation 1215 in Figure 12 may use a molybdenum oxyhalide precursor. The molybdenum oxyhalide precursor is MoO y X z It is expressed by the formula, where X is a halogen (fluorine (F), chlorine (Cl), bromine (Br), or iodine (I)), and y and z are MoO y X z The value is greater than 0 so that it forms a stable compound. Examples of molybdenum oxyhalides include molybdenum dichloride (MoO2Cl2), molybdenum tetrachloride (MoOCl4), molybdenum tetrafluoride (MoOF4), molybdenum dibromide (MoO2Br2), and molybdenum iodide (MoO2I), and Mo4O 11 I is an example. It should be understood that the term molybdenum oxyhalide precursor as used herein may refer to a molybdenum oxyhalide precursor as described above, or a molybdenum-containing oxyhalide precursor containing molybdenum, oxygen, a halide, and one or more other elements. In some embodiments, the molybdenum oxyhalide or molybdenum-containing oxyhalide may contain several different halogens (e.g., F and Cl, and / or I, and / or Br). The feature is MoCl x Precursor, MoO y X z The material may be filled with molybdenum using a precursor, or a combination thereof.

[0130] For molybdenum to be deposited within the feature, the molybdenum precursor may react with a co-reactant. Examples of co-reactants include hydrogen (H2), silane (SiH4), diborane (B2H6), germane (GeH4), ammonia (NH3), and hydrazine (N2H4).

[0131] In some embodiments, a plasma-based process may be used for molybdenum deposition. Plasma species may be generated by supplying a gas to a remote plasma generator or an in situ plasma generator. Examples of gases that can be used to generate plasma include hydrogen-containing gases such as H2, nitrogen-containing gases such as nitrogen (N2), and other gases such as Ar and NH3. The plasma species may be inert or react with the molybdenum precursor to form a film.

[0132] Features may be filled with molybdenum using atomic layer deposition (ALD) or chemical vapor deposition (CVD). Thermal ALD or plasma-excited ALD (PEALD) may be used. Similarly, thermal or plasma-excited CVD (PECVD) may be used.

[0133] ALD is a surface-mediated deposition technique in which precursors and reactants are sequentially introduced into the deposition chamber. One or more cycles of sequential introduction of molybdenum precursors and reactants may be used to deposit Mo. For example, in the deposition of the initial molybdenum layer (e.g., operations 505 or 507 in Figure 5), MoCl5 may be used as the precursor and H2 as the reducing agent. The introduction of MoCl5 and H2 is sequentially introduced into the deposition chamber with a purge gas such as argon flowing in between. The substrate temperature and chamber pressure may be controlled for ALD. For example, the substrate may be heated between 200°C and 800°C, e.g., between 250°C and 550°C, or between 300°C and 500°C, or between 350°C and 450°C. In some embodiments, the chamber may be pressurized between 10 Torr and 200 Torr, e.g., between 50 Torr and 90 Torr. In some embodiments, the reaction rate may be controlled using temperature and / or pressure. In some embodiments, selectivity may be controlled using temperature and / or pressure.

[0134] In some embodiments, molybdenum filling may involve CVD. In the CVD process, both the molybdenum precursor and reactants are in the gas phase within the deposition chamber. Generally speaking, the CVD process fills features faster than the ALD process. In one example, the precursor may be molybdenum acid chloride such as MoO2Cl2, which is flowed into the chamber along with reactants such as H2. In this example, the wafer is simultaneously exposed to the precursor and reactants, causing them to react and fill features with Mo.

[0135] In some other embodiments, features may be filled using a pulsed CVD process. A pulsed CVD process involves continuously flowing the reactants into the chamber while pulses of the precursor are flowed into the chamber. For example, H2 gas may be continuously flowed into the chamber while a molybdenum-containing precursor is intermittently flowed into the chamber. The substrate temperature and the pressure inside the chamber can be controlled during the CVD operation.

[0136] Molybdenum may be selectively deposited within a feature using the method described herein. Selective deposition refers to preferential deposition on a first material over a second material. Molybdenum deposition and growth may be easier on metallic materials compared to molybdenum deposition and growth on dielectric materials. For example, a feature may have an SiO2 sidewall surface and a TiN plug at the bottom of the feature. In selective deposition, molybdenum may be deposited within the feature and grow on the TiN plug, while not growing (or growing less) on the SiO2 sidewall surface.

[0137] Process conditions such as precursor gas, reducing agent, process temperature, process pressure, and exposure time can affect the selectivity of the deposited molybdenum film. Different precursor gases may have different process windows in which the molybdenum film can be selectively deposited. Generally speaking, MoCl5 gas has a larger process window, i.e., a wide temperature and pressure range in which the precursor gas maintains its selectivity. For example, MoCl5 can be selectively deposited on metallic materials as well as dielectric materials when the process temperature is 200°C to 800°C, e.g., 250°C to 550°C, or 300°C to 500°C. Generally speaking, higher process temperatures and higher process pressures reduce the selectivity of the deposited gas. For example, at higher temperatures, precursor gases such as MoCl5 lose their selectivity and can deposit molybdenum films on both metallic and dielectric surfaces within a feature.

[0138] MoCl5 may be reacted with different reactants to deposit a molybdenum film. The following describes examples of depositing a molybdenum film within a feature using a MoCl5 precursor and different process controls. In the first example, the MoCl5 precursor reacts with a hydrogen (H2) reactant using the deposition method described above. In this specification, the metal precursor reacts with H2 (also referred to as the hydrogen reactant or H2 reactant) as a co-reactant. However, other reactants, including other hydrogen-containing reactants such as SiH4, B2H6, and NH3, may be used as needed instead of hydrogen. Reactants such as B2H6 and / or SiH4 are stronger reducing agents, but they may also result in higher resistivity. Therefore, in some embodiments, it is advantageous to use H2 as described herein. The process temperature for selective deposition of the molybdenum film may be between 200°C and 800°C, for example, 250°C to 550°C, or 300°C to 500°C. At these temperatures, the molybdenum film is selectively deposited on conductive metal or metallic compound surfaces, such as TiN surfaces within the feature, relative to dielectric surfaces. The molybdenum film grows from where the conductive surface is located within the feature. If the conductive surface is a TiN plug at the bottom of the feature, the molybdenum film may be deposited and grown from the bottom of the feature. In the second example, the molybdenum film uses a MoCl5 precursor and an H2 reactant, but may be deposited at a higher temperature, i.e., above 800°C. This process window allows for the deposition of molybdenum films on both dielectric and conductive surfaces within the feature. By using the deposition of molybdenum films on dielectric surfaces, a barrierless molybdenum layer may be formed within the feature.

[0139] In some embodiments, selective deposition is carried out using a molybdenum oxyhalide precursor. As described above, the surface treatment described above significantly improves the selectivity of Mo deposition using MoO2Cl2. As previously shown, MoO y X z Examples of precursors include MoO2Cl2, MoOCl4, MoOF4, MoO2Br2, MoO2I, and Mo4O 11I is an example. Features may be filled using ALD, plasma-excited ALD, chemical vapor deposition (CVD), or plasma-excited CVD. In ALD or CVD, H2 may be a reducing agent. Molybdenum is used in surface treatment. x When using a molybdenum oxyhalide precursor, deposition is faster than when using a regular precursor. For example, MoO y X z The precursor is MoCl for non-plasma processes. x Molybdenum can be deposited at at least twice the deposition rate of the precursor. By using a plasma excitation process, features may be filled at lower temperatures and / or the deposition rate may be increased.

[0140] In some embodiments, feature filling may include the deposition of a nucleation layer. The nucleation layer is a thin film supporting the bulk deposition. The nucleation layer may be conformal to the features. In many embodiments, the nucleation layer is deposited by an ALD process. In some embodiments, the Mo nucleation layer is deposited using one or more boron-containing reducing agents (e.g., B2H6) or silicon-containing reducing agents (e.g., SiH4) as co-reactants. For example, the Mo nucleation layer may be deposited using one or more S / Mo cycles or Mo / S cycles. In another example, the Mo nucleation layer on which the bulk Mo layer is deposited may be deposited using one or more B / Mo cycles or Mo / B cycles, where B refers to a pulse of diborane or other boron-containing reducing agent, S refers to a pulse of silane or other silicon-containing reducing agent, and therefore S / Mo refers to a pulse of silane followed by a pulse of another Mo-containing precursor. The B / Mo and S / Mo cycles (or Mo / B and / or Mo / S) may both be used to deposit a Mo nucleation layer. The Mo nucleation layer is, for example, x(B / Mo) + y(S / Mo), where x and y are integers. Examples of boron-containing reactants include diborane (B2H6), alkylboranes, alkylborons, aminoboranes (CH3)2NB(CH2)2, and C2B n H n+2Examples include carboranes such as etc., and other boranes. Examples of boranes include B n H n+4 、B n H n+6 、B n H n+8 、B n H m where n is an integer from 1 to 10 and m is an integer different from n Examples of silicon-containing reducing agents include silane (SiH4) and other silanes such as disilane (Si2H6).

[0141] In some embodiments, the deposition of the Mo nucleation layer may include the use of a non-oxygen-containing precursor, such as molybdenum hexafluoride (MoF6) or molybdenum pentachloride (MoCl5). The oxygen in the oxygen-containing precursor reacts with the silicon-containing reducing agent or the boron-containing reducing agent to form impure and high-resistivity films of MoSi x O y or MoB x O[[ID=K=29]] y In some embodiments, the oxygen-containing precursor may be used for depositing the nucleation layer with minimal oxygen uptake. The oxygen uptake can be minimized by a high reducing agent flow rate (e.g., greater than 100:1, the volume flow rate of the reducing agent relative to the oxygen-containing Mo precursor).

[0142] In some embodiments, H2 may be used as the reducing gas for depositing the Mo nucleation layer instead of the boron-containing reducing gas or the silicon-containing reducing gas. An example of the deposition thickness of the Mo nucleation layer is in the range of 5 Å to 30 Å. The film at the lower limit of this range may not be continuous, but its thickness may be sufficient as long as it helps initiate the growth of continuous bulk Mo.

[0143] In some embodiments, the reducing agent pulse during the deposition of the nucleation layer or the bulk Mo layer may be performed at a substrate temperature lower than that of the Mo precursor pulse. For example 、B2H6 or SiH4 (or other boron-containing reducing agents or silicon-containing reducing agents) may be pulsed at temperatures below 300°C, while Mo may be pulsed at temperatures above 300°C.

[0144] In some embodiments, the reducing agent is NH3 or other nitrogen-containing reducing agents such as hydrazine (N2H4). Chemisorption of NH3 on the dielectric is preferred over chemisorption of H2. In some embodiments, the reducing agent and precursor are selected so that they react without dissociation of the reducing agent. NH3 reacts with metal acid chlorides and metal chlorides without dissociation. This is in contrast to ALD with metal acid chlorides using H2 as the reducing agent, for example. By dissociating on the surface, H2 forms adsorbed atomic hydrogen, thereby resulting in very low concentrations of active species and low surface coverage during the initial nucleation of the metal on the dielectric surface. By using NH3 and metal acid chloride or metal chloride precursors, the delay in nucleation is mitigated or eliminated at deposition temperatures up to several hundred degrees, which are lower than those used for H2 reduction of the same metal precursor.

[0145] In some embodiments, the reducing agent may be a boron-containing reducing agent such as B2H6 or SiH4, or a silicon-containing reducing agent. These reducing agents, together with the metal chloride precursor, orWhile they may be used with metal chlorides, B2H6 and SiH4 can react with water formed as byproducts during the ALD process to form solid B2O3 and SiO2. These are insulators and can increase resistivity by remaining in the film. The use of NH3 also provides improved adhesion to the ALD process of B2H6 and SiH4 on certain surfaces containing Al2O3. The resulting nucleation layer is generally a metal nitride or metal oxynitride film, rather than a film of pure elements. In some embodiments, residual chlorine or fluorine may be present due to deposition, particularly when deposition is carried out at low temperatures. In some embodiments, trace amounts of residual chlorine or fluorine may be present. In some embodiments, the nucleation layer is an amorphous layer. Impurities in the film (e.g., oxygen, NH3, chlorine, or other halogens) promote the growth of amorphous microstructures. In some embodiments, the nucleation layer immediately after deposition is an amorphous molybdenum oxynitride or amorphous molybdenum nitride layer. The amorphous properties template the large grain growth of the conductor that is subsequently deposited. The surface energy of the nitride or oxynitride relative to the oxide surface is much more favorable than the surface energy of the metal on the oxide surface, promoting the formation of a continuous and smooth film on the dielectric. This allows for the formation of thin, continuous layers. Examples of nucleation layer thicknesses range from 5 to 30 Å immediately after deposition. This may be, for example, about 5 to 50 ALD cycles depending on the temperature. etching

[0146] Etching operations may be used in methods of filling features with a Mo film. Etching operations remove metals such as metals and nitrides from features. For example, the etching process may partially or completely remove the liner layer from the feature. In another example, the etching process may be used to reduce the thickness of the liner layer. In some embodiments, the etching operation may include soaking of features to be soaked in a Mo halide. In some embodiments, the etching operation is MoCl5 or similar. xThis includes soaking of features using [a specific method / library]. In some embodiments, soaking may be performed continuously using a halogenated Mo gas. In some embodiments, soaking may be pulsed, and halogenated Mo may be cycled with a purge gas such as argon (Ar).

[0147] MoCl x Precursors may be used in both deposition and etching operations. For example, within a certain process window, a MoCl5 precursor can simultaneously grow a Mo film and etch a metal or metal compound film within a feature. A process is considered a pure etching operation if the rate at which material is removed is greater than the rate at which material is deposited by the precursor. The rate at which the precursor deposits and etches material can be controlled by a variety of process conditions, including the type of reactants used and the process temperature. Generally speaking, the lower the temperature, the higher the ratio of etching to material deposition. At higher temperatures, the same precursor and reactants may be used as a pure deposition process, i.e., the amount of material deposited is greater than the amount of material removed. For example, when the process temperature is below 400°C, a MoCl5 precursor and H2 reactant may be used in an etching operation. When the process temperature is above 550°C, the same MoCl5 precursor and H2 reactant may be used for deposition.

[0148] In some embodiments, MoCl x The precursor may continue to etch the material at a high temperature (e.g., above 550°C) at a rate faster than the material deposition rate. For example, by using MoCl5, features may be etched by soaking without reactants. In this example, the temperature may be around 700°C, and the material continues to etch from the features. In the operation of soaking features in MoCl5 without reactants, the etching rate of the material from the features may increase with increasing temperature.

[0149] Features may have surface oxides or contaminants on them. For example, the surface of the underlying TiN, WN, or W layer may be oxidized. If present, oxidized surfaces can result in higher resistivity. Such oxides and contaminants are removed by a cleaning operation. In some embodiments, the cleaning operation involves soaking the feature in a Mo precursor gas, typically a halide of Mo. Similar to the etching operation described above, the precursor gas is MoCl x It may be a precursor. In some embodiments, soaking may be performed continuously. In some embodiments, soaking may be pulsed, and MoCl x The process may be cycled with a purge gas such as argon (Ar). The precursor may be an oxygen-free Cl-containing Mo compound that can remove oxidation from the surface of the feature. x Examples of compounds are described above. Cl-containing precursors may be used in areas where conventional cleaning methods using thermal or plasma H2 are ineffective, such as where the oxidized surface is stable on the surface material. Compared to F-containing compounds, Cl-containing precursors are less likely to cause over-etching of the liner layer of features or attack on the feature surface. Device

[0150] Figure 16 shows a schematic diagram of one embodiment of an ALD process station 1600 having a process chamber 1602 for maintaining a low-pressure environment. In some embodiments, multiple ALD process stations may be included in a common low-pressure process tool environment. For example, Figures 17A and 17B show embodiments of a multi-station processing tool 1700. In some embodiments, one or more hardware parameters of the ALD process station 1600, including those discussed in detail below, may be programmed by one or more computer controllers 1750. In some other embodiments, the process chamber may be a single-station chamber.

[0151] The ALD process station 1600 is in fluid communication with a reactant delivery system 1601a for delivering process gas to a distribution showerhead 1606. The reactant delivery system 1601a includes a mixing vessel 1604 for preparing and / or adjusting the process gas for delivery to the showerhead 1606. The process gas is a Mo precursor-containing gas, a hydrogen-containing gas, argon or other carrier gas, or other reactant-containing gas. One or more mixing vessel inlet valves 1620 may control the introduction of process gas into the mixing vessel 1604. In various embodiments, the deposition of the initial Mo layer is performed at the process station 1600, and in some embodiments, other operations such as in situ washing or Mo gap filling may be performed at the same or a different station of the multi-station processing tool 1700, which will be further described below with reference to Figure 17A.

[0152] As an example, the embodiment in Figure 16 includes a vaporization point 1603 for vaporizing the liquid reactants supplied to the mixing vessel 1604. In some embodiments, the vaporization point 1603 may be a heated vaporizer. In some embodiments, the liquid precursor or liquid reactant may be vaporized in a liquid injector (not shown). For example, the liquid injector may inject pulses of the liquid reactant into the carrier gas flow upstream of the mixing vessel 1604. In one embodiment, the liquid injector may vaporize the reactants by flowing the liquid from a higher pressure to a lower pressure. In another example, the liquid injector may atomize the liquid into spray droplets, which are then vaporized in a heated delivery pipe. Smaller droplets vaporize faster than larger droplets, which can reduce the delay between liquid injection and complete vaporization. Faster vaporization can shorten the length of the piping downstream of the vaporization point 1603. In one scenario, the liquid injector may be directly attached to the mixing vessel 1604. In another scenario, the liquid injector may be attached directly to the shower head 1606.

[0153] In some examples, a liquid flow controller (LFC) upstream of the vaporization point 1603 may be provided to control the mass flow rate of the liquid for vaporization and delivery to the process chamber 1602. For example, the LFC may include a thermal mass flow meter (MFM) located downstream thereof. The plunger valve of the LFC may be regulated by a feedback control signal provided by a proportional-integral-derivative (PID) controller electrically communicating with the MFM. However, stabilizing the liquid flow using feedback control may take more than one second. This may extend the time for introducing the liquid reactants. Therefore, in some embodiments, the LFC may be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, this may be done by disabling the LFC's sensing tube and PID controller.

[0154] The showerhead 1606 distributes process gas toward the substrate 1612. In the embodiment shown in Figure 16, the substrate 1612 is located below the showerhead 1606 and is shown resting on a base 1608. The showerhead 1606 may have any suitable shape, and the substrate 1612 It may have any suitable number and arrangement of ports for distributing process gas.

[0155] In some embodiments, the base 1608 may be raised or lowered to expose the substrate 1612 to the volume between the substrate 1612 and the shower head 1606. In some embodiments, the base 1608 may be temperature-controlled via a heater 1610. The base 1608 may be set to any suitable temperature, such as between about 250°C and about 800°C, during operation to perform various embodiments of the disclosure. In some embodiments, the height of the base may be controlled by a suitable computer controller 1650 It will be understood that this may be adjusted in the program. At the end of the process stage, the substrate 1612 may be removed from the base 1608 by lowering the base 1608 when transporting another substrate.

[0156] In some embodiments, the volume between the substrate 1612 and the shower head 1606 may be changed by adjusting the position of the shower head 1606 relative to the base 1608. Furthermore, it will be understood that the vertical position of the base 1608 and / or the shower head 1606 may be changed by any suitable mechanism within the scope of this disclosure. In some embodiments, the base 1608 may include a pivot axis for rotating the orientation of the substrate 1612. In some embodiments, it will be understood that one or more of these adjustments may be performed programmatically by one or more suitable computer controllers 1650. The computer controllers 1650 may include any of the features described below with respect to the controller 1650 in Figure 16.

[0157] In some embodiments in which plasma may be used as described above, the showerhead 1606 and base 1608 are electrically connected to a radio frequency (RF) power source 1614 and a matching network 1616 to power the plasma. In some embodiments, the plasma energy may be controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power source 1614 and the matching network 1616 may be operated at any suitable power to generate a plasma having a desired composition of radical species. Similarly, the RF power source 1614 may provide RF power at any suitable frequency. In some embodiments, the RF power source 1614 may be configured to control high-frequency and low-frequency RF power supplies independently of each other. Examples of low-frequency RF frequencies include, but are not limited to, frequencies between 0 kHz and 900 kHz. Examples of high-frequency RF frequencies include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz, or frequencies above approximately 13.56 MHz, or above 27 MHz, or above 80 MHz, or above 60 MHz. It will be understood that plasma energy for surface reactions may be provided by discretely or continuously tuning any suitable parameters.

[0158] In some embodiments, the plasma may be monitored in situ by one or more plasma monitors. In one scenario, plasma power may be monitored by one or more voltage, current sensors (e.g., VI probes). In another scenario, plasma density and / or process gas concentration may be measured by one or more emission spectroscopy (OES) sensors. In some embodiments, one or more plasma parameters may be programmed to adjust based on measurements from such in situ plasma monitors. For example, OES sensors may be used in a feedback loop to provide programmed control of plasma power. In some embodiments, it will be understood that other monitors may be used to monitor the plasma or other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.

[0159] In some embodiments, instructions for the controller 1650 may be provided via input / output control (IOC) sequence instructions. For example, instructions for setting conditions for process stages may be included in the corresponding recipe stages of the process recipe. In some cases, process recipe stages may be arranged sequentially so that all instructions for a process stage are executed simultaneously with that process stage. In some embodiments, instructions for setting one or more reactor parameters may be included in the recipe stages. For example, a first recipe stage may include instructions for setting the flow rate of the inert gas and / or reactant gas (e.g., a Mo precursor), instructions for setting the flow rate of the carrier gas (e.g., argon), and a time delay instruction for the first recipe stage. A second, subsequent recipe stage may include instructions for adjusting or stopping the flow rate of the inert gas and / or reactant gas, instructions for adjusting the flow rate of the carrier gas or purge gas, and a time delay instruction for the second recipe stage. A third recipe step may include commands to adjust the flow rate of a second reactant gas, such as H2; commands to adjust the flow rate of a carrier gas or purge gas; commands to ignite the plasma; and a time delay command for the third recipe step. A fourth, subsequent recipe step may include commands to adjust or stop the flow rate of an inert gas and / or reactant gas; commands to adjust the flow rate of a carrier gas or purge gas; and a time delay command for the fourth recipe step. It will be understood that these recipe steps may be further subdivided and / or repeated in any suitable manner within the scope of this disclosure.

[0160] Furthermore, in some embodiments, pressure control for the process station 1600 may be provided by a butterfly valve 1618. As shown in the embodiment of Figure 16, the butterfly valve 1618 throttles and adjusts the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of the process station 1600 may be adjusted by changing the flow rate of one or more gases introduced into the process station 1600.

[0161] Figures 17A and 17B show examples of processing systems. Figure 17A shows an example of a processing system including multiple chambers. System 1700 includes a transport module 1703. The transport module 1703 minimizes the risk of substrate contamination that occurs when substrates are moved between different modules during processing by providing a clean vacuum environment. The transport module 1703 is fitted with a multi-station chamber 1709 capable of performing the in situ cleaning and / or ALD process described above. Surface treatment and / or deposition of the initial Mo layer may be performed in the same or different stations or chambers as the subsequent Mo gap filling.

[0162] Chamber 1709 may include a plurality of stations 1711, 1713, 1715, and 1717 that can sequentially perform operations according to embodiments of the disclosure. For example, Chamber 1709 may include station 1711 which performs MoCl x The chamber may be configured to perform in situ processing using a precursor. Station 1713 may be configured to selectively process the field region and the upper sidewall, and stations 1715 and 1717 may be configured to perform ALD of bulk Mo using a molybdenum oxyhalide precursor and H2. In another example, chamber 1709 may be configured so that station 1711 performs in situ cleaning, station 1713 performs ALD of the initial Mo layer, station 1713 selectively processes the layer, and 1714 deposits bulk Mo. In yet another example, chamber 1709 may be configured for parallel processing of substrates, with each station performing multiple processes sequentially.

[0163] A multi-station chamber may include two or more stations, such as two to six, with operations appropriately distributed. For example, a two-station chamber may be configured such that the initial Mo layer is ALD performed in the first station, followed by the bulk Mo ALD in the second station. A station may include a heated base or substrate support, one or more gas inlets or showerheads or distribution plates.

[0164] Furthermore, one or more single-station modules or multi-station modules 1707 may be attached to the transport module 1703. In some embodiments, the pre-cleaning described above may be performed within module 1707, after which the substrate is transported under vacuum to another module (e.g., another module 1707 or chamber 1709) for ALD. In another example, a module for selective processing of films may be attached to the transport module. An example is shown in Figure 10.

[0165] System 1700 also includes one or more wafer source modules 1701 in which wafers are stored before and after processing. An atmospheric robot (not shown) in an atmospheric transport chamber 1719 may first remove the wafers from the source modules 1701 to a load lock 1721. A wafer transport device (typically a robotic arm unit) in a transport module 1703 moves the wafers from the load lock 1721 to modules attached to the transport module 1703, and between those modules.

[0166] In some embodiments, the ALD of Mo is carried out in a first chamber, which may be part of a system such as system 1700, and the CVD or PVD of W or Mo or other conductive material deposited as an overbaden layer is carried out in a separate chamber, which may be part of a separate system and is not coupled to a common transport module.

[0167] Figure 17B shows one embodiment of system 1700. System 1700 in Figure 17B includes a wafer source module 1701, a transport module 1703, an atmospheric transport chamber 1719, and a load lock 1721, as described above with reference to Figure 17A. The system in Figure 17B includes three single-station modules 1757a~ 1757 The system 1700 may be configured to perform operations sequentially according to the embodiments of the disclosure. For example, single-station modules 1757a to 1757c may have a first module 1757a that performs surface treatment, and a second module 1757a that performs surface treatment. 1757 b performs ALD on the initial Mo layer using a halide molybdenum precursor, and the third module 1757 Module c may be configured to perform ALD of bulk Mo using a molybdenum oxyhalide precursor. In this example, in situ cleaning may optionally be performed in the second module 1757b instead of, or in addition to, pre-cleaning in the first module 1757a. In another example, single-station modules 1757a to 1757c may be configured such that the first module 1757a performs initial metal layer deposition, the second module 1757b performs selective processing, and the third module 1757c performs ALD of bulk Mo using a molybdenum oxyhalide precursor. In yet another example, one module may be configured for deposition, another for selective processing, and another for etching.

[0168] The station may include a heated base or substrate support, one or more gas inlets or showerheads or dispersion plates, as described above with reference to Figure 16.

[0169] Figure 18 shows an example of a system including an ion plasma module 1811, a vapor deposition module 1812, and transport modules 1814, 1816, and 1818. In some embodiments, the apparatus may have two or more transport modules, with the ion plasma module mounted on a first transport module and the vapor deposition module mounted on a second transport module. An intermediate transport module (such as transport module 1816) may be used to transport the substrate between the ion plasma module and the deposition module. The system may be configured to selectively process the substrate in the ion plasma module 1811 as described above, followed by the deposition of Mo in the vapor deposition module 1812. The deposition of a Mo liner, W liner, or other liner in the deposition module 1812 may precede the selective processing. In some embodiments, etching operations as described above with respect to Figures 12 and 13D may be performed in the ion plasma module 1811.

[0170] An example of an ion plasma module is shown in Figure 19. Figure 19 shows a simplified cross-sectional view of an ion beam etching system 1900 for performing ion beam etching and / or ion beam processing such as oxidation or nitriding according to a particular method. In this example, a wafer 1901 is placed on a substrate support 1903. The substrate support may hold the wafer 1901 on the substrate support 1903 by providing clamping such as mechanical clamping or electrostatic clamping. The ion beam etching system 1900 may include hardware (not shown) for providing electrical and fluidic connections. Electrical connections may be used to supply electricity to the substrate support 1903, or optionally to an electrostatic chuck located on or within the substrate support 1903. Fluidic connections may be used to provide a fluid used to control the temperatures of the wafer 1901 and the substrate support 1903. The substrate support 1903 may be heated by a heater (not shown) and / or cooled by a cooling mechanism (not shown). Any suitable cooling mechanism may be used. In one example, the cooling mechanism may include flowing a cooling fluid through piping within or adjacent to the substrate support 1903. The substrate support 1903 may be rotatable and tiltable at variable speed and angle, as described above with respect to Figure 15. The tilt and rotation of the substrate support 1903 may be controlled using a position controller 1932. The substrate support 1903 and wafer 1901 are located in the processing chamber 1915.

[0171] The processing chamber 1915 is isolated from the plasma source chamber 1905 by an ion extractor 1912. In this embodiment, the ion extractor 1912 includes a first electrode 1909, a second electrode 1911, and a third electrode 1913. In this embodiment, the third electrode 1913 is grounded. In other embodiments, the ion extractor 1912 may be a different combination of electrodes for extracting ions from the plasma source chamber 1905. In some embodiments, the ion extractor 1912 can provide an ion beam from the plasma source chamber 1905. The plasma source chamber 1905 is surrounded by a coil 1907. The coil 1907 is electrically connected to a matching network 1924 and a radio frequency (RF) source 1920. The coil 1907, the matching network 1924, and the RF source 1920 provide an RF power supply system for supplying RF power to the plasma source chamber 1905. The gas inlet 1908 is located at the end of the plasma source chamber 1905. The gas inlet 1908 is fluidly connected to the process gas source 1902 and the cleaning gas source 1904 through at least one manifold 1906. The gas inlet 1908 may be one of many different forms. For example, the gas inlet may be a gas distribution plate, a gas diffuser plate, a showerhead, or a gas injector. The turbopump 1928 is fluidly connected to the processing chamber 1915, thereby removing gas from the processing chamber 1915 and controlling the pressure within the processing chamber 1915.

[0172] In some embodiments, the switch 1916 may be fluidly connected between the process gas source 1902, the cleaning gas source 1904, and the gas inlet 1908. The switch 1916 may be any device or any group of devices configured to switch to provide process gas from the process gas source 1902 during wafer processing and cleaning gas from the cleaning gas source 1904 during chamber cleaning.

[0173] As described above, the ion beam etching system 1900 may be used for selective oxidation or selective nitriding using a mild plasma, as well as appropriate rotation and tilting of the substrate. Examples of process gases for oxidation include oxygen (O2), ozone (O3), nitrous oxide (N2O), a mixture of H2 and O2, a mixture of N2 and O2, and a mixture of NH3 and O2. Examples of process gases for nitriding include nitrogen (N2) and ammonia (NH3), as well as a mixture of H2 and N2, a mixture of N2 and O2, and a mixture of NH3 and O2. In some embodiments, the plasma conditions are mild and the surface is treated without etching. Examples of mild plasma conditions include a bias voltage of less than 100V, a source current of less than 200mA, a source power of less than 500W, and an O2 flow rate of 0-20 sccm per station. The ion beam etching system 1900 may be controlled using a controller 1914. Controller 1914 may have similar characteristics and features to the system controller 1729 shown in Figures 17A and 17B.

[0174] Returning to Figures 17A and 17B, in various embodiments, a system controller 1729 is employed to control process conditions during deposition. The controller 1729 typically includes one or more memory devices and one or more processors. The processors may include a CPU or computer, analog and / or digital input / output connections, a stepping motor control panel, and the like. Such a system controller may be employed to control any of the processes and apparatus described herein.

[0175] The controller 1729 may control all aspects of the operation of the apparatus. The system controller 1729 runs system control software that includes a set of instructions for controlling the timing of a particular process, gas mixing, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power level, wafer chuck or pedestal position, and other parameters. In some embodiments, other computer programs stored on a memory device associated with the controller 1729 may be employed.

[0176] Typically, a user interface is associated with the controller 1729. The user interface may include a display screen, a graphical software display of the device and / or process conditions, and user input devices such as a pointing device, keyboard, touchscreen, and microphone.

[0177] System control logic may be configured in any suitable manner. Generally, logic can be designed or configured in hardware and / or software. Instructions for controlling drive circuits may be hardcoded or provided as software. Instructions may be provided by “programming.” Such programming is understood to include any form of logic, including logic hardcoded in digital signal processors, application-specific integrated circuits, and other devices having specific algorithms implemented as hardware. Programming is also understood to include software instructions or firmware instructions that can be executed on a general-purpose processor. System control software may be coded in any suitable computer-readable programming language.

[0178] Computer program code for controlling the Mo precursor pulse, hydrogen pulse, argon flow, and other processes in a process sequence can be written in any conventional computer-readable programming language, such as assembly language, C, C++, Pascal, or Fortran. The compiled object code or script is executed by the processor to perform the tasks specified in the program. Also, as mentioned, the program code may be hardcoded.

[0179] Controller parameters relate to process conditions such as the composition and flow rate of the process gas, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters may be provided to the user in the form of a recipe or entered using a user interface.

[0180] Signals for monitoring the process may be provided by the analog and / or digital input connections of the system controller 1729. Signals for controlling the process are output on the analog and digital output connections of the deposition unit.

[0181] The system software may be designed or configured in many different ways. For example, subroutines or control objects for various chamber components may be described to control the operation of the chamber components necessary to carry out the deposition process according to the embodiments disclosed. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0182] In some implementations, the controller 1729 is part of a system, and the system may be part of the examples described above. Such a system may include semiconductor processing equipment comprising one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronic equipment to control the operation of electronic equipment before, during, and after processing of semiconductor wafers or substrates. The electronic equipment may be referred to as a “controller” capable of controlling various components or subcomponents of one or more systems. The controller 1729 may be programmed to control any of the processes disclosed herein, depending on the processing requirements and / or the type of system. Such processes include the delivery of processing gases, temperature setting (e.g., heating and / or cooling), pressure setting, vacuum setting, power setting, setting of radio frequency (RF) generators in some systems, RF matching circuit setting, frequency setting, flow rate setting, fluid delivery setting, position and operation setting, loading and unloading of wafers to and from tools, and loading and unloading of wafers to and from other transport tools and / or load locks connected to or coupled to a particular system.

[0183] Generally, a controller may be defined as an electronic device having various integrated circuits, logic, memory, and / or software that, for example, receive and issue commands, control operations, enable cleaning operations, and enable endpoint measurement. An integrated circuit may include a chip in the form of firmware that stores program instructions, a chip defined as a digital signal processor (DSP), an application-specific integrated circuit (ASIC), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions that are transmitted to the controller in the form of various individual settings (or program files) that define operating parameters for performing a particular process on or for a semiconductor wafer, or for a system. In some embodiments, the operating parameters may be part of a recipe defined by a process engineer to achieve one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0184] In some implementations, the controller 1729 may be part of a computer integrated with the system, coupled to the system, or otherwise networked to the system, or a combination thereof. For example, the controller 1729 may be in the “cloud” or be part of the entire fab host computer system, thereby enabling remote access to wafer processing. By enabling remote access to the system, the computer may monitor the current progress of fabrication operations, verify the history of past fabrication operations, verify trends or performance criteria from multiple fabrication operations, modify parameters of the current operation, set processing steps following the current operation, or start a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system over a network that may include a local network or the internet. The remote computer may include a user interface that allows input or programming of parameters and / or settings, which are then transmitted from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify the parameters of each processing step performed during one or more operations. The parameters may be specific to the type of process being performed and the type of tool that the controller is configured to couple with or control. Therefore, as described above, the controllers may be distributed, for example, by including one or more separate controllers that are networked together and work toward a common purpose, such as the processes and control described herein. An example of a controller distributed for such purposes is one or more integrated circuits on a chamber that are located remotely (at the platform level or as part of a remote computer, for example) and communicate with one or more integrated circuits that collaboratively control the processes on the chamber.

[0185] Examples of systems include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel edge etching chambers or modules, PVD chambers or modules, CVD chambers or modules, ALD chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing systems associated with or usable in the fabrication and / or manufacture of semiconductor wafers.

[0186] As described above, depending on one or more process steps performed by the tool, the controller may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout the factory, a main computer, another controller, or tools used for material handling to load and unload wafer containers to and from tool locations and / or load ports within the semiconductor manufacturing plant.

[0187] The controller 1729 may include various programs. A substrate positioning program may include program code for controlling chamber components used to position the substrate on a pedestal or chuck, and to control the space between the substrate and other components of the chamber, such as a gas inlet. A substrate tilt and rotation program may include code for tilting and rotating. A process gas control program may include code for flowing gas into the chamber prior to deposition to stabilize the pressure in the chamber, with gas composition, flow rate, pulse time, and optionally. A pressure control program may include code for controlling the pressure in the chamber, for example, by adjusting a throttle valve in the chamber's exhaust system. A heater control program may include code for controlling the current to a heating unit used to heat the substrate. Alternatively, the heater control program may control the delivery of a heat transfer gas, such as helium, to the wafer chuck.

[0188] Examples of chamber sensors that can be monitored during deposition include mass flow controllers, pressure sensors such as manometers, and thermocouples located in the base or chuck. Desired process conditions may be maintained by using appropriately programmed feedback and control algorithms in conjunction with data from these sensors.

[0189] The above describes the implementation of embodiments of the disclosure in single or multi-chamber semiconductor processing tools. The apparatus and processes described herein may be used in combination with lithography patterning tools and processes for, for example, the fabrication or manufacture of semiconductor devices, displays, LEDs, solar panels, etc. Typically, such tools / processes are used or performed together in a common fabrication facility, though not necessarily. Film lithography patterning typically involves some or all of the following steps, each provided with a variety of tools: (1) applying photoresist onto a workpiece i.e., a substrate using a spin or spray tool; (2) curing the photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible light or ultraviolet or X-rays using a tool such as a wafer stepper; (4) patterning by developing the resist to selectively remove it using a tool such as a wet bench; (5) transferring the resist pattern to the underlying film or workpiece using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper. The present invention can also be realized in the following embodiments, for example. Application Example 1: It is a method, To provide a substrate including a feature having a metal-containing contact and a dielectric sidewall, The feature is treated by exposing it to molybdenum halide, The method involves depositing molybdenum within the feature, wherein the deposition is selective for the metal-containing contact with respect to the dielectric sidewall. Methods that include... Application example 2: A method according to Application Example 1, further comprising exposing the feature to a hydrogen-containing plasma prior to processing the feature. Application Example 3: A method according to Application Example 1, wherein depositing molybdenum within the feature includes exposing the feature to molybdenum oxyhalide. Application Example 4: A method according to Application Example 1, wherein the process suppresses the growth of molybdenum on the dielectric sidewall. Application Example 5: A method according to Application Example 1, wherein the process is carried out without depositing molybdenum within the feature. Application example 6: A method according to Application Example 1, wherein the treatment further comprises forming molybdenum by exposing the feature to a co-reactant that can reduce the molybdenum halide. Application example 7: A method according to Application Example 1, wherein the amorphous molybdenum-containing layer is located on the metal-containing contact. Application Example 8: A method according to Application Example 7, wherein the treatment removes the amorphous molybdenum-containing layer. Application example 9: It is a method, To provide a substrate including a feature having a dielectric sidewall and a molybdenum contact, wherein the substrate includes the molybdenum contact and the dielectric sidewall, and an amorphous molybdenum-containing layer is on the surface of the molybdenum contact, By exposing the feature to molybdenum halogenate, the amorphous molybdenum-containing layer is removed, and the deposition of molybdenum on the dielectric sidewall is suppressed. The method involves depositing molybdenum within the feature, wherein the deposition is selective for the molybdenum contact with respect to the dielectric sidewall. Methods that include... Application Example 10: It is a method, (a) To provide a substrate including a field region and a feature, wherein the feature includes an opening, a side wall and a bottom, the field region surrounds the opening, and a liner layer lines the side wall of the feature. (b) Selectively processing the liner layer such that a portion of the liner layer on the field region and / or the upper portion of the sidewall is processed preferentially to the liner layer on the lower portion of the sidewall, wherein selectively processing the liner layer means forming a selectively processed portion of the liner layer. (c) selectively depositing molybdenum on the bottom of the feature, wherein deposition on the selectively treated portion of the liner layer is suppressed. Methods that include...

Claims

1. It is a method, To provide a substrate including a feature having a metal-containing contact and a dielectric sidewall, The feature is treated by exposing it to molybdenum halide, The method involves depositing molybdenum within the feature, wherein the deposition is selective for the metal-containing contact with respect to the dielectric sidewall. Methods that include...

2. A method according to claim 1, further comprising exposing the feature to a hydrogen-containing plasma prior to processing the feature.

3. A method according to claim 1, wherein depositing molybdenum within the feature comprises exposing the feature to molybdenum oxyhalide.

4. A method according to claim 1, wherein the process suppresses the growth of molybdenum on the dielectric sidewall.

5. A method according to claim 1, wherein the process is carried out without depositing molybdenum within the feature.

6. A method according to claim 1, the process further comprising forming molybdenum by exposing the feature to a co-reactant that can reduce the molybdenum halide.

7. A method according to claim 1, wherein the amorphous molybdenum-containing layer is located on the metal-containing contact.

8. A method according to claim 7, wherein the treatment removes the amorphous molybdenum-containing layer.

9. It is a method, To provide a substrate including a feature having a dielectric sidewall and a molybdenum contact, wherein an amorphous molybdenum-containing layer is on the surface of the molybdenum contact, By exposing the feature to molybdenum halogenate, the amorphous molybdenum-containing layer is removed, and the deposition of molybdenum on the dielectric sidewall is suppressed. The method involves depositing molybdenum within the feature, wherein the deposition is selective for the molybdenum contact with respect to the dielectric sidewall. Methods that include...

10. It is a method, (a) To provide a substrate including a field region and a feature, wherein the feature includes an opening, a side wall and a bottom, the field region surrounds the opening, and a liner layer lines the side wall of the feature. (b) Selectively processing the liner layer such that a portion of the liner layer on the field region and / or the upper portion of the sidewall is processed preferentially to the liner layer on the lower portion of the sidewall, wherein selectively processing the liner layer means forming a selectively processed portion of the liner layer. (c) selectively depositing molybdenum on the bottom of the feature, wherein deposition on the selectively treated portion of the liner layer is suppressed, Methods that include...