Reconfigurable Wavelength Selective Splitter

Abstract

A reconfigurable device for splitting a light beam is provided, the device comprising: an input port configured to receive an input beam including at least two dominant wavelengths; and an adjustable splitter configured to split the input beam into at least two beams through at least two paths corresponding to the at least two dominant wavelengths, each of the at least two paths configured to propagate one of the at least two dominant wavelengths of the input beam, the adjustable splitter including a lower electrode, a substrate on the lower electrode, a core segment disposed on the substrate, an upper layer, a support segment for connecting the substrate and the upper layer, an upper electrode on the upper layer, and a controllable refractive index layer disposed to fill a gap between the substrate, the support segment, and the upper layer, the reconfigurable device further comprising at least two output ports configured to transmit the at least two beams propagating through the at least two paths.

Description

[Technical field]

[0001] The present invention generally relates to methods and systems for training device design networks to randomly generate material, device, or structural designs using conditional variational autoencoders. [Background technology]

[0002] In many areas of materials, devices, and structures, design is challenging as tens, hundreds, or even more parameters need to be optimized simultaneously, and each simulation or experiment to validate updated features for a new set of parameters takes a long time, so efficient optimization methods are desirable.

[0003] Inverse design of optical devices using deep neural networks for forward or backward regression has been done before (Tahersima et al., Scientific Reports). Once the inverse model is well trained, it can theoretically generate design parameters for us. However, previous inverse neural network models are for optimizing binary structures (such as 0 or 1), which reduces the dimensionality of the actual optimization problem. This can result in some limitations, such as narrower bandwidth and suboptimal results that require further optimization. There is a need to build better generative models to use for more advanced optimization problems. Summary of the Invention

[0004] We propose to use a conditional variational autoencoder combined with an adversarial network to randomly generate device designs, where the desired device performance is given as an input condition. Active training (co-training) can be added to further improve performance.

[0005] Some embodiments of the present disclosure use silicon as the waveguide material and silicon dioxide as the cladding material. Some embodiments use silicon nitride as the waveguide material and silicon dioxide as the cladding material.

[0006] Some of the embodiments use liquid crystals as the reconfigurable material, which have anisotropic refractive index and whose orientation axis can be changed along with the refractive index in each direction by applying an electric field.

[0007] Some of the embodiments have one input port and at least two output ports. Some of the embodiments have nanostructures designed by adjoint methods, and some of the embodiments have nanostructures designed by deep learning.

[0008] According to some embodiments of the present disclosure, the model structure is a conditional variational autoencoder with adversarial blocks based on Bayes' theorem. This requires that the model is based on a probability distribution of the data so that new data can be sampled from the probability distribution of the data. Our training data is generated by performing FDTD simulations. The data is constructed by several adjoint optimization methods.

[0009] According to some embodiments of the present invention, a system for training a device design network to generate a layout of a device is provided, which may include an interface configured to obtain input data for a device, a memory storing the device design network including first and second encoders, first and second decoders, and first and second adversarial blocks, and a processor, the processor being configured in association with the memory to: update the first and second encoders and the first and second decoders based on a first loss function and a third loss function to reduce a difference between input data and output data of the first and second decoders, and update the first and second adversarial blocks by maximizing the second loss function.

[0010] Further, some embodiments of the present invention may provide a computer-implemented training method for training a device design network, the method including: acquiring input data of the device via an interface, updating first and second encoders and first and second decoders based on a first loss function and a third loss function to reduce a difference between the input data and output data of the first and second decoders, and updating the first and second adversarial blocks by maximizing the second loss function.

[0011] Further, some embodiments of the present invention are based on the recognition that a computer-implemented method for generating a layout of a device using a device generative network can be provided. The computer-implemented method includes the steps of obtaining input data of the device through an interface and providing the input data to the device generative network, where the device generative network is pre-trained by a computer-implemented training method configured to obtain the input data of the device through the interface, update the first and second encoders and the first and second decoders based on a first loss function and a third loss function to reduce the difference between the input data and the output data of the first and second decoders, and update the first and second adversarial blocks by maximizing the second loss function. The computer-implemented method further includes generating layout data of the layout of the device using the pre-trained device generative network, and storing the layout data in a memory.

[0012] Further, another embodiment of the present invention provides a computer-implemented training method for training a conditional variational autoencoder (CVAE) network for generating a device pattern, the method includes: acquiring input data of a device from a training dataset via a data communication interface to a two-channel input of a CVAE network, the CVAE network including an encoder-decoder block and a decoder-encoder block, the method further includes updating the CVAE network based on a sum of a first loss function and a third loss function to reduce a difference between input data and output data of a first and a second encoder and a first and a second decoder, and updating the first and the second adversarial blocks by minimizing the second loss function, the steps of acquiring input data, updating the CVAE network, and updating the first and the second adversarial blocks are continued until all of the predetermined data set or the training data set in the training dataset are used.

[0013] The presently disclosed embodiments will be further described with reference to the accompanying drawings, in which: The drawings shown are not necessarily to scale, with emphasis instead generally being placed upon illustrating the principles of the presently disclosed embodiments. [Brief description of the drawings]

[0014] [Figure 1] 1 is a diagram showing an overall configuration of a system according to an embodiment of the present invention. [Diagram 2] FIG. 1 illustrates a general adversarial CVAE network according to an embodiment of the present invention. [Diagram 3] FIG. 2 is a diagram showing a detailed structure of a CVAE encoder block according to an embodiment of the present invention; [Figure 4] FIG. 2 is a diagram showing a detailed structure of a CVAE decoder block according to an embodiment of the present invention; [Diagram 5]FIG. 2 is a diagram showing a detailed structure of an adversarial block according to an embodiment of the present invention; [Figure 6] FIG. 1 illustrates a flowchart of a model training process according to an embodiment of the present invention. [Figure 7] FIG. 4 illustrates input data pre-processing steps according to an embodiment of the present invention. [Figure 8] FIG. 2 illustrates a detailed data flow through a CVAE model according to an embodiment of the present invention. [Figure 9] FIG. 1 illustrates an active learning process for generating a final model according to an embodiment of the present invention. [Figure 10] FIG. 1 illustrates a flowchart of a mapping algorithm for rendering a layout according to an embodiment of the present invention. [Figure 11A] FIG. 2 shows a schematic structure of a reconfigurable wavelength-selective splitter including an input port and a nanophotonic structure covered with a liquid crystal according to an embodiment of the present invention. [Figure 11B] FIG. 2 shows a cross-sectional view of a reconfigurable wavelength selective splitter according to an embodiment of the present invention. [Figure 11C] FIG. 2 shows a cross-sectional view of a reconfigurable wavelength selective splitter according to an embodiment of the present invention. [Figure 12A] FIG. 4 illustrates the transmission characteristics from an output port as a function of wavelength according to an embodiment of the present invention. [Figure 12B] FIG. 4 illustrates the transmission characteristics from an output port as a function of wavelength according to an embodiment of the present invention. [Figure 13A] FIG. 2 illustrates one of three possible ways to construct a pair of a generative model and its inference model, according to an embodiment of the present invention. [Figure 13B] FIG. 2 illustrates one of three possible ways to construct a pair of a generative model and its inference model, according to an embodiment of the present invention. [Figure 13C] FIG. 2 illustrates one of three possible ways to construct a pair of a generative model and its inference model, according to an embodiment of the present invention. [Figure 14]FIG. 1 illustrates a training dataset device distribution (top) according to an embodiment of the present invention. [Figure 15A] FIG. 1 illustrates a performance comparison of four DNN models for ER performance according to an embodiment of the present invention. [Figure 15B] FIG. 1 illustrates a performance comparison of four DNN models for ER performance according to an embodiment of the present invention. [Figure 15C] FIG. 1 illustrates a performance comparison of four DNN models for ER performance according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] The following description provides exemplary embodiments only and is not intended to limit the scope, applicability, or configuration of the present disclosure. Rather, the following description of exemplary embodiments provides those skilled in the art with an enabling description for implementing one or more exemplary embodiments. It is contemplated that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of the disclosed subject matter, as set forth in the appended claims.

[0016] In the following description, specific details are given for a thorough understanding of the embodiments. However, those skilled in the art can understand that the embodiments can be realized without these specific details. For example, systems, processes, and other elements in the disclosed subject matter may be shown as components in block diagram form to avoid obscuring the embodiments with unnecessary detail. In other examples, well-known processes, structures, and techniques may be shown without unnecessary detail to avoid obscuring the embodiments. Additionally, like reference numbers and names in the various drawings refer to like elements.

[0017] Also, particular embodiments may be described as a process that is depicted as a flowchart, a flow diagram, a data flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe operations as a sequential process, many of the operations may be performed in parallel or simultaneously. Additionally, the order of operations may be rearranged. A process may terminate when its operations are completed, or may have additional steps not described or included in the diagram. Moreover, not all operations in any process specifically described may occur in all embodiments. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, or the like. When a process corresponds to a function, the end of the function may correspond to a return of the function to the calling function or to the main function.

[0018] Additionally, embodiments of the disclosed subject matter may be implemented at least partially either manually or automatically. Manual or automated implementations may be performed, or at least assisted, by use of machines, hardware, software, firmware, middleware, microcode, hardware description languages, or any combination thereof. When implemented in software, firmware, middleware, or microcode, the program code or code segments to perform the necessary tasks may be stored on a machine-readable medium. A processor may perform the necessary tasks.

[0019] FIG. 1 is a schematic structure of a system 100 including a neural network module trained to provide a layout of a device according to some embodiments of the present invention. The system 100 includes an interface 115, a processor 120, a storage device 104, and a memory 106. The storage device 104, which is made up of a storage circuit 105, includes a device generation module 200 including encoder network modules 301 and 301', decoder network modules 401 and 401', and adversarial modules (blocks) 501 and 501'. In some cases, the storage device 105 may include a memory (unit) 106. The storage device 104 may include a mapping algorithm 108 configured to generate a layout of a real device 109, or the mapping algorithm 108 may be stored in a separate memory (not shown). The interface (data communication interface) 115 is configured to communicate between the memory 106, the storage device 104, the processor 120, and the mapping algorithm 108. The interface 115 is also configured to receive (obtain) input data including user desired transmission information 101 (e.g., extinction ratio) and Gaussian distribution 102 via an input device external to the system 100. In some cases, the user desired transmission information 101 and Gaussian distribution 102 may be stored in the memory 106 or the storage device 104. The desired transmission information 101 and standard Gaussian distribution 102 are provided to the encoder and decoder neural network modules 301, 301', 401 and 401' via the interface. The neural network modules 301, 301', 401, 401', 500 and 500' are pre-trained so that the system 100 can generate the corresponding hole vector pattern 107 of the device. The system 100 applies the mapping algorithm 1000 to draw / generate the layout of the actual device. Such a network has been verified under a square-based splitter model 1100 as one embodiment of the present invention.Although the following embodiment of the present invention shows a square-based splitter model as a specific example, it should be noted that the shape of the splitter (model) is not limited to a square. Other shapes may be used, including, by way of example, rectangular, circular, elliptical, symmetrical, asymmetrical, or any shape including any of them. In this case, such a splitter is configured to include an input port configured to receive an input beam having an input power, and a power splitter including perturbation segments arranged in a first region and a second region of a guide material having a first refractive index, each segment having a second refractive index, the first region is configured to split the input beam into a first beam and a second beam, the second region is configured to guide the first and second beams separately, the first refractive index being greater than the second refractive index, and the splitter further includes an output port, the output port including first and second output ports connected to the power splitter to receive and transmit the first and second beams, respectively.

[0020] Once the neural network module is fully trained, the system can immediately generate splitters with any splitting ratio desired by the user. Some results using the system 100 show that these devices have a total transmission of about 93% over a very wide band that is practically difficult (in terms of time and efficiency) to obtain by using traditional methods such as Direct Binary Search (DBS). Compared with other results obtained with our other system, which includes only the encoder network module-1 301, the decoder network module-1 401, and the adversarial module-1 500 for the training process, but does not include the encoder network module-2 301', the decoder network module-2 401', and the adversarial module-2 501', the results according to the present invention show a significant improvement from our previous system.

[0021] FIG. 2 shows the overall configuration of the neural network model (device generation module) 200. The model 200 is composed of six parts, namely two encoders (301, 301'), two decoders (401, 401') and two adversarial blocks (501, 501') (shown in 100). The encoders #1 and #2 (30) have the same structure and share the same weights. The decoders #1 and #2 (401) have the same structure and share the same weights. The same standards are applied to the adversarial block (501). The encoder #1 (301) is configured to extract the input pattern features (801) and represent it using a probability distribution defined as a latent variable (806). The decoder #1 (401) has a similar configuration as the encoder #1 (301), but in the reverse order. The decoder #1 is configured to generate the device pattern with the latent variables and the encoded conditions (107). For the second decoder-encoder set, decoder #2 (401') takes the standard Gaussian samples along with the encoded terms (801) to generate a second output pattern (811) that is later used in the loss function. Encoder #2 (301) then takes the second output pattern (811) to generate a second latent variable set (812). Output pattern #2 and latent variables #2 are used only for training (to calculate the loss function). For the final model, use the trained decoder (401).

[0022] FIG. 3 shows the detailed structure of Encoder #1 (301) and Encoder #2 (301'), and the encoders (301 and 301') have the same structure. Each of the encoders 301 and 301' consists of two convolutional layers (302 and 303) (one with 8 channels and the second with 16 channels) followed by two parallel multi-layer perceptron (MLP) layers (304 and 305). Each of the two parallel MLP layers (304 and 305) may be a parallel fully connected layer. In some cases, each of the two parallel MLP layers (304 and 305) includes three or more inputs. As an example, the two parallel MLP layers are configured to change the input → output dimension from 800 → 60 to generate the extracted patterns (mean (μ) and covariance (σ) of a Gaussian distribution). To obtain the latent variables, it is necessary to apply a reparameterization (306) of the mean and covariance. The formula for the reparameterization is shown in Equation 1 below.

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[0023] FIG. 4 shows the detailed structure of decoders #1 and #2 (401 and 401'), which have the same structure. The latent variables 808 from the encoder (806) and the encoded condition data (807) are concatenated to form the input for the decoder. The combined data is then given to the decoder (401) to generate patterns. The decoder 401 includes one multi-layer perceptron (MLP) layer (402) and two convolution layers (403 and 404). The MLP layer has an input-to-output dimension of 69-to-800. In some cases, each of the two convolution layers (403 and 404) may be designed to have three or more channels. As an example, the two convolution layers have the following specifications: the first convolution layer (403) has 8 channels and the second convolution layer (404) has 16 channels. The output of the second convolutional layer is the generated (or reconstructed) pattern (107). The final model is used to generate different devices.

[0024] Figure 5 shows the detailed structure of adversarial blocks #1 and #2 (501 and 501'), which have the same structure. Each of the adversarial blocks (501 and 501') has two MLP layers (502 and 503), where the first layer has input-to-output dimension 60-to-100, and the second layer has input-to-output dimension 100-to-60. The output of the adversarial block is the adversarial condition (504). To better fit the device distribution, we add an adversarial block that separates the latent variables from the conditions.

[0025] 6 shows a detailed training process of a conditional variational autoencoder (CVAE) model 600 according to some embodiments of the present invention. The training process is performed by a computer-implemented method (algorithm / program) using a computer that includes a training circuit. The training circuit (processing circuit) may include, for example, one or more processors, mass storage circuitry such as a hard drive, a video / graphics controller, input / output circuitry, and high-speed memory such as semiconductor memory.

[0026] First, in (601), data (input patterns and input conditions) are taken from the training dataset, then they are processed into two-channel inputs (301, 301') and given to the network. The process steps are shown in the flow diagrams of Figures 6, 7, and 8. The whole training iteration includes two parts: updating the CVAE network in 602, and updating the adversarial block in 606. The first loss function Loss1 is calculated in 603 after the above process. Meanwhile, the third loss function Loss3 (Equation 4) is calculated after the second process in 611, and the random Gaussian sampling data (809) is later processed in 1700, and then given to the decoder encoder block (or called the encoder decoder block) in 400 to obtain the second latent variables 812. The final loss is the sum of the two loss functions (Loss1 and Loss3) in 603 and 611, which are used to update the encoder and decoder block (CVAE network 604). A second loss function (Loss2) is calculated after every three encoder and decoder updates in 607. It is used to update only the adversarial blocks (608) (shown in Equation 3).

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[0027]

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[0028] Figure 7 shows the details of the processing of the input data. The input data (ACVAE with cycle consistency) given to the encoder network 301 is constructed by two channels (two 20x20 matrices) 302. In this case, the first one is the 20x20 input pattern (702) and the second one is the (3x20) input condition (701) decoded 803 via the decoder.

[0029] FIG. 8 illustrates a data flow 800 in a network according to some embodiments of the present invention. Input pattern data (702) and input condition data (803) form two-channel inputs (ports) to the CVAE encoder (301). The encoder #1 generates a 60-dimensional latent variable #1. The latent variable is concatenated with the coded condition (807) (having 9 dimensions) to form the input to the decoder #1 (808). After processing by the decoder #1, the generated (or reconstructed) pattern #1 (107) is the output. Meanwhile, the coded condition is concatenated with random Gaussian sampling (809)-(1700) and fed to the decoder #2 to obtain the output pattern #2 (811). The output pattern #2 becomes the input of the encoder #2 to obtain the latent variable #2.

[0030] To fully train the neural network model 200 (ACVAE with cycle consistency), the concept of active learning was used. Figure 9 shows the flow chart of the process. After the first model is completed, it is used to generate 1000 devices with different hole sizes and label them with their spectrum at each port (condition) through FDTD simulation, using the original 15000 binary training data for preliminary training. Then, the generated new data is combined with the existing data to form a new 16000 data set, and the model is retrained. The second model is then the final model used for device generation.

[0031]

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[0032] Some embodiments of the present invention can provide a target device structure based on a compact on-chip wavelength demultiplexer (one input port and two output ports), which is electrically tunable using liquid crystal (LC) as a controllable refractive index layer on a nanophotonic circuit, and the output is swapped when the LC is on. In other words, the core segments are arranged to swap at least two paths when an electric field is applied to the controllable refractive index layer using top and bottom electrodes.

[0033] We first perform an adjoint optimization method using the LumOpt numerical package provided by Lumerical. For the following target responses, i.e., for T1;ON(λ1), T2;ON(λ2), T1;OFF(λ2), and T2;OFF(λ1), the target is Thigh, whereas for T1;ON(λ2), T2;ON(λ1), T1;OFF(λ1), and T2;OFF(λ2), the target is Tlow, and T1 / 2;ON / OFF is the transmission of the silicon-on-insulator (SOI) waveguide modes from the input port to the output port 1 / 2 depending on the LC condition of either ON (e-axis along the out-of-plane direction) or OFF (e-axis perpendicular to the input waveguide). All transmission values ​​(performance) are averaged over a 5 nm bandwidth centered on the target wavelength λ1,2 ± 2.5 nm.

[0034] 11A is a schematic structure of a reconfigurable wavelength-selective splitter 1100, including an input port 1110, a nanophotonic structure 1120 covered by a liquid crystal 1130 as a controllable refractive index layer and an electrode 1230 (FIG. 11B), and two output ports 1150 and 1160. In some cases, the controllable refractive index layer may include a chalcogenide material, or the controllable refractive index layer may include a ferroelectric liquid crystal.

[0035] Additionally, the controllable refractive index layer may be covered with an electrode.

[0036] 11B is a cross-sectional view of the reconfigurable wavelength selective splitter 1100 along line 1170. It includes a substrate 1200, a cladding layer 1210, a waveguide layer 1220, a liquid crystal 1130, an electrode 1230, a spacer 1240, and a voltage source 1250 applied between the electrode 1230 and the electrode of the substrate 1200. In some cases, the substrate may be a silicon-on-insulator substrate. In some cases, the waveguide layer 1220 may include silicon nitride or silicon, or a combination thereof.

[0037] For the simulation, the waveguide layer 1220 comprises a 220 nm thick silicon nitride with a refractive index of 2.4629 at a wavelength of 1.55 μm, based on the technology of J. Kischkat et al. (Applied Optics, vol. 51, p. 6789, 2012). The size of the nanophotonic structure used in the simulation is 8 μm×8 μm, and contains 50 nm square pixels. The width of the input port 1110 and the output ports 1150 and 1160 is 500 nm. The center-to-center distance of the two output ports 1150 and 1160 is 2 μm.

[0038] Liquid crystal is a material whose molecular orientation can be controlled by an applied electric field, and the anisotropic refractive index changes with the change in molecular orientation. An electric field can be applied to the liquid crystal by applying a voltage between the substrate and the electrodes. In the simulation, at a wavelength of 1.55 μm, the refractive index along the long axis is 1.685 and in other directions is 1.500.

[0039] 11C is a cross-sectional view of reconfigurable wavelength-selective splitter 1100 along line 1170-1170'. It includes substrate 1200, cladding layer 1210, waveguide layer 1220, and chalcogenide glass 1260.

[0040] The above selection of materials and parameters are for illustrative purposes only, and other combinations of these are possible.

[0041] 12A shows the transmission characteristics from output ports 1150 and 1160 as a function of wavelength when a voltage is applied to electrode 1230, using a three-dimensional finite-difference time-domain (FDTD) simulation. At wavelength λ1 most of the input power from input port 1110 goes to output port 1, while at wavelength λ2 most of the input power goes to output port 2. Extinction ratios of 16-17 dB are possible.

[0042] Figure 12B shows the transmission characteristics from output port 1150 (port 1) and output port 1160 (port 2) as a function of wavelength when no voltage is applied to electrode 1230, using a three-dimensional finite-difference time-domain (FDTD) simulation. At wavelength λ1 most of the input power from input port 1110 goes to output port 1, while at wavelength λ2 most of the input power goes to output port 1160 (port 2). Extinction ratios of 16-17 dB are possible.

[0043] The principle of this operation is as follows. For example, there are two valleys in the transmission characteristic from port 1, or there are two peaks in the transmission characteristic from 1160 (port 2). The two peaks and valleys at λ0 and λ2 in FIG. 12A are shifted to λ1 and λ3 in FIG. 12B, respectively. Then, the peaks and valleys at λ1 and λ2 are effectively switched. Therefore, it is important that there are two valleys from one port and two peaks from another port, which are shifted according to the change in refractive index.

[0044] The molecules of liquid crystals typically return to their original orientation when the applied electric field is removed. A special type of liquid crystal, ferroelectric liquid crystals, can maintain their molecular alignment and thus the refractive index change for a long period of time. Thus, the device operation can be non-volatile and does not require continuous application of voltage.

[0045] Chalcogenide glasses are based on the group 16 elements of the periodic table, S, Se and Te, and are usually compounded with group 14 and 15 elements, such as germanium and arsenic, respectively, to enhance glass stability and robustness, and their refractive index can be controlled externally by applying strong pulsed light. The refractive index change is non-volatile, so continuous exposure to external light is not required. DNN Model

[0046]

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[0047] According to some embodiments, a computer-implemented method for designing a photonic device using a DNN training dataset is provided.

[0048]

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[0049] Some simulation results are shown in FIG. 14 and FIGS. 15A, 15B, and 15C.

[0050]

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[0051] Overall, AutoBayes model search reveals that including S helps improve the network output but slightly reduces the smoothness of the interpolation. Designing one device using the adjoint method takes about 1.5 days using a computing cluster. Even if it takes 4 hours to train the DNN, it takes about 9 hours to generate and validate 410 devices. This shows that DNNs have the potential to cover the entire target parameter space in a short time without using the adjoint method to design each device individually.

[0052] As mentioned above, DNN model search can be utilized for efficient inverse design of tunable nanophotonic wavelength splitters. Specifically, the nested ACVAE model found in AutoBayes outperformed the prior art ACVAE model, achieving an average extinction ratio of about 13 dB over a wide range of wavelengths even with a limited number of training data.

[0053] The model has been proven to immediately generate any device desired by the user without further optimization, which significantly reduces design time.

[0054] Note that up to this point, we have taken nanophotonic devices with periodic holes as examples. However, there are other types of optical devices. For example, the adjoint method can generally optimize a larger number of parameters. The present invention can use these types of devices as training data.

Claims

1. 1. A reconfigurable device for splitting a beam of light, the reconfigurable device comprising: an input port configured to receive an input beam comprising at least two dominant wavelengths; an adjustable splitter configured to split the input beam into at least two beams through at least two paths corresponding to the at least two dominant wavelengths, each of the at least two paths configured to propagate one of the at least two dominant wavelengths of the input beam, the adjustable splitter including a lower electrode, a substrate on the lower electrode, a core segment disposed on the substrate, an upper layer, a support segment for connecting the substrate and the upper layer, an upper electrode on the upper layer, and a controllable refractive index layer disposed to fill a gap between the substrate, the support segment, and the upper layer, the reconfigurable device further comprising: a reconfigurable device comprising at least two output ports configured to transmit the at least two beams propagating through the at least two paths;

2. The reconfigurable device of claim 1 , wherein the core segments are arranged to interchange the at least two paths upon application of an electric field to the controllable refractive index layer through the use of the top electrode and the bottom electrode.

3. The reconfigurable device of claim 1 , wherein the controllable refractive index layer is a liquid crystal (LC).

4. The reconfigurable device of claim 1 , wherein the substrate is a silicon-on-insulator substrate.

5. The reconfigurable device of claim 1 , wherein the controllable refractive index layer is covered by an electrode.

6. The reconfigurable device of claim 1 , wherein the controllable refractive index layer comprises a ferroelectric liquid crystal.

7. The reconfigurable device of claim 1 , wherein the controllable refractive index layer comprises a chalcogenide material.

8. The reconfigurable device of claim 1 , wherein the waveguide layer comprises silicon nitride.

9. The reconfigurable device of claim 1 , wherein the waveguide layer comprises silicon.

10. 1. A computer-implemented training method for training a conditional variational autoencoder (CVAE) network to generate device patterns, the method comprising: obtaining device input data from a training data set via a data communication interface to a two-channel input of the CVAE network, the CVAE network including an encoder-decoder block and a decoder-encoder block, the method further comprising: updating the CVAE network based on a sum of a first loss function and a third loss function to reduce a difference between input data and output data of a first and second encoder and a first and second decoder; and updating the first and second adversarial blocks by minimizing a second loss function, wherein the steps of obtaining input data, updating the CVAE network, and updating the first and second adversarial blocks are continued until a predetermined data set in the training data set or all of the training data set have been used.

11. 11. The method of claim 10, wherein the input data of the device includes input pattern data and input condition data, the input data being provided to a two-channel input port of the encoder-decoder block of the CAVE network, the encoder-decoder block generating latent variables, and the generated latent variables being used as inputs to the decoder-encoder block.

12. The method of claim 11 , wherein the decoder-encoder block generates a reconstructed pattern based on the latent variables.

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