Method for manufacturing a structure with a barrier layer for preventing diffusion of atomic species - Patents.com

Abstract

The present invention relates to a structure (1) comprising a support (2) made of a charge trapping layer (2b) disposed on the surface of a base substrate (2a), and a thin film (4) made of a lithium-based material and transferred onto the support (2). The structure (1) comprises an interlayer dielectric layer (3) disposed between the support (2) and the thin film (4) and in contact with the support (2) and the thin film (4). The interlayer dielectric layer (3) comprises a first dielectric layer (31) disposed on and in contact with the trapping layer (2b), a silicon nitride barrier layer (5) disposed on and in contact with the first dielectric layer (31), and a second dielectric layer (32) disposed on and in contact with the barrier layer (5).

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a structure comprising a thin layer transferred onto a support provided with a charge trap layer. The present invention is particularly useful in fields such as microelectronics, microsystems, and photonics.

Background Art

[0002] WO 2021 / 008742 points out that it is often advantageous to provide a charge trap layer (hereinafter more simply referred to as a "trap layer") in a support of a structure formed by a thin layer transferred onto a support through a dielectric layer. The manufacture of this type of structure is disclosed, for example, in French Patent No. 2860341, French Patent No. 2933233, French Patent No. 2953640, US Patent Application Publication No. 2015 / 115480, US Patent No. 7268060, and US Patent No. 6544656. In particular, the present invention can be used to form electronic components or electroacoustic components in the field of radio frequency (RF) signals. US Patent Application Publication No. 2018 / 0114720 (A1) and US Patent Application Publication No. 2018 / 0158721 (A1) also propose "semiconductor-on-insulator" structures with trap layers.

[0003] A thin film that is a single crystal can be a semiconductor (e.g., silicon, i.e., forming a "silicon-on-insulator" structure) or an insulator (e.g., a piezoelectric material such as lithium tantalate or lithium niobate for forming a "piezoelectric-on-insulator" structure).

[0004] The aforementioned documents also disclose the fact that this type of structure is particularly sensitive to hydrogen, because this atomic species can diffuse and solidify in the trap layer, which tends to inactivate the electrical defects contained in this layer, and as a result, the RF performance of the structure decreases. As described in the publication "White paper - RF SOI Characterisation" issued by SOITEC in January 2015, the RF performance of the substrate can be characterized by the second harmonic distortion measurement.

[0005] Also, when the thin film contains lithium, it has been observed that this atomic species also diffuses into the structure during the manufacturing process and freezes in the trap layer, and it is highly likely to dope it. Similar to hydrogen, the presence of lithium in the trap layer tends to reduce the RF performance of the structure.

[0006] To prevent the RF performance degradation caused by the diffusion of atomic species (especially hydrogen) in the structure incorporating the trap layer, WO 2021 / 008742 and WO 2022 / 023630 propose to provide a barrier effect by using a dielectric intermediate layer.

[0007] The properties and dimensions of the various layers constituting the structure are not freely selectable. They are generally determined by the intended application and the characteristics of the components formed using this structure.

[0008] For example, for illustrative purposes only, the properties and thickness of the dielectric layer of the POI structure are determined by the expected performance of the surface acoustic wave filter formed on the thin piezoelectric layer. The thickness of the trap layer can also affect the propagation of acoustic waves on the surface of the thin layer, and its thickness may also be imposed to ensure the proper operation of the component.

[0009] However, in certain structural configurations, the barrier effect of the dielectric layer proposed in WO 2021 / 008742 and WO 2022 / 023630 may be insufficient. This is the case, for example, when the structure has a relatively thin trap layer, e.g., with a thickness of less than 0.5 micrometers. In such cases, the RF performance of the structure is very sensitive to the movement of species in the trap layer. This layer contains relatively few electrical traps, and a significant proportion of them can be inactivated by a small number of trapped species.

[0010] When the dielectric intermediate layer is relatively thin, e.g., less than 200 nm, its diffusion barrier effect is of course much less effective, especially with regard to lithium diffusion within the structure.

[0011] In other configurations, the barrier effect of the dielectric layer may impose manufacturing constraints. Thus, when the dielectric intermediate layer is relatively thick, e.g., more than 20 nm, this layer can introduce stress into the structure that tends to deform the structure. An overly deformed structure can no longer be operated and processed by conventional microelectronic devices and, if not impossible, makes its manufacture very complex.

[0012] Therefore, the solutions proposed by WO 2021 / 008742 and WO 2022 / 023630 to prevent the diffusion of atomic species cannot be easily applied to a wide range of dimensions and types of the various layers that make up the structure. SUMMARY OF THE INVENTION PROBLEM TO BE SOLVED BY THE INVENTION

[0013] One intention of the present invention is to improve this prior art by providing a structure incorporating a diffusion barrier for specific atomic species, particularly hydrogen and / or lithium, in a structure including a charge trap layer. In particular, one object of the present invention is to provide an intermediate dielectric layer having a diffusion barrier effect that can be used for a wide range of sizes of various elements constituting the structure.

Means for Solving the Problems

[0014] To achieve this intention, the object of the present invention is to propose a method for manufacturing a structure comprising a thin layer, which is formed from a lithium-based material and is transferred onto a support via an intermediate dielectric layer comprising a first dielectric layer, a silicon nitride barrier layer, and a second dielectric layer, wherein the support comprises a charge trap layer disposed near the surface on the base substrate on the thin layer side. According to the present invention, the method includes the following steps. - Forming a first dielectric layer on the trap layer disposed on the main surface of the support; - Forming a silicon nitride barrier layer on the first dielectric layer and in contact with the first dielectric layer, with a thickness of 20% to 30% of the thickness of the dielectric intermediate layer and at least 20 nm; - Forming a second dielectric layer on the barrier layer and in contact with the barrier layer; - Assembling the main surface of the support and the main surface of the donor substrate to form an intermediate structure; - Removing a part of the donor substrate from the intermediate structure to define a thin layer (4) on the support.

[0015] According to other advantageous non-limiting features of the present invention, alone or in any technically feasible combination, the following applies. · The donor substrate comprises a single crystal piezoelectric material. · A surface dielectric layer is provided on the main surface of the donor substrate before assembling it to the support. · The first dielectric layer and / or the second dielectric layer is made of silicon oxide or silicon oxynitride. · The first dielectric layer or the second dielectric layer is made of silicon oxynitride incorporating nitrogen with a nitrogen / oxygen ratio of less than 0.5. · The trap layer is made of polycrystalline silicon. · The formation of the first dielectric layer includes the oxidation of the trap layer. · The first dielectric layer and the second dielectric layer are made of silicon oxynitride incorporating nitrogen with a variable nitrogen / oxygen ratio increasing in the direction of the barrier layer. · The stack is formed by the first dielectric layer, the barrier layer, and the second dielectric layer, and is deposited on the support by in-situ deposition in a chamber using the LPCVD method.

[0016] According to another aspect, an object of the present invention is a structure comprising a support formed from a charge trap layer disposed near the surface on a base substrate, made of a lithium-based material, and having a thin layer transferred onto the support, the structure comprising an intermediate layer dielectric layer disposed between and in contact with the support and the thin layer.

[0017] According to the present invention, the structure is characterized in that the intermediate layer dielectric layer comprises the following. a. A first dielectric layer disposed on and in contact with the trap layer. b. A silicon nitride barrier layer disposed on and in contact with the first dielectric layer, having a thickness of 20% to 30% of the thickness of the dielectric intermediate layer and at least 20 nm. c. A second dielectric layer disposed on and in contact with the barrier layer.

[0018] According to other advantageous non-limiting features of the present invention, alone or in any technically feasible combination, the following applies. · The base substrate is a single-crystalline silicon substrate. · The trap layer is made of polycrystalline silicon. · The trap layer has a thickness of less than 0.5 micrometers. · The thin layer is made of a single-crystalline piezoelectric material. · The first dielectric layer and the second dielectric layer are made of silicon oxide or silicon oxynitride. · The first dielectric layer and the second dielectric layer are made of silicon oxynitride incorporating nitrogen with a variable nitrogen / oxygen ratio increasing in the direction of the barrier layer. · The structure is in the form of a circular wafer having a diameter of 200 mm or less and a curvature of less than 100 micrometers. · The dielectric layer can have a thickness of less than 200 nm. · The barrier layer is made of non-stoichiometric silicon nitride.

Brief Description of the Drawings

[0019] Other features and advantages of the present invention will become apparent from the following detailed description of the invention with reference to the accompanying drawings.

Figure 1

Figure 2

Figure 3

Modes for Carrying Out the Invention

[0020] Very generally speaking, referring to FIGS. 1 and 2, the present disclosure relates to a structure 1 and a method for manufacturing this structure 1. The structure 1 sequentially includes a single-crystalline thin film 4, an intermediate dielectric layer 3, and a support 2. The support 2 itself includes a base substrate 2a provided with a charge trap layer 2b. In the embodiment shown in the figure, the intermediate dielectric layer 3 is in contact with the trap layer 2b and the thin layer 4. As described in the introductory part of this application, such a structure 1 is particularly suitable for accommodating radio frequency (RF) components on or in the thin film 4.

[0021] Conventionally, the structure 1 can be in the form of a circular wafer, and its diameter can be 100, 150, 200, 300, or even 450 mm.

[0022] The base substrate 2a of the support 2 on which the trap layer 2b is placed typically has a thickness of several hundred micrometers. Preferably, the base substrate 2a has a resistivity higher than 1000 ohm - centimeters, and more preferably higher than 2000 ohm - centimeters. Thereby, the density of charges, holes, or electrons attempting to move within the base substrate is restricted. However, the present invention is not limited to a base substrate 2a having such a resistivity, and when the base substrate has a more compatible resistivity of about several hundred ohm - centimeters, for example, less than 1000 ohm cm, or less than 500 ohm cm, or even less than 10 ohm cm, it also provides the advantages of RF performance.

[0023] For reasons of availability and cost, the base substrate 2a is preferably composed of single - crystal silicon. It can be, for example, a CZ silicon substrate having a low interstitial oxygen content included between 6 and 10 ppm, or in particular, an FZ silicon substrate having a naturally very low interstitial oxygen content (usually less than the detection limit set at 10^16 cm^ - 3). Also, it can be a CZ silicon substrate having a large amount of interstitial oxygen exceeding 26 ppm (represented by the expression "high Oi"). The base substrate 2a can alternatively be formed from another material, for example, it can be sapphire, glass, quartz, silicon carbide, etc. In certain situations, especially when the trap layer 2b is sufficiently thick, for example, thicker than 30 micrometers, the base substrate 2a can have a standard resistivity of less than 1 k ohm cm.

[0024] The trap layer 2b can have quite diverse properties as described in the literature forming the prior art. Generally, it is a non - single - crystal layer having structural defects such as dislocations, grain boundaries, amorphous zones, interstitial sites, inclusions, pores, etc. These structural defects form traps for charges that tend to circulate in the material, for example, in incomplete or undetermined chemical bonds. This prevents conduction in the trap layer, and as a result, the trap layer has a high resistivity.

[0025] When formed particularly on the resistive base substrate 2a, its thickness can be configured to be 0.1 to 3 μm. However, depending on the level of RF performance expected from the structure 1, other thicknesses below or above this range are also fully conceivable.

[0026] Advantageously, for ease of implementation, this trap layer 2b is formed of a layer of polycrystalline silicon. It may also comprise a layer of silicon-carbon alloy or may be formed entirely of silicon-carbon alloy. The trap layer comprising this polycrystalline silicon can be formed by depositing it on the base substrate 2a.

[0027] In order to maintain the polycrystalline nature of this layer during the heat treatment applicable to the structure 1, an amorphous layer composed of, for example, silicon dioxide can be advantageously provided on the base substrate 2a before the deposition of the trap layer 2b.

[0028] Alternatively, the trap layer 2b can be formed by implanting relatively heavy species such as argon into the surface thickness of the base substrate 2a to form structural defects that constitute electrical traps therein. This layer 2b can also be formed by making the surface thickness of the base substrate 2a porous or by any other method capable of forming structural defects in the surface thickness of the base substrate 2a, and these structural defects can trap charges.

[0029] The thin film 4 of the structure 1 can be of any suitable type, particularly of single-crystalline material. If the structure 1 is intended to receive an integrated semiconductor component, the thin layer 4 can be composed of single-crystalline silicon or any other single-crystalline semiconductor material such as germanium, silicon germanium, silicon carbide. If the structure 1 is intended to receive a surface acoustic wave filter, the thin layer 4 can be composed of a single-crystalline piezoelectric and / or ferroelectric material such as lithium tantalate or lithium niobate. The thin layer 4 can also include a finished or semi-finished integrated component that is first formed on a donor substrate and transferred onto the support 2 during the steps of manufacturing the structure 1. Generally speaking, the thin film can have a thickness of 10 nm to 10 micrometers depending on the intended use of the structure 1 and the expected performance of the component.

[0030] The intermediate dielectric layer 3 can have a thickness of 50 nm to several micrometers, for example, 5 micrometers or more.

[0031] To prevent the diffusion of certain atomic species towards the trap layer 2b, the structure 1 includes a silicon nitride barrier layer 5 within the intermediate dielectric layer 3. "Silicon nitride" refers to nitrides whose general formula is Si x N y and thus can contain nitrogen and silicon in a stoichiometric (Si3N4) or non-stoichiometric ratio.

[0032] More precisely, the intermediate dielectric layer 3 includes the following formed and arranged on the support 2. - A first dielectric layer 31 disposed on and in contact with the trap layer 2b, - A silicon nitride barrier layer 5 on and in contact with the first dielectric layer, - A second dielectric layer 32 on and in contact with the barrier layer 5.

[0033] For reasons that will become apparent from the following parts of the present disclosure and as is apparent from [Figure 2], the intermediate dielectric layer 3 may also include a dielectric surface layer 41 disposed between the second dielectric layer 32 and the thin layer 4. This surface dielectric layer 41 is preferably in contact with the thin layer 4 and the second dielectric layer 32, but this feature is not essential, and it can be assumed that the intermediate dielectric layer 3 includes layers other than the surface dielectric layer 41 disposed between the second dielectric layer 32 and the thin layer 4.

[0034] Species that tend to diffuse towards the trap layer 2b can particularly originate from the thin layer 4. This can be, for example, lithium when the thin layer 4 is made of lithium tantalate or lithium niobate (or, more generally, any material with a lithium group). By providing a silicon nitride barrier layer 5 between the thin layer 4 and the trap layer 2b that can particularly prevent the diffusion of lithium, a decrease in the RF performance of the structure 1 is avoided. To effectively achieve the barrier effect, it is preferable that the silicon nitride barrier layer 5 has a thickness of at least 20 nm, particularly for light species such as lithium. Generally, it is not necessary to provide a thickness exceeding 70 nm to sufficiently achieve the barrier effect (regarding the diffusion of light species such as lithium or hydrogen), but as disclosed in the following sections of the present disclosure, if other benefits are expected, or if the structure 1 is particularly sensitive to the movement of these species, the barrier layer 5 can be formed with a thickness exceeding this 70 nm value.

[0035] The second dielectric layer 32 and, if present, the surface dielectric layer 41 are provided to facilitate the assembly of the structure. These layers are preferably based on silicon oxide because the adhesion characteristics of these materials are known and can be prepared for assembly (such as cleaning, activation treatment, etc.). These layers 32, 41 do not need to be thickened to perform their adhesion function during the manufacture of the structure, and preferably, their thicknesses are each 5 nm to 30 nm.

[0036] Finally, the first dielectric layer 31 provides a dielectric thickness complementary to the second dielectric layer 32, the barrier layer 5, and any other dielectric layer disposed on the second dielectric layer 32 in order to obtain the intermediate dielectric layer 3 of a selected thickness. It should be recalled that this dielectric intermediate layer 3 can have a thickness ranging from 50 nm to several micrometers, and thus the first dielectric layer 31 can have a thickness ranging from 20 nm to several micrometers. This first dielectric layer 31 is preferably made of silicon oxide as a base material to facilitate use.

[0037] Species that may migrate to the trap layer 2b can originate from the intermediate dielectric layer 3 itself or from the assembly interface present in the second dielectric layer 32. This is particularly true when the intermediate dielectric layer 3 is produced by a deposition method involving a moderate heat treatment of less than 650 °C at least in part. In these processes, certain species such as hydrogen cannot diffuse from the deposited layer, and thus these species are likely to diffuse towards the trap layer 2b during other stages in the manufacture of the structure 1.

[0038] To prevent the diffusion of these species desorbing from the intermediate dielectric layer 3, particularly from the first dielectric layer 31 under the barrier layer 5, as close as possible to the trap layer 2b, it may be advantageous to select the materials and techniques for forming the first and second dielectric layers 31, 32 (and to a lesser extent any layer present between the second dielectric layer 32 and the thin layer 4) such that they contain little or no hydrogen or such that the diffusibility of this hydrogen is limited. This is particularly true when the intermediate dielectric layer 3 is relatively thick, with a thickness of 200 nm or more, and the thickness of the first dielectric layer 31 is typically more than 100 nm. It is also true when the trap layer 2b is relatively thin, less than 500 nm. In both cases, the RF performance of the structure 1 is particularly sensitive to hydrogen diffusion towards the trap layer 2b, as described in the introduction of this application.

[0039] The low hydrogen dielectric layer can be formed by LPCVD (low pressure chemical vapor deposition) in the temperature range of 650°C to 850°C, preferably 700°C to 800°C. In the case of the first dielectric layer 31 disposed directly on the trap layer 2b, when this layer is composed of silicon, the first dielectric layer 31 can be formed by thermal oxidation of this trap layer. In order to form a dielectric layer that restricts the diffusion rate of this hydrogen, nitrogen can be incorporated (for forming a SiON layer). In order to characterize the ratio of nitrogen in the layer, measurement of its refractive index can be utilized, and the refractive index varies between 1.45 of SiO2 and 2.02 of Si3N4 (i.e., stoichiometric silicon nitride) (at a wavelength of 633 m).

[0040] Understanding that the ratio of nitrogen in the SiON layer is such that the higher the ratio, the lower the diffusion rate, it can be freely selected to limit the expected diffusion rate. When not wanting to overly change the acoustic properties of these layers compared to the layers formed from silicon oxide (which may affect the performance of a specific component formed on the structure 1, for example, an elastic wave component), it is preferable to limit the ratio of nitrogen, for example, to keep the nitrogen / oxygen ratio between 0.01 and 0.5 or between 0.05 and 0.1.

[0041] The ratio of nitrogen in the first dielectric layer 31 and the second dielectric layer 32 can be the same or different. This ratio can be constant within the layer or can vary. In one embodiment, the nitrogen / oxygen ratio is variable in the first dielectric layer 31 and the second dielectric layer 32 and increases towards the barrier layer 5.

[0042] Note that some dielectrics may apply compressive mechanical stress to the substrate on which they are formed. This applies to silicon oxide. Other dielectrics such as silicon nitride may provide voltage stress. These stresses may lead to deformation ("warpage") of the substrate.

[0043] Thus, when the first layer 31 and the second layer 32 are made of a dielectric material that provides compressive mechanical stress, such as silicon oxide, the thickness of the silicon nitride barrier layer 5 can be adjusted to compensate for this stress. Of course, it remains above the 20 nm threshold thickness that gives this layer its barrier effect.

[0044] The thickness of the silicon nitride barrier layer 5 is selected to be 20% - 30% of the thickness of the intermediate layer dielectric layer. This is particularly applicable when the rest of the intermediate layer is composed of silicon oxide or silicon oxynitride having a nitrogen / oxygen ratio of less than 0.5, and / or when this intermediate layer 3 has a thickness exceeding 100 nm. Such a selection can limit the deformation of the structure 1, which is in the form of a circular wafer with a diameter of 150 mm or more, to less than 60 micrometers. In the case of the structure 1 in the form of a circular wafer having a diameter of 200 mm, the deformation can be limited to less than 100 micrometers.

[0045] It should be noted that this method of adjusting the thickness of the barrier layer 5 to limit the deformation of the structure 1 is particularly useful when the intermediate layer dielectric layer 3 is relatively thick and exceeds 200 nm. In such cases, the stress generated in the structure 1 can be relatively high, which is interesting in order to compensate for the stress and avoid excessive deformation of the structure. Also, note that this deformation increases with the size of the structure, for example, the larger the diameter of the wafer when the structure is in the form of a circular wafer.

[0046] In other cases, particularly when the intermediate layer dielectric layer 3 is relatively thin, for example, less than 200 nm, it may be desirable to limit the stress applied by the tension of the silicon nitride barrier layer 5. This can be achieved by forming the barrier layer 5 from a non-stoichiometric nitride rich in Si compared to stoichiometric silicon nitride so as to reduce its voltage. The refractive index of this type of nitride exceeds 2.02 at 633 nm and tends towards 2.1, 2.2, or even 2.3.

[0047] Very generally, referring to FIG. 3, the structure 1 can be fabricated by a manufacturing method that includes the following. - Providing a support 2 having a charge trap layer 2b disposed near the surface; - Forming a first dielectric layer 31 on the "main" surface of the support 2; - Forming a silicon nitride barrier layer 5 on and in contact with the first dielectric layer 31; - Forming a second dielectric layer 32 on and in contact with the barrier layer 5; - Assembling the main surface of the support and the main surface of the donor substrate to form an intermediate structure; - Removing a part of the donor substrate from the intermediate structure to define a thin layer 4 on the support 2.

[0048] In this way, the first dielectric layer 31, the barrier layer 5, and the second dielectric layer 32 are sequentially applied to the support 2. As mentioned above, the thickness and / or stoichiometry of the barrier layer 5 can be adjusted to limit the deformation of the support 2 after the support 2 receives the stack. In this way, the main surfaces of the donor substrate and the support are flat, which is advantageous for their close contact, thus facilitating the assembly step.

[0049] The "donor substrate" refers to a substrate made of the material of the thin film 4 or a substrate including the surface thickness of this material. For example, the donor substrate can be a single crystal silicon bulk substrate, a lithium tantalate or lithium niobate bulk substrate, or a composite substrate composed of a first substrate to which a layer of lithium tantalate or lithium niobate or other lithium-based material (at least equal to the layer of the thin layer 4) is applied on top.

[0050] The dielectric layers constituting the intermediate layer dielectric layer 3 can be fabricated, for example, by deposition using the LPCVD ("low pressure chemical vapor deposition") or PECVD ("plasma enhanced chemical vapor deposition") method. As already mentioned, the LPCVD method may be preferred in that the hydrogen incorporated into the formed layer tends to be less than that of the PECVD method.

[0051] The first dielectric layer 31 and / or the second dielectric layer 32 can be made of silicon oxide or silicon oxynitride.

[0052] When deposited with silicon oxide or silicon oxynitride, the stack of this layer can be produced in situ in the same deposition equipment without removing the support from the equipment, which is an interesting possibility from the perspective of production speed.

[0053] The use of this in situ technique is particularly interesting when the first dielectric layer 31 and the second dielectric layer 32 are made of silicon oxynitride incorporating nitrogen with a variable nitrogen / oxygen ratio increasing in the direction of the silicon nitride barrier layer 5. The incorporation of nitrogen into the equipment can be controlled by varying its concentration when different layers of the stack are constructed.

[0054] Alternatively, when the trap layer 2b is made of silicon, the first dielectric layer 31 made of silicon oxide can be obtained by oxidizing the trap layer 2b. Such a process can be carried out by exposing the support 2 provided with the trap layer 2b in an oxygen-rich atmosphere in an oxidation furnace to a temperature strictly between 700 °C and 1000 °C. This can be a dry atmosphere or a wet atmosphere. The duration of this exposure is selected according to the desired thickness of the first dielectric layer, as is well known per se. Generally, it is preferable to limit the oxidation temperature to 900 °C in order to avoid any risk of recrystallization of the trap layer 2b. In this method, after oxidation, it is preferable to perform a polishing step on the oxidized surface to facilitate the subsequent assembly of the donor substrate and the support substrate 2.

[0055] A surface dielectric layer 41 can be provided on the main surface of the donor substrate before assembling it to the support 2. As already mentioned, the presence of this surface dielectric layer facilitates the subsequent assembly step between the donor substrate and the second dielectric layer 32 present on the support 2.

[0056] The assembly step is advantageously carried out by molecular adhesion. During the molecular adhesion method, the exposed surfaces of the support 2 (second dielectric layer) and the donor substrate (which may be formed from a surface dielectric layer in some cases), which are completely clean, flat, and smooth, are brought into close contact with each other, as is well known per se, to promote the formation of, for example, van der Waals type or covalent molecular bonds. Next, the two bodies are assembled without using an adhesive. These bonds can be strengthened by applying a heat treatment to the intermediate structure.

[0057] The step of removing a part of the donor substrate can be carried out by chemically and mechanically thinning this substrate. Preferably, structure 1 is manufactured by applying the Smart Cut (trademark) technology, according to which the layer intended to form the thin layer 4 is delimited by a weakened plane formed by the implantation of light species (typically hydrogen and / or helium) into the donor substrate. After the assembly step, this layer is removed from the donor substrate by breaking along the weakened plane and is thus transferred to the support 2.

[0058] Regardless of whether the removal of a part of the thickness of the donor substrate is achieved by thinning or breaking, any type of finishing treatment can be applied to the structure 1 thus formed to adapt the thin layer 4 to the specifications of thickness, thickness uniformity, roughness, or any other type of specification.

[0059] Naturally, the present invention is not limited to the described embodiments, and variant embodiments can be added thereto without departing from the scope of the present invention as defined by the claims.

Claims

1. A method for manufacturing a structure (1) comprising a thin layer (4) formed from a lithium-based material and transferred onto a support (2) via an intermediate dielectric layer (3) comprising a first dielectric layer (31), a silicon nitride barrier layer (5), and a second dielectric layer (32), wherein the support comprises a charge trap layer (2b) located near the surface on a base substrate (2a) on the thin layer (4) side, and the manufacturing method is as follows: - Forming the first dielectric layer (31) on the trap layer (2b) disposed on the main surface of the support, - The silicon nitride barrier layer (5) is formed on the first dielectric layer (31) and in contact with the first dielectric layer (31), with a thickness of 20% to 30% of the thickness of the dielectric intermediate layer (3), and at least 20 nm. - The second dielectric layer (32) is formed on the barrier layer (5) and in contact with the barrier layer (5), - The main surface of the support (2) and the main surface of the donor substrate are assembled to form an intermediate structure, - Removing a portion of the donor substrate from the intermediate structure and defining the thin layer (4) on the support (2), A manufacturing method that includes the following features.

2. The manufacturing method according to claim 1, wherein the donor substrate includes a single-crystal piezoelectric material.

3. The manufacturing method according to claim 1 or 2, wherein the trap layer (2b) is made from polycrystalline silicon.

4. The manufacturing method according to claim 1, wherein a surface dielectric layer (41) is provided on the main surface of the donor substrate and before its assembly to the support (2).

5. The manufacturing method according to claim 1, wherein the first dielectric layer (31) and the second dielectric layer (32) are composed of silicon oxide or silicon oxynitride.

6. The manufacturing method according to claim 5, wherein the first dielectric layer (31) and the second dielectric layer (32) are made from silicon oxynitride incorporating nitrogen at a variable nitrogen / oxygen ratio that increases in the direction of the barrier layer (5).

7. The manufacturing method according to claim 5, wherein the stack formed by the first dielectric layer (31), the barrier layer (5), and the second dielectric layer (32) is deposited on the support (2) by in situ deposition in a chamber using the LPCVD method.

8. The manufacturing method according to claim 1, wherein the formation of the first dielectric layer (31) includes oxidation of the trap layer (2b).

9. A structure (1) comprising a support (2) formed from a charge trap layer (2b) disposed near the surface of a base substrate (2a), and a thin layer (4) formed from a lithium-based material and transferred onto the support (2), wherein the structure (1) comprises an intermediate dielectric layer (3) disposed between the support (2) and the thin layer (4) and in contact with the support (2) and the thin layer (4), and the structure wherein the intermediate dielectric layer is a. A first dielectric layer (31) disposed on the trap layer (2b) and in contact with the trap layer (2b), b. A silicon nitride barrier layer (5) is placed on the first dielectric layer (31) and in contact with the first dielectric layer (31), with a thickness of at least 20 nm, which is 20% to 30% of the thickness of the dielectric intermediate layer (3), c. A structure characterized by comprising a second dielectric layer (32) on and in contact with the barrier layer (5).

10. The structure according to claim 9, wherein the trap layer (2b) is made from polycrystalline silicon.

11. The structure according to claim 9 or 10, wherein the trap layer (2b) has a thickness of less than 0.5 micrometers.

12. The structure according to claim 9, wherein the thin film (4) is made of a single-crystal piezoelectric material.

13. The structure according to claim 9, wherein the first dielectric layer (31) and the second dielectric layer (32) are composed of silicon oxide or silicon oxynitride.

14. The structure according to claim 9, wherein the first dielectric layer (32) and the second dielectric layer (32) are made of silicon oxynitride incorporating nitrogen at a variable nitrogen / oxygen ratio that increases in the direction of the barrier layer (5).

15. The structure according to claim 9, taking the form of a circular wafer having a diameter of 200 mm or less and a curvature of less than 100 micrometers.

16. The structure according to claim 9, wherein the intermediate dielectric layer (3) has a thickness of more than 200 nm.

17. The structure according to claim 9, wherein the barrier layer (5) is composed of non-stoichiometric silicon nitride.

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