Multimode power converter with shared components

The integration of adiabatic charge pumps and inductive buck converters in a shared component configuration addresses the need for compact and efficient battery management systems by optimizing component sharing and operation modes.

JP2025527305APending Publication Date: 2025-08-20MURATA MFG CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
JP2025506975
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-12-23
Filing Date
2023-07-14
Publication Date
2025-08-20

AI Technical Summary

Technical Problem

Existing battery management systems require multiple components, leading to increased size and complexity, while maintaining circuit performance is essential.

Method used

A power converter circuit design that integrates an adiabatic charge pump and an inductive buck converter, sharing components like power switches, fly capacitors, or inductors, allowing operation in different modes to optimize performance and efficiency.

Benefits of technology

The integrated design reduces component count, minimizing IC size while maintaining circuit performance and efficiency, particularly in battery management systems.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025527305000001_ABST
    Figure 2025527305000001_ABST
Patent Text Reader

Abstract

A battery management circuit can be implemented with fewer components than conventional designs while maintaining performance. An embodiment includes a power converter having an adiabatic charge pump circuit connected to a battery interface circuit via a first inductor and an inductive buck converter circuit connected to the battery interface circuit via a second inductor. In a first mode of operation, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated. In a second mode of operation, the adiabatic charge pump circuit is activated and the inductive buck converter circuit is deactivated. The adiabatic charge pump circuit and the inductive buck converter circuit share at least one of (1) a power switch coupled to a voltage source terminal and a reference potential terminal, (2) at least one fly capacitor, or (3) a first inductor with the battery interface circuit.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Application No. 63 / 395,582, filed August 5, 2022, and U.S. Provisional Application No. 63 / 435,119, filed December 23, 2022, the contents of both applications being incorporated herein by reference in their entirety.

[0002] The present invention relates to electronic circuits, and more particularly to power converter circuits including DC-DC power converter circuits and battery management systems. [Background technology]

[0003] Many electronic products, particularly mobile computing and / or communication products and components (e.g., mobile phones, notebook computers, ultrabook computers, tablet devices, LCD and LED displays), require multiple voltage levels. For example, power amplifiers in radio frequency (RF) transmitters may require relatively high voltages (e.g., 12 V or higher), while logic circuitry may require lower voltage levels (e.g., 1-3 V). Still other circuitry may require intermediate voltage levels (e.g., 5-10 V).

[0004] Direct current (DC) power converters are often used to generate lower or higher voltages from common power sources such as batteries, solar cells, and rectified alternating current (AC) sources. Power converters that generate lower output voltage levels from power sources with higher input voltages are commonly known as buck converters, and are so called because the output voltage V OUT is the input voltage V IN is smaller than V, and therefore the converter is "bucking" the input voltage. A power converter that produces a higher output voltage level from a power source with a lower input voltage will OUT VIN Because the voltage is greater than 1 V, they are commonly known as boost converters. Some power converters can be either buck or boost converters, depending on the specific configuration, such as which terminals are used for input and output. Some coulomb converters can provide an inverted output.

[0005] Modern devices, particularly mobile devices (e.g., mobile phones), often require sophisticated battery management systems to optimize device usage time and battery life while preventing battery overcharging and thermal degradation. It is known that such battery management systems utilize two different types of power converters to both charge the device's battery and provide the device with a system voltage.

[0006] One type of DC power converter, known as an inductive power converter, converts V IN From V OUT In some embodiments, the inductive power converter may be implemented as a multi-level inductive power converter. Another type of DC power converter, known as an adiabatic charge pump, uses controlled switches to transfer charge to V IN From V OUT Adiabatic charge pumps typically comprise a charge-transfer capacitor as an energy storage element and a relatively small output inductor connected to transfer charge to the fly capacitor. Either type of charge-transfer capacitor is commonly known as a "fly capacitor" or a "pump capacitor." Each time the fly capacitor is used (i.e., not bypassed), electrical energy flowing through it generally charges or discharges the fly capacitor. Multilevel power converters and adiabatic charge pumps may have similar topologies in some configurations, but differ in the amount of inductance required for optimal performance and efficiency.

[0007] FIG. 1A is a schematic diagram of an example of a prior art adiabatic two-phase three-level charge pump 100. The first phase subcircuit is connected to an input voltage V IN and the node L between switches S2 and S3. X The switches S1 and S2 are connected in series between the X and a reference potential (e.g., circuit ground), a fly capacitor C1 connected as shown between switch pair S1-S2 and switch pair S3-S4, and a node L X and V OUT A relatively small (e.g., about 1 nH to several hundred nH depending on the power level) shared inductor L connected between the output terminals of S ("S" stands for "small"). The second phase subcircuit is V IN and the node L between the input terminal of the switch S2' and the switch S3' X The switches S1' and S2' connected in series between the X and a reference potential; a fly capacitor C1' connected as shown between switch pairs S1'-S2' and S3'-S4'; and a node L X and V OUT The shared inductor L connected between the output terminals of S A smoothing capacitor C0 is connected between the output terminal and a reference potential. In operation, switches S1 and S3 are connected to the clock signal

number

number

number

number

number

[0008] FIG. 1B is a schematic diagram of an example of a prior art three-level inductive buck converter 102. A set of four switches S1-S4 connects V IN and circuit ground. A fly capacitor C1 is connected in series with switches S1 and S4 and in parallel with switches S2 and S3. A relatively large inductor L B ("B" stands for "big") is connected to the output capacitor C0, and the node L between the switches S2 and S3 X Connected to the inductor L B is usually the inductor L S The inductance of the output capacitor C0 is approximately 2 to 100 times greater than that of the output terminal. OUT can be obtained as:

[0009] In the illustrated example, the presence of a single fly capacitor C1 causes the X In this case, 0V (GND), V IN , or V IN / 2, allowing four switch states (in two different ways) that each generate one of three voltage levels: L XIn the first switch state, which defines a voltage level of Level 1 at node 1, switches S3 and S4 are closed and switches S1 and S2 are open, essentially bypassing C1 and L X Connect to the circuit ground (L X voltage level = GND). X In the second switch state, which defines a voltage level of Level 3 at node 1, switches S3 and S4 are open and switches S1 and S2 are closed, again essentially bypassing C1 and L X V IN Connect to (L X Voltage level = V IN ).

[0010] L X In the third switch state, which defines a voltage level of Level 2 at node S1, switches S2 and S4 are open and switches S1 and S3 are closed, driving C1 to V IN From L X This connects the inductor L S C1 is charged with a current of approximately V IN / 2, and L X The voltage level at IN is equal to / 2. X In the fourth switch state, which also defines a voltage level of Level 2 at node S1, switches S2 and S4 are closed and switches S1 and S3 are open, connecting C1 to L X from the load to GND, which reduces the inductor L S C1 is discharged with a current of approximately V IN / 2, and L X The voltage level at IN / 2 (this assumes that C1 was previously charged in state 3). Therefore, the inductive buck converter 102 shown in the figure is X The voltage level of level 2 at node V IN The output voltage V is controlled by switching between two switch states using a pulse-width modulated (PWM) control signal from a controller (not shown). OUT This can be achieved.

[0011] While many different architectures for battery management systems have been proposed or implemented, there is a need for circuits and methods for more effective and efficient battery management. In particular, there is a need for battery management circuitry that can be implemented with fewer components (thereby reducing size) while maintaining circuit performance. The present invention addresses this need and others. Summary of the Invention [Problem to be solved by the invention]

[0012] The present invention encompasses battery management circuitry that can be implemented with fewer components (thereby reducing IC size) compared to conventional designs while maintaining circuit performance. [Means for solving the problem]

[0013] In general, the present invention comprises a power converter circuit having a first terminal for receiving a first voltage, a second terminal for providing a second voltage, a third terminal configured to be connected to a reference potential, a battery interface circuit connected to the second terminal and configured to be connected to the reference potential, an adiabatic charge pump circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a first inductor, and an inductive step-down converter circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a second inductor, wherein in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive step-down converter circuit is activated, and in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is activated and the inductive step-down converter circuit is deactivated, and the adiabatic charge pump circuit and the inductive step-down converter circuit share at least one of the following with the battery interface circuit: (1) a power switch connected to the first terminal and a power switch connected to the third terminal, (2) at least one fly capacitor, or (3) a first inductor.

[0014] The present invention also encompasses the combination of a Dickson charge pump with an inductive buck converter circuit, where all of the fly capacitors are shared, or where some of the fly capacitors are shared. S via the output capacitor C OUT The output current sensing circuit is coupled to a charge pump that provides charge to the

[0015] The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims. [Brief explanation of the drawings]

[0016] [Figure 1A] FIG. 1 is a schematic diagram of an example of a prior art adiabatic two-phase three-level charge pump. [Figure 1B] FIG. 1 is a schematic diagram of an example of a prior art three-level inductive buck converter. [Figure 2A] FIG. 1 is a block diagram illustrating a first exemplary battery management system. [Figure 2B] FIG. 2 is a block diagram illustrating a second exemplary battery management system. [Figure 3A] ~ [Figure 3B] 1A and 1B are graphs showing exemplary battery charging current and battery charging voltage, respectively. [Figure 4A] 1 is a schematic diagram of a first embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit; [Figure 4B] FIG. 4B is a schematic diagram of a first type of battery interface circuit used in FIG. 4A. [Figure 5] 1 is a schematic diagram of a first variant of a first embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit; [Figure 6A] FIG. 2 is a schematic diagram of a second variation of the first embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 6B] FIG. 6B is a schematic diagram of a second type of battery interface circuit used in FIG. 6A. [Figure 7] FIG. 10 is a schematic diagram of a third variation of the first embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 8] FIG. 1 is a schematic diagram of a second embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 9] FIG. 10 is a schematic diagram of a variation of the second embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 10] FIG. 10 is a schematic diagram of a third embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 11] FIG. 10 is a schematic diagram of a first variant of a third embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 12] FIG. 10 is a schematic diagram of a second variant of the third embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 13] FIG. 10 is a schematic diagram of a third variant of the third embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 14] FIG. 10 is a schematic diagram of a fourth embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 15] FIG. 10 is a schematic diagram of a fifth embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. [Figure 16] 1 is a schematic diagram of a first embodiment of a multi-level, multi-phase charge pump and inductive buck converter circuit suitable for use as a battery management system; [Figure 17] FIG. 1 is a schematic diagram of a second embodiment of a multi-level, multi-phase charge pump and inductive buck converter circuit suitable for use as a battery management system. [Figure 18] FIG. 10 is a schematic diagram of a third embodiment of a multi-level, multi-phase charge pump and inductive buck converter circuit suitable for use as a battery management system. [Figure 19] FIG. 19 is a schematic diagram of a prior art divide-by-four (4:1) dual-phase Dickson charge pump 1900. [Figure 20] FIG. 1 is a schematic diagram of a prior art five-level inductive buck converter. [Figure 21] 1 is a schematic diagram of a first embodiment of a charge pump and inductive buck power converter circuit based on a dual-phase 4:1 (5-level) Dickson charge pump and a two-phase 5-level inductive buck converter. [Figure 22]FIG. 1 is a schematic diagram of a second embodiment of a charge pump and inductive buck power converter circuit based on a dual-phase 4:1 (5-level) Dickson charge pump and a two-phase 5-level inductive buck converter. [Figure 23] FIG. 1 is a schematic diagram of an embodiment of a charge pump and inductive buck power converter circuit based on a dual-phase 4:1 (5-level) Dickson charge pump and a two-phase 3-level inductive buck converter. [Figure 24] 1A-1C show a set of exemplary graphs of output voltage and output current as a function of time for a conventional switched mode power supply; [Figure 25] 1 shows a set of exemplary graphs of output voltage and output current as a function of time for a charge pump that provides charge to an output capacitor COUT through an inductor LS. [Figure 26] FIG. 1 is a block diagram of a charge pump system including an output current sensing circuit. [Figure 27] 1 is a block diagram illustrating an example battery management system. [Figure 28] 1 is a top plan view of a substrate, which may be, for example, a printed circuit board or a chip module substrate (eg, a thin film tile). [Figure 29] 1 is a process flow diagram illustrating one method for converting a first voltage to a second voltage. DETAILED DESCRIPTION OF THE INVENTION

[0017] Like reference numbers and / or designations in the various drawings generally indicate like elements, unless context dictates otherwise.

[0018] The present invention includes battery management circuitry that can provide a more compact and efficient solution.

[0019] Battery Management System Before considering the preferred circuits that combine the novel charge pump and inductive buck converter disclosed below, it may be useful to better understand a novel example of a battery management system in which such a circuit may be particularly useful.

[0020] 2A is a block diagram illustrating a first example battery management system 200. The battery management system 200 may, for example, provide one or more system loads 202 (e.g., a smartphone, laptop, tablet computer, etc.) with a voltage V SYS In the illustrated example, the battery management system 200 may receive power via a wired power path 204 (e.g., USB-C, etc.) to maintain internal circuitry and / or to help charge the battery 206. The wired power path 204 may be connected to an AC / DC adapter 208a external to the battery management system 200. In some embodiments, the wired power path 204 may be replaced or supplemented by a wireless power path comprising an external wireless interface 210a connected to the AC / DC adapter 208b and an internal wireless interface 210b. The external wireless interface 210a and the internal wireless interface 210b may be components compliant with, for example, the Qi inductive wireless power transfer standard. The internal wireless interface 210b may also include power conditioning circuitry, such as a low-dropout (LDO) DC linear voltage regulator circuit. A selector switch 212 selects the internal voltage V IN , an AC / DC adapter 208a or an internal wireless interface 210b may be selected to provide

[0021] Voltage V IN are shown connected to the input of a charge pump 214 and to the input of an inductive step-down converter 216, each of which outputs a respective converted voltage V OUT_CP , V OUT_BK In the example shown, the output V of the inductive buck converter 216 OUT_BK is applied to the system load 202 by the system voltage V SYSand switch M to provide charge to battery 206. BAT 218 (e.g., a field effect transistor) to the battery 206. BAT 218 is V OUT_BK selectively applies a voltage V to the system load 202 when the battery management system 200 is not connected to the AC / DC adapter 208. BAT In the illustrated example, the output of the charge pump 214 is connected directly to the battery 206 to provide charge to the battery 206.

[0022] In the example shown, the LC filter 220 is V SYS Connected to the line. Switch M BAT When 218 is on, its state is higher capacitance (V SYS V SYS Adding an LC filter 220 connected to the line decouples the capacitance associated with the system load 202 and improves the efficiency of the charge pump 214 when the charge pump 214 does not have an inductive element. Redistribution losses in a charge pump are a function of the fly capacitance and the output capacitance. Efficiency can be improved by increasing the fly capacitance and / or lowering the output capacitance. The drawback of increasing the fly capacitance can be increased size, and the drawback of lowering the output capacitance is increased ripple at the output. The LC filter 220 can remove output voltage ripple without sacrificing efficiency. There may be other optimal locations where the LC filter can be placed.

[0023] In some embodiments, switches within the charge pump 214 and the inductive buck converter 216 control the voltage V IN , may be used to select AC / DC adapter 208a or internal wireless interface 210b to provide a power supply, thereby allowing selector switch 212 to be omitted.

[0024] 2B is a block diagram of a second exemplary battery management system 200′. In most respects, similar to the first exemplary battery management system 200 of FIG. 2A, the respective outputs V of the charge pump 214 and the inductive buck converter 216 are OUT_CP , V OUT_BK is the system voltage V SYS and switch M to provide charge to battery 206. BAT 218 may be selectively connected to the battery 206. BAT 218 is V OUT_CP and V OUT_BK Selectively applies voltage V to the system load 202 when BAT It also plays a role in providing

[0025] 2A and 2B, controller 222 provides control signals to charge pump 214, inductive buck converter 216, selector switch 212, and (optionally) AC / DC adapter 208, and / or internal wireless interface 210b to control the operation of these components in a known manner. For example, the operation of a non-adiabatic charge pump power converter is described in U.S. Pat. No. 10,263,514 B1, entitled "Selectable Conversion Ratio DC-DC Converter," issued on April 16, 2019, which is assigned to the assignee of the present invention and incorporated herein by reference. The operation of an adiabatic charge pump power converter is described in U.S. Pat. No. 11,075,576 B2, entitled "Apparatus and Method for Efficient Shutdown of Adiabatic Charge Pumps," issued on July 27, 2021, which is assigned to the assignee of the present invention and incorporated herein by reference. The operation of an inductive buck power converter is described in U.S. Pat. No. 10,424,564 B2, entitled "Power Converters with Integrated Capacitors," issued Jun. 3, 2014, which is assigned to the assignee of the present invention and incorporated herein by reference.

[0026] It is common for the charge pump 214 and the inductive step-down converter 216 to be implemented on separate integrated circuit (IC) chips connected to respective external flyback capacitors and inductors. While the battery 206 is illustrated as being included in the battery management system 200, 200', it should be noted that the battery 206 may be an external component configured to be connected to the illustrated battery management system 200, 200' circuitry via an appropriate terminal or node BATT.

[0027] Battery Charge Management Optimizing device usage time and battery life while preventing battery overcharging and thermal degradation can be complex and often involves different types of charging phases to accommodate the charge / discharge, aging, and other characteristics of specific battery types (e.g., lithium ion, lithium polymer, etc.). For example, these phases may include trickle charge, pre-charge, constant current (CC), and / or constant voltage (CV) or ramp-down phases. During these or similar charging phases, the battery management system may monitor one or more applicable temperatures, for example, and may reduce the charging current if a particular monitored temperature meets or exceeds a specified threshold. A battery management system, including both a charge pump and an inductive buck converter, may select one or other (or both) power converters and the output characteristics of the selected power converter that best match the battery's needs at that moment.

[0028] 3A and 3B show graphs of exemplary battery charging current and battery charging voltage, respectively. Also referring to the respective embedded tables 302a and 302b, the inductive buck converter (BK) draws trickle current I during the trickle charge phase. TC During the pre-charge phase, the battery is charged with a pre-charge current I PC When the battery voltage reaches the first threshold V CC1 When the battery exceeds the first fast charge constant current I from BK, CC1 When the battery voltage exceeds a second threshold V CC2 When the battery exceeds this threshold, a second constant fast charge current, I, is applied from the charge pump (CP). CC2 If the battery voltage is V REG When V is reached, the battery REG The charging current from the CP may be kept constant at I and may taper off as the battery approaches full charge. The point at which the switch from CP operation to BK operation occurs during the constant voltage (tapering) phase may be determined by various trigger points, such as time, voltage, or current. TERMWhen Z1 is reached, charging is complete. In some examples, the battery management system may not need to traverse all zones (Z1-Z6) to complete battery charging and may therefore skip certain zones. In some applications, additional zones may be added.

[0029] Below are several embodiments of combined charge pump and inductive buck converter circuits suitable for use in battery management circuits, and variations of such embodiments. Each circuit can be switched between CP and BK modes of operation. Switching between CP and BK modes of operation is controlled in a known manner by a system controller to select various current and voltage battery charging modes, such as those shown in Figures 3A and 3B, adding only the control signals necessary to reconfigure the circuitry of a particular embodiment to activate or deactivate the CP and BK circuitry.

[0030] The exemplary battery management system shown in FIGS. 2A and 2B, when adapted to use any of the combined charge pump and inductive buck converter circuits disclosed below, may be particularly useful in a variety of applications, such as: (1) flash charging systems capable of providing high power (tens to hundreds of kilowatts); and (2) applications that may require a programmable power supply (PPS), such as the USB-PPS standard, which allows for step-wise changes in current and voltage.

[0031] First embodiment 4A is a schematic diagram of a first embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. Two stacks of series-connected power switches, S1-S4 and S5-S8, are connected to V INand a reference terminal REF configured to be connected to a reference potential (e.g., circuit ground). The power switches may be implemented using, for example, field-effect transistors (FETs). As shown, a first fly capacitor C1 is connected between switch pairs S1-S2 and S3-S4, and a second fly capacitor C2 is connected between switch pairs S5-S6 and S7-S8. A relatively small inductor L S is connected between the switch pair S6-S7 and a first type battery interface (BI1) circuit 402, and the circuit 402 is connected to V SYS The relatively large inductor L B (For example, L S An inductance (2 to 100 times the inductance of the switch pair S2 to S3) is connected between the switch pair S2 and S3 and the BI1 circuit 402.

[0032] 4B is a schematic diagram of a first type of battery interface circuit 402 used in FIG. 4A. A relatively large inductor L B is V SYS output terminal, output capacitor C OUT , and transistor M BAT connected to the first end of the conduction channel of the transistor M BAT The second end of the conduction channel is connected to the shared battery capacitor C BAT and the battery 404. A relatively small inductor L S Also, the shared battery capacitor C BAT , battery 404, and transistor M BAT In some applications, during operation of the CP circuitry, the second end of the conduction channel of transistor M BAT When is on, the relatively small inductor L S is the output capacitor C OUT and V SYS may be connected to the output terminal of

[0033] The first type of battery interface circuit 402 is B and L SEach input, reference potential terminal (e.g., to circuit ground), and V SYS The battery interface circuit 402 may be modeled as a four-terminal block having an output terminal of . The embodiments described below utilize a first type of battery interface circuit 402.

[0034] Referring again to FIG. 4A, the BK circuit section includes switches S1 to S4, a fly capacitor C1, an inductor L B , and BI1 circuit 402t. The presence of fly capacitor C1 allows the buck converter circuitry to operate as a three-level inductive buck converter. During BK operation, switches S5-S8 are open (thereby deactivating the charge pump circuitry) and switches S1-S4 operate as described above in connection with FIG. 1B.

[0035] The components that make up the CP circuit section include switches S5 to S8, a fly capacitor C2, and an inductor L S , and BI1 circuit 402. During CP operation, switches S1-S4 are opened (thereby deactivating the BK circuit portion) and switches S5-S8 operate as described above for one phase in FIG. 1A (switches S5-S8 correspond to switches S1-S4 in FIG. 1A).

[0036] In the illustrated embodiment, the BI1 circuit 402 is shared by the buck converter circuitry and the charge pump circuitry, and includes an output capacitor C OUT and a shared battery capacitor C BAT is the transistor M BAT When the output capacitor C OUT(keep in mind that is typically an external, off-chip component), which may save components and layout space or allow the use of smaller value components. Because the combined charge pump circuit and inductive buck converter circuit can be effectively controlled as separate circuits that share only the BI1 circuit 402, driving the various switches S1-S8 is straightforward.

[0037] Importantly, the inductor L B and L S are individually sized to optimize the performance, efficiency, and layout space of their circuits.

[0038] Table 1 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in Figure 4A. [Table 1]

[0039] First Modification of the First Embodiment Figure 5 is a schematic diagram of a first variation of the first embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. Similar in most respects to the circuit of Figure 4A, but with an added conductor 502 connecting switch pairs S1-S2 and S5-S6 as shown, and an added conductor 504 connecting switch pairs S3-S4 and S7-S8 as shown. The added conductors 502, 504 effectively connect capacitors C1 and C2 in parallel.

[0040] The components constituting the BK circuit section include switches S1 to S4, fly capacitors C1 and C2, and inductor L B, and BI1 circuit 402. During BK operation, switches S5-S8 are open (thereby deactivating the CP circuitry) and switches S1-S4 operate as described above in connection with FIG. 1B. Because the capacitances of parallel-connected capacitors are additive (e.g., capacitance of C1||C2=C1+C2), the presence of parallel-connected fly capacitors C1 and C2 allows the BK circuitry to operate as a three-level inductive buck converter, but with a larger fly capacitance or smaller capacitor components (or a combination of smaller capacitor components with a total capacitance greater than a single capacitor) compared to the circuit of FIG. 4A. In certain scenarios, one of capacitors C1, C2 may be omitted if the capacitance of the other capacitor is sufficiently large.

[0041] The CP circuit section includes switches S5 to S8, fly capacitors C1 and C2, and inductor L S , and BI1 circuit 402. During CP operation, switches S1-S4 are open (thereby deactivating the BK circuitry) and switches S5-S8 operate as described above for one phase of FIG. 1A (with switches S5-S8 corresponding to switches S1-S4 in FIG. 1A). Again, the presence of parallel-connected fly capacitors C1 and C2 allows the CP circuitry to operate as a charge pump, but with a larger fly capacitance or smaller capacitor components (or a combination of smaller capacitor components with a total capacitance greater than a single capacitor) compared to the circuit of FIG. 4A. As noted above, for certain applications, one of capacitors C1, C2 may be omitted if the capacitance of the other capacitor is sufficiently large.

[0042] Table 2 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. [Table 2]

[0043] Second Modification of the First Embodiment 6A is a schematic diagram of a second variation of the first embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. In most respects it is similar to the circuit of FIG. 4A, but with the addition of inductor L B is the inductor L S to a second type battery interface circuit (BI2) circuit 602 via

[0044] 6B is a schematic diagram of a second type of battery interface circuit 602 used in FIG. 6A. A relatively large inductor L B and a relatively small inductor L S In some configurations, B +L S As, in other configurations, L S +L B The inductor L is connected in series as B , L S Then V SYS output terminal, output capacitor C OUT , and transistor M BAT connected to the first end of the conduction channel of the transistor M BAT The second end of the conduction channel is connected to the shared battery capacitor C BAT and the battery 604. Transistor M BAT A low-resistance bypass switch S connected in parallel with BP0 In some applications, the transistor M BAT This capability may be used to provide a signal path with a lower resistance compared to the on state of transistor M. This capability may be particularly useful when the only power converter in operation is a charge pump circuit that directly charges battery 604. BAT The relatively high resistance of the transistor M reduces the overall efficiency. BAT is set to a closed (on) state when the connected charge pump is actively operating.

[0045] The second type of battery interface circuit 602 includes a series-connected inductor L B , L S input, a reference potential terminal (e.g., to circuit ground), and V SYS The battery interface circuit 602 may be modeled as a three-terminal block having an output terminal of . The embodiments described below utilize a second type of battery interface circuit 602.

[0046] It should be noted that the BI1 circuit 402 and the BI2 circuit 602 are slightly different variations of each other, and that the BI2 circuit 602 includes a bypass switch S BP0 The state of the small inductor L S Note that this can be used in all cases by connecting it to the BATT node and configuring it as BI1 circuit 402 (thereby making the circuit a four-terminal block).

[0047] The components that make up the BK circuit section include switches S1 to S4, a fly capacitor C1, and an inductor L B +L S , and BI2 circuit 602. During BK operation, switches S5-S8 are opened (thereby deactivating the CP circuitry) and switches S1-S4 are operated as described above in connection with FIG. 1B. Inductor L B and L S The series connection of the inductor L B 4A (approximately L S This allows the inductor to have a smaller inductance (by the inductance of B can be a physically smaller component than the embodiment of FIG. 4A. For example, the inductor L in the circuit of FIG. B But, L S If the inductance is about 10 times larger than that of L S The inductance of L B This adds to the inductance of the inductor L in the circuit of Figure 6A. B L STherefore, the inductance required is only about nine times that of the

[0048] The components that make up the CP circuit section include switches S5 to S8, a fly capacitor C2, and an inductor L S , and BI1 circuit 602. During CP operation, switches S1-S4 are opened (thereby deactivating the BK circuit portion) and switches S5-S8 operate as described above for one phase in FIG. 1A (switches S5-S8 correspond to switches S1-S4 in FIG. 1A).

[0049] Table 3 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in Figure 6A. [Table 3]

[0050] Third Modification of the First Embodiment Figure 7 is a schematic diagram of a third variation of the first embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. Similar in most respects to the circuit of Figure 6A, an additional conductor 702 connects switch pairs S1-S2 and S5-S6 as shown, and an additional conductor 704 connects switch pairs S3-S4 and S7-S8 as shown. As with the circuit of Figure 5, the additional conductors 702, 704 effectively connect capacitors C1 and C2 in parallel.

[0051] The components constituting the BK circuit section include switches S1 to S4, fly capacitors C1 and C2, and inductor L B +L S , as well as BI2 circuit 602. During BK operation, switches S5-S8 are opened (thereby deactivating the CP circuitry) and switches S1-S4 are operated as described above in connection with FIG. 1B. Inductor L B and L S The series connection of the inductor L B 4A (approximately L SThis allows the inductor to have a smaller inductance (by the inductance of B can be physically smaller components than the embodiment of Figure 4A. The presence of fly capacitors C1 and C2 allows the BK circuitry to operate as a three-level inductive buck converter, but with components that have higher fly capacitance or smaller capacitors (or a combination of smaller capacitor components with a total capacitance greater than a single capacitor) compared to the circuit of Figure 4A.

[0052] The CP circuit section includes switches S5 to S8, fly capacitors C1 and C2, and inductor L S , as well as BI1 circuit 602. During CP operation, switches S1-S4 are opened (thereby deactivating the BK circuitry) and switches S5-S8 operate as described above for one phase in FIG. 1A (switches S5-S8 correspond to switches S1-S4 in FIG. 1A).

[0053] Table 4 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. [Table 4]

[0054] Second embodiment 8 is a schematic diagram of a second embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. A single stack of series-connected power switches S1-S4 provides a IN A flyback capacitor C1 is connected between the switch pairs S1-S2 and S3-S4 as shown. A relatively small inductor L S However, the switch pair S2 to S3 and the relatively large inductor L B (For example, L S (2 to 100 times the inductance of the inductor L) Bis connected to the BI2 circuit 602. The bypass switch S BP But the inductor L B Connected in parallel with the bypass switch S BP When is closed, the inductance between the switch pair S2-S3 and the BI2 circuit 602 is L S Only the bypass switch S BP When the switch pair S2-S3 is open, the inductance between the BI2 circuit 602 is L S +L B is.

[0055] The components that make up the BK circuit section include switches S1 to S4, a fly capacitor C1, and an inductor L S +L B (Bypass switch S BP is open), and BI2 circuit 602. The presence of fly capacitor C1 allows the buck converter circuitry to operate as a three-level inductive buck converter. During BK operation, bypass switch S BP is opened (thus L B from affecting the circuit), and switches S1-S4 operate as described above in connection with FIG. 1B.

[0056] The CP circuit section is made up of switches S1 to S4, a fly capacitor C1, and an inductor L S (Bypass switch S BP is closed), and BI2 circuit 602. During CP operation, switches S1-S4 are operated as described above for one phase in FIG. 1A (switches S1-S4 correspond to switches S1-S4 in FIG. 1A).

[0057] Notably, the embodiment of FIG. 8 allows for significant component sharing compared to the embodiment of FIG. 4A, with half the power switches (S1-S4 compared to S1-S8) and one less capacitor (no C2). Additionally, the inductor L B and L S The series connection of the inductor L B4A (approximately L S This allows the inductor to have a smaller inductance (by the inductance of B can be a physically smaller component than the embodiment of FIG. 4A.

[0058] Table 5 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. [Table 5]

[0059] Modification of the second embodiment 9 is a schematic diagram of a variation of the second embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. The illustrated example allows for a two-phase charge pump during CP mode. A dual parallel stack of series switches, S1-S4, S1'-S4', connects V IN As shown, fly capacitors C1 and C1' are connected between switch pairs S1-S2 and S3-S4, and between switch pairs S1'-S2' and S3'-S4', respectively. A relatively small inductor L S , L S ', switch pairs S2 to S3, S2' to S3', and a relatively large inductor L B (For example, L S (2 to 100 times the inductance of the inductor L) B is connected to the BI2 circuit 602. In some embodiments, a small inductor L S , L S The pair of inductors L' is shown in Figure 1A. B and both nodes L X and L X A single inductor L connected between S may be replaced by

[0060] Bypass Switch S BP But the inductor L BConnected in parallel with the bypass switch S BP When the switches S2-S3 and S2'-S3' are closed, the inductances between the BI2 circuit 602 and the switch pairs S2-S3 and S2'-S3' are respectively L S , L S Bypass switch S BP When the switches S2 to S3 and S2' to S3' are open, the inductances between the BI2 circuit 602 and the switch pairs S2 to S3 and S2' to S3' are respectively L S +L B , L S '+L B is.

[0061] The components constituting the BK circuit section include switches S1 to S4, S1' to S4', fly capacitors C1 and C1', and inductor L S +L B and L S '+L B (Bypass switch S BP is open), as well as the BI2 circuit 602. The presence of fly capacitors C1 and C1' allows the BK circuitry to operate as a three-level inductive buck converter. During BK operation, the bypass switch S BP are opened (thereby deactivating the charge pump circuitry), and switches S1-S4, S1'-S4' may be operated as described above in connection with FIG. 1B, with corresponding switches (S1 and S1', S2 and S2', S3 and S3', and S4 and S4') operating in unison rather than in opposite phase settings as in CP mode operation. Thus, during BK operation, the BK circuitry may effectively have two parallel legs operating simultaneously and in phase, i.e., a dual-leg BK circuit configuration. Alternatively, two separate pairs of inductors L S , L S ', and L B , L B When using '(L B ' not shown), the BK circuitry may be operated out of phase (in embodiments with only one inductor, L S , BK operations must be performed in phase).

[0062] The CP circuit section includes switches S1 to S4, S1' to S4', fly capacitors C1 and C1', and inductor L. S , L S Bypass Switch S BP 1A. Thus, corresponding switches (S1 and S1', S2 and S2', S3 and S3', and S4 and S4') are operated in opposite phase settings. Alternatively, these switches may be operated in phase.

[0063] Table 6 below shows the dual small inductor L S , L S 10 summarizes the configuration of the CP and BK circuitry of the embodiment shown in FIG. 9 when using the '. [Table 6]

[0064] Third embodiment 10 is a schematic diagram of a third embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. Series connected power switches S1, S2, S3 and S6 of a first functional stack are connected to V IN and the reference terminal of the first functional stack, and series switches S1, S4, S5 and S6 of the second functional stack are connected between the input terminal and the reference terminal of the second functional stack, so that switches S1 and S6 are shared between both functional stacks.

[0065] As shown, a fly capacitor C1 is connected between the shared switches S1 and S6. A relatively small inductor L S is connected between the switch pair S4-S5 and the BI1 circuit 402. A relatively large inductor L B (For example, L S An inductance (2 to 100 times the inductance of the switch pair S2 to S3) is connected between the switch pair S2 and S3 and the BI1 circuit 402.

[0066] The BK circuit section includes switches S1, S2, S3, and S6, a fly capacitor C1, and an inductor L B , and BI1 circuit 402. The presence of fly capacitor C1 allows the buck converter circuitry to operate as a three-level inductive buck converter. During BK operation, switches S4-S5 are open (thereby deactivating the charge pump circuitry) and switches S1, S2, S3, and S6 operate as described above in connection with FIG. 1B (switches S1, S2, S3, and S6 correspond to switches S1-S4 in FIG. 1B).

[0067] The components constituting the CP circuit section include switches S1, S4, S5, and S6, a fly capacitor C1, and an inductor L S , and BI1 circuit 402. During CP operation, switches S2-S3 are opened (thereby deactivating the BK circuit portion) and switches S1, S4, S5, and S6 operate as described above for one phase in FIG. 1A (switches S1, S4, S5, and S6 correspond to switches S1-S4 in FIG. 1A).

[0068] Notably, the embodiment of FIG. 10 allows for significant component sharing compared to the embodiment of FIG. 4A, with two fewer power switches (S1-S6 compared to S1-S8) and one less capacitor (no C2). Additionally, compared to the embodiment of FIG. 8, the bypass switch S BP By omitting the low resistance inductor L S This avoids adding additional output resistance to the

[0069] Although the embodiment of FIG. 10 is shown with capacitor C1, thereby enabling three-level BK operation, capacitor C1 may be effectively bypassed to configure this embodiment for two-level BK operation by either setting switches S1 and S6 always on during BK operation, or ganging switches S1 and S2 and switches S3 and S6 to always switch in unison during BK operation.

[0070] Table 7 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. 10 when enabled for three-level BK operation. [Table 7]

[0071] First Modification of the Third Embodiment 11 is a schematic diagram of a first variant of a third embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. In most respects it is similar to the circuit of FIG. 10, but with the addition of inductor L B However, as shown in the figure, the inductor L S 6. The BI2 circuit 602 is connected to the BI3 circuit 602 via the BI4 circuit

[0072] The components that make up the BK circuit are switches S1, S2, S3, S6, a fly capacitor C1, and an inductor L B +L S , and BI1 circuit 602. The presence of fly capacitor C1 allows the buck converter circuitry to operate as a three-level inductive buck converter. During BK operation, switches S4-S5 are open (thereby deactivating the charge pump circuitry) and switches S1, S2, S3, S6 operate as described above in connection with FIG. 1B (switches S1, S2, S3, S6 correspond to switches S1-S4 in FIG. 1B). Inductor L B and L S The series connection of the inductor L B 10 (approximately L S This allows the inductor to have a smaller inductance (by the inductance of B can be a physically smaller component than the embodiment of FIG.

[0073] The components that make up the CP circuit are switches S1, S4, S5, S6, a fly capacitor C1, and an inductor L S, and BI1 circuit 602. During CP operation, switches S2-S3 are opened (thereby deactivating the BK circuit portion) and switches S1, S4, S5, and S6 operate as described above for one phase in FIG. 1A (switches S1, S4, S5, and S6 correspond to switches S1-S4 in FIG. 1A).

[0074] Although the embodiment of FIG. 11 is shown with capacitor C1, thereby enabling three-level BK operation, capacitor C1 may be effectively bypassed to configure this embodiment for two-level BK operation by either setting switches S1 and S6 always on during BK operation, or ganging switches S1 and S2 and switches S3 and S6 to always switch in unison during BK operation.

[0075] Table 8 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. 11 when enabled for three-level BK operation. [Table 8]

[0076] Second Modification of the Third Embodiment 12 is a schematic diagram of a second variation of the third embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. In most respects, it is similar to the circuit of FIG. 10, but adds two switches S7, S8, and a second fly capacitor C2 to allow for four-level BK operation. More specifically, as shown, switch S7 connects V IN and the switch S1, a switch S8 is placed between the switch S6 and the reference terminal, and a capacitor C2 is connected in series between the switches S7 and S8.

[0077] The components that make up the BK circuit section include switches S1, S2, S3, S6, S7, and S8, fly capacitors C1 and C2, and inductor L B, and BI1 circuit 402. The presence of fly capacitors C1 and C2 allows the buck converter circuitry to operate as a four-level inductive buck converter. During BK operation, switches S4-S5 are open (thereby disabling the charge pump circuitry) and switches S1, S2, S3, S6, S7, and S8 operate in a manner known for multi-level buck converters. One method of operating a multi-level power converter is described in U.S. patent application Ser. No. 17 / 560,767, entitled "Controlling Charge-Balance and Transients in a Multi-Level Power Converter," filed Dec. 23, 2021, which is assigned to the assignee of the present invention and incorporated herein by reference.

[0078] The components constituting the CP circuit section include switches S1, S4, S5, S6, S7, and S8, fly capacitors C1 and C2, and inductor L S , and BI1 circuit 402. In a first mode of CP operation, switches S2-S3 are open (thereby disabling the BK circuitry), switches S7 and S8 are closed, and switches S1, S4, S5, and S6 operate as described above for one phase of FIG. 1A (switches S1, S4, S5, and S6 correspond to switches S1-S4 in FIG. 1A). The presence of fly capacitor C1 allows the CP circuitry to operate as a three-level (2:1) charge pump. In a second mode of CP operation, switches S2-S3 are open (thereby disabling the BK circuitry), and switches S1, S4-S8 balance all fly capacitors and V SYS To output the desired voltage at , the CP circuitry is operated in one of several possible known state sequences. The presence of fly capacitors C1 and C2 allows the CP circuitry to operate as a four-level (3:1) charge pump. In general, as the charge pump level increases, an increasing number of intermediate voltage states are required to balance all of the fly capacitors.

[0079] Note that allowing four-level BK and CP operation by adding capacitor C2 reduces the voltage across any one switch compared to the circuit configuration of FIG. 10, allowing for the use of smaller capacitors for C1 and C2 and lower voltage switches.

[0080] 10 and 11, lesser levels of BK operation (e.g., three-level or two-level) can be enabled by setting various switches always on or ganging them to effectively bypass one or both of the fly capacitors C1 and C2. For example, two-level operation can be achieved by either setting switches S1, S7 and S6, S8 always on during BK operation, or ganging switches S1, S2, S7 and switches S3, S6, S8 to always switch in unison during BK operation. Lesser levels of CP operation can be enabled in a similar manner.

[0081] Table 9 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. 12 when enabled for four-level BK and CP operation. [Table 9]

[0082] Third Modification of the Third Embodiment 13 is a schematic diagram of a third variation of the third embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. In most respects it is similar to the circuit of FIG. 10, but the illustrated example allows for a two-phase charge pump when in CP mode.

[0083] The dual parallel stacks of series switches S1, S4, S5, S6 and S1', S4', S5', S6' are connected to V INand the reference terminal. Flying capacitors C1 and C1' are connected between switch pairs S1 and S4 and S5 and S6, and between switch pairs S1' and S4' and S5' and S6', respectively, as shown. A relatively small shared inductor L S are connected between the BI1 circuit 402 and the switch pairs S4-S5 and S4'-S5'. As in FIG. 9, two separate small inductors L S and L S Note that a relatively large inductor L′ may be used in alternative embodiments of the circuit shown. B (For example, L S An inductance (2 to 100 times the inductance of the BI1 circuit 402) is connected between the BI1 circuit 402 and the switch pair S2 and S3.

[0084] The BK circuit section includes switches S1, S2, S3, and S6, a fly capacitor C1, and an inductor L B , and BI1 circuit 402. The presence of fly capacitor C1 allows the buck converter circuitry to operate as a three-level inductive buck converter. During BK operation, switches S4-S5, S4'-S5' are open (thereby deactivating the charge pump circuitry) and switches S1, S2, S3, and S6 operate as described above in connection with FIG. 1B (switches S1, S2, S3, and S6 correspond to switches S1-S4 in FIG. 1B).

[0085] The components constituting the two-phase CP circuit section include switches S1, S4, S5, S6, and S1', S4', S5', S6', fly capacitors C1, C1', and inductor L S , and BI1 circuit 402. During CP operation, switches S1, S4, S5, S6, and S1', S4', S5', S6' are operated as described above in connection with FIG. 1A (S1, S4, S5, S6, and S1', S4', S5', S6' correspond to S1-S4 and S1'-S4', respectively). Thus, corresponding switches (S1 and S1', S4 and S4', S4 and S4', and S6 and S6') are operated with opposite phase settings.

[0086] Table 10 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. [Table 10]

[0087] Fourth embodiment 14 is a schematic diagram of a fourth embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. The illustrated example allows for a two-phase charge pump in CP mode and dual shared fly capacitors in BK mode. The use of dual shared fly capacitors reduces voltage ripple at the output, thereby allowing for the use of lower voltage power switches.

[0088] A dual parallel stack of series-connected power switches S1-S4, S5-S8 is connected to V IN and a reference terminal. Series connected power switches S9 and S10 are connected in parallel with series connected switches S2 and S3, and series connected power switches S11 and S12 are connected in parallel with series connected switches S6 and S7. As shown, a fly capacitor C1 is connected in series between switches S1 and S4, and a fly capacitor C2 is connected in series between switches S5 and S8. As shown, a relatively small inductor L S are connected between both switch pairs S2-S3 and S6-S7 and the BI1 circuit 402. A relatively large inductor L B (For example, L S In this case, an inductance (2 to 100 times the inductance of the switch pairs S9 to S10 and S11 to S12) is connected between the BI1 circuit 402 and both the switch pairs S9 to S10 and S11 to S12.

[0089] In the illustrated example, the components constituting the BK circuit section essentially form two parallel BK circuits. The first parallel BK circuit section comprises switches S1, S9, S10, and S4, a fly capacitor C1, an inductor L B, and a BI1 circuit 402. The second parallel BK circuit section includes switches S5, S11, S12, and S8, a fly capacitor C2, an inductor L B , and BI1 circuit 402. The presence of fly capacitors C1 and C2 allows the parallel BK circuitry to operate as a three-level inductive step-down converter. During BK operation, switches S2-S3 and S6-S7 are open (thereby disabling the charge pump circuitry) and switch sets S1, S9, S10, and S4, and S5, S11, S12, and S8 operate as described above in connection with FIG. 1B (with switch sets S1, S9, S10, and S4, and S5, S11, S12, and S8 corresponding to switches S1-S4 in FIG. 1B).

[0090] In the illustrated example, the components constituting the CP circuitry essentially form two parallel CP circuits that generally operate in opposite phases (i.e., the CP circuitry may be operated as a two-phase charge pump). The components constituting the first phase CP circuitry include switches S1 to S4, a fly capacitor C1, and an inductor L. S , and a BI1 circuit 402. The components constituting the second-phase CP circuit section include switches S5 to S8, a fly capacitor C2, an inductor L S , and BI1 circuit 402. During CP operation, switches S9, S10, S11, and S12 are open (thereby deactivating the BK circuitry) and switch sets S1-S4 and S5-S8 operate in the phase interleaved manner described above with respect to Figure 1A (switches S5-S8 correspond to switches S1'-S4' in Figure 1A).

[0091] Although the embodiment of FIG. 14 is shown with two parallel BK circuits, each with its own capacitor C1, C2, thereby allowing for three-level BK operation, these capacitors may be effectively bypassed to configure this embodiment for two-level BK operation, for example, by ganging switches S9 and S11 and S10 and S12 to always switch in unison during BK operation.

[0092] Table 11 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. 14 when enabled for three-level BK operation. [Table 11]

[0093] In some embodiments, it may be useful to split the BK and CP circuitry between two different IC chips. In such cases, it may be useful to add "mirror" switches S1', S5', S4', and S8' (shown connected by dashed lines) that are essentially in conjunction with the respective switches S1, S5, S4, and S8. Thus, all of the switches in the BK circuitry (S1', S9, S10, S4, and S5', S11, S12, S8') may be fabricated on a first IC chip, and all of the switches in the CP circuitry (S1-S4 and S5-S8) may be fabricated on a second IC chip. In general, capacitors C1, C2, and inductor L B , L S may be off-chip components, and capacitors C1 and C2 are connected to both the BK IC chip and the CP IC chip.

[0094] Fifth embodiment 15 is a schematic diagram of a fifth embodiment of a combined charge pump and inductive buck converter circuit suitable for use in a battery management circuit. The illustrated example allows for a two-phase charge pump in CP mode and a shared inductor in BK mode.

[0095] The dual parallel stack of series-connected power switches S1-S4, S1'-S2' is connected to V IN and a reference terminal. A first fly capacitor C1 is connected in series between switches S1 and S4, and a second fly capacitor C2 is connected in series between switches S1' and S4'. A relatively small inductor L Sare connected between both switch pairs S2-S3 and S2'-S3' and the BI2 circuit 602. Therefore, the switches S1-S4, S1'-S4', the capacitors C1 and C2, and the inductor L S constitutes a two-phase charge pump.

[0096] Also, a set of series-connected power switches S5-S8 is connected between the input terminal and the reference terminal, and a third flyback capacitor C3 is connected in series between switches S5 and S8. B (For example, L S The inductance of the switches S5 to S8, the capacitor C3, and the inductor L B constitutes a three-level buck converter.

[0097] Inductor L B and L S The series connection of the inductor L B is directly connected to the output terminal, the inductor L B (approximately L S This allows the inductor to have a smaller inductance (by the inductance of B may be a physically smaller component than in such an embodiment.

[0098] During BK operation, switches S1 to S4 and S1' to S4' are opened (thereby deactivating the charge pump circuitry) and switches S5 to S8 operate as described above in connection with FIG. 1B (switches S5 to S8 correspond to switches S1 to S4 in FIG. 1B).

[0099] During CP operation, switches S5-S8 are open (thereby deactivating the BK circuitry) and switch sets S1-S4 and S1'-S4' are operated in the phase interleaved manner described above with respect to FIG. 1A.

[0100] Table 12 below summarizes the configuration of the CP and BK circuitry for the embodiment shown in FIG. [Table 12]

[0101] Multi-Level Embodiment As is evident from the above disclosure, various exemplary combined charge pump and inductive buck converter circuits can be readily adapted to multi-phase charge pump circuits and / or multi-level buck converter circuits (e.g., two-level, three-level, four-level, etc.). In various embodiments, the phrase "combined charge pump and inductive buck converter circuit" means that the combination of CP and BK circuitry may be allocated to one, two, or more IC chips that share components (switches, capacitors, inductors), as may be useful for a particular application. Many embodiments share one or more components between the CP and BK circuitry, resulting in reduced size (IC area) compared to conventional designs.

[0102] FIG. 16 is a schematic diagram of a first embodiment of a multilevel, multiphase charge pump and inductive buck converter circuit 1600 suitable for use as a battery management system. In the illustrated example, BK switch blocks 1602a and 1602b each include switches for implementing an N-level inductive buck converter, where N≧2. CP switch block 1604 includes switches for implementing an M-level adiabatic charge pump, where N≧3, and the charge pump may be single-phase or dual-phase. BK switch blocks 1602a and 1602b and CP switch block 1604 are connected in parallel to a sufficient number of sets of shared fly capacitors C to enable an N-level inductive buck converter and an M-level adiabatic charge pump (including shared fly capacitors C to correspond to the selected phase setting of CP switch block 1604). As an example, N may be 5, so that BK switch blocks 1602a and 1602b are configured for a 5-level buck converter, requiring three shared fly capacitors C each. With a shared fly capacitor C, the CP switch block 1604 may be configured as a 5-level charge pump, so M = 5. Note that Figure 14 is an example of Figure 16, where N = 3 and M = 3.

[0103] The output of the CP switch block 1604 is connected to a relatively small inductor L S The combined output of the BK switch blocks 1602a and 1602b is connected to the BI1 circuit 402 via a relatively large inductor L B (For example, L S (2 to 100 times the inductance of the inductor L B is connected to the BI1 circuit 402.

[0104] 17 is a schematic diagram of a second embodiment of a multi-level, multi-phase charge pump and inductive buck converter circuit 1700 suitable for use as a battery management system. While similar in many respects to the circuit 1600 shown in FIG. 16, the outputs of the BK switch blocks 1602a and 1602b and the CP switch block 1604 are connected differently. In particular, the outputs of the BK switch blocks 1602a and 1602b are connected to the relatively large inductors L B and inductor L B is a relatively small inductor L S The output of the CP switch block 1604 is also connected to the inductor L S and inductor L S is connected to the BI2 circuit 602. In general, transistor M BAT is set to the closed (on) state when the CP is in operation.

[0105] 18 is a schematic diagram of a third embodiment of a multi-level, multi-phase charge pump and inductive buck converter circuit 1800 suitable for use as a battery management system. In many respects it is similar to the circuit 1600 shown in FIG. 16, but with the addition of a fly capacitor C and small and large inductors L. S , L B are connected differently. Specifically, the BK switch blocks 1602a and 1602b and the CP switch block 1604 are connected in parallel to a set of shared fly capacitors C sufficient to allow for an N-level inductive buck converter. The CP switch block 1604 is connected in parallel to the same set of shared fly capacitors C (or some subset of those fly capacitors C) and may also be connected to some number of series-connected fly capacitors C that are not shared by the BK switch blocks 1602a and 1602b. In addition, the single large inductor L used in the circuit 1600 of FIG. B is connected in parallel with two smaller inductors L B1 and L B2 (two inductors L B1 and L B2The total inductance of the small inductor L S (Note that the inductance of the inductor L B1 and L B2 and may not be electromagnetically connected, and in other embodiments, the inductor L B1 and L B2 may be electromagnetically coupled (suggested by dashed line 1802). The architecture of the diagram illustrating that embodiment of the present invention allows for great flexibility in selecting architectural details for a particular application. For example, N may be 3, such that switch blocks 1602a and 1602b are configured for a three-level buck converter, each requiring one shared fly capacitor C. With an unshared fly capacitor C, CP switch block 1604 can also be configured as a five-level charge pump, so M=5.

[0106] Dickson Charge Pump Embodiments The multi-level, multi-phase charge pump and inductive buck converter circuits shown in Figures 16-18 may be adapted for use with other types of charge pumps, such as a Dickson charge pump. A Dickson charge pump may be characterized by the number of voltage levels M, or conversion factor K, commonly expressed as the ratio K:1. For example, a Dickson charge pump with a 4:1 conversion ratio (K=4) has five internal voltage levels (0V IN , 1 / 4V IN , 1 / 2V IN , 3 / 4V IN , and 1V IN ) is a five-level circuit (M=5). Combining a Dickson charge pump with a multilevel buck converter allows for synergistic sharing of the fly capacitors and sometimes simultaneous operation.

[0107] 19 is a schematic diagram of a prior art divide-by-four (4:1) dual-phase Dickson charge pump 1900. The illustrated charge pump 1900 is connected to a voltage source V INThe cell 1902a includes dual parallel cells 1902a, 1902b connected between V and a reference potential, such as circuit ground. Each cell 1902a, 1902b includes a set of switches (collectively Sx) and a set of fly capacitors (collectively Cx), with each switch connected to one of two phase-interleaved clock signals P1 or P2. Referring to cell 1902a, a subset of four switches S1, S2, S3, S8 are connected in series with a first branch including two series-connected switches S4, S5 and a second branch including two series-connected switches S6, S7. Switch S1 is connected to V IN and switches S5 and S7 are also connected to a reference potential. Each switch may comprise one or more FETs, including, for example, one or more MOSFETs.

[0108] Referring again to cell 1902a, a first capacitor C1 is connected between the first upper pair of alternate phase (P2, P1) switches S1, S2 and the first branch pair of alternate phase (P2, P1) switches S4, S5. A second capacitor C2 is connected between the second upper pair of alternate phase (P1, P2) switches S2, S3 and the second branch pair of alternate phase (P1, P2) switches S6, S7. A third capacitor C3 is connected between the third upper pair of alternate phase (P2, P1) switches S3, S8 and the first branch pair of alternate phase (P2, P1) switches S4, S5.

[0109] Cell 1902b is essentially identical to cell 1902a, except that the phase settings of clock signals P1, P2 are complementary to those of cell 1902a (similar switches and fly capacitors are indicated by prime symbols). Output nodes A, B of cells 1902a, 1902b between switches S8, S6, and S8', S6', respectively, are connected at output terminal TermVo, which is coupled to an output capacitor (e.g., C in FIG. 16) typically via an inductor. BAT , C in Figure 17 OUT ) is connected.

[0110] In this example, with three fly capacitors per cell 1902a, 1902b and an output capacitor connected to TermVo, Dickson charge pump 1900 generates V IN The output voltage V0=1 / 4V IN The steady voltage across C1 and C1' is 3V0 = 3 / 4 VIN The steady-state voltage across C2 and C2' is 2V0 = 1 / 2V IN The steady-state voltage across C3 and C3' is 1V0 = 1 / 4V IN The bottom fly capacitor will sometimes go to zero volts.

[0111] The divide-by-four Dickson charge pump 1900 of Figure 19 can be converted to a divide-by-three (3:1) Dickson charge pump by removing the fly capacitors C3, C3' and switches S8, S8'. Dickson charge pumps with other divide ratios are known in the art.

[0112] 20 is a schematic diagram of a prior art five-level inductive buck converter 2000. A switch block 2002 is connected across an inductor L B The first terminal of the IN The switches S1 to S4 are connected in series between the terminal receiving the inductor L B and a reference voltage such as circuit ground. Fly capacitor C1 is connected between the switch pair S1-S2 and the switch pair S5-S6 as shown. Fly capacitor C2 is connected between the switch pair S2-S3 and the switch pair S6-S7 as shown. Fly capacitor C3 is connected between the switch pair S3-S4 and the switch pair S7-S8 as shown. Inductor L B The second terminal of the O The output capacitor C is connected to the output terminal to provide OUT is the inductor L B and a reference voltage. Also referred to as a three-level inductive buck converter is shown in FIG. 1B.

[0113] Fly capacitors C1-C3 are shown within the boundaries of switch block 2002, but may be located external to switch block 2002. Two of the five-level inductive buck converters 2000 may be used simultaneously with phase-interleaved switching to form a two-phase five-level inductive BK. In operation, the five-level inductive buck converter 2000 generates a voltage V IN , L X The node is divided down to one of five different voltages, and pulse width modulation of the switching sequence reduces the average output to V O The steady-state average voltage across C1 is 3V0 = 3 / 4V IN The steady-state average voltage across C2 is 2V0 = 1 / 2V IN The steady-state average voltage across C3 is 1V0 = 1 / 4V IN becomes.

[0114] Thus, the fly capacitor voltage of a four-way ("4:1" or "5-level") dual-phase Dickson charge pump 1900 advantageously matches that of a two-phase five-level inductive buck converter, resulting in many synergistic benefits. Table 13 summarizes the steady-state average fly capacitor voltages of a single-phase Dickson charge pump and a single-phase five-level inductive BK. [Table 13]

[0115] Thus, using the configuration shown in FIG. 16, all fly capacitors can be shared by a dual-phase Dickson charge pump and a two-phase inductive buck converter, or by a dual-phase Dickson charge pump and a single-phase inductive buck converter, or by a single-phase Dickson charge pump and a single-phase inductive buck converter. For example, FIG. 21 is a schematic diagram of a first embodiment of a charge pump and inductive buck power converter circuit 2100 based on a dual-phase 4:1 (5-level) Dickson charge pump and a two-phase 5-level inductive buck converter. In the illustrated example, BK switch blocks 2102a and 2102b each contain switches for implementing a 5-level inductive buck converter, such as that shown in FIG. 20. CP switch block 2104 contains switches for implementing a divide-by-four Dickson charge pump, such as that shown in FIG. 19. In the illustrated example, the Dickson charge pump is dual-phase and therefore has two sets of fly capacitors, C1-C3 and C1'-C3'. The BK switch block 2102a and Dickson CP switch block 2104 are connected in parallel to a first set of shared fly capacitors C1-C3, and the BK switch block 2102b and Dickson CP switch block 2104 are connected in parallel to a second set of shared fly capacitors C1'-C3'. The output of the Dickson CP switch block 1604 is connected to a relatively small inductor L S The combined output of the BK switch blocks 1602a and 1602b is connected to the BI1 circuit 402 via a relatively large inductor L B (For example, L S (2 to 100 times the inductance of the inductor L B is connected to the BI1 circuit 402.

[0116] The power converter circuit 2100 of Figure 21 may operate in one mode at a time, either as a two-phase five-level inductive buck converter (BK switch blocks 2102a and 2102b active) or as a 4:1 dual-phase Dickson charge pump (Dixon CP switch block 2104 active). However, switching between the two modes preferably occurs when the shared fly capacitor voltage is at a common steady-state value (the fly capacitor voltage may vary with the load). Thus, to avoid sudden changes in the fly capacitor voltage, the BK switches and Dickson CP switches may operate simultaneously to ensure charge balance on the shared fly capacitor, and then one or the other set of switches may be turned off.

[0117] Using the configuration shown in FIG. 17, a dual-phase Dickson charge pump and a two-phase inductive buck converter can share all fly capacitors and one inductor. For example, FIG. 22 is a schematic diagram of a second embodiment of a charge pump and inductive buck power converter circuit 2200 based on a dual-phase 4:1 (5-level) Dickson charge pump and a two-phase 5-level inductive buck converter. In the illustrated example, BK switch blocks 2202a and 2202b each contain switches for implementing a 5-level inductive buck converter, such as that shown in FIG. 20. CP switch block 2204 contains switches for implementing a divide-by-four Dickson charge pump, such as that shown in FIG. 19. In the illustrated example, the Dickson charge pump is dual-phase and therefore contains two sets of fly capacitors, C1-C3 and C1'-C3'. The BK switch block 2202a and Dickson CP switch block 2204 are connected in parallel to a first set of shared fly capacitors C1-C3, and the BK switch block 2202b and Dickson CP switch block 2204 are connected in parallel to a second set of shared fly capacitors C1'-C3'. Furthermore, the outputs of the BK switch blocks 1602a and 1602b are connected in parallel to a relatively large inductor L B and inductor L B is a relatively small inductor L SThe output of the Dickson CP switch block 2204 is also connected to the inductor L S and inductor L S is connected to the BI2 circuit 602. In general, transistor M BAT is set to the closed (on) state when the Dickson CP is in operation.

[0118] 22 may operate in one mode at a time, either as a two-phase five-level inductive buck converter (BK switch blocks 2202a and 2202b active) or as a 4:1 dual-phase Dickson charge pump (Dixon CP switch block 2204 active). However, switching between the two modes preferably occurs when the shared fly capacitor voltage is at a common steady-state value (the fly capacitor voltage may vary with the load). Thus, to avoid sudden changes in the fly capacitor voltage, the BK switches and Dickson CP switches may operate simultaneously to ensure charge balance on the shared fly capacitor, and then one or the other set of switches may be turned off.

[0119] The 5-level BK is typically activated at the beginning and / or end of a battery charge cycle and during non-PPS operation (e.g., zones Z1-Z3 and Z6 in FIG. 3B). The 4:1 (5-level) Dickson CP is typically activated during the middle portion of a battery charge cycle (e.g., zones Z4-Z5 in FIG. 3B).

[0120] The scale of the architectures shown in Figures 21 and 22 may be designed so that the level M of the two-phase inductive buck converter is generally one greater than the conversion factor K of the dual-phase Dickson charge pump, thereby allowing all fly capacitors to be shared. Thus, in many such architectures, N = K + 1, where K > 2 (see also Table 14 below). For example, if the dual-phase Dickson charge pump is a 5:1 embodiment (thus requiring two sets of four fly capacitors), then a six-level two-phase inductive buck converter (each phase requiring four fly capacitors) will share two sets of four fly capacitors (i.e., eight fly capacitors total).

[0121] Using the configuration shown in Figure 18, a dual-phase Dickson charge pump and a two-phase inductive buck converter can share some fly capacitors. For example, Figure 23 is a schematic diagram of one embodiment of a charge pump and inductive buck power converter circuit 2300 based on a dual-phase 4:1 (5-level) Dickson charge pump and a two-phase 3-level inductive buck converter. A 3-level BK switch block requires one fly capacitor (see Figure 1B). As mentioned above, the presence of a single fly capacitor reduces the load on node L. X In this case, 0V (GND), V IN , or V IN This allows for four switch states (in two different ways) that each produce one of three voltage levels: 1 / 2V, ... IN which corresponds to the steady-state voltage across the fly capacitor C2 of a 4:1 (5-level) Dickson charge pump. Therefore, one fly capacitor can be shared between one phase of a 3-level inductive buck converter and one phase of a 4-level Dickson charge pump.

[0122] 23, the pair of three-level BK switch blocks 2302a and 2302b and the Dickson CP switch block 2304 are connected in parallel to the shared fly capacitors C2, C2' (each serving as a single fly capacitor for the three-level BK). In addition, the Dickson CP switch block 2304 is connected to the non-shared fly capacitor pairs C1, C1' and C3, C3'. The output of the Dickson CP switch block 2304 is connected to the non-shared fly capacitor pairs C1, C1' and C3, C3' through a relatively small inductor L S 18, the single large inductor L used in the circuit 1600 of FIG. B are connected between the outputs of each of the pair of three-level BK switch blocks 2302a and 2302b and the BI1 circuit 402. B1 and L B2 (two inductors L B1 and L B2 The total inductance of the small inductor L S (Note that the inductance of the inductor L B1 and L B2 may not be electromagnetically connected, and in other embodiments, the inductor L B1 and L B2 may be electromagnetically connected (suggested by dashed line 2306). In an alternative embodiment, a single large inductor L B In an alternative embodiment, each output of the Dickson CP switch block 2304 and the pair of three-level BK switch blocks 2302a and 2302b may be connected to a BI2 circuit as in FIG.

[0123] The power converter circuit 2300 of Figure 23 may operate in one mode at a time, either as a two-phase three-level inductive buck converter (BK switch blocks 2302a and 2302b active) or as a 4:1 dual-phase Dickson charge pump (Dixon CP switch block 2304 active). However, switching between the two modes preferably occurs when the shared fly capacitor voltage is at a common steady-state value (the fly capacitor voltage may vary with the load). Thus, to avoid sudden changes in the fly capacitor voltage, the BK switches and Dickson CP switches may operate simultaneously to ensure charge balance on the shared fly capacitor, and then one or the other set of switches may be turned off.

[0124] The architecture shown in Figure 23 may be scaled so that a complete set or proper subset of fly capacitors with matching steady-state voltages are shared between an N-level inductive buck converter and a K:1 Dickson charge pump, as long as N has a specific relationship to K. For example, Table 14 shows example sets of non-zero voltages associated with different N-level buck converters and K:1 Dickson charge pumps. Since the partial voltages corresponding to any integer value of K have K as the denominator and integer numerators between 1 and K-1, an extension of the pattern of voltages related to N and K can be derived. [Table 14]

[0125] As is evident, when the set of related voltages is shared, i.e., when N=K+1 and K≧2, the complete set of fly capacitors can be shared between an N-level buck converter and a K:1 Dickson charge pump.

[0126] Furthermore, a subset of fly capacitors may be shared between an N-level inductive step-down converter and a K:1 Dickson charge pump when some values of the associated voltage set are shared. For example, in Table 14, values equal to 1 / 2 (1 / 2, 2 / 4, 3 / 6) are bolded to indicate that the corresponding N-level inductive step-down converter and K:1 Dickson charge pump may share at least one fly capacitor. Thus, for example, a 3-level inductive step-down converter may share a fly capacitor with 2:1, 4:1, and 6:1 Dickson charge pumps. Similarly, a 2:1 Dickson charge pump may share a fly capacitor with 3-level, 5-level, and 7-level inductive step-down converters.

[0127] Table 15 shows a further example of an N-level inductive buck converter that may share at least one fly capacitor with one or more K:1 Dickson charge pumps. [Table 15]

[0128] More generally, any N-level inductive buck converter can share a fly capacitor with any K:1 Dickson charge pump, where K is a positive integer multiple of N-1, i.e., K=i(N-1), and i≧1. For example, for N=6, possible Dickson charge pump conversion factors are 5:1, 10:1, 15:1, etc.

[0129] Table 16 shows a further example of a K:1 Dickson charge pump that may share at least one fly capacitor with one or more N-level inductive step-down converters. [Table 16]

[0130] More generally, if N is one greater than a positive integer multiple of N, i.e., N=iK+1, where i≧1, any K:1 Dickson charge pump can share a fly capacitor with any N-level inductive buck converter. For example, if K=5, possible values of N are 6L, 11L, 16L, etc.

[0131] A conventional charge pump uses an inductor L S without drawing current through the output capacitor C OUT In other words, the inductor L S via the output capacitor C OUT A charge pump providing charge to the inductor L forms a hybrid power converter. S As a result of the existence of the inductor L, such charge pumps (including Dickson charge pumps) have a much smaller inductor L than conventional switched-mode power supplies. S When considering node L X The voltage waveform and current waveform (see FIGS. 21 to 23) are different in the above.

[0132] For example, Figure 24 shows a set of exemplary graphs 2400 of output voltage and output current as a function of time for a conventional switched mode power supply. The voltage is essentially a square wave, while the current has a triangular waveform.

[0133] On the other hand, Figure 25 shows the inductor L S via the output capacitor C OUT 2 shows an exemplary set of graphs 2500 of output voltage and output current as a function of time for a charge pump providing charge to an inductor L. The voltage periodically spikes to a maximum value (shown by the dotted lines), then decreases linearly to a minimum value before repeating. S Because of the presence of , the corresponding current exhibits a "humped" waveform that resembles a rectified sine wave.

[0134] In some embodiments, the charge pump output inductor L SIt may be useful to measure the current flowing through the charge pump 2604. Figure 26 is a block diagram of a charge pump system 2600 that includes an output current sense circuit 2602. The output of the charge pump 2604 is connected to a node L X through the inductor 2604 and the output capacitor C OUT The current sensing circuit 2602 utilizes the principle of inductor DC resistance (DCR) current sensing, which uses the inherent parasitic resistance of the inductor winding to measure the current. In the illustrated example, the inductor 2604 is connected to the inductor winding L S and the equivalent series resistance R DC It is depicted as:

[0135] The current sense circuit 2602 is connected in parallel with the inductor 2604, thus creating a parasitic resistor R DC The RC circuit of the current sense circuit 2602 includes a resistor-capacitor (RC) circuit connected in parallel with the sense capacitor C S A sense resistor R in series with S Includes capacitor C S The voltage across the sense capacitor C S a first terminal connected to the first plate of the sense capacitor C S The output V of the comparator 2606 is measured by a comparator 2606 (e.g., an operational amplifier) having a second terminal connected to the second plate of the comparator 2606. SENSE may be connected to control circuitry 2608, which may be implemented as part of controller 222 as shown in FIGS. 2A and 2B.

[0136] Appropriate component selection (e.g., RS*CS=L S / R DC ) and V SENSE A capacitor C represented by S The voltage measured across the inductor winding L S It should be proportional to the current through L S / R DC R to match the time constant of S and C S It is preferable to choose a time constant ofS and R DC and do not need to match, and C S and L S (The time constants do not need to be the same.) S However, if the time constant (e.g., RS and CS are S / R DC is larger than the inductor L S In some applications where high accuracy is required, R S and R DC The temperature coefficients of may be selected so that their actual values track with temperature.

[0137] Output V of comparator 2606 SENSE may be used, for example, to determine and set the frequency of operation of charge pump 2604 via connecting control signal line 2610. V SENSE Other uses may include output current sensing for fault protection and to provide general telemetry capabilities to the charge pump 2604.

[0138] Some embodiments may include a parallel low-power buck converter 224 for use in reverse power flow during low-power operation. For example, FIG. 27 is a block diagram illustrating an exemplary battery management system 2700. The battery management system 2700 is similar in most respects to the battery management system 200 shown in FIG. 2, but includes an integrated charge pump and inductive buck converter 2702 in accordance with the teachings of the present invention. The battery management system 2700 also includes an optional low-power reverse buck converter 2702 connected to the battery 206 and configured to selectively provide power from the battery 206 to the internal wireless interface 210b via a switch 2706. The wireless interface 210b may be configured to operate in reverse, for example, to power or charge a magnetically connected device 2710 (e.g., headphones, battery case, mobile phone, etc.) connected to an instance (e.g., a magnetic coil) of the external wireless interface 2712. In an alternative embodiment, the integrated charge pump and inductive buck converter 2702 may be configured as in the second exemplary battery management system 200′ shown in FIG. 2B.

[0139] Circuit embodiment While the above description and examples have focused on adiabatic charge pumps, it should be noted that sharing of components (e.g., switches and / or fly capacitors) may also be utilized in conjunction with non-adiabatic charge pumps that do not have output inductors. As such, the use of an output inductor in an exemplary charge pump may only be required if adiabatic operation is desired.

[0140] In some applications, some of the power switches in the combined charge pump and inductive buck converter circuit (e.g., switches S1-S2 and S5-S6 in the circuit of FIG. 4A) may function as load switches. Typically, USB protocols may require the use of load switches, which are switches that connect the input voltage V INand the rest of the battery management system. In some examples, the load switch may be implemented as a bidirectional switch, e.g., to be able to cut power in the forward and / or reverse direction. A typical MOSFET may have a body diode in parallel with it. Therefore, to prevent that body diode from conducting, it may be useful to connect two switches in series, with the body diodes of each switch pointing towards or away from each other (i.e., in the reverse direction).

[0141] It should be understood that other types of battery interface circuits may be used in conjunction with embodiments of the present invention, and thus the present invention is not limited to the battery interface circuits shown in FIGS.

[0142] Circuits and devices according to the present invention may be used alone or in combination with other components, circuits, and devices. Embodiments of the present invention may be fabricated as integrated circuits (ICs), which may be housed in IC packages and / or modules for ease of handling, manufacturing, and / or improved performance. In particular, IC embodiments of the present invention are often used as modules, in which one or more such ICs are combined with other circuit components or blocks (e.g., filters, amplifiers, passive components, and possibly additional ICs) into a single package. ICs and / or modules are then typically combined with other components, often on a printed circuit board, to form higher-level modules that form part of an end product such as a cell phone, laptop computer, or electronic tablet, or that may be used in a variety of products, such as vehicles, test equipment, medical equipment, etc. Through various configurations of modules and assemblies, such ICs typically enable some form of communication, often wireless communication.

[0143] As an example of further integration of embodiments of the present invention with other components, Figure 28 is a top plan view of a substrate 2800, which may be, for example, a printed circuit board or a chip module substrate (e.g., a thin film tile). In the illustrated example, substrate 2800 includes multiple ICs 2802a-2802d having terminal pads 2804 interconnected by conductive vias and / or traces on and / or in substrate 2800 or on the opposite (back) side of substrate 2800. (To avoid cluttering the diagram, the conductive traces on the surface are not shown, and not all terminal pads are labeled.) ICs 2802a-2802d may embody, for example, signal switches, active and / or passive filters, amplifiers (including one or more LNAs), and other circuitry. For example, IC2802b may incorporate one or more instances of circuits such as those shown in Figures 4A, 5, 6A, 7-18, 21-23, and / or 26.

[0144] Substrate 2800 may also include one or more passive devices 2806 embedded in, formed in, and / or attached to substrate 2800. While illustrated as a general rectangle, passive devices 2806 may be, for example, filters, capacitors, inductors, transmission lines, resistors, planar antenna elements, transducers (including, for example, MEMS-based transducers such as accelerometers, gyroscopes, microphones, pressure sensors, etc.), batteries, etc., interconnected to other passive devices 2806 and / or individual ICs 2802a-2802d by conductive traces on or in substrate 2800. The front or back surface of substrate 2800 may be used as a location for forming other structures.

[0145] method Another aspect of the invention includes a method for converting voltages. For example, Figure 29 is a process flowchart 2900 illustrating one method for converting a first voltage to a second voltage. The method includes providing an adiabatic charge pump circuit configured to convert the first voltage to the second voltage (block 2902), providing an inductive step-down converter circuit configured to convert the first voltage to the second voltage (block 2904), sharing a battery interface circuit and at least one of (1) a power switch connected to the first voltage and a power switch connected to a reference potential, (2) at least one fly capacitor, or (3) a first inductor between the adiabatic charge pump circuit and the inductive step-down converter circuit (block 2906), deactivating the adiabatic charge pump circuit and activating the inductive step-down converter circuit in a first mode of operation (block 2908), and activating the adiabatic charge pump circuit and deactivating the inductive step-down converter circuit in a second mode of operation (block 2910).

[0146] System Aspects Embodiments of the present invention are useful in a variety of larger radio frequency (RF) circuits and systems for performing a variety of functions, including (but not limited to) impedance matching circuits, RF power amplifiers, RF low noise amplifiers (LNAs), phase shifters, attenuators, antenna beam steering systems, charge pump devices, RF switches, etc. Such functions are useful in a variety of applications, such as radar systems (including phased array and automotive radar systems), wireless systems (including cellular wireless systems), and test equipment.

[0147] Radio system usage includes wireless RF systems (including base stations, relay stations, and handheld transceivers) using a variety of technologies and protocols, including various types of Orthogonal Frequency Division Multiplexing ("OFDM"), Quadrature Amplitude Modulation ("QAM"), Code Division Multiple Access ("CDMA"), Time Division Multiple Access ("TDMA"), Wideband Code Division Multiple Access ("W-CDMA"), Global System for Mobile Communications ("GSM"), Long Term Evolution ("LTE"), 5G New Radio, 6G, and WiFi (e.g., 802.11a, b, g, ac, ax, be) protocols, as well as other wireless communication standards and protocols.

[0148] As noted above, this current invention improves efficiency and, in many embodiments, reduces IC chip area by sharing components between the adiabatic charge pump circuitry and the inductive buck converter circuitry. As those skilled in the art will appreciate, system architectures are beneficially affected by this current invention in crucial ways, including reduced size, reduced power, and extended battery life.

[0149] Fabrication techniques and options As used in this disclosure, the term "MOSFET" includes any field effect transistor (FET) with an insulated gate where the voltage determines the conductivity of the transistor, and encompasses insulated gates with metallic or metallic-like insulator and / or semiconductor structures. The terms "metallic" or "metallic" include at least one conductive material (such as aluminum, copper, or other metals, or highly doped polysilicon, graphene, or other conductors), "insulator" includes at least one insulating material (such as silicon oxide or other dielectric material), and "semiconductor" includes at least one semiconducting material.

[0150] As used in this disclosure, "radio frequency" (RF) refers to an oscillation rate ranging from about 3 kHz to about 300 GHz. This term also includes frequencies used in wireless communication systems. RF frequencies may be the frequency of electromagnetic waves or alternating voltages or currents in circuits.

[0151] Various embodiments of the present invention can be implemented to meet a variety of specifications. Unless otherwise noted above, the selection of appropriate component values is a matter of design choice. Various embodiments of the present invention may be implemented in any suitable integrated circuit (IC) technology (including, but not limited to, MOSFET structures) or in hybrid or discrete circuit form. Integrated circuit embodiments may be fabricated using any suitable substrate and process, including, but not limited to, standard bulk silicon, high-resistivity bulk CMOS, silicon-on-insulator (SOI), and silicon-on-sapphire (SOS). Unless otherwise noted above, embodiments of the present invention may be implemented in other transistor technologies, such as bipolar junction transistor (BJT), BiCMOS, LDMOS, BCD, GaAs HBT, GaN HEMT, GaAs pHEMT, MESFET, InP HBT, InP HEMT, FinFET, GAAFET, and SiC-based power device technologies, using 2D, 2.5D, and 3D structures. However, embodiments of the present invention are particularly useful when fabricated using SOI or SOS-based processes, or processes with similar characteristics. Fabrication in CMOS using SOI or SOS processes allows for low power consumption circuits, the ability to withstand high power signals during operation due to stacked FETs, good linearity, and high frequency operation (i.e., radio frequencies up to and beyond 300 GHz). Monolithic IC implementations are particularly useful because, with careful design, parasitic capacitance can generally be kept low (or kept to a minimum and uniform across all units, allowing for its compensation).

[0152] Depending on the particular specifications and / or implementation technology (e.g., NMOS, PMOS, or CMOS, and enhancement-mode or depletion-mode transistor devices), voltage levels may be adjusted and / or the polarity of voltages and / or logic signals may be reversed. Component voltage, current, and power handling capabilities may be tailored as needed, for example, by adjusting device sizes, "stacking" components (especially FETs) in series to withstand higher voltages, and / or using multiple components in parallel to handle higher currents. Additional circuit components may be added to enhance the capabilities of the disclosed circuits and / or to provide additional functionality without significantly altering the functionality of the disclosed circuits.

[0153] conclusion Several embodiments of the present invention have been described. It should be understood that various modifications may be made without departing from the spirit and scope of the present invention. For example, some of the steps described above may be order-independent and, therefore, may be performed in an order different from that described. Furthermore, some of the steps described above may be optional. Various actions described with respect to the above-identified methods may be performed in an iterative, sequential, and / or parallel manner.

[0154] It should be understood that the foregoing description is illustrative and is not intended to limit the scope of the invention, which is defined by the following claims, and that other embodiments are within the scope of the claims. In particular, the scope of the invention includes any possible combination of one or more of the process, machine, manufacture, or features of the subject matter set forth in the following claims. (Note that parenthetical reference numerals used in conjunction with elements of the claims are for ease of reference to such elements and do not, in themselves, imply any particular required ordering or enumeration of the elements. Moreover, such reference numerals may be reused in dependent claims to refer to additional elements without being deemed to initiate a conflicting reference sequence.)

Claims

1. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) an adiabatic charge pump circuit connected between the first terminal and the reference potential and connected to the battery interface circuit via a first inductor; (f) an inductive step-down converter circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a second inductor; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; a power converter circuit, wherein the adiabatic charge pump circuit and the inductive buck converter circuit share the battery interface circuit and at least one of: (1) a power switch connected to the first terminal and a power switch connected to the third terminal; (2) at least one fly capacitor; or (3) the first inductor.

2. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) an adiabatic charge pump circuit connected between the first terminal and the reference potential and connected to the battery interface circuit via a first inductor; (f) an inductive step-down converter circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a second inductor; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; The power converter circuit, wherein the adiabatic charge pump circuit and the inductive buck converter circuit share the battery interface circuit.

3. 3. The power converter circuit of claim 2, wherein the second inductor has a significantly greater inductance than the first inductor.

4. The power converter circuit of claim 2 , wherein the second inductor has an inductance that is greater than about twice the inductance of the first inductor.

5. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) an adiabatic charge pump circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a first inductor, the adiabatic charge pump circuit having a first fly capacitor; (f) an inductive step-down converter circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a second inductor, the inductive step-down converter circuit having a second fly capacitor connected in parallel with the first fly capacitor; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; The power converter circuit, wherein the adiabatic charge pump circuit and the inductive buck converter circuit share the battery interface circuit and the first and second fly capacitors.

6. The power converter circuit of claim 5 , wherein the second inductor has a significantly greater inductance than the first inductor.

7. The power converter circuit of claim 5 , wherein the second inductor has an inductance that is greater than about twice the inductance of the first inductor.

8. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) an adiabatic charge pump circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a first inductor, the adiabatic charge pump circuit having a first fly capacitor; (f) an inductive step-down converter circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a second inductor connected in series with the first inductor, the inductive step-down converter circuit having a second fly capacitor; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; The power converter circuit, wherein the adiabatic charge pump circuit and the inductive step-down converter circuit share the battery interface circuit and the first inductor.

9. The power converter circuit of claim 8 , wherein the second inductor has a significantly greater inductance than the first inductor.

10. The power converter circuit of claim 8 , wherein the second inductor has an inductance that is greater than about twice the inductance of the first inductor.

11. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) an adiabatic charge pump circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a first inductor, the adiabatic charge pump circuit having a first fly capacitor; (f) an inductive step-down converter circuit connected between the first terminal and the reference potential and connected to the battery interface circuit through a second inductor connected in series with the first inductor, the inductive step-down converter circuit having a second fly capacitor connected in parallel with the first fly capacitor; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; The power converter circuit, wherein the adiabatic charge pump circuit and the inductive step-down converter circuit share the battery interface circuit, the first and second fly capacitors, and the first inductor.

12. The power converter circuit of claim 11 , wherein the second inductor has a significantly greater inductance than the first inductor.

13. The power converter circuit of claim 11 , wherein the second inductor has an inductance that is greater than about twice the inductance of the first inductor.

14. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) a first inductor connected to the battery interface circuit; (f) a bypass switch connected in parallel with the first inductor; (g) a second inductor connected in series with the first inductor; (h) a combination circuit connected to the second inductor and between the first terminal and the reference potential, the combination circuit having a set of series-connected power switches and a fly capacitor connected to the set of power switches, the combination circuit being configurable as either an adiabatic charge pump circuit or an inductive buck converter circuit; Equipped with in a first mode of operation of the power converter circuit, the bypass switch is closed and the combination circuit is operable as an adiabatic charge pump circuit; in a second mode of operation of the power converter circuit, the bypass switch is open and the combination circuit is operable as an inductive buck converter circuit; The power converter circuit, wherein the adiabatic charge pump circuit and the inductive step-down converter circuit share the battery interface circuit, the set of power switches, the fly capacitor, and the second inductor.

15. The power converter circuit of claim 14 , wherein the first inductor has a significantly greater inductance than the second inductor.

16. The power converter circuit of claim 14 , wherein the first inductor has an inductance that is greater than about twice the inductance of the second inductor.

17. 15. The power converter circuit of claim 14, wherein in the first mode of operation of the power converter circuit, the adiabatic charge pump circuit is configured as a two-phase adiabatic charge pump circuit, and in a second mode of operation of the power converter circuit, the inductive buck converter circuit is configured as a dual-leg inductive buck converter circuit.

18. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) an adiabatic charge pump circuit having a first switch connected to the first terminal and a second switch connected to the reference potential, the adiabatic charge pump circuit connected to the battery interface circuit via a first inductor; (f) an inductive step-down converter circuit connected to the first terminal through the first switch and to the reference potential through the second switch, and connected to the battery interface circuit through a second inductor; (g) a first fly capacitor connected between the first switch and the second switch; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; The power converter circuit, wherein the adiabatic charge pump circuit and the inductive buck converter circuit share the battery interface circuit, the first fly capacitor, and the first switch and the second switch.

19. 20. The power converter circuit of claim 18, wherein the second inductor has a significantly greater inductance than the first inductor.

20. 20. The power converter circuit of claim 18, wherein the second inductor has an inductance that is more than about twice the inductance of the first inductor.

21. 20. The power converter circuit of claim 18, wherein in a second mode of operation of the power converter circuit, the inductive buck converter circuit is configured as a two-level inductive buck converter circuit.

22. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) an adiabatic charge pump circuit having a first switch connected to the first terminal and a second switch connected to the reference potential, the adiabatic charge pump circuit connected to the battery interface circuit via a first inductor; (f) an inductive step-down converter circuit connected to the first terminal through the first switch and to the reference potential through the second switch, and connected to the battery interface circuit through a second inductor connected in series with the first inductor; (g) a first fly capacitor connected between the first switch and the second switch; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; The power converter circuit, wherein the adiabatic charge pump circuit and the inductive step-down converter circuit share the battery interface circuit, the first fly capacitor, the first switch and the second switch, and the first inductor.

23. 23. The power converter circuit of claim 22, wherein the second inductor has a significantly greater inductance than the first inductor.

24. 23. The power converter circuit of claim 22, wherein the second inductor has an inductance that is greater than about twice the inductance of the first inductor.

25. (a) a complementary adiabatic charge pump circuit having a third switch connected to the first terminal and a fourth switch connected to the reference potential, the complementary adiabatic charge pump circuit connected to the battery interface circuit via the first inductor; (b) a second fly capacitor connected between the third switch and the fourth switch; Furthermore, 23. The power converter circuit of claim 22, wherein in a first mode of operation of the power converter circuit, the complementary adiabatic charge pump circuit operates at a different phase setting than the adiabatic charge pump circuit.

26. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) a first adiabatic charge pump circuit having a first switch connected to the first terminal and a second switch connected to the reference potential, the first adiabatic charge pump circuit connected to the battery interface circuit via a first inductor; (f) a second adiabatic charge pump circuit having a third switch connected to the first terminal and a fourth switch connected to the reference potential, the second adiabatic charge pump circuit connected to the battery interface circuit via the first inductor; (g) a first inductive step-down converter circuit connected to the first terminal through the first switch and to the reference potential through the second switch, and connected to the battery interface circuit through a second inductor connected in series with the first inductor; (h) a second inductive step-down converter circuit connected to the first terminal through the third switch and to the reference potential through the fourth switch, and connected to the battery interface circuit through the second inductor; (i) a first fly capacitor connected between the first switch and the second switch; (j) a second fly capacitor connected between the third switch and the fourth switch; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; 1. The power converter circuit, wherein the adiabatic charge pump circuit and the inductive buck converter circuit share the battery interface circuit, the first and second fly capacitors, the first and second switches, and the third and fourth switches.

27. 27. The power converter circuit of claim 26, wherein the second inductor has a significantly greater inductance than the first inductor.

28. 27. The power converter circuit of claim 26, wherein the second inductor has an inductance that is more than about twice the inductance of the first inductor.

29. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) a battery interface circuit connected to the second terminal and configured to be connected to the reference potential; (e) a two-phase adiabatic charge pump circuit connected between the first terminal and the reference potential and connected to the battery interface circuit via a first inductor; (f) an inductive step-down converter circuit connected between the first terminal and the reference potential and connected to the battery interface circuit via a second inductor connected in series with the first inductor; and in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; The power converter circuit, wherein the adiabatic charge pump circuit and the inductive step-down converter circuit share the battery interface circuit and the first inductor.

30. 30. The power converter circuit of claim 29, wherein the second inductor has a significantly greater inductance than the first inductor.

31. 30. The power converter circuit of claim 29, wherein the second inductor has an inductance that is greater than about twice the inductance of the first inductor.

32. 1. A battery management system, comprising: (a) a first terminal configured to receive a first voltage via at least one of a wired power supply path or a wireless power supply path; (b) an adiabatic charge pump circuit connected to the first terminal and a reference potential, the adiabatic charge pump circuit having a first inductor; (c) an inductive step-down converter circuit connected to the first terminal and the reference potential, the inductor having a second inductor; (d) a switch connected to the second inductor; (e) a node configured to be connected to a battery and connected to the first inductor and the switch; Equipped with in a first mode of operation of the power converter circuit, the adiabatic charge pump circuit is deactivated and the inductive buck converter circuit is activated; in a second mode of operation of the power converter circuit, the adiabatic charge pump circuit is enabled and the inductive buck converter circuit is disabled; 10. The battery management system of claim 9, wherein the adiabatic charge pump circuit and the inductive buck converter circuit share at least one of: (1) a power switch connected to the first terminal and a power switch connected to a reference potential; (2) at least one fly capacitor; or (3) the first inductor.

33. 1. A battery management system, comprising: (a) a first terminal configured to receive a first voltage via at least one of a wired power supply path or a wireless power supply path; (b) a second terminal configured to be connected to a reference potential; (c) a first inductor; (d) a second inductor; (e) a dual-phase K:1 Dickson charge pump circuit connected to the first terminal and the second terminal and configured to output a voltage through the first inductor; (f) a first N-level inductive step-down converter circuit connected to the first terminal and the second terminal and configured to output a voltage through the second inductor; (g) a second N-level inductive step-down converter circuit connected to the first terminal and the second terminal and configured to output a voltage through the second inductor; (h) a first set of fly capacitors shared between the dual-phase K:1 Dickson charge pump circuit and the first N-level inductive buck converter circuit; (i) a second set of fly capacitors shared between the dual-phase K:1 Dickson charge pump circuit and the second N-level inductive buck converter circuit; (j) a battery interface connected to the first inductor and the second inductor and configured to charge a battery and to output a system voltage; A battery management system comprising:

34. 34. The power converter circuit of claim 33, wherein N=K+1.

35. 34. The power converter circuit of claim 33, wherein the second inductor has a significantly greater inductance than the first inductor.

36. 34. The power converter circuit of claim 33, wherein the second inductor has an inductance that is greater than about twice the inductance of the first inductor.

37. 1. A battery management system, comprising: (a) a first terminal configured to receive a first voltage via at least one of a wired power supply path or a wireless power supply path; (b) a second terminal configured to be connected to a reference potential; (c) a first inductor; (d) a second inductor connected in series with the first inductor; (e) a dual-phase K:1 Dickson charge pump circuit connected to the first terminal and the second terminal and configured to output a voltage through the first inductor; (f) a first N-level inductive step-down converter circuit connected to the first terminal and the second terminal and configured to output a voltage through the second inductor; (g) a second N-level inductive step-down converter circuit connected to the first terminal and the second terminal and configured to output a voltage through the second inductor; (h) a first set of fly capacitors shared between the dual-phase K:1 Dickson charge pump circuit and the first N-level inductive buck converter circuit; (i) a second set of fly capacitors shared between the dual-phase K:1 Dickson charge pump circuit and the second N-level inductive buck converter circuit; (j) a battery interface connected to the first inductor and configured to charge a battery and to output a system voltage; A battery management system comprising:

38. 38. The power converter circuit of claim 37, wherein N=K+1.

39. 38. The power converter circuit of claim 37, wherein the second inductor has a significantly greater inductance than the first inductor.

40. 38. The power converter circuit of claim 37, wherein the second inductor has an inductance that is more than about twice the inductance of the first inductor.

41. 1. A battery management system, comprising: (a) a first terminal configured to receive a first voltage via at least one of a wired power supply path or a wireless power supply path; (b) a second terminal configured to be connected to a reference potential; (c) a first inductor; (d) a second inductor and a third inductor; (e) a dual-phase K:1 Dickson charge pump circuit connected to the first terminal and the second terminal and configured to output a voltage through the first inductor; (f) a first N-level inductive step-down converter circuit connected to the first terminal and the second terminal and configured to output a voltage through the second inductor; (g) a second N-level inductive step-down converter circuit connected to the first terminal and the second terminal and configured to output a voltage through the second inductor; (h) a first set of fly capacitors, a proper subset of the first set of fly capacitors being shared between the dual-phase K:1 Dickson charge pump circuit and the first N-level inductive buck converter circuit; and (i) a second set of fly capacitors, a proper subset of the second set of fly capacitors being shared between the dual-phase K:1 Dickson charge pump circuit and the second N-level inductive buck converter circuit; (j) a battery interface connected to the first inductor and the second and third inductors and configured to charge a battery and output a system voltage; and A battery management system comprising:

42. 42. The battery management system of claim 41, wherein K=i(N-1), where i is an integer greater than or equal to 1.

43. 42. The battery management system of claim 41, wherein N=iK+1, where i is an integer greater than or equal to 1.

44. 42. The battery management system of claim 41, wherein the second inductor and the third inductor are electromagnetically coupled.

45. 42. The battery management system of claim 41, wherein the second inductor and the third inductor collectively have an inductance significantly greater than that of the first inductor.

46. 42. The battery management system of claim 41, wherein the second inductor and the third inductor have a combined inductance that is greater than about twice the inductance of the first inductor.

47. 1. A power converter circuit comprising: (a) a first terminal for receiving a first voltage; (b) a second terminal for providing a second voltage; (c) a third terminal configured to be connected to a reference potential; (d) Equivalent series resistance R DC an inductor having (e) a charge pump circuit connected between the first terminal and the reference potential, the charge pump circuit having at least one fly capacitor and having an output connected in series with the inductor; (f) a current sensing circuit, (1) a resistor-capacitor circuit connected in parallel with the inductor, the resistor-capacitor circuit including a sense resistor connected in series with a sense capacitor; and (2) a comparator having a first terminal connected to a first plate of the sense capacitor and a second terminal connected to a second plate of the sense capacitor, the comparator being configured to output a signal representative of a voltage measured across the sense capacitor that is proportional to a current through the inductor; a current sensing circuit including: Equipped with The power converter circuit, wherein the inductor is configured to assist in charging and discharging the at least one fly capacitor of the charge pump circuit.

48. 48. The power converter circuit of claim 47, wherein the charge pump circuit outputs a voltage that periodically spikes to a maximum value, then drops linearly to a minimum value, and then repeats.

49. The charge pump circuit (a) a first set of switches connected in series, the first set having at least two switches connected between the first terminal and the inductor; (b) a second set of switches connected in series, the second set having at least two switches connected between the third terminal and the inductor; (c) at least one fly capacitor, each fly capacitor connected between an associated pair of switches in the first set of switches and between an associated pair of switches in the second set of switches; 48. The power converter circuit of claim 47, comprising:

50. 48. The power converter circuit of claim 47, wherein the charge pump circuit comprises a 2:1 charge pump.

51. 48. The power converter circuit of claim 47, wherein the charge pump circuit comprises a 3:1 charge pump.

52. 48. The power converter circuit of claim 47, wherein the charge pump circuit comprises a 4:1 charge pump.

53. 48. The power converter circuit of claim 47, wherein the charge pump circuit comprises a Dickson charge pump.

54. 48. The power converter circuit of claim 47, wherein the charge pump circuit comprises a K-level dual phase charge pump.

55. 1. A method for converting a first voltage to a second voltage, comprising: (a) providing an adiabatic charge pump circuit configured to convert a first voltage to a second voltage; (b) providing an inductive step-down converter circuit configured to convert the first voltage to the second voltage; (c) sharing a battery interface circuit and at least one of: (1) a power switch connected to the first voltage and a power switch connected to a reference potential; (2) at least one fly capacitor; or (3) a first inductor between the adiabatic charge pump circuit and the inductive buck converter circuit; (d) inactivating the adiabatic charge pump circuit and activating the inductive step-down converter circuit in a first mode of operation; (e) in a second mode of operation, activating the adiabatic charge pump circuit and deactivating the inductive buck converter circuit; A method comprising: