Patterning device voltage bias system used in EUV lithography, lithographic apparatus, and method for reducing contamination of a patterning surface of a patterning device in a lithographic apparatus

Abstract

A patterning device voltage bias system for use in a lithographic apparatus, the patterning device voltage bias system comprising: a patterning device configured to impart a pattern to a radiation beam, the patterning device having a patterning surface having a pattern; and a voltage source, the patterning device voltage bias system configured to enable a voltage to be applied to the patterning surface of the patterning device by the voltage source.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to European Application No. 22195470.4, filed September 13, 2022, and European Application No. 23176443.2, filed May 31, 2023, both of which are incorporated by reference in their entireties.

[0002] The present invention relates to a patterning device voltage bias system for use in a lithographic apparatus, a lithographic apparatus comprising a patterning device voltage bias system, a method for reducing contamination of a patterning surface of a patterning device in a lithographic apparatus, and a device manufacturing method comprising a method for reducing contamination of a patterning surface of a patterning device in a lithographic apparatus. [Background technology]

[0003] A lithographic apparatus is a machine that applies a desired pattern to a substrate, usually to a target portion of the substrate. Lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that case, a patterning device, also referred to as a mask or reticle, may be used to generate the circuit pattern to be formed in an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. comprising part of a die, one die or several dies) on the substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned.

[0004] Lithography is widely recognized as one of the key steps in the manufacture of ICs and other devices and / or structures. However, as the dimensions of features produced using lithography decrease, lithography becomes an even more important factor in enabling miniaturized ICs and other devices and / or structures to be produced.

[0005] A theoretical estimate of the limit of pattern printing can be given by the Rayleigh criterion of resolution as shown in equation (1). CD=k1*(λ / NA) (1) where λ is the wavelength of the radiation used, NA is the numerical aperture of the projection system used to print the pattern, k1 is a process-dependent adjustment factor also known as the Rayleigh constant, and CD is the feature size (or critical dimension) of the printed features. From equation (1), it can be seen that a reduction in the minimum printable size of a feature can be obtained in three ways: by shortening the exposure wavelength λ, by increasing the numerical aperture NA, or by decreasing the value of k1.

[0006] To shorten the exposure wavelength and thereby reduce the minimum printable size, it has been proposed to use extreme ultraviolet (EUV) radiation sources. EUV radiation is electromagnetic radiation with a wavelength in the range of 10-20 nm, e.g., 13-14 nm. It has also been proposed that EUV radiation with a wavelength less than 10 nm, e.g., in the range of 5-10 nm, such as 6.7 nm or 6.8 nm, could be used. Such radiation is referred to as extreme ultraviolet radiation or soft x-ray radiation. Possible radiation sources include, for example, laser-produced plasma sources, discharge plasma sources, or radiation sources based on synchrotron radiation supplied by electron storage rings.

[0007] Once EUV radiation is generated, it is directed by a number of mirrors through the lithography apparatus onto a patterning surface of a patterning device, imparting the EUV radiation with a desired pattern. As a result of the photoelectric effect, the EUV radiation incident on the patterning surface causes electrons to be emitted from the surface. The patterning surface may be electrically isolated from the grounded frame of the lithography apparatus. This may be because the patterning surface is mounted on a dielectric substrate, such as an ultra-low expansion glass substrate. As a result, the emission of electrons from the patterning surface causes the patterning surface to become positively charged.

[0008] Contamination particles may be present in the environment surrounding the patterning device and may become negatively charged by absorbing electrons emitted from the patterning surface as a result of the photoelectric effect and by absorbing electrons from the plasma created from gas particles excited by EUV radiation.

[0009] Negatively charged contaminant particles are attracted to the positively charged patterning surface and accelerated toward the patterning surface. As a result, contaminant particles in the environment surrounding the patterning device are likely to deposit on the patterning surface. The presence of contaminant particles on the patterning surface can cause imaging errors and reduce the yield of the lithography process.

[0010] One object of the present invention is to improve the yield of EUV lithography processes by preventing contaminant particles from adhering to the patterning surface of a patterning device. Summary of the Invention

[0011] According to one aspect of the present invention, there is provided a patterning device voltage bias system for use in a lithographic apparatus, the patterning device being configured to impart a pattern to a radiation beam, the patterning device having a patterning surface having a pattern thereon, and a voltage source, the patterning device voltage bias system being configured to enable a voltage to be applied to the patterning surface of the patterning device by the voltage source.

[0012] According to another aspect of the present invention, there is provided a method for reducing contamination of a patterning surface of a patterning device in a lithographic apparatus, the method comprising a contacting step of contacting a conductive member with the patterning surface, and a voltage biasing step of applying a voltage from a voltage source to the patterning surface via the conductive member. [Brief explanation of the drawings]

[0013] Some embodiments of the present invention will now be described, by way of example only, with reference to the accompanying schematic drawings in which corresponding reference symbols indicate corresponding parts, and in which:

[0014] [Figure 1] 1 depicts a schematic diagram of a lithographic apparatus; [Figure 2] 1 is a schematic diagram of a lithographic apparatus in more detail; [Figure 3] 1A and 1B schematically depict a patterning device when exposed to EUV radiation; [Figure 4A] FIG. 10 shows a plot of voltage on a patterning surface versus time for the case where no bias voltage is applied. [Figure 4B] FIG. 10 shows a plot of voltage on a patterned surface versus time when a bias voltage is applied. [Figure 5A] FIG. 10 shows a plot of distance from a patterning surface versus time for the case where no bias voltage is applied. [Figure 5B] FIG. 10 shows a plot of distance from a patterning surface versus time when a bias voltage is applied. [Figure 6] FIG. 1 shows a schematic diagram of an embodiment of a patterning device voltage bias system in a non-contact arrangement. [Figure 7] FIG. 1A illustrates a schematic diagram of an embodiment of a patterning device voltage bias system in a contact configuration. [Figure 8] FIG. 1 shows a schematic diagram of an embodiment of a patterning device voltage bias system in a landing configuration. [Figure 9] FIG. 10 shows a schematic diagram of another embodiment of a patterning device voltage bias system. [Figure 10] FIG. 10 shows a schematic diagram of another embodiment of a patterning device voltage bias system. [Figure 11] 1A and 1B schematically depict a patterning device support according to one embodiment of the present invention; [Figure 12A] FIG. 2 is a plan view of a patterning surface of a patterning device. [Figure 12B] FIG. 12B is a schematic cross-sectional view of the patterning device depicted in FIG. 12A. [Figure 12C] FIG. 12C is a plan view of the non-patterning surface of the patterning device depicted in FIGS. 12A and 12B. [Figure 13A] 1 is a plan view of a patterning surface of a patterning device according to an embodiment of the present invention; [Figure 13B] FIG. 13B is a cross-sectional view of the patterning device depicted in FIG. 13A. [Figure 14A] 1 is a plan view of a patterning surface of a patterning device, according to one embodiment of the present invention; [Figure 14B] 14B is a cross-sectional view of a patterning device that can be a first embodiment of the patterning device depicted in FIG. 14A. [Figure 14C] 14B is a cross-sectional view of another patterning device that can be a second embodiment of the patterning device depicted in FIG. 14A. [Figure 15A] 1 is a plan view of a patterning surface of a patterning device, according to one embodiment of the present invention; [Figure 15B] 15B is a cross-sectional view of a patterning device that can be a first embodiment of the patterning device depicted in FIG. 15A. [Figure 15C] 15B is a cross-sectional view of another patterning device that can be a second embodiment of the patterning device depicted in FIG. 15A. [Figure 16A] 1 is a plan view of a patterning surface of a patterning device, according to one embodiment of the present invention; [Figure 16B] FIG. 16B is a cross-sectional view of the patterning device depicted in FIG. 16A. [Figure 16C] FIG. 16C is a plan view of the non-patterning surface of the patterning device depicted in FIGS. 16A and 16B. [Figure 17A] 1 is a plan view of a patterning surface of a patterning device, according to one embodiment of the present invention; [Figure 17B] FIG. 17B is a cross-sectional view of the patterning device depicted in FIG. 17A. [Figure 17C] FIG. 17C is a plan view of the non-patterning surface of the patterning device depicted in FIGS. 17A and 17B. [Figure 18A] 1 is a plan view of a patterning surface of a patterning device, according to one embodiment of the present invention; [Figure 18B] 18B is a cross-sectional view of the patterning device depicted in FIG. 18A. [Figure 18C] FIG. 18C is a plan view of the non-patterning surface of the patterning device depicted in FIGS. 18A and 18B.

[0015] The features depicted in the drawings are not necessarily to scale, and the depicted sizes and / or arrangements are not limiting. It will be understood that the drawings include optional features that may not be essential to the invention. Furthermore, not all of the features of the device are depicted in the drawings, and each drawing may show only some of the components relevant to illustrating a particular feature. DETAILED DESCRIPTION OF THE INVENTION

[0016] 1 schematically depicts a lithographic apparatus 100 including a source collector module SO according to one embodiment of the invention. an illumination system (or illuminator) IL configured to condition a radiation beam B (e.g. EUV radiation); and a support structure (e.g. mask table) MT constructed to support a patterning device (e.g. mask or reticle), the support structure connected to a first positioner PM configured to accurately position the patterning device; and a substrate table (e.g., wafer table) WT constructed to hold a substrate (e.g., a resist-covered wafer) W, the substrate table connected to a second positioner PW configured to accurately position the substrate; a projection system (e.g., a reflection projection system) PS configured to project a pattern imparted to the radiation beam B by the patterning device MA onto a target portion C (e.g., comprising one or more dies) of the substrate W.

[0017] The illumination system IL may include a variety of optical components, such as refractive, reflective, catadioptric, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof, to direct, shape or control radiation.

[0018] The support structure MT holds the patterning device MA in a manner that depends on the orientation of the patterning device MA, the design of the lithographic apparatus, and other conditions, such as whether or not the patterning device is held in a vacuum environment. The support structure MT may use mechanical, vacuum, electrostatic or other clamping techniques to hold the patterning device MA. The support structure MT may be a frame or a table, which may, for example, be fixed or movable as required. The support structure MT may ensure that the patterning device MA is at a desired position, for example with respect to the projection system PS.

[0019] The term "patterning device" should be interpreted broadly as referring to any device that can be used to impart a radiation beam B with a pattern in its cross-section to create a pattern in a target portion C of the substrate W. The pattern imparted to the radiation beam B may correspond to a particular functional layer in a device being created in the target portion C, such as an integrated circuit.

[0020] Examples of patterning devices include masks, programmable mirror arrays, and programmable liquid crystal display (LCD) panels. Masks are well known in lithography, and include mask types such as binary, alternating phase-shift, or attenuated phase-shift, as well as various hybrid mask types. An example of a programmable mirror array is a matrix arrangement of small mirrors, each of which can be individually tilted so as to reflect an incoming radiation beam B in different directions. The radiation beam B is reflected by the matrix of small mirrors, imparting a pattern to it by the tilted mirrors.

[0021] The projection system PS may include a variety of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic, or other types of optical components, or any combination thereof, as appropriate depending on the exposure radiation used or other factors, such as the use of a vacuum. For EUV radiation, the use of a vacuum may be desirable, as the radiation may be highly absorbed by gases. Therefore, a vacuum environment may be provided throughout the beam path using vacuum walls and vacuum pumps.

[0022] As depicted, lithographic apparatus 100 is of a reflective type (eg, a reflective mask is employed).

[0023] Lithographic apparatus 100 may be of a type having two (dual stage) or more substrate tables WT (and / or two or more support structures MT). In such a "multiple stage" apparatus, the additional substrate tables WT (and / or additional support structures MT) may be used in parallel, or one or more substrate tables WT (and / or one or more support structures MT) may be used for exposure while preparation steps are being performed on one or more other substrate tables WT (and / or one or more other support structures MT).

[0024] Referring to FIG. 1, the illumination system IL receives a beam of extreme ultraviolet radiation from a source collector module SO. Methods for generating EUV light include, but are not limited to, converting a material into a plasma state having at least one element, such as xenon, lithium, or tin, with one or more emission lines in the EUV range. In one such method, also known as laser-produced plasma ("LPP"), the required plasma can be generated by irradiating a fuel, such as droplets, streams, or clusters of material having the required emission line-emitting element, with a laser beam. The source collector module SO may be part of an EUV radiation system that includes a laser, not shown in FIG. 1, to provide the laser beam that excites the fuel. The resulting plasma emits output radiation, such as EUV radiation. This radiation is collected using a radiation collector disposed in the source collector module. The laser and source collector module SO may be separate entities, for example, when a CO2 laser is used to provide the laser beam for fuel excitation.

[0025] In such a case, the laser is not considered to form part of lithographic apparatus 100, and the radiation beam B passes from the laser to the source collector module SO using a beam delivery system BD, for example comprising suitable directing mirrors and / or beam expanders. In other aspects, the source may be an integral part of the source collector module SO, for example if the source is a discharge produced plasma EUV generator (also called a DPP source).

[0026] The illumination system IL may comprise an adjuster for adjusting the angular intensity distribution of the radiation beam. Generally, at least the outer and / or inner radial extent (commonly referred to as "σ-outer" and "σ-inner", respectively) of the intensity distribution in a pupil plane of the illumination system IL may be adjusted. Furthermore, the illumination system IL may comprise various other components, such as facetted field mirror devices and facetted pupil mirror devices. The illumination system IL can be used to adjust the radiation beam B to have a desired uniformity and intensity distribution in its cross-section.

[0027] The radiation beam B is incident on a patterning device (e.g., mask) MA, which is held on a support structure (e.g., mask table) MT, and is patterned by the patterning device MA. After reflecting from the patterning device (e.g., mask) MA, the radiation beam B passes through a projection system PS, which focuses the radiation beam B onto a target portion C of a substrate W. Using a second positioner PW and a position sensor PS2 (e.g., an interferometer device, a linear encoder, or a capacitance sensor), the substrate table WT can be accurately moved, for example to position different target portions C in the path of the radiation beam B. Similarly, a first positioner PM and another position sensor PS1 can be used to accurately position the patterning device (e.g., mask) MA relative to the path of the radiation beam B. The patterning device (e.g., mask) MA and substrate W can be aligned using mask alignment marks M1, M2 and substrate alignment marks P1, P2.

[0028] The controller 500 controls the overall operation of the lithographic apparatus 100, and in particular executes the operational processes described further below. The controller 500 may be embodied as a suitably programmed general-purpose computer having a central processing unit, volatile and non-volatile storage means, one or more input / output devices such as a keyboard and a screen, one or more network connections, and one or more interfaces to various parts of the lithographic apparatus 100. It will be appreciated that a one-to-one relationship between the controlling computer and the lithographic apparatus 100 is not required. In one embodiment of the present invention, one computer may control multiple lithographic apparatuses 100. In one embodiment of the present invention, multiple networked computers may be used to control a single lithographic apparatus 100. The controller 500 may also be configured to control one or more associated process tools and substrate handling devices in a lithocell or cluster of which the lithographic apparatus 100 forms a part. The controller 500 may also be configured to be subordinate to a higher-level control system of the lithocell or cluster and / or to an overall factory control system.

[0029] 2 shows lithographic apparatus 100 in more detail, including a source collector module SO, an illumination system IL, and a projection system PS. An EUV radiation-emitting plasma 210 may be formed by a plasma source. The EUV radiation may be produced by a gas or vapor, such as Xe gas, Li vapor, or Sn vapor, being generated such that the radiation-emitting plasma 210 emits radiation in the EUV range of the electromagnetic spectrum. In one embodiment, a plasma of excited tin (Sn) is provided to produce the EUV radiation.

[0030] Radiation emitted by the radiation-emitting plasma 210 is passed from the source chamber 211 to the collector chamber 212 .

[0031] The collector chamber 212 may include a radiation collector CO. Radiation passing through the radiation collector CO may be focused to a virtual source point IF. The virtual source point IF is commonly called an intermediate focus, and the source collector module SO is configured such that the virtual source point IF is located at or near an opening 221 in the enclosing structure 220. The virtual source point IF is an image of the radiation-emitting plasma 210.

[0032] The radiation then passes through an illumination system IL, which may include a faceted field mirror device 22 and a facetted pupil mirror device 24 arranged to provide a desired angular distribution of the unpatterned radiation beam 21 at the patterning device MA and a desired uniformity of the radiation intensity at the patterning device MA. Reflection of the unpatterned radiation beam 21 off the patterning device MA, which is held by a support structure MT, forms a patterned beam 26, which is imaged by a projection system PS via reflective elements 28, 30 onto a substrate W held by a substrate table WT.

[0033] In general, there may be more elements in the illumination system IL and the projection system PS than are shown, and there may also be more mirrors than are shown, for example, there may be one to six additional reflective elements in the projection system PS than are shown in FIG.

[0034] Alternatively, the source collector module SO may be part of an LPP radiation system.

[0035] As depicted in Figure 1, in one embodiment, lithographic apparatus 100 comprises an illumination system IL and a projection system PS. The illumination system IL is configured to emit a radiation beam B. The projection system PS is separated from a substrate table WT by an intervening space. The projection system PS is configured to project a pattern imparted to the radiation beam B onto a substrate W. The pattern is for the radiation beam B to be EUV radiation.

[0036] The intervening space between the projection system PS and the substrate table WT may be at least partially evacuated, and may be bounded at the location of the projection system PS by a solid surface that directs the used radiation towards the substrate table WT.

[0037] FIG. 3 is a schematic diagram of a patterning device MA clamped to a support structure MT. As described above, the support structure MT can use mechanical, vacuum, electrostatic, or other clamping techniques to hold the patterning device MA. The support structure MT may include a plurality of burls (cone-shaped protrusions) on a support surface 42 of the support structure MT that faces a non-patterning surface 41 of the patterning device MA. When the patterning device MA is clamped to the support structure MT, the non-patterning surface 41 contacts the distal ends of the plurality of burls. It is not necessary for each of the plurality of burls to contact the non-patterning surface 41. These burls are not shown in FIG. 3.

[0038] Both the patterning device MA and the support structure MT may be contained within a patterning device environment 90. The patterning device environment 90 may be isolated from the external environment surrounding the lithographic apparatus 100 and / or other components within the lithographic apparatus such that gases and contaminant particles P are substantially prevented from entering the patterning device environment 90.

[0039] Patterning device environment 90 may be partially evacuated, i.e., the pressure within patterning device environment 90 may be lower than ambient pressure, to limit the attenuation of EUV radiation as it passes through patterning device environment 90. Although the pressure within patterning device environment 90 is lower than ambient pressure, it is not a complete vacuum, and gas particles may be present within patterning device environment 90.

[0040] Contamination particles P may also be present in patterning device environment 90. Despite the patterning device environment 90 being isolated from the external environment and / or other components within the lithographic apparatus, some contamination particles P may enter patterning device environment 90 from these locations. Contamination particles P may also be generated within patterning device environment 90 by mechanisms such as abrasive wear that occurs when there is relative movement between contacting surfaces.

[0041] During EUV lithography, the unpatterned beam 21 is incident on a patterning surface 40 of the patterning device MA, which causes electrons to be emitted from the patterning surface 40 due to the photoelectric effect.

[0042] The patterning surface 40 may be electrically insulating or electrically floating, resulting in a positively charged patterning surface 40. The patterning surface 40 may also be electrically conductive. For example, the patterning surface may be at least partially formed of a metal. For example, the patterning surface may be at least partially formed of ruthenium.

[0043] The EUV radiation in the patterning device environment 90 also causes the contaminant particles P to become negatively charged. This occurs as a result of at least two main mechanisms. The first mechanism is the result of plasma formation from gas molecules in the patterning device environment 90 that are excited by the EUV radiation. Free electrons in the plasma are absorbed by the contaminant particles P, resulting in the contaminant particles becoming negatively charged. The second mechanism is the result of the photoelectric effect, which causes the patterning surface 40 to become positively charged. Specifically, electrons emitted from the patterning surface 40 as a result of the photoelectric effect are absorbed by the contaminant particles P, resulting in the contaminant particles P becoming negatively charged.

[0044] As a result of the patterning surface 40 being positively charged and the contaminant particles P being negatively charged, an attractive electrostatic force acts between the patterning surface 40 and the contaminant particles P, accelerating the contaminant particles P towards the patterning surface 40. As a result, contaminant particles within the lithographic apparatus are more likely to adhere to the patterning surface 40.

[0045] In an EUV lithography system, EUV radiation is typically generated in pulses. That is, there are periods when EUV radiation is generated and periods when it is not. During the periods when EUV pulses are not generated, the patterning surface 40 may be discharged, i.e., the magnitude of the positive charge on the patterning surface 40 may be reduced, such that the patterning surface 40 becomes approximately neutral. The discharge of the patterning surface 40 may be caused by a plasma formed in the patterning device environment 90 from gas particles excited by the EUV radiation. Specifically, electrons in the plasma are attracted to the patterning surface 40, where they may be absorbed by positive ions on the patterning surface 40. The pulses of EUV radiation are typically generated at a fast frequency. This frequency may be, for example, about 50 kHz, about 60 kHz, or about 100 kHz. This means that during the EUV lithography process, the patterning surface 40 may cycle between a positively charged state and an approximately neutral state at a high frequency.

[0046] To prevent contaminant particles P from accelerating toward the patterning surface 40 as a result of electrostatic attraction, a voltage bias system can be used to apply a bias voltage to the patterning surface 40 of the patterning device. This bias voltage can be negative. That is, a bias voltage can be applied to the patterning surface 40 so that the patterning surface 40 is negatively charged, i.e., negatively charged contaminant particles P in the patterning device environment 90 are repelled from the patterning surface 40. The magnitude of the voltage applied to the patterning surface 40 can be greater than 0.5 V, preferably greater than 1 V, because a voltage of this magnitude may be necessary to ensure that the distance between the patterning surface 40 and the contaminant particles P increases over time. The magnitude of the voltage applied to the patterning surface 40 can also be less than 10 V, preferably less than 5 V, and more preferably less than 3 V. Voltages exceeding these values ​​can draw excessively large currents through the patterning surface 40. This can cause the patterning surface 40 to heat up and deform, reducing the quality of the pattern projected from the patterning surface 40 onto the substrate W.

[0047] In this application, the terms "voltage" and "bias voltage" may also be referred to as "electric potential" or "bias potential". A voltage may be relative to ground. A voltage may be relative to a local ground, such as the grounded frame of a lithographic apparatus. For example, if a negative bias voltage is applied to a surface, this may mean that the electric potential of the surface is negative with respect to the grounded frame of the lithographic apparatus.

[0048] 4A and 4B show plots of the voltage on the patterning surface 40 versus time. FIG. 4A shows the voltage on the patterning surface 40 when no bias voltage is applied to the patterning surface 40 during an EUV lithography process. FIG. 4B shows the voltage on the patterning surface 40 when a bias voltage is applied to the patterning surface 40. The plot of FIG. 4B does not directly relate to the particular manner in which the bias voltage is applied to the patterning surface 40.

[0049] 5A and 5B show plots of the displacement of a contaminant particle P relative to a patterning surface 40 over time. FIG. 5A shows the displacement of a contaminant particle P with no bias voltage applied to the patterning surface during an EUV lithography process. FIG. 5B shows the displacement of a contaminant particle P with an applied bias voltage on the patterning surface. The plot of FIG. 5B does not directly relate to the particular manner in which the bias voltage is applied to the patterning surface 40. The situation underlying the plot depicted in FIG. 4A corresponds to the situation underlying the plot depicted in FIG. 5A, and the situation underlying the plot depicted in FIG. 4B corresponds to the situation underlying the plot depicted in FIG. 5B. In FIGS. 4B and 5B, the bias voltage applied to the patterning surface 40 is a constant bias voltage of approximately −1 V.

[0050] 4A shows that with no bias voltage applied, the voltage at patterning surface 40 starts at approximately 0 V. At t=t1, lithographic apparatus 100 generates a pulse of EUV radiation, which causes the voltage at patterning surface 40 to rise rapidly and reach a maximum when the pulse of EUV radiation ends. The voltage at patterning surface 40 then decreases as the patterning surface discharges, reaching approximately 0 V by t=t2. This process is repeated when the next pulse of EUV radiation is generated at t=t3.

[0051] 5A, contaminant particle P is initially stationary in a direction perpendicular to surface 40. When a pulse of EUV radiation is initiated (t=t1), contaminant particle P begins to accelerate toward patterning surface 40. As patterning surface 40 discharges, the magnitude of this acceleration decreases. When the charge on patterning surface 40 returns to approximately 0 V (t=t2), contaminant particle P is no longer accelerated toward patterning surface 40 and continues to move toward patterning surface 40 at a constant velocity. When a second pulse of EUV radiation is initiated (t=t3), contaminant particle P again begins to accelerate toward patterning surface 40. Before the next pulse of EUV radiation is generated, the displacement between contaminant particle P and patterning surface 40 becomes zero, i.e., contaminant particle 40 adheres to patterning surface 40.

[0052] 4A and 5A depict only two pulses of EUV radiation. After these two pulses, the contaminant particle P is deposited on the patterning surface 40. In practice, more pulses of EUV radiation may be required to accelerate the contaminant particle P sufficiently to travel the distance between its initial position and the patterning surface 40. However, due to the high frequency of pulses of EUV radiation in a typical lithographic apparatus, even if the magnitude of the acceleration of the contaminant particle P towards the patterning surface 40 is relatively small, the effect that the EUV radiation has on the particle's path over time is significant.

[0053] In FIG. 4B, the bias voltage applied to patterning surface 40 is −1 V. Thus, before the first pulse of EUV radiation begins, the voltage at patterning surface 40 is approximately −1 V. When the pulse of EUV radiation begins (t=t1), the voltage at patterning surface 40 increases, as if no bias voltage were applied. FIG. 4B shows the voltage at patterning surface 40 becoming greater than 0 V (i.e., patterning surface 40 becomes positively charged). However, this is not necessarily the case; the magnitude of the negative bias voltage applied to patterning surface 40 may be sufficient to maintain the voltage at patterning surface 40 below 0 V (i.e., patterning surface 40 remains negatively charged) throughout the duration of each pulse of EUV radiation. The voltage at patterning surface 40 reaches a maximum at the end of the pulse of EUV radiation. After the pulse of EUV radiation ends, patterning surface 40 is discharged, and the voltage at patterning surface 40 becomes the same as the bias voltage applied to the patterning surface (t=t2). As with the case where no bias voltage is applied to patterning surface 40, discharge is initiated by the plasma in patterning device environment 90. However, discharge is also initiated by the application of a negative bias voltage. This results in a faster discharge rate at patterning surface 40. Therefore, the duration from time t1 to t2 (and from t3 to t4) is shorter when a negative bias voltage is applied to patterning surface 40 than when no negative bias voltage is applied to the patterning surface.

[0054] FIG. 5B illustrates the relative position of a contaminant particle P with respect to the patterning surface 40 over time as a bias voltage is applied to the patterning surface 40. The contaminant particle P is initially stationary in a direction perpendicular to the patterning surface 40. At this time, the voltage at the patterning surface 40 is approximately −1 V, causing the contaminant particle P to be repelled by the patterning surface 40 and accelerated away from the patterning surface 40. When the pulse of EUV radiation begins (t=t1) and the voltage at the patterning surface 40 becomes positive, the particle accelerates toward the patterning surface 40. In FIG. 5B, the direction of travel of the contaminant particle P is reversed, causing the particle to move briefly toward the patterning surface 40. However, this may not be the case, and the acceleration of the contaminant particle P toward the patterning surface 40 may simply cause the contaminant particle P to continue moving away from the patterning surface 40, albeit at a slower rate. If the pulse of EUV radiation does not cause the voltage at the patterning surface 40 to become positive, the contaminant particle will not be accelerated towards the patterning surface 40 at all. In this case, the contaminant particle P will continue to be accelerated away from the patterning surface 40, but the magnitude of this acceleration will be temporarily reduced.

[0055] Returning to the scenario of Figure 5B, when the pulse of EUV radiation ends and the voltage at the patterning surface 40 becomes negative, the contamination particles P are again accelerated away from the patterning surface 40. This process is repeated when the second pulse of EUV radiation begins.

[0056] The time that the contaminant particle 40 is accelerated towards the patterning surface 40 can be made small enough so that the distance between the contaminant particle P and the patterning surface 40 increases over time, so that the contaminant particle P does not deposit on the patterning surface 40.

[0057] Several embodiments of a patterning device voltage bias system are shown in Figures 6 to 18. The patterning device voltage bias system comprises a patterning device MA and a voltage source 61. The patterning device voltage bias system is configured such that the voltage source 61 can apply a bias voltage to the patterning surface 40 of the patterning device MA. This bias voltage may be a negative bias voltage. The embodiments described below are intended to be exemplary, and the invention is not limited to applying a bias voltage to a patterning surface in these exact same ways.

[0058] [First embodiment] 6-8 show a patterning device voltage bias system 10 comprising a patterning device MA, a voltage source 61, and a conductive member 50 electrically connected to the voltage source 61. The conductive member 50 is configured to contact the patterning surface 40 of the patterning device MA such that a negative bias voltage can be applied to the patterning surface 40 during a lithographic process.

[0059] In the following description, the vertical direction is the direction in which the patterning device MA is located below the support structure MT when the patterning device MA is supported by the support structure MT. The vertical direction may alternatively be referred to as the first direction. The terms "radially outer" and "radially inner" are used relative to the center of the patterning device MA, and the radial direction is perpendicular to the vertical direction.

[0060] The patterning device voltage bias system 10 may be configured to allow the system to transition between a non-contact configuration ( FIG. 6 ) and a contact configuration ( FIG. 7 ). In the non-contact configuration, the conductive members 50 are vertically spaced from the patterning surface 40 so that a negative bias voltage is not applied to the patterning surface 40. In the contact configuration, the conductive members 50 are in contact with the patterning surface 40 so that a negative voltage can be applied to the patterning surface 40. The contact and non-contact configurations correspond to the first and second configurations in the claims, respectively.

[0061] The conductive members 50 may be configured to contact areas of the patterning surface 40 that are not important to the pattern projected from the patterning device MA. That is, the conductive members 50 may be configured to contact the patterning surface 40 in areas where doing so does not alter the pattern projected from the patterning surface 40. For example, this may be an area on the patterning surface 40 where no pattern is present.

[0062] The patterning device voltage bias system 10 may be configured such that the conductive members 50 contact the patterning surface 40 when the system transitions from the non-contact configuration to the contact configuration, which may be such that the conductive members 50 exert a contact force on the patterning surface 40. This contact force may ensure a constant electrical connection between the conductive members 50 and the patterning surface 40 and ensure that the bias voltage is supplied to the patterning surface 40 through the conductive members 50.

[0063] The conductive member 50 may be a flexible member. That is, the conductive member 50 may be elastically deformable. In the example shown in Figures 6 to 8, the conductive member 50 is a leaf spring. However, this is not required, and other types of conductive member 50 may be successfully implemented. The exact material of the conductive member 50 is not particularly limited. However, it is desirable that the material be electrically conductive and capable of some degree of elastic deformation. Furthermore, it is desirable that the material do not generate contaminating particles when deformed.

[0064] The conductive member 50 may be positioned within the patterning device voltage bias system 10 such that a portion of the conductive member 50 is located below the patterning device MA, i.e., the patterning device MA and the conductive member may overlap in the radial direction.

[0065] The conductive member 50 may be supported at a first end 52. In the example shown in FIG. 6 , the first end 52 of the conductive member 50 is supported by a conductive member support 53. The conductive member support 53 may fix the position of the first end 52 of the conductive member 50 relative to other components in the patterning device voltage bias system, such as the support structure MT. The second end 51, opposite the first end 52, may be configured to contact the patterning surface 40. The first end 52 of the conductive member 50 is located radially outward from the second end 51 of the conductive member 50. The conductive member support 53 and the first end 52 of the conductive member 50 may be located radially outward from the edge of the patterning device MA. The second end 51 of the conductive member 50 may be located radially inward from the edge of the patterning device MA.

[0066] The second end 51 of the conductive member 50 may include a contact area to improve the consistency of the electrical connection between the conductive member 50 and the patterning surface 40. The contact area may be in the form of a chamfered protrusion. Like the conductive member 50, the contact area may also be formed of a conductive material. The contact area may be formed of the same material as the conductive member 50.

[0067] The conductive member actuator 54 may be attached to the conductive member 50 between the first end 52 and the second end 51. That is, the conductive member actuator 54 may be attached to the conductive member 50 at a location that is radially outward from the second end 51 of the conductive member 50 and radially inward from the first end 51 of the conductive member 50.

[0068] The conductive member actuator 54 may be configured to move in the vertical direction. That is, the conductive member actuator 54 may be configured to move the portion of the conductive member 50 where the conductive member actuator 54 is attached to the conductive member 50 in the vertical direction. In this case, the conductive member actuator 54 may rotate the conductive member 50 around the first end 52.

[0069] In the non-contact configuration, the conductive member 50 may be in a non-contact position, and in the contact configuration, the conductive member 50 may be in a contact position. The non-contact position and the contact position correspond to the first and second positions in the claims, respectively. To move the conductive member 50 from the non-contact position to the contact position, the conductive member actuator 54 may move vertically upward, rotating the conductive member 50. In the schematic diagrams depicted in Figures 6-8, this rotation is counterclockwise.

[0070] The patterning device voltage bias system 10 may be configured so that the second end 51 does not slide along the patterning surface 40 when the conductive member 50 rotates from the non-contact position to the non-contact position. As discussed above, sliding motion can lead to abrasive wear that contributes to the generation of contaminant particles. To ensure that the second end 51 does not slide along the patterning surface 40 during rotation of the conductive member, the patterning device voltage bias system 10 may be configured so that the axis about which the second end rotates is in the plane of the patterning surface 40.

[0071] The conductive member support 53 may support the conductive member 50 such that the first end 52 of the conductive member 50 cannot rotate relative to the conductive member support 53. That is, the conductive member may be cantilevered. If rotation of the first end 52 were permitted relative to the conductive member support 53, relative movement would occur between the contact surfaces of the conductive member 50 and the conductive member support 53. Such sliding movement may cause abrasive wear and may lead to the generation of contaminant particles P. When the conductive member support 53 supports the conductive member 50 such that the first end 52 of the conductive member 50 cannot rotate relative to the conductive member support 53, rotation of the conductive member 50 about the first end 52 is accompanied by deformation of the conductive member 50. Preferably, this deformation is elastic.

[0072] The displacement of the conductive member 50 between the non-contact position and the contact position may be relatively small to avoid excessive deformation of the conductive member 50, which may contribute to material degradation due to fatigue. This may lead to the generation of contaminant particles P in the patterning device environment 90 and ultimately to complete failure (i.e., destruction) of the conductive member 50. For example, the rotation angle of the conductive member about the first end may be less than 10 degrees, preferably less than 5 degrees, and more preferably less than 1 degree. The rotation angle may be defined as the angle between a first line, which is a line connecting the first portion 52 and the second portion 51 when the conductive member 50 is in the non-contact position, and a second line, which is a line connecting the first portion 52 and the second portion 51 when the conductive member 50 is in the contact position.

[0073] At some point along the path of the conductive member 50 from the non-contact position to the contact position, the second end 51 of the conductive member 50 may contact the patterning surface 40. This prevents the second end 51 of the conductive member 50 from continuing to rotate in accordance with the upward movement of the conductive member actuator 54 and the continued rotation of the remainder of the conductive member 50. As a result, the second end 51 of the conductive member 50 exerts a force on the patterning surface 40. This force is in a direction opposite to the direction of movement of the actuator in transforming the conductive member from the non-contact position to the contact position. In the patterning device voltage bias system 10 depicted in Figures 6-8, this is in a vertically upward direction. As explained above, this force ensures that the conductive member 50 and the patterning surface 40 maintain stable contact throughout the lithography process, thereby ensuring that a bias voltage is consistently applied to the patterning surface 40.

[0074] The above-described step in which the patterning device voltage bias system 10 transitions from the non-contact configuration to the contact configuration may be referred to as the contact step. This contact step may be part of a larger patterning device MA placement process. Such a patterning device placement process may include moving the patterning device MA to a fixed position relative to the support structure MT, engaging a patterning device clamping mechanism (i.e., the clamping step), and moving the support structure MT and patterning device MA to a fixed position within the patterning device environment. Once the support structure MT and patterning device MA are moved into position, the patterning device voltage bias system 10 may transition from the non-contact configuration to the contact configuration. After the patterning device voltage bias system 10 reaches the contact configuration, a bias voltage may be applied to the patterning surface 40. The supply of the bias voltage from the voltage source 61 to the patterning surface 40 may be performed in the voltage bias step.

[0075] When patterning device voltage bias system 10 transitions from the non-contact configuration to the contact configuration, components within patterning device environment 90 should not slide against each other because sliding can cause abrasive wear and can lead to the generation of contaminating particles within the patterning device environment.

[0076] 6 to 8, the conductive member 50 may be connected to a voltage source 61 via a conductive member support 53. However, this is not essential, and the conductive member 50 may be provided with a separate member (e.g., a wire), so that the conductive member 50 does not have to be connected to the voltage source 61 via the conductive member support 53.

[0077] At least one of a resistor 62, an inductor, a diode, and a switch may be present between the conductive member 50 and the voltage source 61. Details of these components are provided below.

[0078] The above-described embodiments may further comprise landing portions 57 that can support the patterning device MA in the event of a failure of the support structure MT. Failure of the support structure MT may involve, for example, a loss of power to the support structure MT, resulting in a loss of attractive force between the support structure MT and the non-patterning surface 41 of the patterning device MA. Without such attractive force, the patterning device MA may move downwards, away from the patterning device clamp MT.

[0079] If the patterning device MA were allowed to move downwards unhindered, it could come into contact with other components in the lithography system, such as other optical components (e.g., mirrors 22, 24, 28). This could result in damage to the other optical components or to the patterning device MA itself. In the embodiment depicted in Figures 6 to 8, this is prevented by the conductive members 50 and landing portions 57.

[0080] If failure of the support structure MT occurs while the patterning device voltage bias system 10 is in the non-contact configuration, the patterning device MA is free to move downward until the patterning surface 40 contacts the conductive member 50. If failure of the support structure MT occurs while the patterning device voltage bias system 10 is in the contact configuration, the patterning surface 40 is already in contact with the conductive member 50. Once the conductive member 50 and the patterning surface 40 make contact, the conductive member 50 must deform in order for the patterning device MA to continue moving downward. As in the patterning device voltage bias system 10 depicted in Figures 6-8, this deformation would result in the second end 51 of the conductive member 50 moving downward and the conductive member 50 rotating in a clockwise direction. This deformation means that a force is applied to the patterning surface 40 in a direction opposite to the deformation of the conductive member 50. That is, the conductive member 50 exerts an upward force on the patterning surface 40. This force is in the opposite direction to the movement of the patterning device MA.

[0081] As the patterning device MA continues to move downward, the conductive members 50 will deform more and more, increasing the upward force they exert on the patterning surface 40. This may cause the patterning device MA to slow down.

[0082] At some point, the conductive member 50 may be deformed enough to contact the landing portion 57. The surface of the landing portion 57 may be generally parallel to the patterning surface 40. The landing portion 57 may be positioned within the patterning device voltage bias system 10 such that the landing portion 57 is located below the patterning surface 40 when the patterning device MA is supported by the support structure MT. The patterning device MA and the landing portion 57 may overlap radially, with a radially outer portion of the patterning device MA located directly below a radially inner portion of the landing portion 57. The landing portion 57 may be supported by a landing portion frame 56.

[0083] 8 shows the patterning device voltage bias system 10 with the conductive member 50 in contact with the landing portion 57. This may be considered a landing configuration of the patterning device voltage bias system 10, with the conductive member 50 in the landing position. The landing position corresponds to the third position defined in the claims. In this position, the second end 51 of the conductive member 50 is prevented from further deformation by the landing portion 57. This means that the patterning device MA is stationary. That is, the patterning device is prevented from further downward movement by the conductive member 50, and the conductive member 50 is prevented from further downward movement by the landing portion 57. This sequence of events may be referred to as the landing step. Preventing the patterning device MA from further downward movement prevents damage to components, such as optical components 22, 24, and 28, that may be positioned below the patterning device MA.

[0084] Because the patterning device MA is gradually decelerated by the conductive member 50, a hard landing (where the patterning device MA impacts the landing portion 57 directly and comes to a near-instantaneous stop) is avoided. This means that the patterning device MA is less likely to be damaged if the support structure MT fails. Furthermore, this function is provided by the same component (conductive member 50) that facilitates the application of a bias voltage to the patterning surface 40 of the patterning device MA. That is, a single component (conductive member 50) in the patterning device voltage bias system 10 enables the bias voltage to be applied to the patterning surface 40, ensuring a soft landing of the patterning device MA on the landing portion 57 if the support structure MT fails.

[0085] This mechanism for soft landing of the patterning device MA by the conductive members 50 onto the landing portion 57 in the event of a failure of the support structure MT is not limited to being implemented in the exact embodiment described above. For example, it could be implemented in a mechanism where the conductive members 50 are not conductive and are not configured to apply a bias voltage to the patterning surface 40. That is, the patterning device support system could comprise a landing portion and a deformable member that is not part of the patterning device voltage bias system, configured similarly to the landing portion 57 and conductive members 50 described above.

[0086] 6-8 depict a single landing portion 57. However, there may be multiple landing portions 57 evenly distributed around the periphery of the patterning device MA so that the patterning device 57 can be supported on all sides in the event of a failure of the support structure MT. Each landing portion 57 may have a corresponding conductive member 50. This ensures that the landing of the patterning device MA on the landing portions 57 is soft all around the periphery of the patterning device MA.

[0087] Providing multiple conductive members 50 in the patterning device voltage bias system 10 allows the current flowing through the patterning surface 40 to be divided among the multiple conductive members 50, thereby reducing the magnitude of the current at any one point on the patterning surface 40. This is beneficial because the current flowing through the patterning surface 40 causes the patterning surface 40 to heat up. Heating can deform the patterning surface 40 and reduce the quality of the pattern projected from the patterning surface 40 onto the substrate W.

[0088] The number of landing portions 57 and conductive members 50 need not be exactly the same. For example, there may be more conductive members 50 than landing portions 57, or more landing portions 57 than conductive members 50. In one example, there may be four landing portions 57 (circumferentially distributed around the patterning device MA, each 90 degrees apart), but only one conductive member 50.

[0089] [Second embodiment] An alternative patterning device voltage bias system 11 is depicted in FIG. 9. As with the previous embodiment, the patterning device voltage bias system 11 comprises a patterning device MA having a patterning surface 40 and a voltage source 61. The patterning device voltage bias system further comprises a support structure MT comprising a plurality of burls 70 (e.g., cone-shaped protrusions) on a support surface 42 of the support structure MT facing a non-patterning surface 41 of the patterning device MA. When the patterning device MA is clamped to the support structure MT, the non-patterning surface 41 contacts the distal ends of the plurality of burls 70. It is not necessary for each of the plurality of burls to contact the non-patterning surface 41. In general, the distal ends of one or more of the plurality of burls 70 may contact the non-patterning surface 41 of the patterning device MA. The non-patterning surface 41 is sometimes referred to as the backside of the patterning device MA.

[0090] Non-patterning surface 41 may be electrically conductive. For example, patterning device MA may be provided with a conductive coating that forms non-patterning surface 41. The conductive coating may be provided to enable patterning device MA to be clamped to a support structure MT, which may be an electrostatic clamp.

[0091] The patterning device voltage bias system 11 may be configured to allow the non-patterning surface 41 to be electrically connectable to a voltage source 61 via a plurality of burls 70. The electrical connections between the voltage source 61 and the plurality of burls 70 may be configured such that the support surface 42 of the support structure MT is electrically connected to the voltage source 61, the plurality of burls 70 are electrically connected to the support surface 42 of the support structure MT, and the plurality of burls 70 are electrically connected to the non-patterning surface 41 of the patterning device MA. It is not necessary for each of the plurality of burls to be electrically connected to the non-support surface 41. In general, one or more of the plurality of burls 70 may be electrically connected to the non-patterning surface 41.

[0092] Additionally, the patterned surface 40 and the non-patterned surface 41 are electrically connected. The electrical connection between the patterned surface 40 and the non-patterned surface 41 may be via paths integrated into the patterning device MA itself. Alternatively, the electrical connection between the patterned surface 40 and the non-patterned surface 41 may be via external paths such as wires, as shown in Figure 9.

[0093] With the above-described configuration, a bias voltage can be applied to the patterning surface 40 via the support surface 42 of the support structure MT, one or more of the multiple burls 70, the non-patterning surface 41 of the patterning device MA, and the electrical connection between the non-patterning surface 41 and the patterning surface 40.

[0094] At least one of a resistor 62, an inductor, a diode, and a switch may be present between the voltage source 61 and the plurality of varls 70. Additionally or alternatively, at least one of a resistor 63, an inductor, a diode, and a switch may be present between the non-patterned surface and the patterned surface. These components are described in more detail below.

[0095] The patterning surface 40 and the non-patterning surface 41 may not be electrically connected to each other. The patterning surface 40 may be electrically isolated or may be electrically floating. In such an embodiment, a bias voltage may be applied to the patterning surface 40 capacitively. To capacitively induce a bias voltage on the patterning surface 40, a voltage may be applied to the non-patterning surface 41, i.e., the backside of the patterning device MA, as described above, i.e., via the support surface 42 of the support structure MT and one or more of the plurality of burls 70. When a voltage is applied to the non-patterning surface 41, an electric field may be established between the non-patterning surface 41 and a grounded component within the lithographic apparatus. The grounded component may include a masking blade (not shown). The masking blade may be provided within the lithographic apparatus adjacent to the patterning surface 40 of the patterning device MA. For example, the masking blade may be provided spaced apart from the patterning surface 40 in the Z direction. The masking blades may be configured to selectively mask the patterning device MA from the EUV radiation beam during exposure. The patterning surface 40 may be located in an electric field such that when a voltage is applied to the non-patterning surface 41, a bias voltage may be capacitively induced on the patterning surface 40.

[0096] [Grounding the patterning device] The patterning device voltage bias system 11 may be configured to allow the non-patterning surface 41 to be electrically connected to ground 67 via one or more of a plurality of crowbars 70. In this context, "ground" refers to a charge sink that can absorb a significant amount of charge relative to the amount of charge that may accumulate on the patterning device MA during operation of the lithographic apparatus. The exact configuration of the ground is not particularly limited. In some embodiments, the ground may be provided by a power supply 61 that is used to supply a bias voltage to the patterning surface 41 of the patterning device MA.

[0097] An example of a patterning device voltage bias system 11 that allows the non-patterning surface 41 to be electrically connected to ground 67 via one or more of a plurality of burls 70 is depicted in Figure 10. When the non-patterning surface 41 is electrically connected to ground 67 via one or more of a plurality of burls, it may be possible to discharge the patterning device MA (i.e., discharge the non-patterning surface 41 and / or the patterning surface 40).

[0098] 10 , the non-patterning surface 41 is connectable to a power supply 61 and a ground 67 via a plurality of buckles 70. A patterning device voltage bias system 11 in which the non-patterning surface 41 is connectable to a power supply 61 and a ground 67 via a plurality of buckles 70 may include a mode change switch 65. The mode change switch 65 may operate as a bidirectional switch. That is, the mode change switch may be configured such that, at any given time, the non-patterning surface 41 is either (i) connected to the power supply 61 via one or more of the plurality of buckles 70, or (ii) connected to the ground 67 via one or more of the plurality of buckles 70. The patterning device voltage bias system 11 may be configured such that the non-patterning surface 41 is connected to the power supply 61 via the plurality of buckles 70 while the lithographic apparatus is performing an exposure operation, and such that the non-patterning surface 41 is connected to the ground 67 via the plurality of buckles 70 during loading and unloading.

[0099] Capacitance may exist between the above-mentioned components. In particular, the capacitance between the support surface 42 of the patterning device holder MT and the non-patterning surface 41 of the patterning device MA can be considered to be a variable capacitance that varies as a function of the gap between the support surface 42 of the patterning device holder MT and the non-patterning surface 41 of the patterning device MA.

[0100] In a closed system, charge cannot enter or leave the system, and for a given initial charge state, a change in the spacing between patterning device MT and patterning device MA will result in a change in the variable capacitance. This change in capacitance will, in turn, cause the potential on either side of the capacitance to change, possibly significantly, as the spacing changes. In particular, the relationship Q=CV must always hold for each capacitance (assuming no charge is injected). Thus, if the capacitance C changes and the amount of charge Q contained in that capacitance remains the same, the potential V must change inversely proportional to the changing capacitance C. This can result in significant potential amplification.

[0101] As explained above, charge can accumulate on isolated surfaces of the patterning device MA, for example, patterning surface 40 and non-patterning surface 41. When a clamped patterning device MA is released from the patterning device holder MT, a residual charge can remain on the patterning device MA. The residual charge that is likely to be present on the patterning device before it is unclamped from the patterning device support MT can be a negative electrostatic charge on the non-patterning surface 41. This negative electrostatic charge can arise from negative free charges in the plasma being attracted to the non-patterning surface 41.

[0102] As the unclamped patterning device MA moves away from the support surface 42, the increasing separation between the support surface 42 and the non-patterning surface 41 can decrease the capacitance and amplify the potential. That is, considering the proportional relationship between charge and potential in a closed system (i.e., Q = CV), if the capacitance changes (inversely proportional to the separation between the parallel plates), a decrease in capacitance results in a proportional increase in potential. Thus, when the patterning device MA and the patterning device support MT are separated, the potential of the patterning device MA may increase sufficiently to cause a hydrogen gas discharge. Such a discharge can lead to damage to the patterning device MA, the patterning device holder MT, and / or particle generation, which can lead to subsequent defects. Therefore, it is preferable that there is little or no residual charge on the patterning device MA before the patterning device MA is unloaded from the patterning device support MT. Similarly, it is preferable that there is little or no residual charge on the patterning device MA before the patterning device MA is loaded onto the patterning device support MT.

[0103] Current techniques for discharging the patterning device MA before or during unloading may involve generating EUV radiation while the patterning device MA is being unloaded. As explained above, the presence of EUV radiation results in the presence of a plasma in the environment surrounding the patterning device MA. As the spacing between the patterning device MA and the patterning device support MT increases, positive ions in the plasma can migrate to the non-patterned surface 41, thus discharging the non-patterned surface 41. However, if the spacing is small, the positive ions cannot reach the non-patterned surface 41. By the time the spacing between the patterning device support MT and the non-patterned surface 41 is sufficient to allow positive ions in the plasma to reach the non-patterned surface, the potential of the patterning device MA may already have risen significantly (e.g., by several hundred times Vs).

[0104] Another technique for reducing the risk of discharge during unloading may involve setting the potentials of the electrodes in the patterning device support MT so that the average potential is negative during exposure. This capacitively induces a negative potential on the non-patterned surface 41. This negative potential repels electrons in the plasma during exposure and reduces the extent to which negative charge accumulates on the non-patterned surface during exposure. However, the optimal potential induced on the non-patterned surface 41 varies, and this approach may not completely prevent the accumulation of negative charge on the non-patterned surface 41 during the time prior to unloading. That is, this approach may not completely solve the electrostatic discharge problem during unloading of the patterning device MA.

[0105] 10, by connecting the non-patterned surface 41 to ground 67 via a plurality of burls 70, the non-patterned surface 41 can be effectively discharged before loading and unloading, thereby reducing the risk of electrostatic discharge.

[0106] 10, the structure of the mode change switch 65 is not particularly limited. The mode change switch 65 may include an electrical or mechanical switching means. The switching of the mode change switch 65 may be controlled by a computer program.

[0107] 10, mode change switch 65 is a bidirectional switch implemented so that a bias voltage can be applied to patterning device MA or so that patterning device MA can be connected to ground. However, this is not required; a bias voltage may be applied to patterning surface 40 while simultaneously connecting the patterning device to ground. Further details on how this may be achieved are provided in the "Configuration of Crowbars" section below.

[0108] If a bias voltage is applied to patterning surface 40 and at the same time the patterning device is connected to ground, a voltage supply switch may be provided between patterning device MA and voltage supply 61, and a separate ground switch may be provided between patterning device MA and ground 67. However, it may not be necessary to provide a voltage supply switch between the patterning device and voltage supply 61, and it may not be necessary to provide a ground switch between patterning device MA and ground 67.

[0109] A current limiting component 66 may be disposed in the connection between the plurality of crowbars 70 and ground 67. The current limiting component 66 may be disposed between the mode change switch 65 and ground 67. The current limiting component 66 may ensure that the current within the patterning device MA (e.g., within the non-patterning surface) is not excessive when the patterning device MA is discharged to ground. Excessive current within the patterning device MA (e.g., within the non-patterning surface 41) could damage the patterning device MA. The current limiting component 66 may be configured to ensure that the current does not exceed 1000 mA, preferably does not exceed 500 mA, and more preferably does not exceed 100 mA when the patterning device MA is discharged to ground.

[0110] Whilst it may be preferable to limit the current in the patterning device MA during discharging to ensure that the patterning device MA is not damaged, it may also be preferable to ensure that the discharge occurs quickly enough so as not to delay the unloading process, for example it may be preferable that the discharge of the patterning device MA occurs in less than 1 second, preferably less than 0.5 seconds, and even more preferably less than 0.1 seconds.

[0111] Current limiting component 66 may include a resistor. The resistor's resistance (R2) may be large enough to ensure that the current in patterning device MA during discharging does not damage the patterning device MA. The resistor's resistance (R2) may also be small enough to ensure that the time it takes for patterning device MA to discharge does not delay the unloading process. For example, the resistance (R2) may be greater than 1 Ω, preferably greater than 10 Ω, and more preferably greater than 200 Ω. Desirably, the resistance may be less than 10 kΩ, preferably less than 1 kΩ, and more preferably less than 400 Ω. If two or more resistors 66 are provided between patterning surface 40 and ground 67, the resistance values ​​specified above may apply to the total resistance (i.e., effective resistance) of the resistor combination. That is, the resistance values ​​specified above may apply to the total resistance between patterning surface 40 and ground.

[0112] Alternatively or additionally, the current-limiting component may include an inductor having an inductance. If an inductor is provided, the inductance of the inductor may be greater than 1 μH, preferably greater than 1 mH, and more preferably greater than 5 mH. The inductor may have an inductance less than 100 mH, preferably less than 50 mH, and more preferably less than 10 mH. For example, the inductor may have an inductance of approximately 10 mH. If two or more inductors are provided between the patterning surface 40 and ground 67, the inductance values ​​specified above may apply to the total inductance (i.e., effective inductance) of the combination of inductors. That is, the inductance values ​​specified above may apply to the total inductance between the patterning surface 40 and ground 67. The patterning device voltage bias system 11 may be configured such that the non-patterning surface 41 is connected to ground 67 via a plurality of crowbars 70 before the patterning device MA is unloaded from the patterning device support MT (i.e., before the patterning device MA begins to separate from the patterning device support MT). This ensures that the patterning device MA is substantially fully discharged before the distance between the patterning device MA and the patterning device support MT increases. As a result, an increase in the potential of the patterning device MA during unloading can be avoided. The patterning device MA may remain connected to ground 67 while the unloading procedure is being performed.

[0113] The patterning device voltage bias system 11 may be configured such that the non-patterning surface 41 is connected to ground 67 via a plurality of crowbars 70 before the patterning device MA is loaded onto the patterning device support MT. The patterning device MA may remain connected to ground 67 during the loading process. The function of the mode change switch may be changed when the patterning device MA is fully loaded onto the patterning device support MT. That is, the non-patterning surface 41 may be connected to the power supply 61 so that a bias voltage can be applied when the patterning device MA is fully loaded onto the patterning device support MT.

[0114] Discharging of the patterning device MA through one or more of the plurality of burls 70 has been described above in relation to the second embodiment in which a bias voltage can be applied to the patterning surface 41 of the patterning device MA through one or more of the plurality of burls 70. However, discharging of the patterning device MA through one or more of the plurality of burls 70 is not limited to being performed in such an embodiment. For example, discharging of the patterning device MA may be performed in a configuration such as the first embodiment described above. Furthermore, in some embodiments, discharging of the patterning device MA may be performed through a conductive member such as the conductive member 50 described in relation to the first embodiment.

[0115] The following sections outline a number of other features that may be implemented in either the first or second embodiment, or in any other suitable method for applying a bias voltage to patterning surface 40 of patterning device MA.

[0116] Limiting the current through the patterning device during the EUV pulse In some embodiments, the bias voltage may be applied continuously throughout the sequence of exposure operations performed by the lithographic apparatus, i.e., the same bias voltage may be supplied to the patterning surface 40 when the EUV pulse is off and when the EUV pulse is on. For example, a negative bias voltage may be supplied to the patterning surface 40 when the EUV pulse is off, and the same negative bias voltage may be supplied to the patterning surface 40 when the EUV pulse is on.

[0117] However, during each pulse of EUV radiation, a very large current may be drawn from voltage source 61. The magnitude of this current may be large enough to damage components such as voltage source 61. Also, if a very large current is supplied to the patterning device MA, it may heat up. This may cause deformation of the patterning device MA and lead to errors in the pattern projected from the patterning device MA onto the substrate W. Therefore, it may be preferable to control or limit the current through the patterning device throughout operation of the lithographic apparatus, or at least during each radiation pulse. To achieve this, patterning surface 40 may be connected to voltage source 61 via at least one of resistors 62, 63, an inductor, a diode, or a switch.

[0118] If resistors 62, 63 are provided in the path between voltage source 61 and patterning surface 40, the amount of current drawn from voltage source 61 between pulses of EUV radiation is limited by these additional resistances in the circuit. Resistors 62, 63 may have resistances greater than 1 Ω, preferably greater than 10 Ω, and more preferably greater than 200 Ω. Desirably, the resistances may be less than 10 kΩ, preferably less than 1 kΩ, and more preferably less than 400 Ω. If more than one resistor 62, 63 is provided between patterning surface 40 and voltage source 61, the resistance values ​​specified above may apply to the total resistance (i.e., effective resistance) of the resistor combination. That is, the resistance values ​​specified above may apply to the total resistance between voltage source 61 and patterning surface 40. In this manner, an RC characteristic of approximately 1 μs can be achieved for the circuit. Desirably, the RC characteristic is less than or equal to approximately 10 μs.

[0119] An inductor may be provided in place of or in addition to a resistor in the path between voltage source 61 and patterning surface 40. If an inductor is provided, the inductor's inductance may be greater than 1 μH, preferably greater than 1 mH, and more preferably greater than 5 mH. The inductor's inductance may be less than 100 mH, preferably less than 50 mH, and more preferably less than 10 mH. For example, the inductor's inductance may be approximately 10 mH. If two or more inductors are provided between patterning surface 40 and voltage source 61, the inductance values ​​specified above may apply to the total inductance (i.e., effective inductance) of the combination of inductors. That is, the inductance values ​​specified above may apply to the total inductance between voltage source 61 and patterning surface 40.

[0120] Alternatively, a switch may be provided between voltage source 61 and patterning surface 40. This switch may be referred to as a timing switch. The patterning device voltage bias system may be configured such that the timing switch is open while a pulse of EUV radiation is being generated and closed when a pulse of EUV radiation is not being generated. That is, a bias voltage may be supplied to patterning surface 40 when the EUV pulse is off, while no bias voltage may be supplied to patterning surface 40 when the EUV pulse is on. In this manner, no current flows through patterning device MA when an EUV pulse is generated. That is, a surge of current from voltage source 61 to patterning surface 40 when an EUV pulse is generated is prevented.

[0121] To provide this functionality, the timing switch may be operable at the same frequency as the frequency of the EUV pulses. For example, the timing switch may be operable at a frequency greater than 49 kHz, preferably greater than 59 kHz, and more preferably greater than 99 kHz. For example, the timing switch may be operable at 100 kHz. The timing switch may be configured to be controlled by a signal from another component within lithographic apparatus 100 that corresponds to turning the EUV pulses on and off. That is, the opening and closing control of the timing switch may be synchronized with the turning on and off of the pulses of EUV radiation.

[0122] This scenario, in which the bias voltage is periodically switched on and off, differs from the application of the bias voltage shown in Figures 4A-5B. If no bias voltage is supplied to the patterning surface 40 while the pulse of EUV radiation is on, the rise in voltage at the patterning surface 40 during the EUV pulse may be greater than that shown in Figure 4B. However, because the bias voltage may be supplied to the patterning surface 40 immediately after the pulse of EUV radiation is switched off, the voltage at the patterning surface 40 quickly decreases and becomes negative again. Thus, a voltage bias system in which no bias voltage is supplied to the patterning surface 40 while the pulse of EUV radiation is on still has the effect of increasing the distance between the contaminant particle P and the patterning surface 40 over time.

[0123] The resistor and / or inductor may be provided within the patterning device or in an external circuit, for example, the resistor and / or inductor may be provided closer to the voltage source than the timing switch.

[0124] [Positive bias voltage] In the above embodiments, reference has been made to applying a negative bias voltage to the patterning surface 40 such that negatively charged contaminant particles P are repelled from the patterning surface 40. However, situations may arise where contaminant particles in the patterning device environment are positively charged. In this case, a positive bias voltage may be applied to the patterning surface 40 such that the positively charged contaminant particles P are repelled by the positively charged patterning surface 40.

[0125] Embodiments also include applying a variable bias voltage.

[0126] In particular, embodiments include applying a positive voltage while the EUV pulse is on and applying a negative bias voltage when the EUV pulse is off.

[0127] As explained above, EUV-induced electron emission from patterning surface 40 due to the photoelectric effect contributes to the deposition of contaminant particles P (and therefore imaging errors) on the patterning surface because (i) the emission of electrons causes patterning surface 40 to become positively charged (at a positive potential), which attracts negatively charged contaminant particles, and (ii) the emission of electrons can add additional electrons to the plasma in patterning device environment 90, increasing the number of negatively charged contaminant particles or the magnitude of the negative charge on contaminant particles P. Therefore, by reducing or preventing the emission of electrons while patterning surface 40 is exposed to EUV radiation, the number of contaminant particles P that deposit on patterning surface 40 can be reduced.

[0128] By inducing a positive potential on patterning surface 40 while it is exposed to EUV radiation, electron emission from the patterning surface can be reduced, resulting in patterning surface 40 becoming less positively charged and contributing fewer electrons to the plasma in patterning device environment 90.

[0129] The magnitude of the positive bias potential applied to the patterning surface 40 may be sufficient to prevent electron emission due to the photoelectric effect, i.e., the magnitude of the positive bias is such that the positive potential induced on the patterning surface 40 is greater than the stopping potential (V stop ), the maximum kinetic energy of electrons emitted by photoemission is given by equation (2), where h is Planck's constant (4.14×10 -15 eV), f is the frequency of the radiation, and φ is the work function of the material (i.e., the minimum energy required to eject an electron from the surface). The work function is a property of the material at the surface from which the electrons are ejected. E kmax =hf-φ (2)

[0130] Photoemission will not occur if the energy supplied to the electrons by the electric field resulting from the positive potential induced on the patterning surface 40 is greater than the maximum possible kinetic energy of the emitted electrons. Therefore, the stopping potential can be defined as Equation (3): eV stop =hf-φ (3)

[0131] In EUV lithography, the wavelength of the radiation may be approximately 13.5 nm. Therefore, the photon energy of one photon in the EUV radiation beam may be approximately 92 eV. The work function of the patterning surface 40 may depend on the material from which the patterning surface 40 is formed. Generally, the work function may be between 2 eV and 7 eV. If the work function is 7 eV or less, a potential induced on the patterning surface 40 of approximately 85 V or greater may be preferred to substantially suppress photoemission. If the work function is 2 eV or less, a potential induced on the patterning surface 40 of approximately 90 V or greater may be preferred to substantially suppress photoemission. The majority of electrons emitted from the patterning surface 40 upon exposure to EUV radiation generally have low energy, e.g., less than 10 eV. This may be because EUV photons are absorbed at an effective depth of approximately 10 to 100 nm. Electrons that absorb EUV photons may lose energy as they propagate across the vacuum interface from the absorption site to the surface. With this in mind, applying a positive bias voltage of greater than +50 V may be sufficient to significantly suppress electron emission due to the photoelectric effect. In this case, the positive bias voltage may be less than 100 V to reduce the risk of discharge. Applying a positive bias of greater than 5 V may be sufficient to moderately suppress electron emission due to the photoelectric effect. In this case, the positive bias voltage may be less than 50 V to further reduce the extent to which a positive bias voltage applied to the patterning surface leads to physical sputtering of ions onto a grounded surface, such as a masking blade. With this in mind, a positive bias voltage greater than 5 V but less than 50 V may be preferred.

[0132] The patterning device voltage bias system may be synchronized to the pulses of EUV radiation produced by the lithographic apparatus to apply a negative bias voltage to the patterning surface 40 when the EUV pulse is off and to provide a positive bias voltage to the patterning surface 40 when the EUV pulse is on. The means for switching the polarity of the bias voltage is not particularly limited.

[0133] An additional benefit of biasing the patterning surface 40 to a positive voltage while EUV radiation is present in the lithographic apparatus is that positive ions (e.g., hydrogen ions) formed by EUV-induced ionization may be repelled from the patterning surface. If the positive ions impinge on the patterning surface 40, they may cause damage to the patterning surface 40. Therefore, by biasing the patterning surface 40 to a positive voltage, fewer positive ions may impinge on the patterning surface 40, and the positive ions that impinge on the patterning surface 40 may have lower energies. This reduces damage to the patterning surface 40 from the ions.

[0134] The positive bias voltage can be applied to the patterning surface using any suitable means. The positive bias voltage may be applied via the same means used to apply the negative bias voltage. For example, the positive bias voltage may be applied as described in connection with the first and second embodiments.

[0135] Alternatively, the patterning surface 40 can be brought to a positive voltage by limiting the current in a circuit that supplies a negative bias voltage to the patterning surface 40. For example, the current in the circuit that supplies the bias voltage can be limited so that it is less than the current corresponding to the emission of electrons from the patterning surface 40 due to the photoelectric effect. As a result, while the patterning surface 40 is exposed to EUV radiation, the voltage at the patterning surface can be determined by the current corresponding to the emission of electrons from the patterning surface 40 due to the photoelectric effect. This means that the power supply and corresponding circuitry can continue to operate as if a negative bias potential were applied to the patterning surface 40, yet still bring about a positive voltage at the patterning surface 40.

[0136] The current in the circuit supplying the bias voltage may be limited in any suitable manner. The current in the circuit supplying the bias voltage may be limited as described above in the section "Limiting the current through the patterning device during an EUV pulse." The degree to which the current in the circuit supplying the bias voltage is limited may be varied over time and / or may be controllable. For example, the current may be more limited while the patterning surface 40 is exposed to a pulse of EUV radiation compared to when the patterning surface 40 is not exposed to EUV radiation. This may allow for a positive voltage to be provided to the patterning surface 40 when the patterning surface 40 is exposed to EUV radiation.

[0137] [Bar configuration] As mentioned above, the non-patterned surface 41 may be grounded through one or more of the plurality of burls 70. The one or more of the plurality of burls may comprise substantially all of the burls 70 on the support structure.

[0138] It may be preferable for the non-patterning surface 41 to be grounded through a small portion of the burls 70 on the support structure MT. These burls may be referred to as ground burls. The ground burls may account for less than 10%, preferably less than 5%, and more preferably less than 1% of the total burls 70 on the support structure MT. Grounding the non-patterning surface 41 through a small percentage of the burls 70 allows the non-patterning surface 41 to be effectively discharged without compromising the clamping of the patterning device MA to the support structure MT.

[0139] The ground burls may be located at the boundary regions of the support structure. For example, the ground burls may be at the outermost ring of burls 70. The ground burls may also be located at one or more corners of the support structure MT. Placing the ground burls in such locations may reduce the effect of the grounding of burls 70 on the clamping of the patterning device MA to the support structure MT, or may limit the clamping of the patterning device MA to areas that are not critical to the quality of the image projected from the patterning device MA.

[0140] FIG. 11 is a plan view of a support structure MT according to one embodiment of the present invention. The visible surface of the support structure MT is the support surface 42. As depicted in FIG. 11, the support structure has a rectangular shape, although the present invention is not limited thereto. The support structure MT includes a plurality of burls 70 formed on the support surface 42, as previously described. The support structure MT further includes conductive tracks 68 formed on the support surface 42. The conductive tracks 68 may be formed around the periphery of the support surface 42. The conductive tracks 68 may also be formed on the outside of the burls 70.

[0141] The conductive tracks 68 may be connected to an interface 69. The interface 69 may allow the conductive tracks 68 to be connected to an external circuit, which may connect the interface to ground 67.

[0142] Among the plurality of burls 70, the support structure MT may include a plurality of ground burls (e.g., burls 70a, 70b, 70c). The ground burls 70a, 70b, 70c may be coated with a conductive material. The conductive material may be the same as the material forming the conductive track. The ground burls 70a, 70b, 70c may be electrically connected to the conductive track 68. The ground burls 70a, 70b, 70c may be electrically connected to the conductive track 68 via one or more extensions (e.g., extensions 68a, 68b, 68c) of the conductive track. As depicted in FIG. 11, each of the ground burls 70a, 70b, 70c may be provided with an extension 68a, 68b, 68c. The extensions 68a, 68b, 68c may extend inward from the conductive track 68 to the ground burls 70a, 70b, 70c. In some embodiments, one extension 68a, 68b, 68c may connect multiple grounding bars 70a, 70b, 70c to the conductive track 68.

[0143] The conductive tracks 68 may be formed of any suitable conductive material. For example, the conductive tracks may be formed of titanium nitride (TiN). The conductive material may be deposited on the support surface 42 using any suitable technique. After deposition, the conductive material may be patterned to form the shape of the coating for the conductive tracks 68, the extensions 68a, 68b, 68c, and the burls 70.

[0144] The bias voltage may be applied in a similar manner, i.e., via multiple bias bars (not shown), which may be connected to other conductive tracks via one or more extensions, and which may be different from the ground bars 68a, 68b, 68c.

[0145] In some embodiments, the bias crowbars may be the same as the ground crowbars. In this case, a mode-change switch may be provided between (i) the conductive tracks and (ii) a voltage source and ground. Thus, depending on the setting of the mode-change switch, a subset of the crowbars may apply a bias voltage and provide a connection to ground.

[0146] The above-described configuration allows the non-patterned surface 41 to be continuously grounded, regardless of whether a bias voltage is applied or not.

[0147] [Patterning device configuration] This section provides further details on how to apply a bias voltage to the patterning surface 40 of the patterning device MA via a physical connection.

[0148] 12A-12C depict a patterning device MA. The patterning device MA depicted in FIGS. 12A-12C may be a conventional patterning device MA. The patterning device MA depicted in FIGS. 12A-12C may be implemented in some embodiments of the present invention. FIG. 12A depicts a plan view of the patterning device MA showing the patterning surface 40. FIG. 12B depicts a cross-sectional view of the patterning device MA. The cross-section may be through the centerline depicted in FIG. 12A. FIG. 12C is a plan view of the patterning device MA showing the non-patterning surface 41, i.e., the backside of the patterning device MA.

[0149] As shown in FIG. 12B , the patterning device may include multiple portions 43a, 43b, and 43c arranged in layers. The reflective portion 43a may be electrically conductive. The reflective portion 43a may include a multilayer stack (not shown). The multilayer stack may be a distributed Bragg reflector. The multilayer stack may include alternating layers of materials. For example, the multilayer stack may include alternating layers of molybdenum (Mo) and silicon (Si), but the invention is not limited thereto. One or more of the materials in the multilayer stack may be electrically conductive. The reflective portion 43a may further include a capping layer (not shown). The capping layer may be formed of an electrically conductive material. For example, the capping layer may be formed of a material substantially comprising ruthenium (Ru).

[0150] The reflective portion 43a may be formed on a first surface of the core portion 43b. The core portion 43b may be a substrate for the reflective portion 43a. The core portion 43b may be formed of an ultra-low expansion (ULE) glass. For example, the core portion 43b may be formed of a material substantially comprising a lithium aluminosilicate glass ceramic (e.g., ZERODUR®). The conductive portion 43c may be formed on a second surface of the core portion 43b.

[0151] The second surface of the core portion 43b may be opposite to the first surface of the core portion 43b. The conductive portion 43c may cover substantially the entire second surface of the core layer 43b.

[0152] Patterning surface 40 may be the surface of the patterning device facing away from the support structure. Non-patterning surface 41 may be the surface of the patterning device facing towards the support structure.

[0153] 12A-12C includes a patterning region 45, a border region 46, and a peripheral region 47. The patterning region 45 may be located in a central region of the patterning surface 40. In the patterning region 45, the reflective portion 43a is provided on the core portion 43b. The patterning region 45 may be a region of the patterning surface 40 configured to be exposed to EUV radiation and to impart a pattern to the EUV radiation.

[0154] The boundary region 46 may surround the patterning region 45. In the boundary region 46, the reflective portion 43 a may not be provided on the core portion 43 b. That is, in the boundary region 46, the core layer 43 b (specifically, the first surface of the core layer 43 b) may be exposed. The boundary region 46 may not be reflective to EUV radiation. The boundary region 46 may be provided to avoid undesired exposure of a region surrounding an image area on the substrate W to be exposed. In some embodiments, the reflective portion 43 a may be present in the boundary region 46 with a reduced height.

[0155] A peripheral region 47 may surround the boundary region 46. In the peripheral region 47, the reflective portion 43a is provided on the core portion 43b. Of the regions that make up the patterning surface 40, the patterning region 45 and the peripheral region 47 may be electrically conductive, but the boundary region 46 may be substantially electrically insulating so as not to provide a direct electrical path between the peripheral region 47 and the patterning region 45.

[0156] In the patterning device MA depicted in Figures 12A-12C, the conductive layer 43c (and non-patterned surface 41) may be electrically insulated from the reflective layer 43a (and patterned surface 40). Consequently, to apply a bias voltage to the reflective portion 43a (and patterned surface 40) of the patterning device MA depicted in Figures 12A-12C, an electrical connection may be made using conductive members 50, as described in relation to the first embodiment. Additionally or alternatively, a bias voltage may be capacitively applied to the reflective portion 43a (and patterned surface 40) by applying a voltage to the conductive portion 43c (and non-patterned surface 41), for example, via crowbars 70.

[0157] To fabricate the patterning device depicted in FIGS. 12A-12C, reflective portion 43a may be formed on substantially all of the first surface of core portion 43b. Then, portions of reflective portion 43a may be selectively removed. For example, portions of reflective portion 43a corresponding to boundary region 46 may be removed. This may be done so that the first surface of core portion 43b is exposed in the boundary region. Alternatively, it may be done so that the height of reflective portion 43a above the first surface of core portion 43b is reduced. This may leave patterning region 45, boundary region 46, and peripheral region 47, as described above. Portions of reflective portion 43a may be removed by a process including lithography and etching.

[0158] Figures 13A and 13B illustrate an alternative patterning device MA according to one embodiment. Figure 13A illustrates a plan view of the patterning device MA showing the patterning surface 40. Figure 13B illustrates a cross-sectional view of the patterning device MA. The cross-sectional view may be the same view as that illustrated in Figure 12B. The patterning device MA illustrated in Figures 13A and 13B may be similar to the patterning device MA illustrated in Figures 12A-12C, except as described below.

[0159] In the patterning device MA depicted in FIGS. 13A and 13B , conductive portion 43b may be provided on one or more edges of the patterning device MA. The extended portion of conductive portion 43b may be referred to as conductive edge 44. Conductive edge 44 may extend from reflective portion 43a to conductive portion 43c. Conductive edge 44 may substantially cover the edge of core portion 43b. Conductive edge 44 may electrically connect conductive portion 43c and reflective portion 43a. That is, conductive edge 44 may connect non-patterned surface 41 and patterned surface 40. Specifically, conductive edge 44 may electrically connect conductive portion 43c and reflective portion 43a in peripheral region 47.

[0160] The patterning device MA may further include a bridge 48. The bridge 48 may electrically connect a peripheral region 47 of the reflective portion 43a and the patterning region 45 of the reflective portion 43a. The bridge 48 may be provided so as to straddle the boundary region 46. The bridge 48 may be a region within the boundary region 47 where the reflective layer 43a is provided so as to electrically connect the peripheral region 47 and the patterning region 45. The bridge may be formed by adjusting a portion of the reflective portion 43a that is removed when forming the boundary region 46. Specifically, when forming the boundary region 46 by removing a portion of the reflective portion 43a, a portion of the reflective portion 43a that corresponds to the bridge 48 may not be removed. That is, the bridge 48 is formed in the reflective portion 43a, and therefore may be made of the same material as the patterning region 45 and the peripheral region 47 of the reflective portion 43a. The bridge 48 may further be provided with an EUV absorbing layer. The bridge 48 may comprise a plurality of stripes connecting the patterning region 45 and the peripheral region 47. The width of each stripe may be smaller than the resolution of the lithographic apparatus. For example, the width of each stripe may be less than 40 nm, preferably less than 20 nm, and more preferably less than 10 nm. This may ensure that the bridge 48 does not degrade the pattern transferred from the patterning region 45 towards the substrate W.

[0161] 13A-13B, a bias voltage may be applied from a voltage supply 61 to the support surface 42 of the support structure MT, via one or more burls 70 on the support surface 42 of the support structure MT, via the conductive layer 43c of the patterning device MA, via the conductive edge 44, to the peripheral region 47 of the reflective portion 43a. The bias voltage may be applied to the patterning region 45 of the patterning device via the same path with the addition of a bridge 48, whereby the bias voltage is applied to the patterning surface 40.

[0162] In a patterning device MA, such as the patterning device MA depicted in FIGS. 13A and 13B, a current-limiting component, such as a resistor or inductor, may be implemented between the support surface 42 of the support structure MT and the voltage source 61. FIGS. 14-18 illustrate several embodiments in which a current-limiting component is integrated within the patterning device MA. The current-limiting component may be a feature formed in the reflective portion 43a and the conductive portion 43c. The current-limiting component may be formed, for example, during a process in which a portion of the reflective portion 43a is removed (e.g., etched away) to form the boundary region 46. Specifically, when a portion of the reflective portion 43a is removed, the portion of the conductive portion necessary to form the current-limiting component is not removed. That is, the current-limiting component 71 may be formed in the reflective portion 43a and thereby formed of the same material as the patterning region 45 and the peripheral region 47 of the reflective portion 43a.

[0163] 14A shows a plan view of the patterning surface 40 of a patterning device MA according to one embodiment, in which a current-limiting component 71 is integrated into the boundary region 46. The current-limiting component 71 may be electrically connected to the reflective portions 43a of the peripheral region 47 and the patterning region 45. The size of the features comprising the current-limiting component 71 may be such that the features are not imaged onto the substrate. That is, the size of the features comprising the current-limiting component 71 may be smaller than a critical dimension of the lithographic apparatus. For example, the dimensions of the features comprising the current-limiting component 71 may be less than about 40 nm, preferably less than 20 nm, and more preferably less than 10 nm. This may apply to any components or features formed within the boundary region 46 of the reflective portion 43a.

[0164] FIG. 14B illustrates a cross-sectional view of a first embodiment of a patterning device MA, as illustrated in FIG. 14A, having a current-limiting component 71 integrated into the boundary region 46 of the reflective portion 43a. The patterning device MA illustrated in FIG. 14B includes a conductive edge 44. As a result, a bias voltage can be applied to the reflective portion 43a of the patterning region 45 via the non-patterned surface 41, the conductive edge 44, the reflective portion 43a of the peripheral region 47, and the current-limiting component 71. In this manner, the current in the patterning region 45 of the reflective portion 43a can be limited. A current-limiting component positioned in this manner does not need to limit the current in the peripheral region 47 of the reflective portion 43a. Because deformation of the peripheral region 47 of the reflective portion 43a does not lead to imaging errors, limiting the current in the peripheral region 47 of the reflective portion 43a may not be as important.

[0165] FIG. 14C illustrates a cross-sectional view of a second example of a patterning device MA according to one embodiment, as illustrated in FIG. 14A, having a current-limiting component 71 integrated into a boundary region 46 of the reflective portion 43a. The patterning device MA may have the same plan view as that shown in FIG. 14A. The patterning device MA illustrated in FIG. 14C is similar to the patterning device MA illustrated in FIGS. 12A-12C in that it does not include a conductive edge 44. That is, in the patterning device MA illustrated in FIG. 14C, the reflective portion 43a may be insulated from the conductive portion 43c. Therefore, to apply a bias voltage to the patterning surface 40 (specifically, the patterning region 45 of the patterning surface 40), a conductive member 50 may contact the reflective portion 43a. Specifically, the conductive member 50 may contact a peripheral region 47 of the reflective portion 43a. In this manner, the patterning area 45 of the patterning surface 40 may be electrically connected to the voltage supply 61 via the current-limiting component 71 .

[0166] 15A shows a plan view of patterning surface 40 of a patterning device MA that is similar to the patterning device depicted in FIG. 14A, except that current-limiting component 72 is formed in peripheral region 47 of reflective portion 43a rather than in boundary region 46 of reflective portion 43a. Additional portions of reflective portion 43a may be removed from peripheral region 47 of reflective portion 43a to form current-limiting component 72. Bridge portion 73 may extend across boundary region 46 to electrically connect current-limiting component 72 to patterning region 45 of reflective portion 43a.

[0167] Figure 15B depicts a cross-sectional view of a first embodiment of a patterning device MA having a current-limiting component 72 integrated into peripheral region 47 of reflective portion 43a, as depicted in Figure 15A. In the patterning device MA depicted in Figure 15C, reflective portion 43a may be electrically connected to conductive portion 43c (as in the patterning device depicted in Figure 14B).

[0168] Figure 15C depicts a cross-sectional view of a second embodiment of a patterning device MA as depicted in Figure 15A, having a current-limiting component 72 integrated into peripheral region 47 of reflective portion 43a. In the patterning device MA depicted in Figure 15C, reflective portion 43a may not be electrically connected to conductive portion 43c (as in the patterning device depicted in Figure 14C).

[0169] Figures 16A-16C show a patterning device MA having a current-limiting feature 74 formed on a conductive portion 43c of the patterning device MA. Figure 16A shows a plan view of the patterning surface 40 of the patterning device, Figure 16B shows a cross-sectional view of the patterning device MA, and Figure 16C shows a plan view of the non-patterning surface 41 of the patterning device MA.

[0170] 16A, the patterning device MA may include a bridge 48 such that a peripheral region 46 of the reflective portion 43a is electrically connected to a patterning region 45 of the reflective portion 43a. The patterning device MA may further include a conductive edge 44.

[0171] Conductive portion 43c is patterned, i.e., portions of the conductive portion are absent such that core portion 43b is exposed. Specifically, portions of conductive portion 43c may be removed to form current-limiting component 74. Material removal may be performed by a process including lithography and etching.

[0172] The removal of material from the conductive portion 43c may occur near one edge of the conductive portion 43c. In the schematic depiction of FIG. 16C, this is the left edge. A large portion of the conductive portion 43c may be unaffected by the removal of material from the conductive portion 43c. That is, the unaffected area 80 may occupy more than 90% of the unpatterned surface, and preferably more than 99% of the patterned surface. This may be to ensure that the presence of the current-limiting component 74 within the conductive portion 43c does not significantly affect the ability of the unpatterned surface 41 to be clamped to the support structure MT.

[0173] In one embodiment, such as the embodiment described above, the current limiting component may be provided in the conductive coating, or alternatively, an insulating stripe may be provided in the clamp coating and the current limiting component may be provided in the external circuit.

[0174] An insulating stripe 78 may separate the unaffected area 80 from the current-limiting component 74. The insulating stripe may be an area where conductive portion 43c has been removed to leave the second surface of core portion 43b exposed.

[0175] The current-limiting component 74 may include an input area 75, an output area 77, and one or more current-limiting features 76a-76e. The input area 75, the output area 77, and the one or more current-limiting features 76a-76e may each be formed from the conductive portion 43c. That is, the input area 75, the output area 77, and the one or more current-limiting features 76a-76e may be defined by removing the conductive portion 43c from around the input area 75, the output area 77, and the one or more current-limiting features 76a-76e. The one or more current-limiting features 76a-76e may electrically connect the input area 75 and the output area 77. That is, the conductive portion 43c between the input area 75 and the output area 77 may not be present except for the current-limiting features.

[0176] One or more burls 70 configured to apply a bias voltage may contact an input area 75 of the conductive portion 43c. An output area 77 of the conductive portion 43c may be electrically connected to the conductive edge 44. Thus, a bias potential may be applied to the patterning region 45 of the reflective portion 43a via the support surface 42 of the support structure MT, the burls 70 of the support structure MT, the input area 75 of the conductive portion 43c of the patterning device MA, the one or more current-limiting features 76a-e of the conductive portion 43c of the patterning device, the output area 77 of the conductive portion 43c of the patterning device MA, the conductive edge 44, the peripheral region 47 of the reflective portion 43a, and the bridge 48.

[0177] In some embodiments, it may be preferable for the magnitude of the negative bias voltage applied to the peripheral region 47 of the patterning surface 40 to be greater than the magnitude of the negative bias voltage applied to the patterning region 45 of the patterning surface 40. Increasing the magnitude of the negative bias voltage applied to the peripheral region 47 of the patterning surface 40 may more effectively repel negatively charged contaminant particles from the patterning surface 40. However, increasing the magnitude of the negative bias voltage applied to the patterning region 45 of the patterning surface 40 may result in increased damage caused to the patterning region 45 of the patterning surface 40 through mechanisms such as implantation or blistering. Such damage is not significant if it occurs in the peripheral region 47 of the patterning surface 40, as this region does not affect the image projected onto the substrate W. Therefore, by increasing the magnitude of the negative bias voltage applied to peripheral region 47 of patterning surface 40 relative to the magnitude of the negative bias voltage applied to patterning region 45 of patterning surface 40, negatively charged contaminant particles can be more effectively repelled without increasing damage to patterning region 45 of patterning surface 40. If the desired bias voltage for patterning region 45 of patterning surface 40 is between −1 V and −10 V, the desired bias voltage for peripheral region 47 of the patterning surface may be between −10 V and −100 V, for example.

[0178] Different bias voltages may be applied to the peripheral region 47 of the reflective portion 43a and the patterned region 45 of the reflective portion 43a by connecting the peripheral region 47 of the reflective portion 43a and the patterned region 45 of the reflective portion 43a to different voltage sources (not shown). For example, the peripheral region 47 of the reflective portion 43a may be connected to a first voltage source (not shown) and the patterned region 45 of the reflective portion 43a may be connected to a second voltage source (not shown). Figures 17A-17C depict a patterning device MA that may be configured to allow the peripheral region 47 of the reflective portion 43a and the patterned region 45 of the reflective portion 43a to be connected to different voltage sources. Figure 17A shows a plan view of the patterning surface 40 of the patterning device, Figure 17B shows a cross-sectional view of the patterning device MA, and Figure 17C shows a plan view of the patterning device MA showing the non-patterned surface 41. The second voltage source may be switched off during the loading and unloading process, and when the second voltage source is switched off, the second voltage source may function as a ground.

[0179] The patterning surface 41 may comprise a patterning region 45, a border region 46a, and a peripheral region 47, as described above. An additional portion 46b of the peripheral region 47 of the reflective portion 43a may be removed such that there is a discontinuity in the peripheral region 47 of the reflective portion 43a. A bridge may extend from the edge of the peripheral region 47 (i.e., the edge of the patterning device MA) to the patterning region 45 of the conductive portion 43a. At the edge of the peripheral region 47, the bridge 48 may be connected to a bridge contact 49a. The bridge contact 49a, the bridge 48, and the patterning region 45 of the reflective portion 43a may be electrically isolated from the peripheral region of the reflective portion 43a. The patterning device MA may further comprise a peripheral contact 49b. The peripheral contact 49b may be electrically connected to the peripheral region 47 of the reflective portion 43a. The bridge contact 49a and the peripheral contact 49b may be formed from the same material as the conductive portion 43c.

[0180] The patterning device MA may include two or more conductive edges 44a, 44b. Each of the conductive edges 44a, 44b may be as described above. The conductive edges 44a, 44b may include a patterning region conductive edge 44a and a peripheral region conductive edge 44b. The patterning region conductive edge 44a and the peripheral region conductive edge 44b may be electrically isolated from each other. The patterning region conductive edge 44a may be electrically connected to a bridge contact 49a. The peripheral region conductive edge 44b may be electrically connected to a peripheral contact 49b. The patterning region conductive edge 44a may extend only partially across the edge of the patterning device MA such that the patterning region conductive edge 44a contacts the bridge contact 49a but does not contact the peripheral region 47 of the reflective portion 43a.

[0181] The conductive portion 43c may be patterned as described above. The non-patterned surface 41 may include two or more insulating stripes 78a, 78b. An unaffected region 80 of the conductive portion 43c may be located between the two insulating stripes 78a, 78b. The unaffected region 80 of the conductive portion 43c may provide a majority of the clamp. The unaffected region 80 may constitute a majority of the non-patterned surface 41, as described above. On a first side of the non-patterned surface 41 (the side corresponding to the bridge patterned region conductive edge 44a and bridge contact 49a), a first insulating stripe 78a may separate the unaffected region 80 from the current-limiting component. The current-limiting component 74 may include an input area 75, an output area 77a, and one or more current-limiting features 76a-76e. Each of the input area 75, the output area 77a, and the one or more current-limiting features 76a-76e may be formed from the conductive portion 43c, as described above. The one or more current-limiting features 76a-76e may electrically connect the input area 75 and the output area 77a.

[0182] One or more burls 70 configured to apply a bias voltage to patterning region 45 may contact input area 75 of conductive portion 43c. Output area 77a of conductive portion 43c may be electrically connected to patterning region conductive edge 44a. Thus, a bias potential may be applied to patterning region 45 of reflective portion 43a via support surface 42 of support structure MT, a subset of burls 70 of support structure MT, input area 75 of conductive portion 43c of patterning device MA, one or more current-limiting features 76a-e of conductive portion 43c of patterning device MA, output area 77a of conductive portion 43c of patterning device MA, patterning region conductive edge 44a, and bridge 48.

[0183] A second insulating stripe 78b may separate the unaffected area 80 of the conductive portion 43c from the input / output portion 77b. One or more burls 70 configured to apply a bias voltage to the peripheral region 47 may contact the input / output area 77b of the conductive portion 43c. The input / output area 77b of the conductive portion 43c may be electrically connected to the peripheral region conductive edge 44b. Thus, a bias voltage may be applied to the peripheral region 47 of the reflective portion 43a via the support surface 42 of the support structure MT, a subset of the burls 70 of the support structure MT, the input / output area 77b of the conductive portion 43c of the patterning device MA, and the peripheral region conductive edge 44b.

[0184] The bridge contact 49a and the peripheral region contact 49b may be part of the patterned region conductive edge 44a and the peripheral region conductive edge 44b, respectively.

[0185] In the patterning device MA depicted in Figures 17A-17C, different bias voltages can be applied to the patterning region 45 and the peripheral region, and current-limiting components are formed in the conductive portion 43c. Also, in the patterning device MA depicted in Figures 18A-18B, different bias voltages can be applied to the patterning region 45 and the peripheral region, and current-limiting components are formed in the boundary region 46 of the reflective portion 43a. Specifically, in the patterning device MA depicted in Figures 18A-18B, current-limiting components are formed in the boundary region 46 of the reflective portion 43a. Figure 18A is a plan view showing the patterning surface 40 of the patterning device, Figure 18B is a cross-sectional view of the patterning device MA, and Figure 18C is a plan view of the patterning device MA showing the non-patterning surface 41.

[0186] The patterned surface 40 may comprise a patterned region 45, a boundary region 46, and a peripheral region 47. In addition to the reflective portion 43a removed from the boundary region 46, additional portions 46b of the reflective portion 43a may be removed in the peripheral region 47. This may mean that there are two or more discontinuities 46b in the peripheral region 47 of the conductive portion 43a. A bridge portion may be formed between two discontinuities 46b. The bridge portion 48 may be connected to a current-limiting component 71 as described above. The bridge portion 48 may be electrically connected to the patterned region 45 of the reflective portion 43a via the current-limiting component 71.

[0187] The patterning device MA may include two or more conductive edges 44a, 44b. The conductive edges 44a, 44b may each be as described above. The conductive edges 44a, 44b may include a patterning region conductive edge 44a and a peripheral region conductive edge 44b. The patterning region conductive edge 44a and the peripheral region conductive edge 44b may be electrically isolated from each other. The patterning region conductive edge 44a may be electrically connected to a bridge 48. The peripheral region conductive edge 44b may be electrically connected to a peripheral region 47 of the reflective portion 43a. The patterning region conductive edge 44a may extend only partially across the edge of the patterning device MA such that the patterning region conductive edge 44a contacts the bridge 48 but does not contact the peripheral region 47 of the reflective portion 43a.

[0188] The non-patterned surface 41 may include two or more insulating stripes 78a, 78b, which may be as described above. Between the insulating stripes 78a, 78b there may be a no-affect area 80, as described above. On one side of the non-patterned surface 41 (the side corresponding to the patterned area conductive edge 44a and bridge 48), the insulating stripe 78a may separate the no-affect area 80 from the first input / output area 77a.

[0189] One or more burls 70 configured to apply a bias voltage to patterning region 45 may contact first input / output area 77a of conductive portion 43c. First input / output area 77a of conductive portion 43c may be electrically connected to patterning region conductive edge 44a. Thus, a bias potential may be applied to patterning region 45 of reflective portion 43a via support surface 42 of support structure MT, a subset of burls 70 of support structure MT, first input / output area 77a of patterning device MA, patterning region conductive edge 44a, bridge 48, and current-limiting component.

[0190] On the opposite side of the unpatterned surface 41, an insulating stripe may separate the unaffected region 80 from the second input / output area 77b.

[0191] One or more burls 70 configured to apply a bias voltage to the peripheral region may contact the second input / output area 77b of the conductive portion 43c. The second input / output area 77b of the conductive portion 43c may be electrically connected to the peripheral region conductive edge 44b. Thus, a bias potential may be applied to the patterning region 45 of the reflective portion 43a via the support surface 42 of the support structure MT, a subset of the burls 70 of the support structure MT, the second input / output area 77b of the patterning device MA, and the peripheral region conductive edge 44b.

[0192] In the above embodiment, the crowbar contacting the unaffected area 80 of the conductive portion 43c may be electrically isolated / floating or may be grounded.

[0193] [Other features] In the preceding description, resistance and / or inductance have been described as being provided by components physically located in the support structure MT, patterning device MA, or associated circuitry. However, this is not required. Instead, the described resistance and / or inductance may be located in the control system. For example, the resistance and / or inductance may be provided by the control system of voltage source 67. This may mean that it is not necessary to incorporate components such as resistors and / or inductors into the support structure MT, patterning device MA, or associated circuitry.

[0194] To further reduce the number of contaminant particles P attracted to patterning surface 40 during EUV lithography, the pressure within patterning device environment 90 may be further reduced. This means that less plasma is generated by the EUV radiation beam as it passes through the space within patterning device environment 90. As a result, fewer contaminant particles P become negatively charged, which alleviates the problem of negatively charged particles P being attracted to patterning surface 40 when patterning surface 40 becomes positively charged during an EUV radiation pulse. Furthermore, the reduced pressure makes it easier for contaminant particles P generated within patterning device environment 90 to be expelled. The pressure within the patterning device environment may be less than 10 Pa, preferably less than 4 Pa.

[0195] The above-described patterning device voltage bias system can be incorporated into a lithographic apparatus that can be used in the manufacture of ICs.

[0196] Although specific reference may be made in this specification to the use of lithographic apparatus in the manufacture of ICs, it will be appreciated that the lithographic apparatus described herein can also be used in other applications, such as the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, flat panel displays, liquid crystal displays (LCDs), thin film magnetic heads, etc.

[0197] Where the context allows, embodiments of the present invention may be implemented in hardware, firmware, software, or any combination thereof. Embodiments of the present invention may also be implemented as instructions stored on a machine-readable medium, which may be read and executed by one or more processors. A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, machine-readable media include read-only memory (ROM), random-access memory (RAM), magnetic storage media, optical storage media, flash memory devices, electrical, optical, acoustical, or other forms of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.). Furthermore, firmware, software, routines, and instructions may be described herein as performing certain operations. However, it should be understood that such description is for convenience only, and that in reality, such operations result from a computing device, processor, controller, or other device executing the firmware, software, routines, instructions, etc., which in turn may cause actuators or other devices to interact with the physical world.

[0198] Although specific reference may be made herein to embodiments of the invention in the context of lithographic apparatus, embodiments of the invention may also be used in other apparatus. Embodiments of the invention may form part of a mask inspection apparatus, a metrology apparatus, or any apparatus that measures or processes objects such as wafers (or other substrates) or masks (or other patterning devices). These apparatus may be generally referred to as lithography tools.

[0199] Although specific reference may be made herein to the use of embodiments of the invention in the context of optical lithography, it will be understood that the invention is not limited to optical lithography, where the context permits. Some aspects of the invention are described in the following numbered sections.

[0200] While specific embodiments of the present invention have been described above, it will be understood that the invention may be practiced otherwise than as described. The foregoing description is intended to be illustrative and not limiting. Accordingly, it will be apparent to one skilled in the art that modifications may be made to the invention as described without departing from the scope of the claims set out below. 1. A patterning device voltage bias system for use in a lithographic apparatus, comprising: a patterning device configured to impart a pattern to a radiation beam, the patterning device comprising a patterning surface having a pattern; a voltage source; A patterning device voltage bias system configured to allow the voltage source to apply a voltage to the patterning surface of the patterning device. 2. Further comprising a conductive member electrically connected to the voltage source; the patterning device voltage system is capable of transitioning between a first configuration and a second configuration; In the first configuration, the conductive member contacts the patterning surface such that the voltage can be applied to the patterning surface; 2. The patterning device voltage bias system of claim 1, wherein in the second configuration, the conductive member is spaced apart from the patterning surface. 3. The conductive member is movable between a first position and a second position; the conductive member is at the first position in the first configuration of the patterning device voltage bias system; 3. The patterning device voltage bias system of clause 2, wherein the conductive member is in the second position in the second configuration of the patterning device voltage bias system. 4. The patterning device voltage bias system of clause 3, further comprising a conductive member actuator, the conductive member actuator configured to move the conductive member between the first position and the second position. 5. A patterning device voltage bias system as described in any of clauses 2 to 4, wherein the conductive member has a first end and a second end, the conductive member is supported at the first end, and the second end has a chamfered protrusion configured to contact the patterning surface. 6. A patterning device voltage bias system as described in clause 5, wherein the second end of the conductive member is rotatable about the first end to move between the first position and the second position. 7. A patterning device voltage bias system as described in clause 6, wherein the rotation angle of the second end about the first end between the first position and the second position is less than 10 degrees, preferably less than 5 degrees, and more preferably less than 1 degree. 8. The patterning device voltage bias system of any of clauses 2 to 7, wherein the conductive member is a leaf spring. 9. A patterning device voltage bias system according to any of clauses 6 to 8, wherein rotation of the second end about the first end comprises elastic deformation of the conductive member. 10. The patterning device voltage bias system of any of clauses 2 to 9, wherein the conductive members are configured to contact areas of the patterning surface where no pattern is present. 11. A patterning device voltage bias system according to any of clauses 2 to 10, further comprising a patterning device holder configured to apply an attractive force to a non-patterning surface of the patterning device opposite the patterning surface to clamp the patterning device. 12. A first direction is perpendicular to the patterning surface and away from the patterning device holder; 11. A patterning device voltage bias system as described in any of clauses 2 to 10, wherein the patterning device voltage bias system further comprises a landing portion, the landing portion being positioned such that when the patterning device is clamped by the patterning device holder, the patterning surface is spaced apart from the landing portion by a certain displacement amount in the first direction. 13. The patterning device voltage bias system of clause 12, wherein the conductive member is movable to a third position in which the conductive member contacts the landing portion. 14. A patterning device voltage bias system according to any of clauses 1 to 13, wherein the conductive member is connected to the voltage source via a resistor or an inductor. 15. A patterning device according to any of clauses 1 to 13, wherein the reflective portion of the patterning device comprises a patterning area and a peripheral area, the conductive member is configured to contact the peripheral area of ​​the reflective portion, the patterning area of ​​the reflective portion is electrically insulated from the peripheral area of ​​the reflective portion, and a resistor or inductor is disposed between the peripheral area of ​​the reflective portion and the patterning area of ​​the reflective portion. 16. The patterning device voltage bias system of any of clauses 2 to 15, wherein the conductive member is connected to the voltage source through a diode. 17. A patterning device voltage bias system according to any of clauses 2 to 16, wherein the conductive member is connected to the voltage source via a switch. 18. A patterning device voltage bias system according to clause 17, wherein the switch is capable of opening and closing at a frequency greater than 49 kHz, preferably greater than 59 kHz, and more preferably greater than 99 kHz. 19. A patterning device voltage bias system according to clause 17 or 18, wherein the frequency at which the switch opens and closes is synchronized with the frequency of generation of a radiation beam in the lithographic apparatus. 20. The patterning device voltage bias system of any of clauses 2 to 19, wherein a plurality of conductive members are circumferentially distributed around the patterning device. 21. A patterning device voltage bias system according to any of clauses 12 to 20, wherein a plurality of landing members are circumferentially distributed around the patterning device. 22. The patterning device further comprises a non-patterning surface opposite the patterning surface; the patterning device voltage bias system further comprising a patterning device holder comprising a plurality of burls, a distal end of one or more of the plurality of burls contacting the non-patterning surface of the patterning device; at least a portion of the non-patterned surface is electrically connectable to the voltage source via one or more of the plurality of burls; 10. The patterning device voltage bias system of claim 1, wherein the patterning surface and the non-patterning surface are electrically connected. 23. The patterning device further comprises a non-patterning surface opposite the patterning surface of the patterning device, the patterning surface and the non-patterning surface being substantially electrically insulated from each other; the patterning device voltage bias system further comprising a patterning device holder comprising a plurality of burls, a distal end of one or more of the plurality of burls being adapted to contact the non-patterning surface of the patterning device; 10. The patterning device voltage bias system of claim 1, wherein one or more of the crowbars are configured to electrically connect the non-patterning surface to the voltage source. 24. The patterning device voltage bias system of clause 22, wherein the patterning surface and the voltage source are connected through a first current-limiting component. 25. The patterning device voltage bias system of clause 22 or 24, wherein the patterning surface and the voltage source are connected via a timing switch. 26. The patterning device voltage bias system of clause 25, wherein the patterning device voltage bias system is configured such that the switch is capable of opening and closing at a frequency greater than 49 kHz, preferably greater than 59 kHz, and more preferably greater than 99 kHz. 27. A patterning device voltage bias system according to clause 25 or 26, wherein the frequency at which the timing switch opens and closes is synchronized with the frequency of generation of a radiation beam in the lithographic apparatus, such that the patterning surface is electrically connected to the voltage source between pulses of radiation. 28. A patterning device voltage bias system according to clause 24, wherein the first current limiting component is disposed between the plurality of crowbars and the voltage source. 29. The patterning device voltage bias system of clause 24, wherein the first current-limiting component is formed on the non-patterning surface of the patterning device, on the patterning surface of the patterning device, outside the patterning area. 30. A patterning device voltage bias system as described in clause 29, wherein the reflective portion of the patterning device comprises a patterning area and a peripheral area, the patterning area of ​​the reflective portion is electrically isolated from the peripheral area of ​​the reflective portion, and the first current limiting component is positioned between the peripheral area of ​​the reflective portion and the patterning area of ​​the reflective portion. 31. The patterning device of any of clauses 1-30, wherein the non-patterning surface is electrically connectable to ground via one or more of the plurality of burls. 32. The patterning device voltage bias system of clause 31, wherein the patterning device voltage bias system further comprises a mode change switch configured to either (i) connect the non-patterning surface to a power source via one or more of the plurality of crowbars, or (ii) connect the non-patterning surface to ground via one or more of the plurality of crowbars. 33. The patterning device voltage bias system of clause 31 or 32, wherein the non-patterning surface is electrically connectable to the ground through a second current-limiting component. 34. A patterning device voltage system as described in clause 33, wherein the second current limiting component is configured to prevent current in the patterning device from exceeding 1000 mA when the patterning device discharges to ground, preferably from exceeding 500 mA, and more preferably from exceeding 100 mA. 35. A patterning device voltage bias system according to clause 33 or 34, wherein the second current limiting component comprises a resistor having a resistance greater than 1 Ω, preferably greater than 10 Ω, more preferably greater than 200 Ω, and less than 10 kΩ, preferably less than 1 kΩ, more preferably less than 400 Ω. 36. The patterning device voltage bias system of clause 33, wherein the second current-limiting component comprises an inductor. 37. A patterning device voltage bias system according to any of clauses 33 to 36, wherein the second current limiting component is disposed between the plurality of crowbars and the ground. 38. A patterning device voltage bias system according to any of clauses 29 to 32, wherein the second current-limiting component is formed on a reflective portion of the patterning device or a conductive portion of the patterning device. 39. A patterning device voltage bias system as described in clause 38, wherein the reflective portion of the patterning device comprises a patterning area and a peripheral area, the patterning area of ​​the reflective portion is electrically isolated from the peripheral area of ​​the reflective portion, and the second current limiting component is positioned between the peripheral area of ​​the reflective portion and the patterning area of ​​the reflective portion. 40. A patterning device voltage bias system according to any of clauses 31 to 39, wherein the patterning device voltage bias system is configured such that the non-patterning surface is connected to the ground via one or more of the plurality of burls while the patterning device is being loaded onto and / or unloaded from the patterning device holder. 41. A patterning device voltage bias system according to any of clauses 1 to 40, wherein the bias voltage is negative. 42. A patterning device voltage bias system according to any of clauses 1 to 41, further comprising a controller configured to control the bias voltage to be positive during times when the lithographic apparatus is generating pulses of EUV radiation and negative between times when the lithographic apparatus is generating pulses of EUV radiation. 43. A patterning device voltage bias system according to any of clauses 1 to 42, wherein the voltage source is configured to supply a negative bias voltage to the patterning surface with a magnitude greater than 0.5 V, preferably greater than 1 V, less than 10 V, preferably less than 5 V, and more preferably less than 3 V; and / or the voltage source is configured to supply a positive bias voltage to the patterning surface with a magnitude greater than 1 V, preferably greater than 5 V, less than 100 V, and preferably less than 50 V. 44. A patterning device voltage bias system according to any of clauses 1 to 43, further comprising a patterning device environment in which the patterning device is disposed, wherein the pressure in the patterning device environment is less than 10 Pa, preferably less than 4 Pa. 45. A lithographic apparatus comprising a patterning device voltage bias system according to any of clauses 1 to 44. 46. ​​A method for reducing contamination of a patterning surface of a patterning device in a lithographic apparatus, comprising: a contacting step of contacting a conductive member with the patterned surface; a voltage biasing step of applying a voltage from a voltage source to the patterning surface through the conductive member. 47. The method of clause 46, wherein the contacting step comprises moving the conductive member from a first position to a second position. 48. The conductive member has a first end and a second end; the conductive member is supported at the first end; the second end comprises a chamfered protrusion configured to contact the patterning surface; 48. The method of clause 46 or 47, wherein the contacting step comprises rotating the second end about the first end. 49. The method of clause 48, wherein the rotation of the second end about the first end in the contacting step is less than 10 degrees, preferably less than 5 degrees, and more preferably less than 1 degree. 50. The method of clause 48 or 49, wherein the conductive member is a leaf spring, and rotation of the first end about the second end comprises elastic deformation of the leaf spring. 51. The method of any of clauses 46-50, further comprising clamping the patterning device to a patterning device support. 52. The method of clause 51, further comprising a landing step in which the patterning device is unclamped from the patterning device support and the conductive member is moved from the first position or the second position to a third position and contacts a landing portion at the third position. 53. The method of clause 52, wherein moving the conductive member to the third position comprises rotating the second end about the first end in a direction opposite to the rotation from the first position to the second position. 54. A method according to any of clauses 46 to 53, wherein the conductive member is connected to the voltage source via a timing switch, and the voltage biasing step comprises opening and closing the timing switch at a frequency dependent on the frequency of generation of a radiation beam in the lithographic apparatus, so that the voltage is applied to the patterning surface between pulses of radiation. 55. The method of any of clauses 46 to 54, further comprising discharging the patterning device by connecting the patterning device to ground via one or more of a plurality of crowbars while the patterning device is being loaded onto a patterning device holder and / or while the patterning device is being unloaded from the patterning device holder. 56. A method for reducing contamination of a patterning surface of a patterning device in a lithographic apparatus, comprising: clamping the patterning device by a patterning device support such that a non-patterning surface of the patterning device opposite the patterning surface contacts one or more of a plurality of burls disposed on a surface of the patterning device support; applying a voltage from a voltage source to the patterning surface of the patterning device via the one or more of the plurality of burls and the non-patterning surface. 57. The method of clause 56, wherein the patterned surface and the non-patterned surface are electrically connected. 58. The method of clause 56, wherein the patterning surface is electrically isolated from the non-patterning surface, and applying the voltage to the patterning surface comprises capacitively applying the voltage to the patterning surface. 59. A method according to clause 56 or 57, wherein the patterning surface is electrically connected to the voltage source via a timing switch, and applying the voltage to the patterning surface comprises opening and closing the switch at a frequency controlled according to a frequency of generation of a radiation beam in the lithographic apparatus, such that the voltage is applied to the patterning surface between pulses of radiation. 60. The method of any of clauses 56 to 59, further comprising discharging the patterning device by connecting the patterning device to ground via the one or more of the plurality of crowbars while the patterning device is being loaded onto a patterning device holder and / or while the patterning device is being unloaded from the patterning device holder. 61. The method of clause 60, wherein discharging the patterning device and applying the voltage to the patterning surface is controlled so that the current in the patterning surface does not exceed 1000 mA, preferably does not exceed 500 mA, and more preferably does not exceed 100 mA. 62. The method of any of clauses 46-61, further comprising limiting current in the patterning surface using a first current-limiting component disposed between the voltage source and the patterning surface. 63. The method of any of clauses 46-62, further comprising limiting current in the patterning surface with a second current-limiting component disposed between ground and the patterning surface. 64. The method of any of clauses 46 to 63, wherein the patterning device is disposed in a patterning device environment, and the method further comprises reducing the pressure in the patterning device environment to less than 10 Pa, preferably less than 4 Pa. 65. The method of any of clauses 46 to 64, wherein the bias voltage is negative. 66. The method of any of clauses 46 to 65, wherein the bias voltage is positive during times when the lithographic apparatus is generating pulses of EUV radiation and negative between times when the lithographic apparatus is generating pulses of EUV radiation. 67. The method of any of clauses 46 to 66, wherein the magnitude of the voltage applied to the patterning surface is greater than 0.5V, preferably greater than 1V, and less than 10V, preferably less than 5V, and more preferably less than 3V. 68. A device manufacturing method comprising a method for reducing contamination of a patterning surface of a patterning device according to any of clauses 46 to 67.

Claims

1. 1. A patterning device voltage bias system for use in a lithographic apparatus, comprising: a patterning device configured to impart a pattern to a radiation beam, the patterning device comprising a patterning surface having a pattern; a voltage source; A patterning device voltage bias system configured to allow the voltage source to apply a voltage to the patterning surface of the patterning device.

2. further comprising a conductive member electrically connected to the voltage source; the patterning device voltage system is capable of transitioning between a first configuration and a second configuration; In the first configuration, the conductive member contacts the patterning surface such that the voltage can be applied to the patterning surface; The patterning device voltage bias system of claim 1 , wherein in the second configuration, the conductive member is spaced from the patterning surface.

3. the conductive member is movable between a first position and a second position; the conductive member is in the first position in the first configuration of the patterning device voltage bias system; The patterning device voltage bias system of claim 2 , wherein the conductive member is in the second position in the second configuration of the patterning device voltage bias system.

4. 4. The patterning device voltage bias system of claim 3, further comprising a conductive member actuator configured to move the conductive member between the first position and the second position.

5. 5. The patterning device voltage bias system of claim 2, wherein the conductive member has a first end and a second end, the conductive member is supported at the first end, and the second end has a chamfered protrusion configured to contact the patterning surface.

6. 6. The patterning device voltage bias system of claim 5, wherein the second end of the conductive member is rotatable about the first end to move between the first position and the second position.

7. 7. The patterning device voltage bias system of claim 6, wherein a rotation angle of the second end about the first end between the first position and the second position is less than 10 degrees, preferably less than 5 degrees, and more preferably less than 1 degree.

8. The patterning device voltage bias system of claim 2 , wherein the conductive members are leaf springs.

9. The patterning device voltage bias system of claim 6 , wherein rotation of the second end about the first end comprises elastic deformation of the conductive member.

10. The patterning device voltage bias system of claim 2 , wherein the conductive members are configured to contact areas of the patterning surface where no pattern is present.

11. 11. A patterning device voltage bias system according to claim 2, further comprising a patterning device holder configured to apply an attractive force to a non-patterning surface of the patterning device opposite the patterning surface to clamp the patterning device.

12. a first direction perpendicular to the patterning surface and away from the patterning device holder; 11. A patterning device voltage bias system as described in any one of claims 2 to 10, wherein the patterning device voltage bias system further comprises a landing portion, the landing portion being positioned such that when the patterning device is clamped by the patterning device holder, the patterning surface is spaced apart from the landing portion by a certain displacement amount in the first direction.

13. The patterning device voltage bias system of claim 12 , wherein the conductive member is movable to a third position in which the conductive member contacts the landing portion.

14. The patterning device voltage bias system of claim 1 , wherein the conductive member is connected to the voltage source via a resistor or an inductor.

15. 14. The patterning device of claim 1, wherein the reflective portion of the patterning device comprises a patterning area and a peripheral area, the conductive member is configured to contact the peripheral area of ​​the reflective portion, the patterning area of ​​the reflective portion is electrically insulated from the peripheral area of ​​the reflective portion, and a resistor or inductor is disposed between the peripheral area of ​​the reflective portion and the patterning area of ​​the reflective portion.

16. 16. The patterning device voltage bias system of claim 2, wherein the conductive member is connected to the voltage source through a diode.

17. 17. The patterning device voltage bias system of claim 2, wherein the conductive member is connected to the voltage source through a switch.

18. 18. The patterning device voltage bias system of claim 17, wherein the switch is capable of opening and closing at a frequency greater than 49 kHz, preferably greater than 59 kHz, and more preferably greater than 99 kHz.

19. 19. A patterning device voltage bias system according to claim 17 or 18, wherein the frequency at which the switch opens and closes is synchronized with the frequency of generation of a radiation beam in the lithographic apparatus such that the conductive member is connected to the voltage source between pulses of radiation.

20. The patterning device voltage bias system of claim 2 , wherein a plurality of conductive members are circumferentially distributed around the patterning device.

21. 21. The patterning device voltage bias system of claim 12, wherein a plurality of landing members are circumferentially distributed around the patterning device.

22. the patterning device further comprising a non-patterning surface opposite the patterning surface; the patterning device voltage bias system further comprising a patterning device holder comprising a plurality of burls, a distal end of one or more of the plurality of burls contacting the non-patterning surface of the patterning device; at least a portion of the non-patterned surface is electrically connectable to the voltage source via one or more of the plurality of burls; The patterning device voltage bias system of claim 1 , wherein the patterning surface and the non-patterning surface are electrically connected.

23. the patterning device further comprising a non-patterning surface opposite the patterning surface of the patterning device, the patterning surface and the non-patterning surface being substantially electrically isolated from each other; the patterning device voltage bias system further comprising a patterning device holder comprising a plurality of burls, a distal end of one or more of the plurality of burls being adapted to contact the non-patterning surface of the patterning device; The patterning device voltage bias system of claim 1 , wherein one or more of the burls are configured to electrically connect the non-patterning surface to the voltage source.

24. 23. The patterning device voltage bias system of claim 22, wherein the patterning surface and the voltage source are connected through a first current-limiting component.

25. 25. A patterning device voltage bias system according to any of claims 22 to 24, wherein the one or more crowbars and the voltage source are connected via a timing switch.

26. 26. The patterning device voltage bias system of claim 25, wherein the patterning device voltage bias system is configured such that the switch is openable and closable at a frequency greater than 49 kHz, preferably greater than 59 kHz, and more preferably greater than 99 kHz.

27. 27. A patterning device voltage bias system according to claim 25 or 26, wherein the frequency at which the timing switch opens and closes is synchronized with the frequency of generation of a radiation beam in the lithographic apparatus, such that the patterning surface is electrically connected to the voltage source between pulses of radiation.

28. 25. The patterning device voltage bias system of claim 24, wherein the first current limiting component is disposed between the plurality of crowbars and the voltage source.

29. 25. The patterning device voltage bias system of claim 24, wherein the first current-limiting component is formed on the non-patterning surface of the patterning device, on the patterning surface of the patterning device, outside the patterning area.

30. 30. The patterning device voltage bias system of claim 29, wherein the reflective portion of the patterning device comprises a patterning area and a peripheral area, the patterning area of ​​the reflective portion being electrically isolated from the peripheral area of ​​the reflective portion, and the first current-limiting component is disposed between the peripheral area of ​​the reflective portion and the patterning area of ​​the reflective portion.

31. 31. The patterning device of claim 1, wherein the non-patterning surface is electrically connectable to ground via one or more of the plurality of burls.

32. 32. The patterning device voltage bias system of claim 31 , further comprising a mode change switch configured to either (i) connect the non-patterning surface to a power source via the one or more of the plurality of crowbars, or (ii) connect the non-patterning surface to ground via the one or more of the plurality of crowbars.

33. 33. The patterning device voltage bias system of claim 31 or 32, wherein the non-patterning surface is electrically connectable to the ground through a second current-limiting component.

34. 34. The patterning device voltage system of claim 33, wherein the second current limiting component is configured to prevent current in the patterning device from exceeding 1000 mA, preferably from exceeding 500 mA, and more preferably from exceeding 100 mA when the patterning device is discharged to ground.

35. 35. A patterning device voltage bias system according to claim 33 or 34, wherein the second current limiting component comprises a resistor having a resistance value greater than 1 Ω, preferably greater than 10 Ω, more preferably greater than 200 Ω, and less than 10 kΩ, preferably less than 1 kΩ, more preferably less than 400 Ω.

36. 34. The patterning device voltage bias system of claim 33, wherein the second current-limiting component comprises an inductor.

37. 37. The patterning device voltage bias system of claim 33, wherein the second current limiting component is disposed between the plurality of crowbars and the ground.

38. 33. The patterning device voltage bias system of claim 29, wherein the second current-limiting component is formed on a reflective portion of the patterning device or a conductive portion of the patterning device.

39. 39. The patterning device voltage bias system of claim 38, wherein the reflective portion of the patterning device comprises a patterning area and a peripheral area, the patterning area of ​​the reflective portion being electrically isolated from the peripheral area of ​​the reflective portion, and the second current-limiting component is disposed between the peripheral area of ​​the reflective portion and the patterning area of ​​the reflective portion.

40. 40. A patterning device voltage bias system according to any one of claims 31 to 39, wherein the patterning device voltage bias system is configured such that the non-patterning surface is connected to the ground via one or more of the plurality of burls while the patterning device is being loaded onto and / or unloaded from the patterning device holder.

41. 41. The patterning device voltage bias system of claim 1, wherein the bias voltage is negative.

42. 42. A patterning device voltage bias system according to any preceding claim, further comprising a controller configured to control the bias voltage to be positive during times when the lithographic apparatus is generating pulses of EUV radiation and to be negative between times when the lithographic apparatus is generating pulses of EUV radiation.

43. 43. A patterning device voltage bias system according to any preceding claim, wherein the voltage source is configured to supply a negative bias voltage to the patterning surface with a magnitude greater than 0.5 V, preferably greater than 1 V, less than 10 V, preferably less than 5 V, and more preferably less than 3 V; and / or the voltage source is configured to supply a positive bias voltage to the patterning surface with a magnitude greater than 1 V, preferably greater than 5 V, less than 100 V, and preferably less than 50 V.

44. 44. A patterning device voltage bias system according to any preceding claim, further comprising a patterning device environment in which the patterning device is placed, wherein a pressure in the patterning device environment is less than 10 Pa, preferably less than 4 Pa.

45. A lithographic apparatus comprising a patterning device voltage bias system according to any of claims 1 to 44.

46. 1. A method for reducing contamination of a patterning surface of a patterning device in a lithographic apparatus, comprising: a contacting step of contacting a conductive member with the patterned surface; a voltage biasing step of applying a voltage from a voltage source to the patterning surface through the conductive member.

47. 47. The method of claim 46, wherein the contacting step comprises moving the conductive member from a first position to a second position.

48. the conductive member has a first end and a second end; the conductive member is supported at the first end; the second end comprises a chamfered protrusion configured to contact the patterning surface; 48. The method of claim 46 or 47, wherein the contacting step comprises rotating the second end about the first end.

49. 49. The method of claim 48, wherein the rotation of the second end about the first end in the contacting step is less than 10 degrees, preferably less than 5 degrees, and more preferably less than 1 degree.

50. 50. The method of claim 48 or 49, wherein the conductive member is a leaf spring, and rotation of the first end about the second end comprises elastic deformation of the leaf spring.

51. 51. The method of any of claims 46 to 50, further comprising a clamping step of clamping the patterning device to a patterning device support.

52. 52. The method of claim 51 , further comprising a landing step in which the patterning device is unclamped from the patterning device support and the conductive member is moved from the first position or the second position to a third position and contacts a landing portion at the third position.

53. 53. The method of claim 52, wherein moving the conductive member to the third position comprises rotating the second end about the first end in a direction opposite to rotation from the first position to the second position.

54. 54. A method according to any one of claims 46 to 53, wherein the conductive member is connected to the voltage source via a timing switch, and the voltage biasing step comprises opening and closing the timing switch at a frequency dependent on a frequency of generation of a radiation beam in the lithographic apparatus so that the voltage is applied to the patterning surface between pulses of radiation.

55. 55. The method of any of claims 46 to 54, further comprising discharging the patterning device by connecting the patterning device to ground via one or more of a plurality of crowbars while the patterning device is being loaded onto a patterning device holder and / or while the patterning device is being unloaded from the patterning device holder.

56. 1. A method for reducing contamination of a patterning surface of a patterning device in a lithographic apparatus, comprising: clamping the patterning device by a patterning device support such that a non-patterning surface of the patterning device opposite the patterning surface contacts one or more of a plurality of burls disposed on a surface of the patterning device support; applying a voltage from a voltage source to the patterning surface of the patterning device via the one or more of the plurality of burls and the non-patterning surface.

57. 57. The method of claim 56, wherein the patterned surface and the non-patterned surface are electrically connected.

58. 57. The method of claim 56, wherein the patterning surface is electrically isolated from the non-patterning surface, and wherein applying the voltage to the patterning surface comprises capacitively applying the voltage to the patterning surface.

59. 59. A method according to any one of claims 56 to 58, wherein the one or more crowbars are electrically connected to the voltage source via a timing switch, and applying the voltage to the patterning surface comprises opening and closing the switch at a frequency controlled according to a frequency of generation of a radiation beam in the lithographic apparatus, so that the voltage is applied to the patterning surface between pulses of radiation.

60. 60. The method of any of claims 56 to 59, further comprising discharging the patterning device by connecting the patterning device to ground via the one or more of the plurality of burls while the patterning device is being loaded onto a patterning device holder and / or while the patterning device is being unloaded from the patterning device holder.

61. 61. The method of claim 60, wherein discharging the patterning device and applying the voltage to the patterning surface are controlled so that the current in the patterning surface does not exceed 1000 mA, preferably does not exceed 500 mA, and more preferably does not exceed 100 mA.

62. 62. The method of any of claims 46 to 61, further comprising limiting current in the patterning surface with a first current-limiting component disposed between the voltage source and the patterning surface.

63. 63. The method of any of claims 46 to 62, further comprising limiting current in the patterning surface with a second current limiting component disposed between ground and the patterning surface.

64. 64. The method of any of claims 46 to 63, wherein the patterning device is disposed in a patterning device environment, the method further comprising reducing the pressure in the patterning device environment to less than 10 Pa, preferably less than 4 Pa.

65. 65. The method of any of claims 46 to 64, wherein the bias voltage is negative.

66. 66. The method of any of claims 46 to 65, wherein the bias voltage is positive during times when the lithographic apparatus is generating pulses of EUV radiation and negative between times when the lithographic apparatus is generating pulses of EUV radiation.

67. 67. A method according to any of claims 46 to 66, wherein the magnitude of the voltage applied to the patterning surface is greater than 0.5V, preferably greater than 1V, and less than 10V, preferably less than 5V, more preferably less than 3V.

68. 68. A device manufacturing method comprising a method for reducing contamination of a patterning surface of a patterning device according to any of claims 46 to 67.

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