Low-loss silicon nitride and waveguides comprising low-loss silicon nitride

Abstract

A low-loss silicon nitride film is formed by depositing a silicon nitride film on a substrate and annealing the silicon nitride film at a temperature of at least 400° C. for at least 10 hours to cause the silicon nitride film to become a low-loss silicon nitride film. The low-loss silicon nitride film has an optical loss of less than 1 dB / cm at a wavelength of 488 nm.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Patent Application No. 18 / 456,872, filed August 28, 2023, which claims priority to U.S. Patent Application No. 63 / 374,412, filed September 2, 2022, the contents of which are incorporated by reference herein in their entirety.

[0002] Various embodiments relate to silicon nitride that exhibits low optical loss, including low optical loss at ultraviolet wavelengths. For example, various embodiments relate to low optical loss waveguides configured to guide visible and / or ultraviolet light that comprise a low-loss silicon nitride waveguide core. [Background technology]

[0003] Waveguides are used to direct optical signals from a light source (e.g., a laser) to a target location. However, optical power losses as the optical signal propagates through the waveguide can reduce the waveguide's ability to provide the optical signal. Through hard work, ingenuity, and new ideas, many deficiencies of such waveguides have been overcome by developing solutions constructed in accordance with embodiments of the present invention, many examples of which are described in detail herein. Summary of the Invention [Means for solving the problem]

[0004] Exemplary embodiments provide silicon nitride membranes and waveguide cores with low optical loss even at visible and ultraviolet wavelengths. For example, various embodiments provide integrated photonic circuits comprising low-loss silicon nitride membranes, low-loss silicon nitride waveguide cores, waveguides comprising low-loss silicon nitride waveguide cores, and / or waveguides comprising low-loss silicon nitride waveguide cores, where the low-loss silicon nitride exhibits optical loss of less than 1 dB / centimeter at 488 nm. Various embodiments provide methods for fabricating such low-loss silicon nitride membranes, low-loss silicon nitride waveguide cores, waveguides comprising low-loss silicon nitride waveguide cores, and / or integrated photonic circuits comprising waveguides comprising low-loss silicon nitride waveguide cores.

[0005] According to one aspect of the present disclosure, a method for forming a low-loss silicon nitride film and / or a component including low-loss silicon nitride is provided. In an exemplary embodiment, the method includes depositing a silicon nitride film on a substrate and annealing the silicon nitride film at a temperature of at least 400°C for at least 10 hours to cause the silicon nitride film to become a low-loss silicon nitride film. The low-loss silicon nitride film has an optical loss of less than 1 dB / cm at a wavelength of 488 nm.

[0006] In an exemplary embodiment, the silicon nitride film is formed using chemical vapor deposition.

[0007] In an exemplary embodiment, the chemical vapor deposition is plasma enhanced chemical vapor deposition (PECVD).

[0008] In an exemplary embodiment, the PECVD is low frequency (LF) PECVD.

[0009] In an exemplary embodiment, the annealing is carried out for at least 24 hours.

[0010] In an exemplary embodiment, the annealing is carried out for at least 90 hours.

[0011] In an exemplary embodiment, the method further includes forming at least one of (i) one or more electrical circuit components or (ii) optical circuit components on the substrate at least one of (a) before the step of depositing the silicon nitride film or (b) after the step of depositing the silicon nitride film.

[0012] In an exemplary embodiment, the method further includes patterning the low-loss silicon nitride film into a waveguide core.

[0013] In an exemplary embodiment, the method further includes depositing a cladding on the low-loss silicon nitride film.

[0014] In an exemplary embodiment, the waveguide core is the core of a waveguide configured to guide at least one of visible light or ultraviolet light.

[0015] According to another aspect, a waveguide for guiding visible and / or ultraviolet light is provided. In an exemplary embodiment, the waveguide comprises a low-loss silicon nitride waveguide core. The low-loss silicon nitride waveguide core has an optical loss of less than 1 dB / cm at a wavelength of 488 nm.

[0016] In an exemplary embodiment, the low loss silicon nitride waveguide core is formed by annealing the silicon nitride film at a temperature of at least 400° C. for a period of at least 10 hours.

[0017] In an exemplary embodiment, the silicon nitride film was formed by depositing the silicon nitride film on the substrate using chemical vapor deposition.

[0018] In an exemplary embodiment, the chemical vapor deposition is plasma enhanced chemical vapor deposition (PECVD).

[0019] In an exemplary embodiment, the PECVD is low frequency (LF) PECVD.

[0020] In an exemplary embodiment, the annealing is carried out for at least 24 hours.

[0021] In an exemplary embodiment, the annealing is carried out for at least 90 hours.

[0022] In an exemplary embodiment, the waveguide further comprises a cladding deposited on the low-loss silicon nitride film.

[0023] In an exemplary embodiment, the waveguide is formed on a substrate, the substrate further comprising at least one of (a) one or more electrical circuit components or (b) one or more optical circuit components.

[0024] In an exemplary embodiment, at least one of (a) one or more electrical circuit components or (b) one or more optical circuit components was formed on the substrate prior to at least one of (i) depositing a silicon nitride film on the substrate or (ii) annealing the silicon nitride film to form a low-loss silicon nitride film.

[0025] Having thus described the invention in general terms, reference is now made to the accompanying drawings, which are not necessarily to scale, and in which: [Brief explanation of the drawings]

[0026] [Figure 1] FIG. 1 is a block diagram of an exemplary ion trap quantum computer comprising a waveguide comprising a low-loss silicon nitride waveguide core, according to an exemplary embodiment. [Figure 2A] FIG. 1 illustrates an exemplary waveguide with a low-loss silicon nitride waveguide core, according to an exemplary embodiment. [Figure 2B] FIG. 1 illustrates an exemplary waveguide with a low-loss silicon nitride waveguide core, according to an exemplary embodiment. [Figure 2C] 2B is a cross-sectional view of the exemplary waveguide shown in FIG. 2A taken at line CC according to an exemplary embodiment. [Figure 3A]1 is a flowchart illustrating various processes, procedures and / or operations for fabricating a low-loss silicon nitride membrane and / or a waveguide core comprising low-loss silicon nitride, according to example embodiments. [Figure 3B] 1 is a flowchart illustrating various processes, procedures, and / or operations for fabricating a photonic integrated circuit comprising a waveguide with a waveguide core comprising low-loss silicon nitride and / or a waveguide with a low-loss silicon nitride core, according to example embodiments. [Figure 4] FIG. 1 is a schematic diagram of an exemplary controller for a quantum computer comprising an ion trap device, according to an exemplary embodiment. [Figure 5] FIG. 1 is a schematic diagram of an exemplary computational entity of a quantum computer system that may be used in accordance with exemplary embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0027] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all, embodiments of the present invention are shown. Indeed, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements. The term "or" (also indicated as " / ") is used herein in both its alternative and conjunctive sense, unless otherwise specified. The terms "illustrative" and "exemplary" are used to be examples without implying any level of quality. The terms "generally," "substantially," and "approximately" refer to within engineering and / or manufacturing limits and / or the user's measurement capabilities, unless otherwise specified. Like numbers refer to like elements throughout.

[0028] In various scenarios, optical signals are provided through waveguides. Generally, the optical loss of a waveguide increases with decreasing wavelength. For example, ultraviolet light tends to experience greater loss when traveling through a waveguide than visible or infrared light. However, in various scenarios, it is desirable to provide high-power ultraviolet and visible light to a target location where a light source cannot directly provide light to the target location. In such scenarios, a waveguide can be used to provide light generated by a light source to the target location (and possibly to one or more optical elements, such as a modulator or filter, configured to modulate the light). The high optical loss of waveguides exhibited at shorter wavelengths necessitates that the optical power of the initial light beam provided by the light source be significantly greater than the optical power required at the target location. This results in significant energy consumption and damage to the waveguide. Therefore, a technical problem exists regarding how to provide light of shorter wavelengths (e.g., ultraviolet light, light in the blue half of the visible spectrum, etc.) to a target location.

[0029] Various embodiments provide technical solutions to such technical problems. For example, various embodiments provide low-loss silicon nitride films (e.g., low-photonic-loss silicon nitride films) that exhibit optical losses of 1 dB / centimeter or less. Various embodiments provide waveguide cores comprising low-loss silicon nitride films, waveguides comprising waveguide cores comprising low-loss silicon nitride films, integrated photonic circuits comprising waveguides comprising waveguide cores comprising low-loss silicon nitride films, and the like. The low optical losses exhibited by low-loss silicon nitride films reduce the initial power requirements for light rays provided to a target location through the low-loss silicon nitride film (e.g., as part of a waveguide core). Thus, various embodiments realize technical improvements to the field of waveguides for guiding, for example, ultraviolet and / or visible light. In various embodiments, low-loss silicon nitride is used to form improved gratings and / or other optical components. These improvements include reduced optical power loss, lower power consumption, and reduced waveguide damage.

[0030] Exemplary Quantum Computer Comprising a Waveguide Having a Low-Loss Silicon Nitride Waveguide Core Waveguides are used in a variety of situations and / or scenarios. For example, there are many and varied situations and / or scenarios in which it may be desirable to guide light from one location to another. Various embodiments can be used to provide a light guiding tool (e.g., a waveguide, etc.) with reduced optical power loss in a wide range of such situations and / or scenarios.

[0031] One exemplary context is various quantum computing systems. One such exemplary quantum computing system comprises a quantum charge-coupled device (QCCD)-based quantum computer. FIG. 1 provides a schematic diagram of an exemplary quantum computer system 100 comprising at least one optical path 166 (166A, 166B, 166C) defined at least in part by a waveguide 200 having a waveguide core comprising low-loss silicon nitride. In various embodiments, quantum computer system 100 comprises a computational entity 110 and a quantum computer 150. In various embodiments, quantum computer 150 comprises a controller 130, a cryogenic and / or vacuum chamber 140 enclosing an ion trap 145, and one or more manipulation sources 164 (e.g., 164A, 164B, 164C). In an exemplary embodiment, one or more manipulation sources 164 may comprise one or more lasers (e.g., UV lasers, visible light lasers, microwave lasers, etc.). In various embodiments, the one or more manipulation sources 164 are configured to manipulate and / or cause the generation of controlled quantum states of one or more ions within the ion trap 145. For example, in an exemplary embodiment in which the one or more manipulation sources 164 comprise one or more lasers, the lasers can provide one or more laser beams to the ion trap 145 within the cryogenic and / or vacuum chamber 140. The one or more manipulation sources 164 each provide a laser beam or the like to the ion trap 145 via a corresponding optical path 166 (e.g., 166A, 166B, 166C). In various embodiments, at least one optical path 166 comprises a waveguide 200 comprising a waveguide core formed from / including low-loss silicon nitride. Via the waveguide 200, the manipulation source 164 can provide a modulated beam to the ion trap 145 via the optical path 166.

[0032] In various embodiments, computational entity 110 is configured to allow a user to provide input to quantum computer 150 (e.g., via a user interface of computational entity 110), receive and view output from quantum computer 150, etc. Computational entity 110 may communicate with controller 130 of quantum computer 150 via one or more wired or wireless networks 120 and / or direct wired and / or wireless communication. In exemplary embodiments, computational entity 110 may convert, organize, format, etc., information / data, quantum computing algorithms, etc. into a computing language, executable instructions, command set, etc. that controller 130 can understand and / or implement.

[0033] In various embodiments, controller 130 is configured to control electrical signal sources and / or drivers, a cryogenic and / or vacuum system that controls the temperature and pressure within cryogenic and / or vacuum chamber 140, manipulation source 164, and / or other systems configured to control environmental conditions (e.g., temperature, humidity, pressure, etc.) within cryogenic and / or vacuum chamber 140 and / or manipulate and / or effect the generation of controlled quantum states of one or more ions within ion trap 145. In various embodiments, ions trapped within ion trap 145 are used as qubits in quantum computer 150.

[0034] Exemplary low-loss silicon nitride membranes and components comprising same In various embodiments, low-loss silicon nitride is provided. The low-loss silicon nitride is used to form a waveguide core in various embodiments. For example, in various embodiments, the low-loss silicon nitride is used to form the waveguide core of a waveguide. In various embodiments, the low-loss silicon nitride is used to form the waveguide core of at least a portion of a waveguide that is part of an integrated photonic circuit and / or is formed on a substrate with other electrical and / or optical elements (e.g., conductive traces, resistors, capacitors, inductors, transistors, diodes, optical and / or electrical modulators, mirrors, lenses, prisms, gratings, etc.).

[0035] In various embodiments, the low-loss silicon nitride is formed by depositing a silicon nitride film using, for example, chemical vapor deposition. In various embodiments, the low-loss silicon nitride is formed by depositing a silicon nitride film using plasma-enhanced chemical vapor deposition (PECVD). For example, the chemical vapor deposition can be performed at a temperature less than 400°C. In various embodiments, the low-loss silicon nitride is formed by depositing a silicon nitride film using a PECVD process that includes at least some low-frequency (LF) power.

[0036] In various embodiments, the silicon nitride film has a thickness of 10 to 1000 nanometers. In an exemplary embodiment, the silicon nitride film has a thickness of 10 to 500 nanometers.

[0037] In various embodiments, the silicon nitride film is annealed at a temperature of at least 400°C for a period of at least 10 hours. In various embodiments, the silicon nitride film is annealed at a temperature of at least 400°C for a period of at least 24 hours. In various embodiments, the silicon nitride film is annealed at a temperature of at least 400°C for a period of at least 90 hours. In various embodiments, the silicon nitride film is annealed at a temperature of at least 400°C for a period of time ranging from 10 hours to 200 hours. In exemplary embodiments, the annealing temperature is within the range of 400°C to 1100°C.

[0038] In exemplary embodiments, the annealing process is carried out in the presence of one or more active gases. For example, the silicon nitride film may be in the presence of hydrogen, NH3, and / or one or more other gases during the annealing process. In various embodiments, the annealing process is carried out in the presence of one or more inert gases (instead of and / or in addition to one or more active gases).

[0039] FIG. 2A illustrates an exemplary waveguide 200A comprising a waveguide core 205 including low-loss silicon nitride 215. The exemplary waveguide 200A comprises a straight portion 202 and a curved portion 204. The curved portion 204 of the waveguide core is formed from and / or includes low-loss silicon nitride 215. The straight portion 210 of the waveguide core includes another waveguide core material (e.g., alumina, etc.). In the illustrated embodiment, the waveguide core 205 of the waveguide 200A is formed on a substrate 225 and is at least partially surrounded by a cladding 220. One or more optical and / or electrical elements 230 are also formed on the substrate. In various embodiments, the one or more optical and / or electrical elements 230 are formed on the substrate before and / or after the silicon nitride film used to fabricate the low-loss silicon nitride 215 is deposited on the substrate 225. In various embodiments, the substrate 225 is a silicon substrate or other substrate / wafer suitable for the application.

[0040] FIG. 2B illustrates another exemplary waveguide 200 comprising a waveguide core 205 including low-loss silicon nitride 215. The exemplary waveguide 200B comprises a straight portion 202 and a curved portion 204. Both the straight portion 202 and the curved portion 204 of the waveguide core 205 comprise and / or are formed from low-loss silicon nitride 215. The waveguide core is at least partially surrounded by a cladding 220. Although not shown, the waveguide 200B may be formed on a substrate 225. One or more optical and / or electrical elements 230 may also be formed on the substrate 225. For example, the one or more optical and / or electrical elements 230 may be formed on the substrate 225 before and / or after a silicon nitride film used to fabricate the low-loss silicon nitride 215 is deposited on the substrate 225. In various embodiments, the substrate 225 may be a silicon substrate or other substrate / wafer suitable for the application.

[0041] 2C illustrates a cross-sectional view of a waveguide 200A with a waveguide core 205 comprising low-loss silicon nitride 215, taken along line CC shown in FIG. 2A. A first cladding 260A is formed on a substrate 225, and the waveguide core 205 comprising low-loss silicon nitride 215 is embedded between the first cladding 260A and the second cladding 260B. In various embodiments, the first cladding 260A and / or the second cladding 260B comprise tetraethyl orthosilicate (TEOS) and / or another material configured to optically and / or electrically isolate the waveguide core 205 from its surroundings. In various embodiments, the first cladding 260A and / or the second cladding 260B extend tens to hundreds of microns away from the waveguide core 205 in the plane of FIG. 2C.

[0042] Exemplary methods for fabricating low-loss silicon nitride films and components comprising the same FIG. 3A provides a flow chart illustrating various processes, procedures, etc. for fabricating low-loss silicon nitride (eg, low-loss silicon nitride membranes) and / or waveguide cores comprising low-loss silicon nitride.

[0043] Beginning at step / action 302, silicon nitride is deposited on a substrate, wafer, etc. For example, a silicon nitride film is deposited on a substrate. In various embodiments, the silicon nitride is deposited on the substrate using chemical vapor deposition. In various embodiments, the silicon nitride is deposited on the substrate using PECVD. For example, the chemical vapor deposition can be performed at a temperature less than 400° C. In various embodiments, the silicon nitride is deposited on the substrate using a PECVD process that includes using at least some LF power. In an exemplary embodiment, the silicon nitride is deposited on the substrate using a PECVD process that includes using a combination of LF power and high frequency power. In an exemplary embodiment, the silicon nitride is deposited on the substrate using an LF PECVD process.

[0044] In an exemplary embodiment where a waveguide core is formed, in optional step / action 304, the silicon nitride is patterned to form the desired waveguide core. For example, a waveguide core suitable for the application can be patterned from the deposited silicon nitride.

[0045] In step / operation 306, a long annealing process is performed to convert and / or transform the silicon nitride into low-loss silicon nitride. For example, the long annealing process causes the silicon nitride to become low-loss silicon nitride. In various embodiments, the long annealing process includes annealing the silicon nitride (e.g., the substrate and any elements formed thereon) at a temperature of at least 400° C. for a period of at least 10 hours. In various embodiments, the long annealing process includes annealing the silicon nitride (e.g., the substrate and any elements formed thereon) at a temperature of at least 400° C. for a period of at least 24 hours. In various embodiments, the long annealing process includes annealing the silicon nitride (e.g., the substrate and any elements formed thereon) at a temperature of at least 400° C. for a period of at least 90 hours. In various embodiments, the long annealing process includes annealing the silicon nitride (e.g., the substrate and any elements formed thereon) at a temperature of at least 400° C. for a period of time ranging from 10 hours to 200 hours. In an exemplary embodiment, the annealing temperature is in the range of 400°C to 1100°C.

[0046] In exemplary embodiments, the annealing process is carried out in the presence of one or more active gases. For example, the silicon nitride film may be in the presence of hydrogen, NH3, and / or one or more other gases during the annealing process. In various embodiments, the annealing process is carried out in the presence of one or more inert gases (instead of and / or in addition to one or more active gases).

[0047] In an exemplary embodiment, the low-loss silicon nitride film is formed as a portion (e.g., a waveguide core) of a waveguide and / or a photonic integrated circuit (PIC). For example, silicon nitride can be deposited on a substrate (and / or a first cladding formed on the first substrate), and a waveguide and / or PIC including silicon nitride is formed on the first substrate. In an exemplary embodiment, the low-loss film is prepared on the first substrate and then bonded and / or transferred onto a second substrate (e.g., onto a first cladding formed on the second substrate).

[0048] FIG. 3B provides a flowchart illustrating various processes, procedures, etc. for fabricating a waveguide having a waveguide core comprising low-loss silicon nitride (e.g., a low-loss silicon nitride membrane) and / or an optical integrated circuit / PIC having a low-loss silicon nitride membrane and / or a waveguide core.

[0049] Beginning with optional step / action 322, one or more electrical and / or optical elements are formed on the substrate. For example, one or more conductive traces, resistors, capacitors, inductors, transistors, diodes, optical and / or electrical modulators, mirrors, lenses, prisms, gratings, and / or other electrical and / or optical elements may be formed on the substrate as appropriate for the application.

[0050] At step 324, a first cladding deposition is performed. For example, first cladding 260A is deposited on substrate 225. In various embodiments, first cladding 260A and / or second cladding 260B include TEOS and / or another material configured to optically and / or electrically isolate waveguide core 205 from its surroundings. In an exemplary embodiment, the first cladding is deposited using PECVD.

[0051] In optional step 326, a polishing step is performed to smooth and / or clean the exposed surface 262 of the first cladding 260A. For example, a chemical-mechanical polishing process may be performed on the exposed surface 262 of the first cladding 260A.

[0052] In step / operation 328, silicon nitride is deposited on a substrate, wafer, etc. For example, a silicon nitride film is deposited on the substrate. In various embodiments, the silicon nitride is deposited on the substrate using chemical vapor deposition. In various embodiments, the silicon nitride is deposited on the substrate using PECVD. For example, the chemical vapor deposition can be performed at a temperature less than 400° C. In various embodiments, the silicon nitride is deposited on the substrate using a PECVD process that includes using at least some LF power. In an exemplary embodiment, the silicon nitride is deposited on the substrate using a PECVD process that includes using a combination of LF power and high frequency power. In an exemplary embodiment, the silicon nitride is deposited on the substrate using a LF PECVD process. In an exemplary embodiment, for example, a silicon nitride first surface 272 can be formed on exposed surface 262 of first cladding 260A.

[0053] In an exemplary embodiment where a waveguide core is formed in step / action 330, the silicon nitride is patterned to form the desired waveguide core. For example, a waveguide core suitable for an application can be patterned from the deposited silicon nitride.

[0054] In step / operation 332, a long annealing process is performed to convert and / or transform the silicon nitride into low-loss silicon nitride. For example, the long annealing process causes the silicon nitride to become low-loss silicon nitride. In various embodiments, the long annealing process includes annealing the silicon nitride (e.g., the substrate and any elements formed thereon) at a temperature of at least 400° C. for a period of at least 10 hours. In various embodiments, the long annealing process includes annealing the silicon nitride (e.g., the substrate and any elements formed thereon) at a temperature of at least 400° C. for a period of at least 24 hours. In various embodiments, the long annealing process includes annealing the silicon nitride (e.g., the substrate and any elements formed thereon) at a temperature of at least 400° C. for a period of at least 90 hours. In various embodiments, the long annealing process includes annealing the silicon nitride (e.g., the substrate and any elements formed thereon) at a temperature of at least 400° C. for a period of time ranging from 10 hours to 200 hours. In an exemplary embodiment, the annealing temperature is in the range of 400°C to 1100°C.

[0055] In exemplary embodiments, the annealing process is carried out in the presence of one or more active gases. For example, the silicon nitride film may be in the presence of hydrogen, NH3, and / or one or more other gases during the annealing process. In various embodiments, the annealing process is carried out in the presence of one or more inert gases (instead of and / or in addition to one or more active gases).

[0056] In optional step 334, exposed surface 274 of waveguide core 205 and / or side surface 276 of waveguide core 206 are smoothed, polished, and / or cleaned. For example, a chemical-mechanical polishing process and / or other process configured to reduce the roughness of exposed surface 274 of waveguide core 205 and / or side surface 276 of waveguide core 206 may be performed on exposed surface 274 of waveguide core 205 and / or side surface 276 of waveguide core 206.

[0057] In optional step / action 336, second cladding deposition is performed. For example, second cladding 260B is deposited on exposed surface 274 of waveguide core 205 and exposed surface 262 of first cladding 260A that is not covered by waveguide core 205. In various embodiments, first cladding 260A and / or second cladding 260B include TEOS and / or another material configured to optically and / or electrically isolate waveguide core 205 from its surroundings. In an exemplary embodiment, the first cladding is deposited using a PECVD process. In various embodiments, the second cladding is deposited such that the first cladding and second cladding surround a waveguide core patterned from low-loss silicon nitride and / or silicon nitride / low-loss silicon nitride.

[0058] In optional step / act 338, one or more additional electrical and / or optical elements are formed on the substrate. For example, one or more additional conductive traces, resistors, capacitors, inductors, transistors, diodes, optical and / or electrical modulators, mirrors, lenses, prisms, gratings, and / or other electrical and / or optical elements may be formed on the substrate as appropriate for the application.

[0059] As will be appreciated, various steps / operations can be performed in a different order than described in various embodiments. For example, in an exemplary embodiment, the waveguide core is patterned after the long anneal is performed. In another example, in an exemplary embodiment, the cladding is formed before the long anneal process is performed. Various other steps / operations can be added to and / or modified from those illustrated in Figures 3A and / or 3B to produce desired components comprising low-loss silicon nitride.

[0060] Exemplary Controller In various embodiments, waveguide 200 having a waveguide core comprising low-loss silicon nitride is incorporated into quantum computer 150. In various embodiments, quantum computer 150 further comprises controller 130 configured to control various elements of quantum computer 150. For example, controller 130 can be configured to control voltage sources and / or drivers configured to provide electrical signals that control the modulation of one or more beams via corresponding modulators, a cryogenic system and / or vacuum system that controls the temperature and pressure within cryogenic and / or vacuum chamber 140, manipulation source 164, and / or other systems configured to control environmental conditions (e.g., temperature, humidity, pressure, etc.) within cryogenic and / or vacuum chamber 140 and / or manipulate and / or effect the generation of controlled quantum states of one or more ions within ion trap 145.

[0061] 4, in various embodiments, the controller 130 can comprise various controller elements, including a processing device 405, a memory 410, a driver controller element 415, a communication interface 420, an analog-to-digital converter element 425, etc. For example, the processing device 405 can comprise a processing element, a programmable logic device (CPLD), a microprocessor, a co-processor entity, an application-specific instruction set processor (ASIP), an integrated circuit, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a programmable logic array (PLA), a hardware accelerator, other processing devices and / or circuits, etc., and / or a controller. The term circuit can refer to an entirely hardware embodiment or a combination of hardware and a computer program product. In an exemplary embodiment, the processing device 405 of the controller 130 comprises and / or communicates with a clock.

[0062] For example, memory 410 may comprise non-transitory memory, such as volatile and / or non-volatile memory storage devices, such as one or more of a hard disk, ROM, PROM, EPROM, EEPROM, flash memory, MMC, SD memory card, memory stick, CBRAM, PRAM, FeRAM, RRAM, SONOS, racetrack memory, RAM, DRAM, SRAM, FPM DRAM, EDO DRAM, SDRAM, DDR SDRAM, DDR2 SDRAM, DDR3 SDRAM, RDRAM, RIMM, DIMM, SIMM, VRAM, cache memory, register memory, etc. In various embodiments, memory 410 may store qubit records (e.g., in a qubit record data store, qubit record database, qubit record table, etc.) corresponding to qubits of a quantum computer, calibration tables, executable queues, computer program code (e.g., in one or more computer languages, dedicated controller languages, etc.), etc. In an exemplary embodiment, execution of at least a portion of the computer program code stored in memory 410 (e.g., by processing device 405) causes controller 130 to perform one or more steps, operations, processes, procedures, etc. described herein to track the phase of atomic objects in an atomic system and effect adjustment of the phase of one or more generated operational sources and / or signals.

[0063] In various embodiments, the driver controller element 415 can include one or more driver and / or controller elements, each configured to control one or more drivers. In various embodiments, the driver controller element 415 can comprise a driver and / or a driver controller. For example, a driver controller can be configured to cause one or more corresponding drivers to operate according to executable instructions, commands, etc., scheduled and executed by the controller 130 (e.g., by the processing device 405). In various embodiments, the driver controller element 415 can enable the controller 130 to operate the operation source 164. In various embodiments, the driver can be a laser driver, a vacuum component driver, a driver for controlling the flow of current and / or voltage of an electrical signal applied to electrodes of the ion trap 145, a cryogenic and / or vacuum system component driver, etc. In various embodiments, the controller 130 comprises means for communicating and / or receiving signals from one or more light-receiving components, such as a camera, a MEMs camera, a CCD camera, a photodiode, a photomultiplier tube, etc. For example, the controller 130 may include one or more analog-to-digital converter elements 425 configured to receive signals from one or more light receiving components, calibration sensors, and the like.

[0064] In various embodiments, controller 130 may comprise a communications interface 420 for interfacing and / or communicating with computational entity 110. For example, controller 130 may comprise a communications interface 420 for receiving executable instructions, command sets, etc. from computational entity 110 and providing results of processing outputs received from quantum computer 150 (e.g., from a light collection system) and / or outputs to computational entity 110. In various embodiments, computational entity 110 and controller 130 may communicate via direct wired and / or wireless communication and / or via one or more wired and / or wireless networks 120.

[0065] Exemplary Computational Entities 5 provides a schematic diagram depicting an exemplary computational entity 110 that can be used with embodiments of the present invention. In various embodiments, computational entity 110 is configured to allow a user to provide input to quantum computer 150 (e.g., via a user interface of computational entity 110) and to receive, display, analyze, etc., output from quantum computer 150.

[0066] 5, the computing entity 110 may include an antenna 512, a transmitter 504 (e.g., a wireless transmitter), a receiver 506 (e.g., a wireless receiver), and a processing device 508 that respectively provide signals to the transmitter 504 and receive signals from the receiver 506. The signals provided to the transmitter 504 and received from the receiver 506 each may include signaling information / data in accordance with the air interface standard of the applicable wireless system for communicating with various entities, such as the controller 130, other computing entities 110, etc. In this regard, the computing entity 110 may be capable of operating with one or more air interface standards, communication protocols, modulation types, and access types. For example, computing entity 110 may be configured to receive and / or provide communications using a wired data transmission protocol, such as Fiber Distributed Data Interface (FDDI), Digital Subscriber Line (DSL), Ethernet, Asynchronous Transfer Mode (ATM), Frame Relay, DOCSIS (data over cable service interface specification), or any other wired transmission protocol.Similarly, the computing entity 110 may be configured to support a variety of standards, including General Packet Radio Service (GPRS), Universal Mobile Telecommunications System (UMTS), Code Division Multiple Access 2000 (CDMA2000), CDMA2000 1X (1xRTT), Wideband Code Division Multiple Access (WCDMA), Global System for Mobile Communications (GSM), Enhanced Data Rates for GSM Evolution (EDGE), Time Division Synchronous Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), Evolved Universal Terrestrial Radio Access Network (E-UTRAN), Evolution-Data Optimized (EVDO), High Speed ​​Packet Access (HSPA), High Speed ​​Downlink Packet Access (HSDPA), IEEE 802.11a / b / g / n, and IEEE 802.11b / g / n. It may be configured to communicate over a wireless external communications network using any of a variety of protocols, such as 802.11 (Wi-Fi), Wi-Fi Direct, 802.16 (WiMAX), Ultra Wide Band (UWB), Infrared (IR) protocol, Near Field Communication (NFC) protocol, Wibree, Bluetooth protocol, Wireless Universal Serial Bus (USB) protocol, and / or any other wireless protocol.The computing entity 110 may use such protocols and standards to communicate using Border Gateway Protocol (BGP), Dynamic Host Configuration Protocol (DHCP), Domain Name System (DNS), File Transfer Protocol (FTP), Hypertext Transfer Protocol (HTTP), HTTP over TLS / SSL / Secure, Internet Message Access Protocol (IMAP), Network Time Protocol (NTP), Simple Mail Transfer Protocol (SMTP), Telnet, Transport Layer Security (TLS), Secure Sockets Layer (SSL), Internet Protocol (IP), Transmission Control Protocol (TCP), User Datagram Protocol (UDP), Datagram Congestion Control Protocol (DCCP), Stream Control Transport Protocol (SCTP), Hypertext Markup Language (HTML), and the like.

[0067] Through these communication standards and protocols, computing entity 110 can communicate with various other entities using concepts such as Unstructured Supplementary Service Information / Data (USSD), Short Message Service (SMS), Multimedia Message Service (MMS), Dual Tone Multi-Frequency Signaling (DTMF), and / or Subscriber Identity Module Dialer (SIM Dialer), etc. Computing entity 110 can also download modifications, add-ons, and updates to its firmware, software (including, e.g., executable instructions, applications, program modules), and operating system, for example.

[0068] The computing entity 110 may also include user interface devices comprising one or more user input / output interfaces (e.g., a display 516 and / or speaker / speaker driver coupled to the processing device 508, as well as a touchscreen, keyboard, mouse, and / or microphone coupled to the processing device 508). For example, the user output interfaces may be configured to cause applications, browsers, user interfaces, interfaces, dashboards, screens, web pages, pages, and / or similar terms used interchangeably herein to run on the computing entity 110 and / or be accessible via the computing entity 110 to display or audible presentation of information / data and to interact with the same via one or more user input interfaces. The user input interfaces may comprise any of several devices that enable the computing entity 110 to receive data, such as a keypad 518 (hard or soft), a touch display, a voice / audio or kinetic interface, a scanner, reader, or other input device, etc. In embodiments that include a keypad 518, the keypad 518 may include (or display) the usual numbers (0-9) and related keys (#, *), as well as other keys used to operate the computing entity 110, including a set of alphabetic keys or a set of keys that can be utilized to implement a set of alphabetic keys. In addition to providing input, the user input interface may be used to activate or deactivate certain features, such as, for example, a screen saver and / or sleep mode. Through such input, the computing entity 110 may gather information / data, user interaction / input, etc.

[0069] The computing entity 110 may also include volatile storage or memory 522 and / or nonvolatile storage or memory 524, which may be embedded and / or removable. For example, the nonvolatile memory may be ROM, PROM, EPROM, EEPROM, flash memory, MMC, SD memory card, memory stick, CBRAM, PRAM, FeRAM, RRAM, SONOS, racetrack memory, etc. The volatile memory may be RAM, DRAM, SRAM, FPM DRAM, EDO DRAM, SDRAM, DDR SDRAM, DDR2 SDRAM, DDR3 SDRAM, RDRAM, RIMM, DIMM, SIMM, VRAM, cache memory, registered memory, etc. The volatile and nonvolatile storage or memory may store databases, database instances, database management system entities, data, applications, programs, program modules, scripts, source code, object code, byte code, compiled code, interpreted code, machine code, executable instructions, etc. to implement the functionality of the computing entity 110.

[0070] conclusion Many modifications and other embodiments of the inventions described herein will come to mind to those skilled in the art to which this invention pertains having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. It is to be understood, therefore, that the inventions are not to be limited to the specific embodiments disclosed, but that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation. [Explanation of symbols]

[0071] 166 Light path 166A optical path 166B Optical path 166C optical path 200 Waveguide 200A waveguide 200B waveguide 202 Straight section 204 Curved section 205 Waveguide Core 210 Straight section 215 Low-loss silicon nitride 220 Clad 225 board 230 Optical and / or Electrical Elements 260A First Cladding 260B Second Cladding 262 Exposed surface 272 First Side 274 Exposed surface 276 Side 405 Processing Device 410 memory 415 Driver Controller Elements 420 Communication Interface 425 A / D converter 504 Transmitter 506 Receiver 508 Processing Device 516 Display 518 keypad 520 network interface 522 Volatile Memory 524 Non-volatile memory

Claims

1. 1. A method for forming a low-loss silicon nitride film, comprising: depositing a silicon nitride film on a substrate; annealing the silicon nitride film at a temperature of at least 400°C for at least 10 hours to cause the silicon nitride film to become a low-loss silicon nitride film; Including, The method wherein the low-loss silicon nitride film has an optical loss of less than 1 dB / cm at a wavelength of 488 nm.

2. The method of claim 1 , wherein the silicon nitride film is formed using chemical vapor deposition.

3. The method of claim 2 , wherein the chemical vapor deposition is plasma enhanced chemical vapor deposition (PECVD).

4. The method of claim 3 , wherein the PECVD includes the use of at least some low frequency (LF) power.

5. The method of claim 1 , wherein the annealing step is carried out for at least 24 hours.

6. The method of claim 1 , wherein the annealing step is carried out for at least 90 hours.

7. 10. The method of claim 1, further comprising forming at least one of (i) one or more electrical circuit components or (ii) optical circuit components on the substrate at least one of (a) before the step of depositing the silicon nitride film or (b) after the step of depositing the silicon nitride film.

8. The method of claim 1 further comprising patterning the low-loss silicon nitride film into a waveguide core.

9. The method of claim 8 further comprising depositing a cladding on the low-loss silicon nitride film.

10. The method of claim 8 , wherein the waveguide core is the core of a waveguide configured to guide at least one of visible light or ultraviolet light.

11. 1. A waveguide for guiding visible and / or ultraviolet light, comprising:

1. A waveguide comprising a low-loss silicon nitride waveguide core, said low-loss silicon nitride waveguide core being formed by annealing a silicon nitride film at a temperature of at least 400° C. for at least 10 hours.

12. 12. The waveguide of claim 11 having an optical loss of less than 3 dB / cm at a wavelength of 488 nm.

13. 13. The waveguide of claim 12, wherein the silicon nitride film is formed by depositing the silicon nitride film on a substrate using chemical vapor deposition.

14. 14. The waveguide of claim 13, wherein the chemical vapor deposition is plasma enhanced chemical vapor deposition (PECVD).

15. 15. The waveguide of claim 14, wherein the PECVD includes the use of at least some low frequency (LF) power.

16. 13. The waveguide of claim 12, wherein the annealing is carried out for at least 24 hours.

17. 13. The waveguide of claim 12, wherein the annealing is performed for at least 90 hours.

18. 12. The waveguide of claim 11, further comprising a cladding surrounding said low-loss silicon nitride membrane radially relative to a direction of propagation defined by said waveguide core.

19. 12. The waveguide of claim 11, wherein the waveguide is formed on a substrate, the substrate further comprising at least one of: (a) one or more electrical circuit components; or (b) one or more optical circuit components.

20. 20. The waveguide of claim 19, wherein at least one of (a) one or more electrical circuit components or (b) one or more optical circuit components is formed on the substrate prior to at least one of (i) depositing a silicon nitride film on the substrate or (ii) annealing the silicon nitride film to form the low-loss silicon nitride film.

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