OLED display panels, terminal devices

Abstract

The embodiments of the present application disclose an OLED display panel and a terminal device, the OLED display panel including power signal lines and vertical auxiliary lines extending along a first direction, horizontal auxiliary lines and reset signal lines extending along a second direction, the horizontal auxiliary lines and the power signal lines being electrically connected at their intersections to form a grid-like connection, and / or the vertical auxiliary lines and the reset signal lines being electrically connected at their intersections to form a grid-like connection, thereby improving display uniformity.

Description

[Technical Field]

[0001] The present application relates to the field of display technology, and more particularly to OLED display panels and terminal devices. [Background technology]

[0002] FIAA technology is an important technology for realizing the narrow bottom border of current OLED display panels. Its principle is mainly to run some fan-out wiring vertically in the display area, and then run it horizontally to connect to the corresponding data signal lines, thereby achieving the purpose of a narrow bottom border. One characteristic of this technology is that based on a general pixel design, horizontal and vertical metal wiring is added and manufactured in the display area near the bottom border to be used for wiring the fan-out wiring in the display area. However, in actual design, only a portion of these metal wirings is used for wiring the fan-out wiring, and the remaining metal wiring located in the display area near the bottom border is not fully utilized and is left unused.

[0003] Therefore, conventional OLED display panels have a technical problem of low display uniformity. Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments of the present application provide a display panel and a terminal device that can solve the technical problem of low display uniformity that exists in conventional OLED display panels. [Means for solving the problem]

[0005] An embodiment of the present application is an OLED display panel including a display area and a non-display area, A substrate; a power signal line, a data signal line, and a reset signal line provided above the substrate; a fan-out wiring provided above the substrate, the fan-out wiring including a first fan-out line and a second fan-out line, the first fan-out line being provided in a first region of the display region and the second fan-out line being provided in a non-display region, one end of the first fan-out line being electrically connected to the data signal line, and the other end of the first fan-out line being electrically connected to the second fan-out line; auxiliary wiring provided in the first region above the substrate, the auxiliary wiring including vertical auxiliary lines and horizontal auxiliary lines provided in different layers, the vertical auxiliary lines and the power signal lines extending along a first direction, the horizontal auxiliary lines and the reset signal lines extending along a second direction, the first direction and the second direction being perpendicular to each other; The OLED display panel includes: the horizontal auxiliary lines and the power signal lines disposed on different layers; the vertical auxiliary lines and the reset signal lines disposed on different layers; and the horizontal auxiliary lines and the power signal lines are electrically connected at their crossing points to form a grid-like connection; and / or the vertical auxiliary lines and the reset signal lines are electrically connected at their crossing points to form a grid-like connection.

[0006] Optionally, in some embodiments of the present application, the OLED display panel includes a plurality of pixel units, and any of the pixel units includes two sub-pixels.

[0007] Optionally, in some embodiments of the present application, the display area includes metal wiring, the metal wiring includes first metal wiring extending along a first direction and second metal wiring extending along a second direction, some of the first metal wirings are first wirings and some of the second metal wirings are second wirings, the first fan-out wiring includes the first wiring extending along the first direction and the second wiring extending along the second direction, and the remaining metal wirings that are not the first fan-out wirings are compensation wirings, wherein the remaining part of the first metal wirings that are not the first wirings are the vertical auxiliary lines, and the remaining part of the second metal wirings that are not the second wirings are the horizontal auxiliary lines.

[0008] Optionally, in some embodiments of the present application, the first wiring is spaced apart from and insulated from the vertical auxiliary line, the second wiring is spaced apart from and insulated from the horizontal auxiliary line, one end of the first wiring is electrically connected to the second fan-out line, the other end of the first wiring is electrically connected to the second wiring through a first via, and the second wiring is electrically connected to the data signal line through a second via.

[0009] Optionally, in some embodiments of the present application, any of the pixel units includes the second wiring and the horizontal auxiliary line, and the second wiring and the horizontal auxiliary line are periodically alternated and spaced apart.

[0010] Optionally, in some embodiments of the present application, two adjacent pixel units include three of the second wirings and the horizontal auxiliary lines.

[0011] Optionally, in some embodiments of the present application, the OLED display panel includes a single reset signal pixel driving circuit, the reset signal line is a first reset signal line, and any of the pixel units further includes the first wiring and the vertical auxiliary line.

[0012] Optionally, in some embodiments of the present application, in any pixel unit, the vertical auxiliary line and the first reset signal line are connected in parallel at the intersection.

[0013] Optionally, in some embodiments of the present application, one of every four, six, or eight adjacent first metal wirings is the vertical auxiliary line, and the vertical auxiliary line and the first reset signal line are connected in parallel at their intersections.

[0014] Optionally, in some embodiments of the present application, the OLED display panel includes a dual reset signal pixel driving circuit, the reset signal line includes a second reset signal line and a third reset signal line, any of the pixel units further includes the first wiring and the vertical auxiliary line, and of two adjacent pixel units, the vertical auxiliary line and the second reset signal line of one pixel unit are connected in parallel at an intersection, and the vertical auxiliary line and the third reset signal line of the other pixel unit are connected in parallel at an intersection.

[0015] Optionally, in some embodiments of the present application, one of every four, six, or eight adjacent first metal wirings is the vertical auxiliary line, and the vertical auxiliary line and the second reset signal line or the third reset signal line are connected in parallel at an intersection.

[0016] Optionally, in some embodiments of the present application, the OLED display panel includes a triple reset signal pixel driving circuit, the reset signal lines include a fourth reset signal line, a fifth reset signal line, and a sixth reset signal line, and any of the pixel units further includes the first wiring and the vertical auxiliary line.

[0017] Optionally, in some embodiments of the present application, among three adjacent pixel units, the vertical auxiliary line and the fourth reset signal line in one pixel unit are connected in parallel at an intersection, the vertical auxiliary line and the fifth reset signal line in another pixel unit are connected in parallel at an intersection, and the vertical auxiliary line and the sixth reset signal line in yet another pixel unit are connected in parallel at an intersection.

[0018] Optionally, in some embodiments of the present application, three of every nine adjacent first metal wirings are the vertical auxiliary lines, and the three vertical auxiliary lines are connected in parallel to the fourth reset signal line, the fifth reset signal line, and the sixth reset signal line at their intersections, respectively.

[0019] Optionally, in some embodiments of the present application, the OLED display panel further includes a first source-drain layer disposed above the substrate and a second source-drain layer disposed on a side of the first source-drain layer away from the substrate, the horizontal auxiliary lines being disposed in the same layer as the first source-drain layer, and the vertical auxiliary lines being disposed in the same layer as the second source-drain layer.

[0020] Optionally, in some embodiments of the present application, the reset signal line is provided in the same layer as the first source / drain layer, and the power supply signal line is provided in the same layer as the second source / drain layer.

[0021] Optionally, in some embodiments of the present application, the OLED display panel further includes a gate layer, the gate layer being disposed above the substrate, the first source-drain layer being disposed on a side of the gate layer away from the substrate, the power supply signal line being disposed in the same layer as the second source-drain layer, and the reset signal line being disposed in the same layer as the gate layer.

[0022] Optionally, in some embodiments of the present application, at least one of the first source / drain layer and the second source / drain layer has a titanium / aluminum / titanium stacked structure.

[0023] Optionally, in some embodiments of the present application, the pitches of adjacent horizontal extension lines are equal, and / or the pitches of adjacent vertical extension lines are equal.

[0024] An embodiment of the present application provides a terminal device including the OLED display panel according to any one of the above embodiments. [Effects of the Invention]

[0025] A portion of the metal wiring in a first region of the display area is used as auxiliary wiring, and the horizontal auxiliary lines and the power supply signal lines are electrically connected at their intersections to form a grid-like connection, and / or the vertical auxiliary lines and the reset signal lines are electrically connected at their intersections to form a grid-like connection, and by the auxiliary wiring and the power supply signal lines and / or reset signal lines forming a grid-like connection, the impedance of the power supply signal lines and / or reset signal lines is reduced, and display uniformity is further improved. [Brief explanation of the drawings]

[0026] In order to more clearly describe the technical solutions in the embodiments of the present application, the drawings that need to be used in the description of the embodiments are briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without any creative efforts. [Figure 1] 1 is a cross-sectional schematic diagram of an OLED display panel of the present application using the FIAA design. [Figure 2] 1 is a cross-sectional schematic diagram of a first type of OLED display panel provided in the present application; [Figure 3] 1 is a cross-sectional schematic diagram of a second type of OLED display panel provided in the present application. [Figure 4] FIG. 2 is a schematic diagram of the circuit structure of a single reset signal pixel driving circuit used in the OLED display panel provided herein; [Figure 5] 1 is a cross-sectional schematic diagram of a third type of OLED display panel provided in the present application. [Figure 6] 1 is a schematic diagram of the circuit structure of a dual reset signal pixel driving circuit used in the OLED display panel provided herein; [Figure 7] 1 is a cross-sectional schematic diagram of a fourth type of OLED display panel provided in the present application. [Figure 8] FIG. 2 is a schematic diagram of the circuit structure of a triple reset signal pixel driving circuit used in the OLED display panel provided herein; DETAILED DESCRIPTION OF THE INVENTION

[0027] Hereinafter, the technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. Based on the embodiments of the present application, all other embodiments that a person skilled in the art can devise without any creative effort fall within the scope of protection of the present application. It should also be understood that the specific embodiments described in this specification are merely for the purpose of explaining and interpreting the present application, and do not limit the present application. In this application, unless otherwise specified, directional terms used, such as "up" and "down," generally refer to the up and down of the device in its actual use or operating state, specifically in the drawing direction, while "inside" and "outside" refer to the contour of the device.

[0028] 1 to 8, an OLED display panel provided in the present application includes a display area 1 and a non-display area 2, the OLED display panel includes a substrate 10, a power signal line 20, a data signal line 30, a reset signal line 40, a fan-out wiring 50, and an auxiliary wiring 60 arranged above the substrate 10, the fan-out wiring 50 including a first fan-out line and a second fan-out line, the first fan-out line is arranged in a first area 3 of the display area 1, and the second fan-out line is arranged in the non-display area 2, one end of the first fan-out line is electrically connected to the data signal line 30, and the other end of the first fan-out line is electrically connected to the second fan-out line, and the auxiliary wiring 60 The wiring 60 includes a vertical auxiliary line 601 and a horizontal auxiliary line 602 arranged in different layers, the vertical auxiliary line 601 and the power signal line 20 extending along a first direction 130, the horizontal auxiliary line 602 and the reset signal line 40 extending along a second direction 140, the first direction 130 and the second direction 140 being perpendicular to each other, wherein the horizontal auxiliary line 602 and the power signal line 20 are arranged in different layers, and the vertical auxiliary line 601 and the reset signal line 40 are arranged in different layers, and the horizontal auxiliary line 602 and the power signal line 20 are electrically connected at their intersections to form a grid-like connection, and / or the vertical auxiliary line 601 and the reset signal line 40 are electrically connected at their intersections to form a grid-like connection.

[0029] In this embodiment, some of the metal wirings in the first region 3 of the display region 1 are used as auxiliary wirings 60, and the horizontal auxiliary wirings 602 and the power supply signal lines 20 are electrically connected at their intersections to form grid-like connections, and / or the vertical auxiliary wirings 601 and the reset signal lines 40 are electrically connected at their intersections to form grid-like connections. By forming grid-like connections between the auxiliary wirings 60 and the power supply signal lines 20 and / or the reset signal lines 40, the impedance of the power supply signal lines 20 and / or the reset signal lines 40 is reduced, and display uniformity is further improved.

[0030] The technical solutions of the present application will be described below in conjunction with specific examples.

[0031] The embodiments of the present application only explain the example of using some of the metal wiring that is not used as fan-out wiring 50 in the first region 3 of the display region 1 as auxiliary wiring 60. If there is unused metal wiring in other regions of the panel, the inventive concept of the present application may be adopted and falls within the scope of protection of the present application, and by connecting it in parallel with signal lines that require reduced impedance, such as the power signal line 20 and the reset signal line 40, display uniformity can be improved.

[0032] In addition, in order to provide the first fan-out wiring 70 within the display region 1, it is necessary to manufacture metal wiring in advance in the first region 3 of the display region 1, and the metal wiring includes first metal wiring extending along the first direction 130 and second metal wiring extending along the second direction 140, and some of the first metal wiring is made into the first wiring 701 and some of the second metal wiring is made into the second wiring 702, and the first wiring 701 and the second wiring 702 are connected via the first via 90 to form the first fan-out wiring 70, and further, in the present application, the remaining metal wiring that is not made into the first fan-out wiring 70 may be made into compensation wiring, specifically, the remaining part of the first metal wiring that is not made into the first wiring 701 may be made into vertical auxiliary lines 601, and the remaining part of the second metal wiring that is not made into the second wiring 702 may be made into horizontal auxiliary lines 602.

[0033] In addition, the electrical connection may be a parallel connection, with the vertical auxiliary line 601 and the reset signal line 40 being connected in parallel at the intersection via a third via 110, and the horizontal auxiliary line 602 and the power supply signal line 20 being connected in parallel at the intersection via a fourth via 120.

[0034] Since the present application is based on the FIAA design and is improved upon, the parts not mentioned in the present application can be referred to the conventional FIAA design.

[0035] In one embodiment, the pitches of adjacent horizontal auxiliary lines 602 are equal, and / or the pitches of adjacent vertical auxiliary lines 601 are equal.

[0036] Here, the vertical auxiliary line 601 and the reset signal line 40 are provided on different layers and are connected to each other in a crossing manner to form a grid, and the horizontal auxiliary line 602 and the power signal line 20 are provided on different layers and are connected to each other in a crossing manner to form a grid.

[0037] It should be understood that the equal grid pitch is advantageous in reducing the impedance of the reset signal line 40 and the power supply signal line 20, and further improves display uniformity.

[0038] In one embodiment, the OLED display panel includes a plurality of pixel units, and each of the pixel units includes two sub-pixels.

[0039] Here, the two sub-pixels include a first sub-pixel and a second sub-pixel, the first sub-pixel being a red-green sub-pixel, and the second sub-pixel being a blue-green sub-pixel.

[0040] The pixel arrangement of the OLED display panel is a Pentile arrangement, and such an arrangement includes only two sub-pixels within one pixel, and each sub-pixel has one horizontal auxiliary line 602 or one second wiring 702, one vertical auxiliary line 601, or one first wiring 701. Therefore, it should be understood that using such an arrangement, one pixel unit includes only two horizontal auxiliary lines 602 or two second wirings 702 and two vertical auxiliary lines 601 or two first wirings 701.

[0041] It should be noted that the following examples only show the pixel arrangement in the Pentile arrangement, and other pixel arrangements are applicable to the present application and should also fall within the scope of protection of the present application.

[0042] In one embodiment, the first fan-out wiring 70 includes a first wiring 701 extending along a first direction 130 and a second wiring 702 extending along a second direction 140, the first wiring 701 being spaced apart from and insulated from the vertical auxiliary line 601, the second wiring 702 being spaced apart from and insulated from the horizontal auxiliary line 602, one end of the first wiring 701 being electrically connected to the second fan-out line, the other end of the first wiring 701 being electrically connected to the second wiring 702 via a first via 90, and the second wiring 702 being electrically connected to the data signal line 30 via a second via 100.

[0043] Here, the second wiring 702 and the first wiring 701 are provided in different layers, and the second wiring 702 and the data signal line 30 are provided in different layers.

[0044] Here, the first wiring 701 may be provided in the same layer as the data signal line 30 .

[0045] It should be understood that the first wiring 701 of the first fan-out wiring 70 may use some of the first metal wiring, the second wiring 702 of the first fan-out wiring 70 may use some of the second metal wiring, and the remaining metal wiring may be auxiliary wiring 60.

[0046] In this embodiment, some of the metal wiring is designated as a first wiring 701 and a second wiring 702, and the second wiring 702 is connected to the first wiring 701 via a first via 90 and to the data signal line 30 via a second via 100, respectively, thereby realizing a cross-line connection in the form of a via and avoiding the occurrence of a short circuit in the first fan-out wiring 70 located in the display area 1.

[0047] In one embodiment, referring to FIG. 2, any of the pixel units includes the second wiring 702 and the horizontal auxiliary line 602, and the second wiring 702 and the horizontal auxiliary line 602 are periodically alternated and spaced apart.

[0048] It should be understood that in any pixel unit, only two second metal wirings extending along the second direction 140 are provided, that is, in any pixel unit, one of the two second metal wirings serves as the second wiring 702, connecting the first wiring 701 and the data signal line 30, and the other of the two second metal wirings serves as the horizontal auxiliary line 602, and the horizontal auxiliary line 602 and the power signal line 20 extending along the first direction 130 are connected in parallel at their intersections, and for multiple pixel units, the horizontal auxiliary line 602 and the power signal line 20 form a grid shape in a planar view direction perpendicular to the substrate 10.

[0049] In this embodiment, the second lines 702 and the horizontal auxiliary lines 602 are periodically alternately arranged at intervals, so that each pixel unit includes one horizontal auxiliary line 602, which further improves the display uniformity of the OLED display panel.

[0050] In another embodiment, referring to FIG. 3, two adjacent pixel units include three of the second wirings 702 and the horizontal auxiliary lines 602 .

[0051] In another design form for installing the second wirings 702 and the horizontal extension lines 602, one of every four adjacent second metal wirings is the horizontal extension line 602, and the other three are all second wirings 702. That is, in any two adjacent pixel units, four second metal wirings extending along the second direction 140 are provided, three of which serve as the second wirings 702 connecting the first wirings 701 and the data signal lines 30, and one of which is the horizontal extension line 602. The horizontal extension lines 602 and the power signal lines 20 extending along the first direction 130 are connected in parallel at their intersections, and it should be understood that for multiple pixel units, the horizontal extension lines 602 and the power signal lines 20 form a grid shape in a plan view perpendicular to the substrate 10.

[0052] The intersection point is the overlap position of two wirings provided on different layers in a direction perpendicular to the substrate 10 when viewed in a plan view perpendicular to the substrate 10. For example, the intersection point of the horizontal auxiliary line 602 and the power supply signal line 20 is the overlap position of the horizontal auxiliary line 602 and the power supply signal line 20 in a direction perpendicular to the substrate 10.

[0053] In this embodiment, only one horizontal auxiliary line 602 is provided in one of two adjacent pixel units, so that three second wirings 702 can be provided in every two adjacent pixel units. Since the second wirings 702 are arranged more densely, the installation space of the second wirings 702 can be saved, and the installation space of the reset signal line 40 extending along the second direction 140 can be improved, thereby improving space utilization.

[0054] In one embodiment, referring to FIGS. 2 and 4, the OLED display panel includes a single reset signal pixel driving circuit, the reset signal line 40 is a first reset signal line 401, any of the pixel units further includes the first wiring 701 and the vertical auxiliary line 601, and in any of the pixel units, the vertical auxiliary line 601 and the first reset signal line 401 are connected in parallel at their crossing points.

[0055] Here, as shown in FIG. 4, the single reset signal pixel driving circuit is a 7T1C circuit, and the single reset signal pixel driving circuit includes only one reset signal line 40. The specific connection relationship of the single reset signal pixel driving circuit can be referred to in FIG. 4, and the description thereof will be omitted here.

[0056] Each pixel unit includes two first metal wirings, one of which serves as the first wiring 701 connecting the second fan-out wiring 80 and the data signal line 30, and the other of which serves as the vertical auxiliary wiring 601 connected to the first reset signal line 401 to reduce the impedance of the first reset signal line 401. That is, it should be understood that for a single reset signal pixel driving circuit, when the vertical auxiliary wiring 601 is arranged periodically, the minimum period for arranging the vertical auxiliary wiring is two adjacent first metal wirings extending along the first direction 130.

[0057] In this embodiment, one of the two first metal wirings in any pixel unit is used as the first wiring 701 and the other is used as the vertical auxiliary line 601, thereby further reducing the number of unused first metal wirings, improving the utilization rate of the first metal wirings, and further realizing a narrower frame and reduced costs.

[0058] Furthermore, in some embodiments, one of every four, six, or eight adjacent first metal wirings is a vertical auxiliary line 601, and the vertical auxiliary line 601 and the first reset signal line 401 are connected in parallel at the intersection.

[0059] In one embodiment, referring to FIGS. 5 and 6, the OLED display panel includes a dual reset signal pixel driving circuit, the reset signal line 40 includes a second reset signal line 402 and a third reset signal line 403, any one of the pixel units further includes the first wiring 701 and the vertical auxiliary line 601, and of two adjacent pixel units, the vertical auxiliary line 601 and the second reset signal line 402 of one pixel unit are connected in parallel at an intersection, and the vertical auxiliary line 601 and the third reset signal line 403 of the other pixel unit are connected in parallel at an intersection.

[0060] Here, as shown in FIG. 6, the dual reset signal pixel driving circuit is a 7T1C circuit, and includes two reset signal lines 40, namely, a second reset signal line 402 and a third reset signal line 403. Here, the second reset signal line 402 and the third reset signal line 403 are merely distinguished from the first reset signal line 401, and they may be connected to different reset signals or the same reset signal. The specific connection relationship of the dual reset signal pixel driving circuit can be seen in FIG. 6, and will not be described here.

[0061] Two adjacent pixel units include four first metal wires, and one of the first metal wires in each pixel unit is a vertical auxiliary line 601. The vertical auxiliary lines 601 of the adjacent pixel units are connected in parallel to the second reset signal line 402 and the third reset signal line 403, respectively, to reduce the impedance of the second reset signal line 402 and the third reset signal line 403. That is, for a dual reset signal pixel driving circuit, when the vertical auxiliary lines 601 are arranged periodically, the vertical auxiliary lines 601 in two adjacent pixel units need to be connected to different second reset signal lines 402 and third reset signal lines 403, respectively. Therefore, it should be understood that the minimum period for arranging the vertical auxiliary lines 601 is four adjacent first metal wires extending along the first direction 130, and two of the four first metal wires are connected to the second reset signal line 402 and the third reset signal line 403 as vertical auxiliary lines 601.

[0062] In this embodiment, when the dual reset signal pixel driving circuit includes the second reset signal line 402 and the third reset signal line 403, two of the four first metal lines in any two adjacent pixel units are configured as the first lines 701, one is connected to the second reset signal line 402 as the vertical auxiliary line 601, and the last is connected to the third reset signal line 403 as the vertical auxiliary line 601. This further reduces the number of unused first metal lines, improves the utilization rate of the first metal lines, and is advantageous for achieving a narrower picture frame and reducing costs.

[0063] Furthermore, in some embodiments, one of every four, six, or eight adjacent first metal wirings is a vertical auxiliary line 601, and the vertical auxiliary line 601 and the second reset signal line 402 or the third reset signal line 403 are connected in parallel at the intersection.

[0064] It should be understood that the remaining first metal wiring may be used as the first wiring.

[0065] In one embodiment, referring to FIGS. 7 and 8, the OLED display panel includes a triple reset signal pixel driving circuit, the reset signal line 40 includes a fourth reset signal line 404, a fifth reset signal line 405, and a sixth reset signal line 406, and any of the pixel units further includes the first wiring 701 and the vertical auxiliary line 601. Among three adjacent pixel units, the vertical auxiliary line 601 and the fourth reset signal line 404 of one of the pixel units are connected in parallel at an intersection, the vertical auxiliary line 601 and the fifth reset signal line 405 of another of the pixel units are connected in parallel at an intersection, and the vertical auxiliary line 601 and the sixth reset signal line 406 of yet another of the pixel units are connected in parallel at an intersection.

[0066] Here, as shown in FIG. 6, the triple reset signal pixel driving circuit is an 8T1C circuit, and includes three reset signal lines 40, namely, a fourth reset signal line 404, a fifth reset signal line 405, and a sixth reset signal line 406. Here, the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406 are merely distinguished from the first reset signal line 401, the second reset signal line 402, and the third reset signal line 403, and they may be connected to different reset signals or the same reset signal. The specific connection relationship of the triple reset signal pixel driving circuit can be seen in FIG. 8, and will not be described here.

[0067] In three adjacent pixel units, six first metal wirings are included, and one of the first metal wirings in any pixel unit is a vertical auxiliary line 601. The vertical auxiliary lines 601 of the three adjacent pixel units are respectively connected in parallel to the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406, thereby reducing the impedance of the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406. That is, for a triple reset signal pixel driving circuit, the vertical auxiliary line 60 When the vertical auxiliary lines 601 are periodically provided, the vertical auxiliary lines 601 in three adjacent pixel units must be connected to different fourth reset signal lines 404, fifth reset signal lines 405, and sixth reset signal lines 406, respectively. Therefore, it should be understood that the minimum period for providing the vertical auxiliary lines 601 is 46 adjacent first metal wirings extending along the first direction 130, and here, three of the six adjacent first metal wirings are connected to the fourth reset signal line 404, fifth reset signal line 405, and sixth reset signal line 406 as vertical auxiliary lines 601, respectively.

[0068] In this embodiment, when the triple reset signal pixel driving circuit includes the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406, three of the six first metal lines in any three adjacent pixel units are used as first lines 701, and the remaining three are used as vertical auxiliary lines 601, which are connected to the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406, respectively, thereby further reducing the number of unused first metal lines, improving the utilization rate of the first metal lines, and further realizing a narrower frame and lower costs.

[0069] Furthermore, in some embodiments, three of every six or nine adjacent first metal wirings are vertical auxiliary lines 601, and the three vertical auxiliary lines 601 are connected in parallel to the fourth reset signal line 404, the fifth reset signal line 405, and the sixth reset signal line 406 at their intersections, respectively.

[0070] In one embodiment, the OLED display panel further includes a first source-drain layer disposed above the substrate 10 and a second source-drain layer disposed on a side of the first source-drain layer away from the substrate 10, the horizontal extension line 602 being disposed in the same layer as the first source-drain layer, and the vertical extension line 601 being disposed in the same layer as the second source-drain layer.

[0071] Here, at least one of the first source / drain layer and the second source / drain layer has a titanium / aluminum / titanium laminated structure, and the impedance of the horizontal auxiliary line 602 and the vertical auxiliary line 601 formed by the titanium / aluminum / titanium laminated structure is further reduced, thereby further improving the display uniformity.

[0072] Here, the reset signal line 40 is provided in the same layer as the first source-drain layer, and the power supply signal line 20 is provided in the same layer as the second source-drain layer.

[0073] Here, the power supply signal line 20 may be provided in the same layer as the second source / drain layer, and may have a titanium / aluminum / titanium laminated structure, which further reduces the impedance of the power supply signal line 20 itself, reduces voltage drop, and improves the uniformity of high-brightness display.

[0074] Here, the reset signal line 40 may be formed in the same layer as the first source / drain layer, and may have a titanium / aluminum / titanium laminated structure, thereby further reducing the impedance of the reset signal line 40 itself, reducing voltage drop, and improving the uniformity of low gradation display.

[0075] It should be understood that the horizontal auxiliary line 602 and the second wiring 702 are both wired using the second metal wiring, and the vertical auxiliary line 601 and the first wiring 701 are both wired using the first metal wiring, and therefore the horizontal auxiliary line 602 and the second wiring 702 are provided in the same layer, and the vertical auxiliary line 601 and the first wiring 701 are provided in the same layer.

[0076] In this embodiment, the reset signal line 40 and the horizontal auxiliary line 602 are provided in the first source / drain layer, and the power supply signal line 20 and the vertical auxiliary line 601 are provided in the second source / drain layer, thereby further reducing the impedance of the reset signal line 40 and the power supply signal line 20 and improving display uniformity.

[0077] In another embodiment, the horizontal extension line 602 may be provided in the same layer as the second source / drain layer, and the vertical extension line 601 may be provided in the same layer as the first source / drain layer.

[0078] In one embodiment, the OLED display panel further includes a gate layer, the gate layer being disposed above the substrate 10, the first source-drain layer being disposed on a side of the gate layer away from the substrate 10, the power supply signal line 20 being disposed in the same layer as the second source-drain layer, and the reset signal line 40 being disposed in the same layer as the gate layer.

[0079] Here, the gate layer further includes a gate, and the reset signal line 40 and the gate may both be made of molybdenum.

[0080] Furthermore, in some gate layer designs, the gate layer may use a titanium / aluminum / titanium stacked structure, which can improve the conductivity of the reset signal line 40 and reduce the impedance of the bit signal line, thereby further improving the display uniformity at low gray levels.

[0081] It should be understood that when there is a shortage of wiring space in the first source-drain layer and the second source-drain layer, fabricating the reset signal line 40, which has lower conductivity requirements than the power supply signal line 20, in the same layer as the gate allows full utilization of the available wiring space in the gate layer, increases the pitch between the wirings in the first source-drain layer and the second source-drain layer, and is advantageous in reducing the risk of short-circuiting the wirings in the first source-drain layer and the second source-drain layer, as well as improving the utilization rate of the wiring space in the gate layer.

[0082] In this embodiment, the reset signal line 40, which has a lower conductivity requirement than the power signal line 20, is provided in the same layer as the gate layer, thereby improving the utilization rate of the wiring space in the OLED display panel and further reducing the risk of short-circuiting between the wirings in the first source-drain layer and the second source-drain layer.

[0083] In the present application, the metal wiring is provided in advance in a first region 3 of a display region 1, a part of the metal wiring is used as a first fan-out wiring 70 of the display region 1, and the remaining unused metal wiring is used as an auxiliary wiring 60, and the auxiliary wiring 60 includes a vertical auxiliary line 601 extending along a first direction 130 and a horizontal auxiliary line 602 extending along a second direction 140, and the vertical auxiliary line 601 extending along the first direction 130 and the reset signal line 40 extending along the second direction 140 are connected in parallel at their intersections to form a grid shape, which is used to reduce the impedance of the reset signal line 40, thereby improving display uniformity at low gradation levels, and the horizontal auxiliary line 602 extending along the second direction 140 is used as a grid shape. The horizontal auxiliary lines 602 extending along the first direction 140 and the power signal lines 20 extending along the first direction 130 are connected in parallel at their intersections to form a grid, which is used to reduce the impedance of the power signal lines 20 and thereby improve display uniformity at high brightness. To this end, the horizontal auxiliary lines 602 and the power signal lines 20 are electrically connected at their intersections to form a grid-like connection, and / or the vertical auxiliary lines 601 and the reset signal lines 40 are electrically connected at their intersections to form a grid-like connection, thereby improving display uniformity of the OLED display panel at at least one of low gray scale and high brightness.

[0084] The present application further provides a display module and a terminal device, both of which include the above-mentioned OLED display panel, and the description thereof is omitted here. Wherein, the display module further includes at least one of a back plate, a cover plate, and an optical film sheet, and the terminal device includes, but is not limited to, a mobile phone, a laptop, and a tablet PC.

[0085] In an embodiment of the present application, an OLED display panel is provided, which includes a display area and a non-display area. The OLED display panel includes a substrate, and power signal lines, data signal lines, reset signal lines, fan-out lines, and auxiliary lines provided above the substrate. The fan-out lines include first fan-out lines and second fan-out lines. The first fan-out lines are provided in a first area of ​​the display area, and the second fan-out lines are provided in the non-display area. One end of the first fan-out line is electrically connected to the data signal lines, and the other end of the first fan-out line is electrically connected to the second fan-out line. The auxiliary lines include vertical auxiliary lines and horizontal auxiliary lines provided in different layers. The auxiliary lines and the power supply signal lines extend along a first direction, and the horizontal auxiliary lines and the reset signal lines extend along a second direction, the first direction and the second direction being perpendicular to each other, wherein the horizontal auxiliary lines and the power supply signal lines are provided in different layers, and the vertical auxiliary lines and the reset signal lines are provided in different layers, and the horizontal auxiliary lines and the power supply signal lines are electrically connected to each other at crossing points to form grid-like connections, and / or the vertical auxiliary lines and the reset signal lines are electrically connected to each other at crossing points to form grid-like connections, and the grid-like connections formed between the auxiliary wiring and the power supply signal lines and / or the reset signal lines reduce the impedance of the power supply signal lines and / or the reset signal lines, and further improve display uniformity.

[0086] In the above embodiments, the description of each embodiment has its own emphasis, and for parts not described in detail in one embodiment, reference can be made to the relevant descriptions of other embodiments.

[0087] The OLED display panel provided in the examples of the present application has been introduced in detail above, and the present specification uses specific examples to explain the principles and embodiments of the present application. The explanation of the above examples is only intended to help understand the method and core idea of ​​the present application, and those skilled in the art may make changes in both the specific embodiments and the scope of application based on the idea of ​​the present application. In summary, the contents of the present specification should not be construed as limiting the present application. [Explanation of symbols]

[0088] Symbol Component name Symbol Component name 1 Display area 2 Hidden area 3 First Area 10 Substrate 20 Power signal line 30 Data signal line 40 Reset signal line 50 Fan-out wiring 60 Auxiliary wiring 70 First fan-out wiring 80 Second fanout wiring 90 First via 100 2nd via 110 3rd via 120 Fourth via 401 First reset signal line 402 Second reset signal line 403 Third reset signal line 404 Fourth reset signal line 405 Fifth reset signal line 406 Sixth reset signal line 601 Vertical auxiliary line 602 Horizontal auxiliary line 701 First wiring 702 Second wiring 130 First direction 140 Second Direction

Claims

1. 1. An OLED display panel including a display area and a non-display area, A substrate; a power signal line, a data signal line, and a reset signal line provided above the substrate; fan-out wiring provided above the substrate, the fan-out wiring including a first fan-out line and a second fan-out line, the first fan-out line being provided in the display area and the second fan-out line being provided in the non-display area, one end of the first fan-out line being electrically connected to the data signal line, and the other end of the first fan-out line being electrically connected to the second fan-out line; auxiliary wirings provided in an array in the display area above the substrate, the auxiliary wirings including vertical auxiliary lines and horizontal auxiliary lines provided in different layers, the vertical auxiliary lines and the power signal lines extending along a first direction, the horizontal auxiliary lines and the reset signal lines extending along a second direction, the first direction and the second direction being perpendicular to each other; wherein the horizontal auxiliary lines and the power supply signal lines are arranged in different layers, and the vertical auxiliary lines and the reset signal lines are arranged in different layers, and the horizontal auxiliary lines and the power supply signal lines are electrically connected at their intersections to form grid-like connections, and / or the vertical auxiliary lines and the reset signal lines are electrically connected at their intersections to form grid-like connections.

2. 2. The OLED display panel according to claim 1, wherein the OLED display panel includes a plurality of pixel units, and each of the pixel units includes two sub-pixels.

3. 3. The OLED display panel of claim 2, wherein the display area includes metal wiring, the metal wiring including first metal wiring extending along a first direction and second metal wiring extending along a second direction, a portion of the first metal wiring being first wirings and a portion of the second metal wiring being second wirings, the first fan-out wiring including the first wiring extending along the first direction and the second wiring extending along the second direction, and the remaining metal wiring not included in the first fan-out wiring being compensation wirings, wherein the remaining portion of the first metal wiring not included in the first wirings is the vertical auxiliary line, and the remaining portion of the second metal wiring not included in the second wirings is the horizontal auxiliary line.

4. 4. The OLED display panel of claim 3, wherein the first wiring is spaced apart from and insulated from the vertical auxiliary line, the second wiring is spaced apart from and insulated from the horizontal auxiliary line, one end of the first wiring is electrically connected to the second fan-out line, the other end of the first wiring is electrically connected to the second wiring through a first via, and the second wiring is electrically connected to the data signal line through a second via.

5. 5. The OLED display panel of claim 4, wherein any one of the pixel units includes the second wiring and the horizontal auxiliary line, and one of the second wiring and one of the horizontal auxiliary line are periodically alternated and spaced apart.

6. 5. The OLED display panel according to claim 4, wherein two adjacent pixel units include three of the second wirings and one of the horizontal auxiliary lines.

7. 7. The OLED display panel according to claim 5, wherein the OLED display panel includes a single reset signal pixel driving circuit, the reset signal line is a first reset signal line, and any one of the pixel units further includes one of the first wirings and one of the vertical auxiliary lines.

8. 8. The OLED display panel according to claim 7, wherein in any one of the pixel units, one of the vertical auxiliary lines and the first reset signal line is connected in parallel at an intersection thereof.

9. 8. The OLED display panel of claim 7, wherein one of every four, six, or eight adjacent first metal wirings is the vertical auxiliary line, and the vertical auxiliary line and the first reset signal line are connected in parallel at their intersections.

10. 7. The OLED display panel of claim 5, wherein the OLED display panel comprises a dual reset signal pixel driving circuit, the reset signal line comprises a second reset signal line and a third reset signal line, any one of the pixel units further comprises one of the first wirings and one of the vertical auxiliary lines, and between two adjacent pixel units, the vertical auxiliary line and the second reset signal line in one pixel unit are connected in parallel at an intersection, and the vertical auxiliary line and the third reset signal line in the other pixel unit are connected in parallel at an intersection.

11. 11. The OLED display panel of claim 10, wherein one of every four, six, or eight adjacent first metal wirings is the vertical auxiliary line, and the vertical auxiliary line and the second reset signal line or the third reset signal line are connected in parallel at an intersection.

12. 7. The OLED display panel according to claim 5, wherein the OLED display panel includes a triple reset signal pixel driving circuit, the reset signal lines include a fourth reset signal line, a fifth reset signal line, and a sixth reset signal line, and any one of the pixel units further includes one of the first wirings and one of the vertical auxiliary lines.

13. 13. The OLED display panel of claim 12, wherein, among three adjacent pixel units, the vertical auxiliary line and the fourth reset signal line in one pixel unit are connected in parallel at an intersection, the vertical auxiliary line and the fifth reset signal line in another pixel unit are connected in parallel at an intersection, and the vertical auxiliary line and the sixth reset signal line in yet another pixel unit are connected in parallel at an intersection.

14. 14. The OLED display panel of claim 13, wherein three of every nine adjacent first metal wirings are the vertical auxiliary lines, and the three vertical auxiliary lines are connected in parallel to the fourth reset signal line, the fifth reset signal line, and the sixth reset signal line at their intersections.

15. 2. The OLED display panel of claim 1, wherein the OLED display panel further includes a first source-drain layer provided above the substrate and a second source-drain layer provided on a side of the first source-drain layer away from the substrate, the horizontal auxiliary lines being provided in the same layer as the first source-drain layer, and the vertical auxiliary lines being provided in the same layer as the second source-drain layer.

16. 16. The OLED display panel according to claim 15, wherein the reset signal line 40 is provided in the same layer as the first source-drain layer, and the power supply signal line is provided in the same layer as the second source-drain layer.

17. 16. The OLED display panel of claim 15, wherein the OLED display panel further includes a gate layer, the gate layer being disposed above the substrate, the first source / drain layer being disposed on a side of the gate layer away from the substrate, the power supply signal line being disposed in the same layer as the second source / drain layer, and the reset signal line being disposed in the same layer as the gate layer.

18. 16. The OLED display panel of claim 15, wherein at least one of the first source-drain layer and the second source-drain layer is a titanium / aluminum / titanium stack structure.

19. 2. The OLED display panel according to claim 1, wherein the pitches of adjacent horizontal auxiliary lines are equal and / or the pitches of adjacent vertical auxiliary lines are equal.

20. A terminal device comprising the OLED display panel according to any one of claims 1 to 19.

Images