Circuit board and semiconductor package including same

Abstract

A circuit board according to an embodiment includes a build-up insulating layer, a connecting member embedded in the build-up insulating layer, and an insulating member arranged on one side of the connecting member, the connecting member including a first insulating layer and a second insulating layer arranged on the first insulating layer, the first insulating layer, the second insulating layer, and the insulating member comprising different insulating materials, and the side of the first insulating layer, the side of the second insulating layer, and the side of the insulating member have steps.

Description

[Technical Field]

[0001] The embodiments relate to a circuit board, and more particularly to a circuit board having improved bonding strength with a connecting member and a semiconductor package including the same. [Background technology]

[0002] As the performance of electrical and electronic products continues to improve, technologies for arranging more semiconductor elements on a semiconductor package circuit board with a limited size are being proposed and researched. However, because a typical semiconductor package is designed to mount only one semiconductor element, there is a limit to how much performance can be achieved.

[0003] Recently, semiconductor packages have been developed that use multiple substrates to arrange multiple semiconductor devices. These semiconductor packages have a structure in which multiple semiconductor devices are connected to each other horizontally and / or vertically on a circuit board. This allows for efficient use of the mounting area of ​​the semiconductor devices and allows for high-speed signal transmission via short signal transmission paths between the semiconductor devices.

[0004] Due to these advantages, the above-mentioned semiconductor package is widely used in mobile devices and the like.

[0005] In addition, semiconductor packages applied to products that provide the Internet of Things (IOT), autonomous vehicles, and high-performance servers are becoming more highly integrated, and the number of semiconductor elements and / or the size of each semiconductor element are increasing, or the functional parts of the semiconductor element are being divided, expanding the concept to semiconductor chiplets.

[0006] This makes intercommunication between semiconductor devices and / or semiconductor chiplets important, and thus there is a trend to place an interposer between a semiconductor package circuit board and a semiconductor device.

[0007] The interposer functions as a redistribution layer that gradually increases the width of the circuit pattern from the semiconductor device toward the semiconductor package in order to facilitate intercommunication between the semiconductor device and / or semiconductor chiplet, or to interconnect the semiconductor device and the semiconductor package circuit board, thereby enabling smooth transmission of electrical signals between the semiconductor device and the semiconductor package circuit board, which has a circuit pattern that is relatively larger than the circuit pattern of the semiconductor device.

[0008] Meanwhile, a package circuit board and / or an interposer applied to a semiconductor package includes a connecting member for connecting with a semiconductor device and / or a semiconductor chiplet. The connecting member functions to horizontally connect a plurality of semiconductor devices and / or semiconductor chiplets. Therefore, the connecting member may be embedded in the package circuit board and / or the interposer.

[0009] In this case, the connecting member may be an inorganic bridge. For example, an inorganic bridge applied to a conventional semiconductor package may be a silicon bridge. Therefore, in the conventional semiconductor package, there is a limit to reducing the size of the connecting member of the silicon bridge, and therefore a limit to reducing the overall size of the semiconductor package.

[0010] Furthermore, the silicon bridge has a problem of weak mechanical reliability. That is, the build-up insulation layer included in the package circuit board and / or interposer contains an insulating material different from that of the connecting member of the silicon bridge. As a result, stress may be concentrated on the connecting member due to the difference in thermal properties between the build-up insulation layer and the connecting member of the conventional technology. This concentrated stress may then cause cracks in the connecting member. Summary of the Invention [Problem to be solved by the invention]

[0011] The embodiments provide a circuit board having an embedded connecting member and a semiconductor package including the same.

[0012] Furthermore, the embodiment provides a semiconductor package that can improve the adhesive strength between the connecting member and the build-up insulating layer.

[0013] Further, the embodiment provides a semiconductor package in which a connecting member including a horizontal step portion is embedded.

[0014] Further, the embodiment provides a semiconductor package having a vertical step portion in the build-up insulating layer.

[0015] Further, the embodiment provides a semiconductor package in which a step portion in the vertical direction is provided on the electrode portion.

[0016] Moreover, this embodiment provides a semiconductor package that allows the mounting positions of a plurality of semiconductor elements to be recognized.

[0017] In the proposed embodiments, the technical problems to be solved are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by a person having ordinary skill in the technical field to which the proposed embodiments pertain from the following description. [Means for solving the problem]

[0018] A circuit board according to an embodiment includes a build-up insulating layer, a connecting member embedded in the build-up insulating layer, and an insulating member arranged on one side of the connecting member, the connecting member including a first insulating layer and a second insulating layer arranged on the first insulating layer, the first insulating layer, the second insulating layer, and the insulating member comprising different insulating materials, and the side of the first insulating layer, the side of the second insulating layer, and the side of the insulating member have steps.

[0019] The connecting member further includes a third insulating layer disposed on the second insulating layer, the third insulating layer including an insulating material different from at least one of the first and second insulating layers, and a side surface of the third insulating layer having a step with a side surface of the first insulating layer, a side surface of the second insulating layer, and a side surface of the insulating member.

[0020] Furthermore, the horizontal width of the first insulating layer of the connecting member is greater than the horizontal width of the second insulating layer.

[0021] The horizontal width of the insulating member is greater than the horizontal width of each of the first insulating layer and the second insulating layer.

[0022] The first insulating layer of the connecting member includes polyimide.

[0023] The second insulating layer of the connecting member includes a resin layer containing a filler.

[0024] The build-up insulating layer includes an insulating material different from that of the second insulating layer of the connecting member.

[0025] In addition, the build-up insulation layer contains the same insulating material as the second insulation layer of the connecting member, and the diameter of the filler provided in the build-up insulation layer is different from the diameter of the filler provided in the second insulation layer of the connecting member.

[0026] The diameter of the filler provided in the build-up insulating layer is larger than the diameter of the filler provided in the second insulating layer of the connecting member.

[0027] Moreover, the horizontal distance from the outermost end to the innermost end of the connecting member satisfies the range of 50 μm to 70 μm.

[0028] The build-up insulating layer also includes a portion having a step in the vertical direction.

[0029] Further, the upper surface of the build-up insulation layer includes a first upper surface that vertically overlaps the connecting member and a second upper surface that does not vertically overlap the connecting member, and the height of the first upper surface is different from the height of the second upper surface.

[0030] The build-up insulating layer also includes an electrode portion that penetrates from the upper surface to a partial area, the electrode portion including a first electrode portion that vertically overlaps the connecting member and a second electrode portion that does not vertically overlap the connecting member, and the upper surface of the first electrode portion has a step with the upper surface of the second electrode portion.

[0031] The build-up insulating layer also includes a first layer and a second layer on the first layer, and the first electrode portion and the second electrode portion penetrate from the top surface of the first layer to a partial area and include a first protruding electrode arranged on the first electrode portion and a second protruding electrode arranged on the second electrode portion.

[0032] Furthermore, the plurality of first protruding electrodes includes a first group of first protruding electrodes and a second group of first protruding electrodes, and the plurality of second protruding electrodes includes a first group of second protruding electrodes and a second group of second protruding electrodes, and further includes a first semiconductor element arranged on the first group of first protruding electrodes and the first group of second protruding electrodes, and a second semiconductor element arranged on the second group of second protruding electrodes and the second group of second protruding electrodes.

[0033] The semiconductor package further includes at least one third semiconductor element embedded in the build-up insulating layer, the third semiconductor element not vertically overlapping the connecting member.

[0034] Further, each of the first and second protruding electrodes includes a first metal layer and a second metal layer disposed on the first metal layer and including a metal material different from that of the first metal layer, and the first metal layer includes a convex portion toward the lower surface of the build-up insulating layer. [Effects of the Invention]

[0035] The semiconductor package according to the embodiment may include a build-up insulating layer and a connecting member embedded in the build-up insulating layer. The side of the connecting member may have a step. For example, the connecting member may include a plurality of insulating layers including different insulating materials. The side of the plurality of insulating layers may have a step. The stepped side of the connecting member may contact the build-up insulating layer. This may increase the contact area between the build-up insulating layer and the connecting member. This may solve the problem of the connecting member peeling off from the first insulating layer.

[0036] Meanwhile, the connecting member may include an organic material having a thermal expansion coefficient similar to that of the build-up insulating layer. Through this, the embodiment may minimize stress applied to the connecting member. Furthermore, the embodiment may solve problems such as cracks occurring in the connecting member or peeling off from the circuit board. Through this, the embodiment may improve the mechanical and electrical reliability of the semiconductor package.

[0037] In addition, in the embodiment, the first insulating layer of the connecting member is changed to polyimide, which is cheaper than silicon, thereby reducing the cost of the connecting member.

[0038] The connecting member may also be provided with narrow via electrodes. The alignment between the via electrodes provided on different layers can significantly affect the operational characteristics of the connecting member, the semiconductor package, and the electronic products, servers, etc. to which the semiconductor package is applied. In this case, the polyimide may have transparency. This improves the alignment between the via electrodes arranged on different layers. This further improves the operational characteristics of the connecting member, the semiconductor package, and the electronic products, servers, etc. to which the semiconductor package is applied.

[0039] In addition, since the first insulating layer of the connecting member has a similar thermal expansion coefficient to the build-up insulating layer, the connecting member can flow together with the circuit board when the circuit board is thermally deformed, thereby solving the problem of cracks in the connecting member that may occur due to thermal deformation of the circuit board.

[0040] Meanwhile, the connecting member may include a third insulating layer of solder resist. The third insulating layer may easily crack during a sawing process of the connecting member. Therefore, in the embodiment, the width of the third insulating layer is made smaller than the widths of the other insulating layers, thereby safely protecting the third insulating layer from the impact. This further improves the reliability of the product.

[0041] Meanwhile, in the embodiment, the upper surface of the build-up insulating layer may have a step, and the upper surfaces of the first and second protruding electrodes may also have a step. The step in the first and second protruding electrodes allows the placement positions of the first and second semiconductor devices to be recognized, thereby enabling more accurate mounting of the first and second semiconductor devices. Furthermore, in the embodiment, the volumes of the conductive connecting members, such as solder, disposed on the first and second protruding electrodes may be adjusted to be different from each other. Therefore, in the embodiment, the protruding electrodes on which the conductive connecting members requiring a larger volume are disposed may be positioned lower than the other protruding electrodes. This may be possible by adjusting the difference in thickness between the cavity and the connecting members. Through this, the embodiment may more stably bond the semiconductor device to the circuit board. Therefore, the embodiment may enable the semiconductor device to operate smoothly and further improve the operational characteristics of electronic products and / or servers to which the semiconductor package is applied.

[0042] The first protruding electrode and the second protruding electrode may each include a first metal layer and a second metal layer. The first metal layer may include nickel. The second metal layer may include copper. The first metal layer may improve the bonding strength between the second metal layer and the electrode portion. For example, if the second metal layer is disposed directly on the electrode portion, oxidation of the electrode portion may occur, which may reduce the bonding strength between the electrode portion and the protruding electrode. Therefore, the first metal layer 135-1 may improve the bonding strength between the second metal layer and the first electrode portion while preventing oxidation of the first electrode portion. The first metal layer may also prevent the protruding electrode from peeling off from the electrode portion due to contraction and expansion of the second insulating layer caused by thermal stress.

[0043] Specifically, when the first metal layer contains nickel, it can improve the adhesion between the electrode portion and the protruding electrode. Furthermore, when electrical connection is subsequently made with the protruding electrode through a material such as solder, the solder can diffuse into the electrode portion, forming an intermetallic compound, which can have poor mechanical and electrical reliability. In particular, when the second metal layer is made of copper, the problem of the formation of an intermetallic compound can be exacerbated. However, when nickel is disposed, it can prevent the diffusion of solder and the formation of an intermetallic compound, thereby improving the electrical and mechanical reliability of the semiconductor package. [Brief explanation of the drawings]

[0044] [Figure 1a] 1 is a cross-sectional view showing a semiconductor package according to a first embodiment. [Figure 1b] FIG. 10 is a cross-sectional view showing a semiconductor package according to a second embodiment. [Figure 1c] FIG. 10 is a cross-sectional view showing a semiconductor package according to a third embodiment. [Figure 1d] FIG. 10 is a cross-sectional view showing a semiconductor package according to a fourth embodiment. [Figure 1e] FIG. 10 is a cross-sectional view showing a semiconductor package according to a fifth embodiment. [Figure 2] FIG. 1 is a cross-sectional view showing a circuit board according to a first embodiment. [Figure 3] FIG. 10 is a cross-sectional view showing a circuit board according to a second embodiment. [Figure 4] FIG. 3 is a plan view of the circuit board of FIG. 2 as seen from above. [Figure 5] 4 is a cross-sectional view of the circuit board of FIG. 3 with a plurality of semiconductor elements bonded thereto. [Figure 6] 3 is a cross-sectional view showing a detailed layer structure of the connecting member of FIG. 2. FIG. [Figure 7] 7 is a plan view of the connecting member of FIG. 6 as seen from above. [Figure 8] 4 is an enlarged cross-sectional view of a region of the circuit board of FIG. 3 according to the first embodiment. [Figure 9] 9 is a diagram for explaining an interface between a build-up insulating layer and a connecting member in FIG. 8. FIG. [Figure 10] FIG. 4 is a cross-sectional view showing a detailed layer structure of a protruding electrode according to an embodiment. [Figure 11] 4 is an enlarged cross-sectional view of a region of the circuit board of FIG. 3 according to the second embodiment. [Figure 12] FIG. 10 is an enlarged cross-sectional view of a region of the circuit board of FIG. 3 according to the third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0045] Hereinafter, the embodiments disclosed herein will be described in detail with reference to the accompanying drawings. Regardless of the reference numerals, identical or similar components will be assigned the same reference numerals, and redundant descriptions thereof will be omitted. The suffixes "module" and "section" used in the following description are used solely for the convenience of drafting the specification, and do not have any distinct meanings or functions. Furthermore, in describing the embodiments disclosed herein, if a detailed description of related publicly known technology is deemed to obscure the gist of the embodiments disclosed herein, such a detailed description will be omitted. Furthermore, the accompanying drawings are merely provided to facilitate understanding of the embodiments disclosed herein, and the technical concepts disclosed herein are not limited by the accompanying drawings. It should be understood that the accompanying drawings include all modifications, equivalents, and alternatives within the spirit and technical scope of the present invention.

[0046] Terms including ordinal numbers such as first, second, etc. may be used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.

[0047] When a component is referred to as being "coupled" or "connected" to another component, it should be understood that it may be directly coupled or connected to the other component, but that there may be other components in between. Conversely, when a component is referred to as being "directly coupled" or "directly connected" to another component, it should be understood that there are no other components in between.

[0048] The singular expression includes the plural expression unless the context clearly indicates otherwise.

[0049] In this application, the use of terms such as "comprises" or "having" is intended to specify the presence of features, numbers, steps, operations, components, parts, or combinations thereof described herein, and should be understood as not precluding the possible presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0050] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0051] -Electronic Devices-

[0052] Before describing the embodiments, an electronic device to which the semiconductor package of the embodiments can be applied will be briefly described. The electronic device includes a main board (not shown). The main board may be physically and / or electrically connected to various components. For example, the main board may be connected to the semiconductor package of the embodiments. Various semiconductor elements may be mounted in the semiconductor package.

[0053] The semiconductor device may include active and / or passive devices. The active device may be a semiconductor chip in the form of an integrated circuit (IC) in which hundreds to millions of devices are integrated into a single chip. The semiconductor device may be a logic chip, a memory chip, or the like. The logic chip may be a central processor (CPU), a graphics processor (GPU), or the like. For example, the logic chip may be an application processor (AP) chip including at least one of a central processor (CPU), a graphics processor (GPU), a digital signal processor, a cryptographic processor, a microprocessor, or a microcontroller, or may be an analog-to-digital converter, an application-specific IC (ASIC), or the like, or a chipset including a specific combination of the above.

[0054] The memory chips may be stacked memories such as HBM, and may include volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, and other memory chips.

[0055] Meanwhile, the product group to which the semiconductor package of the embodiment is applied may be any one of CSP (Chip Scale Package), FC-CSP (Flip Chip-Chip Scale Package), FC-BGA (Flip Chip Ball Grid Array), POP (Package On Package), and SIP (System In Package), but is not limited thereto.

[0056] The electronic device may be a smartphone, a personal digital assistant, a digital video camera, a digital still camera, a vehicle, a high-performance server, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automobile, etc. However, it is not limited to these, and it may also be any other electronic device that processes data.

[0057] Hereinafter, a semiconductor package including a circuit board according to an embodiment will be described. The semiconductor package according to the embodiment may have various package structures including the circuit board described below.

[0058] And, in one embodiment, the circuit board may be the first circuit board described below.

[0059] Also, in other embodiments, the circuit board may be a second circuit board described below.

[0060] Figure 1a is a cross-sectional view showing a semiconductor package according to a first embodiment, Figure 1b is a cross-sectional view showing a semiconductor package according to a second embodiment, Figure 1c is a cross-sectional view showing a semiconductor package according to a third embodiment, Figure 1d is a cross-sectional view showing a semiconductor package according to a fourth embodiment, and Figure 1e is a cross-sectional view showing a semiconductor package according to a fifth embodiment.

[0061] Referring to FIG. 1 a, the semiconductor package of the first embodiment may include a first circuit board 1100 , a second circuit board 1200 , and a semiconductor device 1300 .

[0062] The first circuit board 1100 may refer to a package circuit board.

[0063] For example, the first circuit board 1100 may provide a space to which at least one external circuit board is coupled. The external circuit board may refer to a second circuit board 1200 coupled on the first circuit board 1100. The external circuit board may also refer to a main board included in an electronic device coupled to a lower portion of the first circuit board 1100.

[0064] Although not shown in the drawings, the first circuit board 1100 may provide a space in which at least one semiconductor device is mounted.

[0065] The first circuit board 1100 may include at least one insulating layer and an electrode portion disposed on the at least one insulating layer.

[0066] A second circuit board 1200 may be disposed on the first circuit board 1100 .

[0067] The second circuit board 1200 may be an interposer. For example, the second circuit board 1200 may provide a space in which at least one semiconductor device is mounted. The second circuit board 1200 may be connected to at least one semiconductor device 1300. For example, the second circuit board 1200 may provide a space in which a first semiconductor device 1310 and a second semiconductor device 1320 are mounted. The second circuit board 1200 may electrically connect the first semiconductor device 1310 and the second semiconductor device 1320, and may also electrically connect the first and second semiconductor devices 1310 and 1320 to the first circuit board 1100. That is, the second circuit board 1200 may function as a horizontal connection between a plurality of semiconductor devices and a vertical connection between the semiconductor device and a package circuit board.

[0068] 1a illustrates two semiconductor elements 1310 and 1320 disposed on the second circuit board 1200, but is not limited thereto. For example, one semiconductor element may be disposed on the second circuit board 1200, or alternatively, three or more semiconductor elements may be disposed on the second circuit board 1200.

[0069] The second circuit board 1200 may be disposed between the at least one semiconductor device 1300 and the first circuit board 1100 .

[0070] In one embodiment, the second circuit board 1200 may be an active interposer that functions as a semiconductor device. When the second circuit board 1200 functions as a semiconductor device, the semiconductor package of the embodiment may have a vertically stacked structure on the first circuit board 1100 and may have the functions of multiple logic chips. Having the functions of a logic chip may mean having the functions of both active and passive devices. Unlike passive devices, active devices do not need to have linear current-voltage characteristics. An active interposer may have the functions of an active device. Furthermore, the active interposer may perform the functions of a logic chip while also transmitting signals between a second logic chip disposed thereon and the first circuit board 1100.

[0071] According to another embodiment, the second circuit board 1200 may be a passive interposer. For example, the second circuit board 1200 may function as a signal relay between the semiconductor device 1300 and the first circuit board 1100 and may have passive element functions such as a resistor, capacitor, or inductor. For example, the number of terminals on the semiconductor device 1300 is gradually increasing due to factors such as 5G, the Internet of Things (IoT), improved image quality, and increased communication speed. That is, the number of terminals provided on the semiconductor device 1300 is increasing, and as a result, the width of the terminals and the spacing between the terminals are decreasing. In this case, the first circuit board 1100 may be connected to a main board of an electronic device. Therefore, in order for the electrodes provided on the first circuit board 1100 to have the width and spacing required for connection to the semiconductor device 1300 and the main board, respectively, the thickness of the first circuit board 1100 increases or the layer structure of the first circuit board 1100 becomes complex. Therefore, in the first embodiment, a second circuit board 1200 may be disposed between the first circuit board 1100 and the semiconductor device 1300. The second circuit board 1200 may include electrodes having fine widths and intervals corresponding to the terminals of the semiconductor device 1300.

[0072] The semiconductor device 1300 may be a logic chip, a memory chip, or the like. The logic chip may be a central processor (CPU), a graphics processor (GPU), or the like. For example, the logic chip may be an AP including at least one of a central processor (CPU), a graphics processor (GPU), a digital signal processor, a cryptographic processor, a microprocessor, or a microcontroller, or an analog-to-digital converter, an application-specific integrated circuit (ASIC), or the like, or a chipset including a specific combination of the foregoing. The memory chip may be a stacked memory such as HBM. The memory chip may also include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory.

[0073] On the other hand, the semiconductor package of the first embodiment can include a connecting portion.

[0074] For example, the semiconductor package may include a first connection portion 1410 disposed between the first circuit board 1100 and the second circuit board 1200. The first connection portion 1410 may electrically connect the first circuit board 1100 and the second circuit board 1200 while coupling them to each other.

[0075] For example, the semiconductor package may include a second connection part 1420 disposed between the second circuit board 1200 and the semiconductor device 1300. The second connection part 1420 may electrically connect the semiconductor device 1300 to the second circuit board 1200 while coupling the semiconductor device 1300 to the second circuit board 1200.

[0076] The semiconductor package may include a third connection portion 1430 disposed on the lower surface of the first circuit board 1100. The third connection portion 1430 may couple the first circuit board 1100 to a main board and electrically connect them.

[0077] In this case, the first connecting unit 1410, the second connecting unit 1420, and the third connecting unit 1430 may electrically connect the multiple components using at least one bonding method selected from wire bonding, solder bonding, and direct metal-to-metal bonding. That is, since the first connecting unit 1410, the second connecting unit 1420, and the third connecting unit 1430 have the function of electrically connecting the multiple components, when direct metal-to-metal bonding is used, the semiconductor package may be understood as the electrically connected part, rather than the solder or wire.

[0078] The wire bonding method may refer to electrically connecting multiple components using a conductive wire such as gold (Au). The solder bonding method may refer to electrically connecting multiple components using a material including at least one of Sn, Ag, and Cu. The inter-metal direct bonding method may refer to directly bonding multiple components through recrystallization by applying heat and pressure between multiple components without using a material such as solder, wire, or conductive adhesive. The inter-metal direct bonding method may refer to a bonding method using the second connecting part 1420. In this case, the second connecting part 1420 may refer to a metal layer formed between multiple components through the recrystallization.

[0079] Specifically, the first connecting portion 1410, the second connecting portion 1420, and the third connecting portion 1430 may be bonded to each other by a thermal compression bonding method. The thermal compression bonding method may refer to a method of directly bonding the first connecting portion 1410, the second connecting portion 1420, and the third connecting portion 1430 by applying heat and pressure to the first connecting portion 1410, the second connecting portion 1420, and the third connecting portion 1430.

[0080] In this case, in at least one of the first circuit board 1100 and the second circuit board 1200, electrodes on which the first connection portion 1410, the second connection portion 1420, and the third connection portion 1430 are disposed may have protrusions that protrude outward away from the insulating layer of the circuit board. The protrusions may protrude outward from the first circuit board 1100 or the second circuit board 1200.

[0081] The protrusions may be referred to as bumps, posts, or pillars. Preferably, the protrusions may refer to electrodes of the second circuit board 1200 on which second connection parts 1420 for coupling with the semiconductor device 1300 are disposed. That is, as the pitch of the terminals of the semiconductor device 1300 becomes finer, short circuits may occur between the second connection parts 1420, which are respectively connected to the terminals of the semiconductor device 1300 by a conductive adhesive such as solder. Therefore, in this embodiment, thermal compression bonding may be performed to reduce the volume of the second connection parts 1420. Therefore, in order to ensure the degree of matching, the diffusion force, and the diffusion prevention force that prevents the intermetallic compound (IMC) formed between the conductive adhesive such as solder and the protrusion from diffusing into the interposer and / or the circuit board, the electrode of the second circuit board 1200 on which the second connection portion 1420 is disposed may include a protrusion.

[0082] The semiconductor package may also include a connecting member 1210 .

[0083] The connecting member may be referred to as a bridge circuit board. For example, the connecting member 1210 may include a redistribution layer. The connecting member 1210 may electrically connect a plurality of semiconductor devices horizontally to each other. Exemplarily, since a semiconductor device generally requires a large area, the connecting member 1210 may include a redistribution layer. Since the width of a circuit pattern of a semiconductor package and that of a semiconductor device are significantly different from each other, a buffering function for the circuit pattern is required for electrical connection. The buffering function may mean having an intermediate size between the width of the circuit pattern of the semiconductor package and the width of the circuit pattern of the semiconductor device, and the redistribution layer may function as a buffer.

[0084] In an embodiment, the connecting member 1210 may be an organic bridge. For example, the connecting member 1210 may include an organic material. For example, the connecting member 1210 may include an organic circuit board containing an organic material instead of the silicon circuit board. The connecting member 1210 may be embedded in the second circuit board 1200.

[0085] For this purpose, the second circuit board 1200 may include a cavity, and the connecting member 1210 may be disposed in the cavity of the second circuit board 1200. The connecting member 1210 may horizontally connect a plurality of semiconductor devices disposed on the second circuit board 1200.

[0086] 1b, the semiconductor package of the second embodiment may include a second circuit board 1200 and a semiconductor device 1300. In this case, the semiconductor package of the second embodiment has a structure in which the first circuit board 1100 is omitted compared to the semiconductor package of the first embodiment.

[0087] That is, the second circuit board 1200 of the second embodiment can function as a package circuit board while also functioning as an interposer.

[0088] The first connection part 1410 disposed on the lower surface of the second circuit board 1200 can couple the second circuit board 1200 to a main board of an electronic device.

[0089] Referring to FIG. 1 c, the semiconductor package of the third embodiment may include a second circuit board 1200 and a semiconductor device 1300 .

[0090] In this case, the semiconductor package of the third embodiment may have a structure in which the second circuit board 1200 is omitted compared to the semiconductor package of the first embodiment.

[0091] That is, the first circuit board 1100 of the third embodiment can function as a package circuit board and also as a connection between the semiconductor devices 1300 and the main board. To this end, the first circuit board 1100 can include a connecting member 1110 for connecting between the plurality of semiconductor devices. The connecting member 1110 can be an organic bridge for connecting between the plurality of semiconductor devices.

[0092] Referring to FIG. 1d, the semiconductor package of the fourth embodiment may further include a third semiconductor element 1330 compared to the semiconductor package of the third embodiment.

[0093] For this purpose, a fourth connection portion 1440 may be disposed on the lower surface of the first circuit board 1100.

[0094] A third semiconductor element 1330 may be disposed in the fourth connection portion 1400. That is, the semiconductor package of the fourth embodiment may have a structure in which semiconductor elements are mounted on both the upper and lower sides.

[0095] In this case, the third semiconductor device 1330 may have a structure in which it is disposed on the lower surface of the second circuit board 1200 in the semiconductor package of FIG. 1b.

[0096] 1e, the semiconductor package of the fifth embodiment may include a first circuit board 1100. First and second semiconductor elements 1310 and 1320 may be disposed on the first circuit board 1100. To this end, a first connection part 1410 may be disposed between the first circuit board 1100 and the first and second semiconductor elements 1310 and 1320.

[0097] A connecting member 1110 may be embedded in the first circuit board 1110. The connecting member 1110 may connect the first and second semiconductor chips 1310 and 1320 horizontally.

[0098] The first circuit board 1100 may also include a conductive coupling part 1450. The conductive coupling part 1450 may further protrude from the first circuit board 1100 toward the second semiconductor device 1320. The conductive coupling part 1450 may be referred to as a bump, or alternatively, as a post. The conductive coupling part 1450 may be disposed to have a protruding structure on an electrode disposed on the top side of the first circuit board 1100.

[0099] A third semiconductor device 1330 may be disposed on the conductive coupling part 1450. In this case, the third semiconductor device 1330 may be connected to the first circuit board 1100 via the conductive coupling part 1450. In addition, a second connection part 1420 may be disposed between the first and second semiconductor devices 1310 and 1320 and the third semiconductor device 1330.

[0100] Thus, the third semiconductor device 1320 may be electrically connected to the first and second semiconductor devices 1310 and 1320 via the second connection portion 1420 .

[0101] That is, the third semiconductor device 1330 may be connected to the first circuit board 1100 through the conductive coupling part 1450 and also connected to the first and second semiconductor devices 1310 and 1320 through the second connection part 1420 .

[0102] At this time, the second semiconductor device 1330 may receive a power signal and / or power through the conductive coupling part 1450. In addition, the third semiconductor device 1330 may transmit and receive communication signals to and from the first and second semiconductor devices 1310 and 1320 through the second connection part 1420.

[0103] The semiconductor package of the fifth embodiment supplies a power signal and / or power to the third semiconductor element 1330 through the conductive coupling part 1450, thereby providing sufficient power for driving the third semiconductor element 1330 and smoothly controlling the power supply operation.

[0104] As a result, the embodiment may improve the driving characteristics of the third semiconductor device 1330. That is, the embodiment may solve the problem of insufficient power provided to the third semiconductor device 1330. Furthermore, the embodiment may provide at least one of a power signal, power, and a communication signal of the third semiconductor device 1330 via different paths via the conductive coupling part 1450 and the second connection part 1420. As a result, the embodiment may solve the problem of loss of the communication signal due to the power signal. For example, the embodiment may minimize mutual interference between the power signal and the communication signal.

[0105] Meanwhile, in the fifth embodiment, the third semiconductor device 1330 may be disposed on the first circuit board 1100 in a package-on-package (POP) structure in which a plurality of package circuit boards are stacked. For example, the third semiconductor device 1330 may be a memory package including a memory chip. The memory package may be coupled to the conductive coupling part 1450. In this case, the memory package may not be connected to the first and second semiconductor devices 1310 and 1320.

[0106] Fig. 2 is a cross-sectional view of a circuit board according to a first embodiment, Fig. 3 is a cross-sectional view of a circuit board according to a second embodiment, Fig. 4 is a plan view of the circuit board of Fig. 2 seen from above, Fig. 5 is a cross-sectional view of the circuit board of Fig. 3 with multiple semiconductor elements bonded thereto, Fig. 6 is a diagram showing a detailed layer structure of the connecting member of Fig. 2, Fig. 7 is a plan view of the connecting member of Fig. 6 seen from above, Fig. 8 is an enlarged cross-sectional view of a region of the circuit board of Fig. 3 according to the first embodiment, Fig. 9 is a diagram illustrating the interface between the build-up insulating layer and the connecting member of Fig. 8, Fig. 10 is a cross-sectional view showing a detailed layer structure of a protruding electrode of an embodiment, Fig. 11 is an enlarged cross-sectional view of a region of the circuit board of Fig. 3 according to a second embodiment, and Fig. 12 is an enlarged cross-sectional view of a region of the circuit board of Fig. 3 according to a third embodiment.

[0107] The semiconductor package according to the embodiment will be specifically described below with reference to FIGS.

[0108] Before describing the embodiments, FIGS. 2 and 3 can be distinguished by whether or not a protruding electrode is provided on the top side of the circuit board. For example, the circuit board of FIG. 3 may include a protruding electrode 145. For example, the circuit board of FIG. 2 may not include a protruding electrode. The second insulating layer 112 of the circuit board of FIG. 2 may include an opening that is larger than the width of the first electrode portion 130 and the second electrode portion 140 by thinning the second insulating layer 112. The circuit board of FIG. 2 can be bonded to a semiconductor device through the opening, thereby allowing stable bonding to the semiconductor device even without the protruding electrode.

[0109] 2 and 3, the circuit board according to the first embodiment may include a build-up insulating layer 110, an electrode unit, and a connecting member 200. The build-up insulating layer 110 may include a plurality of insulating layers built up along a vertical direction. The build-up insulating layer 110 may include a first insulating layer 111, a second insulating layer 112, and a third insulating layer 113. The first insulating layer 111 may constitute an inner layer of the build-up insulating layer. The second insulating layer 112 may be disposed on the first insulating layer 111. For example, the second insulating layer 112 may refer to an insulating layer disposed on the uppermost side of the build-up insulating layer. The third insulating layer 113 may be disposed below the first insulating layer 111. For example, the third insulating layer 113 may refer to an insulating layer disposed on the lowermost side of the build-up insulating layer.

[0110] The first insulating layer 111 of the circuit board may have a layer structure of at least one layer. Preferably, the first insulating layer 111 of the circuit board may have a multi-layer structure. The multi-layer structure may be divided by an electrode portion. For example, the electrode portion may include a connecting electrode 120 and a through electrode 125. The connecting electrode 120 and the through electrode 125 may have different widths. The multi-layer structure may be divided by the difference in width between the connecting electrode 120 and the through electrode 125. The connecting electrode 120 may have a width greater than that of the through electrode 125. Thus, the connecting electrode 120 and the through electrode 125 may be divided by the electrode portion. The connecting electrode 120 may refer to a pad and / or trace of the electrode portion. The through electrode 125 may refer to a via electrode connected to the connecting electrode. The through electrode 125 may be disposed between a plurality of connecting electrodes 120 disposed in different layers. Through the above-described stacked structure, the circuit board of the embodiment can efficiently electrically connect at least one semiconductor device and / or the second circuit board to the main board.

[0111] 2 is shown as having a seven-layer structure, but is not limited thereto. For example, the first insulating layer 111 of the circuit board may have six or fewer layers, or eight or more layers. Furthermore, when the first insulating layers 111 of the circuit board contain the same insulating material, the interfaces between the insulating layers may not be separated. In this case, the stacked structure may be separated by the connecting electrodes 120 and through electrodes 125 of the electrode unit.

[0112] Meanwhile, when the first insulating layer 111 of the circuit board has a multi-layer structure, the first insulating layers of the plurality of layers may contain the same insulating material, but are not limited to this. For example, at least one of the plurality of first insulating layers may contain a different insulating material from at least one of the other first insulating layers.

[0113] The first insulating layer 111 of the circuit board may be rigid or flexible. For example, the first insulating layer 111 of the circuit board may include glass or plastic. For example, the first insulating layer 111 of the circuit board may include chemically strengthened / semi-strengthened glass such as soda lime glass or aluminosilicate glass. For example, the first insulating layer 111 of the circuit board may include reinforced or ductile plastic such as polyimide (PI), polyethylene terephthalate (PET), propylene glycol (PPG), or polycarbonate (PC). For example, the first insulating layer 111 of the circuit board may include sapphire. For example, the first insulating layer 111 of the circuit board may include an optically isotropic film. For example, the first insulating layer 111 of the circuit board may include cyclic olefin copolymer (COC), cyclic olefin polymer (COP), optically isotropic polycarbonate (PC), or optically isotropic polymethyl methacrylate (PMMA). For example, the first insulating layer 111 of the circuit board may be formed of a material including an inorganic filler and an insulating resin. For example, the first insulating layer 111 of the circuit board may include a structure in which an inorganic filler such as silica or alumina is disposed in a thermosetting resin or a thermoplastic resin.

[0114] The first insulating layer 111 may have a structure in which a plurality of different insulating materials are stacked, and an exemplary arrangement structure will be described in more detail below.

[0115] In one embodiment, the first insulating layer 111 may include a first layer corresponding to a core layer including a reinforcing member. Here, the core layer may refer to an insulating layer including a reinforcing member and having a vertical thickness of more than 30 μm. The insulating layer may also include a plurality of second layers disposed above and below the core layer and not including a reinforcing member. In this case, the circuit board may be a core circuit board. The reinforcing member may also be referred to as a reinforcing fiber or glass fiber.

[0116] The reinforcing member may refer to glass fiber material extending horizontally in the insulating layer, and may have a different meaning from inorganic fillers spaced apart from each other. That is, the reinforcing member of the first layer may have a different length or width in the horizontal direction from the filler of the second layer. Furthermore, the reinforcing member of the first layer may have a structure extending elongated in one direction, while the filler of the second layer may be distributed and arranged in any size, so the reinforcing member of the first layer and the filler of the second layer may be distinguished from each other. For example, the glass fiber may extend to a width greater than the width of the first layer. Here, having a width greater than the width of the first layer may mean that the glass fiber can be arranged in a curved shape in the horizontal direction. Furthermore, even if the second layer contains a filler, the reinforcing member is not as effective in preventing problems such as warping as the glass fiber of the first layer, and therefore the reinforcing member will be described separately from the filler of the second layer.

[0117] In another embodiment, the first insulating layer 111 of the circuit board may be a coreless circuit board that does not include a core layer. For example, the first insulating layer 111 of the circuit board may include an organic material that does not include a reinforcing member, which allows for excellent processability, slimming of the circuit board, and miniaturization of the electrode portion of the circuit board. For example, the first insulating layer 111 of the circuit board may be made of Ajinomoto Build-up Film (ABF), a product sold by Ajinomoto Co., Inc., or may be made of FR-4, bismaleimide triazine (BT), photoimageable dielectric resin (PID), BT, etc. For example, the first insulating layer 111 may include multiple layers of ABF.

[0118] In this case, if the first insulating layer 111 of the circuit board is made of only ABFs without a reinforcing member, the warpage characteristics of the circuit board may be reduced. Therefore, the first insulating layer 111 of the circuit board is made of ABFs (Ajinomoto Build-up Films), and at least one of the multiple ABFs constituting the first insulating layer of the circuit board may include a reinforcing member.

[0119] For example, the first insulating layer 111 of the circuit board may include a first layer made of a first ABF containing a resin and a filler. The first insulating layer 111 of the circuit board may also include a layer made of a second ABF containing the resin, the filler, and a reinforcing member. The reinforcing member included in the second ABF may include, but is not limited to, a GCP (Glass Core Primer) material.

[0120] The layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member may have a thickness in the range of 10 μm to 40 μm. Preferably, the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member may have a thickness in the range of 15 μm to 35 μm. More preferably, the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member may have a thickness in the range of 18 μm to 32 μm. If the thickness of the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member is less than 10 μm, the rigidity of the circuit board may be reduced. If the thickness of the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member is less than 10 μm, the electrodes of the circuit board may not be reliably protected, which may reduce electrical reliability. If the thickness of the layer of the first insulating layer 111 of the circuit board that does not include the reinforcing member exceeds 40 μm, the overall thickness of the circuit board may increase, thereby increasing the thickness of the semiconductor package. Furthermore, if the thickness of the layer not including the reinforcing member in the first insulating layer 111 of the circuit board exceeds 40 μm, it may be difficult to miniaturize the electrode portion of the circuit board.

[0121] The thickness may correspond to the distance between connecting electrodes 120 arranged on different layers in the vertical direction of the circuit board. That is, the thickness may refer to the length from the top to the bottom of the circuit board or from the bottom to the top, and may refer to the vertical length of the circuit board. Here, the top may refer to the highest position in the vertical direction of each component, and the bottom may refer to the lowest position in the vertical direction of each component. These positions may be referred to inversely.

[0122] The top surface of the first insulating layer 111 may have a step. For example, the first insulating layer 111 may include a convex portion. Alternatively, the first insulating layer 111 may include a concave portion. For example, the top surface of the first insulating layer 111 that vertically overlaps the connecting member 200 and the top surface that does not vertically overlap the connecting member 200 may have different heights. This will be described in more detail below.

[0123] The insulating layer of the circuit board may include a second insulating layer 112 and a third insulating layer 113. The second insulating layer 112 and the third insulating layer 113 of the circuit board may be resist layers. For example, the second insulating layer 112 of the circuit board may be a first resist layer disposed on the uppermost side of the circuit board. The third insulating layer 113 of the circuit board may be a second resist layer disposed on the lowermost side of the circuit board. The resist layer has low solder wettability, and thus can function to prevent solder from flowing during solder bonding and to prevent moisture and contaminants from penetrating into the circuit board from the outside.

[0124] In this case, the second insulating layer 112 of the circuit board may contain the same insulating material as the first insulating layer 111 of the circuit board. For example, if the first insulating layer 111 of the circuit board is composed of a plurality of layers, the first insulating layer closest to the second insulating layer 112 of the plurality of first insulating layers may contain the same insulating material as the second insulating layer 112. In this case, it may be difficult to distinguish the interface between the first insulating layer 111 and the second insulating layer 112 of the circuit board. In this case, the interface between the first insulating layer 111 and the second insulating layer 112 of the circuit board may be distinguished using the connecting electrode 120 and the through electrode 125 of the electrode portion disposed on the first insulating layer 111 and the second insulating layer 112 of the circuit board.

[0125] Correspondingly, the third insulating layer 113 of the circuit board may include the same insulating material as the first insulating layer 111 of the circuit board.

[0126] The second insulating layer 112 and the third insulating layer 113 of the circuit board can protect the upper and lower surfaces of the first insulating layer 111 of the circuit board, respectively. Therefore, the second insulating layer 112 and the third insulating layer 113 of the circuit board can also be referred to as protective layers. For example, the second insulating layer 112 can be referred to as an upper protective layer disposed on the first insulating layer 111 built up in the vertical direction, and the third insulating layer 113 can be referred to as a lower protective layer.

[0127] The second insulating layer 112 and the third insulating layer 113 of the circuit board may be solder resist layers containing an organic polymer material. For example, the second insulating layer 112 and the third insulating layer 113 of the circuit board may include an epoxy acrylate resin. In particular, the second insulating layer 112 and the third insulating layer 113 of the circuit board may include a resin, a hardener, a photoinitiator, a pigment, a solvent, a filler, an additive, an acrylic monomer, etc. However, the embodiment is not limited thereto, and the second insulating layer 112 and the third insulating layer 113 of the circuit board may be any one of a photo solder resist layer, a coverlay, and a polymer material.

[0128] The second insulating layer 112 and the third insulating layer 113 of the circuit board may each have a thickness of 1 μm to 20 μm. The second insulating layer 112 and the third insulating layer 113 of the circuit board may each have a thickness of 1 μm to 15 μm. For example, the second insulating layer 112 and the third insulating layer 113 of the circuit board may each have a thickness of 5 μm to 20 μm.

[0129] If the thickness of each of the second insulating layer 112 and the third insulating layer 113 of the circuit board exceeds 20 μm, the thickness of the semiconductor package increases, making it difficult to make it thinner, or increasing the stress applied to the first insulating layer 111. If the thickness of each of the second insulating layer 112 and the third insulating layer 113 of the circuit board is less than 1 μm, it may be difficult to stably protect the electrodes included in the circuit board, which may result in reduced electrical or physical reliability.

[0130] Meanwhile, the top surface of the second insulating layer 112 may have a step. For example, the second insulating layer 112 may include a convex portion. Or, the second insulating layer 112 may include a concave portion. For example, the top surface of the second insulating layer 112 that vertically overlaps the connecting member 200 and the top surface that does not vertically overlap the connecting member 200 may have different heights. This will be described in more detail below.

[0131] The circuit board may include an electrode portion. The electrode portion of the circuit board may be disposed in the first insulating layer 111. For example, at least a portion of the electrode portion may be embedded in the first insulating layer 111. For example, at least a portion of the electrode portion may be embedded in the second insulating layer 112. For example, at least a portion of the electrode portion may be embedded in the third insulating layer 113. Furthermore, at least a portion of the electrode portion may protrude above the second insulating layer 112. Furthermore, at least a portion of the electrode portion may protrude below the third insulating layer 113.

[0132] The electrode unit may broadly include a connecting electrode 120 and a through electrode 125. The connecting electrode 120 may be disposed adjacent to an upper surface or a lower surface of each layer of the first insulating layer 111. The through electrode 125 may be connected to the connecting electrode 120. The through electrode 125 may penetrate at least a portion of each layer of the first insulating layer 111. In this case, the connecting electrode 120 may be referred to as a pad or a trace depending on its position and function. The through electrode 125 may also be referred to as a via electrode.

[0133] In this case, when the first insulating layer 111 of the circuit board has a seven-layer structure, the through electrodes 125 of the electrode portion may have a four-layer structure in which they are spaced apart from each other in the vertical direction and connecting electrodes 120 are interposed between them.

[0134] Meanwhile, at least one of the connecting electrodes 120 of the circuit board may have an ETS (Embedded Trace Substrate) structure. For example, the uppermost or lowermost electrode of the connecting electrodes 120 may be disposed in a recess formed in the first insulating layer 111. The ETS structure may also be referred to as an embedded structure. The ETS structure is advantageous for miniaturization compared to electrodes having a general protruding structure. As a result, the embodiment allows the electrodes to be formed according to the size and pitch of terminals provided on the semiconductor device. As a result, the embodiment may improve circuit integration. Furthermore, the embodiment may minimize the transmission distance of signals transmitted through the semiconductor device, thereby minimizing signal transmission loss.

[0135] The connecting electrode 120 may serve to transmit signals in a horizontal direction in the first insulating layer 111. The connecting electrode 120 may also serve to connect between a plurality of through electrodes 125. The through electrodes 125 may serve to transmit signals in a vertical direction in the first insulating layer 111. For example, the through electrodes 125 may vertically connect between the connecting electrodes 120 arranged on different layers.

[0136] The electrode unit may include a plurality of electrode units depending on the position, for example, the electrode unit may include a plurality of electrode units connected to the semiconductor element and / or the connecting member 200.

[0137] The electrode unit may include a first electrode unit 130 and a second electrode unit 140. The first electrode unit 130 and the second electrode unit 140 may be distinguished based on the position of the connection member 200 embedded in the first insulating layer 111. The first electrode unit 130 and the second electrode unit 140 may penetrate from the top surface of the first insulating layer 111 to a partial region.

[0138] The first electrode 130 may vertically overlap the connecting member 200 and penetrate a portion of the first insulating layer 111 from the top surface thereof. For example, the first electrode 130 may be an electrode that connects a semiconductor device to the connecting member 200. A portion of the first electrode 130 may be connected to the first semiconductor device, and the remaining portion may be connected to the second semiconductor device. The first electrode 130 may be connected to the connecting member 200 to electrically connect the first and second semiconductor devices.

[0139] The second electrode unit 140 may penetrate a portion of the first insulating layer 111 from the top surface thereof without vertically overlapping the connecting member 200. The second electrode unit 140 may be an electrode unit that horizontally overlaps the first electrode unit 130. The second electrode unit 140 may be an electrode connected to the semiconductor device. For example, the second electrode unit 140 may be an electrode unit connected to the same semiconductor device as the first electrode unit 130. However, unlike the first electrode unit 130, the second electrode unit 140 may not be directly electrically connected to the connecting member 200. The second electrode unit may electrically connect a circuit board to the first semiconductor device and / or the second semiconductor device.

[0140] The first electrode unit 130 and the second electrode unit 140 may be disposed above the connecting member 200 on the first insulating layer 111. The first electrode unit 130 may refer to an electrode unit that overlaps the connecting member 200 in the vertical direction. Also, the second electrode unit 140 may refer to an electrode unit that overlaps the first electrode unit 130 in the horizontal direction but does not overlap the connecting member 200 in the vertical direction.

[0141] The first electrode unit 130 and the second electrode unit 140 may each refer to an electrode connected to a semiconductor device. For example, in the embodiment, first and second semiconductor devices may be arranged horizontally spaced apart on the circuit board. The first electrode unit 130 may refer to an electrode unit that vertically overlaps the connecting member 200 and is connected to the first and second semiconductor devices. The second electrode unit 140 may refer to an electrode unit that does not vertically overlap the connecting member 200 and is connected to at least one of the first and second semiconductor devices.

[0142] Specifically, the first electrode unit 130 may penetrate a portion of the upper surface of the first insulating layer 111 in a region that vertically overlaps with the connecting member 200. In one embodiment, the first electrode unit 130 may be an electrode that directly connects a semiconductor device and the connecting member. In another embodiment, the first electrode unit 130 may be an electrode that connects the connecting member 200 to a first protruding electrode 135 connected to a semiconductor device.

[0143] The second electrode unit 140 may penetrate a portion of the top surface of the first insulating layer 111 in a region that does not vertically overlap with the connecting member 200. In one embodiment, the second electrode unit 140 may be an electrode that is directly connected to the same semiconductor element as the first electrode unit 130. In another embodiment, the second electrode unit 140 may be an electrode that is connected to a second protruding electrode 145 that is connected to the semiconductor element.

[0144] The first protruding electrode 135 and the second protruding electrode 145 may be bumps. The first protruding electrode 135 and the second protruding electrode 145 may be provided to facilitate bonding between the circuit board and the semiconductor device. The first protruding electrode 135 and the second protruding electrode 145 may refer to electrodes on which a conductive adhesive is disposed for bonding with a semiconductor device.

[0145] The first electrode 130 may be connected to the connecting member 200. For example, the first electrode 130 may be connected to a pad 310 provided on the connecting member 200.

[0146] In addition, the second electrode unit 140 may be connected to a connecting electrode 143 that horizontally overlaps the connecting member 200 or the first electrode unit 130. In this case, the height of an upper surface of the connecting electrode 143 and an upper surface of the pad 310 of the connecting electrode 143 may be different from each other.

[0147] Therefore, the lower surface of the first electrode unit 130 and the lower surface of the second electrode unit 140 may have different heights.

[0148] In an embodiment, a lower surface of the first electrode unit 130 may be positioned lower than a lower surface of the second electrode unit 140. In this case, an upper surface of the first electrode unit 130 may be positioned lower than an upper surface of the second electrode unit 140.

[0149] In another embodiment, the lower surface of the first electrode unit 130 may be positioned lower than the lower surface of the second electrode unit 140. In this case, the upper surface of the first electrode unit 130 may be positioned higher than the upper surface of the second electrode unit 140.

[0150] The electrode unit may include a third electrode unit 150. The third electrode unit 150 may be embedded in the first insulating layer 111. For example, the third electrode unit 150 may penetrate a portion of the first insulating layer 111. The third electrode unit 150 may be connected to a third semiconductor element 220 embedded in the first insulating layer 111. For example, the third electrode unit 150 may vertically overlap the third semiconductor element 220. A lower surface of the third electrode unit 150 may be connected to a terminal 225 of the third semiconductor element 220. The third electrode unit 150 may electrically connect a circuit board to the terminal 225 of the embedded third semiconductor element 220.

[0151] The electrode unit may include a fourth electrode unit 160. The fourth electrode unit 160 may be embedded in the first insulating layer 111. For example, the fourth electrode unit 160 may penetrate a portion of the first insulating layer 111. The fourth electrode unit 160 may be connected to a fourth semiconductor element 230 embedded in the first insulating layer 111. For example, the fourth electrode unit 160 may vertically overlap the fourth semiconductor element 230. A lower surface of the fourth electrode unit 160 may be connected to a terminal 235 of the fourth semiconductor element 230. The fourth electrode unit 160 may function to electrically connect a circuit board to the terminal 235 of the embedded fourth semiconductor element 230.

[0152] The electrode unit may include a fifth electrode unit 170. The fifth electrode unit 170 may vertically overlap the connecting member 200. The fifth electrode unit 170 may be embedded in the first insulating layer 111. The fifth electrode unit 170 may be an electrode used to form an accommodating space in the first insulating layer 111 to accommodate the connecting member 200. For example, the fifth electrode unit 170 may be an etch-stopping electrode. For example, the fifth electrode unit 170 may be a laser-stopping electrode.

[0153] The electrode unit may include a protruding electrode. The electrode unit may include a first protruding electrode 135. The first protruding electrode 135 may be provided on the first electrode unit 130. The first protruding electrode 135 may protrude onto the second insulating layer 112. The first protruding electrode 135 may improve bonding between the semiconductor device and the circuit board. The protruding of the first protruding electrode 135 onto the second insulating layer 112 may mean that an upper surface of the first protruding electrode 135 is located higher than upper surfaces of other components of the circuit board. For example, it may mean that an upper surface of the first protruding electrode 135 is located on the uppermost side of the circuit board.

[0154] In addition, the electrode unit may include a second protruding electrode 145. The second protruding electrode 145 may be provided on the second electrode unit 140. The second protruding electrode 145 may protrude onto the second insulating layer 112. The second protruding electrode 145 may improve the bonding between the semiconductor device and the circuit board. The second protruding electrode 145 protruding onto the second insulating layer 112 may mean that an upper surface of the second protruding electrode 145 is located higher than upper surfaces of other components of the circuit board. For example, this may mean that an upper surface of the second protruding electrode 145, together with the first protruding electrode 135, is located at the top of the circuit board.

[0155] The first protruding electrode 135 and the second protruding electrode 145 may be referred to as bumps. The first protruding electrode 135 and the second protruding electrode 145 may also be referred to as posts. The first protruding electrode 135 and the second protruding electrode 145 may also be referred to as pillars. Preferably, the first protruding electrode 135 and the second protruding electrode 145 may represent electrodes on which conductive connecting members for coupling with the semiconductor device are disposed. That is, as the pitch of the terminals of the semiconductor device becomes finer, short circuits may occur between the conductive connecting members respectively connected to the terminals of the semiconductor device by a conductive adhesive such as solder. Therefore, in this embodiment, thermal compression bonding may be performed to reduce the volume of the conductive connecting members. Therefore, in this embodiment, the first protruding electrode 135 and the second protruding electrode 145 are provided to ensure the degree of matching, the diffusion force, and the diffusion prevention force that prevents the intermetallic compound (IMC) formed between the conductive adhesive such as solder and the protruding portion from diffusing into the circuit board.

[0156] The connecting member 200 may be embedded in the first insulating layer 111. In an embodiment, the connecting member 200 may be an organic bridge. For example, the organic bridge may be a bridge including an organic insulating layer. The organic bridge is embedded in the first insulating layer 111 and may function to connect multiple different semiconductor devices therebetween. To this end, the organic bridge may have electrodes that are denser or finer than the electrodes of the circuit board, thereby horizontally connecting multiple semiconductor devices mounted on the circuit board.

[0157] The connecting member 200 may be embedded in the first insulating layer 111. At least a portion of the insulating layer constituting the connecting member 200 may contain an insulating material different from that of the first insulating layer 111. Thus, the connecting member 200 embedded in the first insulating layer 111 and at least a portion of its side surface may be separated from the first insulating layer 111. The side surface of the connecting member 200 may have a step. For example, the connecting member 200 may be composed of a plurality of layers. The layers of the connecting member 200 may have different widths. Therefore, the connecting member 200 may have a structure in which a plurality of layers having different widths are stacked, and thus the side surface may have a step.

[0158] The connecting member 200 may include a plurality of insulating layers including different insulating materials. Sides of the plurality of insulating layers may have steps. The stepped side of the connecting member 200 may contact the first insulating layer 111. This may increase the contact area between the first insulating layer 111 and the connecting member 200. This may solve the problem of the connecting member 200 peeling off from the first insulating layer 111.

[0159] Meanwhile, the connecting member 200 may include an insulating member 180. The insulating member 180 may be an adhesive member. For example, the insulating member 180 may be disposed between the fifth electrode unit 170 and the connecting member 200. The insulating member 180 may have a width different from that of the connecting member 200. For example, the insulating member 180 may be wider than the width of a region having the largest outer width of the connecting member 200. The insulating member 180 may be disposed on the fifth electrode unit 170. The insulating member 180 may be narrower than the width of the fifth electrode unit 170. Therefore, at least a portion of the upper surface of the fifth electrode unit 170 may be in contact with the insulating member 180, and the remaining portion may be in contact with the first insulating layer 111.

[0160] Meanwhile, a plurality of semiconductor devices may be coupled to the circuit board.

[0161] For example, a plurality of semiconductor elements may be bonded to the circuit board, or a plurality of semiconductor elements may be embedded in the circuit board.

[0162] Specifically, a plurality of semiconductor elements may be coupled to the exterior of the circuit board and spaced apart from one another in the horizontal direction, and a plurality of semiconductor elements may be embedded in the first insulating layer 111 of the circuit board and spaced apart from one another in the horizontal direction.

[0163] For example, the first insulating layer 111 may include a first receiving portion 110TH1 in which the third semiconductor element 220 is embedded. The third semiconductor element 220 may be embedded in the first receiving portion 110TH1. The third semiconductor element 220 may be connected to the third electrode portion 150. The third semiconductor element 220 may be, but is not limited to, an integrated passive device (IPD).

[0164] The first insulating layer 111 may also include a second receiving portion 110TH2 in which the fourth semiconductor element 230 is embedded. The fourth semiconductor element 230 may be embedded in the second receiving portion 110TH2 of the first insulating layer 111. The fourth semiconductor element 230 may be connected to the fourth electrode portion 160. The fourth semiconductor element 230 may be, but is not limited to, a multi-layer ceramic capacitor (MLCC) or a Si-based capacitor.

[0165] Hereinafter, detailed structures of the connecting member 200, the first electrode portion 130, the second electrode portion 140, the pad 210 of the connecting member 200, and the connecting electrode 143 according to the embodiment will be described in detail.

[0166] 4 and 5, the first electrode unit 130 and the second electrode unit 140 may be divided into a plurality of groups.

[0167] For example, each of the first electrode unit 130 and the second electrode unit 140 may be an electrode unit connected to a semiconductor device. For example, the semiconductor device may include first and second semiconductor devices 240 and 250. Each of the first electrode unit 130 and the second electrode unit 140 may refer to an electrode connected to the first and second semiconductor devices.

[0168] The first electrode unit 130 and the second electrode unit 140 may be distinguished from each other according to their positions. For example, the first electrode unit 130 may be an electrode unit that overlaps the connecting member 200 in the vertical direction. The second electrode unit 140 may be an electrode unit that overlaps the first electrode unit 130 in the horizontal direction but does not overlap the connecting member 200 in the vertical direction.

[0169] Each of the first electrode unit 130 and the second electrode unit 140 may be divided into a plurality of groups.

[0170] The first electrode unit 130 may include a first group of first electrode units 130A and a second group of first electrode units 130B. The first group of first electrode units 130A may refer to electrode units vertically overlapping the first semiconductor device 240. For example, the first group of first electrode units 130A may refer to electrode units connected to the first semiconductor device 240. The second group of first electrode units 130B may refer to electrode units vertically overlapping the second semiconductor device 250. For example, the second group of first electrode units 120B may refer to electrode units connected to the second semiconductor device 250.

[0171] The second electrode unit 140 may include a first group of second electrode units 140A and a second group of second electrode units 140B. The first group of second electrode units 140A may be disposed adjacent to the first group of first electrode units 130A. For example, the first group of second electrode units 140A may be disposed on one side of the first group of first electrode units 130A. The first group of second electrode units 140A may overlap the first semiconductor element in the vertical direction. The first group of second electrode units 140A may be connected to the first semiconductor element. The second group of second electrode units 140B may be disposed adjacent to the second group of first electrode units 130B. For example, the second group of second electrode units 140B may be disposed on the other side of the second group of first electrode units 140B. The second group of second electrode units 140B may overlap the second semiconductor element in the vertical direction. The second electrode portions 140B of the second group may be connected to the first semiconductor element.

[0172] Correspondingly, the first protruding electrodes 135 may include a first group of first protruding electrodes arranged on the first group of first electrode portions 130A and a second group of first protruding electrodes arranged on the second group of first electrode portions 130B.

[0173] In addition, the second protruding electrodes 145 may include a first group of second protruding electrodes arranged on the first group of second electrode portions 140A and a second group of second protruding electrodes arranged on the second group of second electrode portions 140B.

[0174] A conductive adhesive member 260 may be disposed on the first group of first protruding electrodes, the second group of first protruding electrodes, the first group of second protruding electrodes, and the second group of second protruding electrodes.

[0175] 6 and 7, the connecting member 200 may be an organic bridge. The connecting member 200 may include an organic insulating layer. For example, the connecting member 200 may include a plurality of organic insulating layers.

[0176] The connecting member 200 may include a first insulating layer 201, a second insulating layer 202, and a third insulating layer 203.

[0177] The first insulating layer 201, the second insulating layer 202, and the third insulating layer 203 may include different insulating materials. However, embodiments are not limited thereto. For example, the first insulating layer 201 may include an organic material. The first insulating layer 201 may include, but is not limited to, a different material from the second insulating layer 202.

[0178] The first insulating layer 201 may have properties that enable the formation of the electrode layer 206 of the connecting member 200, including a fine electrode pattern. For example, the first insulating layer 201 may include an insulating material that is easy to process and has elasticity. For example, the first insulating layer 201 of the connecting member 200 may include polyimide (PI). In this regard, the conventional connecting member has been an inorganic bridge, such as a silicon bridge. Silicon has a thermal expansion coefficient that is significantly different from that of the first insulating layer 111 of the circuit board, which can cause cracks due to thermal stress. In addition, an organic bridge can reduce process costs or material costs compared to a silicon bridge, thereby advantageously reducing the overall price of the product.

[0179] In contrast, the first insulating layer 201 of the connecting member 200 of the embodiment may include an organic material having a thermal expansion coefficient similar to that of the first insulating layer 111 of the circuit board. Thus, the embodiment may minimize stress applied to the connecting member 200. Furthermore, the embodiment may solve problems such as cracks occurring in the connecting member 200 or peeling off of the connecting member 200 from the circuit board. Thus, the embodiment may improve the mechanical reliability and electrical reliability of the semiconductor package.

[0180] In addition, in the embodiment, the first insulating layer 201 of the connecting member 200 is made of polyimide, which is cheaper than silicon, so that the cost of the connecting member 200 can be reduced.

[0181] The connecting member 200 may also be provided with narrow via electrodes. The alignment between the via electrodes provided on different layers can significantly affect the operational characteristics of the connecting member 200, the operational characteristics of the semiconductor package, and the operational characteristics of electronic products, servers, etc. to which the semiconductor package is applied. In this case, the polyimide may have transparency. As a result, the embodiment can improve the alignment between the via electrodes arranged on different layers. This can further improve the operational characteristics of the connecting member 200, the operational characteristics of the semiconductor package, and the operational characteristics of electronic products, servers, etc. to which the semiconductor package is applied.

[0182] Furthermore, the first insulating layer 201 may refer to an insulating layer disposed inside the connecting member 200. The overall characteristics of the connecting member 200 may be determined by the characteristics of the first insulating layer 201. The first insulating layer 201 may have a thermal expansion coefficient similar to that of the insulating layer of the circuit board and may have elasticity. As a result, the first insulating layer 201 of the connecting member 200 may flow together with the circuit board when the circuit board is thermally deformed. As a result, the embodiment may solve the problem of cracks in the connecting member 200 that may occur due to thermal deformation of the circuit board.

[0183] In addition, in the embodiment, the first insulating layer 201 of the connecting member 200 includes polyimide (PI), thereby making it possible to easily adjust the thickness of the connecting member 200. Through this, the embodiment can minimize the difference between the depth of the cavity C, which is a receiving space for the connecting member 200 formed on the circuit board, and the thickness of the connecting member 200. As a result, the embodiment can minimize the height difference between the first electrode unit 130 and the second electrode unit 140 and / or the height difference between the first protruding electrode 135 and the second protruding electrode 145. Through this, the embodiment can stably bond a semiconductor device onto the first protruding electrode 135 and the second protruding electrode 145.

[0184] The connecting member 200 may include a second insulating layer 202 disposed on the first insulating layer 201. The second insulating layer 202 may include, but is not limited to, a different insulating material from the first insulating layer 201. For example, the second insulating layer 202 may include polyimide, which is the same insulating material as the first insulating layer 201. For example, the first insulating layer 201 may include the same insulating material as the insulating material of the second insulating layer 202 described below, instead of polyimide.

[0185] The second insulating layer 202 may include a photosensitive material. For example, the second insulating layer 202 may include a PID. For example, the second insulating layer 202 may be a PID in which the photosensitive material is a resin layer and a filler is dispersed in the resin layer.

[0186] In another embodiment, the second insulating layer 202 may include the same insulating material as the first insulating layer 111 of the circuit board. For example, the second insulating layer 202 may include ABF, which is the same insulating material as the first insulating layer 111 of the circuit board. Meanwhile, the second insulating layer 202 may be disposed on both sides of the first insulating layer 201.

[0187] The connecting member 200 may also include a third insulating layer 203 disposed on the second insulating layer 202. The third insulating layer 203 may be a protective layer. For example, the third insulating layer 203 may be a solder resist layer.

[0188] In this case, the side of the connecting member 200 may have a step. For example, the first insulating layer 201, the second insulating layer 202, and the third insulating layer 203 of the connecting member 200 may have a step.

[0189] For example, the horizontal width of the first insulating layer 201 of the connecting member 200 may be different from the horizontal width of the second insulating layer 202 and the horizontal width of the third insulating layer 203. Preferably, the horizontal width of the first insulating layer 201 of the connecting member 200 may be greater than the horizontal width of the second insulating layer 202 and the horizontal width of the third insulating layer 203.

[0190] That is, among the insulating layers of the connecting member 200, the first insulating layer 201 may have the highest elasticity and / or rigidity compared to the second insulating layer 202 and the third insulating layer 203. Therefore, in this embodiment, the width of the first insulating layer 201 of the connecting member 200 is made the largest so that an impact applied to the connecting member 200 can be absorbed by the first insulating layer 201, and thus, the impact can be prevented from being transmitted to the second insulating layer 202 and / or the third insulating layer 203.

[0191] In addition, the horizontal width of the second insulating layer 202 of the connecting member 200 may be different from the horizontal width of the third insulating layer 203. The horizontal width of the second insulating layer 202 may be greater than the horizontal width of the third insulating layer 203. In this case, the third insulating layer 203 may be a solder resist, which may easily crack due to external impact. In addition, the manufacturing process of the connecting member 200 may include a sawing process. The sawing process may be a process of separating a plurality of connecting members into individual pieces. In this case, if an impact is applied to the third insulating layer 203 during the sawing process, there is a problem that cracks may occur in the third insulating layer 203. Therefore, in this embodiment, the width of the third insulating layer 203 is smaller than the widths of the first insulating layer 201 and the second insulating layer 202, so that the third insulating layer 203 can be protected from the impact.

[0192] Specifically, the horizontal distance W1 from the side edge of the first insulating layer 201 of the connecting member 200 to the side edge of the third insulating layer 203 may be in the range of 50 μm to 70 μm. If the horizontal distance W1 from the side edge of the first insulating layer 201 of the connecting member 200 to the side edge of the third insulating layer 203 is less than 50 μm, the third insulating layer 203 may be subjected to an impact during the sawing process, which may cause cracks in the third insulating layer 203. If the horizontal distance W1 from the side edge of the first insulating layer 201 of the connecting member 200 to the side edge of the third insulating layer 203 exceeds 70 μm, the circuit layers included in the connecting member 200 may not be stably protected, or an area of ​​the connecting member 200 where no circuit layers are disposed may increase, which may result in a decrease in circuit integration density.

[0193] Thus, the side surfaces of the first insulating layer 201, the second insulating layer 202, and the third insulating layer 203 of the connecting member 200 may have a step relative to each other, so that the step of the side surface of the connecting member 200 can come into contact with the insulating layer of the circuit board, thereby increasing the contact area.

[0194] In this case, the third insulating layer 203 of the connecting member 200 may be attached on the insulating member 180. In this case, the insulating member 180 may have a width different from the horizontal width of the connecting member 200. For example, the width of the insulating member 180 may be greater than the width of the insulating member 180 of the connecting member 200. This may further improve the adhesive strength between the connecting member 200 and the insulating member 180, and may also improve the adhesive strength with the insulating layer of the circuit board.

[0195] Meanwhile, a circuit pattern may be provided on the connecting member 200. The circuit pattern 206 may include a connecting pattern 204 and a through pattern 205. The connecting pattern 204 and the through pattern 205 may correspond to a connecting electrode and a through electrode of a circuit board, respectively.

[0196] The connecting patterns 204 and the through patterns 205 of the circuit pattern 206 may have different sizes from the connecting electrodes and the through electrodes of the circuit board, respectively. For example, the connecting patterns 204 and the through patterns 205 of the circuit pattern 206 of the connecting member 200 may be finer than the connecting electrodes and the through electrodes of the circuit board.

[0197] The connecting pattern 204 and the through pattern 205 of the circuit pattern 206 may each include a plurality of metal layers, which may include a first metal layer and a second metal layer.

[0198] The first metal layer may be a metal layer formed by sputtering. The first metal layer may be a seed layer. The first metal layer may have a single-layer structure, or alternatively, may have a two-layer structure.

[0199] When the first metal layer has a single-layer structure, the first metal layer may include only a first layer containing at least one of nickel (Ni) and chromium (Cr). When the first metal layer has a two-layer structure, the first metal layer may further include a second layer containing copper (Cu) on the first layer. Hereinafter, the first metal layer will be described as including a first layer and a second layer. However, the present invention is not limited to this.

[0200] The first layer of the first metal layer may include at least one of nickel (Ni) and chromium (Cr) formed through a sputtering process, and the second layer of the first metal layer may be formed by sputtering a metal including copper (Cu) on the first layer of the first metal layer.

[0201] The first layer of the first metal layer may have a thickness of 0.01 μm to 0.15 μm. For example, the first layer of the first metal layer may have a thickness of 0.03 μm to 0.14 μm. For example, the first layer of the first metal layer may have a thickness of 0.05 μm to 0.12 μm. If the first layer of the first metal layer has a thickness smaller than 0.01 μm, the first metal layer may not function as a seed layer. Furthermore, if the first layer of the first metal layer has a thickness smaller than 0.01 μm, the adhesion between the first metal layer and the second metal layer may not be ensured.

[0202] Furthermore, if the thickness of the first layer of the first metal layer is greater than 0.15 μm, the line width and spacing of the connecting pattern 204 of the connecting member 200 can be increased. For example, if the thickness of the first layer of the first metal layer is greater than 0.15 μm, it may be difficult to ultra-fine the connecting pattern 204 of the connecting member 200.

[0203] The second layer of the first metal layer may have a thickness of 0.1 μm to 0.35 μm. For example, the second layer of the first metal layer may have a thickness of 0.12 μm to 0.34 μm. For example, the second layer of the first metal layer may have a thickness of 0.15 μm to 0.33 μm.

[0204] Meanwhile, the total thickness of the first metal layer, including the first and second layers, may be 0.5 μm or less. Preferably, the total thickness of the first metal layer, including the first and second layers, may be 0.4 μm or less. More preferably, the total thickness of the first metal layer, including the first and second layers, may be 0.3 μm or less. If the total thickness of the first metal layer, including the first and second layers, exceeds 0.5 μm, it may be difficult to miniaturize the connecting member 200. Specifically, the process of forming the connecting pattern 204 of the connecting member 200 includes a seed layer removal process of removing the first metal layer. In this case, as the thickness of the first metal layer increases, the amount of etching in the seed layer process increases, which may make it difficult to miniaturize the connecting pattern 204 of the connecting member 200.

[0205] In this embodiment, the first metal layer is formed by a sputtering process, which may allow the connection pattern 204 to be miniaturized.

[0206] The second metal layer may be an electroplated layer formed by electroplating using the first metal layer as a seed layer. The second metal layer may have a thickness in the range of 2 μm to 12 μm. The second metal layer may have a thickness in the range of 3 μm to 11 μm. The second metal layer may have a thickness in the range of 4 μm to 10 μm.

[0207] If the thickness of the second metal layer is less than 2 μm, the second metal layer may be etched together during the etching process of the seed layer, making it difficult to properly realize the connection pattern 204. If the thickness of the second metal layer is more than 12 μm, it may be difficult to miniaturize the connection pattern 204 of the connection member 200.

[0208] The thickness of the connecting pattern 204 of the connecting member 200 may be in the range of 3 μm to 13 μm. The thickness of the connecting pattern 204 of the connecting member 200 having the layer structure may be in the range of 4 μm to 12 μm. The thickness of the connecting pattern 204 of the connecting member 200 may be in the range of 5 μm to 11 μm. If the thickness of the connecting pattern 204 of the connecting member 200 is less than 5 μm, the resistance of the connecting pattern 204 may increase, and the electrical signal characteristics for communication with the first and second semiconductor devices may deteriorate. If the thickness of the connecting pattern 204 of the connecting member 200 exceeds 11 μm, it may be difficult to realize the fine pattern required for the connecting member 200.

[0209] Therefore, the connect pattern 204 may be an ultra-fine pattern. For example, the connect pattern 204 may have a line width of 5 μm or less. For example, the connect pattern 204 may have a line width of 3 μm or less. For example, the connect pattern 204 may have a line width of 2 μm or less. The connect pattern 204 may have a spacing of 5 μm or less. The spacing may refer to the separation distance between traces of the connect pattern 204 arranged on the same layer. For example, the connect pattern 204 may have a spacing of 3 μm or less. For example, the connect pattern 204 may have a spacing of 2 μm or less.

[0210] Preferably, the connecting pattern 204 may have a line width of 1 μm to 5 μm. The connecting pattern 204 may have a line width in the range of 1.2 μm to 3 μm. The connecting pattern 204 may have a line width in the range of 1.5 μm to 2 μm. If the line width of the connecting pattern 204 is smaller than 1 μm, the resistance of the connecting pattern 204 increases, which may make it difficult to properly communicate with the processor chip. If the line width of the connecting pattern 204 is larger than 5 μm, it may be difficult to realize the connecting member 200 for connecting multiple processor chips within a limited space. For example, if the line width of the connecting pattern 204 is larger than 6 μm, it may be difficult to arrange all circuit patterns within a limited space.

[0211] Meanwhile, referring to FIG. 8, the first insulating layer 111 of the circuit board may include a first region 112R1, a second region 112R2, and a third region 112R3 in the thickness direction.

[0212] The fifth electrode unit 170 may be disposed on the first region 112R1 of the first insulating layer 111. The second region 112R2 of the first insulating layer 111 may refer to a region that horizontally overlaps with the connecting member 200. The second region 112R2 of the first insulating layer 111 may include a cavity C. The third region 112R3 of the first insulating layer 111 refers to a region that horizontally overlaps with the first electrode unit 130 and the second electrode unit 140.

[0213] The first electrode unit 130 may be disposed on a pad 210 of the connecting member 200. The second electrode unit 140 may be disposed on a connecting electrode 143 spaced apart from the pad 210 of the connecting member 200 in the horizontal direction.

[0214] The second region 112R2 and the third region 112R3 of the first insulating layer 111 may include different materials, and in this case, the interface between the cavity C of the second region 112R2 and the third region 112R3 may be distinct.

[0215] The second region 112R2 and the third region 112R3 of the first insulating layer 111 may include the same material. In this case, the interface between the cavity C of the second region 112R2 and the third region 112R3 may not be distinct.

[0216] In this case, the pads 210 of the connecting member 200 may be manufactured together with the connecting member 200 when the connecting member 200 is manufactured. Also, the connecting electrodes 143 may be manufactured through a process separate from the pads 210 of the connecting member 200. Therefore, the pads 210 of the connecting member 200 and the connecting electrodes 143 may have different vertical thicknesses.

[0217] The thickness of the cavity C may be different from the thickness of the connecting member 200. Thus, a height difference H1 may exist between the upper surface of the second region 112R2 of the first insulating layer 111 and the connecting member 200.

[0218] For example, the thickness of the cavity C may be smaller than the thickness of the connecting member 200. Thus, the top surface of the second region 112R2 of the first insulating layer 111 may be positioned lower than the top surface of the connecting member 200 by a height difference H1.

[0219] Therefore, the top surface of the first insulating layer 111 may have a step.

[0220] For example, the top surface of the first insulating layer 111 may include a first top surface 110T1 that vertically overlaps the connecting member 200. In addition, the top surface of the first insulating layer 111 may include a second top surface 110T2 that does not vertically overlap the connecting member 200. The first top surface 110T1 and the second top surface 110T2 of the first insulating layer 111 may have a step. For example, the first top surface 110T1 of the first insulating layer 111 may be positioned higher than the second top surface 110T2. For example, the first insulating layer 111 may include a convex portion corresponding to the first top surface 110T1.

[0221] Meanwhile, a first electrode unit 130 and a second electrode unit 140 may be disposed on the first insulating layer 111. An upper surface 130T of the first electrode unit 130 and an upper surface 140T of the second electrode unit 140 may have different heights. For example, a step H2 may be formed between the upper surface 130T of the first electrode unit 130 and the upper surface 140T of the second electrode unit 140. For example, the upper surface 130T of the first electrode unit 130 may be positioned higher than the upper surface 140T of the second electrode unit 140 by the step H2.

[0222] In addition, the upper surface of the second insulating layer 112 of the circuit board may also have a step.

[0223] For example, the upper surface of the second insulating layer 112 may include a first upper surface 112T1 that vertically overlaps the connecting member 200. In addition, the upper surface of the second insulating layer 112 may include a second upper surface 112T2 that does not vertically overlap the connecting member 200. The first upper surface 112T1 and the second upper surface 112T2 of the second insulating layer 112 may have a step. For example, the first upper surface 112T1 of the second insulating layer 112 may be positioned higher than the second upper surface 112T2. For example, the second insulating layer 112 may include a convex portion corresponding to the first upper surface 112T1.

[0224] In addition, the upper surfaces of the first protruding electrode 135 and the second protruding electrode 145 may have different heights. For example, the upper surface 135T of the first protruding electrode 135 and the upper surface 145T of the second protruding electrode 145 may have a step. For example, the upper surface 135T of the first protruding electrode 135 may be positioned higher than the upper surface 145T of the second protruding electrode 145.

[0225] Therefore, since the first protruding electrode 135 and the second protruding electrode 145 have a step, the positions of the first and second semiconductor devices can be recognized, thereby enabling more accurate mounting of the first and second semiconductor devices. Furthermore, in the embodiment, the volumes of the conductive connecting members, such as solder, disposed on the first protruding electrode 135 and the second protruding electrode 145 can be adjusted to be different from each other. Therefore, in the embodiment, the protruding electrode on which the conductive connecting member requiring a larger volume is disposed can be positioned lower than the other protruding electrodes. This can be achieved by adjusting the difference in thickness between the cavity C and the connecting member 200. Through this, the embodiment can more stably bond the semiconductor device to the circuit board. Therefore, the embodiment can smoothly operate the semiconductor device and further improve the operational characteristics of electronic products and / or servers to which the semiconductor package is applied.

[0226] Meanwhile, referring to FIG. 9, there may be a plurality of interfaces between the first insulating layer 111 of the circuit board and the connecting member 200. As shown in FIG.

[0227] For example, the interfaces may include a first interface IS1 between the first insulating layer 111 of the circuit board and the first insulating layer 201 of the connecting member 200. The interfaces may include a second interface IS2 between the first insulating layer 111 of the circuit board and the second insulating layer 202 of the connecting member 200. The interfaces may include a third interface IS3 between the first insulating layer 111 of the circuit board and the third insulating layer 201 of the connecting member 200. The first to third interfaces IS1, IS2, and IS3 may not be aligned vertically and may have steps.

[0228] Meanwhile, the second insulating layer 202 of the connection member 200 may include the same insulating material as the first insulating layer 111 of the circuit board. In this case, it may be difficult to distinguish the second interface IS2.

[0229] In this case, the filler 202F included in the second insulating layer 202 of the connection member 200 may have different properties from the filler 111F included in the first insulating layer 111 of the circuit board.

[0230] For example, the electrode portion disposed on the first insulating layer 111 may not require a finer pattern than the electrode portion disposed on the connecting member 200. Therefore, the filler 111F included in the first insulating layer 111 may have a relatively large diameter to ensure the rigidity of the circuit board. For example, the filler 111F included in the first insulating layer 111 may have a diameter in the range of 1 μm to 5 μm.

[0231] In contrast, the second insulating layer 202 of the connecting member 200 should enable the formation of fine electrodes through a sputtering process. Therefore, the filler 202F included in the second insulating layer 202 of the connecting member 200 may have a relatively small diameter. For example, the filler 202F included in the second insulating layer 202 of the connecting member 200 may have a diameter ranging from 0.2 μm to 0.9 μm. Therefore, in this embodiment, even if the second insulating layer 202 of the connecting member 200 includes the same insulating material as the first insulating layer 111 of the circuit board, the interface therebetween can be distinguished by the diameter of the filler.

[0232] Meanwhile, referring to FIG. 10, each of the first protruding electrode 135 and the second protruding electrode 145 may include a plurality of metal layers.

[0233] For example, the first protruding electrode 135 may include a first metal layer 135-1 disposed on the first electrode unit 130. The first protruding electrode 135 may also include a second metal layer 135-2 disposed on the first metal layer 135-1. In this case, the first metal layer 135-1 and the second metal layer 135-2 may include different metal materials.

[0234] Preferably, the first metal layer 135-1 may include nickel. The second metal layer 135-2 may include copper. The first metal layer 135-1 may improve the bonding strength between the second metal layer 135-2 and the first electrode unit 130. For example, if the second metal layer 135-2 is disposed directly on the first electrode unit 130, oxidation of the first electrode unit 130 may occur, which may weaken the bonding strength between the first electrode unit 130 and the second metal layer 135-2. Therefore, the first metal layer 135-1 may improve the bonding strength between the second metal layer 135-2 and the first electrode unit 130 while preventing oxidation of the first electrode unit 130. Furthermore, the first metal layer 135-1 may prevent the first protruding electrode 135 from peeling off from the first electrode unit 130 due to contraction and expansion of the second insulating layer 112 caused by thermal stress.

[0235] Specifically, when the first metal layer 135-1 contains nickel, the adhesion between the first electrode unit 130 and the second metal layer 135-2 can be improved. Furthermore, when electrical connection with the first electrode unit 130 is later established using a material such as solder, the solder may diffuse into the first electrode unit 130 to form an inter-metallic compound, which can have poor mechanical and electrical reliability. In particular, when the second metal layer 135-2 is made of copper, the problem of the formation of an inter-metallic compound may be exacerbated. However, when nickel is disposed, the diffusion of solder can be prevented, preventing the formation of an inter-metallic compound, thereby improving the electrical and mechanical reliability of the semiconductor package.

[0236] In this case, the first electrode unit 130 may include a clevis 130C. For example, the upper surface of the first electrode unit 130 may include a clevis 130C that vertically overlaps the first protruding electrode 135 and is recessed toward the lower surface of the first electrode unit 130. The clevis 130C may be filled with the first metal layer 135-1 of the first protruding electrode 135. This may increase the contact area between the first electrode unit 130 and the first protruding electrode 135, thereby further improving the bonding force.

[0237] The second protruding electrode 145 may also include a first metal layer 145-1 and a second metal layer 145-2. The first metal layer 145-1 of the second protruding electrode 145 may be disposed on the second electrode unit 140. The second metal layer 145-2 of the second protruding electrode 145 may be disposed on the first metal layer 145-1. A clevis 140C may be provided on an upper surface of the second electrode unit 140, and the first metal layer 145-1 of the second protruding electrode 145 may be provided to fill the clevis 140C of the second electrode unit 140.

[0238] 11, the thickness of the cavity C may be different from the thickness of the connecting member 200. Thus, there may be a height difference H1 between the top surface of the second region 112R2 of the first insulating layer 111 and the connecting member 200.

[0239] For example, the thickness of the cavity C may be greater than the thickness of the connecting member 200. Thus, the top surface of the second region 112R2 of the first insulating layer 111 may be positioned higher than the top surface of the connecting member 200 by a height difference H1.

[0240] Therefore, the top surface of the first insulating layer 111 may have a step.

[0241] For example, the top surface of the first insulating layer 111 may include a first top surface 110T1 that vertically overlaps the connecting member 200. In addition, the top surface of the first insulating layer 111 may include a second top surface 110T2 that does not vertically overlap the connecting member 200. The first top surface 110T1 and the second top surface 110T2 of the first insulating layer 111 may have a step. For example, the first top surface 110T1 of the first insulating layer 111 may be positioned lower than the second top surface 110T2. For example, the first insulating layer 111 may include a concave portion corresponding to the first top surface 110T1.

[0242] Meanwhile, a first electrode unit 130 and a second electrode unit 140 may be disposed on the first insulating layer 111. An upper surface 130T of the first electrode unit 130 and an upper surface 140T of the second electrode unit 140 may have different heights. For example, a step H2 may be formed between the upper surface 130T of the first electrode unit 130 and the upper surface 140T of the second electrode unit 140. For example, the upper surface 130T of the first electrode unit 130 may be positioned lower than the upper surface 140T of the second electrode unit 140 by the step H2.

[0243] In addition, the upper surface of the second insulating layer 112 of the circuit board may also have a step.

[0244] For example, the upper surface of the second insulating layer 112 may include a first upper surface 112T1 that vertically overlaps the connecting member 200. In addition, the upper surface of the second insulating layer 112 may include a second upper surface 112T2 that does not vertically overlap the connecting member 200. The first upper surface 112T1 and the second upper surface 112T2 of the second insulating layer 112 may have a step. For example, the first upper surface 112T1 of the second insulating layer 112 may be positioned lower than the second upper surface 112T2. For example, the second insulating layer 112 may include a concave portion corresponding to the first upper surface 112T1.

[0245] In addition, the upper surfaces of the first protruding electrode 135 and the second protruding electrode 145 may have different heights. For example, the upper surface 135T of the first protruding electrode 135 and the upper surface 145T of the second protruding electrode 145 may have a step. For example, the upper surface 135T of the first protruding electrode 135 may be positioned lower than the upper surface 145T of the second protruding electrode 145.

[0246] 12, the thickness of the cavity C may be the same as the thickness of the connecting member 200. Thus, the top surface of the second region 112R2 of the first insulating layer 111 and the connecting member 200 may be positioned on the same plane.

[0247] Therefore, the upper surface of the first insulating layer 111 may be flat overall.

[0248] Meanwhile, a first electrode unit 130 and a second electrode unit 140 may be disposed on the first insulating layer 111. An upper surface 130T of the first electrode unit 130 and an upper surface 140T of the second electrode unit 140 may also have the same height. For example, the upper surface 130T of the first electrode unit 130 and the upper surface 140T of the second electrode unit 140 may be located on the same plane.

[0249] The upper surface of the second insulating layer 112 of the circuit board may also be entirely flat.

[0250] In addition, the top surfaces of the first protruding electrode 135 and the second protruding electrode 145 may have the same height.

[0251] Meanwhile, when a semiconductor package having the above-described inventive features is used in IT devices or home appliances such as smartphones, server computers, and TVs, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the features of the present invention functions as a semiconductor package, it can safely protect a semiconductor chip from external moisture and contaminants, and can solve problems such as leakage current, electrical shorts between terminals, and electrical open circuits in terminals supplying power to the semiconductor chip. Furthermore, when it functions as a signal transmission device, it can solve noise problems. As a result, a circuit board having the above-described inventive features can maintain stable functionality in IT devices and home appliances, and the entire product and the circuit board to which the present invention is applied can achieve functional integration or technical interrelationship with each other.

[0252] When a circuit board having the above-described features of the present invention is used in a transportation device such as a vehicle, it can solve the problem of distortion of signals transmitted to the transportation device, safely protect the semiconductor chip that controls the transportation device from the outside, and solve the problems of leakage current, electrical short circuits between terminals, and electrical open circuits of terminals supplying power to the semiconductor chip, thereby further improving the stability of the transportation device. Therefore, the transportation device and the circuit board to which the present invention is applied can be functionally integrated or technically linked with each other.

[0253] The features, structures, effects, etc. described in the above embodiments are included in at least one embodiment and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by a person skilled in the art to which the embodiment belongs. Therefore, content related to such combinations and modifications should be interpreted as being included in the scope of the embodiments.

[0254] The above description focuses on the embodiments, but these are merely illustrative and do not limit the embodiments. Those skilled in the art will understand that various modifications and applications not exemplified above are possible within the scope of the essential characteristics of the embodiments. For example, each component specifically illustrated in the embodiments can be modified and implemented. Differences related to such modifications and applications should be construed as being included within the scope of the embodiments defined in the appended claims.

Claims

1. A build-up insulating layer; a connecting member embedded in the build-up insulating layer; an insulating member disposed on one surface of the connecting member, The connecting member is a first insulating layer; a second insulating layer disposed on the first insulating layer; the first insulating layer, the second insulating layer, and the insulating member contain different insulating materials; A circuit board, wherein the side surface of the first insulating layer, the side surface of the second insulating layer, and the side surface of the insulating member have steps.

2. the connecting member further includes a third insulating layer disposed on the second insulating layer; the third insulating layer includes an insulating material different from at least one of the first and second insulating layers; The circuit board according to claim 1 , wherein a side surface of the third insulating layer has a step with a side surface of the first insulating layer, a side surface of the second insulating layer, and a side surface of the insulating member.

3. The circuit board according to claim 1 , wherein the horizontal width of the first insulating layer of the connecting member is greater than the horizontal width of the second insulating layer.

4. The horizontal width of the insulating member is The circuit board according to claim 3 , wherein the width of the first insulating layer and the width of the second insulating layer are greater than the horizontal width of each of the first insulating layer and the second insulating layer.

5. The circuit board according to claim 1 , wherein the first insulating layer of the connecting member includes polyimide.

6. The circuit board according to claim 1 , wherein the second insulating layer of the connecting member includes a resin layer containing a filler.

7. The circuit board according to claim 6 , wherein the build-up insulating layer includes an insulating material different from that of the second insulating layer of the connecting member.

8. the build-up insulating layer includes the same insulating material as the second insulating layer of the connecting member; The diameter of the filler provided in the build-up insulating layer is The circuit board according to claim 6 , wherein the diameter of the filler provided in the second insulating layer of the connecting member is different from the diameter of the filler provided in the second insulating layer.

9. The diameter of the filler provided in the build-up insulating layer is The circuit board according to claim 8 , wherein the diameter of the connecting member is larger than the diameter of the filler provided in the second insulating layer.

10. 5. The circuit board according to claim 1, wherein the horizontal distance from the outermost end to the innermost end of the connecting member is in the range of 50 μm to 70 μm.

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