Impedance control of localized regions of the substrate during plasma deposition in large PECVD chambers.

Abstract

Embodiments of the present disclosure generally relate to a method and apparatus for measuring and controlling local impedance in a substrate support in a plasma processing chamber during substrate processing. The substrate support includes a plurality of substrate support pins, and the radio frequency voltage, current, and phase of each of the plurality of substrate support pins are measured and the impedance of the support pins is adjusted in real time. Each of the substrate support pins is coupled to an associated adjustable impedance circuit that can be remotely controlled. In one embodiment, a variable capacitor is used to adjust the impedance of the impedance circuit coupled to the associated substrate support pin, which can be remotely adjusted by a stepper motor. In another embodiment, a microcontroller can control the impedance adjustment for all of the plurality of substrate support pins, which can be used to track their impedances relative to each other and to the bulk impedance of the plasma processing chamber.

Description

[Technical Field]

[0001] Embodiments of the present disclosure generally relate to an apparatus for depositing a film on a substrate, and more particularly to an apparatus for promoting uniform thickness of a film deposited on a substrate during plasma deposition in a large plasma enhanced chemical vapor deposition (PECVD) chamber. [Background technology]

[0002] Plasma-enhanced chemical vapor deposition (PECVD) is a process that can deposit films on substrates. Deposition of a variety of materials can be performed on large-area substrates. For plasma deposition and etching and other plasma-based processes, process uniformity and repeatability within a chamber, between chambers, and between processing systems are parameters that control semiconductor device yield and semiconductor device performance tolerances so that the formed semiconductor devices can function as designed.

[0003] For many years, electronic devices such as thin-film transistors (TFTs), flat-panel displays, photovoltaic (PV) devices, solar cells, and other electronic devices have been fabricated on thin, flexible media. Substrates can be made of silicon, glass, polymers, or other materials suitable for forming electronic devices. Substrates are typically processed in a tool having multiple chambers, such as a cluster tool, and the substrate is transferred in and out of various chambers that perform different processing operations to form electronic devices on the substrate. To facilitate the transfer of the substrate in and out of the chambers, substrate support pins are adapted to extend through the upper surface (top) of the substrate support when the substrate support is lowered. For example, when the substrate support is lowered, the substrate remains in a stationary position supported by the substrate support pins, with the bottom of the substrate vertically spaced apart from the top of the substrate support.

[0004] This spacing between the substrate and the substrate support allows a transfer mechanism, such as a robot blade or end effector, to move between the bottom surface of the substrate and the top surface of the substrate support, allowing the substrate to be moved without damaging the substrate support or the substrate. When the substrate support is raised, the tops of the substrate support pins are substantially flush with the top of the substrate support, thereby positioning the substrate in contact with the top of the substrate support. The substrate support pins remain below the substrate during processing of the substrate in the plasma chamber.

[0005] However, the regions of the substrate where the substrate support pins are located experience less than optimal deposition compared to other regions of the substrate that are not overlying the substrate support pins. For example, the film thickness in the regions of the substrate that correspond to the locations of the substrate support pins may be less than other regions of the substrate that are not overlying the substrate support pins. Less than optimal deposition in the regions of the substrate that correspond to the locations of the substrate support pins can cause problems in the final display product, one main problem being "uneven effect" or "cloudiness" in portions of the final display product, typically portions that correspond to the locations of the substrate support pins.

[0006] Therefore, what is needed is an apparatus and method that prevents or minimizes non-uniform deposition on at least the regions of the substrate related to the location of the substrate support pins. Summary of the Invention

[0007] An embodiment of the present disclosure includes a plasma processing system including a substrate support disposed within a processing volume of the plasma processing system, the substrate support comprising a body having a plurality of openings formed between a substrate support surface and a backside opposite the substrate support surface. The plasma processing system further includes a substrate support leg attached to the backside of the substrate support. An actuator is attached to the substrate support leg and adapted to raise and lower the substrate support leg together with the attached substrate support. The plasma processing system further includes a plurality of substrate support pins disposed within the plurality of openings in the substrate support and a plurality of adjustable impedance circuits in electrical communication with associated ones of the plurality of substrate support pins. When the substrate support is in the raised position, tops of the plurality of substrate support pins are flush with or recessed below the substrate support surface. When the substrate support is in the lowered position, the substrate support pins extend above the substrate support surface.

[0008] An embodiment of the present disclosure includes a plasma processing system including a plasma processing chamber, at least one plasma-generating radio frequency (RF) coil in an upper portion of the plasma processing chamber, an RF power source, an RF impedance matching network coupled between the RF power source and the at least one plasma-generating RF coil, a frequency detector, and a first RF voltage and current detector electrically coupled between the RF impedance matching network and the at least one plasma-generating RF coil. The plasma processing system further includes a substrate support disposed below the at least one plasma-generating RF coil in the plasma processing chamber, the substrate support comprising a body having a plurality of openings formed between a substrate support surface and a backside opposite the substrate support surface. A substrate support leg is attached to the backside of the substrate support. An actuator is attached to the substrate support leg and adapted to raise and lower the substrate support leg together with the attached substrate support. The plasma processing system further includes a plurality of substrate support pins disposed in the plurality of openings of the substrate support and a plurality of adjustable impedance circuits in electrical communication with associated ones of the plurality of substrate support pins. A second RF voltage and RF current detector is electrically coupled to each of the plurality of adjustable impedance circuits to detect the RF voltage and RF current thereof. When the substrate support is in the raised position, the tops of the plurality of substrate support pins are flush with or recessed below the substrate support surface of the substrate support. When the substrate support is in the lowered position, the substrate support pins extend above the surface of the substrate support.

[0009]

[0006] Embodiments of the present disclosure include a method for improving plasma processing of a substrate, the method including an act of positioning a substrate support disposed within a processing volume of a plasma processing chamber, the substrate support including a body having a plurality of openings formed between a substrate support surface and a backside opposite the substrate support surface. The method further includes an act of positioning a plurality of substrate support pins within the plurality of openings of the substrate support, the tops of the plurality of substrate support pins being aligned flush with or recessed below the substrate support surface of the substrate support. The method further includes an act of positioning a substrate to be processed on the surface of the substrate support and the tops of the plurality of substrate support pins. The method further includes an act of adjusting impedances of a plurality of tunable impedance circuits during substrate processing, the tunable impedance circuits being in electrical communication with associated ones of the plurality of substrate support pins.

[0010] In order that the above-mentioned features of the present disclosure may be understood in detail, the present disclosure, briefly summarized above, will now be more particularly described by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings illustrate only exemplary embodiments and are therefore not to be construed as limiting the scope, as the present disclosure may admit of other equally effective embodiments. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a schematic cross-sectional front view of a plasma processing system with a substrate support in a first position, according to one embodiment. [Figure 2] 2 is a schematic cross-sectional front view of a plasma processing system with a substrate support in a second position, according to one embodiment. [Figure 3] FIG. 2 is a top view of a substrate support and substrate support pins therein according to one embodiment. [Figure 4] FIG. 2 is a schematic block diagram of a circuit for controlling RF impedance in a localized region of a substrate, according to one embodiment. [Figure 5] FIG. 1 is a schematic isometric view of an RF voltage and current detector according to one embodiment. [Figures 6A-6B] 6A-6C are schematic plan and isometric views of the Rogowski coil RF current detector shown in FIG. 5, according to one embodiment. [Figure 7A-7C] FIG. 1 is a schematic plan view of an RF voltage and current sensor fabricated on a printed circuit board, according to one embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] To facilitate understanding of the embodiments disclosed herein, where possible, like reference numerals have been used to refer to like elements common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

[0013] Described herein are methods and apparatus that incorporate impedance control of localized areas of large substrates (flat panel displays) during plasma processing using an array of radio frequency (RF) voltage, current, and phase detectors and an adjustable impedance network (e.g., motor-driven vacuum capacitors) in a large PECVD chamber.

[0014] Embodiments of the present disclosure include apparatus and methods for preventing or substantially minimizing non-uniform deposition in regions of a substrate overlapping substrate support pins. Due to electromagnetic discontinuities that appear locally across a region of a large substrate, the quality of the deposited film, including but not limited to thickness, refractive index (RI), and / or wet etch rate, can exhibit local variations or degradation in film thickness. However, when substrate support pins are used as a medium to affect the local RF impedance, such variations in film properties can be substantially reduced to the ambient background, facilitating improved deposition process yields and / or flat panel utilization for end users.

[0015] Embodiments of the present disclosure determine the RF voltage, current, and phase (impedance) at each location on a substrate support pin and control that impedance via a tunable impedance circuit coupled to the associated substrate support pin. Each impedance network can comprise series-connected lumped circuit elements, such as inductors and capacitors, or a combination of multiple elements. An exemplary embodiment of such a series-connected lumped inductor and capacitor circuit can be a variable capacitor and / or inductor that provides a change in the impedance of the RF circuit, including the support pin itself. In one embodiment, where a variable capacitor is used to control the impedance, a stepper motor drive mechanism can be used to precisely control the variable capacitor so that the RF impedance at a particular substrate support pin can be operated in any one of an inductive, capacitive, series, or parallel resonant impedance condition, or a combination thereof. In one embodiment, a method is taught for controlling and / or tracking the impedance at each substrate support pin in real time during the deposition process, such that the localized impedances measured by the voltage, current, and phase detectors appear to be significantly similar, or otherwise dissimilar but follow a specific spatial distribution pattern, resulting in significantly similar local film properties (e.g., thickness) compared to those seen on a bulk film deposition.

[0016] The present disclosure also teaches how the local impedance of each substrate support pin tracks each other and further tracks the impedance (bulk impedance) of the output of a matching network coupled to the plasma chamber RF coil. The matching network provides an impedance match of the plasma chamber's wideband impedance to the RF generator's impedance (50 ohms), thereby enabling maximum RF power delivery to the bulk plasma within the processing chamber.

[0017] It is further recognized that the method of optimizing the local impedance for a particular process film chemistry based on data obtained from each of the local arrays of voltage, current, and phase detectors can include a variety of dielectric films, including, but not limited to, silicon nitride, silicon oxide, silicon oxynitride, TEOS-based films, or other dielectric or non-dielectric, semiconductor, or metal-containing films in single or multi-layer film stacks used in semiconductor device, flat panel display, and solar panel device applications for improved film quality uniformity across the substrate area. It is contemplated and within the scope of the present disclosure that the local impedance may be significantly closer to or essentially the same as the global impedance of the chamber, or that these impedances may be different but follow a predetermined relationship to the global chamber impedance. Such a desired impedance relationship may be a linear relationship in one example, or a nonlinear relationship in another example.

[0018] Embodiments of the present disclosure include a plasma enhanced chemical vapor deposition (PECVD) processing chamber operable to form one or more layers or films on a substrate. The plasma processing chamber disclosed herein can be adapted to deliver activated precursor gas species generated in a plasma. The plasma can be generated by inductively coupling energy to a gas under vacuum. It should be understood that the embodiments discussed herein can also be implemented in other chambers capable of providing high-density plasma.

[0019] Referring to FIG. 1 , a schematic cross-sectional front view of a plasma processing system with a substrate support in a first position is shown, according to one embodiment. The plasma processing system 10 may include a plasma processing chamber 100, a gas source 104, a radio frequency (RF) power supply 108, an impedance matching network 106, an RF coil 120, a substrate support 122 attached to support legs 116 to form a substrate support assembly 118, and an actuator 114. The plasma processing chamber 100 includes a chamber lid 102, a chamber base 112 disposed opposite the chamber lid 102, and a sidewall 110. The substrate support 122 is disposed between the chamber lid 102 and the chamber base 112. The chamber lid 102 is disposed at the top of the plasma processing chamber 100, and the substrate support 122 is disposed within the plasma processing chamber 100.

[0020] An exemplary substrate 130 is shown on a substrate support 122 within the plasma processing chamber 100. The substrate support 122 is adapted to hold the substrate 130 during processing of the substrate 130. The support legs 116 are coupled to an actuator 114 adapted to move the substrate support assembly 118 vertically (in the Z direction) within the plasma processing chamber 100. The substrate support assembly 118 is shown in FIG. 1 in a first processing position. However, the substrate assembly 118 can be lowered in the Z direction to a second position, as shown in FIG. 2, thereby facilitating removal of the substrate 130 without damaging the substrate 130. For purposes of clarity, not all elements of the plasma processing system 10 are shown.

[0021] A process gas source 104 is coupled into the processing chamber 100 and provides a process gas that is converted into plasma by radio frequency energy transmitted from a plasma-generating inductively coupled RF coil 120. The inductively coupled RF coil 120 can be a single RF coil 120 or at least two inductively coupled RF coils 120 coupled in series, hereafter referred to as inductively coupled RF coils 120. Each of the inductively coupled RF coils 120 can be coupled to an RF power source 108 and a ground 136 through an RF impedance match network 106. While FIGS. 1 and 2 show each of the inductively coupled RF coils 120 connected in series to the RF power source 108 and the ground 136, parallel connections are also contemplated and within the scope of the present disclosure, such that each inductively coupled RF coil 120 can be independently connected to and controlled by the RF power source 108 and the ground 136. In some embodiments, the RF ground 136 can be connected through a capacitor (not shown). The RF power supply 108 can include an impedance matching network 106 adapted to match the output impedance (eg, 50 ohms) of the RF power supply 108 to the chamber operating process impedance electrical characteristics for maximum RF power transfer.

[0022] RF voltage and current detectors (sensors) represented by VI-0...VI-5 can be used to determine RF parameters useful for plasma processing. Additionally, a frequency detector 140 can be utilized in combination with the detected voltage, current, and phase values ​​in determining circuit node impedance. As shown in FIGS. 1 and 2, RF voltage and current detectors VI-0...VI-5 and frequency detector 140 can be used to determine RF power and complex impedances for RF power source 108, RF impedance matching network 106, and multiple substrate support pins 128a-d in real time. Substrate support pins 128 can be made from, for example, but not limited to, aluminum with a ceramic (alumina) sleeve.

[0023] The lead or delay time between the RF voltage V(t) waveform and the RF current I(t) waveform determines the phase angle, expressed in degrees θ. RF power P(t) is the product of voltage and current, or P(t) = V(t) * I(t), and the detected root-mean-square (RMS) value of each is P = V * I * cosθ, where θ is the phase angle between the voltage and current waveforms. Using Ohm's Law, Z(t) = V(t) / I(t), or Z can be expressed as Z = R + jX, where R = Z cosθ and jX = Z sinθ. jX = jωL - j / ωC, where ω = 2πf, f is frequency, C is in farads, and L is in henries. R is resistance in ohms, and jX is reactance in ohms, where +jX is inductive reactance and -jX is capacitive reactance. Power is frequency independent, while impedance is frequency dependent.

[0024] Referring to Figure 3, a top view of a substrate support and substrate support pins therein is shown, according to one embodiment. A plurality of openings are sized and positioned through the front and back of the body of the substrate support 122 to allow a plurality of substrate support pins 128 to pass through the body of the substrate support 122. Referring again to Figure 1, when the substrate support 122 is raised to the first position, the top surfaces of the substrate support pins 128 are flush with or below the top surface (face) of the substrate support 122. This allows the bottom of the substrate 130 to contact the top surface (face) of the substrate support 122.

[0025] Substrates 130 are typically processed in a tool having multiple chambers, e.g., 100, such as a cluster tool (not shown), and the substrate 130 is transferred in and out of the various chambers 100, which perform different processing operations to form electronic devices on the substrate 130. To facilitate the transfer of the substrate 130 in and out of the chamber 100, the substrate support pins 128 remain stationary as the substrate support assembly 118 is lowered in the Z direction, thereby extending through the upper surface of the substrate support 122. The substrate support pins 128 may be movably held inside roller bushing assemblies (not shown) of the substrate support 122. The roller bushing assemblies allow the CGT pins to move up and down relative to the chamber base 112 and substrate support 122 during wafer processing, but remain stationary when the substrate support assembly 118 reaches its lowest Z position. At this point, the ends of the substrate support pins 128 contact the bottom plate of the chamber base 112.

[0026] Thus, the bottom of the substrate 130 rests on the top surfaces (faces) of the substrate support pins 128, spacing the bottom surface of the substrate 130 from the top surface of the substrate support 122 ( FIG. 2 ). This spacing allows a transfer mechanism, such as a robot blade or end effector (not shown), to move between the bottom of the substrate 130 and the top surface of the substrate support 122 and then lift the substrate 130 off the substrate support pins 128 without damaging the substrate support 122 or the substrate 130. When the substrate support 122 is raised ( FIG. 1 ), the substrate support pins 128 realign with the substrate support 122, re-forming a substantially planar surface and bringing the substrate 130 into contact with the top surface of the substrate support 122 for processing.

[0027] Each of the substrate support pins 128 can be coupled to an adjustable impedance 134. The adjustable impedance 134 can be, for example, but not limited to, a series-connected inductor 144 and capacitor 146, as shown in FIGS. 1 and 2. This impedance can be remotely varied (adjusted) by, for example, but not limited to, a stepper motor 132 controlled by a microcontroller 410 (FIG. 4). A variable capacitor 146, such as a vacuum variable capacitor for high-power operation, and / or a variable inductor for the inductor 144 can be controlled by the stepper motor 132. Optionally, a position sensor 142 can be coupled to the stepper motor 132 or variable capacitor drive mechanism to determine the setting or position of the variable capacitor 146, so that the capacitance value of the capacitor 146 can be determined and / or preset to a desired capacitance.

[0028] Each tunable impedance circuit 134 can be independently adjusted and controlled to provide improved deposition or etch results for the plasma process in the associated region of the substrate support pin 128. These local impedance adjustments can be static or dynamic during the plasma process. For example, if the bulk impedance changes during the plasma process, the local impedance of the substrate support pin 128 can be similarly changed by the associated tunable impedance circuit 134.

[0029] Referring to FIG. 4, a schematic block diagram of a circuit for controlling RF impedance of a localized region of a substrate is shown, according to one embodiment. The computation and control system for impedance control includes a microcontroller 410, memory (volatile and / or nonvolatile) 416, a communication interface 420, input signal conditioning 414, and a stepper motor driver and position sensor 412. In addition, the microcontroller 410 may have digital signal processing (DSP) and fast Fourier transform (FFT) capabilities within an internal core processor or an external DSP / FFT processor 418. Voltage V(t) and current I(t) and frequency (f) data from the RF voltage and current detector VI and frequency detector 140, respectively, may be input to the microcontroller 410 in real time. The microcontroller 410 can then determine and control the individual impedance at each location of the substrate support pins 128.

[0030] The microcontroller 410 may further provide input signal conditioning 414 and general purpose input / output (GPIO) ports for coupling to stepper motor drivers and position sensors 412. The microcontroller 410 may also be adapted for communication with a process controller 422 via a communication interface 420. The process controller 422 may further optimize the plasma process by controlling the impedance of each of the substrate support pins 128 in real time and other plasma process variables. The impedance information received by the process controller 422 may be used for machine learning to improve various plasma generation processes. Machine learning may further be utilized in artificial intelligence (AI) systems for plasma process optimization.

[0031] The communication interface 420 can be adapted for communication with protocols such as, for example, but not limited to, Ethernet for Control Automation Technology (EtherCAT) or (ECAT) compliance, as well as serial RS-232, Ethernet, WiFi, and Bluetooth communication with user interfaces, such as laptop computers and plasma chamber tools.

[0032] Referring to FIG. 5, a schematic isometric view of an RF voltage and current detector is shown, according to one embodiment. A Rogowski coil 500 for measuring alternating current (AC) or fast current pulses is shown. The Rogowski coil 500 may comprise a helically wound coil 502, with leads running from one end through the center of the coil 502 and back to the other end, so that both terminals are located at the same end 504 of the coil 502. This approach is sometimes referred to as a "reverse-wound Rogowski coil." The coil 502 surrounds a straight conductor 506 (the RF conductor from the RF power source 108 to the RF coil 120) whose current is to be measured. A voltage proportional to the rate of change of current (inductance) in the straight conductor 506 is induced in the coil 502, and the output of the Rogowski coil 500 is connected to an electronic integrator circuit 508 to provide an output signal proportional to the current in the conductor 506. It is contemplated and within the scope of this disclosure that coil 500 may be implemented in any shape, such as, but not limited to, square, circular, rectangular, or hexagonal, and may be fabricated on a printed circuit board. A voltage detection coil 510 may be used to detect RF voltage on conductor 506. Voltage detection coil 510 may use both capacitive and inductive coupling to conductor 506 and may have a high impedance when referenced to common or ground.

[0033] Referring to Figure 6, a schematic plan view and isometric view of the Rogowski coil RF current detector shown in Figure 5 are shown, according to one embodiment. Figure 6(a) shows a return loop 512 for the coil 502. Figure 6(b) shows an electrostatic shield 614 surrounding the coil 502. The return loop 512 and electrostatic shield 614 may be implemented with a printed circuit board.

[0034] 7, a schematic plan view of an RF voltage and current detector fabricated on a printed circuit board is shown, according to one embodiment. The RF voltage and current detector can be implemented on a printed circuit board (PCB) 726, for example, but not limited to, in a form factor that accommodates RF conductor 506. A rectangular plan view is shown in (a) and can be implemented on a multi-layer PCB 726, with top and bottom conductors 720 and 722, respectively, connected to vias 724, as shown in (b). The voltage detection coil 510 can also be fabricated on PCB 726.

[0035] FIG. 7(c) illustrates an exemplary implementation of the RF voltage and current detector in a multi-layer PCB and is considered a feature of the embodiments disclosed herein. The electrostatic shielding of the active sensor circuitry can be enclosed within a metal shielding layer implemented in the same or a different layer of the multi-layer PCB 726a. The PCB can have a shielding layer that occupies the entire respective layer or a portion of it if the shielding is sufficient to prevent any RF noise or harmonics at undesired frequencies from coupling to the active sensor circuitry. The active circuitry can be isolated from external influences, and thus an RF-shielded enclosure protects the active electronic circuitry associated with the RF voltage and current detector by means of ground vias that connect to the conductive shielding layer. Such ground vias can be sparsely patterned or sufficiently densely packed so that electromagnetic energy (not intended to be measured) from outside and inside the chamber is substantially prevented from affecting measurements by the RF voltage and current detector in the plasma processing chamber. The shielding layer (not shown) can be grounded to the chamber 100.

[0036] The methods, apparatus, and systems provided herein enable RF power processes for depositing films with uniform thickness over large substrate areas.

Claims

1. 1. A plasma processing system comprising: a substrate support disposed within a processing volume of the plasma processing system, the substrate support comprising a body having a plurality of openings formed between a substrate support surface and a backside opposite the substrate support surface; a plurality of substrate support pins disposed within the plurality of openings in the substrate support, wherein when the substrate support is in a raised position, tops of the plurality of substrate support pins are flush with or recessed below the substrate support surface and when the substrate support is in a lowered position, the substrate support pins extend above the substrate support surface; a plurality of tunable impedance circuits in electrical communication with associated ones of the plurality of substrate support pins; a radio frequency (RF) voltage and current detector electrically coupled to each of the plurality of tunable impedance circuits; A plasma processing system comprising:

2. a substrate support leg attached to the backside of the substrate support; an actuator attached to the substrate support leg and adapted to raise and lower the substrate support leg together with the attached substrate support; The plasma processing system of claim 1 , further comprising:

3. 3. The plasma processing system of claim 2, wherein a phase angle (.theta.) between each of the detected RF voltages and each of the detected RF currents is determined by a phase detector.

4. 2. The plasma processing system of claim 1, wherein each of the plurality of tunable impedance circuits comprises an inductor and a capacitor having an adjustable capacitance.

5. 10. The plasma processing system of claim 1, wherein the tuning of each of the plurality of tunable impedance circuits is remotely controlled.

6. the substrate support is adapted to support a substrate when in the raised position; the plurality of substrate support pins are adapted to support the substrate when the substrate support is in the lowered position; 10. The plasma processing system of claim 1.

7. the RF voltage and RF current detectors a voltage detection coil adapted to detect an RF voltage on the electrical conductor; a Rogowski coil adapted to detect RF current passing through the electrical conductor; 10. The plasma processing system of claim 1, wherein the voltage sensing coil and the Rogowski coil are fabricated on multiple layers of a printed circuit board (PCB).

8. 8. The plasma processing system of claim 7, further comprising an RF conductive shield on a particular layer of the PCB.

9. a plasma processing chamber; at least one plasma-generating radio frequency (RF) coil in an upper portion of the plasma processing chamber; an RF power source; an RF impedance matching network coupled between the RF power source and the at least one plasma generating RF coil; a frequency detector; a first RF voltage and RF current detector electrically coupled between the RF impedance match network and the at least one plasma generating RF coil; a substrate support disposed in the plasma processing chamber below the at least one plasma generating RF coil, the substrate support comprising a body having a plurality of openings formed between a substrate support surface and a backside opposite the substrate support surface; a plurality of substrate support pins disposed within the plurality of openings in the substrate support, wherein when the substrate support is in a raised position, tops of the plurality of substrate support pins are flush with or recessed below the substrate support surface and when the substrate support is in a lowered position, the substrate support pins extend above the substrate support surface; a plurality of tunable impedance circuits in electrical communication with associated ones of the plurality of substrate support pins; a second RF voltage and RF current detector electrically coupled to each of the plurality of adjustable impedance circuits for detecting the RF voltage and RF current therein; A plasma processing system comprising:

10. 10. The plasma processing system of claim 9, wherein each of the plurality of tunable impedance circuits comprises an inductor and a capacitor having an adjustable capacitance.

11. a monitoring and control system, said monitoring and control system comprising: a plurality of inputs coupled to the first RF voltage and RF current detector and the second RF voltage and RF current detector associated with each of the plurality of tunable impedance circuits; an input coupled to the frequency detector; a plurality of outputs adapted to control impedance adjustment of the plurality of adjustable impedance circuits; 10. The plasma processing system of claim 9, wherein:

12. said monitoring and control system comprising: determining a phase angle (θ) between each pair of the detected first and second RF voltages and RF currents; determining a first impedance at an output of the RF impedance matching network; determining a second impedance of each of the plurality of tunable impedance circuits; The plasma processing system of claim 11 , further comprising: a control unit configured to control impedance adjustments of the plurality of adjustable impedance circuits.

13. 13. The plasma processing system of claim 12, wherein the monitoring and control system adjusts the second impedance of the plurality of tunable impedance circuits to be proportional to the first impedance of the RF impedance matching network.

14. 13. The plasma processing system of claim 12, wherein the monitoring and control system remotely controls the tuning of each of the plurality of tunable impedance circuits.

15. The monitoring and control system comprises a microcontroller, the microcontroller comprising: Memory and Digital signal processing capable of performing complex mathematical calculations and Fourier transform (FFT) capabilities; a general purpose input / output (GPIO) adapted to couple to the plurality of inputs and the plurality of outputs; 12. The plasma processing system of claim 11, further comprising a communication interface for communicating with the master control system and a user interface.

16. 12. The plasma processing system of claim 11, wherein the communication interface is adapted to communicate with Ethernet for Control Automation Technology (EtherCAT).

17. 1. A method for improving plasma processing of a substrate, comprising: positioning a substrate support disposed within a processing volume of a plasma processing system, the substrate support including a body having a plurality of openings formed between a substrate support surface and a backside opposite the substrate support surface; positioning a plurality of substrate support pins within the plurality of openings of the substrate support, wherein tops of the plurality of substrate support pins are aligned flush with or recessed below the substrate support surface of the substrate support; positioning a substrate to be processed on the substrate support surface of the substrate support and on the tops of the plurality of substrate support pins; adjusting impedances of the plurality of tunable impedance circuits during substrate processing, the tunable impedance circuits being in electrical communication with associated ones of the plurality of substrate support pins; A method comprising:

18. The method of claim 17 , wherein adjusting the impedances of the plurality of tunable impedance circuits comprises adjusting the impedances to substantially the same impedance.

19. The method of claim 17 , wherein the act of adjusting the impedance of the plurality of tunable impedance circuits comprises adjusting the impedance to a different impedance.

20. 20. The method of claim 17, wherein the act of adjusting the impedance of the plurality of tunable impedance circuits comprises adjusting the impedance of the plurality of tunable impedance circuits in proportion to changes in bulk process chamber impedance during substrate processing.

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