Circuit board and semiconductor package including the same

Abstract

A circuit board according to an embodiment includes a first circuit layer, a first insulating layer disposed on the first circuit layer, a second insulating layer disposed on the first insulating layer, and a second circuit layer disposed on the second insulating layer, wherein at least one of the wiring density of the first circuit layer, the thickness of the first insulating layer, and the physical properties of the first insulating layer is different from at least one of the wiring density of the second circuit layer, the thickness of the second insulating layer, and the physical properties of the second insulating layer, and one of the first and second insulating layers is formed as a single layer, and the other of the first and second insulating layers includes a first layer having first physical properties and a second layer having second physical properties different from the first physical properties.

Description

[Technical Field]

[0001] The embodiments relate to a circuit board, and more particularly to a circuit board with improved warpage characteristics and a semiconductor package including the same. [Background technology]

[0002] A printed circuit board (PCB) functions to electrically connect and mechanically fix certain electronic components.

[0003] The circuit board includes an insulating layer such as a phenolic resin or epoxy resin and a circuit pattern disposed on the insulating layer.

[0004] Depending on the number of layers, circuit boards can be classified into single-sided circuit boards in which a wiring pattern is arranged on only one side of an insulating layer, double-sided circuit boards in which a wiring pattern is arranged on both sides of an insulating layer, and multilayer circuit boards in which a wiring pattern having a multilayer structure is arranged.

[0005] During the manufacturing process, circuit boards may warp during heat treatment. In particular, circuit boards are becoming thinner as electronic products become smaller and thinner. As circuit boards become thinner, the degree of warpage increases, which in turn increases the defect rate of circuit boards.

[0006] Warpage of a circuit board can occur when the upper and lower layers have asymmetric structures relative to the center of the circuit board in the thickness direction. Here, the asymmetric structure can refer to differences in the physical properties of the insulating layers between the upper and lower layers, differences in the thickness of the insulating layers, differences in the thickness of the circuit patterns, and differences in the wiring density of the circuit patterns. Physical properties can include the dielectric constant, thermal expansion coefficient, glass transition temperature, modulus, shrinkage rate, dielectric loss, etc.

[0007] Furthermore, when warpage occurs in a circuit board, the degree of interlayer matching during the manufacturing process of the circuit board decreases, which can result in a decrease in the mechanical reliability and / or electrical reliability of the circuit board. Summary of the Invention [Problem to be solved by the invention]

[0008] The embodiments provide a circuit board having an asymmetrical top-bottom structure and a semiconductor package including the same.

[0009] Further, the embodiment provides a circuit board in which a buffer layer is included in one of a corresponding upper insulating layer and a corresponding lower insulating layer, and a semiconductor package including the same.

[0010] Furthermore, the embodiments provide a circuit board with improved warpage characteristics and a semiconductor package including the same.

[0011] Furthermore, the embodiments provide a circuit board with improved mechanical reliability and / or electrical reliability, and a semiconductor package including the same.

[0012] The technical problems to be solved by the proposed embodiments are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by a person having ordinary skill in the art to which the embodiments pertain from the following description. [Means for solving the problem]

[0013] A circuit board according to an embodiment includes a first circuit layer, a first insulating layer disposed on the first circuit layer, a second insulating layer disposed on the first insulating layer, and a second circuit layer disposed on the second insulating layer, wherein at least one of the wiring density of the first circuit layer, the thickness of the first insulating layer, and the physical properties of the first insulating layer is different from at least one of the wiring density of the second circuit layer, the thickness of the second insulating layer, and the physical properties of the second insulating layer, and one of the first and second insulating layers is formed as a single layer, and the other of the first and second insulating layers includes a first layer having a first physical property and a second layer having a second physical property different from the first physical property.

[0014] In addition, the second layer of either the first insulating layer or the second insulating layer is disposed so as to be closer to the other one of the first insulating layer or the second insulating layer than the first layer.

[0015] Furthermore, the wiring density of the first circuit layer is smaller than the wiring density of the second circuit layer, the first insulating layer has a multi-layer structure including the first layer and the second layer, and the second insulating layer has a single-layer structure.

[0016] Furthermore, the thickness of the first insulating layer is greater than the thickness of the second insulating layer, the first insulating layer has a multi-layer structure including the first layer and the second layer, and the second insulating layer has a single-layer structure.

[0017] Furthermore, the dielectric constant of the first insulating layer is greater than the dielectric constant of the second insulating layer, the first insulating layer has a multi-layer structure including the first layer and the second layer, and the second insulating layer has a single-layer structure.

[0018] In addition, the first physical property of the first layer of the first insulating layer includes a first glass transition temperature, and the second physical property of the second layer of the first insulating layer includes a second glass transition temperature lower than the first glass transition temperature.

[0019] The second glass transition temperature is in the range of 60% to 95% of the first glass transition temperature.

[0020] The first physical property of the first layer of the first insulating layer includes a first modulus, and the second physical property of the second layer of the first insulating layer includes a second modulus that is smaller than the first modulus.

[0021] The second modulus satisfies the range of 50% to 95% of the first modulus.

[0022] Furthermore, the first physical property of the first layer of the first insulating layer includes at least one of a first dielectric constant and a first thermal expansion coefficient, and the second physical property of the second layer of the first insulating layer includes at least one of a second dielectric constant corresponding to the first dielectric constant and a second thermal expansion coefficient corresponding to the first thermal expansion coefficient, and at least one of the first dielectric constant and the first thermal expansion coefficient satisfies a range of 93% to 107% of at least one of the second dielectric constant and the second thermal expansion coefficient.

[0023] The circuit board further includes a third insulating layer disposed between the first insulating layer and the second insulating layer, the thickness of the third insulating layer being greater than the thicknesses of the first and second insulating layers, and the third insulating layer being a core layer.

[0024] Moreover, the first layer of the first insulating layer, the second layer of the first insulating layer, and the second insulating layer each contain a resin, a glass fiber, and a filler.

[0025] The circuit board further includes a first through electrode that commonly penetrates the first layer of the first insulating layer and the second layer of the first insulating layer, and a third circuit layer disposed between the first insulating layer and the third insulating layer, wherein a lower surface of the first through electrode is connected to the first circuit layer and an upper surface of the first through electrode is connected to the third circuit layer.

[0026] The circuit board also includes a fourth insulating layer disposed below the first insulating layer, a fifth circuit layer disposed below the fourth insulating layer, a fifth insulating layer disposed on the third insulating layer, and a sixth circuit layer disposed on the fifth insulating layer, wherein at least one of the wiring density of the fifth circuit layer, the thickness of the fourth insulating layer, and the physical properties of the fourth insulating layer is different from at least one of the wiring density of the sixth circuit layer, the thickness of the fifth insulating layer, and the physical properties of the fifth insulating layer, and either one of the fifth insulating layer and the sixth insulating layer is composed of multiple layers having different physical properties from each other.

[0027] On the other hand, a semiconductor package according to an embodiment includes a first circuit layer, a first insulating layer disposed on the first circuit layer, a second insulating layer disposed on the first insulating layer, a second circuit layer disposed on the second insulating layer, a connection portion disposed on the second circuit layer, and a semiconductor element disposed on the connection portion, wherein at least one of the thickness and the dielectric constant of the first insulating layer is greater than at least one of the thickness and the dielectric constant of the second insulating layer, the first insulating layer includes a first layer having first physical properties and a second layer disposed on the first layer and having second physical properties different from the first physical properties, and at least one of the glass transition temperature and the modulus of the second layer is lower than at least one of the glass transition temperature and the modulus of the first layer.

[0028] The first insulating layer and the first circuit layer are antenna array layers that transmit transmission signals to the outside and receive reception signals from the outside, and the second insulating layer and the second circuit layer are driving layers that transmit the transmission signals to the antenna array layer and receive the reception signals from the antenna array layer and provide them to the semiconductor device. [Effects of the Invention]

[0029] The embodiment can prevent the circuit board from warping significantly in a specific direction, thereby improving the electrical reliability and / or physical reliability of the circuit board.

[0030] Specifically, the circuit board may include a lower layer including a first insulating layer and a first circuit layer, and an upper layer including a second insulating layer and a second circuit layer. The upper and lower layers may have different required characteristics. Therefore, the upper and lower layers may have any one of differences in the physical properties of the insulating layers, differences in the thickness of the insulating layers, and differences in the wiring density of the circuit layers. Therefore, in this embodiment, a buffer layer is included in either the first insulating layer or the second insulating layer depending on the warping direction of the circuit board due to the differences in the physical properties, thickness, and wiring density. For example, if both ends of the circuit board warp downward, the buffer layer is included in the first insulating layer. For example, if both ends of the circuit board warp upward, the buffer layer is included in the second insulating layer.

[0031] Accordingly, in the embodiment, a buffer layer may be provided in either the first insulating layer or the second insulating layer, thereby reducing warping of the circuit board in a specific direction. For example, the first insulating layer may include a first layer and a second layer corresponding to the buffer layer disposed on the first layer. The second layer of the first insulating layer has a lower modulus (Y's Modulus) and glass transition temperature (Tg) than the first and second insulating layers of the first insulating layer, and is disposed in the first lamination region, where stress begins in the circuit board manufacturing process. As a result, the embodiment can reduce stress formed in the initial lamination process and thereby serve to reduce additional stress generated during the subsequent lamination process.

[0032] In addition, the second layer of the first insulating layer has a relatively low glass transition temperature and modulus, which can increase the fluidity of the resin in the first insulating layer in the high temperature region of lamination. As a result, the embodiment can use the second layer of the first insulating layer to delay the onset of stress in the low temperature region, thereby reducing the stress acting on the circuit board at room temperature.

[0033] Therefore, in the embodiment, the first insulating layer may be composed of a first layer and a second layer having different moduli (Y's Modulus) and glass transition temperatures (Tg), and the first and second layers may have corresponding dielectric constants and thermal expansion coefficients. As a result, the embodiment may satisfy the required characteristics of the first insulating layer and prevent the circuit board from warping significantly in a specific direction. As a result, the embodiment may improve the physical and / or electrical reliability of the circuit board and enable stable operation of a semiconductor device mounted in a semiconductor package including the circuit board. As a result, the embodiment may improve the operational characteristics of electronic products and / or servers to which the semiconductor package is applied, thereby improving operational reliability.

[0034] In conclusion, the circuit board of the embodiment may have a buffer layer with a relatively low modulus (Y's Modulus) and glass transition temperature (Tg) disposed in either a lower layer disposed below the center of the circuit board or an upper layer disposed above the lower layer. The buffer layer can control warpage characteristics caused by asymmetry in physical properties and structure between the upper and lower layers. As a result, the embodiment can improve internal stress in the circuit board during the manufacturing process, thereby improving reliability against thermal deformation. [Brief explanation of the drawings]

[0035] [Figure 1] FIG. 1 is a diagram showing a circuit board according to a comparative example. [Figure 2] FIG. 2 is a cross-sectional view showing a circuit board according to an embodiment. [Figure 3] FIG. 3 is a diagram for explaining the warpage direction of the circuit board according to the conditions of the insulating layer and the circuit layer of the example. [Figure 4] FIG. 4 is a diagram for explaining the warpage direction of the circuit board according to the conditions of the insulating layer and the circuit layer of the example. [Figure 5]FIG. 5 is a diagram for explaining the warpage direction of the circuit board according to the conditions of the insulating layer and the circuit layer in the example. [Figure 6] FIG. 6 is a diagram for explaining the warpage direction of the circuit board according to the conditions of the insulating layer and the circuit layer of the example. [Figure 7] FIG. 7 is a diagram for explaining the position of the buffer layer according to the embodiment. [Figure 8] FIG. 8 is a cross-sectional view showing a circuit board according to the second embodiment. [Figure 9] FIG. 9 is a diagram showing a semiconductor package including the circuit board of FIG. DETAILED DESCRIPTION OF THE INVENTION

[0036] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0037] However, the technical concept of the present invention is not limited to the described embodiments, but can be embodied in various different forms, and one or more of the components of the embodiments can be selectively combined or substituted within the scope of the technical concept of the present invention.

[0038] Furthermore, unless otherwise clearly and specifically stated, terms (including technical and scientific terms) used in the embodiments of the present invention are to be interpreted as meanings that are commonly understood by a person of ordinary skill in the art to which the present invention belongs, and commonly used terms such as dictionary-defined terms may be interpreted in light of the contextual meaning of the relevant art. Furthermore, the terms used in the embodiments of the present invention are intended to explain the embodiments and are not intended to limit the present invention.

[0039] In this specification, the singular can include the plural unless otherwise specified in the phrase, and when it is stated that "A and at least one (or one or more) of B and C" it can include one or more of all possible combinations of A, B and C. Furthermore, in describing components of the embodiments of the present invention, terms such as first, second, A, B, (a), (b) etc. can be used.

[0040] Such terms are used only to distinguish a component from other components, and are not intended to limit the essence or order of the component.

[0041] Furthermore, when a component is described as being "coupled," "coupled," or "connected" to another component, it includes not only the case where the component is directly coupled, coupled, or connected to the other component, but also the case where the component is "coupled," "coupled," or "connected" to the other component by yet another component.

[0042] Furthermore, when it is stated that something is formed or disposed "above or below" a component, "above or below" includes not only the case where two components are in direct contact with each other, but also the case where one or more other components are formed or disposed between the two components. Furthermore, when it is expressed as "above or below," it can mean not only the upper direction but also the lower direction based on one component.

[0043] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0044] FIG. 1 is a diagram showing a circuit board according to a comparative example.

[0045] Referring to FIG. 1, the circuit board according to the comparative example includes a central layer 10, an upper layer 20, and a lower layer 30.

[0046] The central layer 10 refers to a layer disposed in the center of the laminated structure in the thickness direction of the circuit board, and is a core layer.

[0047] The upper layer 20 is disposed on the central layer 10. The upper layer 20 includes an upper insulating layer 21 disposed on the central layer 10. The upper layer 20 also includes a first circuit pattern layer 22 disposed between the upper insulating layer 21 and the central layer 10, and a second circuit pattern layer 23 disposed on the upper insulating layer 21. The upper layer 20 also includes an upper protective layer 24 disposed on the second circuit pattern layer 23.

[0048] The lower layer 30 is disposed below the central layer 10. The lower layer 30 includes a lower insulating layer 31 disposed below the central layer 10. The lower layer 30 also includes a third circuit pattern layer 32 disposed between the lower insulating layer 31 and the central layer 10, and a fourth circuit pattern layer 33 disposed below the lower insulating layer 31. The lower layer 30 also includes a lower protective layer 34 disposed below the fourth circuit pattern layer 33.

[0049] At this time, the upper layer 20 and the lower layer 30 have an asymmetric structure with respect to the central layer 10 .

[0050] Here, the asymmetric structure means that at least one of the thickness or physical properties of each layer of the upper layer 20 is different from at least one of the thickness or physical properties of each layer of the lower layer 30 .

[0051] Specifically, the upper insulating layer 21 and the lower insulating layer 31 have different physical properties. For example, at least one of the dielectric constant, thermal expansion coefficient, glass transition temperature, modulus, shrinkage rate, and dielectric loss of the upper insulating layer 21 may be different from the dielectric constant, thermal expansion coefficient, glass transition temperature, modulus, shrinkage rate, and dielectric loss of the lower insulating layer 31.

[0052] Additionally, the thickness of the upper insulating layer 21 may be different from the thickness of the lower insulating layer 31 .

[0053] Furthermore, the wiring density of the circuit pattern layers 22 and 23 of the upper layer 20 may be different from the wiring density of the circuit pattern layers 32 and 33 of the lower layer 30 .

[0054] Additionally, the thickness of the circuit pattern layers 22, 23 of the upper layer 20 may be different from the thickness of the circuit pattern layers 32, 33 of the lower layer 30.

[0055] The circuit board of the comparative example has a problem of large warpage in a specific direction due to the asymmetric structure of the upper layer 20 and the lower layer 30.

[0056] For example, if the dielectric constant of the upper insulating layer 21 is smaller than that of the lower insulating layer 31, the circuit board of the comparative example may warp downward at both side edges.

[0057] If warpage occurs in the circuit board, mechanical and / or electrical reliability may be affected during the manufacturing process of the circuit board.

[0058] For example, if a circuit board is significantly warped in a specific direction, it may become impossible to process circuit patterns or through holes at accurate positions, which may result in reduced mechanical and / or electrical reliability.

[0059] On the other hand, warping of the circuit board can be prevented by changing the material of each layer, changing the design of each circuit pattern layer, changing the thickness of the circuit pattern layer and insulating layer, or changing from a three-layer structure to a single-layer or multi-layer structure.

[0060] However, the design of a circuit board is determined based on the material, dimensional specifications of each layer, tolerances, etc., required to satisfy the characteristics required for the product to which the circuit board is applied. Therefore, the items that must be changed to improve warpage among various variables are relatively limited.

[0061] Furthermore, if the material of each layer, the design of each circuit pattern layer, the thickness of the circuit pattern layer and insulating layer, or the number of layers is changed, the characteristics required of the circuit board cannot be satisfied.

[0062] For example, when a circuit board is applied to an antenna board, the design, such as the material and numerical values ​​of each layer, is determined in consideration of the antenna characteristics. In this case, if the design is changed to prevent warpage, the required antenna characteristics may not be satisfied, which may result in a problem of the antenna not operating normally.

[0063] <Electronic Devices> Before describing the embodiments, a brief description will be given of an electronic device including a semiconductor package according to the embodiments. The electronic device includes a main board (not shown). The main board is physically and / or electrically connected to various components. For example, the main board is connected to the semiconductor package according to the embodiments. Various chips are mounted on the semiconductor package. Generally, the semiconductor package can include various elements or chips. The elements or chips can include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPUs), graphics processors (e.g., GPUs), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and application-specific integrated circuits (ASICs).

[0064] Additionally, the device or chip may include active and passive devices.

[0065] An active element refers to an element that actively utilizes the nonlinear portion of signal characteristics. A passive element refers to an element that does not utilize nonlinear signal characteristics even if both linear and nonlinear signal characteristics exist. For example, active elements include transistors and IC semiconductor elements, while passive elements include capacitors, resistors, and inductors. Passive elements can increase the signal processing speed of active semiconductor chips or perform filtering functions. The chip may also be a wireless communication chip that can be used for Wi-Fi or 5G communications.

[0066] On the other hand, the product group to which the semiconductor package of the embodiment is applied may be any one of CSP (Chip Scale Package), FC-CSP (Flip Chip-Chip Scale Package), FC-BGA (Flip Chip Ball Grid Array), POP (Package On Package) and SIP (System In Package), but is not limited to these.

[0067] In this case, the electronic device may be a smartphone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automobile, etc. However, the electronic device is not limited to these, and may of course be any other electronic device that processes data.

[0068] <Circuit board> FIG. 2 is a cross-sectional view showing a circuit board according to an embodiment.

[0069] 2, at least one semiconductor device can be attached to the circuit board 100. In addition, the circuit board 100 of the embodiment can be attached to a main board of an electronic device. The main board can refer to a motherboard of the electronic device.

[0070] The number of semiconductor elements mounted on the circuit board 100 may be one, or alternatively, may be two or more.

[0071] The circuit board 100 may include an insulating layer 110 .

[0072] The insulating layer 110 can have a multi-layer structure.

[0073] For example, the insulating layer 110 can include a first insulating layer 111 and a second insulating layer 112 disposed on the first insulating layer 110 .

[0074] In this case, the circuit board 100 of the embodiment may be a core substrate. For example, the insulating layer 110 may include a third insulating layer 113 disposed between the first insulating layer 111 and the second insulating layer 112. The third insulating layer 113 may be a core layer.

[0075] Therefore, the circuit board 100 of the embodiment can have a structure in which the first insulating layer 111 and the second insulating layer 112 are stacked on both sides of the third insulating layer 113 in the thickness direction.

[0076] In the following description, the circuit board 100 of the embodiment is a core board, and therefore the second insulating layer 112 is a core layer. However, the embodiment is not limited to this. For example, the circuit board 100 of the embodiment may be a coreless board that does not include a core layer.

[0077] The third insulating layer 113 may be a core layer, the first insulating layer 111 may be a lower insulating layer disposed below the third insulating layer 113, and the second insulating layer 112 may be an upper insulating layer disposed on the third insulating layer 113.

[0078] Each of the first insulating layer 111 and the second insulating layer 112 may have a different thickness than the third insulating layer 113. For example, the first insulating layer 111 and the second insulating layer 112 may have a smaller thickness than the third insulating layer 113.

[0079] The third insulating layer 113 may include a prepreg. For example, the third insulating layer 113 may increase the physical strength of the circuit board and improve the warpage characteristics of the circuit board. The third insulating layer 113 may have a structure in which a fiber layer in the form of a fabric sheet, such as a glass fabric woven with glass fiber yarn, is impregnated with epoxy resin. However, in the present embodiment, the third insulating layer 113 may also include a fiber layer in the form of a fabric sheet woven with carbon fiber yarn.

[0080] Specifically, the third insulating layer 113 may include a resin and reinforcing fibers disposed within the resin. The resin may be, but is not limited to, an epoxy resin. The resin is not particularly limited to epoxy resin, and may, for example, include one or more epoxy groups within the molecule, or alternatively, may include two or more epoxy groups, or alternatively, may include four or more epoxy groups. Furthermore, the resin constituting the insulating layer 110 may include a naphthalene group, and may be, for example, an aromatic amine type, but is not limited thereto. Examples of the resin include bisphenol A-type epoxy resins, bisphenol F-type epoxy resins, bisphenol S-type epoxy resins, phenol novolac-type epoxy resins, alkylphenol novolac-type epoxy resins, biphenyl-type epoxy resins, aralkyl-type epoxy resins, dicyclopentadiene-type epoxy resins, naphthalene-type epoxy resins, naphthol-type epoxy resins, epoxy resins that are condensates of phenols with aromatic aldehydes having a phenolic hydroxyl group, biphenylaralkyl-type epoxy resins, fluorene-type epoxy resins, xanthene-type epoxy resins, triglycidyl isocyanurate, rubber-modified epoxy resins, and phosphorous-based epoxy resins, and include naphthalene-based epoxy resins, bisphenol A-type epoxy resins, phenol novolac epoxy resins, cresol novolac epoxy resins, rubber-modified epoxy resins, and phosphorous-based epoxy resins. The reinforcing fibers may be glass fibers, carbon fibers, aramid fibers (e.g., aramid-based organic materials), nylon, silica-based inorganic materials, or titania-based inorganic materials. The reinforcing fibers may be arranged in a cross-sectional shape in the resin.

[0081] On the other hand, glass fiber, carbon fiber, aramid fiber (for example, aramid-based organic material), nylon, silica-based inorganic material, or titania-based inorganic material can be used.

[0082] The thickness of third insulating layer 113 may be 1.5 times or more, 2 times or more, 3 times or more, or 5 times or more the thickness of each of first insulating layer 111 and second insulating layer 112.

[0083] For example, the thickness of the third insulating layer 113 can be in the range of 100 μm to 600 μm. For example, the thickness of the third insulating layer 113 can be in the range of 120 μm to 550 μm. For example, the thickness of the third insulating layer 113 can be in the range of 150 μm to 500 μm.

[0084] If the thickness of the third insulating layer 113 is less than 100 μm, the warpage characteristics of the circuit board are reduced. Furthermore, as semiconductor packages become more sophisticated, the number of insulating layers in circuit boards is also increasing. For example, the number of insulating layers in a circuit board can be 10 or more, 12 or more, 16 or more, or even 20 or more. The greater the number of insulating layers in a circuit board, the more important it is to minimize warpage of the circuit board. If the thickness of the third insulating layer 113 is less than 100 μm, it is difficult to prevent warpage of the circuit board, resulting in reduced quality of the circuit board. For example, if the circuit board warps, it becomes difficult to accurately position the through electrodes included in the circuit board. Furthermore, if the circuit board warps, problems such as misalignment of semiconductor elements during the process of mounting the semiconductor elements on the circuit board may occur.

[0085] On the other hand, if the thickness of the third insulating layer 113 exceeds 600 μm, the overall thickness of the circuit board increases, which in turn increases the overall thickness of the semiconductor package. That is, if the thickness of the third insulating layer 113 exceeds 600 μm, it becomes difficult to slim down the circuit board and the semiconductor package.

[0086] The first insulating layer 111 and the second insulating layer 112 may have a thickness smaller than that of the third insulating layer 113 .

[0087] For example, each of the first insulating layer 111 and the third insulating layer 113 may have a thickness in the range of 30 μm to 120 μm. Preferably, each of the first insulating layer 111 and the second insulating layer 112 may have a thickness in the range of 35 μm to 115 μm. More preferably, each of the first insulating layer 111 and the second insulating layer 112 may have a thickness in the range of 40 μm to 110 μm.

[0088] If the thickness of the first insulating layer 111 or the second insulating layer 112 is less than 30 μm, the circuit layers included in the circuit board 100 will not be stably protected. If the thickness of the first insulating layer 111 or the second insulating layer 112 exceeds 120 μm, the thickness of the circuit board 100 will increase, thereby increasing the thickness of the semiconductor package. If the thickness of the first insulating layer 111 or the second insulating layer 112 exceeds 120 μm, the thickness of the circuit layer and the through-hole electrodes will also increase. Furthermore, if the thickness of the circuit layer and the through-hole electrodes increases, miniaturization becomes difficult, resulting in a decrease in circuit integration density, an increase in signal transmission distance, and an increase in signal transmission loss. If the thickness of the first insulating layer 111 or the second insulating layer 112 exceeds 120 μm, the first insulating layer 111 or the second insulating layer 112 of the circuit board will not be able to satisfy the required physical properties. The required physical properties may include at least one of the dielectric constant, dielectric loss, thermal expansion coefficient, and glass transition temperature required for the first insulating layer 111 or the second insulating layer 112.

[0089] The first insulating layer 111 and the second insulating layer 112 may have different thicknesses or may have the same thickness.

[0090] For example, the first insulating layer 111 may have a thickness greater than that of the second insulating layer 112. For example, the thickness of the first insulating layer 111 may be in the range of 105% to 150% of the thickness of the second insulating layer 112. For example, the thickness of the first insulating layer 111 may be in the range of 106% to 140% of the thickness of the second insulating layer 112. For example, the thickness of the first insulating layer 111 may be in the range of 108% to 135% of the thickness of the second insulating layer 112.

[0091] Preferably, the first insulating layer 111 may include a different insulating material from the second insulating layer 112. More preferably, the first insulating layer 111 may have a different number of layers from the second insulating layer 112.

[0092] For example, the first insulating layer 111 may have a multi-layer structure having different physical properties, such as a first layer 111-1 having a first physical property and a second layer 111-2 disposed on the first layer 111-1 and having a second physical property different from the first physical property.

[0093] That is, in the circuit board of the embodiment, the upper layer and the lower layer respectively disposed above and below the third insulating layer 113 may have an asymmetric structure. Here, having an asymmetric structure may mean that the physical properties of the first layer 111-1 of the first insulating layer 111 and the physical properties of the second insulating layer 112 are different from each other. Also, having an asymmetric structure may mean that the wiring densities of the circuit layer disposed below the first insulating layer 111 and the circuit layer disposed above the second insulating layer 112 are different from each other. Also, having an asymmetric structure may mean that the thickness that the first insulating layer 111 and the second insulating layer 112 should have are different from each other.

[0094] The first layer 111-1 and the second layer 111-2 of the first insulating layer 111 may have the same through via. Preferably, one through via may commonly penetrate the first layer 111-1 and the second layer 111-2 of the first insulating layer 111.

[0095] In this case, the first insulating layer of the circuit board of the comparative example includes only the first layer. In this case, when the first insulating layer of the circuit board of the comparative example includes only the first layer, the circuit board warps significantly in a specific direction due to the asymmetric structure of the upper and lower layers.

[0096] For example, if the first insulating layer includes only the first layer and the dielectric constant of the first insulating layer is higher than that of the second insulating layer, both ends of the circuit board will warp downward. Conversely, if the first insulating layer includes only the first layer and the dielectric constant of the first insulating layer of the first layer is lower than that of the second insulating layer, both ends of the circuit board will warp upward.

[0097] Furthermore, if the first insulating layer includes only the first layer and the thickness of the first insulating layer is greater than the thickness of the second insulating layer, both ends of the circuit board will warp downward. Conversely, if the first insulating layer includes only the first layer and the thickness of the first insulating layer is less than the thickness of the second insulating layer, both ends of the circuit board will warp upward.

[0098] Furthermore, if the first insulating layer includes only the first layer and the wiring density of the circuit layer disposed below the first insulating layer of the first layer is lower than the wiring density of the circuit layer disposed on the second insulating layer, both ends of the circuit board will warp downward. Conversely, if the first insulating layer includes only the first layer and the wiring density of the circuit layer disposed below the first insulating layer of the first layer is higher than the wiring density of the circuit layer disposed on the second insulating layer, both ends of the circuit board will warp upward.

[0099] Therefore, in this embodiment, a buffer layer capable of reducing the warpage of the circuit board is disposed on either the first insulating layer 111 or the second insulating layer 112 based on the direction in which the circuit board warps.

[0100] For example, both ends of the circuit board may warp downward. In this case, the first insulating layer 111 may include a first layer 111-1 and a second layer 111-2. In this case, the second layer 111-2 of the first insulating layer 111 is disposed between the first layer 111-1 and the third insulating layer 113. The second layer 111-2 of the first insulating layer 111 may have physical properties different from those of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111. As a result, the second layer 111-2 of the first insulating layer 111 may mitigate the downward warping of both ends of the circuit board, thereby minimizing the degree of warping of the circuit board.

[0101] Meanwhile, both ends of the circuit board are warped upward. In this case, the first insulating layer 111 may be provided as a single insulating layer having a particular physical property, and the second insulating layer 112 may be provided as two insulating layers having different physical properties. For example, when both ends of the circuit board are warped upward, the second insulating layer 112 may include a first layer and a second layer having different physical properties corresponding to the first insulating layer 111 of FIG. 2, and the first insulating layer 111 may have a single-layer structure having a single physical property.

[0102] In the following description, it is assumed that both ends of the circuit board are warped downward and that first insulating layer 111 is provided with a buffer layer for mitigating the warping of the circuit board.

[0103] The first insulating layer 111 may include a first layer 111-1 having a first physical property and a second layer 111-2 having a second physical property different from the first physical property.

[0104] The first layer 111-1 of the first insulating layer 111 may correspond to the physical properties that the first insulating layer 111 should have. For example, the first insulating layer 111 may have physical properties that correspond to the characteristics required for a semiconductor package and / or electronic product to which the circuit board is applied. In this case, the physical properties may include a dielectric constant, a dielectric loss, a modulus, a coefficient of thermal expansion, a glass transition temperature, etc. The first layer 111-1 of the first insulating layer 111 may have a dielectric constant, a dielectric loss, a modulus, a coefficient of thermal expansion, and a glass transition temperature that correspond to the physical properties that the first insulating layer 111 should have.

[0105] The second layer 111-2 of the first insulating layer 111 may have different physical properties from the first layer 111-1. Preferably, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 may be different from the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111. In addition, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 may be different from the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111.

[0106] Preferably, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 may be smaller than the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111.

[0107] The glass transition temperature (Tg) of second layer 111-2 of first insulating layer 111 may be lower than the glass transition temperature (Tg) of first layer 111-1 of first insulating layer 111.

[0108] Furthermore, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 may be lower than the modulus (Y's Modulus) of the second insulating layer 112. Furthermore, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 may be lower than the glass transition temperature (Tg) of the second insulating layer 112.

[0109] As a result, the second layer 111-2 of the first insulating layer 111 can function as a buffer layer that alleviates downward warping of both ends of the circuit board due to the asymmetric structure of the upper and lower layers. Therefore, the embodiment can minimize the degree of warping of the circuit board, thereby improving the electrical and / or physical reliability of the circuit board.

[0110] In this case, each of the first layer 111-1 and the second layer 111-2 of the first insulating layer 111 may be made of a prepreg containing resin, glass fiber, and filler.

[0111] In an embodiment, the type and / or content of at least one of the materials (resin, glass fiber, filler) provided in the second layer 111-2 of the first insulating layer 111 may be different from the type and / or content of at least one of the materials provided in the first layer 111-1, thereby allowing the second layer 111-2 of the first insulating layer 111 to have a lower modulus (Y's Modulus) and a lower glass transition temperature (Tg) than the first layer 111-1 of the first insulating layer 111.

[0112] For example, the resin provided in the second layer 111-2 of the first insulating layer 111 may be different from the resin provided in the first layer 111-1 of the first insulating layer 111. In this case, the modulus (Y's Modulus) and / or glass transition temperature (Tg) of the resin provided in the second layer 111-2 may be different from the modulus (Y's Modulus) and / or glass transition temperature (Tg) of the resin provided in the first layer 111-1.

[0113] For example, the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111 may be in the range of 220°C to 300°C. For example, the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111 may be in the range of 225°C to 295°C. For example, the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111 may be in the range of 230°C to 280°C. If the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 211 is outside the range of 220°C to 300°C, the required characteristics of the first insulating layer 211 will not be satisfied.

[0114] Meanwhile, the glass transition temperature (Tg) of the second insulating layer 112 may correspond to the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 211. For example, the glass transition temperature (Tg) of the second insulating layer 112 may range from 220°C to 300°C, or from 225°C to 295°C, or from 230°C to 290°C. Preferably, the glass transition temperature (Tg) of the second insulating layer 112 may be higher than the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 211, within the range.

[0115] On the other hand, the glass transition temperature (Tg) of second layer 113 of first insulating layer 111 may be lower than the glass transition temperature of first layer 111-1 of first insulating layer 111 and the glass transition temperature of second insulating layer 112.

[0116] For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 may be in the range of 160°C to 210°C. For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 may be in the range of 165°C to 205°C. For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 may be in the range of 170°C to 200°C.

[0117] For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can be in the range of 60% to 95% of the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111. For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can be in the range of 62% to 92% of the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111. For example, the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 can be in the range of 65% to 90% of the glass transition temperature (Tg) of the first layer 111-1 of the first insulating layer 111.

[0118] If the glass transition temperature (Tg) of the second layer 111-2 of the first insulating layer 111 is outside the range of 160°C to 210°C or outside the range of 60% to 95% of the glass transition temperature (Tg) of the first layer 111-1, the stress relaxation effect and stress reduction effect of the second layer 111-2 of the first insulating layer 111 will be insufficient, or the first insulating layer 111 will no longer be able to satisfy the required characteristics.

[0119] Specifically, the second layer 111-2 of the first insulating layer 111 can relieve or reduce stress that occurs during the manufacturing process of the circuit board.

[0120] For example, the second layer 111-2 of the first insulating layer 111 has a lower modulus (Y's Modulus) and glass transition temperature (Tg) than the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111, and the second layer 111-2 is disposed in the first lamination region where stress begins to build up in the circuit board. As a result, the embodiment can reduce stress formed in the initial lamination process, thereby alleviating additional stress generated during the subsequent lamination process.

[0121] In addition, the second layer 111-2 of the first insulating layer 111 has a relatively low glass transition temperature and modulus, which can increase the fluidity of the resin in the first insulating layer 111 in the high temperature region of lamination. As a result, the embodiment can delay the onset of stress in the low temperature region by using the second layer 111-2 of the first insulating layer 111, thereby reducing the stress acting on the circuit board at room temperature.

[0122] Meanwhile, the modulus (Y's Modulus) of each of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111 may be in the range of 18.5 Gpa to 25 Gpa. For example, the modulus (Y's Modulus) of each of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111 may be in the range of 19 Gpa to 23 Gpa. For example, the modulus (Y's Modulus) of each of the first layer 111-1 and the second insulating layer 112 of the first insulating layer 111 may be in the range of 19.5 Gpa to 22 Gpa.

[0123] If the modulus (Y's Modulus) of each of the first layer 111-1 of the first insulating layer 211 and the second insulating layer 112 is outside the range of 18.5 Gpa to 25 Gpa, the required characteristics of each of the first insulating layer 211 and the second insulating layer 112 cannot be satisfied.

[0124] The modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can be in the range of 13 Gpa to 18 Gpa. For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can be in the range of 13.5 Gpa to 18 Gpa. For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can be in the range of 15 Gpa to 18 Gpa.

[0125] For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can be in the range of 50% to 95% of the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111. For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can be in the range of 52% to 92% of the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111. For example, the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 can be in the range of 55% to 90% of the modulus (Y's Modulus) of the first layer 111-1 of the first insulating layer 111.

[0126] If the modulus (Y's Modulus) of the second layer 111-2 of the first insulating layer 111 is outside the range of 13 Gpa to 18 Gpa or outside the range of 50% to 95% of the modulus (Y's Modulus) of the first layer 111-1, the effect of the second layer 111-2 of the first insulating layer 111 in preventing warpage may be insufficient, or the second layer 111-2 may actually cause warpage in the opposite direction.

[0127] Meanwhile, the dielectric constant of the first layer 111-1 of the first insulating layer 111 and the dielectric constant of the second layer 111-2 of the first insulating layer 111 can correspond to each other. For example, the dielectric constant of the first layer 111-1 of the first insulating layer 111 can be in the range of 93% to 107% of the dielectric constant of the second layer 111-2 of the first insulating layer 111. For example, the dielectric constant of the first layer 111-1 of the first insulating layer 111 can be in the range of 94% to 106% of the dielectric constant of the second layer 111-2 of the first insulating layer 111. For example, the dielectric constant of the first layer 111-1 of the first insulating layer 111 can be in the range of 95% to 105% of the dielectric constant of the second layer 111-2 of the first insulating layer 111.

[0128] If the relationship between the dielectric constants of the first layer 111-1 and the second layer 111-2 of the first insulating layer 111 is out of range, the first insulating layer 111 including the first layer 111-1 and the second layer 111-2 will not be able to satisfy the required characteristics. For example, the circuit board of the embodiment can be used as an antenna substrate. Therefore, an antenna pattern may be disposed below the first insulating layer 111. In this case, if the relationship between the dielectric constants of the first layer 111-1 and the second layer 111-2 of the first insulating layer 111 is out of range, the antenna pattern will not be able to satisfy the target antenna frequency characteristics, which may result in degradation of antenna communication characteristics.

[0129] Furthermore, the thermal expansion coefficient of the first layer 111-1 of the first insulating layer 111 can correspond to the thermal expansion coefficient of the second layer 111-2. For example, the thermal expansion coefficient of the second layer 111-2 can satisfy the range of 93% to 107%, 94% to 106%, or 95% to 105% of the thermal expansion coefficient of the first layer 111-1.

[0130] This minimizes warpage or adhesion problems that may occur during the manufacturing process of the circuit board due to the first insulating layer 111 being composed of multiple layers including the first layer 111-1 and the second layer 111-2. For example, if there is a large difference in the thermal expansion coefficients of the first layer 111-1 and the second layer 111-2, the degree of warpage increases during the curing process of the first layer 111-1 and the second layer 111-2, which may result in a decrease in adhesion between the first layer 111-1 and the second layer 111-2.

[0131] Therefore, in the embodiment, the first insulating layer 111 is provided with a first layer 111-1 and a second layer 111-2 having different moduli (Y's Modulus) and glass transition temperatures (Tg), and the dielectric constants and thermal expansion coefficients of the first layer 111-1 and the second layer 111-2 correspond to each other. As a result, the embodiment satisfies the required characteristics of the first insulating layer 111 and prevents the circuit board from warping significantly in a specific direction. As a result, the embodiment may improve the physical and / or electrical reliability of the circuit board and enable stable operation of a semiconductor device mounted in a semiconductor package including the circuit board. As a result, the embodiment may improve the operational characteristics and thus the operational reliability of electronic products and / or servers to which the semiconductor package is applied. The location of the buffer layer (e.g., the second layer of the first insulating layer) and the thickness of the buffer layer according to the embodiment will be described in more detail below.

[0132] The exemplary circuit board 100 includes a circuit layer disposed on an insulating layer 110 .

[0133] For example, the circuit board 100 may include a first circuit layer 120 disposed on the lower surface of the first insulating layer 111. For example, the circuit board 100 of the embodiment may include a second circuit layer 130 disposed on the upper surface of the second insulating layer 112. The circuit board 100 of the embodiment may also include a third circuit layer 140 disposed between the first insulating layer 111 and the third insulating layer 113. The circuit board 100 of the embodiment may also include a fourth circuit layer 150 disposed between the second insulating layer 112 and the third insulating layer 113.

[0134] The first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 can be formed using conventional printed circuit board manufacturing processes such as additive process, subtractive process, MSAP (Modified Semi-Additive Process), and SAP (Semi-Additive Process), and detailed description thereof will be omitted here.

[0135] The first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be made of at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn). The first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be made of a paste or solder paste containing at least one metal material selected from gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn), which has excellent bonding strength. Preferably, the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may be made of copper (Cu), which is relatively inexpensive.

[0136] The first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may have a thickness in the range of 5 μm to 30 μm. For example, the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may have a thickness in the range of 6 μm to 27 μm. The first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 may have a thickness in the range of 7 μm to 23 μm. If the thickness of the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 is less than 5 μm, the resistance increases. If the thickness of the first circuit layer 120, the second circuit layer 130, the third circuit layer 140, and the fourth circuit layer 150 exceeds 30 μm, it becomes difficult to miniaturize the circuitry, resulting in a decrease in circuit integration density.

[0137] Meanwhile, the first circuit layer 120 and the second circuit layer 130 may have different wiring densities. Here, the wiring density may refer to the respective volumes of the first circuit layer 120 and the second circuit layer 130. For example, the wiring density may refer to the respective surface areas of the first circuit layer 120 and the second circuit layer 130. For example, the wiring density of the first circuit layer 120 may refer to the ratio of the surface area of ​​the lower surface of the first circuit layer 120 to the surface area of ​​the lower surface of the first insulating layer 111. For example, the wiring density of the second circuit layer 130 may refer to the ratio of the surface area of ​​the lower surface of the second circuit layer 130 to the surface area of ​​the upper surface of the second insulating layer 112.

[0138] In this case, the wiring density of the first circuit layer 120 may be lower than the wiring density of the second circuit layer 130. In this case, the difference between the wiring densities of the first circuit layer 120 and the second circuit layer 130 causes the circuit board to warp significantly in a specific direction. For example, if the wiring density of the first circuit layer 120 is lower than the wiring density of the second circuit layer 130, both ends of the circuit board will warp downward, assuming that the first insulating layer and the second insulating layer have the same thickness and physical properties. Therefore, if the wiring density of the first circuit layer 120 is lower than the wiring density of the second circuit layer 130, assuming that the first insulating layer and the second insulating layer have the same thickness and physical properties, the first insulating layer 111 adjacent to the first circuit layer 120 may be provided with a first layer 111-1 and a second layer 111-2 having different physical properties.

[0139] Furthermore, assuming that the thickness and physical properties of the first insulating layer and the second insulating layer are the same, if the wiring density of the first circuit layer 120 is greater than the wiring density of the second circuit layer 130, the first insulating layer may be formed of one layer having specific physical properties, and the second insulating layer may be formed of a first layer and a second layer having different physical properties.

[0140] However, the wiring density of the first circuit layer 120 and the wiring density of the second circuit layer 130 may be different from each other, and therefore the thickness and physical properties of the first insulating layer 111 may also be different from the thickness and physical properties of the second insulating layer 112. In this case, the embodiment may predict the warpage direction of the circuit board due to the difference in wiring density, thickness, and physical properties, and based on the predicted direction, one of the first insulating layer 111 and the second insulating layer 112 may be provided as a first layer and a second layer having different physical properties from each other.

[0141] The circuit board of the embodiment may include a through electrode.

[0142] Specifically, the through electrodes may penetrate the insulating layer 110. Preferably, the through electrodes include a first through electrode 160 that penetrates the first insulating layer 111. The through electrodes may also include a second through electrode 170 that penetrates the second insulating layer 112. The through electrodes may also include a third through electrode 180 that penetrates the third insulating layer 113.

[0143] The first through electrode 160, the second through electrode 170, and the third through electrode 180 are disposed in through holes that penetrate the respective insulating layers. For example, the first through electrode 160, the second through electrode 170, and the third through electrode 180 may be formed by filling the through holes with a conductive material.

[0144] The through holes can be formed by any one of mechanical, laser, and chemical processing methods. The through holes can be formed by mechanical processing methods such as milling, drilling, and routing. The through holes can also be formed using UV or CO2 laser methods. The first through holes can also be formed using chemical processing methods using chemicals including aminosilanes, ketones, etc.

[0145] After the through holes are formed, the insides of the through holes may be filled with any one metal material selected from copper (Cu), silver (Ag), tin (Sn), gold (Au), nickel (Ni), and palladium (Pd) to form the first through electrode 160, the second through electrode 170, and the third through electrode 180. At this time, the conductive material may be filled by any one or a combination of electroless plating, electrolytic plating, screen printing, sputtering, evaporation, inkjet printing, and dispensing.

[0146] Meanwhile, the first through-electrode 160 may include a first part provided in the first layer 111-1 of the first insulating layer 111 and a second part provided in the second layer 111-2 of the first insulating layer 111. The first and second parts of the first through-electrode 160 may be directly connected to each other without any other structure such as a pad therebetween. For example, a through-hole may commonly penetrate the first layer 111-1 and the second layer 111-2 of the first insulating layer 111, so that the first and second parts of the first through-electrode 160 may be provided within a single commonly penetrated through-hole.

[0147] The circuit board 100 of the embodiment includes a protective layer.

[0148] Specifically, a first protective layer 190 is disposed on the lower surface of the first insulating layer 111. The first protective layer 190 may include at least one opening. Specifically, the first protective layer 190 may include at least one opening that vertically overlaps the first circuit layer 120.

[0149] The circuit board may also include a second protective layer 195 disposed on the upper surface of the second insulating layer 112. The second protective layer 195 may include at least one opening. Specifically, the second protective layer 190 may include at least one opening that vertically overlaps the second circuit layer 130.

[0150] The first protective layer 190 and the second protective layer 195 may include an insulating material and may include various materials that are applied and then cured by heating to protect the surfaces of the insulating layer and the circuit layer.

[0151] The first protective layer 190 and the second protective layer 195 may be solder resist layers containing an organic polymer material. For example, the first protective layer 190 and the second protective layer 195 may include an epoxy acrylate resin. More specifically, the first protective layer 190 and the second protective layer 195 may include a resin, a hardener, a photoinitiator, a pigment, a solvent, a filler, an additive, an acrylic monomer, etc. However, the embodiment is not limited thereto, and the first protective layer 190 and the second protective layer 195 may be any one of a photo solder resist layer, a coverlay, and a polymer material.

[0152] The thickness of the first protective layer 190 and the second protective layer 195 may be 1 μm to 20 μm. The thickness of the first protective layer 190 and the second protective layer 195 may be 1 μm to 15 μm. For example, the thickness of the first protective layer 190 and the second protective layer 195 may be 5 μm to 20 μm. If the thickness of the first protective layer 190 and the second protective layer 195 exceeds 20 μm, the overall thickness of the circuit board and the semiconductor package increases. Meanwhile, although the circuit board is illustrated as including the first protective layer 190 and the second protective layer 195, this is not limiting. For example, at least one of the first protective layer 190 and the second protective layer 195 may be omitted.

[0153] The warping direction of the circuit board due to the insulating layer and the circuit layer and the position of the buffer layer according to the embodiment will be described below.

[0154] 3 to 6 are diagrams for explaining the warpage direction of the circuit board according to the conditions of the insulating layer and the circuit layer in the examples.

[0155] 3(a), the circuit board may include a first insulating layer 111A and a second insulating layer 112A. The circuit board may also include a first circuit layer 120A disposed below the first insulating layer 111A and a second circuit layer 130A disposed below the second insulating layer 112A.

[0156] In this case, the physical properties 111A_pom (e.g., dielectric constant, thermal expansion coefficient, glass transition temperature, modulus, shrinkage rate, and dielectric loss) of the first insulating layer 111A may be the same as the physical properties 112A_pom (e.g., dielectric constant, thermal expansion coefficient, glass transition temperature, modulus, shrinkage rate, and dielectric loss) of the second insulating layer 112A. For example, the first insulating layer 111A and the second insulating layer 112A may contain the same material.

[0157] Furthermore, the thickness Ta of the first insulating layer 111A may be the same as the thickness Tb of the second insulating layer 112A.

[0158] Furthermore, the wiring density of the first circuit layer 120A may be the same as the wiring density of the second circuit layer 130A.

[0159] Referring to FIG. 3(b), the warpage profile of the circuit board under the conditions shown in FIG. 3(a) is a straight line corresponding to the condition where no warpage occurs.

[0160] 4(a), the circuit board may include a first insulating layer 111B and a second insulating layer 112B. The circuit board may also include a first circuit layer 120B disposed below the first insulating layer 111B and a second circuit layer 130B disposed below the second insulating layer 112B.

[0161] In this case, the physical property 111B_pom of the first insulating layer 111B may be the same as the physical property 112B_pom of the second insulating layer 112B. For example, the first insulating layer 111B and the second insulating layer 112B may contain the same material.

[0162] Furthermore, the thickness Ta' of the first insulating layer 111B may be different from the thickness Tb of the second insulating layer 112B.

[0163] Furthermore, the wiring density of the first circuit layer 120B may be the same as the wiring density of the second circuit layer 130B.

[0164] Referring to FIG. 4(b), the warpage profile of the circuit board under the conditions shown in FIG. 4(a) is a curve in which both ends of the circuit board are warped in a specific direction.

[0165] For example, when the thickness Ta' of the first insulating layer 111B is greater than the thickness Tb of the second insulating layer 112B, the warpage of the circuit board is shown as a first curve WP1, in which both ends of the circuit board warp downward. For example, when the thickness Ta' of the first insulating layer 111B is smaller than the thickness Tb of the second insulating layer 112B, the warpage of the circuit board is shown as a second curve WP2, in which both ends of the circuit board warp upward.

[0166] 5(a), the circuit board may include a first insulating layer 111C and a second insulating layer 112C. The circuit board may also include a first circuit layer 120C disposed below the first insulating layer 111C and a second circuit layer 130C disposed below the second insulating layer 112C.

[0167] In this case, the physical property 111C_pom of the first insulating layer 111C may be different from the physical property 112C_pom of the second insulating layer 112C. For example, the dielectric constant of the first insulating layer 111C may be different from the dielectric constant of the second insulating layer 112C.

[0168] Furthermore, the thickness Ta of the first insulating layer 111C may be the same as the thickness Tb of the second insulating layer 112C.

[0169] Furthermore, the wiring density of the first circuit layer 120C may be the same as the wiring density of the second circuit layer 130C.

[0170] Referring to FIG. 5(b), the warpage profile of the circuit board under the conditions shown in FIG. 5(a) is a curve in which both ends of the circuit board are warped in a specific direction.

[0171] For example, when the dielectric constant of first insulating layer 111C is greater than that of second insulating layer 112B, the warpage of the circuit board is represented by a first curve WP1 in which both ends of the circuit board warp downward. For example, when the dielectric constant of first insulating layer 111C is less than that of second insulating layer 112C, the warpage of the circuit board is represented by a second curve WP2 in which both ends of the circuit board warp upward.

[0172] 6(a), the circuit board may include a first insulating layer 111D and a second insulating layer 112D. The circuit board may also include a first circuit layer 120D disposed below the first insulating layer 111D and a second circuit layer 130D disposed below the second insulating layer 112D.

[0173] In this case, the physical property 111D_pom of the first insulating layer 111D may be the same as the physical property 112D_pom of the second insulating layer 112D.

[0174] Furthermore, the thickness Ta of the first insulating layer 111D may be the same as the thickness Tb of the second insulating layer 112D.

[0175] Furthermore, the wiring density of the first circuit layer 120D may be different from the wiring density of the second circuit layer 130D.

[0176] Referring to FIG. 6(b), the warpage profile of the circuit board under the conditions shown in FIG. 6(a) is a curve in which both ends of the circuit board are warped in a specific direction.

[0177] For example, when the wiring density of the first circuit layer 120D is lower than that of the second circuit layer 130D, the warpage of the circuit board is represented by a first curve WP1 in which both ends of the circuit board warp downward. For example, when the wiring density of the first circuit layer 120D is higher than that of the second circuit layer 130D, the warpage of the circuit board is represented by a second curve WP2 in which both ends of the circuit board warp upward.

[0178] In the embodiment, a buffer layer may be disposed in either the first insulating layer or the second insulating layer depending on the warpage conditions as described above, thereby preventing warpage of the circuit board.

[0179] FIG. 7 is a diagram for explaining the position of the buffer layer according to the embodiment.

[0180] 7, the circuit board of the embodiment may have any one of a difference in thickness between the first insulating layer 111 and the second insulating layer 112, a difference in physical properties between the first insulating layer 111 and the second insulating layer 112, and a difference in wiring density between the first circuit layer 120 and the second circuit layer 130. As a result, the warpage of the circuit board is a first curve WP1 in which both ends of the circuit board warp downward.

[0181] In this case, the embodiment may include a buffer layer disposed in the first insulating layer 111. For example, in the case of a warpage state such as the first curve WP1, the embodiment may configure the first insulating layer 111 using a first layer 111-1 and a second layer 111-2 having different physical properties. The second layer 111-2 of the first insulating layer 111 may have the physical properties described in FIG. 2. As a result, the second layer 111-2 of the first insulating layer 111 may prevent both ends of the circuit board from warping downward. Therefore, in the embodiment, the first insulating layer 111 includes the second layer 111-2, which may change the warpage state of the circuit board from the first curve WP1 to a state closer to the straight line WP1a.

[0182] In this case, the first layer 111-1 and the second layer 111-2 of the first insulating layer 111 may have thicknesses corresponding to each other. For example, the thickness T1 of the first insulating layer 111 is determined by the required characteristics of the first insulating layer 111. The thickness T1-1 of the first layer 111-1 and the thickness T1-2 of the second layer 111-2 of the first insulating layer 111 may correspond to each other. For example, the thickness T1-1 of the first layer 111-1 of the first insulating layer 111 may be in the range of 90% to 110%, 92% to 108%, or 95% to 105% of the thickness T1-2 of the second layer 111-2. This allows the embodiment to satisfy the required characteristics of the first insulating layer 111 and prevent the circuit board from warping.

[0183] In this case, the first insulating layer 111 and the second insulating layer 112 may refer to layers disposed between circuit patterns of different layers disposed adjacent to each other. For example, a circuit pattern may be disposed on each of the upper and lower surfaces of the first insulating layer 111, but no circuit pattern may be disposed between the upper and lower surfaces of the first insulating layer 111. Alternatively, a circuit pattern may be disposed on each of the upper and lower surfaces of the second insulating layer 112, but no circuit pattern may be disposed between the upper and lower surfaces of the second insulating layer.

[0184] Alternatively, the first insulating layer 111 or the second insulating layer 112 may refer to an area having a plurality of first or second through electrodes 160, 170 in the horizontal direction, and may refer to an area having one first or second through electrode 160, 170 in the vertical direction.

[0185] The embodiment can prevent the circuit board from warping significantly in a specific direction, thereby improving the electrical reliability and / or physical reliability of the circuit board.

[0186] Specifically, the circuit board may include a lower layer including a first insulating layer and a first circuit layer, and an upper layer including a second insulating layer and a second circuit layer. The upper and lower layers may have different required characteristics. Therefore, the upper and lower layers may have any one of differences in the physical properties of the insulating layers, differences in the thickness of the insulating layers, and differences in the wiring density of the circuit layers. Therefore, in this embodiment, a buffer layer is included in either the first insulating layer or the second insulating layer depending on the warping direction of the circuit board due to the differences in the physical properties, thickness, and wiring density. For example, if both ends of the circuit board warp downward, the buffer layer is included in the first insulating layer. For example, if both ends of the circuit board warp upward, the buffer layer is included in the second insulating layer.

[0187] Accordingly, in the embodiment, a buffer layer may be provided in either the first insulating layer or the second insulating layer, thereby reducing warping of the circuit board in a specific direction. For example, the first insulating layer may include a first layer and a second layer corresponding to the buffer layer disposed on the first layer. The second layer of the first insulating layer has a lower modulus (Y's Modulus) and glass transition temperature (Tg) than the first and second insulating layers of the first insulating layer, and is disposed in the first lamination region, where stress begins in the circuit board manufacturing process. As a result, the embodiment can reduce stress formed in the initial lamination process and thereby serve to reduce additional stress generated during the subsequent lamination process.

[0188] In addition, the second layer of the first insulating layer has a relatively low glass transition temperature and modulus, which can increase the fluidity of the resin in the first insulating layer in the high temperature region of lamination. As a result, the embodiment can use the second layer of the first insulating layer to delay the onset of stress in the low temperature region, thereby reducing the stress acting on the circuit board at room temperature.

[0189] Therefore, in the embodiment, the first insulating layer may be composed of a first layer and a second layer having different moduli (Y's Modulus) and glass transition temperatures (Tg), and the first and second layers may have corresponding dielectric constants and thermal expansion coefficients. As a result, the embodiment may satisfy the required characteristics of the first insulating layer and prevent the circuit board from warping significantly in a specific direction. As a result, the embodiment may improve the physical and / or electrical reliability of the circuit board and enable stable operation of a semiconductor device mounted in a semiconductor package including the circuit board. As a result, the embodiment may improve the operational characteristics of electronic products and / or servers to which the semiconductor package is applied, thereby improving operational reliability.

[0190] In conclusion, the circuit board of the embodiment may have a buffer layer with a relatively low modulus (Y's Modulus) and glass transition temperature (Tg) disposed in either a lower layer disposed below the center of the circuit board or an upper layer disposed above the lower layer. The buffer layer can control warpage characteristics caused by asymmetry in physical properties and structure between the upper and lower layers. As a result, the embodiment can improve internal stress in the circuit board during the manufacturing process, thereby improving reliability against thermal deformation.

[0191] FIG. 8 is a cross-sectional view showing a circuit board according to the second embodiment.

[0192] The circuit board of FIG. 2 has a single-layer structure with the third insulating layer 113 at the center as the base, and the upper and lower insulating layers each having a single layer structure.

[0193] 8, a multi-layer structure may be provided in which upper and lower layers correspond to each other with respect to a central third insulating layer, in this case, in an embodiment, a buffer layer may be provided for each of the multiple layers according to the warpage direction of the circuit board.

[0194] For example, the circuit board 200 may include a first insulating layer 211, a second insulating layer 212, and a third insulating layer 213. A first circuit layer 220 is disposed below the first insulating layer 211. A second circuit layer 230 is disposed on the second insulating layer 212. A third circuit layer 240 is disposed below the third insulating layer 213, and a fourth circuit layer 250 is disposed on the third insulating layer 213.

[0195] In this case, both ends of the circuit board 200 warp downward due to any one of the following: a difference in physical properties between the first insulating layer 211 and the second insulating layer 212; a difference in thickness between the first insulating layer 211 and the second insulating layer 212; and a difference in wiring density between the first circuit layer 220 and the second circuit layer 230. For example, in a manufacturing process of the circuit board 200, the warpage of the circuit board before the fourth insulating layer 214, the fifth insulating layer 215, the fifth circuit layer 225, and the sixth circuit layer 235 are formed may correspond to the first curve WP1. Accordingly, in the embodiment, the first insulating layer 211 may include a first layer 211-1 and a second layer 211-2 having different physical properties. As a result, in the embodiment, warpage occurring in the process of forming the first insulating layer 211, the second insulating layer 212, the first circuit layer 220, and the second circuit layer 230 on both sides of the third insulating layer 213 may be minimized.

[0196] A fourth insulating layer 214 is disposed below the first insulating layer 211. A fifth insulating layer 215 is disposed on the second insulating layer 212. A fifth circuit layer 225 is disposed below the fourth insulating layer 214. A sixth circuit layer 235 is disposed on the fifth insulating layer 215.

[0197] During the manufacturing process of the circuit board 200, before the fourth insulating layer 214, the fifth circuit layer 225, the fifth insulating layer 215, and the sixth circuit layer 235 are formed above and below the first insulating layer 211 and the second insulating layer 212, respectively, the occurrence of warping is minimized by the buffer layer provided on the first insulating layer 211.

[0198] However, both ends of the circuit board 200 will warp upward due to one of the following: the difference in physical properties between the fourth insulating layer 214 and the fifth insulating layer 215; the difference in thickness between the fourth insulating layer 214 and the fifth insulating layer 215; and the difference in wiring density between the fifth circuit layer 225 and the sixth circuit layer 235.

[0199] In this case, in an embodiment, the fifth insulating layer 215 may include a first layer 215-1 and a second layer 215-2 having different physical properties depending on the warpage state of the circuit board.

[0200] For example, if the circuit board has a warpage corresponding to the second curve WP2, a first layer 215-1 corresponding to a buffer layer can be disposed on the fifth insulating layer 215, and the first layer 215-1 can be used to prevent the circuit board from warping.

[0201] However, the embodiment is not limited to this.

[0202] For example, if both ends of the circuit board warp downward due to any one of the difference in physical properties between the fourth insulating layer 214 and the fifth insulating layer 215, the difference in thickness between the fourth insulating layer 214 and the fifth insulating layer 215, and the difference in wiring density between the fifth circuit layer 225 and the sixth circuit layer 235, a buffer layer can be included in the fourth insulating layer 214 rather than the fifth insulating layer 215.

[0203] In this case, each insulating layer may be classified based on the circuit patterns arranged on different layers. For example, each insulating layer may refer to a layer between circuit patterns arranged on different layers. Alternatively, a plurality of through electrodes may be arranged in each insulating layer in the horizontal direction, and one through electrode may be arranged in each insulating layer in the vertical direction.

[0204] FIG. 9 is a diagram showing a semiconductor package including the circuit board of FIG.

[0205] Referring to FIG. 9, a semiconductor package can include at least one semiconductor device disposed on a circuit board.

[0206] As an example, the semiconductor package may be an antenna package.

[0207] In this case, the lower layer (insulating layer and circuit layer) located below the first insulating layer 211 in the circuit board of the semiconductor package can constitute an antenna array layer that radiates antenna signals to the outside, and the upper layer located above the first insulating layer 211 can constitute a driving layer that provides antenna signals to the antenna array layer or processes antenna signals received from the antenna array layer.

[0208] In this case, the antenna array layer and the driving layer are required to have different characteristics. For example, the antenna array layer may use an insulating layer with a relatively high dielectric constant to improve antenna characteristics. Also, the antenna array layer may include a circuit layer with a relatively low wiring density to provide a more compact antenna device. For example, the driving layer may use an insulating layer with a relatively low dielectric constant to improve signal processing characteristics and minimize signal transmission loss. Also, the driving layer may include a circuit layer with a relatively high wiring density.

[0209] In the antenna package described above, warpage may occur in a specific direction during the manufacturing process of the circuit board because different characteristics are required for the upper and lower layers of the third insulating layer 113. Therefore, in this embodiment, a buffer layer is included in either the upper or lower layer depending on the warpage direction of the circuit board, thereby minimizing the warpage of the circuit board.

[0210] Meanwhile, the semiconductor package may include a first connecting portion 310 and a second connecting portion 320. The first connecting portion 310 and the second connecting portion 320 may represent, but are not limited to, solder balls.

[0211] A first semiconductor element 330 is disposed on the first connection portion 310. A terminal 335 of the first semiconductor element 330 is electrically coupled to the circuit board via the first connection portion 310.

[0212] A second semiconductor element 340 is disposed on the second connection portion 320. A terminal 345 of the second semiconductor element 340 is electrically coupled to the circuit board via the second connection portion 320.

[0213] The first semiconductor element 330 may also be a driving element. For example, if the semiconductor package is an antenna package, the first semiconductor element 330 may be a driving element for driving the antenna package. The first semiconductor element 330 may provide a transmission signal to the antenna array layer, thereby transmitting an antenna signal to the outside. The first semiconductor element 330 may receive a reception signal from the antenna array layer, thereby processing and analyzing the signal transmitted from the outside.

[0214] The second semiconductor device 340 may also be a device for supporting the operation of the first semiconductor device 330. For example, the second semiconductor device 340 may include a resistor, a capacitor, an inductor, and the like.

[0215] Meanwhile, when a circuit board having the above-described inventive features is used in IT devices or home appliances such as smartphones, server computers, and TVs, it can stabilize functions such as signal transmission or power supply. For example, when a circuit board having the features of the present invention functions as a semiconductor package, it can safely protect the semiconductor chip from external moisture and contaminants, and can solve problems such as leakage current, electrical shorts between terminals, and electrical open circuits in terminals supplying power to the semiconductor chip. Furthermore, when it functions as a signal transmission device, it can solve noise problems. As a result, a circuit board having the above-described inventive features can maintain stable functions in IT devices and home appliances, and the entire product and the circuit board to which the present invention is applied can achieve functional integration or technical interrelationship with each other.

[0216] When a circuit board having the above-described features of the present invention is used in a transportation device such as a vehicle, it can solve the problem of distortion of signals transmitted to the transportation device, safely protect the semiconductor chip that controls the transportation device from the outside, and solve the problems of leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip, thereby further improving the stability of the transportation device. Therefore, the transportation device and the circuit board to which the present invention is applied can be functionally integrated or technically linked with each other.

[0217] The features, structures, effects, etc. described in the above embodiments are included in at least one embodiment of the present invention and are not necessarily limited to one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by a person skilled in the art to which the embodiment belongs. Therefore, the contents related to such combinations and modifications should be interpreted as being included in the scope of the present invention.

[0218] The above description has focused on the embodiments, but these are merely illustrative and do not limit the present invention. A person skilled in the art to which the present invention pertains may make various modifications and applications not exemplified above within the scope of the essential characteristics of the present embodiments. For example, each component specifically presented in the embodiments may be modified and implemented. Differences related to such modifications and applications should be construed as being included within the scope of the present invention as defined by the appended claims.

Claims

1. a first circuit layer; a first insulating layer disposed on the first circuit layer; a second insulating layer disposed on the first insulating layer; a second circuit layer disposed on the second insulating layer; At least one of a wiring density of the first circuit layer, a thickness of the first insulating layer, and a physical property of the first insulating layer is different from at least one of a wiring density of the second circuit layer, a thickness of the second insulating layer, and a physical property of the second insulating layer; One of the first and second insulating layers is formed as a single layer, The other of the first and second insulating layers includes a first layer having a first physical property and a second layer having a second physical property different from the first physical property.

2. 2. The circuit board according to claim 1, wherein the second layer of either the first insulating layer or the second insulating layer is arranged so as to be closer to the other insulating layer of the first insulating layer or the second insulating layer than the first layer.

3. the wiring density of the first circuit layer is smaller than the wiring density of the second circuit layer; the first insulating layer has a multilayer structure including the first layer and the second layer, The circuit board according to claim 1 , wherein the second insulating layer has a single-layer structure.

4. the thickness of the first insulating layer is greater than the thickness of the second insulating layer; the first insulating layer has a multilayer structure including the first layer and the second layer, The circuit board according to claim 1 , wherein the second insulating layer has a single-layer structure.

5. the dielectric constant of the first insulating layer is greater than the dielectric constant of the second insulating layer; the first insulating layer has a multilayer structure including the first layer and the second layer, The circuit board according to claim 1 , wherein the second insulating layer has a single-layer structure.

6. the first physical property of the first layer of the first insulating layer includes a first glass transition temperature; The circuit board according to claim 3 , wherein the second physical property of the second layer of the first insulating layer includes a second glass transition temperature that is lower than the first glass transition temperature.

7. 7. The circuit board according to claim 6, wherein the second glass transition temperature is in the range of 60% to 95% of the first glass transition temperature.

8. the first physical property of the first layer of the first insulating layer includes a first modulus; The circuit board according to claim 3 , wherein the second property of the second layer of the first insulating layer includes a second modulus that is smaller than the first modulus.

9. 9. The circuit board according to claim 8, wherein the second modulus satisfies a range of 50% to 95% of the first modulus.

10. the first physical property of the first layer of the first insulating layer includes at least one of a first dielectric constant and a first thermal expansion coefficient; the second physical property of the second layer of the first insulating layer includes at least one of a second dielectric constant corresponding to the first dielectric constant and a second thermal expansion coefficient corresponding to the first thermal expansion coefficient; 6. The circuit board according to claim 3, wherein at least one of the first dielectric constant and the first thermal expansion coefficient satisfies a range of 93% to 107% of at least one of the second dielectric constant and the second thermal expansion coefficient.

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