Semiconductor device

Abstract

To provide a semiconductor device capable of preventing displacement of a conductive member.SOLUTION: A semiconductor device includes a substrate having a first main surface, a first conductive pattern disposed on the first main surface, and a conductive member electrically connected to the first conductive pattern, in which the first conductive pattern has a second main surface facing the first main surface and a third main surface opposite to the second main surface, an opening is formed in the third main surface, and the conductive member has a bonding portion having a bonding surface bonded to the third main surface and a protruding portion connected to the bonding portion and entering the opening.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] 2. Description of the Related Art A semiconductor device is known in which a conductive member such as a bus bar is ultrasonically bonded to a conductive pattern provided on an insulating substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-212645 Summary of the Invention [Problem to be solved by the invention]

[0004] The insulating substrate has multiple conductive patterns formed thereon, and in conventional semiconductor devices, vibrations during ultrasonic bonding can cause the conductive members to shift position, resulting in contact with a conductive pattern other than the desired conductive pattern, which can cause a short circuit.

[0005] An object of the present disclosure is to provide a semiconductor device that can prevent misalignment of conductive members. [Means for solving the problem]

[0006] The semiconductor device of the present disclosure comprises a substrate having a first main surface, a first conductive pattern arranged on the first main surface, and a conductive member electrically connected to the first conductive pattern, wherein the first conductive pattern has a second main surface facing the first main surface and a third main surface opposite the second main surface, and an opening is formed in the third main surface, and the conductive member has a bonding portion with a bonding surface bonded to the third main surface, and a protrusion connected to the bonding portion and extending into the opening. [Effects of the Invention]

[0007] According to the present disclosure, it is possible to prevent the conductive member from being displaced. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view showing a semiconductor device according to an embodiment. [Figure 2] FIG. 2 is a cross-sectional view showing the structure of the conductive pattern and the terminal. [Figure 3] FIG. 3 is a plan view (part 1) illustrating the method for manufacturing a semiconductor device according to the embodiment. [Figure 4] FIG. 4 is a plan view (part 2) illustrating the method for manufacturing a semiconductor device according to the embodiment. [Figure 5] FIG. 5 is a cross-sectional view showing ultrasonic bonding. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.

[0010] [1] A semiconductor device according to one embodiment of the present disclosure includes a substrate having a first main surface, a first conductive pattern disposed on the first main surface, and a conductive member electrically connected to the first conductive pattern, wherein the first conductive pattern has a second main surface facing the first main surface and a third main surface opposite the second main surface, and an opening is formed in the third main surface, and the conductive member has a bonding portion with a bonding surface bonded to the third main surface and a protrusion connected to the bonding portion and extending into the opening.

[0011] Since the protruding portions of the conductive member fit into the openings of the conductive pattern, misalignment of the conductive member with respect to the conductive pattern can be prevented during bonding, thereby preventing short circuits between the conductive member and a conductive pattern other than the desired conductive pattern due to misalignment of the conductive member.

[0012] [2] In [1], the opening may penetrate the first conductive pattern. In this case, it is easy to form the first conductive pattern having the opening.

[0013] [3] In [1] or [2], the protruding portion may have a protruding amount from the bonding surface as a reference that is equal to or less than the depth of the opening. In this case, the protruding portion can be spaced from the bottom of the opening, making it easier to bring the third main surface and the bonding surface into contact with each other.

[0014] [4] In any one of [1] to [3], the joint and the protrusion may be formed from a single metal material, which makes it easier to form the conductive member.

[0015] [5] In [4], the metal material may have a bent portion between the joint and the protrusion. The joint and the protrusion can be easily formed by bending the metal material at the bent portion.

[0016] [6] In any one of [1] to [5], the conductive member may be ultrasonically bonded to the first conductive pattern. In this case, the conductive member is firmly bonded to the first conductive pattern.

[0017] [7] In any one of [1] to [6], a second conductive pattern may be disposed on the first main surface and spaced apart from the first conductive pattern, and the conductive member may not be in contact with the second conductive pattern. In this case, a short circuit between the conductive member and the second conductive pattern can be prevented.

[0018] [8] In any of [1] to [7], in a plan view perpendicular to the third main surface, the opening and the protrusion may have a shape with a major axis and a minor axis that are orthogonal to each other, and the major axis of the opening and the major axis of the protrusion may be parallel. In this case, rotation of the protrusion in a plane parallel to the third main surface is easily prevented.

[0019] [9] In [8], the joint may extend parallel to the minor axis. In this case, the direction in which the joint extends is perpendicular to the major axis of the opening, making it easier to prevent rotation of the protrusion.

[0020] [Details of the embodiments of the present disclosure] The following describes in detail embodiments of the present disclosure, but the present disclosure is not limited thereto. Note that in this specification and drawings, components having substantially the same functional configuration may be designated by the same reference numerals to avoid redundant description. In the following description, an XYZ Cartesian coordinate system is used, but this coordinate system is defined for the purpose of explanation and does not limit the orientation of the semiconductor device. Furthermore, when viewed from an arbitrary point, the +Z side may be referred to as the upper side, top side, or top, and the -Z side may be referred to as the lower side, bottom side, or bottom. In this disclosure, "planar view" refers to viewing an object from above, and "planar shape" refers to the shape of an object viewed from above.

[0021] 1 is a plan view showing a semiconductor device according to an embodiment of the present disclosure.

[0022] 1, the semiconductor device 1 according to the embodiment has a heat sink 121, a housing 122, a P terminal 31, an N terminal 32, an O terminal 33, and an O terminal 34. The P terminal 31 is a positive power supply terminal, the N terminal 32 is a negative power supply terminal, and the O terminals 33 and 34 are output terminals. The semiconductor device 1 has gate terminals 35 and 37, and sense-source terminals 36 and 38. The P terminal 31, the N terminal 32, the O terminal 33, the O terminal 34, the gate terminal 35, the sense-source terminal 36, the gate terminal 37, and the sense-source terminal 38 are fixed to the housing 122.

[0023] The semiconductor device 1 has an insulating substrate 123, conductive patterns 41, 42, 43, 44, 45, 46, 47, and 48, and transistors 10 and 20. The number of transistors 10 and 20 is not limited, and may be, for example, two each.

[0024] The heat sink 121 is, for example, a rectangular plate-like body with a uniform thickness in a plan view. The material of the heat sink 121 is a metal with high thermal conductivity, such as copper (Cu), a copper alloy, or aluminum (Al). The heat sink 121 is fixed to a cooler or the like using a thermal interface material (TIM) or the like.

[0025] The housing 122 has, for example, a frame-like shape in a plan view. The housing 122 is made of an insulating material such as resin. The housing 122 has a pair of side walls 191 and 192 facing each other, and a pair of end walls 193 and 194 connecting both ends of the side walls 191 and 192. The side walls 191 and 192 are parallel to the ZX plane, and the end walls 193 and 194 are parallel to the YZ plane. The side wall 191 is on the +Y side of the side wall 192, and the end wall 193 is on the +X side of the end wall 194.

[0026] Housing 122 has terminal block 195 protruding from end wall 193 toward the +X side and terminal block 196 protruding from end wall 194 toward the -X side. P terminal 31 and N terminal 32 are fixed to the upper surface (surface on the +Z side) of terminal block 195. For example, P terminal 31 is on the +Y side of N terminal 32. O terminals 33 and 34 are fixed to the upper surface (surface on the +Z side) of terminal block 196. O terminal 33 is on the +Y side of O terminal 34. P terminal 31, N terminal 32, O terminal 33, and O terminal 34 extend parallel to the X axis. Semiconductor device 1 has fixing member 197 that sandwiches P terminal 31 and N terminal 32 between terminal block 195 and fixing member 198, and fixing member 198 that sandwiches O terminal 33 and O terminal 34 between terminal block 196 and fixing member 197. P terminal 31, N terminal 32, O terminal 33, and O terminal 34 are each formed from a single metal material.

[0027] A gate terminal 35 and a sense source terminal 36 are fixed to the side wall portion 191. The gate terminal 35 and the sense source terminal 36 penetrate the side wall portion 191. The lower ends of the gate terminal 35 and the sense source terminal 36 protrude inward from the inner wall surface of the side wall portion 191. A gate terminal 37 and a sense source terminal 38 are fixed to the side wall portion 192. The gate terminal 37 and the sense source terminal 38 penetrate the side wall portion 192. The lower ends of the gate terminal 37 and the sense source terminal 38 protrude inward from the inner wall surface of the side wall portion 192. The gate terminal 35, the sense source terminal 36, the gate terminal 37, and the sense source terminal 38 are each formed from a single metal material.

[0028] Insulating substrate 123 is located on the +Z side of heat sink 121 inside housing 122. Insulating substrate 123 has main surface 123A on the +Z side and main surface 123B on the -Z side (see FIG. 2). Conductive patterns 41, 42, 43, 44, 45, 46, and 47 are arranged on main surface 123A. Conductive patterns 41, 42, 43, 44, 45, 46, and 47 are arranged spaced apart from one another. Different potentials are applied at least between conductive patterns 41, 42, and 43. Conductive pattern 48 is arranged on main surface 123B (see FIG. 2). Conductive pattern 48 is bonded to heat sink 121 by bonding material 125 (see FIG. 2). The insulating substrate 123 is made of, for example, silicon nitride (SiN), aluminum oxide (Al2O3), or aluminum nitride (AlN). The conductive patterns 41, 42, 43, 44, 45, 46, 47, and 48 are made of, for example, copper. The bonding material 125 is made of, for example, solder. The insulating substrate 123 is an example of a substrate. The main surface 123A is an example of a first main surface.

[0029] Two transistors 10 are mounted on a conductive pattern 41. The two transistors 10 are aligned parallel to the X-axis. Two transistors 20 are mounted on a conductive pattern 42. The two transistors 20 are aligned parallel to the X-axis. The transistors 10 and 20 have the same configuration.

[0030] The transistor 10 has a gate electrode 11, a source electrode 12, and a drain electrode (not shown). The transistor 10 is a semiconductor element. The gate electrode 11 and the source electrode 12 are disposed on the main surface on the +Z side of the transistor 10, and the drain electrode is disposed on the main surface on the -Z side of the transistor 10. The drain electrode is joined to a conductive pattern 41 by a joining material (not shown) such as solder.

[0031] The transistor 20 has a gate electrode 21, a source electrode 22, and a drain electrode (not shown). The transistor 20 is a semiconductor element. The gate electrode 21 and the source electrode 22 are disposed on the main surface on the +Z side of the transistor 20, and the drain electrode is disposed on the main surface on the -Z side of the transistor 20. The drain electrode is joined to the conductive pattern 42 by a joining material (not shown) such as solder.

[0032] The semiconductor device 1 has a plurality of wires 51, a plurality of wires 52, a plurality of wires 53, a wire 54, and a wire 55. The wires 51 connect the gate electrodes 11 and the conductive patterns 44, respectively. The wires 52 connect the source electrodes 12 and the conductive patterns 42, respectively. The wires 53 connect the source electrodes 12 and the conductive patterns 45, respectively. The wires 54 connect the conductive patterns 44 and the gate terminal 35. The wires 55 connect the conductive patterns 45 and the sense source terminal 36. Each source electrode 12 and the conductive patterns 42 may be connected by a plurality of wires 52.

[0033] The semiconductor device 1 has a plurality of wires 61, a plurality of wires 62, a plurality of wires 63, a wire 64, and a wire 65. The wires 61 connect the gate electrodes 21 and the conductive patterns 46, respectively. The wires 62 connect the source electrodes 22 and the conductive patterns 43, respectively. The wires 63 connect the source electrodes 22 and the conductive patterns 47, respectively. The wires 64 connect the conductive patterns 46 and the gate terminal 37. The wires 65 connect the conductive patterns 47 and the sense source terminal 38. Each source electrode 22 and the conductive patterns 43 may be connected by a plurality of wires 62.

[0034] P terminal 31 is electrically connected to conductive pattern 41. P terminal 31 is ultrasonically bonded to conductive pattern 41 in bonding area 31A. P terminal 31 is in direct contact with conductive pattern 41. N terminal 32 is electrically connected to conductive pattern 43. N terminal 32 is ultrasonically bonded to conductive pattern 43 in bonding area 32A. N terminal 32 is in direct contact with conductive pattern 43. O terminals 33 and 34 are electrically connected to conductive pattern 42. O terminal 33 is ultrasonically bonded to conductive pattern 42 in bonding area 33A, and O terminal 34 is ultrasonically bonded to conductive pattern 42 in bonding area 34A. O terminals 33 and 34 are in direct contact with conductive pattern 42.

[0035] An opening 41A is formed in the conductive pattern 41. The opening 41A penetrates the conductive pattern 41. In a plan view, the opening 41A has a planar shape with a major axis parallel to the Y axis and a minor axis parallel to the X axis. For example, the planar shape of the opening 41A is rectangular. An opening 43A is formed in the conductive pattern 43. The opening 43A penetrates the conductive pattern 43. In a plan view, the opening 43A has a planar shape with a major axis parallel to the Y axis and a minor axis parallel to the X axis. For example, the planar shape of the opening 43A is rectangular. Openings 42A and 42B are formed in the conductive pattern 42. The openings 42A and 42B penetrate the conductive pattern 42. In a plan view, the openings 42A and 42B have a planar shape with a major axis parallel to the Y axis and a minor axis parallel to the X axis. For example, the planar shape of the openings 42A and 42B is rectangular. Opening 42A is on the +Y side of opening 42B. Conductive patterns 41, 42, and 43 are examples of first conductive patterns.

[0036] Next, the structures of the conductive patterns and the terminals ultrasonically bonded to the conductive patterns will be described in detail. That is, the structures of conductive pattern 41 and P terminal 31, conductive pattern 43 and N terminal 32, conductive pattern 42 and O terminal 33, and conductive pattern 42 and O terminal 34 will be described. Here, P terminal 31, N terminal 32, O terminal 33, and O terminal 34 will be collectively referred to as terminal 300, and conductive patterns 41, 43, and 42 will be collectively referred to as conductive pattern 400. Figure 2 is a cross-sectional view showing the structures of the conductive patterns and terminals.

[0037] As shown in FIG. 2, conductive pattern 400 is disposed on main surface 123A of insulating substrate 123. Conductive pattern 400 has main surface 402 facing main surface 123A and main surface 403 opposite main surface 402. Openings 405 are formed in main surface 403. Openings 405 penetrate conductive pattern 400. Openings 41A, 43A, 42A, and 42B correspond to openings 405. Openings 405 do not have to penetrate conductive pattern 400. Main surface 402 is an example of a second main surface, and main surface 403 is an example of a third main surface.

[0038] The terminal 300 has a joint portion 310 and a protruding portion 320. The joint portion 310 has a joint surface 311 joined to the main surface 403. The P terminal 31 is ultrasonically bonded to the conductive pattern 41 in the bonding region 301. The protruding portion 320 is connected to the joint portion 310 and extends into the opening 405. A protrusion amount H of the protruding portion 320 based on the joint surface 311 is equal to or less than a depth D of the opening 405. The joint portion 310 and the protruding portion 320 are formed from a single metal material 350. The metal material 350 has a bent portion 330 between the joint portion 310 and the protruding portion 320. That is, the joint portion 310 and the protruding portion 320 are formed by bending a single metal material 350 at the bent portion 330.

[0039] Next, a method for manufacturing the semiconductor device 1 according to the embodiment will be described. Figures 3 and 4 are plan views showing the method for manufacturing the semiconductor device 1 according to the embodiment. Figure 5 is a cross-sectional view showing ultrasonic bonding.

[0040] As shown in FIG. 3, a heat sink 121 and a housing 122 are prepared. A gate terminal 35, a sense-source terminal 36, a gate terminal 37, and a sense-source terminal 38 are attached to the housing 122. An insulating substrate 123 on which conductive patterns 41 to 48 are formed is also prepared. An opening 41A is formed in the conductive pattern 41, openings 42A and 42B are formed in the conductive pattern 42, and an opening 43A is formed in the conductive pattern 43. Next, the housing 122 and the insulating substrate 123 are attached to the heat sink 121. Next, transistors 10 and 20 are mounted, and wires 51 to 55 and wires 61 to 65 are bonded.

[0041] Next, as shown in FIG. 4, P terminal 31 is ultrasonically bonded to conductive pattern 41, N terminal 32 is ultrasonically bonded to conductive pattern 43, and O terminals 33 and 34 are ultrasonically bonded to conductive pattern 43. Each terminal is firmly bonded to its corresponding conductive pattern by ultrasonic bonding. For example, when ultrasonically bonding P terminal 31, as shown in FIG. 5, protrusion 320 of P terminal 31 is inserted into opening 41A of conductive pattern 41. Then, with protrusion 320 inserted into opening 41A, ultrasonic bonding tool 70 is pressed against the upper surface of joint 310 of P terminal 31, and ultrasonic vibration of ultrasonic bonding tool 70 is applied in a direction parallel to main surface 123A. As a result, a bonding region 301 is formed between joint 310 of P terminal 31 and conductive pattern 41 below ultrasonic bonding tool 70. Due to the ultrasonic vibration, P terminal 31 may move somewhat on conductive pattern 41. However, in this embodiment, because the protrusion 320 is inserted into the opening 41A, even if the P terminal 31 moves, the range of movement is limited. Therefore, the P terminal 31 is prevented from contacting a conductive pattern other than the conductive pattern 41, such as the conductive pattern 42. That is, misalignment of the P terminal 31 is prevented, and a short circuit between the P terminal 31 and a conductive pattern other than the conductive pattern 41 is prevented. If the opening 41A is not formed in the conductive pattern 41 and the P terminal 31 does not have the protrusion 320, the P terminal 31 may be misaligned, as shown by the dashed line in FIG. 4 , and the P terminal 31 may come into contact with the conductive pattern 42, resulting in a short circuit. When the conductive pattern 41 is an example of a first conductive pattern, the conductive patterns 42, 43, 44, 45, 46, and 47 are examples of a second conductive pattern.

[0042] Similarly, when ultrasonically bonding the N terminal 32 to the conductive pattern 43, the N terminal 32 is prevented from coming into contact with conductive patterns other than the conductive pattern 43. In other words, a short circuit between the N terminal 32 and conductive patterns other than the conductive pattern 43 is prevented. Similarly, when ultrasonically bonding the O terminals 33 and 34 to the conductive pattern 42, the O terminals 33 and 34 are prevented from coming into contact with conductive patterns other than the conductive pattern 42. In other words, a short circuit between the O terminals 33 and 34 and conductive patterns other than the conductive pattern 42 is prevented. When the conductive pattern 42 is an example of a first conductive pattern, the conductive patterns 41, 43, 44, 45, 46, and 47 are an example of a second conductive pattern. When the conductive pattern 43 is an example of a first conductive pattern, the conductive patterns 41, 42, 44, 45, 46, and 47 are an example of a second conductive pattern.

[0043] After P terminal 31, N terminal 32, O terminal 33 and O terminal 34 are ultrasonically bonded, fixing members 197 and 198 are attached (see FIG. 1).

[0044] In this manner, the semiconductor device 1 according to the embodiment can be manufactured.

[0045] In this embodiment, the protrusions 320 of the terminals 300 (P terminal 31, N terminal 32, O terminal 33, and O terminal 34) are inserted into the openings 405 (openings 41A, 43A, 42A, and 42B) of the conductive patterns 400 (conductive patterns 41, 43, and 42). Therefore, even if the terminals 300 are misaligned with respect to the conductive patterns 400 during ultrasonic bonding, the extent of the misalignment is limited. Therefore, it is possible to prevent short circuits between the terminals 300 and conductive patterns other than the desired conductive pattern 400.

[0046] When opening 405 penetrates conductive pattern 400, it is easy to control the depth of opening 405, and therefore it is easy to form conductive pattern 400 with opening 405. When protrusion amount H of protrusion 320 based on bonding surface 311 is equal to or less than depth D of opening 405, protrusion 320 can be separated from the bottom of opening 405, in this example, from main surface 123A of insulating substrate 123, and main surface 403 of conductive pattern 400 and bonding surface 311 can easily be brought into contact with each other.

[0047] Terminal 300 is easily formed when joint portion 310 and protrusion portion 320 are formed from a single metal material 350. Furthermore, when metal material 350 has bent portion 330 between joint portion 310 and protrusion portion 320, joint portion 310 and protrusion portion 320 can be easily formed by bending metal material 350 at bent portion 330.

[0048] The sizes of the opening 405 and the protrusion 320 are not limited. However, the smaller the gap between the opening 405 and the protrusion 320, the easier it is to suppress movement of the protrusion 320 within the opening 405. Furthermore, the number of openings 405 and protrusions 320 is not limited. One set of the conductive pattern 400 and the terminal 300 may include multiple sets of openings 405 and protrusions 320.

[0049] The shapes of the opening 405 and the protrusion 320 are not limited. When the opening 405 and the protrusion 320 have shapes with long and short axes that are perpendicular to each other in a plan view, and the long axis of the opening 405 and the long axis of the protrusion 320 are parallel, it is easy to prevent the protrusion 320 from rotating in a plane parallel to the third principal surface. Furthermore, when the joint 310 extends parallel to the short axis of the opening 405, the extension direction of the joint 310 is perpendicular to the long axis of the opening 405, which makes it easier to prevent the protrusion 320 from rotating.

[0050] When ultrasonic bonding is performed, traces of the ultrasonic bonding tool 70 may remain on the upper surface of the bonding portion 310. If the ultrasonic bonding tool 70 has multiple quadrangular pyramidal protrusions on the portion that contacts the bonding portion 310, traces of the protrusions may remain. The terminal 300 may be joined to the conductive pattern 400 by solder bonding.

[0051] Although the embodiments have been described in detail above, the present disclosure is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims. [Explanation of symbols]

[0052] 1. Semiconductor device 10, 20 transistors 11, 21 Gate electrode 12, 22 Source electrode 31 P terminal 32 N terminal 33, 34 O terminal 31A, 32A, 33A, 34A junction area 35 Gate terminal 36 Sense source terminal 37 Gate terminal 38 Sense source terminal 41, 42, 43 Conductive patterns (first conductive pattern, second conductive pattern) 44, 45, 46, 47, 48 Conductive patterns (second conductive patterns) 41A, 42A, 42B, 43A opening 51, 52, 53, 54, 55, 61, 62, 63, 64, 65 Wires 70 Ultrasonic welding tools 121 Heat sink 122 Case 123 Insulating substrate (substrate) 123A Main surface (first main surface) 123B Main surface 125 Bonding material 191, 192 Side wall 193, 194 End wall 195, 196 terminal block 197, 198 Fixing member 300 terminals 301 Joint area 310 Joint 311 Joint surface 320 Protrusion 330 Bend 350 Metal materials 400 Conductive Pattern 402 Main surface (second main surface) 403 Main surface (third main surface) 405 Opening

Claims

1. a substrate having a first major surface; a first conductive pattern disposed on the first main surface; a conductive member electrically connected to the first conductive pattern; and The first conductive pattern is a second main surface opposite to the first main surface; a third major surface opposite the second major surface; and an opening is formed in the third main surface; The conductive member is a bonding portion having a bonding surface bonded to the third main surface; a protrusion that is connected to the joint and extends into the opening; The semiconductor device has:

2. The semiconductor device according to claim 1 , wherein the opening penetrates the first conductive pattern.

3. 3. The semiconductor device according to claim 1, wherein the protrusion has a protrusion amount from the bonding surface as a reference, the protrusion being equal to or smaller than the depth of the opening.

4. 3. The semiconductor device according to claim 1, wherein said joint portion and said protrusion portion are formed from a single metal material.

5. The semiconductor device according to claim 4 , wherein the metal material has a bent portion between the joint portion and the protrusion portion.

6. 3. The semiconductor device according to claim 1, wherein the conductive member is ultrasonically bonded to the first conductive pattern.

7. a second conductive pattern disposed on the first main surface and spaced apart from the first conductive pattern; 3. The semiconductor device according to claim 1, wherein the conductive member is not in contact with the second conductive pattern.

8. In a plan view perpendicular to the third main surface, the opening and the protrusion each have a shape with a major axis and a minor axis that are orthogonal to each other, 3. The semiconductor device according to claim 1, wherein a major axis of said opening and a major axis of said protrusion are parallel to each other.

9. The semiconductor device according to claim 8 , wherein the joint extends parallel to the minor axis.

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