Semiconductor device

Abstract

To simplify the manufacturing process of a semiconductor device by simplifying the peeling of an integrated film.SOLUTION: The semiconductor device 3 has an integrated film 2 and a circuit board 1. The integrated film 2 has an organic insulating layer 21 (first insulating layer) having a second surface (facing surface) 21b facing the circuit substrate 1 and formed of an organic material, functional elements 22, and electrodes 2324 electrically connected to the functional elements 22 and exposed from the facing surface 21b. The circuit substrate 1 includes an insulating film 12 (second insulating layer) formed of an organic material or an inorganic material, and an inorganic conductive film 13,14,15. In the joining area of the integrated film 2 and the circuit substrate 1, a first joining area A1 where the electrodes 2324 and and the inorganic conductive film 1314 are joined and a second joining area 21b where the end part 21b of the second surface 21e closer to the edge part F of the second surface A2 than the electrodes 23 (24) and the inorganic conductive film 15 are joined are formed.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] There is known a technique in which an integrated film is transferred onto a circuit board, the integrated film is inspected, and an integrated film that has been found to be defective by inspection is peeled off from the circuit board (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2022-79295 A (see FIG. 10) Summary of the Invention [Problem to be solved by the invention]

[0004] However, a stripping solution must be used in the step of peeling the integrated film from the circuit board, which poses a problem of complicating the manufacturing process.

[0005] The present disclosure aims to simplify the peeling of integrated films and simplify the manufacturing process of semiconductor devices. [Means for solving the problem]

[0006] The semiconductor device disclosed herein includes an integrated film and a circuit board. The integrated film includes a first insulating layer made of an organic material and having a surface facing the circuit board, a functional element, and an electrode electrically connected to the functional element and exposed from the facing surface. The facing surface of the first insulating layer and the electrode form a first bonding surface. The circuit board includes a second insulating layer made of an organic or inorganic material and an inorganic conductive film made of an inorganic material. The second insulating layer and the inorganic conductive film form a second bonding surface bonded to the first bonding surface. The bonding region between the first bonding surface and the second bonding surface includes a first bonding region where the electrode and the inorganic conductive film are bonded, and a second bonding region where the inorganic conductive film is bonded to an edge of the facing surface closer to the edge of the facing surface than the electrode. [Effects of the Invention]

[0007] In the semiconductor device of the present disclosure, the adhesive strength between the end of the opposing surface of the first insulating layer and the inorganic conductive film is weaker than the adhesive strength between the electrode of the integrated film and the inorganic conductive film, so the integrated film can be easily peeled off from the circuit board, simplifying the manufacturing process. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a perspective view showing a semiconductor device according to a first embodiment. [Figure 2] 1 is a plan view showing an integrated film of semiconductor devices according to a first embodiment. [Figure 3] 3 is a cross-sectional view of the integrated film taken along line III-III in FIG. 1. [Figure 4] 1 is a cross-sectional view showing a circuit board of a semiconductor device according to a first embodiment. [Figure 5] 1 is a plan view showing a circuit board of a semiconductor device according to a first embodiment. [Figure 6] 1 is a cross-sectional view showing a semiconductor device according to a first embodiment. [Figure 7] 4A to 4F are cross-sectional views showing the steps of the manufacturing method of the integrated film according to the first embodiment. [Figure 8]1A is a plan view and FIG. 1B is a cross-sectional view showing a state in which a plurality of integrated films according to the first embodiment are arranged on a formation substrate. [Figure 9] 5A to 5D are cross-sectional views illustrating steps of a method for manufacturing a circuit board according to the first embodiment. [Figure 10] 5A to 5C are cross-sectional views showing other examples of the circuit board according to the first embodiment. [Figure 11] 3 is a flowchart showing a method for transferring an integrated film according to the first embodiment. [Figure 12] 4A to 4E are cross-sectional views illustrating steps of the transfer method of the integrated film according to the first embodiment. [Figure 13] FIG. 1 is a side view showing the stamp of the first embodiment. [Figure 14] 1 is a perspective view showing the positional relationship between the stamp, integrated film, and circuit board according to the first embodiment. FIG. [Figure 15] 3 is a cross-sectional view showing a bonded state between an integrated film and a circuit board in embodiment 1. FIG. [Figure 16] 1 is a first cross-sectional view showing a step of peeling the integrated film from the circuit board in embodiment 1. FIG. [Figure 17] 10 is a second cross-sectional view showing the step of peeling the integrated film from the circuit board in embodiment 1. FIG. [Figure 18] 10 is a third cross-sectional view showing a step of peeling the integrated film from the circuit board in embodiment 1. FIG. [Figure 19] FIG. 10 is a plan view showing a semiconductor device according to a second embodiment. [Figure 20] FIG. 10 is a plan view showing a semiconductor device according to a third embodiment. [Figure 21] 11 is a cross-sectional view showing the bonded state between an integrated film and a circuit board in embodiment 3. FIG. [Figure 22] FIG. 10 is a plan view showing a semiconductor device according to a modified example. [Figure 23] FIG. 10 is a cross-sectional view showing a semiconductor device according to a modified example. DETAILED DESCRIPTION OF THE INVENTION

[0009] Semiconductor devices according to the embodiments will be described below with reference to the drawings. A semiconductor device has a functional element that performs a predetermined function, that is, a semiconductor layer (also referred to as a semiconductor thin film or a functional thin film).

[0010] The semiconductor device is, for example, a light-emitting element such as an LED (light-emitting diode) or a surface-emitting laser, or a light-receiving element such as a photodiode. Both light-emitting elements and light-receiving elements are collectively called photoelectric conversion elements.

[0011] When the semiconductor device is a light-emitting element, it can be used in a display device such as an LED display, etc. When the semiconductor device is a light-receiving element, it can be used in an optical sensor, a photodetector, an image sensor, or a light-receiving portion for optical communication, etc.

[0012] The semiconductor device is not limited to a light emitting element or a light receiving element, but may be an electronic element such as a piezoelectric element or a MOSFET (metal oxide semiconductor field effect transistor), or may be an integrated device combining a plurality of electronic elements.

[0013] Embodiment 1 1 is an exploded perspective view showing a semiconductor device 3 of embodiment 1. The semiconductor device 3 of embodiment 1 has a circuit board 1 and an integrated film 2. The integrated film 2 is bonded to a bonding region H of the circuit board 1.

[0014] 1, a plane parallel to the first surface 11a, which is the main surface of the base material 11 of the circuit board 1, is defined as the XY plane, and the X and Y directions, which are orthogonal to each other, are defined on this plane. The direction orthogonal to the XY plane (i.e., the direction orthogonal to the first surface 11a) is defined as the Z direction.

[0015] <Configuration of the integrated film> 2 is a plan view showing the integrated film 2 of the semiconductor device 3. FIG. 3 is a cross-sectional view of the integrated film 2 taken along line III-III in FIG.

[0016] 2, the integrated film 2 has a length L1 in the X direction and a length L2 in the Y direction. The lengths L1 and L2 of the integrated film 2 are several tens of μm to several hundreds of μm.

[0017] 3, the integrated film 2 has an organic insulating layer 21 as a first insulating layer. The organic insulating layer 21 is made of a resin, for example, a thermosetting resin such as polyimide. The thickness of the organic insulating layer 21 is, for example, 20 μm.

[0018] The organic insulating layer 21 has a first surface 21a and a second surface 21b facing in opposite directions. Both the first surface 21a and the second surface 21b are smooth surfaces with a surface roughness Rz of 10 nm or less. The definition of surface roughness Rz will be described later. The second surface 21b is the surface facing the circuit board 1 and is also referred to as the facing surface.

[0019] The organic insulating layer 21 also has through holes 21c and 21d that reach the second surface 21b from the first surface 21a. The through holes 21c and 21d are formed by, for example, patterning using photolithography.

[0020] A functional element 22 is formed on the first surface 21a of the organic insulating layer 21. The functional element 22 is, for example, a light-emitting element or a light-receiving element such as an LED (light-emitting diode). The functional element 22 may also be an electronic element such as a piezoelectric element or a MOSFET. The functional element 22 is also referred to as a semiconductor thin film or a functional thin film.

[0021] The functional element 22 is bonded by intermolecular forces to the first surface 21a of the organic insulating layer 21. The functional element 22 is disposed between the through holes 21c and 21d of the organic insulating layer 21 in the Y direction.

[0022] As shown in FIG. 2, on the organic insulating layer 21, functional elements 22R, 22G, and 22B that emit (or receive) light in different wavelength bands are arranged in the X direction.

[0023] The red functional element 22R is made of a material containing, for example, GaAs (gallium arsenide), the green functional element 22G is made of a material containing, for example, GaN (gallium nitride), and the blue functional element 22B is made of a material containing, for example, GaN.

[0024] The functional elements 22R, 22G, and 22B will be described as the functional element 22 when there is no need to distinguish them from one another.

[0025] 3, an anode terminal surface 22a and a cathode terminal surface 22k are formed on the surface of the functional element 22 (i.e., the surface opposite to the organic insulating layer 21). The anode terminal surface 22a is also referred to as a first terminal surface, and the cathode terminal surface 22k is also referred to as a second terminal surface.

[0026] The integrated film 2 has an electrode 23 inside the through-hole 21c of the organic insulating layer 21, and an electrode 24 inside the through-hole 21d. The electrodes 23 and 24 are thin films made of a metal such as Au (gold), Pt (platinum), or AuGeNi. The thickness of the electrodes 23 and 24 is, for example, 200 nm.

[0027] The electrodes 23 and 24 are exposed through the through holes 21c and 21d from the second surface 21b of the organic insulating layer 21. The exposed surfaces (lower surfaces) of the electrodes 23 and 24 have a surface roughness Rz of, for example, 10 nm or less.

[0028] The integrated film 2 has an anode wiring layer 25 extending from the anode terminal surface 22a of the functional element 22 to the electrode 23, and a cathode wiring layer 26 extending from the cathode terminal surface 22k of the functional element 22 to the electrode 24.

[0029] The anode wiring layer 25 and the cathode wiring layer 26 are formed of the same material as the electrodes 23, 24. The anode wiring layer 25 electrically connects the anode terminal surface 22a of the functional element 22 to the electrode 23. The cathode wiring layer 26 electrically connects the cathode terminal surface 22k of the functional element 22 to the electrode 24.

[0030] When the functional elements 22R, 22G, and 22B are light-emitting elements (LEDs), the red light-emitting unit 20R is formed by the functional element 22R, the electrodes 23 and 24, and the wiring layers 25 and 26. The green light-emitting unit 20G is formed by the functional element 22G, the electrodes 23 and 24, and the wiring layers 25 and 26. The blue light-emitting unit 20B is formed by the functional element 22B, the electrodes 23 and 24, and the wiring layers 25 and 26.

[0031] An interlayer insulating film 27 is formed between the functional element 22 and the anode wiring layer 25, except for the connection between the anode terminal surface 22a and the anode wiring layer 25. Similarly, an interlayer insulating film 28 is formed between the functional element 22 and the cathode wiring layer 26, except for the connection between the cathode terminal surface 22k and the cathode wiring layer 26. These interlayer insulating films 27 and 28 are omitted from Figures 1 and 2, etc.

[0032] <Circuit board configuration> Fig. 4 is a cross-sectional view showing the circuit board 1. Fig. 5 is a plan view showing the circuit board 1. Fig. 4 corresponds to a cross-sectional view taken along line IV-IV shown in Fig. 5.

[0033] As shown in FIG. 4, the circuit board 1 has a substrate 11. The substrate 11 is formed of, for example, a glass substrate. The substrate 11 has a first surface 11a and a second surface 11b facing in opposite directions. The substrate 11 can be made of a rigid material such as silicon or glass epoxy resin (glass fiber impregnated with epoxy resin and then thermoset), or a flexible material such as polyimide or LCP (liquid crystal polymer). Furthermore, when the substrate 11 is formed of a flexible material, a support layer may be formed on the second surface 11b.

[0034] The circuit board 1 has an insulating film 12 covering the first surface 11a of the base material 11. The insulating film 12 is made of an organic or inorganic material. The organic material is preferably polyimide, epoxy resin, or acrylic resin. The inorganic material is preferably an oxide film or a nitride film. For example, SiO2 (silicon oxide) can be used as the oxide film, and Si3N4 (silicon nitride) can be used as the nitride film.

[0035] The thickness of insulating film 12 is, for example, 2 μm or less. Insulating film 12 has a surface 12a opposite to substrate 11 and a back surface 12b in contact with first surface 11a of substrate 11. Surface 12a of insulating film 12 is a smooth surface with a surface roughness Rz of 10 nm or less. Insulating film 12 has the function of holding integrated film 2 on surface 12a and ensuring insulation between substrate 11 and integrated film 2.

[0036] The circuit board 1 has inorganic conductive films 13 and 14 as pads. The inorganic conductive films 13 and 14 are formed on the first surface 11a of the base material 11 and exposed on the surface 12a of the insulating film 12. Both of the inorganic conductive films 13 and 14 are formed from an inorganic material having electrical conductivity. Desirable examples of the inorganic material having electrical conductivity include a metal such as Au, or a transparent conducting oxide (TCO) such as ITO (indium tin oxide).

[0037] The inorganic conductive film 13 has base pads 13b formed on the first surface 11a of the base material 11 and connection pads 13a exposed on the surface of the insulating film 12. In Fig. 4, the area of ​​the connection pads 13a (area in the XY plane) is smaller than the area of ​​the base pads 13b, but these areas may be the same.

[0038] Similarly, the inorganic conductive film 14 has base pads 14b formed on the first surface 11a of the substrate 11 and connection pads 14a exposed on the surface of the insulating film 12. Although the area of ​​the connection pads 14a is smaller than the area of ​​the base pads 14b in FIG. 4, these areas may be the same.

[0039] The inorganic conductive film 13 is connected to vertical wiring (not shown) that extends in the Y direction within the base material 11. The inorganic conductive film 14 is connected to horizontal wiring (not shown) that extends in the X direction within the base material 11.

[0040] The circuit board 1 has an inorganic conductive film 15 as a contact portion on the surface 12a of the insulating film 12. The inorganic conductive film 15 is made of an inorganic material having electrical conductivity. The inorganic material having electrical conductivity is preferably a metal such as Au or a TCO such as ITO.

[0041] The inorganic conductive film 15 has a thickness h of 200 nm or less. The inorganic conductive film 15 protrudes from the surface 12a of the insulating film 12 by the thickness h (200 nm or less).

[0042] The surfaces of these inorganic conductive films 13, 14, and 15 opposite to the substrate 11 (top surfaces in FIG. 4) are smooth surfaces with a surface roughness Rz of 10 nm or less.

[0043] 5, three inorganic conductive films 13 are arranged at intervals in the X direction on the substrate 11. The inorganic conductive films 13 are formed at positions corresponding to the electrodes 23 (FIG. 2) of the light-emitting portions 20R, 20G, and 20B of the integrated film 2. The inorganic conductive film 14 is formed at a position corresponding to the electrode 24 of the integrated film 2.

[0044] On the other hand, the inorganic conductive film 15 is formed on the substrate 11 along the contour of the bonding region H of the integrated film 2. Here, the inorganic conductive film 15 is formed so as to surround the inorganic conductive films 13 and 14 serving as pads.

[0045] <Configuration of semiconductor device> 6 is a cross-sectional view showing a semiconductor device 3. A second surface 21b of the organic insulating layer 21 of the integrated film 2 is bonded to a surface 12a of the insulating film 12 of the circuit board 1. Furthermore, the lower surfaces (exposed surfaces from the organic insulating layer 21) of the electrodes 23 and 24 of the integrated film 2 are bonded to the upper surfaces (exposed surfaces from the insulating film 12) of the inorganic conductive films 13 and 14 of the circuit board 1.

[0046] As a result, the anode terminal surface 22a of the functional element 22 of the integrated film 2 and the inorganic conductive film 13 are electrically connected, and the cathode terminal surface 22k and the inorganic conductive film 14 are electrically connected.

[0047] When a voltage is applied between the inorganic conductive films 13 and 14 via the column wiring and row wiring (not shown) of the circuit board 1, a current flows from the anode terminal surface 22a to the cathode terminal surface 22k of the integrated film 2, causing light to be emitted from the light-emitting region of the functional element 22. That is, red, green, and blue light are emitted from the functional elements 22R, 22G, and 22B shown in FIG. 2, respectively.

[0048] <Manufacturing method of integrated film> Next, a method for manufacturing the integrated film 2 will be described. Figures 7(A) to 7(F) are cross-sectional views showing each step of the method for manufacturing the integrated film 2. A formation substrate 7 shown in Figure 7(A) is used to manufacture the integrated film 2. The formation substrate 7 is a wafer made of, for example, Si (silicon). The surface 7a (main surface) of the formation substrate 7 is a smooth surface with a surface roughness Rz of 10 nm or less.

[0049] 7(B), an organic insulating layer 21 is formed by, for example, spin coating on the surface 7a of the formation substrate 7. As described above, the organic insulating layer 21 is made of, for example, a resin such as polyimide, and has a thickness of, for example, 20 μm.

[0050] 7(C), through-holes 21c and 21d are formed in the organic insulating layer 21 by patterning using, for example, photolithography. The through-holes 21c and 21d are formed so as to penetrate the organic insulating layer 21 from the first surface 21a to the second surface 21b.

[0051] 7(D), electrodes 23 and 24 are formed, for example, by vapor deposition, at predetermined locations including the through-holes 21c and 21d of the organic insulating layer 21. As described above, the electrodes 23 and 24 are made of, for example, Au, Pt, or AuGeNi, and have a thickness of, for example, 200 nm.

[0052] 7(E), the functional element 22 manufactured by a predetermined manufacturing apparatus is transferred to the first surface 21a of the organic insulating layer 21. The functional element 22 is bonded to the first surface 21a of the organic insulating layer 21 by intermolecular forces.

[0053] Next, as shown in FIG. 7(F), interlayer insulating films 27 and 28 are formed using a predetermined insulating material by, for example, photolithography and vapor deposition, and an anode wiring layer 25 and a cathode wiring layer 26 are formed using the same material as the electrodes 23 and 24.

[0054] In this way, the integrated film 2 is formed on the surface 7a of the formation substrate 7. The lower surfaces of the electrodes 23 and 24 of the integrated film 2 (surfaces exposed from the organic insulating layer 21) are in contact with the surface 7a of the formation substrate 7.

[0055] The second surface 21b of the organic insulating layer 21 of the integrated film 2 and the lower surfaces (exposed surfaces) of the electrodes 23 and 24 form a first bonding surface to be bonded to the circuit board 1.

[0056] Fig. 8(A) is a plan view showing a formation substrate 7 on which a plurality of integrated films 2 are formed. Fig. 8(B) is a cross-sectional view of the formation substrate 7 taken along line VIIIB-VIIIB shown in Fig. 8(A).

[0057] 7(A) to 7(F), a plurality of integrated films 2 are formed collectively on the surface 7a of the formation substrate 7. The plurality of integrated films 2 are formed in a state where they are aligned in a grid pattern in the X and Y directions, for example.

[0058] <Circuit board manufacturing method> Next, a method for manufacturing the circuit board 1 will be described. Figures 9(A) to 9(D) are cross-sectional views showing each step of the method for manufacturing the circuit board 1. As shown in Figure 9(A), base pads 13b and 14b of inorganic conductive films 13 and 14 are formed on a base material 11 made of glass epoxy resin or the like. As described above, the inorganic conductive films 13 and 14 are formed of a conductive inorganic material such as metal or ITO.

[0059] Specifically, a photoresist is formed on the substrate 11, then a metal or ITO layer is formed by sputtering, and then unnecessary photoresist is peeled off (lift-off) to form the base pads 13b and 14b of the inorganic conductive films 13 and 14.

[0060] 9(B), an insulating film 12 is formed on the first surface 11a of the substrate 11 so as to cover the underlying pads 13b and 14b. As described above, the insulating film 12 is formed of an organic material such as polyimide, or an inorganic material such as an oxide (e.g., SiO2) or a nitride (e.g., Si3N4).

[0061] 9(C), photolithography is used for patterning to form openings 12c and 12d in the insulating film 12. The openings 12c and 12d are formed above the underlying pads 13b and 14b.

[0062] 9(D), connection pads 13a and 14a of the inorganic conductive films 13 and 14 are formed in the openings 12c and 12d by, for example, vapor deposition, and an inorganic conductive film 15 is formed on the surface 12a of the insulating film 12. Like the inorganic conductive films 13 and 14, the inorganic conductive film 15 is made of a conductive inorganic material such as metal or ITO.

[0063] As a result, the connection pads 13a, 14a of the inorganic conductive films 13, 14 are exposed on the surface 12a of the insulating film 12, and the circuit board 1 having the inorganic conductive film 15 formed on the surface 12a of the insulating film 12 is manufactured.

[0064] The surface 12 a of the insulating film 12 and the exposed surfaces of the inorganic conductive films 13 and 14 form a second bonding surface to be bonded to the first bonding surface of the integrated film 2 .

[0065] 9(A) to 9(D), the method for manufacturing the circuit board 1 is not limited to the method shown in Fig. 9(A) to 9(D). That is, it is sufficient to obtain a configuration in which the inorganic conductive films 13 and 14 are exposed on the surface 12a of the insulating film 12 and the inorganic conductive film 15 is formed on the surface 12a of the insulating film 12.

[0066] In addition, in the example shown in Figure 9(D), the surfaces of the inorganic conductive films 13 and 14 are at the same height as the surface 12a of the insulating film 12, and the inorganic conductive film 15 protrudes from the surface 12a of the insulating film 12, but this configuration is not limited to this.

[0067] For example, as in the circuit board 1A shown in FIG. 10(A), the surfaces of the inorganic conductive films 13 and 14 may protrude from the surface 12a of the insulating film 12 and be at approximately the same height as the surface of the inorganic conductive film 15.

[0068] 10(B), a part of the inorganic conductive film 15 may be accommodated in a groove 12e formed in the insulating film 12 and may protrude from the surface 12a of the insulating film 12.

[0069] 10(C), a portion of the inorganic conductive film 15 may be accommodated in a groove 12e formed in the insulating film 12, and the surface of the inorganic conductive film 15 may be at approximately the same height as the surface 12a of the insulating film 12.

[0070] <Transfer method of integrated film> Next, the transfer of the integrated film 2 from the formation substrate 7 to the circuit board 1 will be described. Fig. 11 is a flowchart showing a method for transferring the integrated film 2 to the circuit board 1. Figs. 12(A) to 12(E) are cross-sectional views showing each step of the method for transferring the integrated film 2 to the circuit board 1.

[0071] First, as shown in FIG. 12(A), the stamp 4 is used to pick up the integrated film 2 on the formation substrate 7 (step S11 in FIG. 11).

[0072] Fig. 13 is a side view showing the stamp 4. As shown in Fig. 13, the stamp 4 has a stamp substrate 40, a support layer 41, and a transfer layer 42. The stamp substrate 40 is formed, for example, from a glass plate having a thickness of 5 mm or less.

[0073] The support layer 41 is a resin layer formed on the surface of the stamp substrate 40. The transfer layer 42 is a convex portion formed on the surface of the support layer 41 opposite to the stamp substrate 40. The support layer 41 and the transfer layer 42 are made of polydimethylsiloxane (PDMS), which is an ultraviolet-curable liquid silicone.

[0074] A mold having the inverted shapes of the support layer 41 and transfer layer 42 is filled with PDMS, and the stamp substrate 40 is placed on the filled PDMS, and the PDMS is cured by heating or by irradiating with ultraviolet light through the stamp substrate 40. The stamp 4 is formed by releasing the cured resin (support layer 41 and transfer layer 42) together with the stamp substrate 40 from the mold.

[0075] The stamp substrate 40 and the support layer 41 are firmly adhered to each other, and the length of each side of the transfer layer 42 is equal to the length of each side of the integrated film 2. The viscoelasticity of the PDMS that forms the support layer 41 and the transfer layer 42 allows the transfer layer 42 to be bonded to the integrated film 2 and the integrated film 2 to be peeled off.

[0076] 12(A), the transfer layer 42 of the stamp 4 is moved onto the collecting film 2 to be picked up on the forming substrate 7. The stamp 4 is then moved downward, and the transfer layer 42 is pressed against the collecting film 2 with a pressure of approximately 1 MPa, thereby adhering the transfer layer 42 of the stamp 4 to the collecting film 2. The stamp 4 is then raised, and the collecting film 2 is peeled off from the forming substrate 7.

[0077] Next, the integrated film 2 and the circuit board 1 held by the stamp 4 are subjected to an oxygen plasma treatment (step S12 in FIG. 11). The oxygen plasma treatment is performed on the first bonding surface of the integrated film 2 (the second surface 21b of the organic insulating layer 21 and the exposed surfaces of the electrodes 23 and 24) and the second bonding surface of the circuit board 1 (the surface 12a of the insulating film 12 and the exposed surfaces of the inorganic conductive films 13 and 14). The oxygen plasma treatment is performed in a vacuum environment.

[0078] The oxidation plasma treatment provides the following two effects that are important in the bonding process of the integrated film 2.

[0079] First, a hydroxy group (-OH) is introduced as a terminal structure of molecules present on the surface (second surface 21b) of the organic insulating layer 21 of the integrated film 2 and on the surface 12a of the insulating film 12 of the circuit board 1, thereby enabling strong hydrogen bonds to be formed when the organic insulating layer 21 and the insulating film 12 are joined.

[0080] This phenomenon can occur on the surface of covalently bonded substances such as organic substances, or on the surface of ionically bonded inorganic compounds such as oxides, but does not occur on the surface of metallically bonded substances such as the electrodes 23 and 24.

[0081] Second, organic matter adsorbed on the surfaces of the electrodes 23, 24 of the integrated film 2 and on the surfaces of the inorganic conductive films 13, 14 of the circuit board 1 is attacked by the oxygen plasma and converted into gases such as carbon dioxide, thereby being removed from the surfaces. As a result, the bonding between the electrodes 23, 24 and the inorganic conductive films 13, 14 becomes a bonding between parent phases (bulks) with high interfacial energy, resulting in a strong bond second only to the hydrogen bond described above.

[0082] After the oxygen plasma treatment is completed, the integrated film 2 held by the stamp 4 is bonded to the circuit board 1 (step S13 in FIG. 11). Note that it is desirable to perform the bonding step within 5 minutes after the end of the oxygen plasma treatment to prevent organic matter from being re-adsorbed onto the surfaces that have been subjected to the oxygen plasma treatment.

[0083] In the bonding process, as shown in Fig. 12(B), the stamp 4 holding the integrated film 2 is moved onto a bonding area H (Fig. 1) on the circuit board 1 where the integrated film 2 has not yet been bonded. Note that the circuit board 1 is provided with bonding areas H equal to the number of integrated films 2 to be bonded.

[0084] 14 is a perspective view showing the positional relationship between the stamp 4 (transfer layer 42), the integrated film 2, and the circuit board 1. As shown in FIG. 14, the stamp 4 is positioned so that the electrodes 23 and 24 of the integrated film 2 and the inorganic conductive films 13 and 14 of the circuit board 1 face each other.

[0085] Furthermore, by moving the stamp 4 toward the circuit board 1, the second surface 21b of the organic insulating layer 21 of the integrated film 2 is brought into contact with the surface 12a of the insulating film 12 of the circuit board 1, and the electrodes 23, 24 of the integrated film 2 are brought into contact with the inorganic conductive films 13, 14 of the circuit board 1, respectively.

[0086] Furthermore, the integrated film 2 is pressed against the circuit board 1 with a surface pressure of approximately 2 MPa using the stamp 4, and this pressure state is maintained for 60 seconds, thereby bonding the second surface 21b of the organic insulating layer 21 of the integrated film 2 to the surface 12a of the insulating film 12 of the circuit board 1, and bonding the electrodes 23 and 24 of the integrated film 2 to the inorganic conductive films 13 and 14 of the circuit board 1, respectively.

[0087] 15 is a cross-sectional view showing the state in which the integrated film 2 held by the stamp 4 is bonded to the circuit board 1. The following three bonding areas A1, A2, and A3 are formed in the bonding area between the first bonding surface of the integrated film 2 and the second bonding surface of the circuit board 1.

[0088] The first bonding area A1 is the bonding area between the electrodes 23, 24 of the integrated film 2 and the inorganic conductive films 13, 14 of the circuit board 1. The surfaces of the electrodes 23, 24 and the inorganic conductive films 13, 14 are cleaned by oxygen plasma treatment to remove any adsorbed substances. Furthermore, if the inorganic conductive films 13, 14 are made of metal, a crimping action occurs due to the ductility of the electrodes 23, 24 and the inorganic conductive films 13, 14 when pressure is applied, and the surfaces of the electrodes 23, 24 and the inorganic conductive films 13, 14 adhere to each other, resulting in a strong bond.

[0089] The inorganic conductive films 13, 14 are not limited to metals and may be formed of TCO such as ITO. However, TCO is known to have good adhesion to metals, and the ductility of the electrodes 23, 24 provides a pressure-bonding effect, so a strong bond can be obtained in this case as well.

[0090] The second bonding region A2 is the bonding region between the end of the organic insulating layer 21 and the inorganic conductive film 15, more specifically, the bonding region between the end 21e of the second surface 21b of the organic insulating layer 21 and the inorganic conductive film 15. In the second bonding region A2, the organic insulating layer 21, which is an organic material, comes into contact with the inorganic conductive film 15, so bonding is mainly due to intermolecular forces. Because there is no pressure bonding like in the first bonding region A1 or hydrogen bonding like in the third bonding region A3 (described below), the bonding strength is lower than those of these bonding regions A1 and A3.

[0091] In addition, the end 21e of the second surface 21b of the organic insulating layer 21 of the integrated film 2 means the area (indicated by symbol E in Figure 15) closer to the outer periphery of the integrated film 2 than the center of the area from the electrode 23 (24) of the integrated film 2 to the edge F of the second surface 21b of the integrated film 2.

[0092] The third bonding region A3 is a bonding region between the organic insulating layer 21 in the center of the integrated film 2 and the insulating film 12 of the circuit board 1. As described above, hydroxyl groups (-OH) are formed on the surfaces of the organic insulating layer 21 and the insulating film 12 (if made of organic material) by oxygen plasma treatment. When the hydrogen atoms of the hydroxyl groups on each surface approach the oxygen atoms of the hydroxyl groups on the opposing surface, a dipole-dipole attractive force is generated, forming a strong hydrogen bond.

[0093] The insulating film 12 may be made of an inorganic material, but when an ionic oxide is used as the inorganic material, hydrogen bonds are formed as described above, resulting in a strong bond. It is also known that when a covalent nitride is used as the inorganic material, a bond similar to that between organic materials can be obtained, and in this case too, a generally strong bond can be obtained.

[0094] 15, the second surface 21b of the organic insulating layer 21 of the integrated film 2 abuts against the inorganic conductive film 15 protruding from the surface 12a of the insulating film 12 of the circuit board 1. Therefore, due to the curvature of the organic insulating layer 21, a gap C is generated between the organic insulating layer 21 and the insulating film 12. This gap C serves to facilitate peeling of the integrated film 2, which will be described later.

[0095] Furthermore, the inorganic conductive film 15 of the circuit board 1 protrudes outward beyond the edge F of the second surface 21b of the organic insulating layer 21 of the integrated film 2. This is to prevent the inorganic conductive film 15 from adhering to the organic insulating layer 21 and peeling off from the insulating film 12 when the integrated film 2 is peeled off, as will be described later.

[0096] After all of the integrated films 2 to be bonded to the circuit board 1 have been bonded, each integrated film 2 is inspected (step S14 in FIG. 11).

[0097] In the process of inspecting the integrated film 2, an inspection device 8 having an inspection control unit 81 and a light receiving device 82 is used, as shown in Figure 12(C). The light receiving device 82 has a light receiving unit facing all of the integrated films 2 on the circuit board 1.

[0098] During the inspection, the inspection control unit 81 applies electricity to the circuit board 1, causing the functional elements 22 of each integrated film 2 to emit light, which is received by each light receiving unit of the light receiving device .

[0099] Next, it is determined whether the inspection results of each integrated film 2 are good or not (step S15 in FIG. 11). Specifically, the inspection control unit 81 determines whether the emitted light amount is within a specified range for each integrated film 2 on the circuit board 1. The inspection control unit 81 stores the normal light amount range for the current supplied to the integrated film 2, and makes the determination based on this.

[0100] The inspection of each integrated film 2 is not limited to the detection of the amount of light, but may be performed by measuring, for example, electrical resistance.

[0101] If, as a result of inspection of each integrated film 2 on the circuit board 1, any integrated film 2 is determined to be defective, a repair process is carried out in which the integrated film 2 determined to be defective (referred to as integrated film 2E) is peeled off from the circuit board 1 and a new integrated film 2 is joined to the circuit board 1 (step S16).

[0102] Specifically, as shown in Fig. 12(D), the stamp 4 is moved onto the accumulated film 2E that has been determined to be defective. The stamp 4 is then lowered to apply a surface pressure of approximately 1 MPa to the accumulated film 2E, thereby adhering the transfer layer 42 to the accumulated film 2E. The stamp 4 is then raised.

[0103] The rising speed of the stamp 4 at this time is slower than the rising speed of the stamp 4 when picking up the integrated film 2 from the formation substrate 7 (FIG. 12(A)) or after transferring to the circuit board 1 (FIG. 12(B)).

[0104] 16 is a cross-sectional view illustrating a step of peeling the integrated film 2E from the circuit board 1. The bonding strength between the integrated film 2E and the circuit board 1 is lowest in the second bonding region A2 where the end 21e of the second surface 21b of the organic insulating layer 21 is bonded to the inorganic conductive film 15. PDMS, which forms the transfer layer 42 of the stamp 4, is a deformable elastic material.

[0105] Therefore, as shown in FIG. 17, as the stamp 4 rises, peeling starts from the end 21e of the second surface 21b of the organic insulating layer 21 of the integrated film 2E.

[0106] Furthermore, a gap C (Figure 16) is formed between the second surface 21b of the organic insulating layer 21 and the insulating film 12 adjacent to the inorganic conductive film 15, which further promotes peeling starting from the end 21e of the second surface 21b of the organic insulating layer 21.

[0107] The size of the gap C depends on the amount of protrusion (thickness h shown in FIG. 4) of the inorganic conductive film 15 from the surface 12a of the insulating film 12. To keep the curvature (warping) of the organic insulating layer 21 within an appropriate range, it is desirable that the amount of protrusion of the inorganic conductive film 15 be 1 / 100 or less of the length L1 (FIG. 2) of the integrated film 2, which is set to 200 nm here.

[0108] As the stamp 4 continues to rise at a low speed, the integrated film 2E is peeled off from the circuit board 1 while still adhering to the stamp 4, and is completely separated from the circuit board 1 as shown in Fig. 18. The integrated film 2E peeled off from the circuit board 1 is transported by the stamp 4 to a predetermined storage location.

[0109] After peeling off the integrated film 2E determined to be defective from the circuit board 1, a new integrated film 2 is picked up from the formation substrate 7 and bonded to the circuit board 1. The method of picking up the integrated film 2 from the formation substrate 7 and bonding it to the circuit board 1 is as described with reference to Figures 12(A) and (B).

[0110] After the repair process is completed, the integrated film 2 and the circuit board 1 are subjected to a heat treatment (annealing) (step S17 in FIG. 11). The heat treatment involves holding the circuit board to which the integrated film 2 is bonded in an inert gas environment at approximately 200°C for one hour. This causes the following two types of interfacial reactions to occur, strengthening the bond between the integrated film 2 and the circuit board 1.

[0111] First, in the first bonding region A1, a strong bond is obtained at the interface between the electrodes 23, 24 of the integrated film 2 and the inorganic conductive films 13, 14 of the circuit board 1 by diffusing metal atoms of the electrodes 23, 24 into the inorganic conductive films 13, 14 due to the high temperature. For example, if Au is used for the electrodes 23, 24, the melting point Tm is 1337 K and the heat treatment temperature T is 623 K (350°C), so T / Tm is approximately 0.5, which fully satisfies the conditions for diffusion of metal atoms.

[0112] Furthermore, when the inorganic conductive films 13 and 14 are made of metal, the diffusion of metal atoms from the inorganic conductive films 13 and 14 into the electrodes 23 and 24, in addition to the diffusion of metal atoms from the electrodes 23 and 24, results in an even stronger bond.

[0113] Second, in the third bonding region A3, dehydration condensation occurs in the hydrogen bonds between OH groups at the interface between the organic insulating layer 21 of the integrated film 2 and the insulating film 12 (in the case of an organic material or oxide) of the circuit board 1 due to high temperature, and the hydrogen at the interface is released as water (HO), changing the bonding state from a hydrogen bond to a more stable molecular bond, resulting in an even stronger bonding state.

[0114] On the other hand, the second bonding region A2 where the end of the integrated film 2 (the end 21e of the second surface 21b of the organic insulating layer 21) is bonded to the inorganic conductive film 15 is less affected by the heat treatment than the other bonding regions A1 and A3. However, because the bonding strength in the bonding regions A1 and A3 is strong as described above, the integrated film 2 is prevented from peeling off from the circuit board 1 after the heat treatment.

[0115] In this way, a semiconductor device 3 is manufactured in which the integrated film 2 is bonded to the circuit board 1. Since there is no need to use a stripping liquid in the repair step (step S16), the manufacturing process can be simplified. Note that the integrated film 2 may be inspected again after the repair step.

[0116] Although the example in which the organic insulating layer 21 of the integrated film 2 and the insulating film 12 of the circuit board 1 are bonded in the third bonding region A3 has been described here, they may be spaced apart. For example, if the surfaces of the inorganic conductive films 13 and 14 protrude beyond the surface 12a of the insulating film 12 as shown in Figure 10(A), the organic insulating layer 21 of the integrated film 2 and the insulating film 12 of the circuit board 1 may be spaced apart.

[0117] In this case as well, the effect of firmly bonding the integrated film 2 to the circuit board 1 can be obtained due to the high bonding strength between the electrodes 23, 24 and the inorganic conductive films 13, 14 in the first bonding region A1.

[0118] Furthermore, although an example in which a void C (FIGS. 15 and 16) is formed adjacent to the inorganic conductive film 15 has been described here, the void C does not necessarily have to be formed. For example, when the inorganic conductive film 15 is at the same height as the surface 12a of the insulating film 12 as shown in FIG. 10(C), no void C is formed between the organic insulating layer 21 of the integrated film 2 and the insulating film 12 of the circuit board 1.

[0119] In this case as well, the effect of facilitating peeling of the integrated film 2 in the repair process can be obtained due to the low bonding strength between the organic insulating layer 21 and the inorganic conductive film 15 in the second bonding region A2.

[0120] Furthermore, when the inorganic conductive film 15 is accommodated in a groove 12e formed in the insulating film 12 as shown in Figure 10(B), the contact area between the inorganic conductive film 15 and the insulating film 12 is increased, thereby preventing the inorganic conductive film 15 from peeling off from the insulating film 12 when the integrated film 2 is peeled off.

[0121] <Surface roughness> Finally, we will explain surface roughness. JIS_B_0601 specifies the "arithmetic mean roughness Ra," "maximum height difference Ry," "root mean square roughness Rq," and "n-point average roughness Rz." In this specification, however, the "n-point average roughness Rz" is used as the surface roughness of each surface. Measurements are made, for example, using an atomic force microscope (AFM) to measure a 5 μm × 5 μm area of ​​the surface to be measured, and the calculated value of the n-point average roughness is obtained.

[0122] Specifically, the n-point average roughness Rz is calculated from the planar image of the surface to be measured obtained by AFM using the following formula, which is the average value of the height (Rti) of the profile curve element over the reference length, in accordance with the measurement method for n-point average roughness Rz specified in JIS_B_0601.

[0123]

number

[0124] As a measuring device, for example, an AFM "L-trace II" manufactured by Hitachi High-Tech Fielding Corporation can be used, and as a measurement condition (measurement mode), for example, the "tapping AFM mode" of the "L-trace II" manufactured by Hitachi High-Tech Fielding Corporation can be used.

[0125] The measurement range is an arbitrary 5 μm x 5 μm range on the surface to be measured, the resolution is 512 pixels x 512 pixels, and the scan speed is 1 μm / sec. From the planar image obtained by AFM, a step profile with a reference length of 5 μm is obtained in an arbitrary horizontal direction (the same direction as the probe scanning direction), and the n-point average roughness Rz is calculated.

[0126] <Advantages of First Embodiment> As described above, the semiconductor device 3 of the first embodiment includes an integrated film 2 and a circuit board 1. The integrated film 2 has a second surface 21b (opposing surface) facing the circuit board 1 and includes an organic insulating layer (first insulating layer) 21 formed of an organic material, a functional element 22, and electrodes 23 and 24 electrically connected to the functional element 22 and exposed from the second surface 21b. The second surface 21b and the electrodes 23 and 24 form a first bonding surface. The circuit board 1 has inorganic conductive films 13, 14, and 15 and an insulating film 12 (second insulating layer) formed of an organic or inorganic material. The inorganic conductive films 13 and 14 and the insulating film 12 form a second bonding surface that bonds to the first bonding surface. The bonding regions of the first and second bonding surfaces include a first bonding region A1 and a second bonding region A2. The first bonding region A1 is a bonding region where the electrodes 23, 24 are bonded to the inorganic conductive films 13, 14. The second bonding region A2 is a region where the inorganic conductive film 15 is bonded to the end portion 21e of the second surface 21b, which is closer to the edge portion F of the second surface 21b than the electrode 23 (24).

[0127] In this way, the end 21e of the second surface 21b of the organic insulating layer 21 of the integrated film 2 is bonded to the inorganic conductive film 15 of the circuit board 1, so that when peeling the integrated film 2 from the circuit board 1, it can be peeled from the end of the integrated film 2. More specifically, because the bonding strength of the second bonding region A2 where the above-mentioned end 21e and the inorganic conductive film 15 are bonded is lower than the bonding strength of the first bonding region A1, peeling from the circuit board 1 proceeds starting from the end of the integrated film 2.

[0128] Therefore, in a repair process or the like, the integrated film 2E can be easily peeled off from the circuit board 1. Since there is no need to apply a peeling liquid when peeling off the integrated film 2E, the work efficiency can be improved and the manufacturing process can be simplified.

[0129] In addition, since the integrated film 2 further has a third bonding area A3 where the second surface 21b of the organic insulating layer 21 (first insulating layer) is bonded to the insulating film 12 (second insulating layer), the integrated film 2 can be more firmly bonded to the circuit board 1, and peeling of the integrated film 2 from the circuit board 1 can be prevented.

[0130] Furthermore, when the organic insulating layer 21 (first insulating layer) and the insulating film 12 (second insulating layer) are both made of organic materials, hydrogen bonding in the hydroxy groups can be utilized to firmly bond the integrated film 2 to the circuit board 1. In addition, the integrated film 2 and the circuit board 1 can be bonded more firmly by heat treatment after the repair process.

[0131] Furthermore, the inorganic conductive film 15 protrudes toward the integrated film 2 side beyond the insulating film 12 (second insulating layer), and a gap C is formed between the second surface 21b of the organic insulating layer 21 (first insulating layer) and the insulating film 12. Therefore, when peeling the integrated film 2 from the circuit board 1, the presence of the gap C makes it easier to peel the integrated film 2.

[0132] Furthermore, because inorganic conductive film 15 of circuit board 1 protrudes outward beyond edge F of second surface 21b of organic insulating layer 21 of integrated film 2, when integrated film 2 is peeled off, force is less likely to act in a direction that peels inorganic conductive film 15 off insulating film 12. This makes it possible to prevent inorganic conductive film 15 from peeling off insulating film 12.

[0133] Embodiment 2 19 is a plan view showing a circuit board 5 in a semiconductor device of embodiment 2. Circuit board 5 of embodiment 2 has an assembly 50 of a plurality of inorganic conductive films 51 instead of inorganic conductive film 15 (FIG. 5) of embodiment 1. Base material 11, insulating film 12, and inorganic conductive films 13 and 14 of circuit board 5 are as described in embodiment 1.

[0134] 19, the aggregate 50 of inorganic conductive films 51 has a shape obtained by dividing the inorganic conductive film 15 (FIG. 5) of the first embodiment in the X direction and the Y direction. That is, a plurality of inorganic conductive films 51 as contact portions are arranged along the outline of the bonding region H on the circuit board 5 (more specifically, along two sides in the X direction and two sides in the Y direction).

[0135] 19, the inorganic conductive films 51 arranged in the X direction have a rectangular shape that is long in the X direction, and the inorganic conductive films 51 arranged in the Y direction have a rectangular shape that is long in the Y direction. However, the inorganic conductive films 51 may have other shapes.

[0136] The inorganic conductive film 51 is formed of a conductive inorganic material such as metal or TCO. The inorganic conductive film 51 has a thickness of, for example, 200 nm. The inorganic conductive film 51 has a surface roughness Rz of, for example, 10 nm or less. The gap between adjacent inorganic conductive films 51 is defined as D1.

[0137] The method for bonding the integrated film 2 (FIG. 15) to the circuit board 5 is the same as that described in embodiment 1. In embodiment 2, since multiple inorganic conductive films 51 are arranged, the bonding area between the organic insulating layer 21 of the integrated film 2 and the inorganic conductive film 51 is smaller than in embodiment 1. Therefore, in the repair process (step S16 in FIG. 11) after bonding the integrated film 2 to the circuit board 5, the integrated film 2 can be easily peeled off from the circuit board 5.

[0138] In particular, by appropriately setting the gap D1 between adjacent inorganic conductive films 51, a gap is generated between the organic insulating layer 21 of the integrated film 2 and the insulating film 12 of the circuit board 5, making it easier to peel off the integrated film 2. This gap D1 is, for example, 5 μm or less (more preferably 3 μm or less).

[0139] 19, a plurality of inorganic conductive films 51 of the same shape are arranged, but a plurality of inorganic conductive films 51 of different shapes and dimensions may also be arranged. The number of inorganic conductive films 51 may be two or more.

[0140] Except for the points mentioned above, the semiconductor device of the second embodiment is configured similarly to the semiconductor device 3 of the first embodiment.

[0141] As described above, in embodiment 2, since the circuit board 5 has multiple inorganic conductive films 51, the integrated film 2 can be easily peeled off from the circuit board 5 in the repair process after the integrated film 2 is bonded to the circuit board 5.

[0142] Embodiment 3 20 is a plan view showing a circuit board 6 in a semiconductor device according to embodiment 3. Circuit board 6 according to embodiment 3 has an assembly 60 of inorganic conductive films 61, 62, and 63 instead of inorganic conductive film 15 (FIG. 5) according to embodiment 1. Base material 11 and insulating film 12 of circuit board 6 are as described in embodiment 1.

[0143] 20, inorganic conductive films 61 and 62 are formed at positions facing electrodes 23 (FIG. 21, which will be described later) of integrated film 2. Inorganic conductive film 62 is disposed on both sides of inorganic conductive film 61 in the X direction.

[0144] The inorganic conductive film 61 has a pad portion 61a having a shape similar to that of the inorganic conductive film 13 of embodiment 1 (Figure 6), and an extension portion 61b extending from near the surface of the pad portion 61a to the Y-direction end of the bonding area H on the circuit board 6.

[0145] The inorganic conductive film 62 has a pad portion 62a having a shape similar to that of the inorganic conductive film 13 of the first embodiment (FIG. 6), an extension portion 62b extending from near the surface of the pad portion 62a to the Y-direction end of the bonding region H on the circuit board 6, and a protrusion 62c protruding from the X-direction end of the extension portion 62b toward the center of the bonding region H in the Y direction.

[0146] The inorganic conductive film 63 has a pad portion 63a having a shape similar to that of the inorganic conductive film 14 of the first embodiment (FIG. 6), an extension portion 63b extending from the vicinity of the surface of the pad portion 63a to the Y-direction end portion of the bonding region H on the circuit board 6, and a protrusion portion 63c protruding from both X-direction end portions of the extension portion 63b toward the center of the bonding region H in the Y direction.

[0147] The inorganic conductive films 61, 62, and 63 are each formed of a conductive inorganic material such as metal or TCO. The thickness of the inorganic conductive films 61, 62, and 63 excluding the pad portions 61 a, 62 a, and 63 a is, for example, 200 nm. The surface roughness Rz of the inorganic conductive films 61, 62, and 63 is, for example, 10 nm or less.

[0148] A gap E1 is formed in the X direction between the extending portion 61b of the inorganic conductive film 61 and the extending portion 62b of the inorganic conductive film 62. The gap E1 is desirably, for example, 3 μm or more so that the inorganic conductive films 61 and 62 are not electrically connected to each other.

[0149] A gap E2 is formed in the Y direction between the protruding portion 61c (62c) of the inorganic conductive film 61 (62) and the protruding portion 63c of the inorganic conductive film 63. It is desirable that the gap E2 be, for example, 3 μm or more so that the inorganic conductive film 61 (62) and the inorganic conductive film 63 are not electrically connected to each other.

[0150] Figure 21 is a cross-sectional view showing a step of bonding integrated film 2 to circuit board 6 in embodiment 3, and corresponds to the cross-sectional view taken along line XXI-XXI shown in Figure 20. As shown in Figure 21, the bonding area between electrodes 23 and 24 of integrated film 2 and pad portions 61a, 62a, and 63a of circuit board 1 is a first bonding area A1.

[0151] The bonding area between the organic insulating layer 21 and the inorganic conductive films 61, 62, and 63 at the end of the integrated film 2 is a second bonding area A2. The bonding area between the organic insulating layer 21 and the insulating film 12 at the center of the integrated film 2 is a third bonding area A3.

[0152] In FIG. 21, for convenience of illustration, the organic insulating layer 21 of the integrated film 2 and the insulating film 12 of the circuit board 6 are shown separated from each other in the third bonding region A3, but it is preferable that they are in contact with each other.

[0153] In the third embodiment, each of the inorganic conductive films 61, 62, and 63 extends from the first bonding region A1 to the second bonding region A2 (the inorganic conductive film 62 is not shown in the cross section of FIG. 21).

[0154] Therefore, compared to embodiment 1, the area of ​​the bonding region (third bonding region A3) between organic insulating layer 21 and insulating film 12 is relatively small, and the area of ​​the bonding region (second bonding region A2) between organic insulating layer 21 and inorganic conductive films 61, 62, 63 is relatively large. Since the bonding strength in second bonding region A2 is lower than the bonding strength in third bonding region A3, the bonding strength between integrated film 2 and circuit board 6 is lower compared to embodiment 1.

[0155] Therefore, in the repair process after the integrated film 2 is bonded to the circuit board 6, the integrated film 2 can be easily peeled off from the circuit board 6.

[0156] Except for the points mentioned above, the semiconductor device of the third embodiment is configured similarly to the semiconductor device 3 of the first embodiment.

[0157] As described above, in the third embodiment, the inorganic conductive films 61, 62, and 63 extend from the first bonding region A1 (the bonding region between the electrodes 23 and 24 and the pad portions 61a, 62a, and 63a) to the second bonding region A2 (the bonding region between the organic insulating layer 21 and the inorganic conductive films 61, 62, and 63). Therefore, in the repair process after bonding the integrated film 2 to the circuit board 5, the integrated film 2 can be easily peeled off from the circuit board 5.

[0158] All or part of the configurations of the respective embodiments may be appropriately combined with each other in Embodiments 1 to 3. For example, the configurations described with reference to Figures 10(A) to 10(C) may be applied to the inorganic conductive film 51 of the circuit board 5 of Embodiment 2 or the inorganic conductive films 61, 62, and 63 of the circuit board 6 of Embodiment 3.

[0159] 10(B), a portion of the inorganic conductive film 51 or the inorganic conductive films 61, 62, 63 may be accommodated in a groove 12e formed in the insulating film 12 and may protrude from the surface 12a of the insulating film 12. Alternatively, a portion of the inorganic conductive film 51 or the inorganic conductive films 61, 62, 63 may be accommodated in a groove 12e formed in the insulating film 12 and may have a surface at approximately the same height as the surface 12a of the insulating film 12, as in the circuit board 1B shown in FIG.

[0160] Variant. Next, we will explain modified examples of the integrated film 2. In the integrated film 2 explained in the first to third embodiments, as shown in Fig. 3, the functional element 22 is formed on the first surface 21a of the organic insulating layer 21, and the electrodes 23 and 24 are exposed from the second surface 21b, but the present invention is not limited to such a configuration.

[0161] Fig. 22 is a plan view showing a modified integrated film 9. Fig. 23 is a cross-sectional view showing a semiconductor device having the integrated film 9 and the circuit board 1. Fig. 23 corresponds to the cross section taken along line XXIII-XXIII shown in Fig. 22.

[0162] As shown in FIG. 23, the integrated film 9 includes an organic insulating layer 91 as a first insulating layer, a functional element 92, electrodes 93 and 94, a wiring layer 95, and an interlayer insulating film 96.

[0163] The organic insulating layer 91 has a first surface 91a and a second surface 91b facing in opposite directions. The second surface 91b faces the circuit board 1 and is also referred to as the opposing surface. The material forming the organic insulating layer 91 is the same as the material forming the organic insulating layer 21 described in the first embodiment.

[0164] The electrodes 93 and 94 are covered with an organic insulating layer 91. The lower surfaces (surfaces on the circuit board 1 side) of the electrodes 93 and 94 are exposed from the second surface 91b. The material forming the electrodes 93 and 94 is the same as the material forming the electrodes 23 and 24 described in the first embodiment.

[0165] The functional element 92 is formed on the electrode 94 and is covered with the organic insulating layer 91. That is, the functional element 92 is located on the side opposite to the circuit board 1 with respect to the second surface 91b (opposing surface) of the organic insulating layer 91.

[0166] The functional element 92 has an anode terminal surface 92a on its upper surface (the surface opposite to the electrode 94) and a cathode terminal surface 92k on its lower surface (the surface on the electrode 94 side). The functional element 92 is, for example, a light-emitting element or a light-receiving element such as an LED, or another electronic element (semiconductor element).

[0167] A cathode terminal surface 92k of the functional element 92 is joined to an electrode 94. A wiring layer 95 extends so as to connect an anode terminal surface 92a of the functional element 92 to the electrode 93. An interlayer insulating film 96 is formed below the wiring layer 95 (on the circuit board 1 side).

[0168] As a result, the anode terminal surface 92 a of the functional element 92 is electrically connected to the electrode 93 , and the cathode terminal surface 92 k is electrically connected to the electrode 94 .

[0169] 22, functional elements 92R, 92G, and 92B that emit (or receive) light in different wavelength bands are arranged in the X direction on a common electrode 94. The functional elements 92R, 92G, and 92B are individually connected to the electrode 93 by the above-mentioned wiring layer 95. When there is no need to distinguish between the functional elements 92R, 92G, and 92B, they will be referred to as functional element 92.

[0170] A semiconductor device is formed by bonding integrated film 9 to circuit board 1. The configuration of circuit board 1 is as described in embodiments 1 to 3. Alternatively, the configurations of the circuit boards described in embodiments 1 to 3 may be combined.

[0171] As shown in Figure 23, the bonding area between the integrated film 9 and the circuit board 1 includes a first bonding area A1 where electrodes 93, 94 are bonded to inorganic conductive films 13, 14, a second bonding area A2 where the end 91e of the second surface 91b of the integrated film 9 is bonded to the inorganic conductive film 15, and a third bonding area A3 at the center of the integrated film 9 where the organic insulating layer 91 (or interlayer insulating film 96) is bonded to the insulating film 12 of the circuit board 1.

[0172] In this modified example, the bonding strength in the second bonding area A2 is smaller than the bonding strength in the first bonding area A1, which makes it easier to peel off the integrated film 9 in the repair process (step S16 in Figure 11), thereby simplifying the manufacturing process.

[0173] Although the preferred embodiments have been specifically described above, the present disclosure is not limited to the above-described embodiments, and various improvements and modifications can be made.

[0174] Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) A semiconductor device having an integrated film and a circuit substrate, The accumulation film is a first insulating layer made of an organic material and having a surface facing the circuit board; A functional element; an electrode electrically connected to the functional element and exposed from the opposing surface; and the opposing surface of the first insulating layer and the electrode form a first bonding surface; The circuit board includes: a second insulating layer formed of an organic or inorganic material; an inorganic conductive film formed from an inorganic material; and the second insulating layer and the inorganic conductive film form a second bonding surface that is bonded to the first bonding surface; In the bonding region between the first bonding surface and the second bonding surface, a first bonding region where the electrode and the inorganic conductive film are bonded; a second bonding region where an end portion of the opposing surface, which is closer to the edge portion of the opposing surface than the electrode, is bonded to the inorganic conductive film; is formed A semiconductor device characterized by: (Appendix 2) The insulating layer further includes a third junction region where the first insulating layer and the second insulating layer are joined. 2. The semiconductor device according to claim 1, (Appendix 3) The first insulating layer and the second insulating layer are both formed of an organic material. 3. The semiconductor device according to claim 1 or 2. (Appendix 4) the inorganic conductive film protrudes toward the first bonding surface beyond the second insulating layer, A gap is formed between the opposing surface of the first insulating layer and the second insulating layer. 4. The semiconductor device according to claim 1, wherein: (Appendix 5) the inorganic conductive film has a pad portion joined to the electrode and a contact portion joined to the end of the opposing surface, The pad portion and the contact portion are spaced apart. 5. The semiconductor device according to claim 1, wherein: (Appendix 6) The contact portion is formed so as to surround the joining area of ​​the integrated film on the circuit board. 6. The semiconductor device according to claim 5, (Appendix 7) a plurality of the contact portions are arranged so as to surround an area of ​​the circuit board where the integrated film is bonded; A gap is formed between the first insulating layer and the second insulating layer between adjacent contact portions. 6. The semiconductor device according to claim 5, (Appendix 8) The inorganic conductive film extends from the first bonding region to the second bonding region. 8. The semiconductor device according to any one of claims 1 to 7. (Appendix 9) The inorganic conductive film extends beyond the edge of the opposing surface. 9. The semiconductor device according to any one of claims 1 to 8. (Appendix 10) the electrodes are formed of metal; The inorganic conductive film is formed of a metal or a transparent conducting oxide (TCO). 10. The semiconductor device according to any one of claims 1 to 9. [Explanation of symbols]

[0175] 1,5,6 Circuit board, 2,2E Integrated film, 3 Semiconductor device, 4 Stamp, 7 Formation substrate, 8 Inspection device, 11 Base material, 12 Insulating film (first insulating layer), 12a Surface, 13,14 Inorganic conductive film (pad), 15 Inorganic conductive film (contact portion), 20R,20G,20B Light-emitting portion, 21 Organic insulating layer (first insulating layer), 21a First surface, 21b Second surface (opposing surface), 21c Through hole, 21d Through hole, 21e End, 22,22R,22G,22B Functional element, 22a Anode terminal surface, 22k Cathode terminal surface, 23,24 Electrode, 25 Anode wiring layer, 26 Cathode wiring layer, 40 Stamp base material, 41 Support layer, 42 transfer layer, 50 assembly, 51 inorganic conductive film, 60 assembly, 61, 62, 63 inorganic conductive film, 61a, 62a, 63a pad portion, 61b, 62b, 63b extension portion, 62c, 63c protrusion portion, A1 first bonding region, A2 second bonding region, A3 third bonding region, C void, F edge portion of second surface (opposing surface), H bonding region.

Claims

1. A semiconductor device having an integrated film and a circuit substrate, The accumulation film is a first insulating layer having a surface facing the circuit board and made of an organic material; A functional element; an electrode electrically connected to the functional element and exposed from the opposing surface; and the opposing surface of the first insulating layer and the electrode form a first bonding surface; The circuit board includes: a second insulating layer formed of an organic or inorganic material; an inorganic conductive film formed from an inorganic material; and the second insulating layer and the inorganic conductive film form a second bonding surface to be bonded to the first bonding surface; In the bonding region between the first bonding surface and the second bonding surface, a first bonding region where the electrode and the inorganic conductive film are bonded; a second bonding region where an end portion of the opposing surface, which is closer to the edge portion of the opposing surface than the electrode, is bonded to the inorganic conductive film; is formed A semiconductor device characterized by:

2. The insulating layer further includes a third junction region where the first insulating layer and the second insulating layer are joined.

2. The semiconductor device according to claim 1.

3. The first insulating layer and the second insulating layer are both formed of an organic material.

3. The semiconductor device according to claim 1 or 2.

4. the inorganic conductive film protrudes toward the first bonding surface beyond the second insulating layer, A gap is formed between the opposing surface of the first insulating layer and the second insulating layer.

3. The semiconductor device according to claim 1 or 2.

5. the inorganic conductive film has a pad joined to the electrode and a contact portion joined to the end of the opposing surface, The pad and the contact portion are spaced apart.

3. The semiconductor device according to claim 1 or 2.

6. The contact portion is formed so as to surround the joining area of ​​the integrated film on the circuit board.

6. The semiconductor device according to claim 5.

7. a plurality of the contact portions are arranged so as to surround an area of ​​the circuit board where the integrated film is bonded; A gap is formed between the first insulating layer and the second insulating layer between adjacent contact portions.

6. The semiconductor device according to claim 5.

8. The inorganic conductive film extends from the first bonding region to the second bonding region.

3. The semiconductor device according to claim 1 or 2.

9. The inorganic conductive film extends beyond the edge of the opposing surface.

3. The semiconductor device according to claim 1 or 2.

10. the electrodes are formed of metal; The inorganic conductive film is formed of a metal or a transparent conductive oxide (TCO).

3. The semiconductor device according to claim 1 or 2.

Images