Oscillation device

Abstract

To provide an oscillation device capable of improving temperature characteristics of an oscillation circuit by an effective configuration.SOLUTION: An oscillation device (10) includes a first oscillation circuit (1) configured to output a first oscillation signal (X _ OSC), a second oscillation circuit (2) configured to output a second oscillation signal (OSC) having a frequency lower than that of the first oscillation signal, and a frequency ratio detection circuit (3) configured to detect a frequency ratio between the first oscillation signal and the second oscillation signal. And a temperature correction circuit (4) configured to correct a frequency of the first oscillation signal, wherein in a relationship between a frequency ratio of the first oscillation signal and the second oscillation signal and a temperature, the frequency ratio monotonically changes with respect to a temperature change.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to an oscillator device. [Background technology]

[0002] Conventionally, a technique for oscillating a crystal unit using an oscillation circuit has been known (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-141224

[0004] [overview] Crystal oscillator circuits have temperature characteristics that cause the frequency of the oscillation signal to change depending on the temperature. For example, there is a standard requirement of "156.25MHz ±20ppm" for 5G base stations, so the temperature characteristics of the crystal oscillator circuit must be corrected.

[0005] In view of the above circumstances, an object of the present disclosure is to provide an oscillation device that can improve the temperature characteristics of an oscillation circuit through an effective configuration.

[0006] An oscillator device according to one aspect of the present disclosure includes: a first oscillation circuit configured to output a first oscillation signal; a second oscillation circuit configured to output a second oscillation signal having a frequency lower than that of the first oscillation signal; a frequency ratio detection circuit configured to detect a frequency ratio between the first oscillating signal and the second oscillating signal; a temperature correction circuit configured to correct the frequency of the first oscillation signal based on a temperature corresponding to the detected frequency ratio; Equipped with In the relationship between the temperature and the frequency ratio of the first oscillation signal and the second oscillation signal, the frequency ratio changes monotonically with temperature changes. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of a crystal oscillation circuit. [Figure 2] FIG. 2 is a diagram schematically showing the temperature characteristics of a crystal oscillation circuit. [Figure 3] FIG. 3 is a diagram illustrating a configuration of an oscillation device according to a comparative example. [Figure 4] FIG. 4 is a diagram illustrating a configuration of an oscillation device according to an embodiment of the present disclosure. [Figure 5] FIG. 5 is a diagram illustrating an example of the configuration of a ring oscillator. [Figure 6] FIG. 6 is a diagram schematically showing the relationship between the frequency of the oscillation signal and the temperature, and the relationship between the frequency ratio and the temperature. [Figure 7] FIG. 7 is a diagram showing an example of a configuration for detecting a frequency ratio in a frequency ratio detection circuit. [Figure 8] FIG. 8 is a timing chart showing an example of the operation of the configuration shown in FIG. [Figure 9] FIG. 9 is a diagram schematically showing the relationship between the frequency of the oscillation signal and the temperature. [Figure 10] FIG. 10 is a timing chart showing an example of the operation of detecting the frequency ratio according to the modified example. [Figure 11] FIG. 11 is a diagram showing a configuration for detecting a frequency ratio according to a modified example. [Figure 12] FIG. 12 is a diagram showing a configuration for detecting a frequency ratio according to another modified example.

[0008] [Detailed explanation] Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the drawings.

[0009] <Crystal oscillator circuit> FIG. 1 is a diagram illustrating an example of the configuration of a crystal oscillator circuit. The crystal oscillator circuit 1 shown in FIG. 1 includes a crystal oscillator X, an inverter IV, a feedback resistor Rf, a limiting resistor Rd, a variable capacitor C1, and a capacitor C2. The output terminal of the inverter IV is connected to one terminal of the limiting resistor Rd along with the output terminal Tout. The other terminal of the limiting resistor Rd is connected to one terminal of the crystal oscillator X along with one terminal of the capacitor C2. The other terminal of the capacitor C2 is connected to the ground terminal (the terminal to which the ground potential is applied). The other terminal of the crystal oscillator X is connected to the input terminal of the inverter IV along with one terminal of the variable capacitor C1. The other terminal of the variable capacitor C1 is connected to the ground terminal. A feedback resistor Rf is connected between the input and output of the inverter IV. With this configuration, an oscillation signal X_OSC is output from the output terminal Tout. The capacitance value of the variable capacitor C1 can be variably controlled by a control voltage. The capacitance value of the capacitor C2 is fixed. By varying the capacitance value of the variable capacitor C1, the frequency of the oscillation signal X_OSC becomes variable. Of the capacitors C1 and C2, only C2 may be a variable capacitor, or both C1 and C2 may be variable capacitors.

[0010] <Comparative Example> As shown on the left side of Figure 2, the crystal oscillator circuit 1 has a temperature characteristic in which the frequency Fxosc of the oscillation signal X_OSC changes with temperature T when the capacitance values ​​of the variable capacitors C1 and C2 are fixed to a predetermined value. This temperature characteristic is a third-order characteristic. However, as shown on the right side of Figure 2, the ideal temperature characteristic is one in which the frequency Fxosc remains constant with temperature T, and it is desirable to approach this ideal characteristic by correcting the temperature characteristic.

[0011] 3 is a diagram showing the configuration of an oscillator device 15 according to a comparative example that is capable of correcting the temperature characteristics of the crystal oscillator circuit 1. The oscillator device 15 includes a temperature sensor 11, an A / D (analog / digital) converter 12, a temperature correction circuit 13, a D / A (digital / analog) converter 14, and the crystal oscillator circuit 1.

[0012] The temperature sensor 11 outputs a temperature detection signal Tdet to the A / D converter 12. The A / D converter 12 A / D converts the temperature detection signal Tdet and outputs a temperature detection signal Tdet′ to the temperature correction circuit 13.

[0013] Based on the temperature detection signal Tdet', the temperature correction circuit 13 determines the amount of frequency correction for the third-order temperature characteristic (left side of FIG. 2) of the frequency of the oscillation signal X_OSC output from the crystal oscillation circuit 1 as described above, and outputs the corrected output OUT to the D / A converter 14. The D / A converter 14 D / A converts the corrected output OUT and outputs a control voltage Vct to the crystal oscillation circuit 1. In the crystal oscillation circuit 1, the control voltage Vct is applied to the variable capacitor C1, and the capacitance value of the variable capacitor C1 is controlled.

[0014] This configuration makes it possible to correct the temperature characteristics of the crystal oscillation circuit 1. However, the oscillator device 15 requires the A / D converter 12, which increases the circuit area and power consumption. In view of these issues, the following embodiments of the present disclosure are implemented.

[0015] <Embodiments of the present disclosure> 4 is a diagram showing a configuration of an oscillator device 10 according to an embodiment of the present disclosure. The oscillator device 10 includes a crystal oscillator circuit 1, an oscillator circuit 2, a frequency ratio detection circuit 3, a temperature correction circuit 4, and a D / A converter 5.

[0016] The crystal oscillator circuit 1 outputs an oscillation signal X_OSC. The frequency of the oscillation signal X_OSC is 100 MHz or higher. The oscillator circuit 2 outputs an oscillation signal OSC. As will be described later, the oscillation signal OSC has a lower frequency than the oscillation signal X_OSC and has a first-order temperature characteristic of frequency. An example of the oscillator circuit 2 that outputs such an oscillation signal OSC is a ring oscillator as shown in FIG. 5.

[0017] The oscillation signal X_OSC and the oscillation signal OSC are input to the frequency ratio detection circuit 3. The frequency ratio detection circuit 3 detects the frequency ratio between the frequency of the oscillation signal X_OSC and the frequency of the oscillation signal OSC (reference source frequency). As will be described later, the frequency ratio corresponds to temperature, so the frequency ratio detection circuit 3 identifies the temperature corresponding to the detected frequency ratio and outputs a temperature detection signal Tdet indicating the identified temperature to the temperature correction circuit 4.

[0018] The temperature correction circuit 4 determines the amount of frequency correction based on the temperature detection signal Tdet, and outputs a corrected output OUT to the D / A converter 5. The D / A converter 5 performs D / A conversion on the corrected output OUT, and outputs a control voltage Vct to the crystal oscillation circuit 1. The control voltage Vct is applied to the variable capacitor C1 in the crystal oscillation circuit 1, and the capacitance value of the variable capacitor C1 is controlled.

[0019] The left side of Figure 6 shows a schematic diagram of the relationship between the frequency of oscillation signals X_OSC and OSC and temperature. As shown, the frequency of oscillation signal OSC is lower than the frequency of oscillation signal X_OSC. Furthermore, the frequency of oscillation signal X_OSC has a third-order temperature characteristic, while the frequency of oscillation signal OSC has a first-order temperature characteristic. Specifically, the temperature characteristic of the frequency of oscillation signal X_OSC is such that as the temperature increases, the frequency increases, then decreases, and then increases again. The temperature characteristic of the frequency of oscillation signal OSC is such that the frequency increases as the temperature increases. Furthermore, the range of change ΔOSC between the minimum and maximum values ​​of the frequency of oscillation signal OSC for a given temperature range ΔT is larger than the range of change ΔXOSC between the minimum and maximum values ​​of the frequency of oscillation signal X_OSC for a given temperature range ΔT.

[0020] As a result, as shown on the right side of FIG. 6, the frequency ratio between the frequencies of the oscillation signals X_OSC and OSC increases as the temperature decreases. At this time, the frequency ratio changes monotonically with temperature, so the temperature can be uniquely identified from the frequency ratio. Note that, as long as the frequency ratio changes monotonically with temperature, the temperature characteristic of the frequency of the oscillation signal OSC is not limited to being linear, and may be, for example, quadratic. Due to this relationship between the frequency ratio and temperature, the frequency ratio detection circuit 3 can identify the temperature from the detected frequency ratio.

[0021] 6 is a characteristic when the capacitance value of the variable capacitor C1 in the crystal oscillation circuit 1 is set to a predetermined initial value. In order to correct the third-order temperature characteristic of the crystal oscillation circuit 1, the temperature correction circuit 4 calculates the frequency correction amount F(T) using the following correction formula: F(T)=aT^3+bT+c where a, b, and c are coefficients and T is temperature.

[0022] The temperature correction circuit 4 calculates the correction amount F(T) by substituting the temperature indicated by the temperature detection signal Tdet output from the frequency ratio detection circuit 3 into T in the correction formula. Once the correction amount F(T) is determined, the amount of correction from the initial capacitance value of the variable capacitor C1 is also determined, and the control voltage Vct to be applied to the variable capacitor C1 is determined, so the temperature correction circuit 4 outputs a corrected output OUT corresponding to the control voltage Vct.

[0023] Such an oscillator device 10 can correct the temperature characteristics of the crystal oscillator circuit 1. This eliminates the need for an A / D converter, as in the comparative example, and reduces circuit area and power consumption. The frequency ratio detection circuit 3 can be configured as a digital circuit, improving area efficiency.

[0024] When the temperature is successively detected in the oscillator device 10, the frequency of the oscillation signal X_OSC of the crystal oscillator circuit 1 is corrected, so the frequency changes even at the same temperature. However, because the change in frequency ΔXOSC of the oscillation signal X_OSC (FIG. 6) is very small, the amount of correction is also small, and the effect of detecting the frequency ratio on the temperature detection accuracy is small.

[0025] 7 is a diagram showing an example of a configuration for detecting a frequency ratio in the frequency ratio detection circuit 3. The frequency ratio detection circuit 3 has a counter 31 and a flip-flop unit 32.

[0026] The counter 31 counts the oscillation signal X_OSC and outputs a count value Q to the flip-flop unit 32. The oscillation signal OSC is input to a reset terminal of the counter 31, and the counter 31 is reset by a rising edge of the oscillation signal OSC. In addition to the count value Q, the oscillation signal OSC is input to the flip-flop unit 32. The flip-flop unit 32 outputs the count value Q as a count output DOUT at the rising edge of the oscillation signal OSC.

[0027] An example of the operation of the configuration shown in FIG. 7 will now be described using the timing chart shown in FIG. 8. At timing t1, the counter 31 starts counting. Thereafter, at timing t2, the oscillation signal OSC falls, but the count continues. Thereafter, at timing t3, the oscillation signal OSC rises, the counter 31 is reset, and the count value Q is output from the flip-flop unit 32 as the count output DOUT. In the example of FIG. 8, there are eight pulses of the oscillation signal X_OSC for one cycle of the oscillation signal OSC, and a count output DOUT with a count value of 8 is output. In this case, the frequency ratio is 8:1. FIG. 9 schematically shows such a frequency ratio in the relationship between frequency and temperature.

[0028] After timing t3, the count value Q is output as the count output DOUT at each rising edge of the oscillation signal OSC, and the frequency ratio is successively detected in this manner.

[0029] The frequency ratio may be detected in another manner, such as the timing chart shown in FIG. 10. Here, the oscillation signal X_OSC is counted for a period T1 corresponding to two cycles of the oscillation signal OSC, and a count value Q1 is output as the count output DOUT. In this way, the count value of the oscillation signal X_OSC for a period corresponding to two or more cycles of the oscillation signal XOSC is output, thereby improving the resolution of the frequency ratio detection. To achieve this frequency ratio detection, for example, as shown in FIG. 11, a frequency divider 33 may be provided in addition to the counter 31 and the flip-flop unit 32. The frequency divider 33 divides the oscillation signal OSC and outputs the result to the reset terminal of the counter 31 and the flip-flop unit 32.

[0030] However, if only one configuration as shown in Fig. 11 is provided, the count output DOUT will be updated every period equivalent to two or more cycles of the oscillation signal OSC, resulting in a long update period. Therefore, a configuration as shown in Fig. 12 may be used. Here, the frequency ratio detection circuit 3 is provided with a set consisting of a counter 31A, a flip-flop unit 32A, and a frequency divider 33A, a set consisting of a counter 31B, a flip-flop unit 32B, and a frequency divider 33B, and a set consisting of a counter 31C, a flip-flop unit 32C, and a frequency divider 33C, and further with an output unit 34. The number of sets is not limited to three.

[0031] The configuration of Fig. 12 as described above enables the operation shown in Fig. 10. Specifically, the counter 31A starts counting the oscillation signal X_OSC at the rising edge ED11 of the oscillation signal OSC, and at the rising edge ED12 of the oscillation signal OSC after a period T1 equivalent to two cycles of the oscillation signal OSC has elapsed, the counter 31A is reset, and the count value Q1 of the counter 31A is output as the count output D1 from the flip-flop section 32A.

[0032] The counter 31B starts counting the oscillation signal X_OSC from the falling edge ED21 following the rising edge ED11 of the oscillation signal OSC, and at the falling edge ED22 of the oscillation signal OSC after a period T2 equivalent to two periods of the oscillation signal OSC has elapsed, the counter 31B is reset, and the count value Q2 of the counter 31B is output as the count output D2 from the flip-flop section 32B.

[0033] The counter 31C starts counting the oscillation signal X_OSC from the rising edge ED31 following the falling edge ED21 of the oscillation signal OSC, and at the rising edge ED32 of the oscillation signal OSC after a period T3 equivalent to two periods of the oscillation signal OSC has elapsed, the counter 31C is reset, and the count value Q3 of the counter 31C is output as the count output D3 from the flip-flop section 32C.

[0034] The output section 34 outputs the count outputs D1, D2, and D3 output from the flip-flop sections 32A, 32B, and 32C in order as the count output DOUT for each edge of the oscillation signal OSC.

[0035] In this way, the frequency ratio detection circuit 3 counts the oscillation signal X_OSC while shifting the timing at which counting of the oscillation signal X_OSC starts in a predetermined cycle (here, two cycles) of the oscillation signal OSC, thereby improving the resolution of frequency ratio detection and preventing the update cycle of the count output DOUT from becoming long.

[0036] <Other> In addition to the above-described embodiments, various modifications can be made to the various technical features disclosed in this specification without departing from the spirit of the technical creation. In other words, the above-described embodiments should be considered to be illustrative and not restrictive in all respects, and the technical scope of the present disclosure should not be limited to the above-described embodiments, but should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0037] <Additional Notes> As described above, the oscillation device (10) according to one aspect of the present disclosure includes: a first oscillation circuit (1) configured to output a first oscillation signal (X_OSC); a second oscillation circuit (2) configured to output a second oscillation signal (OSC) having a frequency lower than that of the first oscillation signal; a frequency ratio detection circuit (3) configured to detect a frequency ratio between the first oscillation signal and the second oscillation signal; a temperature correction circuit (4) configured to correct the frequency of the first oscillation signal based on a temperature corresponding to the detected frequency ratio; Equipped with In the relationship between the temperature and the frequency ratio of the first oscillation signal and the second oscillation signal, the frequency ratio changes monotonically with temperature changes (first configuration).

[0038] In the first configuration, the frequency of the first oscillation signal may have a third-order temperature characteristic (second configuration).

[0039] In the second configuration, the frequency of the second oscillation signal may have a first-order temperature characteristic (third configuration).

[0040] In the second or third configuration, the first oscillation circuit may be a crystal oscillation circuit (fourth configuration).

[0041] In addition, in any one of the first to fourth configurations, the oscillation device includes a D / A converter (5) provided in a subsequent stage of the temperature correction circuit, the temperature correction circuit determines a frequency correction amount based on the detected temperature corresponding to the frequency ratio, and outputs a corrected output (OUT) to the D / A converter; A control voltage (Vct) output from the D / A converter may be applied to a variable capacitor (C1) in the first oscillation circuit (fifth configuration).

[0042] In addition, in any of the second to fourth configurations, the temperature correction circuit may be configured to calculate a frequency correction amount F(T) based on the temperature corresponding to the detected frequency ratio and the following correction formula (sixth configuration). F(T)=aT^3+bT+c where a, b, and c are coefficients and T is temperature.

[0043] In addition, in any of the first to sixth configurations, the frequency ratio detection circuit may be configured to detect the frequency ratio by counting the first oscillation signal with respect to a predetermined period of the second oscillation signal (seventh configuration).

[0044] In the seventh configuration, the predetermined period may be two or more periods (eighth configuration).

[0045] In the eighth configuration, the frequency ratio detection circuit may count the first oscillation signal while shifting the start timing of counting the first oscillation signal in the predetermined period (ninth configuration). [Industrial Applicability]

[0046] The present disclosure can be used in oscillator devices for various applications. [Explanation of symbols]

[0047] 1 Crystal oscillator circuit 2 Oscillator Circuit 3 Frequency ratio detection circuit 4 Temperature compensation circuit 5 D / A converter 10 Oscillator 11 Temperature Sensor 12 A / D converter 13 Temperature compensation circuit 14 D / A converter 15 Oscillator 31 Counter 31A~31C Counter 32 Flip-flop section 32A~32C Flip-flop section 33 Frequency divider 33A~33C frequency divider 34 Output section C1 variable capacitor C2 capacitor IV Inverter Rd limiting resistor Rf feedback resistor Tout output terminal X Crystal Oscillator

Claims

1. a first oscillator circuit configured to output a first oscillator signal; a second oscillation circuit configured to output a second oscillation signal having a frequency lower than that of the first oscillation signal; a frequency ratio detection circuit configured to detect a frequency ratio between the first oscillating signal and the second oscillating signal; a temperature correction circuit configured to correct the frequency of the first oscillation signal based on a temperature corresponding to the detected frequency ratio; Equipped with An oscillation device, wherein the frequency ratio between the first oscillation signal and the second oscillation signal changes monotonically with temperature in relation to temperature.

2. The oscillator device according to claim 1 , wherein the frequency of the first oscillation signal has a third-order temperature characteristic.

3. The oscillation device according to claim 2 , wherein the frequency of the second oscillation signal has a first-order temperature characteristic.

4. 4. The oscillator device according to claim 2, wherein the first oscillator circuit is a crystal oscillator circuit.

5. The oscillator device includes a D / A converter provided in a subsequent stage of the temperature correction circuit, the temperature correction circuit determines a frequency correction amount based on the detected temperature corresponding to the frequency ratio, and outputs a corrected output to a D / A converter; 2. The oscillation device according to claim 1, wherein the control voltage output from the D / A converter is applied to a variable capacitor in the first oscillation circuit.

6. 3. The oscillator device according to claim 2, wherein the temperature correction circuit calculates a frequency correction amount F(T) based on the temperature corresponding to the detected frequency ratio and the following correction formula: F(T)=F(T) / T. F(T)=aT^3+bT+c where a, b, and c are coefficients, and T is temperature.

7. 2. The oscillator device according to claim 1, wherein the frequency ratio detection circuit detects the frequency ratio by counting the first oscillation signal with respect to a predetermined period of the second oscillation signal.

8. The oscillation device according to claim 7 , wherein the predetermined period is two or more periods.

9. The oscillation device according to claim 8 , wherein the frequency ratio detection circuit counts the first oscillation signal while shifting the start timing of counting the first oscillation signal in the predetermined period.

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