Semiconductor device and electric apparatus
The semiconductor device addresses the challenge of difficult terminal connections by arranging terminals on opposing sides of the resin sealing layer, enabling easy access and improving manufacturing efficiency and reliability.
Patent Information
- Application Number
- JP2024106193
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-01
- Publication Date
- 2026-01-16
AI Technical Summary
Existing semiconductor devices with combined switching elements face difficulty in connecting control terminals, which are provided only on the short sides, making it challenging to connect all terminals easily.
The semiconductor device incorporates a circuit configuration with first and second switching element chips mounted on lead frames, where terminals are arranged on opposing sides of a resin sealing layer, allowing easy access to all terminals, and uses a control chip to manage gate voltages and power supply.
The configuration enables easy connection to all terminals, improves heat dissipation, and facilitates efficient manufacturing with standardized materials, reducing production costs and enhancing reliability.
Smart Images

Figure 2026006865000001_ABST
Abstract
Description
[Technical Field]
[0001] An embodiment of the present disclosure relates to a semiconductor device on which a power semiconductor chip is mounted, and an electric device in which the semiconductor device is used. [Background technology]
[0002] Power semiconductor elements (switching elements: power MOSFET, IGBT, etc.) that perform switching of large currents are known. In particular, semiconductor devices that combine two such switching elements to form a half-bridge are widely used because they can be used for various purposes, such as driving a three-phase motor.
[0003] For example, Patent Document 1 describes the structure (mounting structure) of such a semiconductor device. Here, as the switching elements, a high-side element connected to the power supply voltage (positive) side and a low-side element connected to the GND side are provided as switching element chips. Also, a control chip is provided to control the gate voltages of these elements.
[0004] Each of these chips is mounted on an independent die pad (metal plate), and their terminals are connected with bonding wires, and then sealed in a roughly rectangular resin package. At this time, terminals (pins) made of part of the die pad or the same metal material as the die pad protrude from the package and are used to connect and transmit output signals from and input signals to the semiconductor device.
[0005] In plan view, this package is roughly rectangular, and terminals to which high voltages are applied or large currents flow are provided on each of its two opposing long sides. These terminals include the high-voltage power supply terminal (P terminal), the low-voltage (GND) power supply terminal (N terminal), and the output terminal (C terminal) in the half-bridge circuit. In other words, in this semiconductor device, these terminals are provided equally on both long sides. Therefore, when using the semiconductor device, connections to these terminals can be easily made using only one of the two sides.
[0006] Meanwhile, the gate voltages of the above switching elements are input to a control chip from the outside, and the gate voltages of each switching element are actually controlled via the control chip. Furthermore, the control chip requires a dedicated DC power supply, so a terminal for inputting this power supply voltage is also required. Thus, terminals (control terminals) for inputting to the control chip are provided separately from the P terminal and the like. In the technology described in Patent Document 1, such control terminals are provided on the short sides of the rectangle. [Prior art documents] [Patent documents]
[0007] [Patent Document 1] Patent No. 6490027 Summary of the Invention [Problem to be solved by the invention]
[0008] In the semiconductor device described in Patent Document 1, connections to the P terminal, N terminal, and C terminal are easy during use. However, conversely, the control terminals are provided only on the short sides, making connection thereto difficult. For this reason, there has been a demand for a semiconductor device that incorporates a combination of multiple switching elements and allows easy connection to all terminals.
[0009] The present disclosure has been made in consideration of the above problems, and aims to provide a semiconductor device and an electrical device that solve the above problems. [Means for solving the problem]
[0010] In order to solve the above problems, the present disclosure has the following configuration. The semiconductor device of the present disclosure has a circuit configuration in which a first switching element and a second switching element are combined, and the on / off of a current flowing between a first main electrode on a high potential side and a second main electrode on a low potential side is controlled, the semiconductor device comprising: a first switching element chip having the first switching element formed thereon; a second switching element chip having the second switching element formed thereon; a first lead frame made of a metal plate on which the first switching element chip is mounted and to which the first main electrode of the first switching element is connected; and a second lead frame made of a metal plate on which the second switching element chip is mounted and to which the first main electrode of the second switching element is connected. a second lead frame configured to connect the second main electrode of the second switching element to the first wiring portion configured from a metal plate, and a first wiring portion configured from a metal plate, which is connected to the second main electrode of the second switching element, are provided within a resin sealing layer configured from a resin material and having a substantially rectangular shape with one side oriented in the vertical direction, and in a plan view, on one of two opposing sides of the resin sealing layer, a first terminal portion integrated with the first lead frame and a second terminal portion integrated with the first wiring portion are spaced apart in a direction along the side and protrude outward from the resin sealing layer, and on the other of the two sides, a third terminal portion integrated with the second lead frame protrudes outward from the resin sealing layer. The electrical device of the present disclosure is characterized by using the semiconductor device. [Effects of the Invention]
[0011] Since the present disclosure is configured as described above, it is possible to obtain a semiconductor device in which a plurality of switching elements are combined and built-in, and which can be easily connected to all terminals. [Brief explanation of the drawings]
[0012] [Figure 1]1 is a circuit diagram of a semiconductor device according to an embodiment of the present disclosure. [Figure 2] 1 is a top perspective view of a semiconductor device according to an embodiment of the present disclosure; [Figure 3] 1A to 1C are perspective views of a semiconductor device according to an embodiment of the present disclosure as viewed from three sides. [Figure 4] FIG. 2 is a bottom view of the semiconductor device according to the embodiment of the present disclosure. [Figure 5] FIG. 1 is a front view illustrating a state in which a semiconductor device according to an embodiment of the present disclosure is mounted. [Figure 6] 1 is an example of a metal pattern for manufacturing a lead frame or the like used in a semiconductor device according to an embodiment of the present disclosure. [Figure 7] FIG. 10 is a top perspective view of a modified example of the semiconductor device according to the embodiment of the present disclosure. [Figure 8] FIG. 10 is a partial cross-sectional view of a modified example of the semiconductor device according to the embodiment of the present disclosure. [Figure 9] 1 is a circuit diagram of an electrical device in which a semiconductor device according to an embodiment of the present disclosure is used. [Figure 10] 1 is a diagram illustrating a configuration in which an electrical device using a semiconductor device according to an embodiment of the present disclosure is mounted in an automobile. DETAILED DESCRIPTION OF THE INVENTION
[0013] A semiconductor device according to an embodiment of the present disclosure will now be described. Fig. 1 is a circuit diagram of this semiconductor device 1. Here, the source (S: second main electrode) of element (first switching element) T1 and the drain (D: first main electrode) of element (second switching element) T2, both of which are n-channel MOSFETs (power MOSFETs), are connected to form a half-bridge circuit. In this case, the drain (D: first main electrode) of element T1 on the high side serves as the high-voltage power supply terminal (P terminal) in the half-bridge circuit, and the source (S: second main electrode) of element T2 on the low side serves as the low-voltage (GND) power supply terminal (N terminal). The output terminal (C terminal) is connected to the source (S: second main electrode) of the element T1 and the drain (D: first main electrode) of the element T2. In practice, the element T1 is formed separately on a switching element chip (first switching element chip) 11, and the element T2 is formed separately on a switching element chip (second switching element chip) 12.
[0014] Furthermore, the gate voltage applied to the gate (G: control electrode) of the high-side element T1 is set to INH, and the gate voltage applied to the gate (G: control electrode) of the low-side element T2 is set to INL and controlled, and the switching element chips 11 and 12 are provided with terminals for inputting INH and INL, respectively. The switching elements 11 and 12 are also provided with drain terminals and source terminals of the elements T1 and T2, respectively, which are connected as shown in FIG.
[0015] 1, the INH and INL input to elements T1 and T2 are actually output from a control chip 13 that is separate from switching element chips 11 and 12. To operate this half-bridge circuit as desired, INH and INL are input to control chip 13 from the outside, and control chip 13 appropriately corrects these INH and INL to operate the half-bridge circuit more safely and properly, and outputs them to elements T1 and T2. For example, if the temperature of semiconductor device 1 becomes abnormally high and INH and INL are input from the outside to turn on elements T1 or T2, the INH and INL actually output to elements T1 and T2 are set to turn them off.
[0016] y For this reason, a circuit for performing such an operation is formed in the control chip 13, but since such a circuit is well known, its configuration is omitted from Fig. 1. The control chip 13 is provided with terminals for inputting the above-mentioned INH and INL and for outputting to the elements T1 and T2. It is also provided with a terminal for supplying a power supply voltage (VCC) to operate this circuit, and a GND terminal.
[0017] FIG. 2 is a top perspective view showing the structure of this semiconductor device 1 (semiconductor module). This semiconductor device 1 is an SOP (Small Outline Package) type. In a plan view of a resin encapsulation layer 100 made of an epoxy resin or the like, terminals protrude from each of the two long sides of the rectangle, and no terminals are provided on the short sides. In FIG. 2, the x, y, and z directions are defined as directions corresponding to the sides of this rectangle. The main surfaces of each chip and die pad are the xy plane (horizontal plane), the z direction is the direction perpendicular to the xy plane (horizontal plane), the x direction is the long side direction, and the y direction is the short side direction. FIG. 3 is a side perspective view of the semiconductor device 1 as seen from the positive x-direction side (a), the negative x-direction side (b), and the negative y-direction side (c). FIG. 4 is a bottom view as seen from the negative z-direction side. FIG. 3(c) shows the end face of the resin encapsulation layer 100 on the negative y-direction side. The resin sealing layer 100 may be square in plan view, in which case the long sides are the two opposing sides. Terminals may be provided only on the short sides, not on the long sides.
[0018] In FIG. 2, the switching element chip 11 is mounted on a first lead frame 21 on the right side of the figure, and the switching element chip 12 is mounted on a second lead frame 22 on the left side of the figure. The planar size of the switching element chip 11 and the switching element chip 12 is, for example, 4 mm square. Here, both the first lead frame 21 and the second lead frame 22 are made of copper or a copper alloy and are formed by processing metal plates with sufficient mechanical strength. The drain (D) of the element T1 in FIG. 1 is connected to a pad on the back surface (negative surface in the z direction) of the switching element chip 11. As described below, a metal layer having a Ti / Ni / Au laminate structure, for example, which can be well bonded to a bonding material, is used for this pad. Meanwhile, the gate (G) and source (S) are connected to pads provided on the front surface (positive surface in the z direction). As described below, a metal layer having an Al / TiN / AlCu laminate structure, for example, which can be well bonded to a Cu bonding wire, is used for this pad. The configuration of the switching element chip 12 (element T2) is also similar.
[0019] The switching element chips 11 and 12 are bonded to the first lead frame 21 and the second lead frame 22, respectively, using a conductive bonding material such as solder (e.g., a bonding material containing silver particles), so that the first lead frame 21 and the second lead frame 22 are connected to the drains (D) of the elements T1 and T2, respectively.
[0020] In addition, the control chip 13 is also mounted on the second lead frame 22 on the right side (first lead frame 21 side) of the switching element chip 12. The planar size of the control chip 13 is, for example, 3 mm square. The control chip 13 is joined to the second lead frame 22 with silver paste, but no pads are provided on its back surface. On the other hand, on the front surface (the surface on the positive side in the z direction) of the control chip 13, input and output terminals INH and INL, a power supply voltage (VCC) supply terminal, and a GND terminal are each formed as pads.
[0021] As described above, the first lead frame 21 includes a die pad portion 21A, which is a flat portion on which the switching element chip 11 is mounted, and a first terminal portion 21B, which extends from the die pad portion 21A toward the negative side in the y direction and is integrated with the die pad portion 21A. The die pad portion 21A is provided inside the resin sealing layer 100, and the first terminal portion 21B protrudes from the inside of the resin sealing layer 100 to the outside on the negative side in the y direction.
[0022] As described above, the second lead frame 22 includes a die pad portion 22A, which is a flat portion on which the switching element chip 12 and the control chip 13 are mounted, a connection portion 22B extending from the die pad portion 22A toward the positive side in the y direction and the negative side in the x direction, and a third terminal portion 22C extending from the connection portion 22B toward the positive side in the y direction and integrated with the die pad portion 22A and the connection portion 22B. The die pad portion 22A and the connection portion 22B are provided inside the resin sealing layer 100, and the third terminal portion 22C protrudes from the inside of the resin sealing layer 100 to the outside on the positive side in the y direction.
[0023] 2, a first wiring portion 23, which is separate from the first lead frame 21 and the second lead frame 22 and formed from the same metal plate as these lead frames 21 and 22, is provided at the lower left of the figure. The first wiring portion 23 includes a connecting portion 23A that extends in the x direction in the figure and is integrated with these lead frames, and a second terminal portion 23B that extends from the connecting portion 23A to the negative side in the y direction. The connecting portion 23A is provided inside the resin sealing layer 100, and the second terminal portion 23B protrudes from the inside of the resin sealing layer 100 to the outside on the negative side in the y direction.
[0024] 2, second wiring portion 24 to fifth wiring portion 27 are provided in order from the negative side along the x direction on the upper left side (positive side in the x direction, positive side in the y direction). The negative sides of second wiring portion 24 to fifth wiring portion 27 in the y direction are connection portions 24A to 27A, respectively, and the positive sides of the y direction are fourth terminal portion 24B to seventh terminal portion 27B extending along the y direction, respectively. The connection portions 24A to 27A are provided inside the resin sealing layer 100, and the fourth terminal portion 24B to the seventh terminal portion 27B protrude from the inside of the resin sealing layer 100 to the outside on the positive side in the y direction.
[0025] 3(a) to 3(c), the die pad portions 21A and 22A are provided on the bottom surface of the resin sealing layer 100 so as to form the same plane. Therefore, as shown in FIG. 4, the die pad portions 21A and 22A are exposed on the bottom surface (the surface on the negative side in the z direction) of the semiconductor device 1. Also, as shown in FIGS. 3(a) and 3(b), in the first lead frame 21, the first terminal portion 21B is bent so as to become higher toward the negative side in the y direction (located on the positive side in the z direction), and is further bent so as to become even higher outside the resin sealing layer 100. Therefore, the tip end (the end on the negative side in the y direction) of the first terminal portion 21B is located at the uppermost position on the first lead frame 21. As shown in Figure 3(a), in the second lead frame 22, the bending process positions the connection portion 22B above the die pad portion 22A, and further, the third terminal portion 22C is bent in the same manner as the first terminal portion 21B, so that the tip of the second terminal portion 22C (the end portion on the positive side in the y direction) is positioned at the uppermost position in the second lead frame 22.
[0026] 3(a), the connection portion 23A in the first wiring portion 23 is located at approximately the same height as the connection portion 22B, and the second terminal portion 23B is bent from here in the same manner as the first terminal portion 21B. Also, as shown in FIG. 3(a), in the second to fifth wiring portions 24 to 27, the connection portions 24A to 27A are located at approximately the same height as the connection portion 23A, etc., and the fourth to seventh terminal portions 24B to 27B are bent in the same manner as the second terminal portion 23B.
[0027] With the above configuration, the semiconductor device 1 is an SOP-type package in which the tips of the first terminal portion 21B and the second terminal portion 23B protrude to the negative side of the y direction, and the tips of the third terminal portion 22C and the fourth terminal portion 24B to the seventh terminal portion 27B protrude to the positive side of the y direction.
[0028] On the surface (the surface on the positive side in the z direction) of the switching element chip 11, bonding wires 90 are used to connect the pad connected to the source (S) of element T1 to the connection portion 22B (second lead frame 22), and between the pad connected to the gate (G) and the pad on the output side of INH on the surface of the control chip 13. In FIG. 2, nine bonding wires 90 are used for the former connection, and two bonding wires 90 are used for the latter connection. The bonding wires 90 are made of, for example, 50 μm diameter copper wires, and a large number of them are used to connect the source (S), through which a large current flows, as described above. As described above, the drain (D) of element T1 is connected to the first lead frame 21.
[0029] On the surface of the switching element chip 12, the pad connected to the source (S) of the element T2 and the connection portion 23A (first wiring portion 23), and the pad connected to the gate (G) and the pad on the output side of the INL on the surface of the control chip 13 are also connected by bonding wires 90 in the same manner as on the switching element chip 11 side. As described above, the drain (D) of the element T2 is connected to the second lead frame 22. As shown in FIG. 2, by mounting the control chip 13 on the side of the second lead frame 22 (die pad 22A) closer to the switching element chip 11 (die pad 21A), it becomes easy to connect the control chip 13 and the switching element chips 11 and 12 in this way.
[0030] On the surface of the control chip 13, the INH input pad, the INL input pad, the power supply voltage supply pad, and the GND pad are connected to the connection section 24A (second wiring section 24), the connection section 25A (third wiring section 25), the connection section 26A (fourth wiring section 26), and the connection section 27A (fifth wiring section 27), respectively, using one bonding wire 90 each.
[0031] 1, the P terminal is provided as first terminal portion 21B, the N terminal is provided as second terminal portion 23B on the negative side in the y direction, the C terminal is provided as third terminal portion 22C, the INH input terminal, the INL input terminal, the power supply voltage (VCC) supply terminal, and the GND terminal are provided as fourth terminal portion 24B to seventh terminal portion 27B on the positive side in the y direction. As described above, the circuit of FIG. 1 becomes an SOP-type package realized with the terminal (pin) arrangement shown in FIG. 2 etc.
[0032] 5 is a front view seen from the positive side in the x direction, showing the state in which the semiconductor device 1 is used. Here, the semiconductor device 1 is mounted on a printed circuit board 200 for use. In this case, the printed circuit board 200 is fixed to the positive side in the z direction of the semiconductor device 1 in FIG. 3, and the pins can be connected to a wiring pattern (not shown) on the printed circuit board 200 for use.
[0033] On the other hand, since the printed circuit board 200 is generally composed mainly of an insulator with low thermal conductivity, it is difficult to dissipate heat from the printed circuit board 200 during operation of the semiconductor device 1. For this reason, on the upper side (negative side in the z direction) in FIG. 5 , the semiconductor device 1 is connected to a metal heat sink 220 via a thin insulating sheet 210. As the heat sink 220, a structure with heat sink fins on the side opposite to the side where the semiconductor device 1 is located can be appropriately used. In this case, the die pad portions 21A and 22A, which become the hottest during operation, are exposed on the upper surface in FIG. 5 as shown in FIG. 4 , and therefore heat is efficiently dissipated. Furthermore, since the insulating sheet 210 is provided, the heat sink 220 does not function electrically at all and is used only for heat dissipation.
[0034] In the above structure, the potential of the first lead frame 21 is P (high positive potential) in FIG. 1, and the potential of the first wiring portion 23 is GND. Therefore, the potential difference between them is the largest among the potential differences between terminals in the semiconductor device 1 of FIG. 1, reaching a maximum of approximately 1000 V. The potential difference between the second lead frame 22 and the first lead frame 21 is also similar at its maximum. For this reason, in FIG. 2, the minimum distance between the first lead frame 21 and the second lead frame 22 and the first wiring portion 23 in the x-direction is determined by IEC standards (e.g., IEC 60664-1), and is preferably 5 mm or more. The resin material constituting the resin sealing layer 100 fills this distance, ensuring a sufficient breakdown voltage between them. Accordingly, the distance between the pin (first terminal portion 21B) that serves as the P terminal and the pin (third terminal portion 23B) that serves as the N terminal is also approximately the same. However, the larger this distance, the easier it is to connect the wiring and the more suppressed creeping discharge between the pins is. This setting is easy by providing these pins on the long side in FIG.
[0035] Compared to the structure described in Patent Document 1, this semiconductor device 1 is easy to use because the pins used are provided only on the sides along the x-direction. Also, as described above, heat can be dissipated particularly efficiently from the die pad portions 21A, 22A (first lead frame 21, second lead frame 22).
[0036] In the above structure, the first lead frame 21, the second lead frame 22, and the first to fifth wiring portions 23 to 27 can be simultaneously manufactured in large numbers using metal plate patterns obtained by sheet metal processing a single metal plate. Fig. 6 is a diagram showing a metal plate pattern (metal plate pattern 50) when two sets of the first lead frame 21 etc. in Fig. 3 are manufactured along the y direction (when two sets of the semiconductor device 1 in Fig. 1 are manufactured). In this metal plate pattern 50, the first lead frame 21 etc. in Fig. 2 are provided inside an outer frame 51 and connected to the outer frame 51 or adjacent components via connecting portions 52. That is, when manufacturing the above semiconductor device 1, first, this metal plate pattern 50 is manufactured by sheet metal processing (punching, bending, cutting into strips, etc.).
[0037] 1, each chip is mounted on the first lead frame 21 and the second lead frame 22 of this metal pattern 50, and bonding wires 90 are connected to them. Thereafter, a resin sealing layer 100 is formed corresponding to each semiconductor device 1.
[0038] Then, by cutting along the dashed lines in Figure 6 (cutting lines C that mainly separate adjacent components), the first lead frame 21, the second lead frame 22, and the first to fifth wiring portions 23 to 27 are separated from each other, and cutting is performed along the dotted and dashed lines (outer frame cutting lines C0 that mainly separate each component from the outer frame 51), thereby obtaining a structure separated into each resin sealing layer 100.
[0039] Thereafter, each terminal portion protruding outside the resin sealing layer 100 is bent to obtain two sets of semiconductor devices 1 as shown in Fig. 1 etc. In practice, by providing more similar arrangements, more semiconductor devices 1 can be manufactured.
[0040] In the semiconductor device 1, a large number of bonding wires 90 are used to accommodate large currents, particularly for the source (S) of element T1 in switching element chip 11 and the source (S) of element T2 in switching element chip 12. In this case, common bonding wires 90 (of the same thickness) can be used for all internal connections in Fig. 2, making it possible to reduce the cost of this semiconductor device 1. Standardizing materials can eliminate the labor required for setup changes and shorten production time.
[0041] On the other hand, the wiring connection in such a location where a large current flows can be made using a stronger member other than a bonding wire, in which case the reliability of the wiring connection in this area can be improved. An example of such a member is a clip lead made of a metal plate similar to the first lead frame 21, as described in the latter half of JP 2016-146450 A.
[0042] Fig. 7 shows a top perspective view of a semiconductor device 2, which is such a modified example of the semiconductor device 1, and Fig. 8 shows a cross-sectional view of the semiconductor device 2 taken along the line AA. In this semiconductor device 2, clip leads 31 and 32 having the configuration shown in the figure are used to connect the upper surface of the switching element chip 11 to the connection portion 22B (second lead frame 22) and the upper surface of the switching element chip 12 to the connection portion 23A (first wiring portion 23) via a conductive bonding layer 40. While Fig. 8 shows only clip lead 31, the structure of clip lead 32 is similar. Clip leads 31 and 32 are obtained by processing a metal plate, similar to the first lead frame 21, and are bonded to the upper surface of the switching element chip and each connection portion (metal plate) by the conductive bonding layer 40.
[0043] In this case, the wiring that serves as the path through which a large current flows is made up of clip leads, so the reliability of this portion is particularly improved.
[0044] The above example was a semiconductor device that forms a half-bridge circuit as shown in Figure 1, but when multiple two switching elements that operate at high power are used in combination, it is possible to realize an SOP-type semiconductor device in which the high-side input terminal and the low-side input terminal are located on the same side, as described above.
[0045] In this case, in the above example, the second wiring section 24 to the fifth wiring section 27, which are four types of pins (INH, INL, VCC, GND), are used for external input to the control chip 13. However, depending on the intended use of this half-bridge circuit, additional input pins (wiring sections) may be provided to more precisely control the elements T1 and T2, thereby enabling more appropriate operation.
[0046] In the semiconductor device 1 having the above configuration, the half-bridge circuit shown in FIG. 1 is configured, and a plurality of such circuits can be combined to drive a motor, etc. An example of such a circuit is a three-phase motor used in an automobile air conditioner, etc. To drive the three-phase motor, the semiconductor device 1 can be used for each phase. FIG. 9 is a circuit diagram showing a configuration (electrical equipment) configured using the semiconductor device 1 in this case, and FIG. 10 is a diagram showing a state in which this configuration is mounted on an automobile 500.
[0047] Here, a motor driving unit 400 is used that is provided with three sets of the semiconductor devices 1 (elements T1, T2, control chip 13), and the three input voltages of the motor (three-phase motor) M are connected to C terminals of the individual semiconductor devices 1. Furthermore, all terminals P of each semiconductor device 1 are connected to a DC power supply 410, which is a high-voltage power supply for driving the motor M. Furthermore, the VCC supply terminal of the control chip 13 in each semiconductor device 1 is connected to a DC power supply 420, which is a low-voltage (e.g., 12 V) power supply for control. Furthermore, the voltages of the INH input terminal and the INL input terminal of each semiconductor device 1 are controlled by an ECU (automotive control circuit) 430. The DC power supply 420 also serves as the power supply for the ECU 430.
[0048] As shown in FIG. 5, the motor drive unit 400 can be easily obtained by mounting three SOP-type semiconductor devices 1 as described above on a single printed circuit board 200. Therefore, as shown in FIG. 10, this can be easily mounted on an automobile 500, and it is also easy to connect it to an ECU 430, a motor M, etc. In this case, chips with other functions may also be mounted on the printed circuit board 200 at the same time. The motor M is not limited to that for air conditioners, and a similar configuration can be used for motors for other purposes. In this case, since a common semiconductor device 1 can be used, the overall cost can be reduced.
[0049] Furthermore, the semiconductor device described above can be used for purposes other than driving a motor, depending on the combination. [Explanation of symbols]
[0050] 1, 2 Semiconductor device (semiconductor module) 11 Switching element chip (first switching element chip) 12 Switching element chip (second switching element chip) 13 Control chip 21 First lead frame 21A, 22A die pad area 21B 1st terminal section 22 Second lead frame 22B, 23A, 24A to 27A connection parts 22C 3rd terminal section 23 1st wiring section 23B 2nd terminal section 24 2nd wiring section 24B 4th terminal section 25 Third wiring section 25B 5th terminal section 26 4th wiring section 26B 6th terminal section 27 5th wiring section 27B 7th terminal section 31, 32 Clip lead 40 Bonding layer 50 Metal Plate Pattern 51 Outer Frame 52 Connecting part 90 Bonding Wire 100 Resin sealing layer 200 Printed Circuit Boards 210 Insulation sheet 220 Heat sink 400 Motor drive unit 410, 420 DC power supply 430 ECU (Automotive Control Circuit) 500 cars C cutting line C0 Outer frame cutting line Medium motor T1 element (first switching element) T2 element (second switching element)
Claims
1. A semiconductor device having a circuit configuration in which a first switching element and a second switching element are combined, in which on / off of a current flowing between a first main electrode on a high potential side and a second main electrode on a low potential side is controlled, a first switching element chip on which the first switching element is formed; a second switching element chip on which the second switching element is formed; a first lead frame made of a metal plate on which the first switching element chip is mounted and to which the first main electrode of the first switching element is connected; a second lead frame made of a metal plate on which the second switching element chip is mounted and to which the first main electrode of the second switching element is connected; a first wiring portion made of a metal plate and connected to the second main electrode of the second switching element; are provided in a resin sealing layer made of a resin material and having a substantially rectangular shape with one side extending in the vertical direction, In plan view, a first terminal portion integrated with the first lead frame and a second terminal portion integrated with the first wiring portion are spaced apart from each other in a direction along one of two opposing sides of the resin sealing layer and protrude from the resin sealing layer to the outside; a third terminal portion integrated with the second lead frame protruding from the resin sealing layer on the other of the two sides;
2. a control chip for controlling the on / off of the first switching element and the second switching element is mounted on the second lead frame closer to the first lead frame than the second switching element chip; 2. The semiconductor device according to claim 1, wherein a plurality of terminal portions provided for input to the control chip are spaced apart from the third terminal portion in a direction along the other of the two sides, and each of the terminal portions is spaced apart from one another and protrudes to the outside from the resin sealing layer.
3. a circuit configuration in which the first switching element and the second switching element are combined to form a half-bridge circuit, the second main electrode of the first switching element is connected to the second lead frame; 3. The semiconductor device according to claim 2, wherein a high-potential side power supply potential is input to the first terminal portion, a low-potential side power supply potential is input to the second terminal portion, the output of the half-bridge circuit is taken out from the third terminal portion, and the first lead frame, the first wiring portion, and the second lead frame are arranged at a distance of 5 mm or more from each other.
4. the control chip and the control electrode of the first switching element are connected by bonding wires, and the control chip and the control electrode of the second switching element are connected by bonding wires, 4. The semiconductor device according to claim 3, wherein the connection between the second main electrode of the second switching element and the first wiring portion, and between the second main electrode of the first switching element and the second lead frame, uses a greater number of bonding wires having the same thickness as the bonding wires used between the control chip and the control electrode of the first switching element and between the control chip and the control electrode of the second switching element.
5. the first switching element chip is mounted on a flat-plate-shaped first die pad portion of the first lead frame, and the second switching element chip is mounted on a flat-plate-shaped second die pad portion of the second lead frame; Each is equipped with 3. The semiconductor device according to claim 1, wherein the first die pad portion and the second die pad portion are exposed at the bottom surface of the resin sealing layer.
6. 3. An electrical device comprising the semiconductor device according to claim 1.
Citation Information
Patent Citations
Transportation vessel device
JP1989090027A